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authorTomi Valkeinen <tomi.valkeinen@ti.com>2015-11-05 11:39:52 -0500
committerTomi Valkeinen <tomi.valkeinen@ti.com>2017-04-03 05:36:40 -0400
commit9f759225e42b00ad0c5a55907f443b388e8960f4 (patch)
treead3c4b7b29003cdc70002fb3b8c9dcd41b33f93e /drivers/gpu/drm/omapdrm/omap_irq.c
parenta1a37647d240ffb0b6480c2ecd1b02a4c21f6926 (diff)
drm/omap: use dispc_ops
Change omapdrm to get dispc_ops and use that to call the dispc functions instead or direct function calls. The change is very straightforward. The only problem was in omap_crtc_init() which calls pipe2vbl(crtc), and at that point of time the crtc->dev link, which is used to get the dispc_ops, has not been set up yet. This patch makes omap_crtc_init() skip the call to pipe2vbl() and instead calls dispc_ops->mgr_get_vsync_irq() directly. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/omap_irq.c')
-rw-r--r--drivers/gpu/drm/omapdrm/omap_irq.c33
1 files changed, 17 insertions, 16 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c
index a3fd6e8266c8..26a3c06aa14d 100644
--- a/drivers/gpu/drm/omapdrm/omap_irq.c
+++ b/drivers/gpu/drm/omapdrm/omap_irq.c
@@ -40,8 +40,8 @@ static void omap_irq_update(struct drm_device *dev)
40 40
41 DBG("irqmask=%08x", irqmask); 41 DBG("irqmask=%08x", irqmask);
42 42
43 dispc_write_irqenable(irqmask); 43 priv->dispc_ops->write_irqenable(irqmask);
44 dispc_read_irqenable(); /* flush posted write */ 44 priv->dispc_ops->read_irqenable(); /* flush posted write */
45} 45}
46 46
47static void omap_irq_wait_handler(struct omap_irq_wait *wait) 47static void omap_irq_wait_handler(struct omap_irq_wait *wait)
@@ -111,7 +111,7 @@ int omap_irq_enable_vblank(struct drm_crtc *crtc)
111 DBG("dev=%p, crtc=%u", dev, channel); 111 DBG("dev=%p, crtc=%u", dev, channel);
112 112
113 spin_lock_irqsave(&priv->wait_lock, flags); 113 spin_lock_irqsave(&priv->wait_lock, flags);
114 priv->irq_mask |= dispc_mgr_get_vsync_irq(channel); 114 priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(channel);
115 omap_irq_update(dev); 115 omap_irq_update(dev);
116 spin_unlock_irqrestore(&priv->wait_lock, flags); 116 spin_unlock_irqrestore(&priv->wait_lock, flags);
117 117
@@ -137,7 +137,7 @@ void omap_irq_disable_vblank(struct drm_crtc *crtc)
137 DBG("dev=%p, crtc=%u", dev, channel); 137 DBG("dev=%p, crtc=%u", dev, channel);
138 138
139 spin_lock_irqsave(&priv->wait_lock, flags); 139 spin_lock_irqsave(&priv->wait_lock, flags);
140 priv->irq_mask &= ~dispc_mgr_get_vsync_irq(channel); 140 priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(channel);
141 omap_irq_update(dev); 141 omap_irq_update(dev);
142 spin_unlock_irqrestore(&priv->wait_lock, flags); 142 spin_unlock_irqrestore(&priv->wait_lock, flags);
143} 143}
@@ -200,9 +200,9 @@ static irqreturn_t omap_irq_handler(int irq, void *arg)
200 unsigned int id; 200 unsigned int id;
201 u32 irqstatus; 201 u32 irqstatus;
202 202
203 irqstatus = dispc_read_irqstatus(); 203 irqstatus = priv->dispc_ops->read_irqstatus();
204 dispc_clear_irqstatus(irqstatus); 204 priv->dispc_ops->clear_irqstatus(irqstatus);
205 dispc_read_irqstatus(); /* flush posted write */ 205 priv->dispc_ops->read_irqstatus(); /* flush posted write */
206 206
207 VERB("irqs: %08x", irqstatus); 207 VERB("irqs: %08x", irqstatus);
208 208
@@ -210,12 +210,12 @@ static irqreturn_t omap_irq_handler(int irq, void *arg)
210 struct drm_crtc *crtc = priv->crtcs[id]; 210 struct drm_crtc *crtc = priv->crtcs[id];
211 enum omap_channel channel = omap_crtc_channel(crtc); 211 enum omap_channel channel = omap_crtc_channel(crtc);
212 212
213 if (irqstatus & dispc_mgr_get_vsync_irq(channel)) { 213 if (irqstatus & priv->dispc_ops->mgr_get_vsync_irq(channel)) {
214 drm_handle_vblank(dev, id); 214 drm_handle_vblank(dev, id);
215 omap_crtc_vblank_irq(crtc); 215 omap_crtc_vblank_irq(crtc);
216 } 216 }
217 217
218 if (irqstatus & dispc_mgr_get_sync_lost_irq(channel)) 218 if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(channel))
219 omap_crtc_error_irq(crtc, irqstatus); 219 omap_crtc_error_irq(crtc, irqstatus);
220 } 220 }
221 221
@@ -249,7 +249,7 @@ static const u32 omap_underflow_irqs[] = {
249int omap_drm_irq_install(struct drm_device *dev) 249int omap_drm_irq_install(struct drm_device *dev)
250{ 250{
251 struct omap_drm_private *priv = dev->dev_private; 251 struct omap_drm_private *priv = dev->dev_private;
252 unsigned int num_mgrs = dispc_get_num_mgrs(); 252 unsigned int num_mgrs = priv->dispc_ops->get_num_mgrs();
253 unsigned int max_planes; 253 unsigned int max_planes;
254 unsigned int i; 254 unsigned int i;
255 int ret; 255 int ret;
@@ -267,13 +267,13 @@ int omap_drm_irq_install(struct drm_device *dev)
267 } 267 }
268 268
269 for (i = 0; i < num_mgrs; ++i) 269 for (i = 0; i < num_mgrs; ++i)
270 priv->irq_mask |= dispc_mgr_get_sync_lost_irq(i); 270 priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(i);
271 271
272 dispc_runtime_get(); 272 priv->dispc_ops->runtime_get();
273 dispc_clear_irqstatus(0xffffffff); 273 priv->dispc_ops->clear_irqstatus(0xffffffff);
274 dispc_runtime_put(); 274 priv->dispc_ops->runtime_put();
275 275
276 ret = dispc_request_irq(omap_irq_handler, dev); 276 ret = priv->dispc_ops->request_irq(omap_irq_handler, dev);
277 if (ret < 0) 277 if (ret < 0)
278 return ret; 278 return ret;
279 279
@@ -284,6 +284,7 @@ int omap_drm_irq_install(struct drm_device *dev)
284 284
285void omap_drm_irq_uninstall(struct drm_device *dev) 285void omap_drm_irq_uninstall(struct drm_device *dev)
286{ 286{
287 struct omap_drm_private *priv = dev->dev_private;
287 unsigned long irqflags; 288 unsigned long irqflags;
288 int i; 289 int i;
289 290
@@ -304,5 +305,5 @@ void omap_drm_irq_uninstall(struct drm_device *dev)
304 spin_unlock_irqrestore(&dev->vbl_lock, irqflags); 305 spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
305 } 306 }
306 307
307 dispc_free_irq(dev); 308 priv->dispc_ops->free_irq(dev);
308} 309}