diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2015-11-05 11:39:52 -0500 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2017-04-03 05:36:40 -0400 |
commit | 9f759225e42b00ad0c5a55907f443b388e8960f4 (patch) | |
tree | ad3c4b7b29003cdc70002fb3b8c9dcd41b33f93e /drivers/gpu/drm/omapdrm/omap_crtc.c | |
parent | a1a37647d240ffb0b6480c2ecd1b02a4c21f6926 (diff) |
drm/omap: use dispc_ops
Change omapdrm to get dispc_ops and use that to call the dispc functions
instead or direct function calls.
The change is very straightforward.
The only problem was in omap_crtc_init() which calls pipe2vbl(crtc), and
at that point of time the crtc->dev link, which is used to get the
dispc_ops, has not been set up yet. This patch makes omap_crtc_init()
skip the call to pipe2vbl() and instead calls
dispc_ops->mgr_get_vsync_irq() directly.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/omap_crtc.c')
-rw-r--r-- | drivers/gpu/drm/omapdrm/omap_crtc.c | 36 |
1 files changed, 23 insertions, 13 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index 49fc61963af4..1db96b077ae8 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c | |||
@@ -107,10 +107,12 @@ static struct omap_dss_device *omap_crtc_output[8]; | |||
107 | static int omap_crtc_dss_connect(enum omap_channel channel, | 107 | static int omap_crtc_dss_connect(enum omap_channel channel, |
108 | struct omap_dss_device *dst) | 108 | struct omap_dss_device *dst) |
109 | { | 109 | { |
110 | const struct dispc_ops *dispc_ops = dispc_get_ops(); | ||
111 | |||
110 | if (omap_crtc_output[channel]) | 112 | if (omap_crtc_output[channel]) |
111 | return -EINVAL; | 113 | return -EINVAL; |
112 | 114 | ||
113 | if ((dispc_mgr_get_supported_outputs(channel) & dst->id) == 0) | 115 | if ((dispc_ops->mgr_get_supported_outputs(channel) & dst->id) == 0) |
114 | return -EINVAL; | 116 | return -EINVAL; |
115 | 117 | ||
116 | omap_crtc_output[channel] = dst; | 118 | omap_crtc_output[channel] = dst; |
@@ -134,6 +136,7 @@ static void omap_crtc_dss_start_update(enum omap_channel channel) | |||
134 | static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | 136 | static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) |
135 | { | 137 | { |
136 | struct drm_device *dev = crtc->dev; | 138 | struct drm_device *dev = crtc->dev; |
139 | struct omap_drm_private *priv = dev->dev_private; | ||
137 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); | 140 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
138 | enum omap_channel channel = omap_crtc->channel; | 141 | enum omap_channel channel = omap_crtc->channel; |
139 | struct omap_irq_wait *wait; | 142 | struct omap_irq_wait *wait; |
@@ -144,7 +147,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | |||
144 | return; | 147 | return; |
145 | 148 | ||
146 | if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) { | 149 | if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) { |
147 | dispc_mgr_enable(channel, enable); | 150 | priv->dispc_ops->mgr_enable(channel, enable); |
148 | omap_crtc->enabled = enable; | 151 | omap_crtc->enabled = enable; |
149 | return; | 152 | return; |
150 | } | 153 | } |
@@ -157,8 +160,8 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | |||
157 | omap_crtc->ignore_digit_sync_lost = true; | 160 | omap_crtc->ignore_digit_sync_lost = true; |
158 | } | 161 | } |
159 | 162 | ||
160 | framedone_irq = dispc_mgr_get_framedone_irq(channel); | 163 | framedone_irq = priv->dispc_ops->mgr_get_framedone_irq(channel); |
161 | vsync_irq = dispc_mgr_get_vsync_irq(channel); | 164 | vsync_irq = priv->dispc_ops->mgr_get_vsync_irq(channel); |
162 | 165 | ||
163 | if (enable) { | 166 | if (enable) { |
164 | wait = omap_irq_wait_init(dev, vsync_irq, 1); | 167 | wait = omap_irq_wait_init(dev, vsync_irq, 1); |
@@ -178,7 +181,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | |||
178 | wait = omap_irq_wait_init(dev, vsync_irq, 2); | 181 | wait = omap_irq_wait_init(dev, vsync_irq, 2); |
179 | } | 182 | } |
180 | 183 | ||
181 | dispc_mgr_enable(channel, enable); | 184 | priv->dispc_ops->mgr_enable(channel, enable); |
182 | omap_crtc->enabled = enable; | 185 | omap_crtc->enabled = enable; |
183 | 186 | ||
184 | ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); | 187 | ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); |
@@ -198,9 +201,9 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | |||
198 | static int omap_crtc_dss_enable(enum omap_channel channel) | 201 | static int omap_crtc_dss_enable(enum omap_channel channel) |
199 | { | 202 | { |
200 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; | 203 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; |
204 | struct omap_drm_private *priv = omap_crtc->base.dev->dev_private; | ||
201 | 205 | ||
202 | dispc_mgr_set_timings(omap_crtc->channel, | 206 | priv->dispc_ops->mgr_set_timings(omap_crtc->channel, &omap_crtc->vm); |
203 | &omap_crtc->vm); | ||
204 | omap_crtc_set_enabled(&omap_crtc->base, true); | 207 | omap_crtc_set_enabled(&omap_crtc->base, true); |
205 | 208 | ||
206 | return 0; | 209 | return 0; |
@@ -225,8 +228,10 @@ static void omap_crtc_dss_set_lcd_config(enum omap_channel channel, | |||
225 | const struct dss_lcd_mgr_config *config) | 228 | const struct dss_lcd_mgr_config *config) |
226 | { | 229 | { |
227 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; | 230 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; |
231 | struct omap_drm_private *priv = omap_crtc->base.dev->dev_private; | ||
232 | |||
228 | DBG("%s", omap_crtc->name); | 233 | DBG("%s", omap_crtc->name); |
229 | dispc_mgr_set_lcd_config(omap_crtc->channel, config); | 234 | priv->dispc_ops->mgr_set_lcd_config(omap_crtc->channel, config); |
230 | } | 235 | } |
231 | 236 | ||
232 | static int omap_crtc_dss_register_framedone( | 237 | static int omap_crtc_dss_register_framedone( |
@@ -274,6 +279,8 @@ void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus) | |||
274 | void omap_crtc_vblank_irq(struct drm_crtc *crtc) | 279 | void omap_crtc_vblank_irq(struct drm_crtc *crtc) |
275 | { | 280 | { |
276 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); | 281 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
282 | struct drm_device *dev = omap_crtc->base.dev; | ||
283 | struct omap_drm_private *priv = dev->dev_private; | ||
277 | bool pending; | 284 | bool pending; |
278 | 285 | ||
279 | spin_lock(&crtc->dev->event_lock); | 286 | spin_lock(&crtc->dev->event_lock); |
@@ -281,7 +288,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc) | |||
281 | * If the dispc is busy we're racing the flush operation. Try again on | 288 | * If the dispc is busy we're racing the flush operation. Try again on |
282 | * the next vblank interrupt. | 289 | * the next vblank interrupt. |
283 | */ | 290 | */ |
284 | if (dispc_mgr_go_busy(omap_crtc->channel)) { | 291 | if (priv->dispc_ops->mgr_go_busy(omap_crtc->channel)) { |
285 | spin_unlock(&crtc->dev->event_lock); | 292 | spin_unlock(&crtc->dev->event_lock); |
286 | return; | 293 | return; |
287 | } | 294 | } |
@@ -307,6 +314,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc) | |||
307 | 314 | ||
308 | static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) | 315 | static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) |
309 | { | 316 | { |
317 | struct omap_drm_private *priv = crtc->dev->dev_private; | ||
310 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); | 318 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
311 | struct omap_overlay_manager_info info; | 319 | struct omap_overlay_manager_info info; |
312 | 320 | ||
@@ -317,7 +325,7 @@ static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) | |||
317 | info.partial_alpha_enabled = false; | 325 | info.partial_alpha_enabled = false; |
318 | info.cpr_enable = false; | 326 | info.cpr_enable = false; |
319 | 327 | ||
320 | dispc_mgr_setup(omap_crtc->channel, &info); | 328 | priv->dispc_ops->mgr_setup(omap_crtc->channel, &info); |
321 | } | 329 | } |
322 | 330 | ||
323 | /* ----------------------------------------------------------------------------- | 331 | /* ----------------------------------------------------------------------------- |
@@ -401,6 +409,7 @@ static void omap_crtc_atomic_begin(struct drm_crtc *crtc, | |||
401 | static void omap_crtc_atomic_flush(struct drm_crtc *crtc, | 409 | static void omap_crtc_atomic_flush(struct drm_crtc *crtc, |
402 | struct drm_crtc_state *old_crtc_state) | 410 | struct drm_crtc_state *old_crtc_state) |
403 | { | 411 | { |
412 | struct omap_drm_private *priv = crtc->dev->dev_private; | ||
404 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); | 413 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
405 | int ret; | 414 | int ret; |
406 | 415 | ||
@@ -414,7 +423,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, | |||
414 | length = crtc->state->gamma_lut->length / | 423 | length = crtc->state->gamma_lut->length / |
415 | sizeof(*lut); | 424 | sizeof(*lut); |
416 | } | 425 | } |
417 | dispc_mgr_set_gamma(omap_crtc->channel, lut, length); | 426 | priv->dispc_ops->mgr_set_gamma(omap_crtc->channel, lut, length); |
418 | } | 427 | } |
419 | 428 | ||
420 | omap_crtc_write_crtc_properties(crtc); | 429 | omap_crtc_write_crtc_properties(crtc); |
@@ -429,7 +438,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, | |||
429 | WARN_ON(ret != 0); | 438 | WARN_ON(ret != 0); |
430 | 439 | ||
431 | spin_lock_irq(&crtc->dev->event_lock); | 440 | spin_lock_irq(&crtc->dev->event_lock); |
432 | dispc_mgr_go(omap_crtc->channel); | 441 | priv->dispc_ops->mgr_go(omap_crtc->channel); |
433 | 442 | ||
434 | WARN_ON(omap_crtc->pending); | 443 | WARN_ON(omap_crtc->pending); |
435 | omap_crtc->pending = true; | 444 | omap_crtc->pending = true; |
@@ -542,6 +551,7 @@ void omap_crtc_pre_uninit(void) | |||
542 | struct drm_crtc *omap_crtc_init(struct drm_device *dev, | 551 | struct drm_crtc *omap_crtc_init(struct drm_device *dev, |
543 | struct drm_plane *plane, enum omap_channel channel, int id) | 552 | struct drm_plane *plane, enum omap_channel channel, int id) |
544 | { | 553 | { |
554 | struct omap_drm_private *priv = dev->dev_private; | ||
545 | struct drm_crtc *crtc = NULL; | 555 | struct drm_crtc *crtc = NULL; |
546 | struct omap_crtc *omap_crtc; | 556 | struct omap_crtc *omap_crtc; |
547 | int ret; | 557 | int ret; |
@@ -575,7 +585,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, | |||
575 | * extracted with dispc_mgr_gamma_size(). If it returns 0 | 585 | * extracted with dispc_mgr_gamma_size(). If it returns 0 |
576 | * gamma table is not supprted. | 586 | * gamma table is not supprted. |
577 | */ | 587 | */ |
578 | if (dispc_mgr_gamma_size(channel)) { | 588 | if (priv->dispc_ops->mgr_gamma_size(channel)) { |
579 | uint gamma_lut_size = 256; | 589 | uint gamma_lut_size = 256; |
580 | 590 | ||
581 | drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); | 591 | drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); |