aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_sprite.c
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2016-11-22 11:02:00 -0500
committerVille Syrjälä <ville.syrjala@linux.intel.com>2016-11-23 15:04:24 -0500
commit83c04a62a187283d9e1473d062cd1cd25ee60e2e (patch)
tree111e1d5079a7445226b5878b8383fd922a2d2fe0 /drivers/gpu/drm/i915/intel_sprite.c
parent8e816bb496763182d5733ef955ac8ca7334480f6 (diff)
drm/i915: Use enum plane_id in VLV/CHV sprite code
Use intel_plane->id to derive the VLV/CHV sprite register offsets instead of abusing plane->plane which is really meant to for primary planes only. v2: Convert assert_sprites_disabled() over as well v3: Rename the reg macro parameter to 'plane_id' as well (Paulo) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1479830524-7882-6-git-send-email-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c74
1 files changed, 37 insertions, 37 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 4ddb17cbe45f..91bcaff28f35 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -296,7 +296,7 @@ static void
296chv_update_csc(struct intel_plane *intel_plane, uint32_t format) 296chv_update_csc(struct intel_plane *intel_plane, uint32_t format)
297{ 297{
298 struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev); 298 struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
299 int plane = intel_plane->plane; 299 enum plane_id plane_id = intel_plane->id;
300 300
301 /* Seems RGB data bypasses the CSC always */ 301 /* Seems RGB data bypasses the CSC always */
302 if (!format_is_yuv(format)) 302 if (!format_is_yuv(format))
@@ -312,23 +312,23 @@ chv_update_csc(struct intel_plane *intel_plane, uint32_t format)
312 * Cb and Cr apparently come in as signed already, so no 312 * Cb and Cr apparently come in as signed already, so no
313 * need for any offset. For Y we need to remove the offset. 313 * need for any offset. For Y we need to remove the offset.
314 */ 314 */
315 I915_WRITE(SPCSCYGOFF(plane), SPCSC_OOFF(0) | SPCSC_IOFF(-64)); 315 I915_WRITE(SPCSCYGOFF(plane_id), SPCSC_OOFF(0) | SPCSC_IOFF(-64));
316 I915_WRITE(SPCSCCBOFF(plane), SPCSC_OOFF(0) | SPCSC_IOFF(0)); 316 I915_WRITE(SPCSCCBOFF(plane_id), SPCSC_OOFF(0) | SPCSC_IOFF(0));
317 I915_WRITE(SPCSCCROFF(plane), SPCSC_OOFF(0) | SPCSC_IOFF(0)); 317 I915_WRITE(SPCSCCROFF(plane_id), SPCSC_OOFF(0) | SPCSC_IOFF(0));
318 318
319 I915_WRITE(SPCSCC01(plane), SPCSC_C1(4769) | SPCSC_C0(6537)); 319 I915_WRITE(SPCSCC01(plane_id), SPCSC_C1(4769) | SPCSC_C0(6537));
320 I915_WRITE(SPCSCC23(plane), SPCSC_C1(-3330) | SPCSC_C0(0)); 320 I915_WRITE(SPCSCC23(plane_id), SPCSC_C1(-3330) | SPCSC_C0(0));
321 I915_WRITE(SPCSCC45(plane), SPCSC_C1(-1605) | SPCSC_C0(4769)); 321 I915_WRITE(SPCSCC45(plane_id), SPCSC_C1(-1605) | SPCSC_C0(4769));
322 I915_WRITE(SPCSCC67(plane), SPCSC_C1(4769) | SPCSC_C0(0)); 322 I915_WRITE(SPCSCC67(plane_id), SPCSC_C1(4769) | SPCSC_C0(0));
323 I915_WRITE(SPCSCC8(plane), SPCSC_C0(8263)); 323 I915_WRITE(SPCSCC8(plane_id), SPCSC_C0(8263));
324 324
325 I915_WRITE(SPCSCYGICLAMP(plane), SPCSC_IMAX(940) | SPCSC_IMIN(64)); 325 I915_WRITE(SPCSCYGICLAMP(plane_id), SPCSC_IMAX(940) | SPCSC_IMIN(64));
326 I915_WRITE(SPCSCCBICLAMP(plane), SPCSC_IMAX(448) | SPCSC_IMIN(-448)); 326 I915_WRITE(SPCSCCBICLAMP(plane_id), SPCSC_IMAX(448) | SPCSC_IMIN(-448));
327 I915_WRITE(SPCSCCRICLAMP(plane), SPCSC_IMAX(448) | SPCSC_IMIN(-448)); 327 I915_WRITE(SPCSCCRICLAMP(plane_id), SPCSC_IMAX(448) | SPCSC_IMIN(-448));
328 328
329 I915_WRITE(SPCSCYGOCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); 329 I915_WRITE(SPCSCYGOCLAMP(plane_id), SPCSC_OMAX(1023) | SPCSC_OMIN(0));
330 I915_WRITE(SPCSCCBOCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); 330 I915_WRITE(SPCSCCBOCLAMP(plane_id), SPCSC_OMAX(1023) | SPCSC_OMIN(0));
331 I915_WRITE(SPCSCCROCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); 331 I915_WRITE(SPCSCCROCLAMP(plane_id), SPCSC_OMAX(1023) | SPCSC_OMIN(0));
332} 332}
333 333
334static void 334static void
@@ -340,8 +340,8 @@ vlv_update_plane(struct drm_plane *dplane,
340 struct drm_i915_private *dev_priv = to_i915(dev); 340 struct drm_i915_private *dev_priv = to_i915(dev);
341 struct intel_plane *intel_plane = to_intel_plane(dplane); 341 struct intel_plane *intel_plane = to_intel_plane(dplane);
342 struct drm_framebuffer *fb = plane_state->base.fb; 342 struct drm_framebuffer *fb = plane_state->base.fb;
343 int pipe = intel_plane->pipe; 343 enum pipe pipe = intel_plane->pipe;
344 int plane = intel_plane->plane; 344 enum plane_id plane_id = intel_plane->id;
345 u32 sprctl; 345 u32 sprctl;
346 u32 sprsurf_offset, linear_offset; 346 u32 sprsurf_offset, linear_offset;
347 unsigned int rotation = plane_state->base.rotation; 347 unsigned int rotation = plane_state->base.rotation;
@@ -434,9 +434,9 @@ vlv_update_plane(struct drm_plane *dplane,
434 linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); 434 linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
435 435
436 if (key->flags) { 436 if (key->flags) {
437 I915_WRITE(SPKEYMINVAL(pipe, plane), key->min_value); 437 I915_WRITE(SPKEYMINVAL(pipe, plane_id), key->min_value);
438 I915_WRITE(SPKEYMAXVAL(pipe, plane), key->max_value); 438 I915_WRITE(SPKEYMAXVAL(pipe, plane_id), key->max_value);
439 I915_WRITE(SPKEYMSK(pipe, plane), key->channel_mask); 439 I915_WRITE(SPKEYMSK(pipe, plane_id), key->channel_mask);
440 } 440 }
441 441
442 if (key->flags & I915_SET_COLORKEY_SOURCE) 442 if (key->flags & I915_SET_COLORKEY_SOURCE)
@@ -445,21 +445,21 @@ vlv_update_plane(struct drm_plane *dplane,
445 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) 445 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
446 chv_update_csc(intel_plane, fb->pixel_format); 446 chv_update_csc(intel_plane, fb->pixel_format);
447 447
448 I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]); 448 I915_WRITE(SPSTRIDE(pipe, plane_id), fb->pitches[0]);
449 I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x); 449 I915_WRITE(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x);
450 450
451 if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED) 451 if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
452 I915_WRITE(SPTILEOFF(pipe, plane), (y << 16) | x); 452 I915_WRITE(SPTILEOFF(pipe, plane_id), (y << 16) | x);
453 else 453 else
454 I915_WRITE(SPLINOFF(pipe, plane), linear_offset); 454 I915_WRITE(SPLINOFF(pipe, plane_id), linear_offset);
455 455
456 I915_WRITE(SPCONSTALPHA(pipe, plane), 0); 456 I915_WRITE(SPCONSTALPHA(pipe, plane_id), 0);
457 457
458 I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w); 458 I915_WRITE(SPSIZE(pipe, plane_id), (crtc_h << 16) | crtc_w);
459 I915_WRITE(SPCNTR(pipe, plane), sprctl); 459 I915_WRITE(SPCNTR(pipe, plane_id), sprctl);
460 I915_WRITE(SPSURF(pipe, plane), 460 I915_WRITE(SPSURF(pipe, plane_id),
461 intel_fb_gtt_offset(fb, rotation) + sprsurf_offset); 461 intel_fb_gtt_offset(fb, rotation) + sprsurf_offset);
462 POSTING_READ(SPSURF(pipe, plane)); 462 POSTING_READ(SPSURF(pipe, plane_id));
463} 463}
464 464
465static void 465static void
@@ -468,13 +468,13 @@ vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
468 struct drm_device *dev = dplane->dev; 468 struct drm_device *dev = dplane->dev;
469 struct drm_i915_private *dev_priv = to_i915(dev); 469 struct drm_i915_private *dev_priv = to_i915(dev);
470 struct intel_plane *intel_plane = to_intel_plane(dplane); 470 struct intel_plane *intel_plane = to_intel_plane(dplane);
471 int pipe = intel_plane->pipe; 471 enum pipe pipe = intel_plane->pipe;
472 int plane = intel_plane->plane; 472 enum plane_id plane_id = intel_plane->id;
473 473
474 I915_WRITE(SPCNTR(pipe, plane), 0); 474 I915_WRITE(SPCNTR(pipe, plane_id), 0);
475 475
476 I915_WRITE(SPSURF(pipe, plane), 0); 476 I915_WRITE(SPSURF(pipe, plane_id), 0);
477 POSTING_READ(SPSURF(pipe, plane)); 477 POSTING_READ(SPSURF(pipe, plane_id));
478} 478}
479 479
480static void 480static void