diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-11-22 11:01:59 -0500 |
---|---|---|
committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-11-23 15:03:55 -0500 |
commit | 8e816bb496763182d5733ef955ac8ca7334480f6 (patch) | |
tree | 8d9daae2edd621c03bf07cb31a0da8510a586cb6 /drivers/gpu/drm/i915/intel_sprite.c | |
parent | d5cdfdf54ea5bcc454a2804301ae5342db0ff0c3 (diff) |
drm/i915: Use enum plane_id in SKL plane code
Replace the intel_plane->plane and hardcoded 0 usage in the SKL plane
code with intel_plane->id.
This should make the SKL "primary" and "sprite" code virtually
identical, so the next logical step would likely be dropping one
of the copies.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1479830524-7882-5-git-send-email-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_sprite.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index bc86881b0484..4ddb17cbe45f 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c | |||
@@ -203,8 +203,8 @@ skl_update_plane(struct drm_plane *drm_plane, | |||
203 | struct drm_i915_private *dev_priv = to_i915(dev); | 203 | struct drm_i915_private *dev_priv = to_i915(dev); |
204 | struct intel_plane *intel_plane = to_intel_plane(drm_plane); | 204 | struct intel_plane *intel_plane = to_intel_plane(drm_plane); |
205 | struct drm_framebuffer *fb = plane_state->base.fb; | 205 | struct drm_framebuffer *fb = plane_state->base.fb; |
206 | const int pipe = intel_plane->pipe; | 206 | enum plane_id plane_id = intel_plane->id; |
207 | const int plane = intel_plane->plane + 1; | 207 | enum pipe pipe = intel_plane->pipe; |
208 | u32 plane_ctl; | 208 | u32 plane_ctl; |
209 | const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; | 209 | const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; |
210 | u32 surf_addr = plane_state->main.offset; | 210 | u32 surf_addr = plane_state->main.offset; |
@@ -229,9 +229,9 @@ skl_update_plane(struct drm_plane *drm_plane, | |||
229 | plane_ctl |= skl_plane_ctl_rotation(rotation); | 229 | plane_ctl |= skl_plane_ctl_rotation(rotation); |
230 | 230 | ||
231 | if (key->flags) { | 231 | if (key->flags) { |
232 | I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value); | 232 | I915_WRITE(PLANE_KEYVAL(pipe, plane_id), key->min_value); |
233 | I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value); | 233 | I915_WRITE(PLANE_KEYMAX(pipe, plane_id), key->max_value); |
234 | I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask); | 234 | I915_WRITE(PLANE_KEYMSK(pipe, plane_id), key->channel_mask); |
235 | } | 235 | } |
236 | 236 | ||
237 | if (key->flags & I915_SET_COLORKEY_DESTINATION) | 237 | if (key->flags & I915_SET_COLORKEY_DESTINATION) |
@@ -245,36 +245,36 @@ skl_update_plane(struct drm_plane *drm_plane, | |||
245 | crtc_w--; | 245 | crtc_w--; |
246 | crtc_h--; | 246 | crtc_h--; |
247 | 247 | ||
248 | I915_WRITE(PLANE_OFFSET(pipe, plane), (y << 16) | x); | 248 | I915_WRITE(PLANE_OFFSET(pipe, plane_id), (y << 16) | x); |
249 | I915_WRITE(PLANE_STRIDE(pipe, plane), stride); | 249 | I915_WRITE(PLANE_STRIDE(pipe, plane_id), stride); |
250 | I915_WRITE(PLANE_SIZE(pipe, plane), (src_h << 16) | src_w); | 250 | I915_WRITE(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); |
251 | 251 | ||
252 | /* program plane scaler */ | 252 | /* program plane scaler */ |
253 | if (plane_state->scaler_id >= 0) { | 253 | if (plane_state->scaler_id >= 0) { |
254 | int scaler_id = plane_state->scaler_id; | 254 | int scaler_id = plane_state->scaler_id; |
255 | const struct intel_scaler *scaler; | 255 | const struct intel_scaler *scaler; |
256 | 256 | ||
257 | DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", plane, | 257 | DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", |
258 | PS_PLANE_SEL(plane)); | 258 | plane_id, PS_PLANE_SEL(plane_id)); |
259 | 259 | ||
260 | scaler = &crtc_state->scaler_state.scalers[scaler_id]; | 260 | scaler = &crtc_state->scaler_state.scalers[scaler_id]; |
261 | 261 | ||
262 | I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), | 262 | I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), |
263 | PS_SCALER_EN | PS_PLANE_SEL(plane) | scaler->mode); | 263 | PS_SCALER_EN | PS_PLANE_SEL(plane_id) | scaler->mode); |
264 | I915_WRITE(SKL_PS_PWR_GATE(pipe, scaler_id), 0); | 264 | I915_WRITE(SKL_PS_PWR_GATE(pipe, scaler_id), 0); |
265 | I915_WRITE(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y); | 265 | I915_WRITE(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y); |
266 | I915_WRITE(SKL_PS_WIN_SZ(pipe, scaler_id), | 266 | I915_WRITE(SKL_PS_WIN_SZ(pipe, scaler_id), |
267 | ((crtc_w + 1) << 16)|(crtc_h + 1)); | 267 | ((crtc_w + 1) << 16)|(crtc_h + 1)); |
268 | 268 | ||
269 | I915_WRITE(PLANE_POS(pipe, plane), 0); | 269 | I915_WRITE(PLANE_POS(pipe, plane_id), 0); |
270 | } else { | 270 | } else { |
271 | I915_WRITE(PLANE_POS(pipe, plane), (crtc_y << 16) | crtc_x); | 271 | I915_WRITE(PLANE_POS(pipe, plane_id), (crtc_y << 16) | crtc_x); |
272 | } | 272 | } |
273 | 273 | ||
274 | I915_WRITE(PLANE_CTL(pipe, plane), plane_ctl); | 274 | I915_WRITE(PLANE_CTL(pipe, plane_id), plane_ctl); |
275 | I915_WRITE(PLANE_SURF(pipe, plane), | 275 | I915_WRITE(PLANE_SURF(pipe, plane_id), |
276 | intel_fb_gtt_offset(fb, rotation) + surf_addr); | 276 | intel_fb_gtt_offset(fb, rotation) + surf_addr); |
277 | POSTING_READ(PLANE_SURF(pipe, plane)); | 277 | POSTING_READ(PLANE_SURF(pipe, plane_id)); |
278 | } | 278 | } |
279 | 279 | ||
280 | static void | 280 | static void |
@@ -283,13 +283,13 @@ skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc) | |||
283 | struct drm_device *dev = dplane->dev; | 283 | struct drm_device *dev = dplane->dev; |
284 | struct drm_i915_private *dev_priv = to_i915(dev); | 284 | struct drm_i915_private *dev_priv = to_i915(dev); |
285 | struct intel_plane *intel_plane = to_intel_plane(dplane); | 285 | struct intel_plane *intel_plane = to_intel_plane(dplane); |
286 | const int pipe = intel_plane->pipe; | 286 | enum plane_id plane_id = intel_plane->id; |
287 | const int plane = intel_plane->plane + 1; | 287 | enum pipe pipe = intel_plane->pipe; |
288 | 288 | ||
289 | I915_WRITE(PLANE_CTL(pipe, plane), 0); | 289 | I915_WRITE(PLANE_CTL(pipe, plane_id), 0); |
290 | 290 | ||
291 | I915_WRITE(PLANE_SURF(pipe, plane), 0); | 291 | I915_WRITE(PLANE_SURF(pipe, plane_id), 0); |
292 | POSTING_READ(PLANE_SURF(pipe, plane)); | 292 | POSTING_READ(PLANE_SURF(pipe, plane_id)); |
293 | } | 293 | } |
294 | 294 | ||
295 | static void | 295 | static void |