diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-06-29 08:25:51 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-07-13 04:42:51 -0400 |
commit | 2be7d540fde3f82e404cbddeeb2fdf05cf33af3c (patch) | |
tree | 5b410246d2d54b65f57e5c9ed5cc0432089836dc /drivers/gpu/drm/i915/intel_runtime_pm.c | |
parent | 8fcd5cd8b3cb29019937ab4b773da27a37e8e79b (diff) |
drm/i915: Refactor VLV display power well init/deinit
We do the exact same steps around the disp2d/pipe A power well
enable/disable on VLV and CHV. Refactor the shared code into
some helpers.
Note that this means we now call vlv_power_sequencer_reset() before
turning off the power well, whereas before we did it after. That
doesn't matter though since vlv_power_sequencer_reset() just resets
the power sequencer software tracking and doesn't touch the hardware
at all.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 52 |
1 files changed, 23 insertions, 29 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 1bd947ad2163..6393b76f87ff 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c | |||
@@ -835,12 +835,8 @@ static bool vlv_power_well_enabled(struct drm_i915_private *dev_priv, | |||
835 | return enabled; | 835 | return enabled; |
836 | } | 836 | } |
837 | 837 | ||
838 | static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, | 838 | static void vlv_display_power_well_init(struct drm_i915_private *dev_priv) |
839 | struct i915_power_well *power_well) | ||
840 | { | 839 | { |
841 | WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); | ||
842 | |||
843 | vlv_set_power_well(dev_priv, power_well, true); | ||
844 | 840 | ||
845 | spin_lock_irq(&dev_priv->irq_lock); | 841 | spin_lock_irq(&dev_priv->irq_lock); |
846 | valleyview_enable_display_irqs(dev_priv); | 842 | valleyview_enable_display_irqs(dev_priv); |
@@ -858,18 +854,33 @@ static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, | |||
858 | i915_redisable_vga_power_on(dev_priv->dev); | 854 | i915_redisable_vga_power_on(dev_priv->dev); |
859 | } | 855 | } |
860 | 856 | ||
857 | static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv) | ||
858 | { | ||
859 | spin_lock_irq(&dev_priv->irq_lock); | ||
860 | valleyview_disable_display_irqs(dev_priv); | ||
861 | spin_unlock_irq(&dev_priv->irq_lock); | ||
862 | |||
863 | vlv_power_sequencer_reset(dev_priv); | ||
864 | } | ||
865 | |||
866 | static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, | ||
867 | struct i915_power_well *power_well) | ||
868 | { | ||
869 | WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); | ||
870 | |||
871 | vlv_set_power_well(dev_priv, power_well, true); | ||
872 | |||
873 | vlv_display_power_well_init(dev_priv); | ||
874 | } | ||
875 | |||
861 | static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv, | 876 | static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv, |
862 | struct i915_power_well *power_well) | 877 | struct i915_power_well *power_well) |
863 | { | 878 | { |
864 | WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); | 879 | WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); |
865 | 880 | ||
866 | spin_lock_irq(&dev_priv->irq_lock); | 881 | vlv_display_power_well_deinit(dev_priv); |
867 | valleyview_disable_display_irqs(dev_priv); | ||
868 | spin_unlock_irq(&dev_priv->irq_lock); | ||
869 | 882 | ||
870 | vlv_set_power_well(dev_priv, power_well, false); | 883 | vlv_set_power_well(dev_priv, power_well, false); |
871 | |||
872 | vlv_power_sequencer_reset(dev_priv); | ||
873 | } | 884 | } |
874 | 885 | ||
875 | static void vlv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv, | 886 | static void vlv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv, |
@@ -1054,20 +1065,7 @@ static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv, | |||
1054 | 1065 | ||
1055 | chv_set_pipe_power_well(dev_priv, power_well, true); | 1066 | chv_set_pipe_power_well(dev_priv, power_well, true); |
1056 | 1067 | ||
1057 | spin_lock_irq(&dev_priv->irq_lock); | 1068 | vlv_display_power_well_init(dev_priv); |
1058 | valleyview_enable_display_irqs(dev_priv); | ||
1059 | spin_unlock_irq(&dev_priv->irq_lock); | ||
1060 | |||
1061 | /* | ||
1062 | * During driver initialization/resume we can avoid restoring the | ||
1063 | * part of the HW/SW state that will be inited anyway explicitly. | ||
1064 | */ | ||
1065 | if (dev_priv->power_domains.initializing) | ||
1066 | return; | ||
1067 | |||
1068 | intel_hpd_init(dev_priv); | ||
1069 | |||
1070 | i915_redisable_vga_power_on(dev_priv->dev); | ||
1071 | } | 1069 | } |
1072 | 1070 | ||
1073 | static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, | 1071 | static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, |
@@ -1075,13 +1073,9 @@ static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, | |||
1075 | { | 1073 | { |
1076 | WARN_ON_ONCE(power_well->data != PIPE_A); | 1074 | WARN_ON_ONCE(power_well->data != PIPE_A); |
1077 | 1075 | ||
1078 | spin_lock_irq(&dev_priv->irq_lock); | 1076 | vlv_display_power_well_deinit(dev_priv); |
1079 | valleyview_disable_display_irqs(dev_priv); | ||
1080 | spin_unlock_irq(&dev_priv->irq_lock); | ||
1081 | 1077 | ||
1082 | chv_set_pipe_power_well(dev_priv, power_well, false); | 1078 | chv_set_pipe_power_well(dev_priv, power_well, false); |
1083 | |||
1084 | vlv_power_sequencer_reset(dev_priv); | ||
1085 | } | 1079 | } |
1086 | 1080 | ||
1087 | /** | 1081 | /** |