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authorVille Syrjälä <ville.syrjala@linux.intel.com>2015-06-29 08:25:50 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-07-13 04:42:36 -0400
commit8fcd5cd8b3cb29019937ab4b773da27a37e8e79b (patch)
tree4c9817c666285ded089957cd0406425f4bc93094 /drivers/gpu/drm/i915/intel_runtime_pm.c
parent60bfe44f83c0a9d7293e821c4ddae3770d60acf9 (diff)
drm/i915: Simplify CHV pipe A power well code
The pipe A power well is the "disp2d" well on CHV and pipe B and C wells don't even exist. Thereforce we can remove the checks for pipe A vs. others and just assume it's always pipe A. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_runtime_pm.c47
1 files changed, 20 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 932d96332eca..1bd947ad2163 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1042,53 +1042,46 @@ out:
1042static void chv_pipe_power_well_sync_hw(struct drm_i915_private *dev_priv, 1042static void chv_pipe_power_well_sync_hw(struct drm_i915_private *dev_priv,
1043 struct i915_power_well *power_well) 1043 struct i915_power_well *power_well)
1044{ 1044{
1045 WARN_ON_ONCE(power_well->data != PIPE_A);
1046
1045 chv_set_pipe_power_well(dev_priv, power_well, power_well->count > 0); 1047 chv_set_pipe_power_well(dev_priv, power_well, power_well->count > 0);
1046} 1048}
1047 1049
1048static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv, 1050static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv,
1049 struct i915_power_well *power_well) 1051 struct i915_power_well *power_well)
1050{ 1052{
1051 WARN_ON_ONCE(power_well->data != PIPE_A && 1053 WARN_ON_ONCE(power_well->data != PIPE_A);
1052 power_well->data != PIPE_B &&
1053 power_well->data != PIPE_C);
1054 1054
1055 chv_set_pipe_power_well(dev_priv, power_well, true); 1055 chv_set_pipe_power_well(dev_priv, power_well, true);
1056 1056
1057 if (power_well->data == PIPE_A) { 1057 spin_lock_irq(&dev_priv->irq_lock);
1058 spin_lock_irq(&dev_priv->irq_lock); 1058 valleyview_enable_display_irqs(dev_priv);
1059 valleyview_enable_display_irqs(dev_priv); 1059 spin_unlock_irq(&dev_priv->irq_lock);
1060 spin_unlock_irq(&dev_priv->irq_lock);
1061 1060
1062 /* 1061 /*
1063 * During driver initialization/resume we can avoid restoring the 1062 * During driver initialization/resume we can avoid restoring the
1064 * part of the HW/SW state that will be inited anyway explicitly. 1063 * part of the HW/SW state that will be inited anyway explicitly.
1065 */ 1064 */
1066 if (dev_priv->power_domains.initializing) 1065 if (dev_priv->power_domains.initializing)
1067 return; 1066 return;
1068 1067
1069 intel_hpd_init(dev_priv); 1068 intel_hpd_init(dev_priv);
1070 1069
1071 i915_redisable_vga_power_on(dev_priv->dev); 1070 i915_redisable_vga_power_on(dev_priv->dev);
1072 }
1073} 1071}
1074 1072
1075static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, 1073static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
1076 struct i915_power_well *power_well) 1074 struct i915_power_well *power_well)
1077{ 1075{
1078 WARN_ON_ONCE(power_well->data != PIPE_A && 1076 WARN_ON_ONCE(power_well->data != PIPE_A);
1079 power_well->data != PIPE_B && 1077
1080 power_well->data != PIPE_C); 1078 spin_lock_irq(&dev_priv->irq_lock);
1081 1079 valleyview_disable_display_irqs(dev_priv);
1082 if (power_well->data == PIPE_A) { 1080 spin_unlock_irq(&dev_priv->irq_lock);
1083 spin_lock_irq(&dev_priv->irq_lock);
1084 valleyview_disable_display_irqs(dev_priv);
1085 spin_unlock_irq(&dev_priv->irq_lock);
1086 }
1087 1081
1088 chv_set_pipe_power_well(dev_priv, power_well, false); 1082 chv_set_pipe_power_well(dev_priv, power_well, false);
1089 1083
1090 if (power_well->data == PIPE_A) 1084 vlv_power_sequencer_reset(dev_priv);
1091 vlv_power_sequencer_reset(dev_priv);
1092} 1085}
1093 1086
1094/** 1087/**