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authorLucas De Marchi <lucas.demarchi@intel.com>2018-12-12 13:10:43 -0500
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-12-12 19:52:10 -0500
commitcf819eff907ab49205ece97c96baeb909fd36f4d (patch)
treea72b69e1d0c1a188db876edccafcf04612133132 /drivers/gpu/drm/i915/intel_fifo_underrun.c
parent006900087727f675e9367eb3c3e054912ddbffdd (diff)
drm/i915: replace IS_GEN<N> with IS_GEN(..., N)
Define IS_GEN() similarly to our IS_GEN_RANGE(). but use gen instead of gen_mask to do the comparison. Now callers can pass then gen as a parameter, so we don't require one macro for each gen. The following spatch was used to convert the users of these macros: @@ expression e; @@ ( - IS_GEN2(e) + IS_GEN(e, 2) | - IS_GEN3(e) + IS_GEN(e, 3) | - IS_GEN4(e) + IS_GEN(e, 4) | - IS_GEN5(e) + IS_GEN(e, 5) | - IS_GEN6(e) + IS_GEN(e, 6) | - IS_GEN7(e) + IS_GEN(e, 7) | - IS_GEN8(e) + IS_GEN(e, 8) | - IS_GEN9(e) + IS_GEN(e, 9) | - IS_GEN10(e) + IS_GEN(e, 10) | - IS_GEN11(e) + IS_GEN(e, 11) ) v2: use IS_GEN rather than GT_GEN and compare to info.gen rather than using the bitmask Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181212181044.15886-2-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_fifo_underrun.c')
-rw-r--r--drivers/gpu/drm/i915/intel_fifo_underrun.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
index 77c123cc8817..ff2743ccbece 100644
--- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
@@ -260,9 +260,9 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
260 260
261 if (HAS_GMCH_DISPLAY(dev_priv)) 261 if (HAS_GMCH_DISPLAY(dev_priv))
262 i9xx_set_fifo_underrun_reporting(dev, pipe, enable, old); 262 i9xx_set_fifo_underrun_reporting(dev, pipe, enable, old);
263 else if (IS_GEN5(dev_priv) || IS_GEN6(dev_priv)) 263 else if (IS_GEN(dev_priv, 5) || IS_GEN(dev_priv, 6))
264 ironlake_set_fifo_underrun_reporting(dev, pipe, enable); 264 ironlake_set_fifo_underrun_reporting(dev, pipe, enable);
265 else if (IS_GEN7(dev_priv)) 265 else if (IS_GEN(dev_priv, 7))
266 ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old); 266 ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
267 else if (INTEL_GEN(dev_priv) >= 8) 267 else if (INTEL_GEN(dev_priv) >= 8)
268 broadwell_set_fifo_underrun_reporting(dev, pipe, enable); 268 broadwell_set_fifo_underrun_reporting(dev, pipe, enable);
@@ -423,7 +423,7 @@ void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv)
423 423
424 if (HAS_GMCH_DISPLAY(dev_priv)) 424 if (HAS_GMCH_DISPLAY(dev_priv))
425 i9xx_check_fifo_underruns(crtc); 425 i9xx_check_fifo_underruns(crtc);
426 else if (IS_GEN7(dev_priv)) 426 else if (IS_GEN(dev_priv, 7))
427 ivybridge_check_fifo_underruns(crtc); 427 ivybridge_check_fifo_underruns(crtc);
428 } 428 }
429 429