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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-03-02 23:09:08 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-03-02 23:09:08 -0500
commit13df7977431e3b906a23bb75f29e0f40a8d73f87 (patch)
treebc2c78c3b816a65f90c31cccebdc15b38352c045 /drivers/gpu/drm/i915/intel_display.c
parent6d8b3e1ad3d3815d9c87b8553493301e243af76a (diff)
parent0414855fdc4a40da05221fc6062cccbc0c30f169 (diff)
Merge 3.14-rc5 into driver-core-next
We want the fixes in here.
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9fa24347963a..4c1672809493 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8586,6 +8586,20 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
8586 if (ring->id == RCS) 8586 if (ring->id == RCS)
8587 len += 6; 8587 len += 6;
8588 8588
8589 /*
8590 * BSpec MI_DISPLAY_FLIP for IVB:
8591 * "The full packet must be contained within the same cache line."
8592 *
8593 * Currently the LRI+SRM+MI_DISPLAY_FLIP all fit within the same
8594 * cacheline, if we ever start emitting more commands before
8595 * the MI_DISPLAY_FLIP we may need to first emit everything else,
8596 * then do the cacheline alignment, and finally emit the
8597 * MI_DISPLAY_FLIP.
8598 */
8599 ret = intel_ring_cacheline_align(ring);
8600 if (ret)
8601 goto err_unpin;
8602
8589 ret = intel_ring_begin(ring, len); 8603 ret = intel_ring_begin(ring, len);
8590 if (ret) 8604 if (ret)
8591 goto err_unpin; 8605 goto err_unpin;