aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_crt.c
diff options
context:
space:
mode:
authorLucas De Marchi <lucas.demarchi@intel.com>2018-12-12 13:10:43 -0500
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-12-12 19:52:10 -0500
commitcf819eff907ab49205ece97c96baeb909fd36f4d (patch)
treea72b69e1d0c1a188db876edccafcf04612133132 /drivers/gpu/drm/i915/intel_crt.c
parent006900087727f675e9367eb3c3e054912ddbffdd (diff)
drm/i915: replace IS_GEN<N> with IS_GEN(..., N)
Define IS_GEN() similarly to our IS_GEN_RANGE(). but use gen instead of gen_mask to do the comparison. Now callers can pass then gen as a parameter, so we don't require one macro for each gen. The following spatch was used to convert the users of these macros: @@ expression e; @@ ( - IS_GEN2(e) + IS_GEN(e, 2) | - IS_GEN3(e) + IS_GEN(e, 3) | - IS_GEN4(e) + IS_GEN(e, 4) | - IS_GEN5(e) + IS_GEN(e, 5) | - IS_GEN6(e) + IS_GEN(e, 6) | - IS_GEN7(e) + IS_GEN(e, 7) | - IS_GEN8(e) + IS_GEN(e, 8) | - IS_GEN9(e) + IS_GEN(e, 9) | - IS_GEN10(e) + IS_GEN(e, 10) | - IS_GEN11(e) + IS_GEN(e, 11) ) v2: use IS_GEN rather than GT_GEN and compare to info.gen rather than using the bitmask Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181212181044.15886-2-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 68f2fb89ece3..bf4fd739b68c 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -322,7 +322,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
322 * DAC limit supposedly 355 MHz. 322 * DAC limit supposedly 355 MHz.
323 */ 323 */
324 max_clock = 270000; 324 max_clock = 270000;
325 else if (IS_GEN3(dev_priv) || IS_GEN4(dev_priv)) 325 else if (IS_GEN(dev_priv, 3) || IS_GEN(dev_priv, 4))
326 max_clock = 400000; 326 max_clock = 400000;
327 else 327 else
328 max_clock = 350000; 328 max_clock = 350000;
@@ -666,7 +666,7 @@ intel_crt_load_detect(struct intel_crt *crt, uint32_t pipe)
666 /* Set the border color to purple. */ 666 /* Set the border color to purple. */
667 I915_WRITE(bclrpat_reg, 0x500050); 667 I915_WRITE(bclrpat_reg, 0x500050);
668 668
669 if (!IS_GEN2(dev_priv)) { 669 if (!IS_GEN(dev_priv, 2)) {
670 uint32_t pipeconf = I915_READ(pipeconf_reg); 670 uint32_t pipeconf = I915_READ(pipeconf_reg);
671 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); 671 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
672 POSTING_READ(pipeconf_reg); 672 POSTING_READ(pipeconf_reg);
@@ -981,7 +981,7 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
981 else 981 else
982 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 982 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
983 983
984 if (IS_GEN2(dev_priv)) 984 if (IS_GEN(dev_priv, 2))
985 connector->interlace_allowed = 0; 985 connector->interlace_allowed = 0;
986 else 986 else
987 connector->interlace_allowed = 1; 987 connector->interlace_allowed = 1;