Merge tag 'drm-for-v4.15-amd-dc' of git://people.freedesktop.org/~airlied/linux

Pull amdgpu DC display code for Vega from Dave Airlie:
 "This is the pull request for the AMD DC (display code) layer which is
  a requirement to program the display engines on the new Vega and Raven
  based GPUs. It also contains support for all amdgpu supported GPUs
  (CIK, VI, Polaris), which has to be enabled. It is also a kms atomic
  modesetting compatible driver (unlike the current in-tree display
  code).

  I've kept it separate from drm-next because it may have some things
  that cause you to reject it.

  Background story:

  AMD have an internal team creating a shared OS codebase for display at
  hw bring up time using information from their hardware teams. This
  process doesn't lead to the most Linux friendly/looking code but we
  have worked together on cleaning a lot of it up and dealing with
  sparse/smatch/checkpatch, and having their team internally adhere to
  Linux coding standards.

  This tree is a complete history rebased since they started opening it,
  we decided not to squash it down as the history may have some value.
  Some of the commits therefore might not reach kernel standards, and we
  are steadily training people in AMD to better write commit msgs.

  There is a major bunch of generated bandwidth calculation and
  verification code that comes from their hardware team. On Vega and
  before this is float calculations, on Raven (DCN10) this is double
  based. They do the required things to do FP in the kernel, and I could
  understand this might raise some issues. Rewriting the bandwidth would
  be a major undertaken in reverification, it's non-trivial to work out
  if a display can handle the complete set of mode information thrown at
  it.

  Future story:

  There is a TODO list with this, and it address most of the remaining
  things that would be nice to refine/remove. The DCN10 code is still
  under development internally and they push out a lot of patches quite
  regularly and are supporting this code base with their display team. I
  think we've reached the point where keeping it out of tree is going to
  motivate distributions to start carrying the code, so I'd prefer we
  get it in tree. I think this code is slightly better than STAGING
  quality but not massively so, I'd really like to see that float/double
  magic gone and fixed point used, but AMD don't seem to think the
  accuracy and revalidation of the code is worth the effort"

* tag 'drm-for-v4.15-amd-dc' of git://people.freedesktop.org/~airlied/linux: (1110 commits)
  drm/amd/display: fix MST link training fail division by 0
  drm/amd/display: Fix formatting for null pointer dereference fix
  drm/amd/display: Remove dangling planes on dc commit state
  drm/amd/display: add flip_immediate to commit update for stream
  drm/amd/display: Miss register MST encoder cbs
  drm/amd/display: Fix warnings on S3 resume
  drm/amd/display: use num_timing_generator instead of pipe_count
  drm/amd/display: use configurable FBC option in dm
  drm/amd/display: fix AZ clock not enabled before program AZ endpoint
  amdgpu/dm: Don't use DRM_ERROR in amdgpu_dm_atomic_check
  amd/display: Fix potential null dereference in dce_calcs.c
  amdgpu/dm: Remove unused forward declaration
  drm/amdgpu: Remove unused dc_stream from amdgpu_crtc
  amdgpu/dc: Fix double unlock in amdgpu_dm_commit_planes
  amdgpu/dc: Fix missing null checks in amdgpu_dm.c
  amdgpu/dc: Fix potential null dereferences in amdgpu_dm.c
  amdgpu/dc: fix more indentation warnings
  amdgpu/dc: handle allocation failures in dc_commit_planes_to_stream.
  amdgpu/dc: fix indentation warning from smatch.
  amdgpu/dc: fix non-ansi function decls.
  ...

17 files changed, 376 insertions, 75 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/Kconfig b/drivers/gpu/drm/amd/amdgpu/Kconfig
index 26682454a446..e8af1f5e8a79 100644
--- a/drivers/gpu/drm/amd/amdgpu/Kconfig
+++ b/drivers/gpu/drm/amd/amdgpu/Kconfig
@@ -41,3 +41,4 @@ config DRM_AMDGPU_GART_DEBUGFS
           pages. Uses more memory for housekeeping, enable only for debugging.
 
 source "drivers/gpu/drm/amd/acp/Kconfig"
+source "drivers/gpu/drm/amd/display/Kconfig"
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index 7fc42e077770..78d609123420 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -4,13 +4,19 @@
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
 
 FULL_AMD_PATH=$(src)/..
+DISPLAY_FOLDER_NAME=display
+FULL_AMD_DISPLAY_PATH = $(FULL_AMD_PATH)/$(DISPLAY_FOLDER_NAME)
 
 ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
         -I$(FULL_AMD_PATH)/include \
         -I$(FULL_AMD_PATH)/amdgpu \
         -I$(FULL_AMD_PATH)/scheduler \
         -I$(FULL_AMD_PATH)/powerplay/inc \
-        -I$(FULL_AMD_PATH)/acp/include
+        -I$(FULL_AMD_PATH)/acp/include \
+        -I$(FULL_AMD_DISPLAY_PATH) \
+        -I$(FULL_AMD_DISPLAY_PATH)/include \
+        -I$(FULL_AMD_DISPLAY_PATH)/dc \
+        -I$(FULL_AMD_DISPLAY_PATH)/amdgpu_dm
 
 amdgpu-y := amdgpu_drv.o
 
@@ -133,4 +139,13 @@ include $(FULL_AMD_PATH)/powerplay/Makefile
 
 amdgpu-y += $(AMD_POWERPLAY_FILES)
 
+ifneq ($(CONFIG_DRM_AMD_DC),)
+
+RELATIVE_AMD_DISPLAY_PATH = ../$(DISPLAY_FOLDER_NAME)
+include $(FULL_AMD_DISPLAY_PATH)/Makefile
+
+amdgpu-y += $(AMD_DISPLAY_FILES)
+
+endif
+
 obj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index cbcb6a153aba..5afaf6016b4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -66,6 +66,7 @@
 #include "amdgpu_vce.h"
 #include "amdgpu_vcn.h"
 #include "amdgpu_mn.h"
+#include "amdgpu_dm.h"
 
 #include "gpu_scheduler.h"
 #include "amdgpu_virt.h"
@@ -101,6 +102,8 @@ extern int amdgpu_vm_fragment_size;
 extern int amdgpu_vm_fault_stop;
 extern int amdgpu_vm_debug;
 extern int amdgpu_vm_update_mode;
+extern int amdgpu_dc;
+extern int amdgpu_dc_log;
 extern int amdgpu_sched_jobs;
 extern int amdgpu_sched_hw_submission;
 extern int amdgpu_no_evict;
@@ -1535,6 +1538,7 @@ struct amdgpu_device {
         /* display */
         bool                            enable_virtual_display;
         struct amdgpu_mode_info         mode_info;
+        /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */
         struct work_struct              hotplug_work;
         struct amdgpu_irq_src           crtc_irq;
         struct amdgpu_irq_src           pageflip_irq;
@@ -1590,6 +1594,9 @@ struct amdgpu_device {
         /* GDS */
         struct amdgpu_gds               gds;
 
+        /* display related functionality */
+        struct amdgpu_display_manager dm;
+
         struct amdgpu_ip_block          ip_blocks[AMDGPU_MAX_IP_NUM];
         int                             num_ip_blocks;
         struct mutex    mn_lock;
@@ -1653,6 +1660,9 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);
 u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index);
 void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v);
 
+bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
+bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
+
 /*
  * Registers read & write functions.
  */
@@ -1911,5 +1921,11 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
                            uint64_t addr, struct amdgpu_bo **bo,
                            struct amdgpu_bo_va_mapping **mapping);
 
+#if defined(CONFIG_DRM_AMD_DC)
+int amdgpu_dm_display_resume(struct amdgpu_device *adev );
+#else
+static inline int amdgpu_dm_display_resume(struct amdgpu_device *adev) { return 0; }
+#endif
+
 #include "amdgpu_object.h"
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index a7afe553e0a1..f2b72c7c6857 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -911,10 +911,6 @@ static int amdgpu_cgs_get_active_displays_info(struct cgs_device *cgs_device,
                                           struct cgs_display_info *info)
 {
         CGS_FUNC_ADEV;
-        struct amdgpu_crtc *amdgpu_crtc;
-        struct drm_device *ddev = adev->ddev;
-        struct drm_crtc *crtc;
-        uint32_t line_time_us, vblank_lines;
         struct cgs_mode_info *mode_info;
 
         if (info == NULL)
@@ -928,30 +924,43 @@ static int amdgpu_cgs_get_active_displays_info(struct cgs_device *cgs_device,
                 mode_info->ref_clock = adev->clock.spll.reference_freq;
         }
 
-        if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
-                list_for_each_entry(crtc,
-                                &ddev->mode_config.crtc_list, head) {
-                        amdgpu_crtc = to_amdgpu_crtc(crtc);
-                        if (crtc->enabled) {
-                                info->active_display_mask |= (1 << amdgpu_crtc->crtc_id);
-                                info->display_count++;
-                        }
-                        if (mode_info != NULL &&
-                                crtc->enabled && amdgpu_crtc->enabled &&
-                                amdgpu_crtc->hw_mode.clock) {
-                                line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) /
-                                                        amdgpu_crtc->hw_mode.clock;
-                                vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end -
-                                                        amdgpu_crtc->hw_mode.crtc_vdisplay +
-                                                        (amdgpu_crtc->v_border * 2);
-                                mode_info->vblank_time_us = vblank_lines * line_time_us;
-                                mode_info->refresh_rate = drm_mode_vrefresh(&amdgpu_crtc->hw_mode);
-                                mode_info->ref_clock = adev->clock.spll.reference_freq;
-                                mode_info = NULL;
+        if (!amdgpu_device_has_dc_support(adev)) {
+                struct amdgpu_crtc *amdgpu_crtc;
+                struct drm_device *ddev = adev->ddev;
+                struct drm_crtc *crtc;
+                uint32_t line_time_us, vblank_lines;
+
+                if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
+                        list_for_each_entry(crtc,
+                                        &ddev->mode_config.crtc_list, head) {
+                                amdgpu_crtc = to_amdgpu_crtc(crtc);
+                                if (crtc->enabled) {
+                                        info->active_display_mask |= (1 << amdgpu_crtc->crtc_id);
+                                        info->display_count++;
+                                }
+                                if (mode_info != NULL &&
+                                        crtc->enabled && amdgpu_crtc->enabled &&
+                                        amdgpu_crtc->hw_mode.clock) {
+                                        line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) /
+                                                                amdgpu_crtc->hw_mode.clock;
+                                        vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end -
+                                                                amdgpu_crtc->hw_mode.crtc_vdisplay +
+                                                                (amdgpu_crtc->v_border * 2);
+                                        mode_info->vblank_time_us = vblank_lines * line_time_us;
+                                        mode_info->refresh_rate = drm_mode_vrefresh(&amdgpu_crtc->hw_mode);
+                                        mode_info->ref_clock = adev->clock.spll.reference_freq;
+                                        mode_info = NULL;
+                                }
                         }
                 }
+        } else {
+                info->display_count = adev->pm.pm_display_cfg.num_display;
+                if (mode_info != NULL) {
+                        mode_info->vblank_time_us = adev->pm.pm_display_cfg.min_vblank_time;
+                        mode_info->refresh_rate = adev->pm.pm_display_cfg.vrefresh;
+                        mode_info->ref_clock = adev->clock.spll.reference_freq;
+                }
         }
-
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index efcacb827de7..2d792cdc094c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -31,6 +31,7 @@
 #include <linux/debugfs.h>
 #include <drm/drmP.h>
 #include <drm/drm_crtc_helper.h>
+#include <drm/drm_atomic_helper.h>
 #include <drm/amdgpu_drm.h>
 #include <linux/vgaarb.h>
 #include <linux/vga_switcheroo.h>
@@ -2046,6 +2047,52 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
         }
 }
 
+bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
+{
+        switch (asic_type) {
+#if defined(CONFIG_DRM_AMD_DC)
+        case CHIP_BONAIRE:
+        case CHIP_HAWAII:
+        case CHIP_KAVERI:
+        case CHIP_CARRIZO:
+        case CHIP_STONEY:
+        case CHIP_POLARIS11:
+        case CHIP_POLARIS10:
+        case CHIP_POLARIS12:
+        case CHIP_TONGA:
+        case CHIP_FIJI:
+#if defined(CONFIG_DRM_AMD_DC_PRE_VEGA)
+                return amdgpu_dc != 0;
+#endif
+        case CHIP_KABINI:
+        case CHIP_MULLINS:
+                return amdgpu_dc > 0;
+        case CHIP_VEGA10:
+#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
+        case CHIP_RAVEN:
+#endif
+                return amdgpu_dc != 0;
+#endif
+        default:
+                return false;
+        }
+}
+
+/**
+ * amdgpu_device_has_dc_support - check if dc is supported
+ *
+ * @adev: amdgpu_device_pointer
+ *
+ * Returns true for supported, false for not supported
+ */
+bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
+{
+        if (amdgpu_sriov_vf(adev))
+                return false;
+
+        return amdgpu_device_asic_has_dc_support(adev->asic_type);
+}
+
 /**
  * amdgpu_device_init - initialize the driver
  *
@@ -2100,7 +2147,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
         adev->audio_endpt_rreg = &amdgpu_block_invalid_rreg;
         adev->audio_endpt_wreg = &amdgpu_block_invalid_wreg;
 
-
         DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X).\n",
                  amdgpu_asic_name[adev->asic_type], pdev->vendor, pdev->device,
                  pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
@@ -2242,7 +2288,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
                         goto failed;
                 }
                 /* init i2c buses */
-                amdgpu_atombios_i2c_init(adev);
+                if (!amdgpu_device_has_dc_support(adev))
+                        amdgpu_atombios_i2c_init(adev);
         }
 
         /* Fence driver */
@@ -2378,7 +2425,8 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
         adev->accel_working = false;
         cancel_delayed_work_sync(&adev->late_init_work);
         /* free i2c buses */
-        amdgpu_i2c_fini(adev);
+        if (!amdgpu_device_has_dc_support(adev))
+                amdgpu_i2c_fini(adev);
         amdgpu_atombios_fini(adev);
         kfree(adev->bios);
         adev->bios = NULL;
@@ -2429,12 +2477,14 @@ int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon)
 
         drm_kms_helper_poll_disable(dev);
 
-        /* turn off display hw */
-        drm_modeset_lock_all(dev);
-        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-                drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
+        if (!amdgpu_device_has_dc_support(adev)) {
+                /* turn off display hw */
+                drm_modeset_lock_all(dev);
+                list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                        drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
+                }
+                drm_modeset_unlock_all(dev);
         }
-        drm_modeset_unlock_all(dev);
 
         amdgpu_amdkfd_suspend(adev);
 
@@ -2577,13 +2627,25 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
 
         /* blat the mode back in */
         if (fbcon) {
-                drm_helper_resume_force_mode(dev);
-                /* turn on display hw */
-                drm_modeset_lock_all(dev);
-                list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-                        drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
+                if (!amdgpu_device_has_dc_support(adev)) {
+                        /* pre DCE11 */
+                        drm_helper_resume_force_mode(dev);
+
+                        /* turn on display hw */
+                        drm_modeset_lock_all(dev);
+                        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                                drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
+                        }
+                        drm_modeset_unlock_all(dev);
+                } else {
+                        /*
+                         * There is no equivalent atomic helper to turn on
+                         * display, so we defined our own function for this,
+                         * once suspend resume is supported by the atomic
+                         * framework this will be reworked
+                         */
+                        amdgpu_dm_display_resume(adev);
                 }
-                drm_modeset_unlock_all(dev);
         }
 
         drm_kms_helper_poll_enable(dev);
@@ -2600,7 +2662,10 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
 #ifdef CONFIG_PM
         dev->dev->power.disable_depth++;
 #endif
-        drm_helper_hpd_irq_event(dev);
+        if (!amdgpu_device_has_dc_support(adev))
+                drm_helper_hpd_irq_event(dev);
+        else
+                drm_kms_helper_hotplug_event(dev);
 #ifdef CONFIG_PM
         dev->dev->power.disable_depth--;
 #endif
@@ -2900,6 +2965,7 @@ give_up_reset:
  */
 int amdgpu_gpu_reset(struct amdgpu_device *adev)
 {
+        struct drm_atomic_state *state = NULL;
         int i, r;
         int resched;
         bool need_full_reset, vram_lost = false;
@@ -2913,6 +2979,9 @@ int amdgpu_gpu_reset(struct amdgpu_device *adev)
 
         /* block TTM */
         resched = ttm_bo_lock_delayed_workqueue(&adev->mman.bdev);
+        /* store modesetting */
+        if (amdgpu_device_has_dc_support(adev))
+                state = drm_atomic_helper_suspend(adev->ddev);
 
         /* block scheduler */
         for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
@@ -3029,7 +3098,11 @@ out:
                 }
         }
 
-        drm_helper_resume_force_mode(adev->ddev);
+        if (amdgpu_device_has_dc_support(adev)) {
+                r = drm_atomic_helper_resume(adev->ddev, state);
+                amdgpu_dm_display_resume(adev);
+        } else
+                drm_helper_resume_force_mode(adev->ddev);
 
         ttm_bo_unlock_delayed_workqueue(&adev->mman.bdev, resched);
         if (r) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 6ad243293a78..138beb550a58 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -518,7 +518,7 @@ amdgpu_framebuffer_init(struct drm_device *dev,
         return 0;
 }
 
-static struct drm_framebuffer *
+struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
                                struct drm_file *file_priv,
                                const struct drm_mode_fb_cmd2 *mode_cmd)
@@ -556,7 +556,7 @@ amdgpu_user_framebuffer_create(struct drm_device *dev,
         return &amdgpu_fb->base;
 }
 
-static void amdgpu_output_poll_changed(struct drm_device *dev)
+void amdgpu_output_poll_changed(struct drm_device *dev)
 {
         struct amdgpu_device *adev = dev->dev_private;
         amdgpu_fb_output_poll_changed(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
new file mode 100644
index 000000000000..3cc0ef0c055e
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#ifndef __AMDGPU_DISPLAY_H__
+#define __AMDGPU_DISPLAY_H__
+
+struct drm_framebuffer *
+amdgpu_user_framebuffer_create(struct drm_device *dev,
+                                                       struct drm_file *file_priv,
+                                                           const struct drm_mode_fb_cmd2 *mode_cmd);
+
+void amdgpu_output_poll_changed(struct drm_device *dev);
+
+#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index 7279fb5c3abc..56caaeee6fea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -433,7 +433,7 @@ struct amdgpu_pm {
         uint32_t                fw_version;
         uint32_t                pcie_gen_mask;
         uint32_t                pcie_mlw_mask;
-        struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */
+        struct amd_pp_display_configuration pm_display_cfg;/* set by dc */
 };
 
 #define R600_SSTU_DFLT                               0
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index dd2f060d62a8..ec96bb1f9eaf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -106,6 +106,8 @@ int amdgpu_vm_debug = 0;
 int amdgpu_vram_page_split = 512;
 int amdgpu_vm_update_mode = -1;
 int amdgpu_exp_hw_support = 0;
+int amdgpu_dc = -1;
+int amdgpu_dc_log = 0;
 int amdgpu_sched_jobs = 32;
 int amdgpu_sched_hw_submission = 2;
 int amdgpu_no_evict = 0;
@@ -211,6 +213,12 @@ module_param_named(vram_page_split, amdgpu_vram_page_split, int, 0444);
 MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");
 module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444);
 
+MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");
+module_param_named(dc, amdgpu_dc, int, 0444);
+
+MODULE_PARM_DESC(dc, "Display Core Log Level (0 = minimal (default), 1 = chatty");
+module_param_named(dc_log, amdgpu_dc_log, int, 0444);
+
 MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw queue (default 32)");
 module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444);
 
@@ -518,15 +526,15 @@ static const struct pci_device_id pciidlist[] = {
         {0x1002, 0x6997, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
         {0x1002, 0x699F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
         /* Vega 10 */
-        {0x1002, 0x6860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x6861, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x6862, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x6863, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x6864, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x6867, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
-        {0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10|AMD_EXP_HW_SUPPORT},
+        {0x1002, 0x6860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x6861, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x6862, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x6863, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x6864, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x6867, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
+        {0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
         /* Raven */
         {0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU|AMD_EXP_HW_SUPPORT},
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 562930b17a6d..90fa8e8bc6fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -42,11 +42,6 @@
    this contains a helper + a amdgpu fb
    the helper contains a pointer to amdgpu framebuffer baseclass.
 */
-struct amdgpu_fbdev {
-        struct drm_fb_helper helper;
-        struct amdgpu_framebuffer rfb;
-        struct amdgpu_device *adev;
-};
 
 static int
 amdgpufb_open(struct fb_info *info, int user)
@@ -353,7 +348,8 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
         drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
 
         /* disable all the possible outputs/crtcs before entering KMS mode */
-        drm_helper_disable_unused_functions(adev->ddev);
+        if (!amdgpu_device_has_dc_support(adev))
+                drm_helper_disable_unused_functions(adev->ddev);
 
         drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
         return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 538e5f27d120..47c5ce9807db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -37,6 +37,10 @@
 
 #include <linux/pm_runtime.h>
 
+#ifdef CONFIG_DRM_AMD_DC
+#include "amdgpu_dm_irq.h"
+#endif
+
 #define AMDGPU_WAIT_IDLE_TIMEOUT 200
 
 /*
@@ -221,15 +225,6 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
 
         spin_lock_init(&adev->irq.lock);
 
-        if (!adev->enable_virtual_display)
-                /* Disable vblank irqs aggressively for power-saving */
-                adev->ddev->vblank_disable_immediate = true;
-
-        r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc);
-        if (r) {
-                return r;
-        }
-
         /* enable msi */
         adev->irq.msi_enabled = false;
 
@@ -241,7 +236,21 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
                 }
         }
 
-        INIT_WORK(&adev->hotplug_work, amdgpu_hotplug_work_func);
+        if (!amdgpu_device_has_dc_support(adev)) {
+                if (!adev->enable_virtual_display)
+                        /* Disable vblank irqs aggressively for power-saving */
+                        /* XXX: can this be enabled for DC? */
+                        adev->ddev->vblank_disable_immediate = true;
+
+                r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc);
+                if (r)
+                        return r;
+
+                /* pre DCE11 */
+                INIT_WORK(&adev->hotplug_work,
+                                amdgpu_hotplug_work_func);
+        }
+
         INIT_WORK(&adev->reset_work, amdgpu_irq_reset_work_func);
 
         adev->irq.installed = true;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 6f0b26dae3b0..720139e182a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1030,7 +1030,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
         DRM_IOCTL_DEF_DRV(AMDGPU_GEM_METADATA, amdgpu_gem_metadata_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
         DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
         DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
-        DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
+        DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl, DRM_AUTH|DRM_RENDER_ALLOW)
 };
 const int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 2af2678ddaf6..ffde1e9666e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -38,11 +38,15 @@
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_fb_helper.h>
 #include <drm/drm_plane_helper.h>
+#include <drm/drm_fb_helper.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 #include <linux/hrtimer.h>
 #include "amdgpu_irq.h"
 
+#include <drm/drm_dp_mst_helper.h>
+#include "modules/inc/mod_freesync.h"
+
 struct amdgpu_bo;
 struct amdgpu_device;
 struct amdgpu_encoder;
@@ -53,9 +57,13 @@ struct amdgpu_hpd;
 #define to_amdgpu_connector(x) container_of(x, struct amdgpu_connector, base)
 #define to_amdgpu_encoder(x) container_of(x, struct amdgpu_encoder, base)
 #define to_amdgpu_framebuffer(x) container_of(x, struct amdgpu_framebuffer, base)
+#define to_amdgpu_plane(x)      container_of(x, struct amdgpu_plane, base)
+
+#define to_dm_plane_state(x)    container_of(x, struct dm_plane_state, base);
 
 #define AMDGPU_MAX_HPD_PINS 6
 #define AMDGPU_MAX_CRTCS 6
+#define AMDGPU_MAX_PLANES 6
 #define AMDGPU_MAX_AFMT_BLOCKS 9
 
 enum amdgpu_rmx_type {
@@ -292,6 +300,30 @@ struct amdgpu_display_funcs {
                               uint16_t connector_object_id,
                               struct amdgpu_hpd *hpd,
                               struct amdgpu_router *router);
+        /* it is used to enter or exit into free sync mode */
+        int (*notify_freesync)(struct drm_device *dev, void *data,
+                               struct drm_file *filp);
+        /* it is used to allow enablement of freesync mode */
+        int (*set_freesync_property)(struct drm_connector *connector,
+                                     struct drm_property *property,
+                                     uint64_t val);
+
+
+};
+
+struct amdgpu_framebuffer {
+        struct drm_framebuffer base;
+        struct drm_gem_object *obj;
+
+        /* caching for later use */
+        uint64_t address;
+};
+
+struct amdgpu_fbdev {
+        struct drm_fb_helper helper;
+        struct amdgpu_framebuffer rfb;
+        struct list_head fbdev_list;
+        struct amdgpu_device *adev;
 };
 
 struct amdgpu_mode_info {
@@ -299,6 +331,7 @@ struct amdgpu_mode_info {
         struct card_info *atom_card_info;
         bool mode_config_initialized;
         struct amdgpu_crtc *crtcs[AMDGPU_MAX_CRTCS];
+        struct amdgpu_plane *planes[AMDGPU_MAX_PLANES];
         struct amdgpu_afmt *afmt[AMDGPU_MAX_AFMT_BLOCKS];
         /* DVI-I properties */
         struct drm_property *coherent_mode_property;
@@ -328,6 +361,7 @@ struct amdgpu_mode_info {
         int                     num_dig; /* number of dig blocks */
         int                     disp_priority;
         const struct amdgpu_display_funcs *funcs;
+        const enum drm_plane_type *plane_type;
 };
 
 #define AMDGPU_MAX_BL_LEVEL 0xFF
@@ -400,6 +434,14 @@ struct amdgpu_crtc {
         /* for virtual dce */
         struct hrtimer vblank_timer;
         enum amdgpu_interrupt_state vsync_timer_enabled;
+
+        int otg_inst;
+        struct drm_pending_vblank_event *event;
+};
+
+struct amdgpu_plane {
+        struct drm_plane base;
+        enum drm_plane_type plane_type;
 };
 
 struct amdgpu_encoder_atom_dig {
@@ -489,6 +531,19 @@ enum amdgpu_connector_dither {
         AMDGPU_FMT_DITHER_ENABLE = 1,
 };
 
+struct amdgpu_dm_dp_aux {
+        struct drm_dp_aux aux;
+        struct ddc_service *ddc_service;
+};
+
+struct amdgpu_i2c_adapter {
+        struct i2c_adapter base;
+
+        struct ddc_service *ddc_service;
+};
+
+#define TO_DM_AUX(x) container_of((x), struct amdgpu_dm_dp_aux, aux)
+
 struct amdgpu_connector {
         struct drm_connector base;
         uint32_t connector_id;
@@ -500,6 +555,14 @@ struct amdgpu_connector {
         /* we need to mind the EDID between detect
            and get modes due to analog/digital/tvencoder */
         struct edid *edid;
+        /* number of modes generated from EDID at 'dc_sink' */
+        int num_modes;
+        /* The 'old' sink - before an HPD.
+         * The 'current' sink is in dc_link->sink. */
+        struct dc_sink *dc_sink;
+        struct dc_link *dc_link;
+        struct dc_sink *dc_em_sink;
+        const struct dc_stream *stream;
         void *con_priv;
         bool dac_load_detect;
         bool detected_by_load; /* if the connection status was determined by load */
@@ -510,11 +573,39 @@ struct amdgpu_connector {
         enum amdgpu_connector_audio audio;
         enum amdgpu_connector_dither dither;
         unsigned pixelclock_for_modeset;
+
+        struct drm_dp_mst_topology_mgr mst_mgr;
+        struct amdgpu_dm_dp_aux dm_dp_aux;
+        struct drm_dp_mst_port *port;
+        struct amdgpu_connector *mst_port;
+        struct amdgpu_encoder *mst_encoder;
+        struct semaphore mst_sem;
+
+        /* TODO see if we can merge with ddc_bus or make a dm_connector */
+        struct amdgpu_i2c_adapter *i2c;
+
+        /* Monitor range limits */
+        int min_vfreq ;
+        int max_vfreq ;
+        int pixel_clock_mhz;
+
+        /*freesync caps*/
+        struct mod_freesync_caps caps;
+
+        struct mutex hpd_lock;
+
 };
 
-struct amdgpu_framebuffer {
-        struct drm_framebuffer base;
-        struct drm_gem_object *obj;
+/* TODO: start to use this struct and remove same field from base one */
+struct amdgpu_mst_connector {
+        struct amdgpu_connector base;
+
+        struct drm_dp_mst_topology_mgr mst_mgr;
+        struct amdgpu_dm_dp_aux dm_dp_aux;
+        struct drm_dp_mst_port *port;
+        struct amdgpu_connector *mst_port;
+        bool is_mst_connector;
+        struct amdgpu_encoder *mst_encoder;
 };
 
 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index a59e04f3eeba..d6df5728df7f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1466,7 +1466,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
                         list_for_each_entry(crtc,
                                             &ddev->mode_config.crtc_list, head) {
                                 amdgpu_crtc = to_amdgpu_crtc(crtc);
-                                if (crtc->enabled) {
+                                if (amdgpu_crtc->enabled) {
                                         adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
                                         adev->pm.dpm.new_active_crtc_count++;
                                 }
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index 567c4a5cf90c..793b1470284d 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -65,6 +65,7 @@
 #include "oss/oss_2_0_d.h"
 #include "oss/oss_2_0_sh_mask.h"
 
+#include "amdgpu_dm.h"
 #include "amdgpu_amdkfd.h"
 #include "amdgpu_powerplay.h"
 #include "dce_virtual.h"
@@ -1900,6 +1901,10 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display)
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v8_2_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v7_2_ip_block);
@@ -1914,6 +1919,10 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display)
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v8_5_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v7_3_ip_block);
@@ -1928,6 +1937,10 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display)
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v8_1_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v7_1_ip_block);
@@ -1943,6 +1956,10 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display)
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v8_3_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v7_2_ip_block);
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 3ca9d114f630..4e67fe1e7955 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -532,6 +532,12 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
                         amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#else
+#       warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
+#endif
                 amdgpu_ip_block_add(adev, &gfx_v9_0_ip_block);
                 amdgpu_ip_block_add(adev, &sdma_v4_0_ip_block);
                 amdgpu_ip_block_add(adev, &uvd_v7_0_ip_block);
@@ -545,6 +551,12 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#else
+#       warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
+#endif
                 amdgpu_ip_block_add(adev, &gfx_v9_0_ip_block);
                 amdgpu_ip_block_add(adev, &sdma_v4_0_ip_block);
                 amdgpu_ip_block_add(adev, &vcn_v1_0_ip_block);
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f3cfef48aa99..3a4c2fa7e36d 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -77,6 +77,7 @@
 #endif
 #include "dce_virtual.h"
 #include "mxgpu_vi.h"
+#include "amdgpu_dm.h"
 
 /*
  * Indirect registers accessor
@@ -1502,6 +1503,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v10_1_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1518,6 +1523,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v10_0_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1536,6 +1545,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display)
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v11_2_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1550,6 +1563,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display)
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v11_0_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
@@ -1567,6 +1584,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
                 if (adev->enable_virtual_display)
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_ip_block_add(adev, &dm_ip_block);
+#endif
                 else
                         amdgpu_ip_block_add(adev, &dce_v11_0_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v8_1_ip_block);