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authorTom St Denis <tom.stdenis@amd.com>2016-06-03 14:31:46 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-07-07 14:51:19 -0400
commit78f73bf03c131c5428383aa34e273be80965dd06 (patch)
tree59e1b49664ef8a58462dde9f52c261ffe9391af8 /drivers/gpu/drm/amd/amdgpu
parentdad4acc896651979142c85a445862437c197eeaf (diff)
drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index fb656b65b9a6..381d25871a0b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5292,9 +5292,9 @@ static void polaris11_enable_gfx_quick_mg_power_gating(struct amdgpu_device *ade
5292 temp = data = RREG32(mmRLC_PG_CNTL); 5292 temp = data = RREG32(mmRLC_PG_CNTL);
5293 /* Enable quick PG */ 5293 /* Enable quick PG */
5294 if (enable) 5294 if (enable)
5295 data |= 0x100000; 5295 data |= RLC_PG_CNTL__QUICK_PG_ENABLE_MASK;
5296 else 5296 else
5297 data &= ~0x100000; 5297 data &= ~RLC_PG_CNTL__QUICK_PG_ENABLE_MASK;
5298 5298
5299 if (temp != data) 5299 if (temp != data)
5300 WREG32(mmRLC_PG_CNTL, data); 5300 WREG32(mmRLC_PG_CNTL, data);