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authorChristian König <christian.koenig@amd.com>2017-11-03 10:59:25 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-12-06 12:47:21 -0500
commitc47b41a79ab5e8faec9aea6c4a06c4d1e4d1132f (patch)
tree97820364b390c2b55ace5d1d27faf14c1f8193fb /drivers/gpu/drm/amd/amdgpu/vi.c
parent6f16b4fb60011cbc7d4530e112739ea4416c6ea6 (diff)
drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result
Not sure what that should originally been good for, but it doesn't seem to make any sense any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vi.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vi.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 3a4c2fa7e36d..bb8ca9489546 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -284,27 +284,27 @@ static void vi_init_golden_registers(struct amdgpu_device *adev)
284 case CHIP_TOPAZ: 284 case CHIP_TOPAZ:
285 amdgpu_program_register_sequence(adev, 285 amdgpu_program_register_sequence(adev,
286 iceland_mgcg_cgcg_init, 286 iceland_mgcg_cgcg_init,
287 (const u32)ARRAY_SIZE(iceland_mgcg_cgcg_init)); 287 ARRAY_SIZE(iceland_mgcg_cgcg_init));
288 break; 288 break;
289 case CHIP_FIJI: 289 case CHIP_FIJI:
290 amdgpu_program_register_sequence(adev, 290 amdgpu_program_register_sequence(adev,
291 fiji_mgcg_cgcg_init, 291 fiji_mgcg_cgcg_init,
292 (const u32)ARRAY_SIZE(fiji_mgcg_cgcg_init)); 292 ARRAY_SIZE(fiji_mgcg_cgcg_init));
293 break; 293 break;
294 case CHIP_TONGA: 294 case CHIP_TONGA:
295 amdgpu_program_register_sequence(adev, 295 amdgpu_program_register_sequence(adev,
296 tonga_mgcg_cgcg_init, 296 tonga_mgcg_cgcg_init,
297 (const u32)ARRAY_SIZE(tonga_mgcg_cgcg_init)); 297 ARRAY_SIZE(tonga_mgcg_cgcg_init));
298 break; 298 break;
299 case CHIP_CARRIZO: 299 case CHIP_CARRIZO:
300 amdgpu_program_register_sequence(adev, 300 amdgpu_program_register_sequence(adev,
301 cz_mgcg_cgcg_init, 301 cz_mgcg_cgcg_init,
302 (const u32)ARRAY_SIZE(cz_mgcg_cgcg_init)); 302 ARRAY_SIZE(cz_mgcg_cgcg_init));
303 break; 303 break;
304 case CHIP_STONEY: 304 case CHIP_STONEY:
305 amdgpu_program_register_sequence(adev, 305 amdgpu_program_register_sequence(adev,
306 stoney_mgcg_cgcg_init, 306 stoney_mgcg_cgcg_init,
307 (const u32)ARRAY_SIZE(stoney_mgcg_cgcg_init)); 307 ARRAY_SIZE(stoney_mgcg_cgcg_init));
308 break; 308 break;
309 case CHIP_POLARIS11: 309 case CHIP_POLARIS11:
310 case CHIP_POLARIS10: 310 case CHIP_POLARIS10: