diff options
author | Dave Airlie <airlied@redhat.com> | 2018-04-25 21:08:26 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2018-04-25 21:08:26 -0400 |
commit | 8eb8ad52fbc99aa87f1c56db378ee910833ed780 (patch) | |
tree | 94d441bce1af28fa8e027b9a0bfb6329ef825e33 /drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |
parent | d736aa62c291623b4cf71ea57daa6e63047c640e (diff) | |
parent | 7ad35721e7d5a5b56a4eddcdd9920c3c1e51ae4c (diff) |
Merge branch 'drm-fixes-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
- Fix a hang on CZ boards with EDC enabled
- Fix hangs related to DP MST handling
- Fix a deadlock in irq handling in DC
* 'drm-fixes-4.17' of git://people.freedesktop.org/~agd5f/linux:
drm/amd/display: Check dc_sink every time in MST hotplug
drm/amd/display: Update MST edid property every time
drm/amd/display: Don't read EDID in atomic_check
drm/amd/display: Disallow enabling CRTC without primary plane with FB
drm/amd/display: Fix deadlock when flushing irq
drm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index b0e591eaa71a..e14263fca1c9 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |||
@@ -1459,10 +1459,11 @@ static const u32 sgpr_init_compute_shader[] = | |||
1459 | static const u32 vgpr_init_regs[] = | 1459 | static const u32 vgpr_init_regs[] = |
1460 | { | 1460 | { |
1461 | mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0xffffffff, | 1461 | mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0xffffffff, |
1462 | mmCOMPUTE_RESOURCE_LIMITS, 0, | 1462 | mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, /* CU_GROUP_COUNT=1 */ |
1463 | mmCOMPUTE_NUM_THREAD_X, 256*4, | 1463 | mmCOMPUTE_NUM_THREAD_X, 256*4, |
1464 | mmCOMPUTE_NUM_THREAD_Y, 1, | 1464 | mmCOMPUTE_NUM_THREAD_Y, 1, |
1465 | mmCOMPUTE_NUM_THREAD_Z, 1, | 1465 | mmCOMPUTE_NUM_THREAD_Z, 1, |
1466 | mmCOMPUTE_PGM_RSRC1, 0x100004f, /* VGPRS=15 (64 logical VGPRs), SGPRS=1 (16 SGPRs), BULKY=1 */ | ||
1466 | mmCOMPUTE_PGM_RSRC2, 20, | 1467 | mmCOMPUTE_PGM_RSRC2, 20, |
1467 | mmCOMPUTE_USER_DATA_0, 0xedcedc00, | 1468 | mmCOMPUTE_USER_DATA_0, 0xedcedc00, |
1468 | mmCOMPUTE_USER_DATA_1, 0xedcedc01, | 1469 | mmCOMPUTE_USER_DATA_1, 0xedcedc01, |
@@ -1479,10 +1480,11 @@ static const u32 vgpr_init_regs[] = | |||
1479 | static const u32 sgpr1_init_regs[] = | 1480 | static const u32 sgpr1_init_regs[] = |
1480 | { | 1481 | { |
1481 | mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0x0f, | 1482 | mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0x0f, |
1482 | mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, | 1483 | mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, /* CU_GROUP_COUNT=1 */ |
1483 | mmCOMPUTE_NUM_THREAD_X, 256*5, | 1484 | mmCOMPUTE_NUM_THREAD_X, 256*5, |
1484 | mmCOMPUTE_NUM_THREAD_Y, 1, | 1485 | mmCOMPUTE_NUM_THREAD_Y, 1, |
1485 | mmCOMPUTE_NUM_THREAD_Z, 1, | 1486 | mmCOMPUTE_NUM_THREAD_Z, 1, |
1487 | mmCOMPUTE_PGM_RSRC1, 0x240, /* SGPRS=9 (80 GPRS) */ | ||
1486 | mmCOMPUTE_PGM_RSRC2, 20, | 1488 | mmCOMPUTE_PGM_RSRC2, 20, |
1487 | mmCOMPUTE_USER_DATA_0, 0xedcedc00, | 1489 | mmCOMPUTE_USER_DATA_0, 0xedcedc00, |
1488 | mmCOMPUTE_USER_DATA_1, 0xedcedc01, | 1490 | mmCOMPUTE_USER_DATA_1, 0xedcedc01, |
@@ -1503,6 +1505,7 @@ static const u32 sgpr2_init_regs[] = | |||
1503 | mmCOMPUTE_NUM_THREAD_X, 256*5, | 1505 | mmCOMPUTE_NUM_THREAD_X, 256*5, |
1504 | mmCOMPUTE_NUM_THREAD_Y, 1, | 1506 | mmCOMPUTE_NUM_THREAD_Y, 1, |
1505 | mmCOMPUTE_NUM_THREAD_Z, 1, | 1507 | mmCOMPUTE_NUM_THREAD_Z, 1, |
1508 | mmCOMPUTE_PGM_RSRC1, 0x240, /* SGPRS=9 (80 GPRS) */ | ||
1506 | mmCOMPUTE_PGM_RSRC2, 20, | 1509 | mmCOMPUTE_PGM_RSRC2, 20, |
1507 | mmCOMPUTE_USER_DATA_0, 0xedcedc00, | 1510 | mmCOMPUTE_USER_DATA_0, 0xedcedc00, |
1508 | mmCOMPUTE_USER_DATA_1, 0xedcedc01, | 1511 | mmCOMPUTE_USER_DATA_1, 0xedcedc01, |