diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2017-06-06 17:41:20 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-06-07 00:04:35 -0400 |
commit | 378506a7e600a025131df947a15f9bc23b522690 (patch) | |
tree | ea8f7568e221efb57dfbbcfc82837b937cb11d8b /drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | |
parent | 943c05bdb53da273c43ec44eec37c6a70409b5e9 (diff) |
drm/amdgpu/gfx: create a common bitmask function (v2)
The same function was duplicated in all the gfx IPs. Use
a single implementation for all.
v2: use static inline (Alex Xie)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Suggested-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c index c2b4e9fbc616..7b0b3cf16334 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | |||
@@ -1114,11 +1114,6 @@ static void gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, | |||
1114 | WREG32(mmGRBM_GFX_INDEX, data); | 1114 | WREG32(mmGRBM_GFX_INDEX, data); |
1115 | } | 1115 | } |
1116 | 1116 | ||
1117 | static u32 gfx_v6_0_create_bitmask(u32 bit_width) | ||
1118 | { | ||
1119 | return (u32)(((u64)1 << bit_width) - 1); | ||
1120 | } | ||
1121 | |||
1122 | static u32 gfx_v6_0_get_rb_active_bitmap(struct amdgpu_device *adev) | 1117 | static u32 gfx_v6_0_get_rb_active_bitmap(struct amdgpu_device *adev) |
1123 | { | 1118 | { |
1124 | u32 data, mask; | 1119 | u32 data, mask; |
@@ -1128,8 +1123,8 @@ static u32 gfx_v6_0_get_rb_active_bitmap(struct amdgpu_device *adev) | |||
1128 | 1123 | ||
1129 | data = REG_GET_FIELD(data, GC_USER_RB_BACKEND_DISABLE, BACKEND_DISABLE); | 1124 | data = REG_GET_FIELD(data, GC_USER_RB_BACKEND_DISABLE, BACKEND_DISABLE); |
1130 | 1125 | ||
1131 | mask = gfx_v6_0_create_bitmask(adev->gfx.config.max_backends_per_se/ | 1126 | mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se/ |
1132 | adev->gfx.config.max_sh_per_se); | 1127 | adev->gfx.config.max_sh_per_se); |
1133 | 1128 | ||
1134 | return ~data & mask; | 1129 | return ~data & mask; |
1135 | } | 1130 | } |
@@ -1331,7 +1326,7 @@ static u32 gfx_v6_0_get_cu_enabled(struct amdgpu_device *adev) | |||
1331 | data = RREG32(mmCC_GC_SHADER_ARRAY_CONFIG) | | 1326 | data = RREG32(mmCC_GC_SHADER_ARRAY_CONFIG) | |
1332 | RREG32(mmGC_USER_SHADER_ARRAY_CONFIG); | 1327 | RREG32(mmGC_USER_SHADER_ARRAY_CONFIG); |
1333 | 1328 | ||
1334 | mask = gfx_v6_0_create_bitmask(adev->gfx.config.max_cu_per_sh); | 1329 | mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); |
1335 | return ~REG_GET_FIELD(data, CC_GC_SHADER_ARRAY_CONFIG, INACTIVE_CUS) & mask; | 1330 | return ~REG_GET_FIELD(data, CC_GC_SHADER_ARRAY_CONFIG, INACTIVE_CUS) & mask; |
1336 | } | 1331 | } |
1337 | 1332 | ||