drm/amdgpu: clean up memory/GDS/GWS/OA alignment code

- move all adjustments into one place
- specify GDS/GWS/OA alignment in basic units of the heaps
- it looks like GDS alignment was 1 instead of 4

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 12 insertions, 4 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 728e15e5d68a..fd9c4beeaaa4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -426,12 +426,20 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
         size_t acc_size;
         int r;
 
-        page_align = roundup(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
-        if (bp->domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS |
-                          AMDGPU_GEM_DOMAIN_OA))
+        /* Note that GDS/GWS/OA allocates 1 page per byte/resource. */
+        if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
+                /* GWS and OA don't need any alignment. */
+                page_align = bp->byte_align;
                 size <<= PAGE_SHIFT;
-        else
+        } else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
+                /* Both size and alignment must be a multiple of 4. */
+                page_align = ALIGN(bp->byte_align, 4);
+                size = ALIGN(size, 4) << PAGE_SHIFT;
+        } else {
+                /* Memory should be aligned at least to a page size. */
+                page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
                 size = ALIGN(size, PAGE_SIZE);
+        }
 
         if (!amdgpu_bo_validate_size(adev, size, bp->domain))
                 return -ENOMEM;