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authorMarek Olšák <marek.olsak@amd.com>2019-01-22 15:44:54 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-02-01 00:33:00 -0500
commitfe57085a36de5813ab63a8d178ccfb5f257f028e (patch)
treea33d93e816327e2344ca02715ee25f2bf88efd19 /drivers/gpu/drm/amd
parenta5c8e0524dbbe1107d81a1604da3d191b66ead6b (diff)
drm/amdgpu: clean up memory/GDS/GWS/OA alignment code
- move all adjustments into one place - specify GDS/GWS/OA alignment in basic units of the heaps - it looks like GDS alignment was 1 instead of 4 Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c7
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.c16
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c6
3 files changed, 15 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index f4f00217546e..d21dd2f369da 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -54,10 +54,6 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
54 54
55 memset(&bp, 0, sizeof(bp)); 55 memset(&bp, 0, sizeof(bp));
56 *obj = NULL; 56 *obj = NULL;
57 /* At least align on page size */
58 if (alignment < PAGE_SIZE) {
59 alignment = PAGE_SIZE;
60 }
61 57
62 bp.size = size; 58 bp.size = size;
63 bp.byte_align = alignment; 59 bp.byte_align = alignment;
@@ -244,9 +240,6 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
244 return -EINVAL; 240 return -EINVAL;
245 } 241 }
246 flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 242 flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
247 /* GDS allocations must be DW aligned */
248 if (args->in.domains & AMDGPU_GEM_DOMAIN_GDS)
249 size = ALIGN(size, 4);
250 } 243 }
251 244
252 if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) { 245 if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 728e15e5d68a..fd9c4beeaaa4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -426,12 +426,20 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
426 size_t acc_size; 426 size_t acc_size;
427 int r; 427 int r;
428 428
429 page_align = roundup(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT; 429 /* Note that GDS/GWS/OA allocates 1 page per byte/resource. */
430 if (bp->domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | 430 if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
431 AMDGPU_GEM_DOMAIN_OA)) 431 /* GWS and OA don't need any alignment. */
432 page_align = bp->byte_align;
432 size <<= PAGE_SHIFT; 433 size <<= PAGE_SHIFT;
433 else 434 } else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
435 /* Both size and alignment must be a multiple of 4. */
436 page_align = ALIGN(bp->byte_align, 4);
437 size = ALIGN(size, 4) << PAGE_SHIFT;
438 } else {
439 /* Memory should be aligned at least to a page size. */
440 page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
434 size = ALIGN(size, PAGE_SIZE); 441 size = ALIGN(size, PAGE_SIZE);
442 }
435 443
436 if (!amdgpu_bo_validate_size(adev, size, bp->domain)) 444 if (!amdgpu_bo_validate_size(adev, size, bp->domain))
437 return -ENOMEM; 445 return -ENOMEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index b852abb9db0f..73e71e61dc99 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1756,7 +1756,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
1756 } 1756 }
1757 1757
1758 r = amdgpu_bo_create_kernel(adev, adev->gds.mem.gfx_partition_size, 1758 r = amdgpu_bo_create_kernel(adev, adev->gds.mem.gfx_partition_size,
1759 PAGE_SIZE, AMDGPU_GEM_DOMAIN_GDS, 1759 4, AMDGPU_GEM_DOMAIN_GDS,
1760 &adev->gds.gds_gfx_bo, NULL, NULL); 1760 &adev->gds.gds_gfx_bo, NULL, NULL);
1761 if (r) 1761 if (r)
1762 return r; 1762 return r;
@@ -1769,7 +1769,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
1769 } 1769 }
1770 1770
1771 r = amdgpu_bo_create_kernel(adev, adev->gds.gws.gfx_partition_size, 1771 r = amdgpu_bo_create_kernel(adev, adev->gds.gws.gfx_partition_size,
1772 PAGE_SIZE, AMDGPU_GEM_DOMAIN_GWS, 1772 1, AMDGPU_GEM_DOMAIN_GWS,
1773 &adev->gds.gws_gfx_bo, NULL, NULL); 1773 &adev->gds.gws_gfx_bo, NULL, NULL);
1774 if (r) 1774 if (r)
1775 return r; 1775 return r;
@@ -1782,7 +1782,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
1782 } 1782 }
1783 1783
1784 r = amdgpu_bo_create_kernel(adev, adev->gds.oa.gfx_partition_size, 1784 r = amdgpu_bo_create_kernel(adev, adev->gds.oa.gfx_partition_size,
1785 PAGE_SIZE, AMDGPU_GEM_DOMAIN_OA, 1785 1, AMDGPU_GEM_DOMAIN_OA,
1786 &adev->gds.oa_gfx_bo, NULL, NULL); 1786 &adev->gds.oa_gfx_bo, NULL, NULL);
1787 if (r) 1787 if (r)
1788 return r; 1788 return r;