diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2017-06-07 12:59:29 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-06-07 18:02:06 -0400 |
commit | 2db0cdbe2879f424e28f69755a16344348247d44 (patch) | |
tree | 71773c2285989ccfbf9824ee7573bb8abf13fcbe /drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | |
parent | ee04fac3b7cc5093653ba87bfdc241d321f4a3da (diff) |
drm/amdgpu: move mec queue helpers to amdgpu_gfx.h
They are gfx related, not general helpers.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 9b9ea6eb49c5..fa20438a7b4f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | |||
@@ -45,4 +45,34 @@ static inline u32 amdgpu_gfx_create_bitmask(u32 bit_width) | |||
45 | return (u32)((1ULL << bit_width) - 1); | 45 | return (u32)((1ULL << bit_width) - 1); |
46 | } | 46 | } |
47 | 47 | ||
48 | static inline int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, | ||
49 | int mec, int pipe, int queue) | ||
50 | { | ||
51 | int bit = 0; | ||
52 | |||
53 | bit += mec * adev->gfx.mec.num_pipe_per_mec | ||
54 | * adev->gfx.mec.num_queue_per_pipe; | ||
55 | bit += pipe * adev->gfx.mec.num_queue_per_pipe; | ||
56 | bit += queue; | ||
57 | |||
58 | return bit; | ||
59 | } | ||
60 | |||
61 | static inline void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit, | ||
62 | int *mec, int *pipe, int *queue) | ||
63 | { | ||
64 | *queue = bit % adev->gfx.mec.num_queue_per_pipe; | ||
65 | *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) | ||
66 | % adev->gfx.mec.num_pipe_per_mec; | ||
67 | *mec = (bit / adev->gfx.mec.num_queue_per_pipe) | ||
68 | / adev->gfx.mec.num_pipe_per_mec; | ||
69 | |||
70 | } | ||
71 | static inline bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, | ||
72 | int mec, int pipe, int queue) | ||
73 | { | ||
74 | return test_bit(amdgpu_gfx_queue_to_bit(adev, mec, pipe, queue), | ||
75 | adev->gfx.mec.queue_bitmap); | ||
76 | } | ||
77 | |||
48 | #endif | 78 | #endif |