drm/amdgpu: move mec queue helpers to amdgpu_gfx.h

They are gfx related, not general helpers.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

6 files changed, 40 insertions, 39 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ef34ff214083..3308e6200690 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1831,36 +1831,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
                 return NULL;
 }
 
-static inline int amdgpu_queue_to_bit(struct amdgpu_device *adev,
-                                      int mec, int pipe, int queue)
-{
-        int bit = 0;
-
-        bit += mec * adev->gfx.mec.num_pipe_per_mec
-                * adev->gfx.mec.num_queue_per_pipe;
-        bit += pipe * adev->gfx.mec.num_queue_per_pipe;
-        bit += queue;
-
-        return bit;
-}
-
-static inline void amdgpu_bit_to_queue(struct amdgpu_device *adev, int bit,
-                                       int *mec, int *pipe, int *queue)
-{
-        *queue = bit % adev->gfx.mec.num_queue_per_pipe;
-        *pipe = (bit / adev->gfx.mec.num_queue_per_pipe)
-                % adev->gfx.mec.num_pipe_per_mec;
-        *mec = (bit / adev->gfx.mec.num_queue_per_pipe)
-               / adev->gfx.mec.num_pipe_per_mec;
-
-}
-static inline bool amdgpu_is_mec_queue_enabled(struct amdgpu_device *adev,
-                                               int mec, int pipe, int queue)
-{
-        return test_bit(amdgpu_queue_to_bit(adev, mec, pipe, queue),
-                        adev->gfx.mec.queue_bitmap);
-}
-
 /*
  * ASICs macro.
  */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 339e8cd9c289..5f8ada1d872b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -24,6 +24,7 @@
 #include "amd_shared.h"
 #include <drm/drmP.h>
 #include "amdgpu.h"
+#include "amdgpu_gfx.h"
 #include <linux/module.h>
 
 const struct kfd2kgd_calls *kfd2kgd;
@@ -113,10 +114,10 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
 
                 /* remove the KIQ bit as well */
                 if (adev->gfx.kiq.ring.ready)
-                        clear_bit(amdgpu_queue_to_bit(adev,
-                                                      adev->gfx.kiq.ring.me - 1,
-                                                      adev->gfx.kiq.ring.pipe,
-                                                      adev->gfx.kiq.ring.queue),
+                        clear_bit(amdgpu_gfx_queue_to_bit(adev,
+                                                          adev->gfx.kiq.ring.me - 1,
+                                                          adev->gfx.kiq.ring.pipe,
+                                                          adev->gfx.kiq.ring.queue),
                                   gpu_resources.queue_bitmap);
 
                 /* According to linux/bitmap.h we shouldn't use bitmap_clear if
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 9b9ea6eb49c5..fa20438a7b4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -45,4 +45,34 @@ static inline u32 amdgpu_gfx_create_bitmask(u32 bit_width)
         return (u32)((1ULL << bit_width) - 1);
 }
 
+static inline int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev,
+                                          int mec, int pipe, int queue)
+{
+        int bit = 0;
+
+        bit += mec * adev->gfx.mec.num_pipe_per_mec
+                * adev->gfx.mec.num_queue_per_pipe;
+        bit += pipe * adev->gfx.mec.num_queue_per_pipe;
+        bit += queue;
+
+        return bit;
+}
+
+static inline void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit,
+                                           int *mec, int *pipe, int *queue)
+{
+        *queue = bit % adev->gfx.mec.num_queue_per_pipe;
+        *pipe = (bit / adev->gfx.mec.num_queue_per_pipe)
+                % adev->gfx.mec.num_pipe_per_mec;
+        *mec = (bit / adev->gfx.mec.num_queue_per_pipe)
+               / adev->gfx.mec.num_pipe_per_mec;
+
+}
+static inline bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev,
+                                                   int mec, int pipe, int queue)
+{
+        return test_bit(amdgpu_gfx_queue_to_bit(adev, mec, pipe, queue),
+                        adev->gfx.mec.queue_bitmap);
+}
+
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 6ffb2da7b3df..d80cf72f6922 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4776,7 +4776,7 @@ static int gfx_v7_0_sw_init(void *handle)
         for (i = 0; i < adev->gfx.mec.num_mec; ++i) {
                 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {
                         for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {
-                                if (!amdgpu_is_mec_queue_enabled(adev, i, k, j))
+                                if (!amdgpu_gfx_is_mec_queue_enabled(adev, i, k, j))
                                         continue;
 
                                 r = gfx_v7_0_compute_ring_init(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 8d39e7d3dcce..fc8e03bf7f41 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1393,7 +1393,7 @@ static int gfx_v8_0_kiq_acquire(struct amdgpu_device *adev,
                 if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap))
                         continue;
 
-                amdgpu_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
+                amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
 
                 /* Using pipes 2/3 from MEC 2 seems cause problems */
                 if (mec == 1 && pipe > 1)
@@ -2178,7 +2178,7 @@ static int gfx_v8_0_sw_init(void *handle)
         for (i = 0; i < adev->gfx.mec.num_mec; ++i) {
                 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {
                         for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {
-                                if (!amdgpu_is_mec_queue_enabled(adev, i, k, j))
+                                if (!amdgpu_gfx_is_mec_queue_enabled(adev, i, k, j))
                                         continue;
 
                                 r = gfx_v8_0_compute_ring_init(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4c47754f68d8..6d30476f8a43 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1015,7 +1015,7 @@ static int gfx_v9_0_kiq_acquire(struct amdgpu_device *adev,
                 if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap))
                         continue;
 
-                amdgpu_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
+                amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
 
                 /* Using pipes 2/3 from MEC 2 seems cause problems */
                 if (mec == 1 && pipe > 1)
@@ -1556,7 +1556,7 @@ static int gfx_v9_0_sw_init(void *handle)
         for (i = 0; i < adev->gfx.mec.num_mec; ++i) {
                 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {
                         for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {
-                                if (!amdgpu_is_mec_queue_enabled(adev, i, k, j))
+                                if (!amdgpu_gfx_is_mec_queue_enabled(adev, i, k, j))
                                         continue;
 
                                 r = gfx_v9_0_compute_ring_init(adev,