Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few more things for 4.12:
- ttm and amdgpu support for non-contiguous vram CPU mappings
- lots of bug fixes and cleanups for vega10
- misc bug fixes and code cleanups

[airlied: fix do_div error on 32-bit arm, not sure it's 100% correct]

* 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits)
  drm/amdgpu: use uintptr_t instead of unsigned long to store pointer
  drm/amdgpu: Avoid using signed integer to store pointer value
  drm/amdgpu:invoke new implemented AI MB func
  drm/amdgpu/vega10:timeout set to equal with VI
  drm/amdgpu:implement the reset MB func for vega10
  drm/amdgpu:fix typo for mxgpu_ai
  drm/amdgpu:no need to involv HDP in KIQ
  drm/amdgpu:add PSP block only load_type=PSP (v2)
  drm/amdgpu/smu9: update to latest driver interface
  drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()
  drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()
  drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()
  drm/amd/amdgpu: Drop gfx_v9_0_print_status()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()
  drm/amdgpu: Move function amdgpu_has_atpx near other similar functions
  ...

1 files changed, 34 insertions, 30 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 83dda05325b8..831c2bfd2072 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1042,14 +1042,6 @@ static bool amdgpu_check_pot_argument(int arg)
 
 static void amdgpu_get_block_size(struct amdgpu_device *adev)
 {
-        /* from AI, asic starts to support multiple level VMPT */
-        if (adev->asic_type >= CHIP_VEGA10) {
-                if (amdgpu_vm_block_size != 9)
-                        dev_warn(adev->dev,
-                                 "Multi-VMPT limits block size to one page!\n");
-                amdgpu_vm_block_size = 9;
-                return;
-        }
         /* defines number of bits in page table versus page directory,
          * a page is 4KB so we have 12 bits offset, minimum 9 bits in the
          * page table and the remaining bits are in the page directory */
@@ -1079,6 +1071,36 @@ static void amdgpu_get_block_size(struct amdgpu_device *adev)
         }
 }
 
+static void amdgpu_check_vm_size(struct amdgpu_device *adev)
+{
+        if (!amdgpu_check_pot_argument(amdgpu_vm_size)) {
+                dev_warn(adev->dev, "VM size (%d) must be a power of 2\n",
+                         amdgpu_vm_size);
+                goto def_value;
+        }
+
+        if (amdgpu_vm_size < 1) {
+                dev_warn(adev->dev, "VM size (%d) too small, min is 1GB\n",
+                         amdgpu_vm_size);
+                goto def_value;
+        }
+
+        /*
+         * Max GPUVM size for Cayman, SI, CI VI are 40 bits.
+         */
+        if (amdgpu_vm_size > 1024) {
+                dev_warn(adev->dev, "VM size (%d) too large, max is 1TB\n",
+                         amdgpu_vm_size);
+                goto def_value;
+        }
+
+        return;
+
+def_value:
+        amdgpu_vm_size = 8;
+        dev_info(adev->dev, "set default VM size %dGB\n", amdgpu_vm_size);
+}
+
 /**
  * amdgpu_check_arguments - validate module params
  *
@@ -1108,26 +1130,7 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
                 }
         }
 
-        if (!amdgpu_check_pot_argument(amdgpu_vm_size)) {
-                dev_warn(adev->dev, "VM size (%d) must be a power of 2\n",
-                         amdgpu_vm_size);
-                amdgpu_vm_size = 8;
-        }
-
-        if (amdgpu_vm_size < 1) {
-                dev_warn(adev->dev, "VM size (%d) too small, min is 1GB\n",
-                         amdgpu_vm_size);
-                amdgpu_vm_size = 8;
-        }
-
-        /*
-         * Max GPUVM size for Cayman, SI and CI are 40 bits.
-         */
-        if (amdgpu_vm_size > 1024) {
-                dev_warn(adev->dev, "VM size (%d) too large, max is 1TB\n",
-                         amdgpu_vm_size);
-                amdgpu_vm_size = 8;
-        }
+        amdgpu_check_vm_size(adev);
 
         amdgpu_get_block_size(adev);
 
@@ -2249,9 +2252,10 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
         }
 
         r = amdgpu_resume(adev);
-        if (r)
+        if (r) {
                 DRM_ERROR("amdgpu_resume failed (%d).\n", r);
-
+                return r;
+        }
         amdgpu_fence_driver_resume(adev);
 
         if (resume) {