Merge tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "This is going to rebuild more than drm as it adds a new helper to
  list.h for doing bulk updates. Seemed like a reasonable addition to
  me.

  Otherwise the usual merge window stuff lots of i915 and amdgpu, not so
  much nouveau, and piles of everything else.

  Core:
   - Adds a new list.h helper for doing bulk list updates for TTM.
   - Don't leak fb address in smem_start to userspace (comes with EXPORT
     workaround for people using mali out of tree hacks)
   - udmabuf device to turn memfd regions into dma-buf
   - Per-plane blend mode property
   - ref/unref replacements with get/put
   - fbdev conflicting framebuffers code cleaned up
   - host-endian format variants
   - panel orientation quirk for Acer One 10

  bridge:
   - TI SN65DSI86 chip support

  vkms:
   - GEM support.
   - Cursor support

  amdgpu:
   - Merge amdkfd and amdgpu into one module
   - CEC over DP AUX support
   - Picasso APU support + VCN dynamic powergating
   - Raven2 APU support
   - Vega20 enablement + kfd support
   - ACP powergating improvements
   - ABGR/XBGR display support
   - VCN jpeg support
   - xGMI support
   - DC i2c/aux cleanup
   - Ycbcr 4:2:0 support
   - GPUVM improvements
   - Powerplay and powerplay endian fixes
   - Display underflow fixes

  vmwgfx:
   - Move vmwgfx specific TTM code to vmwgfx
   - Split out vmwgfx buffer/resource validation code
   - Atomic operation rework

  bochs:
   - use more helpers
   - format/byteorder improvements

  qxl:
   - use more helpers

  i915:
   - GGTT coherency getparam
   - Turn off resource streamer API
   - More Icelake enablement + DMC firmware
   - Full PPGTT for Ivybridge, Haswell and Valleyview
   - DDB distribution based on resolution
   - Limited range DP display support

  nouveau:
   - CEC over DP AUX support
   - Initial HDMI 2.0 support

  virtio-gpu:
   - vmap support for PRIME objects

  tegra:
   - Initial Tegra194 support
   - DMA/IOMMU integration fixes

  msm:
   - a6xx perf improvements + clock prefix
   - GPU preemption optimisations
   - a6xx devfreq support
   - cursor support

  rockchip:
   - PX30 support
   - rgb output interface support

  mediatek:
   - HDMI output support on mt2701 and mt7623

  rcar-du:
   - Interlaced modes on Gen3
   - LVDS on R8A77980
   - D3 and E3 SoC support

  hisilicon:
   - misc fixes

  mxsfb:
   - runtime pm support

  sun4i:
   - R40 TCON support
   - Allwinner A64 support
   - R40 HDMI support

  omapdrm:
   - Driver rework changing display pipeline ordering to use common code
   - DMM memory barrier and irq fixes
   - Errata workarounds

  exynos:
   - out-bridge support for LVDS bridge driver
   - Samsung 16x16 tiled format support
   - Plane alpha and pixel blend mode support

  tilcdc:
   - suspend/resume update

  mali-dp:
   - misc updates"

* tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm: (1382 commits)
  firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
  drm/i915/icl: Fix signal_levels
  drm/i915/icl: Fix DDI/TC port clk_off bits
  drm/i915/icl: create function to identify combophy port
  drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
  drm/i915: Large page offsets for pread/pwrite
  drm/i915/selftests: Disable shrinker across mmap-exhaustion
  drm/i915/dp: Link train Fallback on eDP only if fallback link BW can fit panel's native mode
  drm/i915: Fix intel_dp_mst_best_encoder()
  drm/i915: Skip vcpi allocation for MSTB ports that are gone
  drm/i915: Don't unset intel_connector->mst_port
  drm/i915: Only reset seqno if actually idle
  drm/i915: Use the correct crtc when sanitizing plane mapping
  drm/i915: Restore vblank interrupts earlier
  drm/i915: Check fb stride against plane max stride
  drm/amdgpu/vcn:Fix uninitialized symbol error
  drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003)
  drm/amd/amdgpu: Fix debugfs error handling
  drm/amdgpu: Update gc_9_0 golden settings.
  drm/amd/powerplay: update PPtable with DC BTC and Tvr SocLimit fields
  ...

1 files changed, 176 insertions, 86 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index df6965761046..f9b54236102d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -27,6 +27,30 @@
 #include "amdgpu.h"
 #include "amdgpu_sched.h"
 
+#define to_amdgpu_ctx_entity(e) \
+        container_of((e), struct amdgpu_ctx_entity, entity)
+
+const unsigned int amdgpu_ctx_num_entities[AMDGPU_HW_IP_NUM] = {
+        [AMDGPU_HW_IP_GFX]      =       1,
+        [AMDGPU_HW_IP_COMPUTE]  =       4,
+        [AMDGPU_HW_IP_DMA]      =       2,
+        [AMDGPU_HW_IP_UVD]      =       1,
+        [AMDGPU_HW_IP_VCE]      =       1,
+        [AMDGPU_HW_IP_UVD_ENC]  =       1,
+        [AMDGPU_HW_IP_VCN_DEC]  =       1,
+        [AMDGPU_HW_IP_VCN_ENC]  =       1,
+};
+
+static int amdgput_ctx_total_num_entities(void)
+{
+        unsigned i, num_entities = 0;
+
+        for (i = 0; i < AMDGPU_HW_IP_NUM; ++i)
+                num_entities += amdgpu_ctx_num_entities[i];
+
+        return num_entities;
+}
+
 static int amdgpu_ctx_priority_permit(struct drm_file *filp,
                                       enum drm_sched_priority priority)
 {
@@ -48,6 +72,7 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
                            struct drm_file *filp,
                            struct amdgpu_ctx *ctx)
 {
+        unsigned num_entities = amdgput_ctx_total_num_entities();
         unsigned i, j;
         int r;
 
@@ -60,19 +85,33 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
 
         memset(ctx, 0, sizeof(*ctx));
         ctx->adev = adev;
-        kref_init(&ctx->refcount);
-        spin_lock_init(&ctx->ring_lock);
-        ctx->fences = kcalloc(amdgpu_sched_jobs * AMDGPU_MAX_RINGS,
+
+        ctx->fences = kcalloc(amdgpu_sched_jobs * num_entities,
                               sizeof(struct dma_fence*), GFP_KERNEL);
         if (!ctx->fences)
                 return -ENOMEM;
 
-        mutex_init(&ctx->lock);
+        ctx->entities[0] = kcalloc(num_entities,
+                                   sizeof(struct amdgpu_ctx_entity),
+                                   GFP_KERNEL);
+        if (!ctx->entities[0]) {
+                r = -ENOMEM;
+                goto error_free_fences;
+        }
 
-        for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
-                ctx->rings[i].sequence = 1;
-                ctx->rings[i].fences = &ctx->fences[amdgpu_sched_jobs * i];
+        for (i = 0; i < num_entities; ++i) {
+                struct amdgpu_ctx_entity *entity = &ctx->entities[0][i];
+
+                entity->sequence = 1;
+                entity->fences = &ctx->fences[amdgpu_sched_jobs * i];
         }
+        for (i = 1; i < AMDGPU_HW_IP_NUM; ++i)
+                ctx->entities[i] = ctx->entities[i - 1] +
+                        amdgpu_ctx_num_entities[i - 1];
+
+        kref_init(&ctx->refcount);
+        spin_lock_init(&ctx->ring_lock);
+        mutex_init(&ctx->lock);
 
         ctx->reset_counter = atomic_read(&adev->gpu_reset_counter);
         ctx->reset_counter_query = ctx->reset_counter;
@@ -80,31 +119,70 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
         ctx->init_priority = priority;
         ctx->override_priority = DRM_SCHED_PRIORITY_UNSET;
 
-        /* create context entity for each ring */
-        for (i = 0; i < adev->num_rings; i++) {
-                struct amdgpu_ring *ring = adev->rings[i];
-                struct drm_sched_rq *rq;
+        for (i = 0; i < AMDGPU_HW_IP_NUM; ++i) {
+                struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
+                struct drm_sched_rq *rqs[AMDGPU_MAX_RINGS];
+                unsigned num_rings;
+
+                switch (i) {
+                case AMDGPU_HW_IP_GFX:
+                        rings[0] = &adev->gfx.gfx_ring[0];
+                        num_rings = 1;
+                        break;
+                case AMDGPU_HW_IP_COMPUTE:
+                        for (j = 0; j < adev->gfx.num_compute_rings; ++j)
+                                rings[j] = &adev->gfx.compute_ring[j];
+                        num_rings = adev->gfx.num_compute_rings;
+                        break;
+                case AMDGPU_HW_IP_DMA:
+                        for (j = 0; j < adev->sdma.num_instances; ++j)
+                                rings[j] = &adev->sdma.instance[j].ring;
+                        num_rings = adev->sdma.num_instances;
+                        break;
+                case AMDGPU_HW_IP_UVD:
+                        rings[0] = &adev->uvd.inst[0].ring;
+                        num_rings = 1;
+                        break;
+                case AMDGPU_HW_IP_VCE:
+                        rings[0] = &adev->vce.ring[0];
+                        num_rings = 1;
+                        break;
+                case AMDGPU_HW_IP_UVD_ENC:
+                        rings[0] = &adev->uvd.inst[0].ring_enc[0];
+                        num_rings = 1;
+                        break;
+                case AMDGPU_HW_IP_VCN_DEC:
+                        rings[0] = &adev->vcn.ring_dec;
+                        num_rings = 1;
+                        break;
+                case AMDGPU_HW_IP_VCN_ENC:
+                        rings[0] = &adev->vcn.ring_enc[0];
+                        num_rings = 1;
+                        break;
+                case AMDGPU_HW_IP_VCN_JPEG:
+                        rings[0] = &adev->vcn.ring_jpeg;
+                        num_rings = 1;
+                        break;
+                }
 
-                rq = &ring->sched.sched_rq[priority];
+                for (j = 0; j < num_rings; ++j)
+                        rqs[j] = &rings[j]->sched.sched_rq[priority];
 
-                if (ring == &adev->gfx.kiq.ring)
-                        continue;
-
-                r = drm_sched_entity_init(&ctx->rings[i].entity,
-                                          &rq, 1, &ctx->guilty);
+                for (j = 0; j < amdgpu_ctx_num_entities[i]; ++j)
+                        r = drm_sched_entity_init(&ctx->entities[i][j].entity,
+                                                  rqs, num_rings, &ctx->guilty);
                 if (r)
-                        goto failed;
+                        goto error_cleanup_entities;
         }
 
-        r = amdgpu_queue_mgr_init(adev, &ctx->queue_mgr);
-        if (r)
-                goto failed;
-
         return 0;
 
-failed:
-        for (j = 0; j < i; j++)
-                drm_sched_entity_destroy(&ctx->rings[j].entity);
+error_cleanup_entities:
+        for (i = 0; i < num_entities; ++i)
+                drm_sched_entity_destroy(&ctx->entities[0][i].entity);
+        kfree(ctx->entities[0]);
+