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authorAlan Tull <atull@opensource.altera.com>2016-11-01 15:14:26 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-11-10 11:03:35 -0500
commit1df2865f8dd9d56cb76aa7aa1298921e7bece2af (patch)
tree13bfefb2d88b52d1d326867d91dd0c016cc83075 /drivers/fpga/socfpga.c
parenta33ddf80b67a79530c3aa2c9f87e2bbd3aea3e22 (diff)
fpga-mgr: add fpga image information struct
This patch adds a minor change in the FPGA Manager API to hold information that is specific to an FPGA image file. This change is expected to bring little, if any, pain. The socfpga and zynq drivers are fixed up in this patch. An FPGA image file will have particulars that affect how the image is programmed to the FPGA. One example is that current 'flags' currently has one bit which shows whether the FPGA image was built for full reconfiguration or partial reconfiguration. Another example is timeout values for enabling or disabling the bridges in the FPGA. As the complexity of the FPGA design increases, the bridges in the FPGA may take longer times to enable or disable. This patch adds a new 'struct fpga_image_info', moves the current 'u32 flags' to it. Two other image-specific u32's are added for the bridge enable/disable timeouts. The FPGA Manager API functions are changed, replacing the 'u32 flag' parameter with a pointer to struct fpga_image_info. Subsequent patches fix the existing low level FPGA manager drivers. Signed-off-by: Alan Tull <atull@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/socfpga.c')
-rw-r--r--drivers/fpga/socfpga.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index 27d2ff28132c..b6672e66cda6 100644
--- a/drivers/fpga/socfpga.c
+++ b/drivers/fpga/socfpga.c
@@ -407,13 +407,14 @@ static int socfpga_fpga_reset(struct fpga_manager *mgr)
407/* 407/*
408 * Prepare the FPGA to receive the configuration data. 408 * Prepare the FPGA to receive the configuration data.
409 */ 409 */
410static int socfpga_fpga_ops_configure_init(struct fpga_manager *mgr, u32 flags, 410static int socfpga_fpga_ops_configure_init(struct fpga_manager *mgr,
411 struct fpga_image_info *info,
411 const char *buf, size_t count) 412 const char *buf, size_t count)
412{ 413{
413 struct socfpga_fpga_priv *priv = mgr->priv; 414 struct socfpga_fpga_priv *priv = mgr->priv;
414 int ret; 415 int ret;
415 416
416 if (flags & FPGA_MGR_PARTIAL_RECONFIG) { 417 if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
417 dev_err(&mgr->dev, "Partial reconfiguration not supported.\n"); 418 dev_err(&mgr->dev, "Partial reconfiguration not supported.\n");
418 return -EINVAL; 419 return -EINVAL;
419 } 420 }
@@ -478,7 +479,7 @@ static int socfpga_fpga_ops_configure_write(struct fpga_manager *mgr,
478} 479}
479 480
480static int socfpga_fpga_ops_configure_complete(struct fpga_manager *mgr, 481static int socfpga_fpga_ops_configure_complete(struct fpga_manager *mgr,
481 u32 flags) 482 struct fpga_image_info *info)
482{ 483{
483 struct socfpga_fpga_priv *priv = mgr->priv; 484 struct socfpga_fpga_priv *priv = mgr->priv;
484 u32 status; 485 u32 status;