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authorLinus Torvalds <torvalds@linux-foundation.org>2017-10-22 06:58:23 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2017-10-22 06:58:23 -0400
commit936fd00549d26a19be723cf7cc1c0b1aa50f9fde (patch)
treeece248d2be77cce290560f9177bde6b4e4e76889 /arch/x86/kernel/cpu/microcode/intel.c
parent9e415a8edce53fb0fed28e15bc06522d122e872e (diff)
parentce56a86e2ade45d052b3228cdfebe913a1ae7381 (diff)
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner: "A couple of fixes addressing the following issues: - The last polishing for the TLB code, removing the last BUG_ON() and the debug file along with tidying up the lazy TLB code. - Prevent triple fault on 1st Gen. 486 caused by stupidly calling the early IDT setup after the first function which causes a fault which should be caught by the exception table. - Limit the mmap of /dev/mem to valid addresses - Prevent late microcode loading on Broadwell X - Remove a redundant assignment in the cache info code" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mm: Limit mmap() of /dev/mem to valid physical addresses x86/mm: Remove debug/x86/tlb_defer_switch_to_init_mm x86/mm: Tidy up "x86/mm: Flush more aggressively in lazy TLB mode" x86/mm/64: Remove the last VM_BUG_ON() from the TLB code x86/microcode/intel: Disable late loading on model 79 x86/idt: Initialize early IDT before cr4_init_shadow() x86/cpu/intel_cacheinfo: Remove redundant assignment to 'this_leaf'
Diffstat (limited to 'arch/x86/kernel/cpu/microcode/intel.c')
-rw-r--r--arch/x86/kernel/cpu/microcode/intel.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 8f7a9bbad514..7dbcb7adf797 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -34,6 +34,7 @@
34#include <linux/mm.h> 34#include <linux/mm.h>
35 35
36#include <asm/microcode_intel.h> 36#include <asm/microcode_intel.h>
37#include <asm/intel-family.h>
37#include <asm/processor.h> 38#include <asm/processor.h>
38#include <asm/tlbflush.h> 39#include <asm/tlbflush.h>
39#include <asm/setup.h> 40#include <asm/setup.h>
@@ -918,6 +919,18 @@ static int get_ucode_fw(void *to, const void *from, size_t n)
918 return 0; 919 return 0;
919} 920}
920 921
922static bool is_blacklisted(unsigned int cpu)
923{
924 struct cpuinfo_x86 *c = &cpu_data(cpu);
925
926 if (c->x86 == 6 && c->x86_model == INTEL_FAM6_BROADWELL_X) {
927 pr_err_once("late loading on model 79 is disabled.\n");
928 return true;
929 }
930
931 return false;
932}
933
921static enum ucode_state request_microcode_fw(int cpu, struct device *device, 934static enum ucode_state request_microcode_fw(int cpu, struct device *device,
922 bool refresh_fw) 935 bool refresh_fw)
923{ 936{
@@ -926,6 +939,9 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device,
926 const struct firmware *firmware; 939 const struct firmware *firmware;
927 enum ucode_state ret; 940 enum ucode_state ret;
928 941
942 if (is_blacklisted(cpu))
943 return UCODE_NFOUND;
944
929 sprintf(name, "intel-ucode/%02x-%02x-%02x", 945 sprintf(name, "intel-ucode/%02x-%02x-%02x",
930 c->x86, c->x86_model, c->x86_mask); 946 c->x86, c->x86_model, c->x86_mask);
931 947
@@ -950,6 +966,9 @@ static int get_ucode_user(void *to, const void *from, size_t n)
950static enum ucode_state 966static enum ucode_state
951request_microcode_user(int cpu, const void __user *buf, size_t size) 967request_microcode_user(int cpu, const void __user *buf, size_t size)
952{ 968{
969 if (is_blacklisted(cpu))
970 return UCODE_NFOUND;
971
953 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user); 972 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
954} 973}
955 974