diff options
author | Filippo Sironi <sironi@amazon.de> | 2018-07-31 11:29:30 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2018-09-02 08:10:54 -0400 |
commit | 8da38ebaad23fe1b0c4a205438676f6356607cfc (patch) | |
tree | 42a41050c5ea5b6a0f3e476b669010f62299c533 /arch/x86/kernel/cpu/microcode/intel.c | |
parent | 370a132bb2227ff76278f98370e0e701d86ff752 (diff) |
x86/microcode: Update the new microcode revision unconditionally
Handle the case where microcode gets loaded on the BSP's hyperthread
sibling first and the boot_cpu_data's microcode revision doesn't get
updated because of early exit due to the siblings sharing a microcode
engine.
For that, simply write the updated revision on all CPUs unconditionally.
Signed-off-by: Filippo Sironi <sironi@amazon.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: prarit@redhat.com
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1533050970-14385-1-git-send-email-sironi@amazon.de
Diffstat (limited to 'arch/x86/kernel/cpu/microcode/intel.c')
-rw-r--r-- | arch/x86/kernel/cpu/microcode/intel.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 256d336cbc04..16936a24795c 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c | |||
@@ -795,6 +795,7 @@ static enum ucode_state apply_microcode_intel(int cpu) | |||
795 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 795 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
796 | struct cpuinfo_x86 *c = &cpu_data(cpu); | 796 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
797 | struct microcode_intel *mc; | 797 | struct microcode_intel *mc; |
798 | enum ucode_state ret; | ||
798 | static int prev_rev; | 799 | static int prev_rev; |
799 | u32 rev; | 800 | u32 rev; |
800 | 801 | ||
@@ -817,9 +818,8 @@ static enum ucode_state apply_microcode_intel(int cpu) | |||
817 | */ | 818 | */ |
818 | rev = intel_get_microcode_revision(); | 819 | rev = intel_get_microcode_revision(); |
819 | if (rev >= mc->hdr.rev) { | 820 | if (rev >= mc->hdr.rev) { |
820 | uci->cpu_sig.rev = rev; | 821 | ret = UCODE_OK; |
821 | c->microcode = rev; | 822 | goto out; |
822 | return UCODE_OK; | ||
823 | } | 823 | } |
824 | 824 | ||
825 | /* | 825 | /* |
@@ -848,14 +848,17 @@ static enum ucode_state apply_microcode_intel(int cpu) | |||
848 | prev_rev = rev; | 848 | prev_rev = rev; |
849 | } | 849 | } |
850 | 850 | ||
851 | ret = UCODE_UPDATED; | ||
852 | |||
853 | out: | ||
851 | uci->cpu_sig.rev = rev; | 854 | uci->cpu_sig.rev = rev; |
852 | c->microcode = rev; | 855 | c->microcode = rev; |
853 | 856 | ||
854 | /* Update boot_cpu_data's revision too, if we're on the BSP: */ | 857 | /* Update boot_cpu_data's revision too, if we're on the BSP: */ |
855 | if (c->cpu_index == boot_cpu_data.cpu_index) | 858 | if (c->cpu_index == boot_cpu_data.cpu_index) |
856 | boot_cpu_data.microcode = rev; | 859 | boot_cpu_data.microcode = rev; |
857 | 860 | ||
858 | return UCODE_UPDATED; | 861 | return ret; |
859 | } | 862 | } |
860 | 863 | ||
861 | static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, | 864 | static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, |