diff options
| author | Filippo Sironi <sironi@amazon.de> | 2018-07-31 11:29:30 -0400 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-09-02 08:10:54 -0400 |
| commit | 8da38ebaad23fe1b0c4a205438676f6356607cfc (patch) | |
| tree | 42a41050c5ea5b6a0f3e476b669010f62299c533 | |
| parent | 370a132bb2227ff76278f98370e0e701d86ff752 (diff) | |
x86/microcode: Update the new microcode revision unconditionally
Handle the case where microcode gets loaded on the BSP's hyperthread
sibling first and the boot_cpu_data's microcode revision doesn't get
updated because of early exit due to the siblings sharing a microcode
engine.
For that, simply write the updated revision on all CPUs unconditionally.
Signed-off-by: Filippo Sironi <sironi@amazon.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: prarit@redhat.com
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1533050970-14385-1-git-send-email-sironi@amazon.de
| -rw-r--r-- | arch/x86/kernel/cpu/microcode/amd.c | 22 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/microcode/intel.c | 13 |
2 files changed, 21 insertions, 14 deletions
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c index 602f17134103..07b5fc00b188 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c | |||
| @@ -504,6 +504,7 @@ static enum ucode_state apply_microcode_amd(int cpu) | |||
| 504 | struct microcode_amd *mc_amd; | 504 | struct microcode_amd *mc_amd; |
| 505 | struct ucode_cpu_info *uci; | 505 | struct ucode_cpu_info *uci; |
| 506 | struct ucode_patch *p; | 506 | struct ucode_patch *p; |
| 507 | enum ucode_state ret; | ||
| 507 | u32 rev, dummy; | 508 | u32 rev, dummy; |
| 508 | 509 | ||
| 509 | BUG_ON(raw_smp_processor_id() != cpu); | 510 | BUG_ON(raw_smp_processor_id() != cpu); |
| @@ -521,9 +522,8 @@ static enum ucode_state apply_microcode_amd(int cpu) | |||
| 521 | 522 | ||
| 522 | /* need to apply patch? */ | 523 | /* need to apply patch? */ |
| 523 | if (rev >= mc_amd->hdr.patch_id) { | 524 | if (rev >= mc_amd->hdr.patch_id) { |
| 524 | c->microcode = rev; | 525 | ret = UCODE_OK; |
| 525 | uci->cpu_sig.rev = rev; | 526 | goto out; |
| 526 | return UCODE_OK; | ||
| 527 | } | 527 | } |
| 528 | 528 | ||
| 529 | if (__apply_microcode_amd(mc_amd)) { | 529 | if (__apply_microcode_amd(mc_amd)) { |
| @@ -531,17 +531,21 @@ static enum ucode_state apply_microcode_amd(int cpu) | |||
| 531 | cpu, mc_amd->hdr.patch_id); | 531 | cpu, mc_amd->hdr.patch_id); |
| 532 | return UCODE_ERROR; | 532 | return UCODE_ERROR; |
| 533 | } | 533 | } |
| 534 | pr_info("CPU%d: new patch_level=0x%08x\n", cpu, | ||
| 535 | mc_amd->hdr.patch_id); | ||
| 536 | 534 | ||
| 537 | uci->cpu_sig.rev = mc_amd->hdr.patch_id; | 535 | rev = mc_amd->hdr.patch_id; |
| 538 | c->microcode = mc_amd->hdr.patch_id; | 536 | ret = UCODE_UPDATED; |
| 537 | |||
| 538 | pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev); | ||
| 539 | |||
| 540 | out: | ||
| 541 | uci->cpu_sig.rev = rev; | ||
| 542 | c->microcode = rev; | ||
| 539 | 543 | ||
| 540 | /* Update boot_cpu_data's revision too, if we're on the BSP: */ | 544 | /* Update boot_cpu_data's revision too, if we're on the BSP: */ |
| 541 | if (c->cpu_index == boot_cpu_data.cpu_index) | 545 | if (c->cpu_index == boot_cpu_data.cpu_index) |
| 542 | boot_cpu_data.microcode = mc_amd->hdr.patch_id; | 546 | boot_cpu_data.microcode = rev; |
| 543 | 547 | ||
| 544 | return UCODE_UPDATED; | 548 | return ret; |
| 545 | } | 549 | } |
| 546 | 550 | ||
| 547 | static int install_equiv_cpu_table(const u8 *buf) | 551 | static int install_equiv_cpu_table(const u8 *buf) |
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 256d336cbc04..16936a24795c 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c | |||
| @@ -795,6 +795,7 @@ static enum ucode_state apply_microcode_intel(int cpu) | |||
| 795 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 795 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
| 796 | struct cpuinfo_x86 *c = &cpu_data(cpu); | 796 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
| 797 | struct microcode_intel *mc; | 797 | struct microcode_intel *mc; |
| 798 | enum ucode_state ret; | ||
| 798 | static int prev_rev; | 799 | static int prev_rev; |
| 799 | u32 rev; | 800 | u32 rev; |
| 800 | 801 | ||
| @@ -817,9 +818,8 @@ static enum ucode_state apply_microcode_intel(int cpu) | |||
| 817 | */ | 818 | */ |
| 818 | rev = intel_get_microcode_revision(); | 819 | rev = intel_get_microcode_revision(); |
| 819 | if (rev >= mc->hdr.rev) { | 820 | if (rev >= mc->hdr.rev) { |
| 820 | uci->cpu_sig.rev = rev; | 821 | ret = UCODE_OK; |
| 821 | c->microcode = rev; | 822 | goto out; |
| 822 | return UCODE_OK; | ||
| 823 | } | 823 | } |
| 824 | 824 | ||
| 825 | /* | 825 | /* |
| @@ -848,14 +848,17 @@ static enum ucode_state apply_microcode_intel(int cpu) | |||
| 848 | prev_rev = rev; | 848 | prev_rev = rev; |
| 849 | } | 849 | } |
| 850 | 850 | ||
| 851 | ret = UCODE_UPDATED; | ||
| 852 | |||
| 853 | out: | ||
| 851 | uci->cpu_sig.rev = rev; | 854 | uci->cpu_sig.rev = rev; |
| 852 | c->microcode = rev; | 855 | c->microcode = rev; |
| 853 | 856 | ||
| 854 | /* Update boot_cpu_data's revision too, if we're on the BSP: */ | 857 | /* Update boot_cpu_data's revision too, if we're on the BSP: */ |
| 855 | if (c->cpu_index == boot_cpu_data.cpu_index) | 858 | if (c->cpu_index == boot_cpu_data.cpu_index) |
| 856 | boot_cpu_data.microcode = rev; | 859 | boot_cpu_data.microcode = rev; |
| 857 | 860 | ||
| 858 | return UCODE_UPDATED; | 861 | return ret; |
| 859 | } | 862 | } |
| 860 | 863 | ||
| 861 | static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, | 864 | static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, |
