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authorArnd Bergmann <arnd@arndb.de>2018-03-07 15:36:19 -0500
committerArnd Bergmann <arnd@arndb.de>2018-03-09 17:20:00 -0500
commit553b085c2075f6a4a2591108554f830fa61e881f (patch)
tree68d63911f2c12e0fb9fa23498df9300442a88f92 /arch/m32r/kernel/setup.c
parentfd8773f9f544955f6f47dc2ac3ab85ad64376b7f (diff)
arch: remove m32r port
The Mitsubishi/Renesas m32r architecture has been around for many years, but the Linux port has been obsolete for a very long time as well, with the last significant updates done for linux-2.6.14. While some m32r microcontrollers are still being marketed by Renesas, those are apparently no longer possible to support, mainly due to the lack of an external memory interface. Hirokazu Takata was the maintainer until the architecture got marked Orphaned in 2014. Link: http://www.linux-m32r.org/ Link: https://www.renesas.com/en-eu/products/microcontrollers-microprocessors/m32r.html Cc: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/m32r/kernel/setup.c')
-rw-r--r--arch/m32r/kernel/setup.c424
1 files changed, 0 insertions, 424 deletions
diff --git a/arch/m32r/kernel/setup.c b/arch/m32r/kernel/setup.c
deleted file mode 100644
index b72d5db39f00..000000000000
--- a/arch/m32r/kernel/setup.c
+++ /dev/null
@@ -1,424 +0,0 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * linux/arch/m32r/kernel/setup.c
4 *
5 * Setup routines for Renesas M32R
6 *
7 * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
8 * Hitoshi Yamamoto
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/stddef.h>
14#include <linux/fs.h>
15#include <linux/sched/mm.h>
16#include <linux/ioport.h>
17#include <linux/mm.h>
18#include <linux/bootmem.h>
19#include <linux/console.h>
20#include <linux/initrd.h>
21#include <linux/major.h>
22#include <linux/root_dev.h>
23#include <linux/seq_file.h>
24#include <linux/timex.h>
25#include <linux/screen_info.h>
26#include <linux/cpu.h>
27#include <linux/nodemask.h>
28#include <linux/pfn.h>
29
30#include <asm/processor.h>
31#include <asm/pgtable.h>
32#include <asm/io.h>
33#include <asm/mmu_context.h>
34#include <asm/m32r.h>
35#include <asm/setup.h>
36#include <asm/sections.h>
37
38#ifdef CONFIG_MMU
39extern void init_mmu(void);
40#endif
41
42extern char _end[];
43
44/*
45 * Machine setup..
46 */
47struct cpuinfo_m32r boot_cpu_data;
48
49#ifdef CONFIG_BLK_DEV_RAM
50extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */
51extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */
52extern int rd_image_start; /* starting block # of image */
53#endif
54
55#if defined(CONFIG_VGA_CONSOLE)
56struct screen_info screen_info = {
57 .orig_video_lines = 25,
58 .orig_video_cols = 80,
59 .orig_video_mode = 0,
60 .orig_video_ega_bx = 0,
61 .orig_video_isVGA = 1,
62 .orig_video_points = 8
63};
64#endif
65
66extern int root_mountflags;
67
68static char __initdata command_line[COMMAND_LINE_SIZE];
69
70static struct resource data_resource = {
71 .name = "Kernel data",
72 .start = 0,
73 .end = 0,
74 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
75};
76
77static struct resource code_resource = {
78 .name = "Kernel code",
79 .start = 0,
80 .end = 0,
81 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
82};
83
84unsigned long memory_start;
85EXPORT_SYMBOL(memory_start);
86
87unsigned long memory_end;
88EXPORT_SYMBOL(memory_end);
89
90void __init setup_arch(char **);
91int get_cpuinfo(char *);
92
93static __inline__ void parse_mem_cmdline(char ** cmdline_p)
94{
95 char c = ' ';
96 char *to = command_line;
97 char *from = COMMAND_LINE;
98 int len = 0;
99 int usermem = 0;
100
101 /* Save unparsed command line copy for /proc/cmdline */
102 memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
103 boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
104
105 memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET;
106 memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE;
107
108 for ( ; ; ) {
109 if (c == ' ' && !memcmp(from, "mem=", 4)) {
110 if (to != command_line)
111 to--;
112
113 {
114 unsigned long mem_size;
115
116 usermem = 1;
117 mem_size = memparse(from+4, &from);
118 memory_end = memory_start + mem_size;
119 }
120 }
121 c = *(from++);
122 if (!c)
123 break;
124
125 if (COMMAND_LINE_SIZE <= ++len)
126 break;
127
128 *(to++) = c;
129 }
130 *to = '\0';
131 *cmdline_p = command_line;
132 if (usermem)
133 printk(KERN_INFO "user-defined physical RAM map:\n");
134}
135
136#ifndef CONFIG_DISCONTIGMEM
137static unsigned long __init setup_memory(void)
138{
139 unsigned long start_pfn, max_low_pfn, bootmap_size;
140
141 start_pfn = PFN_UP( __pa(_end) );
142 max_low_pfn = PFN_DOWN( __pa(memory_end) );
143
144 /*
145 * Initialize the boot-time allocator (with low memory only):
146 */
147 bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
148 CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn);
149
150 /*
151 * Register fully available low RAM pages with the bootmem allocator.
152 */
153 {
154 unsigned long curr_pfn;
155 unsigned long last_pfn;
156 unsigned long pages;
157
158 /*
159 * We are rounding up the start address of usable memory:
160 */
161 curr_pfn = PFN_UP(__pa(memory_start));
162
163 /*
164 * ... and at the end of the usable range downwards:
165 */
166 last_pfn = PFN_DOWN(__pa(memory_end));
167
168 if (last_pfn > max_low_pfn)
169 last_pfn = max_low_pfn;
170
171 pages = last_pfn - curr_pfn;
172 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages));
173 }
174
175 /*
176 * Reserve the kernel text and
177 * Reserve the bootmem bitmap. We do this in two steps (first step
178 * was init_bootmem()), because this catches the (definitely buggy)
179 * case of us accidentally initializing the bootmem allocator with
180 * an invalid RAM area.
181 */
182 reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE,
183 (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1)
184 - CONFIG_MEMORY_START,
185 BOOTMEM_DEFAULT);
186
187 /*
188 * reserve physical page 0 - it's a special BIOS page on many boxes,
189 * enabling clean reboots, SMP operation, laptop functions.
190 */
191 reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE, BOOTMEM_DEFAULT);
192
193 /*
194 * reserve memory hole
195 */
196#ifdef CONFIG_MEMHOLE
197 reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE,
198 BOOTMEM_DEFAULT);
199#endif
200
201#ifdef CONFIG_BLK_DEV_INITRD
202 if (LOADER_TYPE && INITRD_START) {
203 if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
204 reserve_bootmem(INITRD_START, INITRD_SIZE,
205 BOOTMEM_DEFAULT);
206 initrd_start = INITRD_START + PAGE_OFFSET;
207 initrd_end = initrd_start + INITRD_SIZE;
208 printk("initrd:start[%08lx],size[%08lx]\n",
209 initrd_start, INITRD_SIZE);
210 } else {
211 printk("initrd extends beyond end of memory "
212 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
213 INITRD_START + INITRD_SIZE,
214 max_low_pfn << PAGE_SHIFT);
215
216 initrd_start = 0;
217 }
218 }
219#endif
220
221 return max_low_pfn;
222}
223#else /* CONFIG_DISCONTIGMEM */
224extern unsigned long setup_memory(void);
225#endif /* CONFIG_DISCONTIGMEM */
226
227void __init setup_arch(char **cmdline_p)
228{
229 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
230
231 boot_cpu_data.cpu_clock = M32R_CPUCLK;
232 boot_cpu_data.bus_clock = M32R_BUSCLK;
233 boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE;
234
235#ifdef CONFIG_BLK_DEV_RAM
236 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
237 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
238 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
239#endif
240
241 if (!MOUNT_ROOT_RDONLY)
242 root_mountflags &= ~MS_RDONLY;
243
244#ifdef CONFIG_VT
245#if defined(CONFIG_VGA_CONSOLE)
246 conswitchp = &vga_con;
247#elif defined(CONFIG_DUMMY_CONSOLE)
248 conswitchp = &dummy_con;
249#endif
250#endif
251
252#ifdef CONFIG_DISCONTIGMEM
253 nodes_clear(node_online_map);
254 node_set_online(0);
255 node_set_online(1);
256#endif /* CONFIG_DISCONTIGMEM */
257
258 init_mm.start_code = (unsigned long) _text;
259 init_mm.end_code = (unsigned long) _etext;
260 init_mm.end_data = (unsigned long) _edata;
261 init_mm.brk = (unsigned long) _end;
262
263 code_resource.start = virt_to_phys(_text);
264 code_resource.end = virt_to_phys(_etext)-1;
265 data_resource.start = virt_to_phys(_etext);
266 data_resource.end = virt_to_phys(_edata)-1;
267
268 parse_mem_cmdline(cmdline_p);
269
270 setup_memory();
271
272 paging_init();
273}
274
275static struct cpu cpu_devices[NR_CPUS];
276
277static int __init topology_init(void)
278{
279 int i;
280
281 for_each_present_cpu(i)
282 register_cpu(&cpu_devices[i], i);
283
284 return 0;
285}
286
287subsys_initcall(topology_init);
288
289#ifdef CONFIG_PROC_FS
290/*
291 * Get CPU information for use by the procfs.
292 */
293static int show_cpuinfo(struct seq_file *m, void *v)
294{
295 struct cpuinfo_m32r *c = v;
296 unsigned long cpu = c - cpu_data;
297
298#ifdef CONFIG_SMP
299 if (!cpu_online(cpu))
300 return 0;
301#endif /* CONFIG_SMP */
302
303 seq_printf(m, "processor\t: %ld\n", cpu);
304
305#if defined(CONFIG_CHIP_VDEC2)
306 seq_printf(m, "cpu family\t: VDEC2\n"
307 "cache size\t: Unknown\n");
308#elif defined(CONFIG_CHIP_M32700)
309 seq_printf(m,"cpu family\t: M32700\n"
310 "cache size\t: I-8KB/D-8KB\n");
311#elif defined(CONFIG_CHIP_M32102)
312 seq_printf(m,"cpu family\t: M32102\n"
313 "cache size\t: I-8KB\n");
314#elif defined(CONFIG_CHIP_OPSP)
315 seq_printf(m,"cpu family\t: OPSP\n"
316 "cache size\t: I-8KB/D-8KB\n");
317#elif defined(CONFIG_CHIP_MP)
318 seq_printf(m, "cpu family\t: M32R-MP\n"
319 "cache size\t: I-xxKB/D-xxKB\n");
320#elif defined(CONFIG_CHIP_M32104)
321 seq_printf(m,"cpu family\t: M32104\n"
322 "cache size\t: I-8KB/D-8KB\n");
323#else
324 seq_printf(m, "cpu family\t: Unknown\n");
325#endif
326 seq_printf(m, "bogomips\t: %lu.%02lu\n",
327 c->loops_per_jiffy/(500000/HZ),
328 (c->loops_per_jiffy/(5000/HZ)) % 100);
329#if defined(CONFIG_PLAT_MAPPI)
330 seq_printf(m, "Machine\t\t: Mappi Evaluation board\n");
331#elif defined(CONFIG_PLAT_MAPPI2)
332 seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n");
333#elif defined(CONFIG_PLAT_MAPPI3)
334 seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n");
335#elif defined(CONFIG_PLAT_M32700UT)
336 seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n");
337#elif defined(CONFIG_PLAT_OPSPUT)
338 seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n");
339#elif defined(CONFIG_PLAT_USRV)
340 seq_printf(m, "Machine\t\t: uServer\n");
341#elif defined(CONFIG_PLAT_OAKS32R)
342 seq_printf(m, "Machine\t\t: OAKS32R\n");
343#elif defined(CONFIG_PLAT_M32104UT)
344 seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n");
345#else
346 seq_printf(m, "Machine\t\t: Unknown\n");
347#endif
348
349#define PRINT_CLOCK(name, value) \
350 seq_printf(m, name " clock\t: %d.%02dMHz\n", \
351 ((value) / 1000000), ((value) % 1000000)/10000)
352
353 PRINT_CLOCK("CPU", (int)c->cpu_clock);
354 PRINT_CLOCK("Bus", (int)c->bus_clock);
355
356 seq_printf(m, "\n");
357
358 return 0;
359}
360
361static void *c_start(struct seq_file *m, loff_t *pos)
362{
363 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
364}
365
366static void *c_next(struct seq_file *m, void *v, loff_t *pos)
367{
368 ++*pos;
369 return c_start(m, pos);
370}
371
372static void c_stop(struct seq_file *m, void *v)
373{
374}
375
376const struct seq_operations cpuinfo_op = {
377 .start = c_start,
378 .next = c_next,
379 .stop = c_stop,
380 .show = show_cpuinfo,
381};
382#endif /* CONFIG_PROC_FS */
383
384unsigned long cpu_initialized __initdata = 0;
385
386/*
387 * cpu_init() initializes state that is per-CPU. Some data is already
388 * initialized (naturally) in the bootstrap process.
389 * We reload them nevertheless, this function acts as a
390 * 'CPU state barrier', nothing should get across.
391 */
392#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
393 || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
394 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
395void __init cpu_init (void)
396{
397 int cpu_id = smp_processor_id();
398
399 if (test_and_set_bit(cpu_id, &cpu_initialized)) {
400 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
401 for ( ; ; )
402 local_irq_enable();
403 }
404 printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
405
406 /* Set up and load the per-CPU TSS and LDT */
407 mmgrab(&init_mm);
408 current->active_mm = &init_mm;
409 if (current->mm)
410 BUG();
411
412 /* Force FPU initialization */
413 current_thread_info()->status = 0;
414 clear_used_math();
415
416#ifdef CONFIG_MMU
417 /* Set up MMU */
418 init_mmu();
419#endif
420
421 /* Set up ICUIMASK */
422 outl(0x00070000, M32R_ICU_IMASK_PORTL); /* imask=111 */
423}
424#endif /* defined(CONFIG_CHIP_VDEC2) ... */
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