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authorLinus Torvalds <torvalds@linux-foundation.org>2016-10-08 00:29:04 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-10-08 00:29:04 -0400
commit00e729c933950cda694c49260ff67855fdbfd00a (patch)
tree03bb4c9fdd244a976b99df0f71c5dccd59dc3f20 /arch/arm
parent6afd563d4bbc1924b7de9e053324c007e0d36476 (diff)
parentadff807988f92d4646c50b601936e340a92d5455 (diff)
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann: "These are as usual a very large number of mostly boring updates to enable devices in existing machines, or to fix minor bugs. Notably, an ongoing treewide effort to fix warnings caused by an update to the device tree compiler. These are enabled with "make W=1" at the moment but can hopefully become the default once all issues have been addressed. No new SoC platform is added this time around (Armada 395 and Orion mv88f5181 are slight variations of existing ones), but a significant number of new dts files are added, which I list by platform: - Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets, Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange Pi Lite, Olimex A33-Olinuxino, and Nano Pi Neo single-board computers - ARM Realview: all supported machines (ported from board files) - Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and BCM958622hr reference boards for Northstar platform, Raspberry Pi Zero single-board computer - Marvell EBU: Netgear WNR854T router (ported from board file), Armada 395 SoC platform and GP board Armada 390 DB development board - NXP i.MX: imx7s Warp7 reference board, Gateworks Ventana GW553x single-board computer, Technologic Systems TS-4900 and Engicam IMX6UL GEA M6UL computer-on-module, Inverse Path USB armory board - Qualcomm: LG Nexus 5 Phone - Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards - Rockchip: Rockchip RK3288 Fennec reference board, Firefly RK3288 Reload platform - ST Microelectronics STi: B2260 (96boards) single-board computer - TI Davinci: OMAP-L138 LCDK Development kit - TI OMAP: beagleboard-x15 rev B1 single-board computer" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (390 commits) ARM: dts: sony-nsz-gs7: add missing unit name to /memory node ARM: dts: chromecast: add missing unit name to /memory node ARM: dts: berlin2q-marvell-dmp: add missing unit name to /memory node ARM: dts: berlin2: Add missing unit name to /soc node ARM: dts: berlin2cd: Add missing unit name to /soc node ARM: dts: berlin2q: Add missing unit name to /soc node ARM: dts: berlin2: Remove skeleton.dtsi inclusion ARM: dts: berlin2cd: Remove skeleton.dtsi inclusion ARM: dts: berlin2q: Remove skeleton.dtsi inclusion arm: dts: berlin2q: enable all wdt nodes unconditionally arm: dts: berlin2: enable all wdt nodes unconditionally ARM: dts: omap5-igep0050.dts: Use tabs for indentation ARM: dts: Fix igepv5 power button GPIO direction ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node ARM: dts: s3c64xx: Use macros for pinctrl configuration ARM: dts: s3c2416: Use macros for pinctrl configuration ARM: dts: s5pv210: Use macros for pinctrl configuration ARM: dts: s3c64xx: Use common macros for pinctrl configuration ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/Makefile58
-rw-r--r--arch/arm/boot/dts/am335x-baltos.dtsi6
-rw-r--r--arch/arm/boot/dts/am335x-base0033.dts4
-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi12
-rw-r--r--arch/arm/boot/dts/am335x-boneblack.dts11
-rw-r--r--arch/arm/boot/dts/am335x-chilisom.dtsi2
-rw-r--r--arch/arm/boot/dts/am335x-cm-t335.dts8
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts18
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts70
-rw-r--r--arch/arm/boot/dts/am335x-icev2.dts47
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi8
-rw-r--r--arch/arm/boot/dts/am335x-lxm.dts6
-rw-r--r--arch/arm/boot/dts/am335x-nano.dts4
-rw-r--r--arch/arm/boot/dts/am335x-pepper.dts18
-rw-r--r--arch/arm/boot/dts/am335x-phycore-som.dtsi4
-rw-r--r--arch/arm/boot/dts/am335x-shc.dts16
-rw-r--r--arch/arm/boot/dts/am335x-sl50.dts15
-rw-r--r--arch/arm/boot/dts/am335x-wega.dtsi64
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi92
-rw-r--r--arch/arm/boot/dts/am3517-craneboard.dts2
-rw-r--r--arch/arm/boot/dts/am3517-evm.dts2
-rw-r--r--arch/arm/boot/dts/am3517.dtsi2
-rw-r--r--arch/arm/boot/dts/am3517_mt_ventoux.dts2
-rw-r--r--arch/arm/boot/dts/am4372.dtsi10
-rw-r--r--arch/arm/boot/dts/am437x-cm-t43.dts6
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts21
-rw-r--r--arch/arm/boot/dts/am437x-idk-evm.dts2
-rw-r--r--arch/arm/boot/dts/am437x-sk-evm.dts45
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts11
-rw-r--r--arch/arm/boot/dts/am572x-idk.dts2
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi596
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts24
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts812
-rw-r--r--arch/arm/boot/dts/am57xx-cl-som-am57x.dts4
-rw-r--r--arch/arm/boot/dts/am57xx-idk-common.dtsi49
-rw-r--r--arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dts32
-rw-r--r--arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dts28
-rw-r--r--arch/arm/boot/dts/arm-realview-eb-11mp-ctrevb.dts (renamed from arch/arm/boot/dts/arm-realview-eb-11mp-revb.dts)0
-rw-r--r--arch/arm/boot/dts/arm-realview-eb-11mp.dts2
-rw-r--r--arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dts28
-rw-r--r--arch/arm/boot/dts/arm-realview-eb-bbrevd.dts29
-rw-r--r--arch/arm/boot/dts/arm-realview-eb-bbrevd.dtsi45
-rw-r--r--arch/arm/boot/dts/arm-realview-eb.dtsi23
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts29
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi40
-rw-r--r--arch/arm/boot/dts/armada-370-synology-ds213j.dts112
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi56
-rw-r--r--arch/arm/boot/dts/armada-370.dtsi34
-rw-r--r--arch/arm/boot/dts/armada-385-db-ap.dts58
-rw-r--r--arch/arm/boot/dts/armada-385-linksys.dtsi9
-rw-r--r--arch/arm/boot/dts/armada-388-clearfog.dts48
-rw-r--r--arch/arm/boot/dts/armada-388-db.dts25
-rw-r--r--arch/arm/boot/dts/armada-388-gp.dts30
-rw-r--r--arch/arm/boot/dts/armada-388-rd.dts25
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi57
-rw-r--r--arch/arm/boot/dts/armada-390-db.dts175
-rw-r--r--arch/arm/boot/dts/armada-390.dtsi3
-rw-r--r--arch/arm/boot/dts/armada-395-gp.dts163
-rw-r--r--arch/arm/boot/dts/armada-395.dtsi76
-rw-r--r--arch/arm/boot/dts/armada-398-db.dts56
-rw-r--r--arch/arm/boot/dts/armada-398.dtsi10
-rw-r--r--arch/arm/boot/dts/armada-39x.dtsi126
-rw-r--r--arch/arm/boot/dts/armada-xp-axpwifiap.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-linksys-mamba.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-synology-ds414.dts112
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi31
-rw-r--r--arch/arm/boot/dts/armv7-m.dtsi2
-rw-r--r--arch/arm/boot/dts/artpec6.dtsi31
-rw-r--r--arch/arm/boot/dts/axp209.dtsi6
-rw-r--r--arch/arm/boot/dts/bcm-nsp.dtsi37
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-a-plus.dts1
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-a.dts1
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-b-plus.dts1
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts1
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-b.dts1
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-zero.dts40
-rw-r--r--arch/arm/boot/dts/bcm2836-rpi-2-b.dts1
-rw-r--r--arch/arm/boot/dts/bcm283x-rpi-usb-host.dtsi3
-rw-r--r--arch/arm/boot/dts/bcm283x.dtsi9
-rw-r--r--arch/arm/boot/dts/bcm5301x.dtsi11
-rw-r--r--arch/arm/boot/dts/bcm958522er.dts130
-rw-r--r--arch/arm/boot/dts/bcm958525er.dts142
-rw-r--r--arch/arm/boot/dts/bcm958525xmc.dts44
-rw-r--r--arch/arm/boot/dts/bcm958622hr.dts170
-rw-r--r--arch/arm/boot/dts/bcm958623hr.dts178
-rw-r--r--arch/arm/boot/dts/bcm958625hr.dts71
-rw-r--r--arch/arm/boot/dts/bcm958625k.dts13
-rw-r--r--arch/arm/boot/dts/bcm988312hr.dts182
-rw-r--r--arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts2
-rw-r--r--arch/arm/boot/dts/berlin2.dtsi7
-rw-r--r--arch/arm/boot/dts/berlin2cd-google-chromecast.dts2
-rw-r--r--arch/arm/boot/dts/berlin2cd.dtsi5
-rw-r--r--arch/arm/boot/dts/berlin2q-marvell-dmp.dts2
-rw-r--r--arch/arm/boot/dts/berlin2q.dtsi8
-rw-r--r--arch/arm/boot/dts/da850-evm.dts51
-rw-r--r--arch/arm/boot/dts/da850-lcdk.dts221
-rw-r--r--arch/arm/boot/dts/da850.dtsi80
-rw-r--r--arch/arm/boot/dts/dm8148-evm.dts4
-rw-r--r--arch/arm/boot/dts/dm8148-t410.dts4
-rw-r--r--arch/arm/boot/dts/dm814x.dtsi4
-rw-r--r--arch/arm/boot/dts/dm8168-evm.dts4
-rw-r--r--arch/arm/boot/dts/dm816x.dtsi4
-rw-r--r--arch/arm/boot/dts/dra62x-j5eco-evm.dts4
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts14
-rw-r--r--arch/arm/boot/dts/dra7.dtsi36
-rw-r--r--arch/arm/boot/dts/dra72-evm-common.dtsi4
-rw-r--r--arch/arm/boot/dts/dra72-evm-revc.dts2
-rw-r--r--arch/arm/boot/dts/dra72-evm.dts2
-rw-r--r--arch/arm/boot/dts/dra74x.dtsi1
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi15
-rw-r--r--arch/arm/boot/dts/efm32gg-dk3750.dts5
-rw-r--r--arch/arm/boot/dts/efm32gg.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos3250-artik5.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos3250-monk.dts3
-rw-r--r--arch/arm/boot/dts/exynos3250-pinctrl.dtsi346
-rw-r--r--arch/arm/boot/dts/exynos3250-rinato.dts3
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts3
-rw-r--r--arch/arm/boot/dts/exynos4210-pinctrl.dtsi458
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts15
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts3
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts13
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi16
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidu3.dts3
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidx.dts5
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidx2.dts3
-rw-r--r--arch/arm/boot/dts/exynos4412-origen.dts15
-rw-r--r--arch/arm/boot/dts/exynos4412-smdk4412.dts15
-rw-r--r--arch/arm/boot/dts/exynos4412-tiny4412.dts3
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts3
-rw-r--r--arch/arm/boot/dts/exynos4415-pinctrl.dtsi296
-rw-r--r--arch/arm/boot/dts/exynos4415.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos4x12-pinctrl.dtsi525
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos5.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts5
-rw-r--r--arch/arm/boot/dts/exynos5250-pinctrl.dtsi404
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts11
-rw-r--r--arch/arm/boot/dts/exynos5250-snow-common.dtsi81
-rw-r--r--arch/arm/boot/dts/exynos5250-snow-rev5.dts6
-rw-r--r--arch/arm/boot/dts/exynos5250-snow.dts6
-rw-r--r--arch/arm/boot/dts/exynos5250-spring.dts77
-rw-r--r--arch/arm/boot/dts/exynos5260-pinctrl.dtsi280
-rw-r--r--arch/arm/boot/dts/exynos5260-xyref5260.dts9
-rw-r--r--arch/arm/boot/dts/exynos5260.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos5410-odroidxu.dts35
-rw-r--r--arch/arm/boot/dts/exynos5410-pinctrl.dtsi182
-rw-r--r--arch/arm/boot/dts/exynos5410-smdk5410.dts13
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts22
-rw-r--r--arch/arm/boot/dts/exynos5420-peach-pit.dts131
-rw-r--r--arch/arm/boot/dts/exynos5420-pinctrl.dtsi356
-rw-r--r--arch/arm/boot/dts/exynos5420-smdk5420.dts23
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi25
-rw-r--r--arch/arm/boot/dts/exynos5440-sd5v1.dts6
-rw-r--r--arch/arm/boot/dts/exynos5440-ssdk5440.dts6
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi3
-rw-r--r--arch/arm/boot/dts/exynos54xx.dtsi1
-rw-r--r--arch/arm/boot/dts/exynos5800-peach-pi.dts131
-rw-r--r--arch/arm/boot/dts/imx35.dtsi7
-rw-r--r--arch/arm/boot/dts/imx50.dtsi10
-rw-r--r--arch/arm/boot/dts/imx53-usbarmory.dts224
-rw-r--r--arch/arm/boot/dts/imx53.dtsi18
-rw-r--r--arch/arm/boot/dts/imx6dl-gw553x.dts55
-rw-r--r--arch/arm/boot/dts/imx6dl-riotboard.dts22
-rw-r--r--arch/arm/boot/dts/imx6dl-ts4900.dts49
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi53
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts24
-rw-r--r--arch/arm/boot/dts/imx6q-b450v3.dts16
-rw-r--r--arch/arm/boot/dts/imx6q-b650v3.dts9
-rw-r--r--arch/arm/boot/dts/imx6q-ba16.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6q-bx50v3.dtsi70
-rw-r--r--arch/arm/boot/dts/imx6q-cm-fx6.dts24
-rw-r--r--arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts24
-rw-r--r--arch/arm/boot/dts/imx6q-evi.dts28
-rw-r--r--arch/arm/boot/dts/imx6q-gw5400-a.dts24
-rw-r--r--arch/arm/boot/dts/imx6q-gw553x.dts55
-rw-r--r--arch/arm/boot/dts/imx6q-marsboard.dts24
-rw-r--r--arch/arm/boot/dts/imx6q-novena.dts12
-rw-r--r--arch/arm/boot/dts/imx6q-sbc6x.dts24
-rw-r--r--arch/arm/boot/dts/imx6q-tbs2910.dts24
-rw-r--r--arch/arm/boot/dts/imx6q-ts4900.dts53
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi37
-rw-r--r--arch/arm/boot/dts/imx6qdl-apalis.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw51xx.dtsi36
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw52xx.dtsi39
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw53xx.dtsi39
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw54xx.dtsi44
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw551x.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw552x.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw553x.dtsi433
-rw-r--r--arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi36
-rw-r--r--arch/arm/boot/dts/imx6qdl-rex.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabreauto.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabrelite.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-ts4900.dtsi481
-rw-r--r--arch/arm/boot/dts/imx6qdl-udoo.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6qdl-wandboard.dtsi24
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi47
-rw-r--r--arch/arm/boot/dts/imx6sx-pinfunc.h14
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi22
-rw-r--r--arch/arm/boot/dts/imx6ul-geam-kit.dts101
-rw-r--r--arch/arm/boot/dts/imx6ul-geam.dtsi361
-rw-r--r--arch/arm/boot/dts/imx6ul-pico-hobbit.dts33
-rw-r--r--arch/arm/boot/dts/imx6ul.dtsi9
-rw-r--r--arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi4
-rw-r--r--arch/arm/boot/dts/imx7-colibri.dtsi61
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi42
-rw-r--r--arch/arm/boot/dts/imx7s-warp.dts446
-rw-r--r--arch/arm/boot/dts/imx7s.dtsi371
-rw-r--r--arch/arm/boot/dts/keystone-k2e-evm.dts12
-rw-r--r--arch/arm/boot/dts/keystone-k2e.dtsi4
-rw-r--r--arch/arm/boot/dts/keystone-k2g.dtsi32
-rw-r--r--arch/arm/boot/dts/keystone-k2hk-evm.dts6
-rw-r--r--arch/arm/boot/dts/keystone-k2l-evm.dts6
-rw-r--r--arch/arm/boot/dts/keystone.dtsi4
-rw-r--r--arch/arm/boot/dts/kirkwood-openblocks_a6.dts9
-rw-r--r--arch/arm/boot/dts/logicpd-torpedo-som.dtsi5
-rw-r--r--arch/arm/boot/dts/lpc18xx.dtsi7
-rw-r--r--arch/arm/boot/dts/lpc4337-ciaa.dts2
-rw-r--r--arch/arm/boot/dts/lpc4350-hitex-eval.dts4
-rw-r--r--arch/arm/boot/dts/lpc4357-ea4357-devkit.dts2
-rw-r--r--arch/arm/boot/dts/ls1021a-twr.dts13
-rw-r--r--arch/arm/boot/dts/meson8b.dtsi21
-rw-r--r--arch/arm/boot/dts/mps2.dtsi1
-rw-r--r--arch/arm/boot/dts/omap2.dtsi4
-rw-r--r--arch/arm/boot/dts/omap2420-h4.dts2
-rw-r--r--arch/arm/boot/dts/omap2420-n8x0-common.dtsi2
-rw-r--r--arch/arm/boot/dts/omap2430-sdp.dts2
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts2
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts2
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-devkit8000-common.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-evm-37xx.dts2
-rw-r--r--arch/arm/boot/dts/omap3-evm.dts2
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-ldp.dts2
-rw-r--r--arch/arm/boot/dts/omap3-lilly-a83x.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts2
-rw-r--r--arch/arm/boot/dts/omap3-n950-n9.dtsi6
-rw-r--r--arch/arm/boot/dts/omap3-overo-alto35-common.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-overo-base.dtsi6
-rw-r--r--arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-overo-palo35-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-overo-palo43-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-pandora-common.dtsi10
-rw-r--r--arch/arm/boot/dts/omap3-sniper.dts2
-rw-r--r--arch/arm/boot/dts/omap3-tao3530.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-zoom3.dts2
-rw-r--r--arch/arm/boot/dts/omap3.dtsi6
-rw-r--r--arch/arm/boot/dts/omap3430-sdp.dts2
-rw-r--r--arch/arm/boot/dts/omap34xx.dtsi2
-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi2
-rw-r--r--arch/arm/boot/dts/omap4-duovero-parlor.dts2
-rw-r--r--arch/arm/boot/dts/omap4-duovero.dtsi2
-rw-r--r--arch/arm/boot/dts/omap4-kc1.dts2
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts2
-rw-r--r--arch/arm/boot/dts/omap4-var-som-om44.dtsi2
-rw-r--r--arch/arm/boot/dts/omap4.dtsi4
-rw-r--r--arch/arm/boot/dts/omap5-board-common.dtsi29
-rw-r--r--arch/arm/boot/dts/omap5-cm-t54.dts6
-rw-r--r--arch/arm/boot/dts/omap5-igep0050.dts42
-rw-r--r--arch/arm/boot/dts/omap5-uevm.dts18
-rw-r--r--arch/arm/boot/dts/omap5.dtsi26
-rw-r--r--arch/arm/boot/dts/orion5x-mv88f5181.dtsi49
-rw-r--r--arch/arm/boot/dts/orion5x-netgear-wnr854t.dts251
-rw-r--r--arch/arm/boot/dts/orion5x.dtsi3
-rw-r--r--arch/arm/boot/dts/qcom-apq8060-dragonboard.dts39
-rw-r--r--arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts15
-rw-r--r--arch/arm/boot/dts/qcom-apq8064.dtsi180
-rw-r--r--arch/arm/boot/dts/qcom-apq8084.dtsi103
-rw-r--r--arch/arm/boot/dts/qcom-ipq8064-ap148.dts1
-rw-r--r--arch/arm/boot/dts/qcom-msm8660.dtsi75
-rw-r--r--arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts262
-rw-r--r--arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts81
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi139
-rw-r--r--arch/arm/boot/dts/qcom-pm8941.dtsi5
-rw-r--r--arch/arm/boot/dts/r7s72100-rskrza1.dts61
-rw-r--r--arch/arm/boot/dts/r7s72100.dtsi22
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi23
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi18
-rw-r--r--arch/arm/boot/dts/r8a7792-blanche.dts264
-rw-r--r--arch/arm/boot/dts/r8a7792-wheat.dts199
-rw-r--r--arch/arm/boot/dts/r8a7792.dtsi554
-rw-r--r--arch/arm/boot/dts/r8a7794-alt.dts106
-rw-r--r--arch/arm/boot/dts/r8a7794-silk.dts70
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi309
-rw-r--r--arch/arm/boot/dts/rk3036.dtsi12
-rw-r--r--arch/arm/boot/dts/rk3288-evb-act8846.dts4
-rw-r--r--arch/arm/boot/dts/rk3288-evb-rk808.dts4
-rw-r--r--arch/arm/boot/dts/rk3288-evb.dtsi45
-rw-r--r--arch/arm/boot/dts/rk3288-fennec.dts382
-rw-r--r--arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi310
-rw-r--r--arch/arm/boot/dts/rk3288-firefly-reload.dts403
-rw-r--r--arch/arm/boot/dts/rk3288-popmetal.dts12
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi73
-rw-r--r--arch/arm/boot/dts/rk3xxx.dtsi12
-rw-r--r--arch/arm/boot/dts/s3c2416-pinctrl.dtsi38
-rw-r--r--arch/arm/boot/dts/s3c6410-mini6410.dts4
-rw-r--r--arch/arm/boot/dts/s3c64xx-pinctrl.dtsi356
-rw-r--r--arch/arm/boot/dts/s5pv210-aquila.dts6
-rw-r--r--arch/arm/boot/dts/s5pv210-goni.dts2
-rw-r--r--arch/arm/boot/dts/s5pv210-pinctrl.dtsi476
-rw-r--r--arch/arm/boot/dts/s5pv210-smdkc110.dts2
-rw-r--r--arch/arm/boot/dts/s5pv210-smdkv210.dts2
-rw-r--r--arch/arm/boot/dts/s5pv210-torbreck.dts2
-rw-r--r--arch/arm/boot/dts/s5pv210.dtsi4
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi29
-rw-r--r--arch/arm/boot/dts/skeleton.dtsi4
-rw-r--r--arch/arm/boot/dts/ste-nomadik-nhk15.dts68
-rw-r--r--arch/arm/boot/dts/ste-nomadik-stn8815.dtsi28
-rw-r--r--arch/arm/boot/dts/stih407-clock.dtsi22
-rw-r--r--arch/arm/boot/dts/stih407-family.dtsi173
-rw-r--r--arch/arm/boot/dts/stih407-pinctrl.dtsi140
-rw-r--r--arch/arm/boot/dts/stih407.dtsi16
-rw-r--r--arch/arm/boot/dts/stih410-b2260.dts194
-rw-r--r--arch/arm/boot/dts/stih410-clock.dtsi20
-rw-r--r--arch/arm/boot/dts/stih410.dtsi34
-rw-r--r--arch/arm/boot/dts/stih415-pinctrl.dtsi54
-rw-r--r--arch/arm/boot/dts/stih416-b2020e.dts6
-rw-r--r--arch/arm/boot/dts/stih416-pinctrl.dtsi65
-rw-r--r--arch/arm/boot/dts/stih416.dtsi8
-rw-r--r--arch/arm/boot/dts/stih418-b2199.dts8
-rw-r--r--arch/arm/boot/dts/stih418-clock.dtsi20
-rw-r--r--arch/arm/boot/dts/stih41x-b2000.dtsi5
-rw-r--r--arch/arm/boot/dts/stih41x-b2020.dtsi6
-rw-r--r--arch/arm/boot/dts/stihxxx-b2120.dtsi52
-rw-r--r--arch/arm/boot/dts/stm32f429.dtsi1
-rw-r--r--arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts4
-rw-r--r--arch/arm/boot/dts/sun5i-a13-empire-electronix-m712.dts51
-rw-r--r--arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts164
-rw-r--r--arch/arm/boot/dts/sun5i-r8-chip.dts10
-rw-r--r--arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts138
-rw-r--r--arch/arm/boot/dts/sun6i-a31s-inet-q972.dts100
-rw-r--r--arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi193
-rw-r--r--arch/arm/boot/dts/sun8i-a23-a33.dtsi21
-rw-r--r--arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts192
-rw-r--r--arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts42
-rw-r--r--arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts42
-rw-r--r--arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts18
-rw-r--r--arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts88
-rw-r--r--arch/arm/boot/dts/sun8i-a33-olinuxino.dts226
-rw-r--r--arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts125
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-2.dts10
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts178
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts88
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts53
-rw-r--r--arch/arm/boot/dts/sun8i-h3.dtsi8
-rw-r--r--arch/arm/boot/dts/sun8i-q8-common.dtsi49
-rw-r--r--arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi26
-rw-r--r--arch/arm/boot/dts/sun9i-a80-cubieboard4.dts29
-rw-r--r--arch/arm/boot/dts/sun9i-a80-optimus.dts29
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi14
-rw-r--r--arch/arm/boot/dts/tegra114.dtsi8
-rw-r--r--arch/arm/boot/dts/uniphier-common32.dtsi63
-rw-r--r--arch/arm/boot/dts/uniphier-ld4-ref.dts (renamed from arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-ld4.dtsi (renamed from arch/arm/boot/dts/uniphier-ph1-ld4.dtsi)59
-rw-r--r--arch/arm/boot/dts/uniphier-ld6b-ref.dts (renamed from arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-ld6b.dtsi (renamed from arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi)17
-rw-r--r--arch/arm/boot/dts/uniphier-pro4-ace.dts (renamed from arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-pro4-ref.dts (renamed from arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-pro4-sanji.dts (renamed from arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-pro4.dtsi (renamed from arch/arm/boot/dts/uniphier-ph1-pro4.dtsi)63
-rw-r--r--arch/arm/boot/dts/uniphier-pro5.dtsi (renamed from arch/arm/boot/dts/uniphier-ph1-pro5.dtsi)58
-rw-r--r--arch/arm/boot/dts/uniphier-pxs2-gentil.dts (renamed from arch/arm/boot/dts/uniphier-proxstream2-gentil.dts)12
-rw-r--r--arch/arm/boot/dts/uniphier-pxs2-vodka.dts (renamed from arch/arm/boot/dts/uniphier-proxstream2-vodka.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-pxs2.dtsi (renamed from arch/arm/boot/dts/uniphier-proxstream2.dtsi)62
-rw-r--r--arch/arm/boot/dts/uniphier-sld3-ref.dts (renamed from arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-sld3.dtsi (renamed from arch/arm/boot/dts/uniphier-ph1-sld3.dtsi)75
-rw-r--r--arch/arm/boot/dts/uniphier-sld8-ref.dts (renamed from arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts)11
-rw-r--r--arch/arm/boot/dts/uniphier-sld8.dtsi (renamed from arch/arm/boot/dts/uniphier-ph1-sld8.dtsi)59
-rw-r--r--arch/arm/boot/dts/vf-colibri-eval-v3.dtsi13
-rw-r--r--arch/arm/boot/dts/vf610m4.dtsi1
-rw-r--r--arch/arm/mach-davinci/da8xx-dt.c1
-rw-r--r--arch/arm/mach-nomadik/Kconfig1
388 files changed, 15940 insertions, 5397 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index faacd52370d2..cf989f264de0 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -69,7 +69,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
69 bcm2835-rpi-b-rev2.dtb \ 69 bcm2835-rpi-b-rev2.dtb \
70 bcm2835-rpi-b-plus.dtb \ 70 bcm2835-rpi-b-plus.dtb \
71 bcm2835-rpi-a-plus.dtb \ 71 bcm2835-rpi-a-plus.dtb \
72 bcm2836-rpi-2-b.dtb 72 bcm2836-rpi-2-b.dtb \
73 bcm2835-rpi-zero.dtb
73dtb-$(CONFIG_ARCH_BCM_5301X) += \ 74dtb-$(CONFIG_ARCH_BCM_5301X) += \
74 bcm4708-asus-rt-ac56u.dtb \ 75 bcm4708-asus-rt-ac56u.dtb \
75 bcm4708-asus-rt-ac68u.dtb \ 76 bcm4708-asus-rt-ac68u.dtb \
@@ -102,8 +103,13 @@ dtb-$(CONFIG_ARCH_BCM_MOBILE) += \
102 bcm21664-garnet.dtb \ 103 bcm21664-garnet.dtb \
103 bcm23550-sparrow.dtb 104 bcm23550-sparrow.dtb
104dtb-$(CONFIG_ARCH_BCM_NSP) += \ 105dtb-$(CONFIG_ARCH_BCM_NSP) += \
106 bcm958522er.dtb \
107 bcm958525er.dtb \
105 bcm958525xmc.dtb \ 108 bcm958525xmc.dtb \
109 bcm958622hr.dtb \
110 bcm958623hr.dtb \
106 bcm958625hr.dtb \ 111 bcm958625hr.dtb \
112 bcm988312hr.dtb \
107 bcm958625k.dtb 113 bcm958625k.dtb
108dtb-$(CONFIG_ARCH_BERLIN) += \ 114dtb-$(CONFIG_ARCH_BERLIN) += \
109 berlin2-sony-nsz-gs7.dtb \ 115 berlin2-sony-nsz-gs7.dtb \
@@ -114,6 +120,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
114dtb-$(CONFIG_ARCH_CLPS711X) += \ 120dtb-$(CONFIG_ARCH_CLPS711X) += \
115 ep7211-edb7211.dtb 121 ep7211-edb7211.dtb
116dtb-$(CONFIG_ARCH_DAVINCI) += \ 122dtb-$(CONFIG_ARCH_DAVINCI) += \
123 da850-lcdk.dtb \
117 da850-enbw-cmc.dtb \ 124 da850-enbw-cmc.dtb \
118 da850-evm.dtb 125 da850-evm.dtb
119dtb-$(CONFIG_ARCH_DIGICOLOR) += \ 126dtb-$(CONFIG_ARCH_DIGICOLOR) += \
@@ -315,6 +322,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
315 imx53-smd.dtb \ 322 imx53-smd.dtb \
316 imx53-tx53-x03x.dtb \ 323 imx53-tx53-x03x.dtb \
317 imx53-tx53-x13x.dtb \ 324 imx53-tx53-x13x.dtb \
325 imx53-usbarmory.dtb \
318 imx53-voipac-bsb.dtb 326 imx53-voipac-bsb.dtb
319dtb-$(CONFIG_SOC_IMX6Q) += \ 327dtb-$(CONFIG_SOC_IMX6Q) += \
320 imx6dl-apf6dev.dtb \ 328 imx6dl-apf6dev.dtb \
@@ -330,6 +338,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
330 imx6dl-gw54xx.dtb \ 338 imx6dl-gw54xx.dtb \
331 imx6dl-gw551x.dtb \ 339 imx6dl-gw551x.dtb \
332 imx6dl-gw552x.dtb \ 340 imx6dl-gw552x.dtb \
341 imx6dl-gw553x.dtb \
333 imx6dl-hummingboard.dtb \ 342 imx6dl-hummingboard.dtb \
334 imx6dl-nit6xlite.dtb \ 343 imx6dl-nit6xlite.dtb \
335 imx6dl-nitrogen6x.dtb \ 344 imx6dl-nitrogen6x.dtb \
@@ -339,6 +348,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
339 imx6dl-sabreauto.dtb \ 348 imx6dl-sabreauto.dtb \
340 imx6dl-sabrelite.dtb \ 349 imx6dl-sabrelite.dtb \
341 imx6dl-sabresd.dtb \ 350 imx6dl-sabresd.dtb \
351 imx6dl-ts4900.dtb \
342 imx6dl-tx6dl-comtft.dtb \ 352 imx6dl-tx6dl-comtft.dtb \
343 imx6dl-tx6s-8034.dtb \ 353 imx6dl-tx6s-8034.dtb \
344 imx6dl-tx6s-8035.dtb \ 354 imx6dl-tx6s-8035.dtb \
@@ -368,6 +378,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
368 imx6q-gw54xx.dtb \ 378 imx6q-gw54xx.dtb \
369 imx6q-gw551x.dtb \ 379 imx6q-gw551x.dtb \
370 imx6q-gw552x.dtb \ 380 imx6q-gw552x.dtb \
381 imx6q-gw553x.dtb \
371 imx6q-h100.dtb \ 382 imx6q-h100.dtb \
372 imx6q-hummingboard.dtb \ 383 imx6q-hummingboard.dtb \
373 imx6q-icore-rqs.dtb \ 384 imx6q-icore-rqs.dtb \
@@ -382,6 +393,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
382 imx6q-sabresd.dtb \ 393 imx6q-sabresd.dtb \
383 imx6q-sbc6x.dtb \ 394 imx6q-sbc6x.dtb \
384 imx6q-tbs2910.dtb \ 395 imx6q-tbs2910.dtb \
396 imx6q-ts4900.dtb \
385 imx6q-tx6q-1010.dtb \ 397 imx6q-tx6q-1010.dtb \
386 imx6q-tx6q-1010-comtft.dtb \ 398 imx6q-tx6q-1010-comtft.dtb \
387 imx6q-tx6q-1020.dtb \ 399 imx6q-tx6q-1020.dtb \
@@ -407,6 +419,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
407 imx6sx-sdb.dtb 419 imx6sx-sdb.dtb
408dtb-$(CONFIG_SOC_IMX6UL) += \ 420dtb-$(CONFIG_SOC_IMX6UL) += \
409 imx6ul-14x14-evk.dtb \ 421 imx6ul-14x14-evk.dtb \
422 imx6ul-geam-kit.dtb \
410 imx6ul-pico-hobbit.dtb \ 423 imx6ul-pico-hobbit.dtb \
411 imx6ul-tx6ul-0010.dtb \ 424 imx6ul-tx6ul-0010.dtb \
412 imx6ul-tx6ul-0011.dtb \ 425 imx6ul-tx6ul-0011.dtb \
@@ -417,7 +430,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
417 imx7d-nitrogen7.dtb \ 430 imx7d-nitrogen7.dtb \
418 imx7d-sbc-imx7.dtb \ 431 imx7d-sbc-imx7.dtb \
419 imx7d-sdb.dtb \ 432 imx7d-sdb.dtb \
420 imx7s-colibri-eval-v3.dtb 433 imx7s-colibri-eval-v3.dtb \
434 imx7s-warp.dtb
421dtb-$(CONFIG_SOC_LS1021A) += \ 435dtb-$(CONFIG_SOC_LS1021A) += \
422 ls1021a-qds.dtb \ 436 ls1021a-qds.dtb \
423 ls1021a-twr.dtb 437 ls1021a-twr.dtb
@@ -570,6 +584,7 @@ dtb-$(CONFIG_SOC_OMAP5) += \
570 omap5-uevm.dtb 584 omap5-uevm.dtb
571dtb-$(CONFIG_SOC_DRA7XX) += \ 585dtb-$(CONFIG_SOC_DRA7XX) += \
572 am57xx-beagle-x15.dtb \ 586 am57xx-beagle-x15.dtb \
587 am57xx-beagle-x15-revb1.dtb \
573 am57xx-cl-som-am57x.dtb \ 588 am57xx-cl-som-am57x.dtb \
574 am57xx-sbc-am57x.dtb \ 589 am57xx-sbc-am57x.dtb \
575 am572x-idk.dtb \ 590 am572x-idk.dtb \
@@ -584,6 +599,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
584 orion5x-linkstation-lswtgl.dtb \ 599 orion5x-linkstation-lswtgl.dtb \
585 orion5x-lswsgl.dtb \ 600 orion5x-lswsgl.dtb \
586 orion5x-maxtor-shared-storage-2.dtb \ 601 orion5x-maxtor-shared-storage-2.dtb \
602 orion5x-netgear-wnr854t.dtb \
587 orion5x-rd88f5182-nas.dtb 603 orion5x-rd88f5182-nas.dtb
588dtb-$(CONFIG_ARCH_PRIMA2) += \ 604dtb-$(CONFIG_ARCH_PRIMA2) += \
589 prima2-evb.dtb 605 prima2-evb.dtb
@@ -603,14 +619,19 @@ dtb-$(CONFIG_ARCH_QCOM) += \
603 qcom-ipq8064-ap148.dtb \ 619 qcom-ipq8064-ap148.dtb \
604 qcom-msm8660-surf.dtb \ 620 qcom-msm8660-surf.dtb \
605 qcom-msm8960-cdp.dtb \ 621 qcom-msm8960-cdp.dtb \
622 qcom-msm8974-lge-nexus5-hammerhead.dtb \
606 qcom-msm8974-sony-xperia-honami.dtb 623 qcom-msm8974-sony-xperia-honami.dtb
607dtb-$(CONFIG_ARCH_REALVIEW) += \ 624dtb-$(CONFIG_ARCH_REALVIEW) += \
608 arm-realview-pb1176.dtb \ 625 arm-realview-pb1176.dtb \
609 arm-realview-pb11mp.dtb \ 626 arm-realview-pb11mp.dtb \
610 arm-realview-eb.dtb \ 627 arm-realview-eb.dtb \
628 arm-realview-eb-bbrevd.dtb \
611 arm-realview-eb-11mp.dtb \ 629 arm-realview-eb-11mp.dtb \
612 arm-realview-eb-11mp-revb.dtb \ 630 arm-realview-eb-11mp-bbrevd.dtb \
631 arm-realview-eb-11mp-ctrevb.dtb \
632 arm-realview-eb-11mp-bbrevd-ctrevb.dtb \
613 arm-realview-eb-a9mp.dtb \ 633 arm-realview-eb-a9mp.dtb \
634 arm-realview-eb-a9mp-bbrevd.dtb \
614 arm-realview-pba8.dtb \ 635 arm-realview-pba8.dtb \
615 arm-realview-pbx-a9.dtb 636 arm-realview-pbx-a9.dtb
616dtb-$(CONFIG_ARCH_ROCKCHIP) += \ 637dtb-$(CONFIG_ARCH_ROCKCHIP) += \
@@ -624,8 +645,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
624 rk3229-evb.dtb \ 645 rk3229-evb.dtb \
625 rk3288-evb-act8846.dtb \ 646 rk3288-evb-act8846.dtb \
626 rk3288-evb-rk808.dtb \ 647 rk3288-evb-rk808.dtb \
648 rk3288-fennec.dtb \
627 rk3288-firefly-beta.dtb \ 649 rk3288-firefly-beta.dtb \
628 rk3288-firefly.dtb \ 650 rk3288-firefly.dtb \
651 rk3288-firefly-reload.dtb \
629 rk3288-miqi.dtb \ 652 rk3288-miqi.dtb \
630 rk3288-popmetal.dtb \ 653 rk3288-popmetal.dtb \
631 rk3288-r89.dtb \ 654 rk3288-r89.dtb \
@@ -651,6 +674,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
651dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ 674dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
652 emev2-kzm9d.dtb \ 675 emev2-kzm9d.dtb \
653 r7s72100-genmai.dtb \ 676 r7s72100-genmai.dtb \
677 r7s72100-rskrza1.dtb \
654 r8a73a4-ape6evm.dtb \ 678 r8a73a4-ape6evm.dtb \
655 r8a7740-armadillo800eva.dtb \ 679 r8a7740-armadillo800eva.dtb \
656 r8a7778-bockw.dtb \ 680 r8a7778-bockw.dtb \
@@ -659,6 +683,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
659 r8a7791-koelsch.dtb \ 683 r8a7791-koelsch.dtb \
660 r8a7791-porter.dtb \ 684 r8a7791-porter.dtb \
661 r8a7792-blanche.dtb \ 685 r8a7792-blanche.dtb \
686 r8a7792-wheat.dtb \
662 r8a7793-gose.dtb \ 687 r8a7793-gose.dtb \
663 r8a7794-alt.dtb \ 688 r8a7794-alt.dtb \
664 r8a7794-silk.dtb \ 689 r8a7794-silk.dtb \
@@ -686,6 +711,7 @@ dtb-$(CONFIG_ARCH_SPEAR6XX) += \
686dtb-$(CONFIG_ARCH_STI) += \ 711dtb-$(CONFIG_ARCH_STI) += \
687 stih407-b2120.dtb \ 712 stih407-b2120.dtb \
688 stih410-b2120.dtb \ 713 stih410-b2120.dtb \
714 stih410-b2260.dtb \
689 stih415-b2000.dtb \ 715 stih415-b2000.dtb \
690 stih415-b2020.dtb \ 716 stih415-b2020.dtb \
691 stih416-b2000.dtb \ 717 stih416-b2000.dtb \
@@ -727,6 +753,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
727 sun5i-a10s-wobo-i5.dtb \ 753 sun5i-a10s-wobo-i5.dtb \
728 sun5i-a13-difrnce-dit4350.dtb \ 754 sun5i-a13-difrnce-dit4350.dtb \
729 sun5i-a13-empire-electronix-d709.dtb \ 755 sun5i-a13-empire-electronix-d709.dtb \
756 sun5i-a13-empire-electronix-m712.dtb \
730 sun5i-a13-hsg-h702.dtb \ 757 sun5i-a13-hsg-h702.dtb \
731 sun5i-a13-inet-98v-rev2.dtb \ 758 sun5i-a13-inet-98v-rev2.dtb \
732 sun5i-a13-olinuxino.dtb \ 759 sun5i-a13-olinuxino.dtb \
@@ -743,6 +770,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
743 sun6i-a31-mele-a1000g-quad.dtb \ 770 sun6i-a31-mele-a1000g-quad.dtb \
744 sun6i-a31s-colorfly-e708-q1.dtb \ 771 sun6i-a31s-colorfly-e708-q1.dtb \
745 sun6i-a31s-cs908.dtb \ 772 sun6i-a31s-cs908.dtb \
773 sun6i-a31s-inet-q972.dtb \
746 sun6i-a31s-primo81.dtb \ 774 sun6i-a31s-primo81.dtb \
747 sun6i-a31s-sina31s.dtb \ 775 sun6i-a31s-sina31s.dtb \
748 sun6i-a31s-sinovoip-bpi-m2.dtb \ 776 sun6i-a31s-sinovoip-bpi-m2.dtb \
@@ -782,16 +810,22 @@ dtb-$(CONFIG_MACH_SUN8I) += \
782 sun8i-a23-q8-tablet.dtb \ 810 sun8i-a23-q8-tablet.dtb \
783 sun8i-a33-et-q8-v1.6.dtb \ 811 sun8i-a33-et-q8-v1.6.dtb \
784 sun8i-a33-ga10h-v1.1.dtb \ 812 sun8i-a33-ga10h-v1.1.dtb \
813 sun8i-a33-inet-d978-rev2.dtb \
785 sun8i-a33-ippo-q8h-v1.2.dtb \ 814 sun8i-a33-ippo-q8h-v1.2.dtb \
815 sun8i-a33-olinuxino.dtb \
786 sun8i-a33-q8-tablet.dtb \ 816 sun8i-a33-q8-tablet.dtb \
787 sun8i-a33-sinlinx-sina33.dtb \ 817 sun8i-a33-sinlinx-sina33.dtb \
788 sun8i-a83t-allwinner-h8homlet-v2.dtb \ 818 sun8i-a83t-allwinner-h8homlet-v2.dtb \
789 sun8i-a83t-cubietruck-plus.dtb \ 819 sun8i-a83t-cubietruck-plus.dtb \
790 sun8i-h3-bananapi-m2-plus.dtb \ 820 sun8i-h3-bananapi-m2-plus.dtb \
821 sun8i-h3-nanopi-neo.dtb \
791 sun8i-h3-orangepi-2.dtb \ 822 sun8i-h3-orangepi-2.dtb \
823 sun8i-h3-orangepi-lite.dtb \
792 sun8i-h3-orangepi-one.dtb \ 824 sun8i-h3-orangepi-one.dtb \
793 sun8i-h3-orangepi-pc.dtb \ 825 sun8i-h3-orangepi-pc.dtb \
826 sun8i-h3-orangepi-pc-plus.dtb \
794 sun8i-h3-orangepi-plus.dtb \ 827 sun8i-h3-orangepi-plus.dtb \
828 sun8i-h3-orangepi-plus2e.dtb \
795 sun8i-r16-parrot.dtb 829 sun8i-r16-parrot.dtb
796dtb-$(CONFIG_MACH_SUN9I) += \ 830dtb-$(CONFIG_MACH_SUN9I) += \
797 sun9i-a80-optimus.dtb \ 831 sun9i-a80-optimus.dtb \
@@ -836,15 +870,15 @@ dtb-$(CONFIG_ARCH_U8500) += \
836 ste-ccu8540.dtb \ 870 ste-ccu8540.dtb \
837 ste-ccu9540.dtb 871 ste-ccu9540.dtb
838dtb-$(CONFIG_ARCH_UNIPHIER) += \ 872dtb-$(CONFIG_ARCH_UNIPHIER) += \
839 uniphier-ph1-ld4-ref.dtb \ 873 uniphier-ld4-ref.dtb \
840 uniphier-ph1-ld6b-ref.dtb \ 874 uniphier-ld6b-ref.dtb \
841 uniphier-ph1-pro4-ace.dtb \ 875 uniphier-pro4-ace.dtb \
842 uniphier-ph1-pro4-ref.dtb \ 876 uniphier-pro4-ref.dtb \
843 uniphier-ph1-pro4-sanji.dtb \ 877 uniphier-pro4-sanji.dtb \
844 uniphier-ph1-sld3-ref.dtb \ 878 uniphier-pxs2-gentil.dtb \
845 uniphier-ph1-sld8-ref.dtb \ 879 uniphier-pxs2-vodka.dtb \
846 uniphier-proxstream2-gentil.dtb \ 880 uniphier-sld3-ref.dtb \
847 uniphier-proxstream2-vodka.dtb 881 uniphier-sld8-ref.dtb
848dtb-$(CONFIG_ARCH_VERSATILE) += \ 882dtb-$(CONFIG_ARCH_VERSATILE) += \
849 versatile-ab.dtb \ 883 versatile-ab.dtb \
850 versatile-pb.dtb 884 versatile-pb.dtb
diff --git a/arch/arm/boot/dts/am335x-baltos.dtsi b/arch/arm/boot/dts/am335x-baltos.dtsi
index b689172632ef..dd45d172a892 100644
--- a/arch/arm/boot/dts/am335x-baltos.dtsi
+++ b/arch/arm/boot/dts/am335x-baltos.dtsi
@@ -24,12 +24,12 @@
24 }; 24 };
25 }; 25 };
26 26
27 memory { 27 memory@80000000 {
28 device_type = "memory"; 28 device_type = "memory";
29 reg = <0x80000000 0x10000000>; /* 256 MB */ 29 reg = <0x80000000 0x10000000>; /* 256 MB */
30 }; 30 };
31 31
32 vbat: fixedregulator@0 { 32 vbat: fixedregulator0 {
33 compatible = "regulator-fixed"; 33 compatible = "regulator-fixed";
34 regulator-name = "vbat"; 34 regulator-name = "vbat";
35 regulator-min-microvolt = <5000000>; 35 regulator-min-microvolt = <5000000>;
@@ -37,7 +37,7 @@
37 regulator-boot-on; 37 regulator-boot-on;
38 }; 38 };
39 39
40 wl12xx_vmmc: fixedregulator@2 { 40 wl12xx_vmmc: fixedregulator2 {
41 pinctrl-names = "default"; 41 pinctrl-names = "default";
42 pinctrl-0 = <&wl12xx_gpio>; 42 pinctrl-0 = <&wl12xx_gpio>;
43 compatible = "regulator-fixed"; 43 compatible = "regulator-fixed";
diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts
index 58a05f7d0b7c..c2bee452dab8 100644
--- a/arch/arm/boot/dts/am335x-base0033.dts
+++ b/arch/arm/boot/dts/am335x-base0033.dts
@@ -29,13 +29,13 @@
29 29
30 compatible = "gpio-leds"; 30 compatible = "gpio-leds";
31 31
32 led@0 { 32 led0 {
33 label = "base:red:user"; 33 label = "base:red:user";
34 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */ 34 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */
35 default-state = "off"; 35 default-state = "off";
36 }; 36 };
37 37
38 led@1 { 38 led1 {
39 label = "base:green:user"; 39 label = "base:green:user";
40 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */ 40 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */
41 default-state = "off"; 41 default-state = "off";
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index e247c15e5176..007b5e5a51a9 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -13,7 +13,7 @@
13 }; 13 };
14 }; 14 };
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */ 18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 }; 19 };
@@ -28,28 +28,28 @@
28 28
29 compatible = "gpio-leds"; 29 compatible = "gpio-leds";
30 30
31 led@2 { 31 led2 {
32 label = "beaglebone:green:heartbeat"; 32 label = "beaglebone:green:heartbeat";
33 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 33 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
34 linux,default-trigger = "heartbeat"; 34 linux,default-trigger = "heartbeat";
35 default-state = "off"; 35 default-state = "off";
36 }; 36 };
37 37
38 led@3 { 38 led3 {
39 label = "beaglebone:green:mmc0"; 39 label = "beaglebone:green:mmc0";
40 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; 40 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
41 linux,default-trigger = "mmc0"; 41 linux,default-trigger = "mmc0";
42 default-state = "off"; 42 default-state = "off";
43 }; 43 };
44 44
45 led@4 { 45 led4 {
46 label = "beaglebone:green:usr2"; 46 label = "beaglebone:green:usr2";
47 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; 47 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
48 linux,default-trigger = "cpu0"; 48 linux,default-trigger = "cpu0";
49 default-state = "off"; 49 default-state = "off";
50 }; 50 };
51 51
52 led@5 { 52 led5 {
53 label = "beaglebone:green:usr3"; 53 label = "beaglebone:green:usr3";
54 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 54 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
55 linux,default-trigger = "mmc1"; 55 linux,default-trigger = "mmc1";
@@ -57,7 +57,7 @@
57 }; 57 };
58 }; 58 };
59 59
60 vmmcsd_fixed: fixedregulator@0 { 60 vmmcsd_fixed: fixedregulator0 {
61 compatible = "regulator-fixed"; 61 compatible = "regulator-fixed";
62 regulator-name = "vmmcsd_fixed"; 62 regulator-name = "vmmcsd_fixed";
63 regulator-min-microvolt = <3300000>; 63 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index ca721670bd91..55c0e954b146 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -33,17 +33,6 @@
33 status = "okay"; 33 status = "okay";
34}; 34};
35 35
36&cpu0_opp_table {
37 /*
38 * All PG 2.0 silicon may not support 1GHz but some of the early
39 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
40 * to support 1GHz OPP so enable it for PG 2.0 on this board.
41 */
42 oppnitro@1000000000 {
43 opp-supported-hw = <0x06 0x0100>;
44 };
45};
46
47&am33xx_pinmux { 36&am33xx_pinmux {
48 nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { 37 nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
49 pinctrl-single,pins = < 38 pinctrl-single,pins = <
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index 1d647358f1c1..f9ee5859c154 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -19,7 +19,7 @@
19 }; 19 };
20 }; 20 };
21 21
22 memory { 22 memory@80000000 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB */ 24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 }; 25 };
diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts
index 817b1dec0683..947c81b7aaaf 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -17,7 +17,7 @@
17 model = "CompuLab CM-T335"; 17 model = "CompuLab CM-T335";
18 compatible = "compulab,cm-t335", "ti,am33xx"; 18 compatible = "compulab,cm-t335", "ti,am33xx";
19 19
20 memory { 20 memory@80000000 {
21 device_type = "memory"; 21 device_type = "memory";
22 reg = <0x80000000 0x8000000>; /* 128 MB */ 22 reg = <0x80000000 0x8000000>; /* 128 MB */
23 }; 23 };
@@ -26,7 +26,7 @@
26 compatible = "gpio-leds"; 26 compatible = "gpio-leds";
27 pinctrl-names = "default"; 27 pinctrl-names = "default";
28 pinctrl-0 = <&gpio_led_pins>; 28 pinctrl-0 = <&gpio_led_pins>;
29 led@0 { 29 led0 {
30 label = "cm_t335:green"; 30 label = "cm_t335:green";
31 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; /* gpio2_0 */ 31 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; /* gpio2_0 */
32 linux,default-trigger = "heartbeat"; 32 linux,default-trigger = "heartbeat";
@@ -34,7 +34,7 @@
34 }; 34 };
35 35
36 /* regulator for mmc */ 36 /* regulator for mmc */
37 vmmc_fixed: fixedregulator@0 { 37 vmmc_fixed: fixedregulator0 {
38 compatible = "regulator-fixed"; 38 compatible = "regulator-fixed";
39 regulator-name = "vmmc_fixed"; 39 regulator-name = "vmmc_fixed";
40 regulator-min-microvolt = <3300000>; 40 regulator-min-microvolt = <3300000>;
@@ -42,7 +42,7 @@
42 }; 42 };
43 43
44 /* Regulator for WiFi */ 44 /* Regulator for WiFi */
45 vwlan_fixed: fixedregulator@2 { 45 vwlan_fixed: fixedregulator2 {
46 compatible = "regulator-fixed"; 46 compatible = "regulator-fixed";
47 regulator-name = "vwlan_fixed"; 47 regulator-name = "vwlan_fixed";
48 gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */ 48 gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 5d28712ad253..e82432c79f85 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -20,12 +20,12 @@
20 }; 20 };
21 }; 21 };
22 22
23 memory { 23 memory@80000000 {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x80000000 0x10000000>; /* 256 MB */ 25 reg = <0x80000000 0x10000000>; /* 256 MB */
26 }; 26 };
27 27
28 vbat: fixedregulator@0 { 28 vbat: fixedregulator0 {
29 compatible = "regulator-fixed"; 29 compatible = "regulator-fixed";
30 regulator-name = "vbat"; 30 regulator-name = "vbat";
31 regulator-min-microvolt = <5000000>; 31 regulator-min-microvolt = <5000000>;
@@ -33,13 +33,13 @@
33 regulator-boot-on; 33 regulator-boot-on;
34 }; 34 };
35 35
36 lis3_reg: fixedregulator@1 { 36 lis3_reg: fixedregulator1 {
37 compatible = "regulator-fixed"; 37 compatible = "regulator-fixed";
38 regulator-name = "lis3_reg"; 38 regulator-name = "lis3_reg";
39 regulator-boot-on; 39 regulator-boot-on;
40 }; 40 };
41 41
42 wlan_en_reg: fixedregulator@2 { 42 wlan_en_reg: fixedregulator2 {
43 compatible = "regulator-fixed"; 43 compatible = "regulator-fixed";
44 regulator-name = "wlan-en-regulator"; 44 regulator-name = "wlan-en-regulator";
45 regulator-min-microvolt = <1800000>; 45 regulator-min-microvolt = <1800000>;
@@ -53,7 +53,7 @@
53 enable-active-high; 53 enable-active-high;
54 }; 54 };
55 55
56 matrix_keypad: matrix_keypad@0 { 56 matrix_keypad: matrix_keypad0 {
57 compatible = "gpio-matrix-keypad"; 57 compatible = "gpio-matrix-keypad";
58 debounce-delay-ms = <5>; 58 debounce-delay-ms = <5>;
59 col-scan-delay-us = <2>; 59 col-scan-delay-us = <2>;
@@ -73,20 +73,20 @@
73 0x0201006c>; /* DOWN */ 73 0x0201006c>; /* DOWN */
74 }; 74 };
75 75
76 gpio_keys: volume_keys@0 { 76 gpio_keys: volume_keys0 {
77 compatible = "gpio-keys"; 77 compatible = "gpio-keys";
78 #address-cells = <1>; 78 #address-cells = <1>;
79 #size-cells = <0>; 79 #size-cells = <0>;
80 autorepeat; 80 autorepeat;
81 81
82 switch@9 { 82 switch9 {
83 label = "volume-up"; 83 label = "volume-up";
84 linux,code = <115>; 84 linux,code = <115>;
85 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 85 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
86 wakeup-source; 86 wakeup-source;
87 }; 87 };
88 88
89 switch@10 { 89 switch10 {
90 label = "volume-down"; 90 label = "volume-down";
91 linux,code = <114>; 91 linux,code = <114>;
92 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; 92 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
@@ -497,6 +497,8 @@
497 497
498&lcdc { 498&lcdc {
499 status = "okay"; 499 status = "okay";
500
501 blue-and-red-wiring = "crossed";
500}; 502};
501 503
502&elm { 504&elm {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 09308d66645b..975c36e332a2 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -27,12 +27,12 @@
27 }; 27 };
28 }; 28 };
29 29
30 memory { 30 memory@80000000 {
31 device_type = "memory"; 31 device_type = "memory";
32 reg = <0x80000000 0x10000000>; /* 256 MB */ 32 reg = <0x80000000 0x10000000>; /* 256 MB */
33 }; 33 };
34 34
35 vbat: fixedregulator@0 { 35 vbat: fixedregulator0 {
36 compatible = "regulator-fixed"; 36 compatible = "regulator-fixed";
37 regulator-name = "vbat"; 37 regulator-name = "vbat";
38 regulator-min-microvolt = <5000000>; 38 regulator-min-microvolt = <5000000>;
@@ -40,13 +40,13 @@
40 regulator-boot-on; 40 regulator-boot-on;
41 }; 41 };
42 42
43 lis3_reg: fixedregulator@1 { 43 lis3_reg: fixedregulator1 {
44 compatible = "regulator-fixed"; 44 compatible = "regulator-fixed";
45 regulator-name = "lis3_reg"; 45 regulator-name = "lis3_reg";
46 regulator-boot-on; 46 regulator-boot-on;
47 }; 47 };
48 48
49 wl12xx_vmmc: fixedregulator@2 { 49 wl12xx_vmmc: fixedregulator2 {
50 pinctrl-names = "default"; 50 pinctrl-names = "default";
51 pinctrl-0 = <&wl12xx_gpio>; 51 pinctrl-0 = <&wl12xx_gpio>;
52 compatible = "regulator-fixed"; 52 compatible = "regulator-fixed";
@@ -58,7 +58,7 @@
58 enable-active-high; 58 enable-active-high;
59 }; 59 };
60 60
61 vtt_fixed: fixedregulator@3 { 61 vtt_fixed: fixedregulator3 {
62 compatible = "regulator-fixed"; 62 compatible = "regulator-fixed";
63 regulator-name = "vtt"; 63 regulator-name = "vtt";
64 regulator-min-microvolt = <1500000>; 64 regulator-min-microvolt = <1500000>;
@@ -75,26 +75,26 @@
75 75
76 compatible = "gpio-leds"; 76 compatible = "gpio-leds";
77 77
78 led@1 { 78 led1 {
79 label = "evmsk:green:usr0"; 79 label = "evmsk:green:usr0";
80 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 80 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
81 default-state = "off"; 81 default-state = "off";
82 }; 82 };
83 83
84 led@2 { 84 led2 {
85 label = "evmsk:green:usr1"; 85 label = "evmsk:green:usr1";
86 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 86 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
87 default-state = "off"; 87 default-state = "off";
88 }; 88 };
89 89
90 led@3 { 90 led3 {
91 label = "evmsk:green:mmc0"; 91 label = "evmsk:green:mmc0";
92 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 92 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
93 linux,default-trigger = "mmc0"; 93 linux,default-trigger = "mmc0";
94 default-state = "off"; 94 default-state = "off";
95 }; 95 };
96 96
97 led@4 { 97 led4 {
98 label = "evmsk:green:heartbeat"; 98 label = "evmsk:green:heartbeat";
99 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 99 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
100 linux,default-trigger = "heartbeat"; 100 linux,default-trigger = "heartbeat";
@@ -102,31 +102,31 @@
102 }; 102 };
103 }; 103 };
104 104
105 gpio_buttons: gpio_buttons@0 { 105 gpio_buttons: gpio_buttons0 {
106 compatible = "gpio-keys"; 106 compatible = "gpio-keys";
107 #address-cells = <1>; 107 #address-cells = <1>;
108 #size-cells = <0>; 108 #size-cells = <0>;
109 109
110 switch@1 { 110 switch1 {
111 label = "button0"; 111 label = "button0";
112 linux,code = <0x100>; 112 linux,code = <0x100>;
113 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; 113 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
114 }; 114 };
115 115
116 switch@2 { 116 switch2 {
117 label = "button1"; 117 label = "button1";
118 linux,code = <0x101>; 118 linux,code = <0x101>;
119 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 119 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
120 }; 120 };
121 121
122 switch@3 { 122 switch3 {
123 label = "button2"; 123 label = "button2";
124 linux,code = <0x102>; 124 linux,code = <0x102>;
125 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; 125 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
126 wakeup-source; 126 wakeup-source;
127 }; 127 };
128 128
129 switch@4 { 129 switch4 {
130 label = "button3"; 130 label = "button3";
131 linux,code = <0x103>; 131 linux,code = <0x103>;
132 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 132 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
@@ -170,29 +170,29 @@
170 pinctrl-1 = <&lcd_pins_sleep>; 170 pinctrl-1 = <&lcd_pins_sleep>;
171 status = "okay"; 171 status = "okay";
172 panel-info { 172 panel-info {
173 ac-bias = <255>; 173 ac-bias = <255>;
174 ac-bias-intrpt = <0>; 174 ac-bias-intrpt = <0>;
175 dma-burst-sz = <16>; 175 dma-burst-sz = <16>;
176 bpp = <32>; 176 bpp = <32>;
177 fdd = <0x80>; 177 fdd = <0x80>;
178 sync-edge = <0>; 178 sync-edge = <0>;
179 sync-ctrl = <1>; 179 sync-ctrl = <1>;
180 raster-order = <0>; 180 raster-order = <0>;
181 fifo-th = <0>; 181 fifo-th = <0>;
182 }; 182 };
183 display-timings { 183 display-timings {
184 480x272 { 184 480x272 {
185 hactive = <480>; 185 hactive = <480>;
186 vactive = <272>; 186 vactive = <272>;
187 hback-porch = <43>; 187 hback-porch = <43>;
188 hfront-porch = <8>; 188 hfront-porch = <8>;
189 hsync-len = <4>; 189 hsync-len = <4>;
190 vback-porch = <12>; 190 vback-porch = <12>;
191 vfront-porch = <4>; 191 vfront-porch = <4>;
192 vsync-len = <10>; 192 vsync-len = <10>;
193 clock-frequency = <9000000>; 193 clock-frequency = <9000000>;
194 hsync-active = <0>; 194 hsync-active = <0>;
195 vsync-active = <0>; 195 vsync-active = <0>;
196 }; 196 };
197 }; 197 };
198 }; 198 };
@@ -711,5 +711,7 @@
711}; 711};
712 712
713&lcdc { 713&lcdc {
714 status = "okay"; 714 status = "okay";
715
716 blue-and-red-wiring = "crossed";
715}; 717};
diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts
index 7d8b8fefdf08..85e04c205542 100644
--- a/arch/arm/boot/dts/am335x-icev2.dts
+++ b/arch/arm/boot/dts/am335x-icev2.dts
@@ -19,12 +19,12 @@
19 model = "TI AM3359 ICE-V2"; 19 model = "TI AM3359 ICE-V2";
20 compatible = "ti,am3359-icev2", "ti,am33xx"; 20 compatible = "ti,am3359-icev2", "ti,am33xx";
21 21
22 memory { 22 memory@80000000 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */ 24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 }; 25 };
26 26
27 vbat: fixedregulator@0 { 27 vbat: fixedregulator0 {
28 compatible = "regulator-fixed"; 28 compatible = "regulator-fixed";
29 regulator-name = "vbat"; 29 regulator-name = "vbat";
30 regulator-min-microvolt = <5000000>; 30 regulator-min-microvolt = <5000000>;
@@ -32,7 +32,7 @@
32 regulator-boot-on; 32 regulator-boot-on;
33 }; 33 };
34 34
35 vtt_fixed: fixedregulator@1 { 35 vtt_fixed: fixedregulator1 {
36 compatible = "regulator-fixed"; 36 compatible = "regulator-fixed";
37 regulator-name = "vtt"; 37 regulator-name = "vtt";
38 regulator-min-microvolt = <1500000>; 38 regulator-min-microvolt = <1500000>;
@@ -43,52 +43,52 @@
43 enable-active-high; 43 enable-active-high;
44 }; 44 };
45 45
46 leds@0 { 46 leds0 {
47 compatible = "gpio-leds"; 47 compatible = "gpio-leds";
48 48
49 led@0 { 49 led0 {
50 label = "out0"; 50 label = "out0";
51 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>; 51 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
52 default-state = "off"; 52 default-state = "off";
53 }; 53 };
54 54
55 led@1 { 55 led1 {
56 label = "out1"; 56 label = "out1";
57 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>; 57 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
58 default-state = "off"; 58 default-state = "off";
59 }; 59 };
60 60
61 led@2 { 61 led2 {
62 label = "out2"; 62 label = "out2";
63 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>; 63 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
64 default-state = "off"; 64 default-state = "off";
65 }; 65 };
66 66
67 led@3 { 67 led3 {
68 label = "out3"; 68 label = "out3";
69 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>; 69 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
70 default-state = "off"; 70 default-state = "off";
71 }; 71 };
72 72
73 led@4 { 73 led4 {
74 label = "out4"; 74 label = "out4";
75 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>; 75 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
76 default-state = "off"; 76 default-state = "off";
77 }; 77 };
78 78
79 led@5 { 79 led5 {
80 label = "out5"; 80 label = "out5";
81 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>; 81 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
82 default-state = "off"; 82 default-state = "off";
83 }; 83 };
84 84
85 led@6 { 85 led6 {
86 label = "out6"; 86 label = "out6";
87 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>; 87 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
88 default-state = "off"; 88 default-state = "off";
89 }; 89 };
90 90
91 led@7 { 91 led7 {
92 label = "out7"; 92 label = "out7";
93 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>; 93 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
94 default-state = "off"; 94 default-state = "off";
@@ -96,49 +96,58 @@
96 }; 96 };
97 97
98 /* Tricolor status LEDs */ 98 /* Tricolor status LEDs */
99 leds@1 { 99 leds1 {
100 compatible = "gpio-leds"; 100 compatible = "gpio-leds";
101 pinctrl-names = "default"; 101 pinctrl-names = "default";
102 pinctrl-0 = <&user_leds>; 102 pinctrl-0 = <&user_leds>;
103 103
104 led@0 { 104 led0 {
105 label = "status0:red:cpu0"; 105 label = "status0:red:cpu0";
106 gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>; 106 gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
107 default-state = "off"; 107 default-state = "off";
108 linux,default-trigger = "cpu0"; 108 linux,default-trigger = "cpu0";
109 }; 109 };
110 110
111 led@1 { 111 led1 {
112 label = "status0:green:usr"; 112 label = "status0:green:usr";
113 gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; 113 gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
114 default-state = "off"; 114 default-state = "off";
115 }; 115 };
116 116
117 led@2 { 117 led2 {
118 label = "status0:yellow:usr"; 118 label = "status0:yellow:usr";
119 gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; 119 gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
120 default-state = "off"; 120 default-state = "off";
121 }; 121 };
122 122
123 led@3 { 123 led3 {
124 label = "status1:red:mmc0"; 124 label = "status1:red:mmc0";
125 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; 125 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
126 default-state = "off"; 126 default-state = "off";
127 linux,default-trigger = "mmc0"; 127 linux,default-trigger = "mmc0";
128 }; 128 };
129 129
130 led@4 { 130 led4 {
131 label = "status1:green:usr"; 131 label = "status1:green:usr";
132 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 132 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
133 default-state = "off"; 133 default-state = "off";
134 }; 134 };
135 135
136 led@5 { 136 led5 {
137 label = "status1:yellow:usr"; 137 label = "status1:yellow:usr";
138 gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; 138 gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
139 default-state = "off"; 139 default-state = "off";
140 }; 140 };
141 }; 141 };
142 gpio-decoder {
143 compatible = "gpio-decoder";
144 gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
145 <&pca9536 2 GPIO_ACTIVE_HIGH>,
146 <&pca9536 1 GPIO_ACTIVE_HIGH>,
147 <&pca9536 0 GPIO_ACTIVE_HIGH>;
148 linux,axis = <0>; /* ABS_X */
149 decoder-max-value = <9>;
150 };
142}; 151};
143 152
144&am33xx_pinmux { 153&am33xx_pinmux {
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index e7d9ca1305fa..a5769a8f5fc8 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -20,7 +20,7 @@
20 }; 20 };
21 }; 21 };
22 22
23 memory { 23 memory@80000000 {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x80000000 0x10000000>; /* 256 MB */ 25 reg = <0x80000000 0x10000000>; /* 256 MB */
26 }; 26 };
@@ -31,14 +31,14 @@
31 31
32 compatible = "gpio-leds"; 32 compatible = "gpio-leds";
33 33
34 led@0 { 34 led0 {
35 label = "com:green:user"; 35 label = "com:green:user";
36 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; 36 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
37 default-state = "on"; 37 default-state = "on";
38 }; 38 };
39 }; 39 };
40 40
41 vbat: fixedregulator@0 { 41 vbat: fixedregulator0 {
42 compatible = "regulator-fixed"; 42 compatible = "regulator-fixed";
43 regulator-name = "vbat"; 43 regulator-name = "vbat";
44 regulator-min-microvolt = <5000000>; 44 regulator-min-microvolt = <5000000>;
@@ -46,7 +46,7 @@
46 regulator-boot-on; 46 regulator-boot-on;
47 }; 47 };
48 48
49 vmmc: fixedregulator@0 { 49 vmmc: fixedregulator1 {
50 compatible = "regulator-fixed"; 50 compatible = "regulator-fixed";
51 regulator-name = "vmmc"; 51 regulator-name = "vmmc";
52 regulator-min-microvolt = <3300000>; 52 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/am335x-lxm.dts b/arch/arm/boot/dts/am335x-lxm.dts
index d97b0efa43f3..1d6c6fa703e4 100644
--- a/arch/arm/boot/dts/am335x-lxm.dts
+++ b/arch/arm/boot/dts/am335x-lxm.dts
@@ -19,13 +19,13 @@
19 }; 19 };
20 }; 20 };
21 21
22 memory { 22 memory@80000000 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB */ 24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 }; 25 };
26 26
27 /* Power supply provides a fixed 5V @2A */ 27 /* Power supply provides a fixed 5V @2A */
28 vbat: fixedregulator@0 { 28 vbat: fixedregulator0 {
29 compatible = "regulator-fixed"; 29 compatible = "regulator-fixed";
30 regulator-name = "vbat"; 30 regulator-name = "vbat";
31 regulator-min-microvolt = <5000000>; 31 regulator-min-microvolt = <5000000>;
@@ -34,7 +34,7 @@
34 }; 34 };
35 35
36 /* Power supply provides a fixed 3.3V @3A */ 36 /* Power supply provides a fixed 3.3V @3A */
37 vmmcsd_fixed: fixedregulator@1 { 37 vmmcsd_fixed: fixedregulator1 {
38 compatible = "regulator-fixed"; 38 compatible = "regulator-fixed";
39 regulator-name = "vmmcsd_fixed"; 39 regulator-name = "vmmcsd_fixed";
40 regulator-min-microvolt = <3300000>; 40 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
index f313999c503e..483d585c8908 100644
--- a/arch/arm/boot/dts/am335x-nano.dts
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -19,7 +19,7 @@
19 }; 19 };
20 }; 20 };
21 21
22 memory { 22 memory@80000000 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */ 24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 }; 25 };
@@ -27,7 +27,7 @@
27 leds { 27 leds {
28 compatible = "gpio-leds"; 28 compatible = "gpio-leds";
29 29
30 led@0 { 30 led0 {
31 label = "nanobone:green:usr1"; 31 label = "nanobone:green:usr1";
32 gpios = <&gpio1 5 0>; 32 gpios = <&gpio1 5 0>;
33 default-state = "off"; 33 default-state = "off";
diff --git a/arch/arm/boot/dts/am335x-pepper.dts b/arch/arm/boot/dts/am335x-pepper.dts
index 8867aaaec54d..30e2f8770aaf 100644
--- a/arch/arm/boot/dts/am335x-pepper.dts
+++ b/arch/arm/boot/dts/am335x-pepper.dts
@@ -20,7 +20,7 @@
20 }; 20 };
21 }; 21 };
22 22
23 memory { 23 memory@80000000 {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x80000000 0x20000000>; /* 512 MB */ 25 reg = <0x80000000 0x20000000>; /* 512 MB */
26 }; 26 };
@@ -41,15 +41,15 @@
41 compatible = "ti,da830-evm-audio"; 41 compatible = "ti,da830-evm-audio";
42 }; 42 };
43 43
44 vbat: fixedregulator@0 { 44 vbat: fixedregulator0 {
45 compatible = "regulator-fixed"; 45 compatible = "regulator-fixed";
46 }; 46 };
47 47
48 v3v3c_reg: fixedregulator@1 { 48 v3v3c_reg: fixedregulator1 {
49 compatible = "regulator-fixed"; 49 compatible = "regulator-fixed";
50 }; 50 };
51 51
52 vdd5_reg: fixedregulator@2 { 52 vdd5_reg: fixedregulator2 {
53 compatible = "regulator-fixed"; 53 compatible = "regulator-fixed";
54 }; 54 };
55}; 55};
@@ -595,14 +595,14 @@
595 pinctrl-names = "default"; 595 pinctrl-names = "default";
596 pinctrl-0 = <&user_leds_pins>; 596 pinctrl-0 = <&user_leds_pins>;
597 597
598 led@0 { 598 led0 {
599 label = "pepper:user0:blue"; 599 label = "pepper:user0:blue";
600 gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; 600 gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
601 linux,default-trigger = "none"; 601 linux,default-trigger = "none";
602 default-state = "off"; 602 default-state = "off";
603 }; 603 };
604 604
605 led@1 { 605 led1 {
606 label = "pepper:user1:red"; 606 label = "pepper:user1:red";
607 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 607 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
608 linux,default-trigger = "none"; 608 linux,default-trigger = "none";
@@ -616,21 +616,21 @@
616 #address-cells = <1>; 616 #address-cells = <1>;
617 #size-cells = <0>; 617 #size-cells = <0>;
618 618
619 button@0 { 619 button0 {
620 label = "home"; 620 label = "home";
621 linux,code = <KEY_HOME>; 621 linux,code = <KEY_HOME>;
622 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; 622 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
623 wakeup-source; 623 wakeup-source;
624 }; 624 };
625 625
626 button@1 { 626 button1 {
627 label = "menu"; 627 label = "menu";
628 linux,code = <KEY_MENU>; 628 linux,code = <KEY_MENU>;
629 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 629 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
630 wakeup-source; 630 wakeup-source;
631 }; 631 };
632 632
633 buttons@2 { 633 buttons2 {
634 label = "power"; 634 label = "power";
635 linux,code = <KEY_POWER>; 635 linux,code = <KEY_POWER>;
636 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; 636 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 1263c9d4cba3..75e24add3f13 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -25,7 +25,7 @@
25 }; 25 };
26 }; 26 };
27 27
28 memory { 28 memory@80000000 {
29 device_type = "memory"; 29 device_type = "memory";
30 reg = <0x80000000 0x10000000>; /* 256 MB */ 30 reg = <0x80000000 0x10000000>; /* 256 MB */
31 }; 31 };
@@ -33,7 +33,7 @@
33 regulators { 33 regulators {
34 compatible = "simple-bus"; 34 compatible = "simple-bus";
35 35
36 vcc5v: fixedregulator@0 { 36 vcc5v: fixedregulator0 {
37 compatible = "regulator-fixed"; 37 compatible = "regulator-fixed";
38 regulator-name = "vcc5v"; 38 regulator-name = "vcc5v";
39 regulator-min-microvolt = <5000000>; 39 regulator-min-microvolt = <5000000>;
diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts
index 837d5b80ea1d..bf8727a19ece 100644
--- a/arch/arm/boot/dts/am335x-shc.dts
+++ b/arch/arm/boot/dts/am335x-shc.dts
@@ -64,50 +64,50 @@
64 64
65 compatible = "gpio-leds"; 65 compatible = "gpio-leds";
66 66
67 led@1 { 67 led1 {
68 label = "shc:power:red"; 68 label = "shc:power:red";
69 gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>; 69 gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
70 default-state = "off"; 70 default-state = "off";
71 }; 71 };
72 72
73 led@2 { 73 led2 {
74 label = "shc:power:bl"; 74 label = "shc:power:bl";
75 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; 75 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
76 linux,default-trigger = "timer"; 76 linux,default-trigger = "timer";
77 default-state = "on"; 77 default-state = "on";
78 }; 78 };
79 79
80 led@3 { 80 led3 {
81 label = "shc:lan:red"; 81 label = "shc:lan:red";
82 gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; 82 gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
83 default-state = "off"; 83 default-state = "off";
84 }; 84 };
85 85
86 led@4 { 86 led4 {
87 label = "shc:lan:bl"; 87 label = "shc:lan:bl";
88 gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 88 gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
89 default-state = "off"; 89 default-state = "off";
90 }; 90 };
91 91
92 led@5 { 92 led5 {
93 label = "shc:cloud:red"; 93 label = "shc:cloud:red";
94 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 94 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
95 default-state = "off"; 95 default-state = "off";
96 }; 96 };
97 97
98 led@6 { 98 led6 {
99 label = "shc:cloud:bl"; 99 label = "shc:cloud:bl";
100 gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; 100 gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
101 default-state = "off"; 101 default-state = "off";
102 }; 102 };
103 }; 103 };
104 104
105 memory { 105 memory@80000000 {
106 device_type = "memory"; 106 device_type = "memory";
107 reg = <0x80000000 0x20000000>; /* 512 MB */ 107 reg = <0x80000000 0x20000000>; /* 512 MB */
108 }; 108 };
109 109
110 vmmcsd_fixed: fixedregulator@0 { 110 vmmcsd_fixed: fixedregulator0 {
111 compatible = "regulator-fixed"; 111 compatible = "regulator-fixed";
112 regulator-name = "vmmcsd_fixed"; 112 regulator-name = "vmmcsd_fixed";
113 regulator-min-microvolt = <3300000>; 113 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/am335x-sl50.dts b/arch/arm/boot/dts/am335x-sl50.dts
index a6efbe6eda3b..b0dfa6f14cd5 100644
--- a/arch/arm/boot/dts/am335x-sl50.dts
+++ b/arch/arm/boot/dts/am335x-sl50.dts
@@ -19,6 +19,11 @@
19 }; 19 };
20 }; 20 };
21 21
22 memory@80000000 {
23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 };
26
22 chosen { 27 chosen {
23 stdout-path = &uart0; 28 stdout-path = &uart0;
24 }; 29 };
@@ -28,25 +33,25 @@
28 pinctrl-names = "default"; 33 pinctrl-names = "default";
29 pinctrl-0 = <&led_pins>; 34 pinctrl-0 = <&led_pins>;
30 35
31 led@0 { 36 led0 {
32 label = "sl50:green:usr0"; 37 label = "sl50:green:usr0";
33 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; 38 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
34 default-state = "off"; 39 default-state = "off";
35 }; 40 };
36 41
37 led@1 { 42 led1 {
38 label = "sl50:red:usr1"; 43 label = "sl50:red:usr1";
39 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; 44 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
40 default-state = "off"; 45 default-state = "off";
41 }; 46 };
42 47
43 led@2 { 48 led2 {
44 label = "sl50:green:usr2"; 49 label = "sl50:green:usr2";
45 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 50 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
46 default-state = "off"; 51 default-state = "off";
47 }; 52 };
48 53
49 led@3 { 54 led3 {
50 label = "sl50:red:usr3"; 55 label = "sl50:red:usr3";
51 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; 56 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
52 default-state = "off"; 57 default-state = "off";
@@ -103,7 +108,7 @@
103 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; 108 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
104 }; 109 };
105 110
106 vmmcsd_fixed: fixedregulator@0 { 111 vmmcsd_fixed: fixedregulator0 {
107 compatible = "regulator-fixed"; 112 compatible = "regulator-fixed";
108 regulator-name = "vmmcsd_fixed"; 113 regulator-name = "vmmcsd_fixed";
109 regulator-min-microvolt = <3300000>; 114 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi b/arch/arm/boot/dts/am335x-wega.dtsi
index 282f6d4b27bc..02c67365c4e1 100644
--- a/arch/arm/boot/dts/am335x-wega.dtsi
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -11,10 +11,14 @@
11 model = "Phytec AM335x phyBOARD-WEGA"; 11 model = "Phytec AM335x phyBOARD-WEGA";
12 compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"; 12 compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
13 13
14 sound: sound_iface {
15 compatible = "ti,da830-evm-audio";
16 };
17
14 regulators { 18 regulators {
15 compatible = "simple-bus"; 19 compatible = "simple-bus";
16 20
17 vcc3v3: fixedregulator@1 { 21 vcc3v3: fixedregulator1 {
18 compatible = "regulator-fixed"; 22 compatible = "regulator-fixed";
19 regulator-name = "vcc3v3"; 23 regulator-name = "vcc3v3";
20 regulator-min-microvolt = <3300000>; 24 regulator-min-microvolt = <3300000>;
@@ -24,6 +28,58 @@
24 }; 28 };
25}; 29};
26 30
31/* Audio */
32&am33xx_pinmux {
33 mcasp0_pins: pinmux_mcasp0 {
34 pinctrl-single,pins = <
35 AM33XX_IOPAD(0x9AC, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */
36 AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
37 AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
38 AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
39 AM33XX_IOPAD(0x9A8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */
40 >;
41 };
42};
43
44&i2c0 {
45 tlv320aic3007: tlv320aic3007@18 {
46 compatible = "ti,tlv320aic3007";
47 reg = <0x18>;
48 AVDD-supply = <&vcc3v3>;
49 IOVDD-supply = <&vcc3v3>;
50 DRVDD-supply = <&vcc3v3>;
51 DVDD-supply = <&vdig1_reg>;
52 status = "okay";
53 };
54};
55
56&mcasp0 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&mcasp0_pins>;
59 op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
60 tdm-slots = <2>;
61 serial-dir = <
62 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
63 >;
64 tx-num-evt = <16>;
65 rt-num-evt = <16>;
66 status = "okay";
67};
68
69&sound {
70 ti,model = "AM335x-Wega";
71 ti,audio-codec = <&tlv320aic3007>;
72 ti,mcasp-controller = <&mcasp0>;
73 ti,audio-routing =
74 "Line Out", "LLOUT",
75 "Line Out", "RLOUT",
76 "LINE1L", "Line In",
77 "LINE1R", "Line In";
78 clocks = <&mcasp0_fck>;
79 clock-names = "mclk";
80 status = "okay";
81};
82
27/* CAN Busses */ 83/* CAN Busses */
28&am33xx_pinmux { 84&am33xx_pinmux {
29 dcan1_pins: pinmux_dcan1 { 85 dcan1_pins: pinmux_dcan1 {
@@ -99,6 +155,12 @@
99 status = "okay"; 155 status = "okay";
100}; 156};
101 157
158/* Power */
159&vdig1_reg {
160 regulator-boot-on;
161 regulator-always-on;
162};
163
102/* UARTs */ 164/* UARTs */
103&am33xx_pinmux { 165&am33xx_pinmux {
104 uart0_pins: pinmux_uart0 { 166 uart0_pins: pinmux_uart0 {
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 98748c61ed99..194d884c9de1 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -11,11 +11,11 @@
11#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/am33xx.h> 12#include <dt-bindings/pinctrl/am33xx.h>
13 13
14#include "skeleton.dtsi"
15
16/ { 14/ {
17 compatible = "ti,am33xx"; 15 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>; 16 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 19
20 aliases { 20 aliases {
21 i2c0 = &i2c0; 21 i2c0 = &i2c0;
@@ -45,9 +45,19 @@
45 device_type = "cpu"; 45 device_type = "cpu";
46 reg = <0>; 46 reg = <0>;
47 47
48 operating-points-v2 = <&cpu0_opp_table>; 48 /*
49 ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>; 49 * To consider voltage drop between PMIC and SoC,
50 ti,syscon-rev = <&scm_conf 0x600>; 50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
51 61
52 clocks = <&dpll_mpu_ck>; 62 clocks = <&dpll_mpu_ck>;
53 clock-names = "cpu"; 63 clock-names = "cpu";
@@ -56,78 +66,6 @@
56 }; 66 };
57 }; 67 };
58 68
59 cpu0_opp_table: opp_table0 {
60 compatible = "operating-points-v2";
61
62 /*
63 * The three following nodes are marked with opp-suspend
64 * because the can not be enabled simultaneously on a
65 * single SoC.
66 */
67 opp50@300000000 {
68 opp-hz = /bits/ 64 <300000000>;
69 opp-microvolt = <950000 931000 969000>;
70 opp-supported-hw = <0x06 0x0010>;
71 opp-suspend;
72 };
73
74 opp100@275000000 {
75 opp-hz = /bits/ 64 <275000000>;
76 opp-microvolt = <1100000 1078000 1122000>;
77 opp-supported-hw = <0x01 0x00FF>;
78 opp-suspend;
79 };
80
81 opp100@300000000 {
82 opp-hz = /bits/ 64 <300000000>;
83 opp-microvolt = <1100000 1078000 1122000>;
84 opp-supported-hw = <0x06 0x0020>;
85 opp-suspend;
86 };
87
88 opp100@500000000 {
89 opp-hz = /bits/ 64 <500000000>;
90 opp-microvolt = <1100000 1078000 1122000>;
91 opp-supported-hw = <0x01 0xFFFF>;
92 };
93
94 opp100@600000000 {
95 opp-hz = /bits/ 64 <600000000>;
96 opp-microvolt = <1100000 1078000 1122000>;
97 opp-supported-hw = <0x06 0x0040>;
98 };
99
100 opp120@600000000 {
101 opp-hz = /bits/ 64 <600000000>;
102 opp-microvolt = <1200000 1176000 1224000>;
103 opp-supported-hw = <0x01 0xFFFF>;
104 };
105
106 opp120@720000000 {
107 opp-hz = /bits/ 64 <720000000>;
108 opp-microvolt = <1200000 1176000 1224000>;
109 opp-supported-hw = <0x06 0x0080>;
110 };
111
112 oppturbo@720000000 {
113 opp-hz = /bits/ 64 <720000000>;
114 opp-microvolt = <1260000 1234800 1285200>;
115 opp-supported-hw = <0x01 0xFFFF>;
116 };
117
118 oppturbo@800000000 {
119 opp-hz = /bits/ 64 <800000000>;
120 opp-microvolt = <1260000 1234800 1285200>;
121 opp-supported-hw = <0x06 0x0100>;
122 };
123
124 oppnitro@1000000000 {
125 opp-hz = /bits/ 64 <1000000000>;
126 opp-microvolt = <1325000 1298500 1351500>;
127 opp-supported-hw = <0x04 0x0200>;
128 };
129 };
130
131 pmu { 69 pmu {
132 compatible = "arm,cortex-a8-pmu"; 70 compatible = "arm,cortex-a8-pmu";
133 interrupts = <3>; 71 interrupts = <3>;
diff --git a/arch/arm/boot/dts/am3517-craneboard.dts b/arch/arm/boot/dts/am3517-craneboard.dts
index f9d8f3948c4a..083ff5073435 100644
--- a/arch/arm/boot/dts/am3517-craneboard.dts
+++ b/arch/arm/boot/dts/am3517-craneboard.dts
@@ -15,7 +15,7 @@
15 model = "TI AM3517 CraneBoard (TMDSEVM3517)"; 15 model = "TI AM3517 CraneBoard (TMDSEVM3517)";
16 compatible = "ti,am3517-craneboard", "ti,am3517", "ti,omap3"; 16 compatible = "ti,am3517-craneboard", "ti,am3517", "ti,omap3";
17 17
18 memory { 18 memory@80000000 {
19 device_type = "memory"; 19 device_type = "memory";
20 reg = <0x80000000 0x10000000>; /* 256 MB */ 20 reg = <0x80000000 0x10000000>; /* 256 MB */
21 }; 21 };
diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts
index b4127c6493a2..0e4a125f78e3 100644
--- a/arch/arm/boot/dts/am3517-evm.dts
+++ b/arch/arm/boot/dts/am3517-evm.dts
@@ -13,7 +13,7 @@
13 model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)"; 13 model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
14 compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3"; 14 compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */ 18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 }; 19 };
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 5e3f5e86ffcf..0db19d39d24c 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -15,7 +15,7 @@
15 serial3 = &uart4; 15 serial3 = &uart4;
16 }; 16 };
17 17
18 ocp { 18 ocp@68000000 {
19 am35x_otg_hs: am35x_otg_hs@5c040000 { 19 am35x_otg_hs: am35x_otg_hs@5c040000 {
20 compatible = "ti,omap3-musb"; 20 compatible = "ti,omap3-musb";
21 ti,hwmods = "am35x_otg_hs"; 21 ti,hwmods = "am35x_otg_hs";
diff --git a/arch/arm/boot/dts/am3517_mt_ventoux.dts b/arch/arm/boot/dts/am3517_mt_ventoux.dts
index fdf5ce63c8e6..3395783c5b4e 100644
--- a/arch/arm/boot/dts/am3517_mt_ventoux.dts
+++ b/arch/arm/boot/dts/am3517_mt_ventoux.dts
@@ -13,7 +13,7 @@
13 model = "TeeJet Mt.Ventoux"; 13 model = "TeeJet Mt.Ventoux";
14 compatible = "teejet,mt_ventoux", "ti,omap3"; 14 compatible = "teejet,mt_ventoux", "ti,omap3";
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */ 18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 }; 19 };
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 0fadae5396e1..a275fa956813 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -11,12 +11,16 @@
11#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h>
13 13
14#include "skeleton.dtsi"
15
16/ { 14/ {
17 compatible = "ti,am4372", "ti,am43"; 15 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>; 16 interrupt-parent = <&wakeupgen>;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 19
20 memory@0 {
21 device_type = "memory";
22 reg = <0 0>;
23 };
20 24
21 aliases { 25 aliases {
22 i2c0 = &i2c0; 26 i2c0 = &i2c0;
@@ -132,7 +136,7 @@
132 cache-level = <2>; 136 cache-level = <2>;
133 }; 137 };
134 138
135 ocp { 139 ocp@44000000 {
136 compatible = "ti,am4372-l3-noc", "simple-bus"; 140 compatible = "ti,am4372-l3-noc", "simple-bus";
137 #address-cells = <1>; 141 #address-cells = <1>;
138 #size-cells = <1>; 142 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/am437x-cm-t43.dts b/arch/arm/boot/dts/am437x-cm-t43.dts
index 9551c4713173..9e92d480576b 100644
--- a/arch/arm/boot/dts/am437x-cm-t43.dts
+++ b/arch/arm/boot/dts/am437x-cm-t43.dts
@@ -209,7 +209,6 @@
209 #interrupt-cells = <2>; 209 #interrupt-cells = <2>;
210 210
211 dcdc1: regulator-dcdc1 { 211 dcdc1: regulator-dcdc1 {
212 compatible = "ti,tps65218-dcdc1";
213 regulator-name = "vdd_core"; 212 regulator-name = "vdd_core";
214 regulator-min-microvolt = <912000>; 213 regulator-min-microvolt = <912000>;
215 regulator-max-microvolt = <1144000>; 214 regulator-max-microvolt = <1144000>;
@@ -218,7 +217,6 @@
218 }; 217 };
219 218
220 dcdc2: regulator-dcdc2 { 219 dcdc2: regulator-dcdc2 {
221 compatible = "ti,tps65218-dcdc2";
222 regulator-name = "vdd_mpu"; 220 regulator-name = "vdd_mpu";
223 regulator-min-microvolt = <912000>; 221 regulator-min-microvolt = <912000>;
224 regulator-max-microvolt = <1378000>; 222 regulator-max-microvolt = <1378000>;
@@ -227,7 +225,6 @@
227 }; 225 };
228 226
229 dcdc3: regulator-dcdc3 { 227 dcdc3: regulator-dcdc3 {
230 compatible = "ti,tps65218-dcdc3";
231 regulator-name = "vdcdc3"; 228 regulator-name = "vdcdc3";
232 regulator-suspend-enable; 229 regulator-suspend-enable;
233 regulator-min-microvolt = <1500000>; 230 regulator-min-microvolt = <1500000>;
@@ -237,7 +234,6 @@
237 }; 234 };
238 235
239 dcdc5: regulator-dcdc5 { 236 dcdc5: regulator-dcdc5 {
240 compatible = "ti,tps65218-dcdc5";
241 regulator-name = "v1_0bat"; 237 regulator-name = "v1_0bat";
242 regulator-min-microvolt = <1000000>; 238 regulator-min-microvolt = <1000000>;
243 regulator-max-microvolt = <1000000>; 239 regulator-max-microvolt = <1000000>;
@@ -246,7 +242,6 @@
246 }; 242 };
247 243
248 dcdc6: regulator-dcdc6 { 244 dcdc6: regulator-dcdc6 {
249 compatible = "ti,tps65218-dcdc6";
250 regulator-name = "v1_8bat"; 245 regulator-name = "v1_8bat";
251 regulator-min-microvolt = <1800000>; 246 regulator-min-microvolt = <1800000>;
252 regulator-max-microvolt = <1800000>; 247 regulator-max-microvolt = <1800000>;
@@ -255,7 +250,6 @@
255 }; 250 };
256 251
257 ldo1: regulator-ldo1 { 252 ldo1: regulator-ldo1 {
258 compatible = "ti,tps65218-ldo1";
259 regulator-min-microvolt = <1800000>; 253 regulator-min-microvolt = <1800000>;
260 regulator-max-microvolt = <1800000>; 254 regulator-max-microvolt = <1800000>;
261 regulator-boot-on; 255 regulator-boot-on;
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 14677d599595..957840cc7b78 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -58,7 +58,7 @@
58 default-brightness-level = <8>; 58 default-brightness-level = <8>;
59 }; 59 };
60 60
61 matrix_keypad: matrix_keypad@0 { 61 matrix_keypad: matrix_keypad0 {
62 compatible = "gpio-matrix-keypad"; 62 compatible = "gpio-matrix-keypad";
63 debounce-delay-ms = <5>; 63 debounce-delay-ms = <5>;
64 col-scan-delay-us = <2>; 64 col-scan-delay-us = <2>;
@@ -513,7 +513,6 @@
513 #interrupt-cells = <2>; 513 #interrupt-cells = <2>;
514 514
515 dcdc1: regulator-dcdc1 { 515 dcdc1: regulator-dcdc1 {
516 compatible = "ti,tps65218-dcdc1";
517 regulator-name = "vdd_core"; 516 regulator-name = "vdd_core";
518 regulator-min-microvolt = <912000>; 517 regulator-min-microvolt = <912000>;
519 regulator-max-microvolt = <1144000>; 518 regulator-max-microvolt = <1144000>;
@@ -522,7 +521,6 @@
522 }; 521 };
523 522
524 dcdc2: regulator-dcdc2 { 523 dcdc2: regulator-dcdc2 {
525 compatible = "ti,tps65218-dcdc2";
526 regulator-name = "vdd_mpu"; 524 regulator-name = "vdd_mpu";
527 regulator-min-microvolt = <912000>; 525 regulator-min-microvolt = <912000>;
528 regulator-max-microvolt = <1378000>; 526 regulator-max-microvolt = <1378000>;
@@ -531,33 +529,42 @@
531 }; 529 };
532 530
533 dcdc3: regulator-dcdc3 { 531 dcdc3: regulator-dcdc3 {
534 compatible = "ti,tps65218-dcdc3";
535 regulator-name = "vdcdc3"; 532 regulator-name = "vdcdc3";
536 regulator-min-microvolt = <1500000>; 533 regulator-min-microvolt = <1500000>;
537 regulator-max-microvolt = <1500000>; 534 regulator-max-microvolt = <1500000>;
538 regulator-boot-on; 535 regulator-boot-on;
539 regulator-always-on; 536 regulator-always-on;
537 regulator-state-mem {
538 regulator-on-in-suspend;
539 };
540 regulator-state-disk {
541 regulator-off-in-suspend;
542 };
540 }; 543 };
544
541 dcdc5: regulator-dcdc5 { 545 dcdc5: regulator-dcdc5 {
542 compatible = "ti,tps65218-dcdc5";
543 regulator-name = "v1_0bat"; 546 regulator-name = "v1_0bat";
544 regulator-min-microvolt = <1000000>; 547 regulator-min-microvolt = <1000000>;
545 regulator-max-microvolt = <1000000>; 548 regulator-max-microvolt = <1000000>;
546 regulator-boot-on; 549 regulator-boot-on;
547 regulator-always-on; 550 regulator-always-on;
551 regulator-state-mem {
552 regulator-on-in-suspend;
553 };
548 }; 554 };
549 555
550 dcdc6: regulator-dcdc6 { 556 dcdc6: regulator-dcdc6 {
551 compatible = "ti,tps65218-dcdc6";
552 regulator-name = "v1_8bat"; 557 regulator-name = "v1_8bat";
553 regulator-min-microvolt = <1800000>; 558 regulator-min-microvolt = <1800000>;
554 regulator-max-microvolt = <1800000>; 559 regulator-max-microvolt = <1800000>;
555 regulator-boot-on; 560 regulator-boot-on;
556 regulator-always-on; 561 regulator-always-on;
562 regulator-state-mem {
563 regulator-on-in-suspend;
564 };
557 }; 565 };
558 566
559 ldo1: regulator-ldo1 { 567 ldo1: regulator-ldo1 {
560 compatible = "ti,tps65218-ldo1";
561 regulator-min-microvolt = <1800000>; 568 regulator-min-microvolt = <1800000>;
562 regulator-max-microvolt = <1800000>; 569 regulator-max-microvolt = <1800000>;
563 regulator-boot-on; 570 regulator-boot-on;
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index 12a69518383e..25ce611c6568 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -104,7 +104,7 @@
104 #address-cells = <1>; 104 #address-cells = <1>;
105 #size-cells = <0>; 105 #size-cells = <0>;
106 106
107 switch@0 { 107 switch0 {
108 label = "power-button"; 108 label = "power-button";
109 linux,code = <KEY_POWER>; 109 linux,code = <KEY_POWER>;
110 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 110 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts
index 5687d6b4da60..319d94205350 100644
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -64,7 +64,7 @@
64 }; 64 };
65 }; 65 };
66 66
67 matrix_keypad: matrix_keypad@0 { 67 matrix_keypad: matrix_keypad0 {
68 compatible = "gpio-matrix-keypad"; 68 compatible = "gpio-matrix-keypad";
69 69
70 pinctrl-names = "default"; 70 pinctrl-names = "default";
@@ -93,28 +93,28 @@
93 pinctrl-names = "default"; 93 pinctrl-names = "default";
94 pinctrl-0 = <&leds_pins>; 94 pinctrl-0 = <&leds_pins>;
95 95
96 led@0 { 96 led0 {
97 label = "am437x-sk:red:heartbeat"; 97 label = "am437x-sk:red:heartbeat";
98 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 98 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
99 linux,default-trigger = "heartbeat"; 99 linux,default-trigger = "heartbeat";
100 default-state = "off"; 100 default-state = "off";
101 }; 101 };
102 102
103 led@1 { 103 led1 {
104 label = "am437x-sk:green:mmc1"; 104 label = "am437x-sk:green:mmc1";
105 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 105 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
106 linux,default-trigger = "mmc0"; 106 linux,default-trigger = "mmc0";
107 default-state = "off"; 107 default-state = "off";
108 }; 108 };
109 109
110 led@2 { 110 led2 {
111 label = "am437x-sk:blue:cpu0"; 111 label = "am437x-sk:blue:cpu0";
112 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 112 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
113 linux,default-trigger = "cpu0"; 113 linux,default-trigger = "cpu0";
114 default-state = "off"; 114 default-state = "off";
115 }; 115 };
116 116
117 led@3 { 117 led3 {
118 label = "am437x-sk:blue:usr3"; 118 label = "am437x-sk:blue:usr3";
119 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 119 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
120 default-state = "off"; 120 default-state = "off";
@@ -428,7 +428,6 @@
428 #interrupt-cells = <2>; 428 #interrupt-cells = <2>;
429 429
430 dcdc1: regulator-dcdc1 { 430 dcdc1: regulator-dcdc1 {
431 compatible = "ti,tps65218-dcdc1";
432 /* VDD_CORE limits min of OPP50 and max of OPP100 */ 431 /* VDD_CORE limits min of OPP50 and max of OPP100 */
433 regulator-name = "vdd_core"; 432 regulator-name = "vdd_core";
434 regulator-min-microvolt = <912000>; 433 regulator-min-microvolt = <912000>;
@@ -438,7 +437,6 @@
438 }; 437 };
439 438
440 dcdc2: regulator-dcdc2 { 439 dcdc2: regulator-dcdc2 {
441 compatible = "ti,tps65218-dcdc2";
442 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 440 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
443 regulator-name = "vdd_mpu"; 441 regulator-name = "vdd_mpu";
444 regulator-min-microvolt = <912000>; 442 regulator-min-microvolt = <912000>;
@@ -448,16 +446,20 @@
448 }; 446 };
449 447
450 dcdc3: regulator-dcdc3 { 448 dcdc3: regulator-dcdc3 {
451 compatible = "ti,tps65218-dcdc3";
452 regulator-name = "vdds_ddr"; 449 regulator-name = "vdds_ddr";
453 regulator-min-microvolt = <1500000>; 450 regulator-min-microvolt = <1500000>;
454 regulator-max-microvolt = <1500000>; 451 regulator-max-microvolt = <1500000>;
455 regulator-boot-on; 452 regulator-boot-on;
456 regulator-always-on; 453 regulator-always-on;
454 regulator-state-mem {
455 regulator-on-in-suspend;
456 };
457 regulator-state-disk {
458 regulator-off-in-suspend;
459 };
457 }; 460 };
458 461
459 dcdc4: regulator-dcdc4 { 462 dcdc4: regulator-dcdc4 {
460 compatible = "ti,tps65218-dcdc4";
461 regulator-name = "v3_3d"; 463 regulator-name = "v3_3d";
462 regulator-min-microvolt = <3300000>; 464 regulator-min-microvolt = <3300000>;
463 regulator-max-microvolt = <3300000>; 465 regulator-max-microvolt = <3300000>;
@@ -465,8 +467,31 @@
465 regulator-always-on; 467 regulator-always-on;
466 }; 468 };
467 469
470 dcdc5: regulator-dcdc5 {
471 compatible = "ti,tps65218-dcdc5";
472 regulator-name = "v1_0bat";
473 regulator-min-microvolt = <1000000>;
474 regulator-max-microvolt = <1000000>;
475 regulator-boot-on;
476 regulator-always-on;
477 regulator-state-mem {
478 regulator-on-in-suspend;
479 };
480 };
481
482 dcdc6: regulator-dcdc6 {
483 compatible = "ti,tps65218-dcdc6";
484 regulator-name = "v1_8bat";
485 regulator-min-microvolt = <1800000>;
486 regulator-max-microvolt = <1800000>;
487 regulator-boot-on;
488 regulator-always-on;
489 regulator-state-mem {
490 regulator-on-in-suspend;
491 };
492 };
493
468 ldo1: regulator-ldo1 { 494 ldo1: regulator-ldo1 {
469 compatible = "ti,tps65218-ldo1";
470 regulator-name = "v1_8d"; 495 regulator-name = "v1_8d";
471 regulator-min-microvolt = <1800000>; 496 regulator-min-microvolt = <1800000>;
472 regulator-max-microvolt = <1800000>; 497 regulator-max-microvolt = <1800000>;
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index ad32e55532f8..9d35c3f07cad 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -32,7 +32,7 @@
32 enable-active-high; 32 enable-active-high;
33 }; 33 };
34 34
35 vbat: fixedregulator@0 { 35 vbat: fixedregulator0 {
36 compatible = "regulator-fixed"; 36 compatible = "regulator-fixed";
37 regulator-name = "vbat"; 37 regulator-name = "vbat";
38 regulator-min-microvolt = <5000000>; 38 regulator-min-microvolt = <5000000>;
@@ -67,7 +67,7 @@
67 }; 67 };
68 }; 68 };
69 69
70 matrix_keypad: matrix_keypad@0 { 70 matrix_keypad: matrix_keypad0 {
71 compatible = "gpio-matrix-keypad"; 71 compatible = "gpio-matrix-keypad";
72 debounce-delay-ms = <5>; 72 debounce-delay-ms = <5>;
73 col-scan-delay-us = <2>; 73 col-scan-delay-us = <2>;
@@ -421,7 +421,6 @@
421 #interrupt-cells = <2>; 421 #interrupt-cells = <2>;
422 422
423 dcdc1: regulator-dcdc1 { 423 dcdc1: regulator-dcdc1 {
424 compatible = "ti,tps65218-dcdc1";
425 regulator-name = "vdd_core"; 424 regulator-name = "vdd_core";
426 regulator-min-microvolt = <912000>; 425 regulator-min-microvolt = <912000>;
427 regulator-max-microvolt = <1144000>; 426 regulator-max-microvolt = <1144000>;
@@ -430,7 +429,6 @@
430 }; 429 };
431 430
432 dcdc2: regulator-dcdc2 { 431 dcdc2: regulator-dcdc2 {
433 compatible = "ti,tps65218-dcdc2";
434 regulator-name = "vdd_mpu"; 432 regulator-name = "vdd_mpu";
435 regulator-min-microvolt = <912000>; 433 regulator-min-microvolt = <912000>;
436 regulator-max-microvolt = <1378000>; 434 regulator-max-microvolt = <1378000>;
@@ -439,7 +437,6 @@
439 }; 437 };
440 438
441 dcdc3: regulator-dcdc3 { 439 dcdc3: regulator-dcdc3 {
442 compatible = "ti,tps65218-dcdc3";
443 regulator-name = "vdcdc3"; 440 regulator-name = "vdcdc3";
444 regulator-min-microvolt = <1500000>; 441 regulator-min-microvolt = <1500000>;
445 regulator-max-microvolt = <1500000>; 442 regulator-max-microvolt = <1500000>;
@@ -448,7 +445,6 @@
448 }; 445 };
449 446
450 dcdc4: regulator-dcdc4 { 447 dcdc4: regulator-dcdc4 {
451 compatible = "ti,tps65218-dcdc4";
452 regulator-name = "vdcdc4"; 448 regulator-name = "vdcdc4";
453 regulator-min-microvolt = <3300000>; 449 regulator-min-microvolt = <3300000>;
454 regulator-max-microvolt = <3300000>; 450 regulator-max-microvolt = <3300000>;
@@ -457,21 +453,18 @@
457 }; 453 };
458 454
459 dcdc5: regulator-dcdc5 { 455 dcdc5: regulator-dcdc5 {
460 compatible = "ti,tps65218-dcdc5";
461 regulator-name = "v1_0bat"; 456 regulator-name = "v1_0bat";
462 regulator-min-microvolt = <1000000>; 457 regulator-min-microvolt = <1000000>;
463 regulator-max-microvolt = <1000000>; 458 regulator-max-microvolt = <1000000>;
464 }; 459 };
465 460
466 dcdc6: regulator-dcdc6 { 461 dcdc6: regulator-dcdc6 {
467 compatible = "ti,tps65218-dcdc6";
468 regulator-name = "v1_8bat"; 462 regulator-name = "v1_8bat";
469 regulator-min-microvolt = <1800000>; 463 regulator-min-microvolt = <1800000>;
470 regulator-max-microvolt = <1800000>; 464 regulator-max-microvolt = <1800000>;
471 }; 465 };
472 466
473 ldo1: regulator-ldo1 { 467 ldo1: regulator-ldo1 {
474 compatible = "ti,tps65218-ldo1";
475 regulator-min-microvolt = <1800000>; 468 regulator-min-microvolt = <1800000>;
476 regulator-max-microvolt = <1800000>; 469 regulator-max-microvolt = <1800000>;
477 regulator-boot-on; 470 regulator-boot-on;
diff --git a/arch/arm/boot/dts/am572x-idk.dts b/arch/arm/boot/dts/am572x-idk.dts
index e3acb99703e1..87bbc66f0f21 100644
--- a/arch/arm/boot/dts/am572x-idk.dts
+++ b/arch/arm/boot/dts/am572x-idk.dts
@@ -18,7 +18,7 @@
18 compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74", 18 compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74",
19 "ti,dra7"; 19 "ti,dra7";
20 20
21 memory { 21 memory@0 {
22 device_type = "memory"; 22 device_type = "memory";
23 reg = <0x0 0x80000000 0x0 0x80000000>; 23 reg = <0x0 0x80000000 0x0 0x80000000>;
24 }; 24 };
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
new file mode 100644
index 000000000000..6df7829a2c15
--- /dev/null
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
@@ -0,0 +1,596 @@
1/*
2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "dra74x.dtsi"
11#include "am57xx-commercial-grade.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14
15/ {
16 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
17
18 aliases {
19 rtc0 = &mcp_rtc;
20 rtc1 = &tps659038_rtc;
21 rtc2 = &rtc;
22 display0 = &hdmi0;
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x80000000 0x0 0x80000000>;
28 };
29
30 vdd_3v3: fixedregulator-vdd_3v3 {
31 compatible = "regulator-fixed";
32 regulator-name = "vdd_3v3";
33 vin-supply = <&regen1>;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 };
37
38 aic_dvdd: fixedregulator-aic_dvdd {
39 compatible = "regulator-fixed";
40 regulator-name = "aic_dvdd_fixed";
41 vin-supply = <&vdd_3v3>;
42 regulator-min-microvolt = <1800000>;
43 regulator-max-microvolt = <1800000>;
44 };
45
46 vtt_fixed: fixedregulator-vtt {
47 /* TPS51200 */
48 compatible = "regulator-fixed";
49 regulator-name = "vtt_fixed";
50 vin-supply = <&smps3_reg>;
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
54 regulator-boot-on;
55 enable-active-high;
56 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
57 };
58
59 leds {
60 compatible = "gpio-leds";
61
62 led0 {
63 label = "beagle-x15:usr0";
64 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "heartbeat";
66 default-state = "off";
67 };
68
69 led1 {
70 label = "beagle-x15:usr1";
71 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
72 linux,default-trigger = "cpu0";
73 default-state = "off";
74 };
75
76 led2 {
77 label = "beagle-x15:usr2";
78 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger = "mmc0";
80 default-state = "off";
81 };
82
83 led3 {
84 label = "beagle-x15:usr3";
85 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
86 linux,default-trigger = "disk-activity";
87 default-state = "off";
88 };
89 };
90
91 gpio_fan: gpio_fan {
92 /* Based on 5v 500mA AFB02505HHB */
93 compatible = "gpio-fan";
94 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
95 gpio-fan,speed-map = <0 0>,
96 <13000 1>;
97 #cooling-cells = <2>;
98 };
99
100 hdmi0: connector {
101 compatible = "hdmi-connector";
102 label = "hdmi";
103
104 type = "a";
105
106 port {
107 hdmi_connector_in: endpoint {
108 remote-endpoint = <&tpd12s015_out>;
109 };
110 };
111 };
112
113 tpd12s015: encoder {
114 compatible = "ti,tpd12s015";
115
116 ports {
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 port@0 {
121 reg = <0>;
122
123 tpd12s015_in: endpoint {
124 remote-endpoint = <&hdmi_out>;
125 };
126 };
127
128 port@1 {
129 reg = <1>;
130
131 tpd12s015_out: endpoint {
132 remote-endpoint = <&hdmi_connector_in>;
133 };
134 };
135 };
136 };
137
138 sound0: sound0 {
139 compatible = "simple-audio-card";
140 simple-audio-card,name = "BeagleBoard-X15";
141 simple-audio-card,widgets =
142 "Line", "Line Out",
143 "Line", "Line In";
144 simple-audio-card,routing =
145 "Line Out", "LLOUT",
146 "Line Out", "RLOUT",
147 "MIC2L", "Line In",
148 "MIC2R", "Line In";
149 simple-audio-card,format = "dsp_b";
150 simple-audio-card,bitclock-master = <&sound0_master>;
151 simple-audio-card,frame-master = <&sound0_master>;
152 simple-audio-card,bitclock-inversion;
153
154 simple-audio-card,cpu {
155 sound-dai = <&mcasp3>;
156 };
157
158 sound0_master: simple-audio-card,codec {
159 sound-dai = <&tlv320aic3104>;
160 clocks = <&clkout2_clk>;
161 };
162 };
163};
164
165&dra7_pmx_core {
166 mmc1_pins_default: mmc1_pins_default {
167 pinctrl-single,pins = <
168 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
169 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
170 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
171 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
172 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
173 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
174 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
175 >;
176 };
177
178 mmc2_pins_default: mmc2_pins_default {
179 pinctrl-single,pins = <
180 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
181 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
182 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
183 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
184 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
185 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
186 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
187 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
188 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
189 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
190 >;
191 };
192};
193&i2c1 {
194 status = "okay";
195 clock-frequency = <400000>;
196
197 tps659038: tps659038@58 {
198 compatible = "ti,tps659038";
199 reg = <0x58>;
200 interrupt-parent = <&gpio1>;
201 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
202
203 #interrupt-cells = <2>;
204 interrupt-controller;
205
206 ti,system-power-controller;
207
208 tps659038_pmic {
209 compatible = "ti,tps659038-pmic";
210
211 regulators {
212 smps12_reg: smps12 {
213 /* VDD_MPU */
214 regulator-name = "smps12";
215 regulator-min-microvolt = < 850000>;
216 regulator-max-microvolt = <1250000>;
217 regulator-always-on;
218 regulator-boot-on;
219 };
220
221 smps3_reg: smps3 {
222 /* VDD_DDR */
223 regulator-name = "smps3";
224 regulator-min-microvolt = <1350000>;
225 regulator-max-microvolt = <1350000>;
226 regulator-always-on;
227 regulator-boot-on;
228 };
229
230 smps45_reg: smps45 {
231 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
232 regulator-name = "smps45";
233 regulator-min-microvolt = < 850000>;
234 regulator-max-microvolt = <1250000>;
235 regulator-always-on;
236 regulator-boot-on;
237 };
238
239 smps6_reg: smps6 {
240 /* VDD_CORE */
241 regulator-name = "smps6";
242 regulator-min-microvolt = <850000>;
243 regulator-max-microvolt = <1150000>;
244 regulator-always-on;
245 regulator-boot-on;
246 };
247
248 /* SMPS7 unused */
249
250 smps8_reg: smps8 {
251 /* VDD_1V8 */
252 regulator-name = "smps8";
253 regulator-min-microvolt = <1800000>;
254 regulator-max-microvolt = <1800000>;
255 regulator-always-on;
256 regulator-boot-on;
257 };
258
259 /* SMPS9 unused */
260
261 ldo1_reg: ldo1 {
262 /* VDD_SD / VDDSHV8 */
263 regulator-name = "ldo1";
264 regulator-min-microvolt = <1800000>;
265 regulator-max-microvolt = <3300000>;
266 regulator-boot-on;
267 regulator-always-on;
268 };
269
270 ldo2_reg: ldo2 {
271 /* VDD_SHV5 */
272 regulator-name = "ldo2";
273 regulator-min-microvolt = <3300000>;
274 regulator-max-microvolt = <3300000>;
275 regulator-always-on;
276 regulator-boot-on;
277 };
278
279 ldo3_reg: ldo3 {
280 /* VDDA_1V8_PHYA */
281 regulator-name = "ldo3";
282 regulator-min-microvolt = <1800000>;
283 regulator-max-microvolt = <1800000>;
284 regulator-always-on;
285 regulator-boot-on;
286 };
287
288 ldo4_reg: ldo4 {
289 /* VDDA_1V8_PHYB */
290 regulator-name = "ldo4";
291 regulator-min-microvolt = <1800000>;
292 regulator-max-microvolt = <1800000>;
293 regulator-always-on;
294 regulator-boot-on;
295 };
296
297 ldo9_reg: ldo9 {
298 /* VDD_RTC */
299 regulator-name = "ldo9";
300 regulator-min-microvolt = <1050000>;
301 regulator-max-microvolt = <1050000>;
302 regulator-always-on;
303 regulator-boot-on;
304 };
305
306 ldoln_reg: ldoln {
307 /* VDDA_1V8_PLL */
308 regulator-name = "ldoln";
309 regulator-min-microvolt = <1800000>;
310 regulator-max-microvolt = <1800000>;
311 regulator-always-on;
312 regulator-boot-on;
313 };
314
315 ldousb_reg: ldousb {
316 /* VDDA_3V_USB: VDDA_USBHS33 */
317 regulator-name = "ldousb";
318 regulator-min-microvolt = <3300000>;
319 regulator-max-microvolt = <3300000>;
320 regulator-boot-on;
321 };
322
323 regen1: regen1 {
324 /* VDD_3V3_ON */
325 regulator-name = "regen1";
326 regulator-boot-on;
327 regulator-always-on;
328 };
329 };
330 };
331
332 tps659038_rtc: tps659038_rtc {
333 compatible = "ti,palmas-rtc";
334 interrupt-parent = <&tps659038>;
335 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
336 wakeup-source;
337 };
338
339 tps659038_pwr_button: tps659038_pwr_button {
340 compatible = "ti,palmas-pwrbutton";
341 interrupt-parent = <&tps659038>;
342 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
343 wakeup-source;
344 ti,palmas-long-press-seconds = <12>;
345 };
346
347 tps659038_gpio: tps659038_gpio {
348 compatible = "ti,palmas-gpio";
349 gpio-controller;
350 #gpio-cells = <2>;
351 };
352
353 extcon_usb2: tps659038_usb {
354 compatible = "ti,palmas-usb-vid";
355 ti,enable-vbus-detection;
356 vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
357 };
358
359 };
360
361 tmp102: tmp102@48 {
362 compatible = "ti,tmp102";
363 reg = <0x48>;
364 interrupt-parent = <&gpio7>;
365 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
366 #thermal-sensor-cells = <1>;
367 };
368
369 tlv320aic3104: tlv320aic3104@18 {
370 #sound-dai-cells = <0>;
371 compatible = "ti,tlv320aic3104";
372 reg = <0x18>;
373 assigned-clocks = <&clkoutmux2_clk_mux>;
374 assigned-clock-parents = <&sys_clk2_dclk_div>;
375
376 status = "okay";
377 adc-settle-ms = <40>;
378
379 AVDD-supply = <&vdd_3v3>;
380 IOVDD-supply = <&vdd_3v3>;
381 DRVDD-supply = <&vdd_3v3>;
382 DVDD-supply = <&aic_dvdd>;
383 };
384
385 eeprom: eeprom@50 {
386 compatible = "at,24c32";
387 reg = <0x50>;
388 };
389};
390
391&i2c3 {
392 status = "okay";
393 clock-frequency = <400000>;
394
395 mcp_rtc: rtc@6f {
396 compatible = "microchip,mcp7941x";
397 reg = <0x6f>;
398 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
399 <&dra7_pmx_core 0x424>;
400 interrupt-names = "irq", "wakeup";
401
402 vcc-supply = <&vdd_3v3>;
403 wakeup-source;
404 };
405};
406
407&gpio7 {
408 ti,no-reset-on-init;
409 ti,no-idle-on-init;
410};
411
412&cpu0 {
413 cpu0-supply = <&smps12_reg>;
414 voltage-tolerance = <1>;
415};
416
417&uart3 {
418 status = "okay";
419 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
420 <&dra7_pmx_core 0x3f8>;
421};
422
423&mac {
424 status = "okay";
425 dual_emac;
426};
427
428&cpsw_emac0 {
429 phy_id = <&davinci_mdio>, <1>;
430 phy-mode = "rgmii";
431 dual_emac_res_vlan = <1>;
432};
433
434&cpsw_emac1 {
435 phy_id = <&davinci_mdio>, <2>;
436 phy-mode = "rgmii";
437 dual_emac_res_vlan = <2>;
438};
439
440&mmc1 {
441 status = "okay";
442
443 pinctrl-names = "default";
444 pinctrl-0 = <&mmc1_pins_default>;
445
446 bus-width = <4>;
447 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
448};
449
450&mmc2 {
451 status = "okay";
452
453 pinctrl-names = "default";
454 pinctrl-0 = <&mmc2_pins_default>;
455
456 vmmc-supply = <&vdd_3v3>;
457 bus-width = <8>;
458 ti,non-removable;
459 cap-mmc-dual-data-rate;
460};
461
462&sata {
463 status = "okay";
464};
465
466&usb2_phy1 {
467 phy-supply = <&ldousb_reg>;
468};
469
470&usb2_phy2 {
471 phy-supply = <&ldousb_reg>;
472};
473
474&usb1 {
475 dr_mode = "host";
476};
477
478&omap_dwc3_2 {
479 extcon = <&extcon_usb2>;
480};
481
482&usb2 {
483 /*
484 * Stand alone usage is peripheral only.
485 * However, with some resistor modifications
486 * this port can be used via expansion connectors
487 * as "host" or "dual-role". If so, provide
488 * the necessary dr_mode override in the expansion
489 * board's DT.
490 */
491 dr_mode = "peripheral";
492};
493
494&cpu_trips {
495 cpu_alert1: cpu_alert1 {
496 temperature = <50000>; /* millicelsius */
497 hysteresis = <2000>; /* millicelsius */
498 type = "active";
499 };
500};
501
502&cpu_cooling_maps {
503 map1 {
504 trip = <&cpu_alert1>;
505 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
506 };
507};
508
509&thermal_zones {
510 board_thermal: board_thermal {
511 polling-delay-passive = <1250>; /* milliseconds */
512 polling-delay = <1500>; /* milliseconds */
513
514 /* sensor ID */
515 thermal-sensors = <&tmp102 0>;
516
517 board_trips: trips {
518 board_alert0: board_alert {
519 temperature = <40000>; /* millicelsius */
520 hysteresis = <2000>; /* millicelsius */
521 type = "active";
522 };
523
524 board_crit: board_crit {
525 temperature = <105000>; /* millicelsius */
526 hysteresis = <0>; /* millicelsius */
527 type = "critical";
528 };
529 };
530
531 board_cooling_maps: cooling-maps {
532 map0 {
533 trip = <&board_alert0>;
534 cooling-device =
535 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
536 };
537 };
538 };
539};
540
541&dss {
542 status = "ok";
543
544 vdda_video-supply = <&ldoln_reg>;
545};
546
547&hdmi {
548 status = "ok";
549 vdda-supply = <&ldo4_reg>;
550
551 port {
552 hdmi_out: endpoint {
553 remote-endpoint = <&tpd12s015_in>;
554 };
555 };
556};
557
558&pcie1 {
559 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
560};
561
562&mcasp3 {
563 #sound-dai-cells = <0>;
564 assigned-clocks = <&mcasp3_ahclkx_mux>;
565 assigned-clock-parents = <&sys_clkin2>;
566 status = "okay";
567
568 op-mode = <0>; /* MCASP_IIS_MODE */
569 tdm-slots = <2>;
570 /* 4 serializers */
571 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
572 1 2 0 0
573 >;
574 tx-num-evt = <32>;
575 rx-num-evt = <32>;
576};
577
578&mailbox5 {
579 status = "okay";
580 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
581 status = "okay";
582 };
583 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
584 status = "okay";
585 };
586};
587
588&mailbox6 {
589 status = "okay";
590 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
591 status = "okay";
592 };
593 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
594 status = "okay";
595 };
596};
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
new file mode 100644
index 000000000000..ca85570629fd
--- /dev/null
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
@@ -0,0 +1,24 @@
1/*
2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "am57xx-beagle-x15-common.dtsi"
10
11/ {
12 model = "TI AM5728 BeagleBoard-X15 rev B1";
13};
14
15&tpd12s015 {
16 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
17 <&gpio2 30 GPIO_ACTIVE_HIGH>, /* gpio2_30, LS OE */
18 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
19};
20
21&mmc1 {
22 vmmc-supply = <&vdd_3v3>;
23 vmmc-aux-supply = <&ldo1_reg>;
24};
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index c4d04c5293b9..8c66f2efd283 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -1,822 +1,24 @@
1/* 1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8/dts-v1/;
9 8
10#include "dra74x.dtsi" 9#include "am57xx-beagle-x15-common.dtsi"
11#include "am57xx-commercial-grade.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14 10
15/ { 11/ {
12 /* NOTE: This describes the "original" pre-production A2 revision */
16 model = "TI AM5728 BeagleBoard-X15"; 13 model = "TI AM5728 BeagleBoard-X15";
17 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
18
19 aliases {
20 rtc0 = &mcp_rtc;
21 rtc1 = &tps659038_rtc;
22 rtc2 = &rtc;
23 display0 = &hdmi0;
24 };
25
26 memory {
27 device_type = "memory";
28 reg = <0x0 0x80000000 0x0 0x80000000>;
29 };
30
31 vdd_3v3: fixedregulator-vdd_3v3 {
32 compatible = "regulator-fixed";
33 regulator-name = "vdd_3v3";
34 vin-supply = <&regen1>;
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
37 };
38
39 aic_dvdd: fixedregulator-aic_dvdd {
40 compatible = "regulator-fixed";
41 regulator-name = "aic_dvdd_fixed";
42 vin-supply = <&vdd_3v3>;
43 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <1800000>;
45 };
46
47 vtt_fixed: fixedregulator-vtt {
48 /* TPS51200 */
49 compatible = "regulator-fixed";
50 regulator-name = "vtt_fixed";
51 vin-supply = <&smps3_reg>;
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 regulator-always-on;
55 regulator-boot-on;
56 enable-active-high;
57 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
58 };
59
60 leds {
61 compatible = "gpio-leds";
62 pinctrl-names = "default";
63 pinctrl-0 = <&leds_pins_default>;
64
65 led@0 {
66 label = "beagle-x15:usr0";
67 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 default-state = "off";
70 };
71
72 led@1 {
73 label = "beagle-x15:usr1";
74 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
75 linux,default-trigger = "cpu0";
76 default-state = "off";
77 };
78
79 led@2 {
80 label = "beagle-x15:usr2";
81 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
82 linux,default-trigger = "mmc0";
83 default-state = "off";
84 };
85
86 led@3 {
87 label = "beagle-x15:usr3";
88 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
89 linux,default-trigger = "disk-activity";
90 default-state = "off";
91 };
92 };
93
94 gpio_fan: gpio_fan {
95 /* Based on 5v 500mA AFB02505HHB */
96 compatible = "gpio-fan";
97 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
98 gpio-fan,speed-map = <0 0>,
99 <13000 1>;
100 #cooling-cells = <2>;
101 };
102
103 hdmi0: connector {
104 compatible = "hdmi-connector";
105 label = "hdmi";
106
107 type = "a";
108
109 port {
110 hdmi_connector_in: endpoint {
111 remote-endpoint = <&tpd12s015_out>;
112 };
113 };
114 };
115
116 tpd12s015: encoder {
117 compatible = "ti,tpd12s015";
118
119 pinctrl-names = "default";
120 pinctrl-0 = <&tpd12s015_pins>;
121
122 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
123 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
124 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
125
126 ports {
127 #address-cells = <1>;
128 #size-cells = <0>;
129
130 port@0 {
131 reg = <0>;
132
133 tpd12s015_in: endpoint {
134 remote-endpoint = <&hdmi_out>;
135 };
136 };
137
138 port@1 {
139 reg = <1>;
140
141 tpd12s015_out: endpoint {
142 remote-endpoint = <&hdmi_connector_in>;
143 };
144 };
145 };
146 };
147
148 sound0: sound0 {
149 compatible = "simple-audio-card";
150 simple-audio-card,name = "BeagleBoard-X15";
151 simple-audio-card,widgets =
152 "Line", "Line Out",
153 "Line", "Line In";
154 simple-audio-card,routing =
155 "Line Out", "LLOUT",
156 "Line Out", "RLOUT",
157 "MIC2L", "Line In",
158 "MIC2R", "Line In";
159 simple-audio-card,format = "dsp_b";
160 simple-audio-card,bitclock-master = <&sound0_master>;
161 simple-audio-card,frame-master = <&sound0_master>;
162 simple-audio-card,bitclock-inversion;
163
164 simple-audio-card,cpu {
165 sound-dai = <&mcasp3>;
166 };
167
168 sound0_master: simple-audio-card,codec {
169 sound-dai = <&tlv320aic3104>;
170 clocks = <&clkout2_clk>;
171 };
172 };
173}; 14};
174 15
175&dra7_pmx_core { 16&tpd12s015 {
176 leds_pins_default: leds_pins_default { 17 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
177 pinctrl-single,pins = < 18 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
178 DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */ 19 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
179 DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
180 DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
181 DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
182 >;
183 };
184
185 i2c1_pins_default: i2c1_pins_default {
186 pinctrl-single,pins = <
187 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
188 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
189 >;
190 };
191
192 hdmi_pins: pinmux_hdmi_pins {
193 pinctrl-single,pins = <
194 DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
195 DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
196 >;
197 };
198
199 i2c3_pins_default: i2c3_pins_default {
200 pinctrl-single,pins = <
201 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
202 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
203 >;
204 };
205
206 uart3_pins_default: uart3_pins_default {
207 pinctrl-single,pins = <
208 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
209 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
210 >;
211 };
212
213 mmc1_pins_default: mmc1_pins_default {
214 pinctrl-single,pins = <
215 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
216 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
217 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
218 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
219 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
220 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
221 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
222 >;
223 };
224
225 mmc2_pins_default: mmc2_pins_default {
226 pinctrl-single,pins = <
227 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
228 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
229 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
230 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
231 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
232 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
233 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
234 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
235 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
236 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
237 >;
238 };
239
240 cpsw_pins_default: cpsw_pins_default {
241 pinctrl-single,pins = <
242 /* Slave 1 */
243 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
244 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
245 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
246 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
247 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
248 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
249 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
250 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
251 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
252 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
253 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
254 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
255
256 /* Slave 2 */
257 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
258 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
259 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
260 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
261 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
262 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
263 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
264 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
265 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
266 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
267 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
268 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
269 >;
270
271 };
272
273 cpsw_pins_sleep: cpsw_pins_sleep {
274 pinctrl-single,pins = <
275 /* Slave 1 */
276 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
277 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
278 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
279 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
280 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
281 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
282 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
283 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
284 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
285 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
286 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
287 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
288
289 /* Slave 2 */
290 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
291 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
292 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
293 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
294 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
295 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
296 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
297 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
298 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
299 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
300 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
301 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
302 >;
303 };
304
305 davinci_mdio_pins_default: davinci_mdio_pins_default {
306 pinctrl-single,pins = <
307 /* MDIO */
308 DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
309 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
310 >;
311 };
312
313 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
314 pinctrl-single,pins = <
315 DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
316 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
317 >;
318 };
319
320 tps659038_pins_default: tps659038_pins_default {
321 pinctrl-single,pins = <
322 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
323 >;
324 };
325
326 tmp102_pins_default: tmp102_pins_default {
327 pinctrl-single,pins = <
328 DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
329 >;
330 };
331
332 mcp79410_pins_default: mcp79410_pins_default {
333 pinctrl-single,pins = <
334 DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
335 >;
336 };
337
338 usb1_pins: pinmux_usb1_pins {
339 pinctrl-single,pins = <
340 DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
341 >;
342 };
343
344 tpd12s015_pins: pinmux_tpd12s015_pins {
345 pinctrl-single,pins = <
346 DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
347 DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
348 DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
349 >;
350 };
351
352 clkout2_pins_default: clkout2_pins_default {
353 pinctrl-single,pins = <
354 DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
355 >;
356 };
357
358 clkout2_pins_sleep: clkout2_pins_sleep {
359 pinctrl-single,pins = <
360 DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
361 >;
362 };
363
364 mcasp3_pins_default: mcasp3_pins_default {
365 pinctrl-single,pins = <
366 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
367 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
368 DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
369 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
370 >;
371 };
372
373 mcasp3_pins_sleep: mcasp3_pins_sleep {
374 pinctrl-single,pins = <
375 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
376 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
377 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
378 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
379 >;
380 };
381};
382
383&i2c1 {
384 status = "okay";
385 pinctrl-names = "default";
386 pinctrl-0 = <&i2c1_pins_default>;
387 clock-frequency = <400000>;
388
389 tps659038: tps659038@58 {
390 compatible = "ti,tps659038";
391 reg = <0x58>;
392 interrupt-parent = <&gpio1>;
393 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
394
395 pinctrl-names = "default";
396 pinctrl-0 = <&tps659038_pins_default>;
397
398 #interrupt-cells = <2>;
399 interrupt-controller;
400
401 ti,system-power-controller;
402
403 tps659038_pmic {
404 compatible = "ti,tps659038-pmic";
405
406 regulators {
407 smps12_reg: smps12 {
408 /* VDD_MPU */
409 regulator-name = "smps12";
410 regulator-min-microvolt = < 850000>;
411 regulator-max-microvolt = <1250000>;
412 regulator-always-on;
413 regulator-boot-on;
414 };
415
416 smps3_reg: smps3 {
417 /* VDD_DDR */
418 regulator-name = "smps3";
419 regulator-min-microvolt = <1350000>;
420 regulator-max-microvolt = <1350000>;
421 regulator-always-on;
422 regulator-boot-on;
423 };
424
425 smps45_reg: smps45 {
426 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
427 regulator-name = "smps45";
428 regulator-min-microvolt = < 850000>;
429 regulator-max-microvolt = <1250000>;
430 regulator-always-on;
431 regulator-boot-on;
432 };
433
434 smps6_reg: smps6 {
435 /* VDD_CORE */
436 regulator-name = "smps6";
437 regulator-min-microvolt = <850000>;
438 regulator-max-microvolt = <1150000>;
439 regulator-always-on;
440 regulator-boot-on;
441 };
442
443 /* SMPS7 unused */
444
445 smps8_reg: smps8 {
446 /* VDD_1V8 */
447 regulator-name = "smps8";
448 regulator-min-microvolt = <1800000>;
449 regulator-max-microvolt = <1800000>;
450 regulator-always-on;
451 regulator-boot-on;
452 };
453
454 /* SMPS9 unused */
455
456 ldo1_reg: ldo1 {
457 /* VDD_SD / VDDSHV8 */
458 regulator-name = "ldo1";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <3300000>;
461 regulator-boot-on;
462 regulator-always-on;
463 };
464
465 ldo2_reg: ldo2 {
466 /* VDD_SHV5 */
467 regulator-name = "ldo2";
468 regulator-min-microvolt = <3300000>;
469 regulator-max-microvolt = <3300000>;
470 regulator-always-on;
471 regulator-boot-on;
472 };
473
474 ldo3_reg: ldo3 {
475 /* VDDA_1V8_PHYA */
476 regulator-name = "ldo3";
477 regulator-min-microvolt = <1800000>;
478 regulator-max-microvolt = <1800000>;
479 regulator-always-on;
480 regulator-boot-on;
481 };
482
483 ldo4_reg: ldo4 {
484 /* VDDA_1V8_PHYB */
485 regulator-name = "ldo4";
486 regulator-min-microvolt = <1800000>;
487 regulator-max-microvolt = <1800000>;
488 regulator-always-on;
489 regulator-boot-on;
490 };
491
492 ldo9_reg: ldo9 {
493 /* VDD_RTC */
494 regulator-name = "ldo9";
495 regulator-min-microvolt = <1050000>;
496 regulator-max-microvolt = <1050000>;
497 regulator-always-on;
498 regulator-boot-on;
499 };
500
501 ldoln_reg: ldoln {
502 /* VDDA_1V8_PLL */
503 regulator-name = "ldoln";
504 regulator-min-microvolt = <1800000>;
505 regulator-max-microvolt = <1800000>;
506 regulator-always-on;
507 regulator-boot-on;
508 };
509
510 ldousb_reg: ldousb {
511 /* VDDA_3V_USB: VDDA_USBHS33 */
512 regulator-name = "ldousb";
513 regulator-min-microvolt = <3300000>;
514 regulator-max-microvolt = <3300000>;
515 regulator-boot-on;
516 };
517
518 regen1: regen1 {
519 /* VDD_3V3_ON */
520 regulator-name = "regen1";
521 regulator-boot-on;
522 regulator-always-on;
523 };
524 };
525 };
526
527 tps659038_rtc: tps659038_rtc {
528 compatible = "ti,palmas-rtc";
529 interrupt-parent = <&tps659038>;
530 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
531 wakeup-source;
532 };
533
534 tps659038_pwr_button: tps659038_pwr_button {
535 compatible = "ti,palmas-pwrbutton";
536 interrupt-parent = <&tps659038>;
537 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
538 wakeup-source;
539 ti,palmas-long-press-seconds = <12>;
540 };
541
542 tps659038_gpio: tps659038_gpio {
543 compatible = "ti,palmas-gpio";
544 gpio-controller;
545 #gpio-cells = <2>;
546 };
547
548 extcon_usb2: tps659038_usb {
549 compatible = "ti,palmas-usb-vid";
550 ti,enable-vbus-detection;
551 vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
552 };
553
554 };
555
556 tmp102: tmp102@48 {
557 compatible = "ti,tmp102";
558 reg = <0x48>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&tmp102_pins_default>;
561 interrupt-parent = <&gpio7>;
562 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
563 #thermal-sensor-cells = <1>;
564 };
565
566 tlv320aic3104: tlv320aic3104@18 {
567 #sound-dai-cells = <0>;
568 compatible = "ti,tlv320aic3104";
569 reg = <0x18>;
570 pinctrl-names = "default", "sleep";
571 pinctrl-0 = <&clkout2_pins_default>;
572 pinctrl-1 = <&clkout2_pins_sleep>;
573 assigned-clocks = <&clkoutmux2_clk_mux>;
574 assigned-clock-parents = <&sys_clk2_dclk_div>;
575
576 status = "okay";
577 adc-settle-ms = <40>;
578
579 AVDD-supply = <&vdd_3v3>;
580 IOVDD-supply = <&vdd_3v3>;
581 DRVDD-supply = <&vdd_3v3>;
582 DVDD-supply = <&aic_dvdd>;
583 };
584
585 eeprom: eeprom@50 {
586 compatible = "at,24c32";
587 reg = <0x50>;
588 };
589};
590
591&i2c3 {
592 status = "okay";
593 pinctrl-names = "default";
594 pinctrl-0 = <&i2c3_pins_default>;
595 clock-frequency = <400000>;
596
597 mcp_rtc: rtc@6f {
598 compatible = "microchip,mcp7941x";
599 reg = <0x6f>;
600 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
601 <&dra7_pmx_core 0x424>;
602 interrupt-names = "irq", "wakeup";
603
604 pinctrl-names = "default";
605 pinctrl-0 = <&mcp79410_pins_default>;
606
607 vcc-supply = <&vdd_3v3>;
608 wakeup-source;
609 };
610};
611
612&gpio7 {
613 ti,no-reset-on-init;
614 ti,no-idle-on-init;
615};
616
617&cpu0 {
618 cpu0-supply = <&smps12_reg>;
619 voltage-tolerance = <1>;
620};
621
622&uart3 {
623 status = "okay";
624 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
625 <&dra7_pmx_core 0x3f8>;
626
627 pinctrl-names = "default";
628 pinctrl-0 = <&uart3_pins_default>;
629};
630
631&mac {
632 status = "okay";
633 pinctrl-names = "default", "sleep";
634 pinctrl-0 = <&cpsw_pins_default>;
635 pinctrl-1 = <&cpsw_pins_sleep>;
636 dual_emac;
637};
638
639&cpsw_emac0 {
640 phy_id = <&davinci_mdio>, <1>;
641 phy-mode = "rgmii";
642 dual_emac_res_vlan = <1>;
643};
644
645&cpsw_emac1 {
646 phy_id = <&davinci_mdio>, <2>;
647 phy-mode = "rgmii";
648 dual_emac_res_vlan = <2>;
649};
650
651&davinci_mdio {
652 pinctrl-names = "default", "sleep";
653 pinctrl-0 = <&davinci_mdio_pins_default>;
654 pinctrl-1 = <&davinci_mdio_pins_sleep>;
655}; 20};
656 21
657&mmc1 { 22&mmc1 {
658 status = "okay";
659
660 pinctrl-names = "default";
661 pinctrl-0 = <&mmc1_pins_default>;
662
663 vmmc-supply = <&ldo1_reg>; 23 vmmc-supply = <&ldo1_reg>;
664 bus-width = <4>;
665 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
666};
667
668&mmc2 {
669 status = "okay";
670
671 pinctrl-names = "default";
672 pinctrl-0 = <&mmc2_pins_default>;
673
674 vmmc-supply = <&vdd_3v3>;
675 bus-width = <8>;
676 ti,non-removable;
677 cap-mmc-dual-data-rate;
678};
679
680&sata {
681 status = "okay";
682};
683
684&usb2_phy1 {
685 phy-supply = <&ldousb_reg>;
686};
687
688&usb2_phy2 {
689 phy-supply = <&ldousb_reg>;
690};
691
692&usb1 {
693 dr_mode = "host";
694 pinctrl-names = "default";
695 pinctrl-0 = <&usb1_pins>;
696};
697
698&omap_dwc3_2 {
699 extcon = <&extcon_usb2>;
700};
701
702&usb2 {
703 /*
704 * Stand alone usage is peripheral only.
705 * However, with some resistor modifications
706 * this port can be used via expansion connectors
707 * as "host" or "dual-role". If so, provide
708 * the necessary dr_mode override in the expansion
709 * board's DT.
710 */
711 dr_mode = "peripheral";
712};
713
714&cpu_trips {
715 cpu_alert1: cpu_alert1 {
716 temperature = <50000>; /* millicelsius */
717 hysteresis = <2000>; /* millicelsius */
718 type = "active";
719 };
720};
721
722&cpu_cooling_maps {
723 map1 {
724 trip = <&cpu_alert1>;
725 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
726 };
727};
728
729&thermal_zones {
730 board_thermal: board_thermal {
731 polling-delay-passive = <1250>; /* milliseconds */
732 polling-delay = <1500>; /* milliseconds */
733
734 /* sensor ID */
735 thermal-sensors = <&tmp102 0>;
736
737 board_trips: trips {
738 board_alert0: board_alert {
739 temperature = <40000>; /* millicelsius */
740 hysteresis = <2000>; /* millicelsius */
741 type = "active";
742 };
743
744 board_crit: board_crit {
745 temperature = <105000>; /* millicelsius */
746 hysteresis = <0>; /* millicelsius */
747 type = "critical";
748 };
749 };
750
751 board_cooling_maps: cooling-maps {
752 map0 {
753 trip = <&board_alert0>;
754 cooling-device =
755 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
756 };
757 };
758 };
759};
760
761&dss {
762 status = "ok";
763
764 vdda_video-supply = <&ldoln_reg>;
765};
766
767&hdmi {
768 status = "ok";
769 vdda-supply = <&ldo4_reg>;
770
771 pinctrl-names = "default";
772 pinctrl-0 = <&hdmi_pins>;
773
774 port {
775 hdmi_out: endpoint {
776 remote-endpoint = <&tpd12s015_in>;
777 };
778 };
779};
780
781&pcie1 {
782 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
783};
784
785&mcasp3 {
786 #sound-dai-cells = <0>;
787 pinctrl-names = "default", "sleep";
788 pinctrl-0 = <&mcasp3_pins_default>;
789 pinctrl-1 = <&mcasp3_pins_sleep>;
790 assigned-clocks = <&mcasp3_ahclkx_mux>;
791 assigned-clock-parents = <&sys_clkin2>;
792 status = "okay";
793
794 op-mode = <0>; /* MCASP_IIS_MODE */
795 tdm-slots = <2>;
796 /* 4 serializers */
797 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
798 1 2 0 0
799 >;
800 tx-num-evt = <32>;
801 rx-num-evt = <32>;
802};
803
804&mailbox5 {
805 status = "okay";
806 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
807 status = "okay";
808 };
809 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
810 status = "okay";
811 };
812};
813
814&mailbox6 {
815 status = "okay";
816 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
817 status = "okay";
818 };
819 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
820 status = "okay";
821 };
822}; 24};
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
index 378b142ef88c..203266f88480 100644
--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
@@ -19,7 +19,7 @@
19 model = "CompuLab CL-SOM-AM57x"; 19 model = "CompuLab CL-SOM-AM57x";
20 compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; 20 compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
21 21
22 memory { 22 memory@0 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */ 24 reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
25 }; 25 };
@@ -29,7 +29,7 @@
29 pinctrl-names = "default"; 29 pinctrl-names = "default";
30 pinctrl-0 = <&leds_pins_default>; 30 pinctrl-0 = <&leds_pins_default>;
31 31
32 led@0 { 32 led0 {
33 label = "cl-som-am57x:green"; 33 label = "cl-som-am57x:green";
34 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 34 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
35 linux,default-trigger = "heartbeat"; 35 linux,default-trigger = "heartbeat";
diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi
index 0e63b9dff6e7..03cec62260e1 100644
--- a/arch/arm/boot/dts/am57xx-idk-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi
@@ -304,3 +304,52 @@
304 ti,non-removable; 304 ti,non-removable;
305 max-frequency = <96000000>; 305 max-frequency = <96000000>;
306}; 306};
307
308&qspi {
309 status = "okay";
310
311 spi-max-frequency = <76800000>;
312 m25p80@0 {
313 compatible = "s25fl256s1", "jedec,spi-nor";
314 spi-max-frequency = <76800000>;
315 reg = <0>;
316 spi-tx-bus-width = <1>;
317 spi-rx-bus-width = <4>;
318 #address-cells = <1>;
319 #size-cells = <1>;
320
321 /* MTD partition table.
322 * The ROM checks the first four physical blocks
323 * for a valid file to boot and the flash here is
324 * 64KiB block size.
325 */
326 partition@0 {
327 label = "QSPI.SPL";
328 reg = <0x00000000 0x000040000>;
329 };
330 partition@1 {
331 label = "QSPI.u-boot";
332 reg = <0x00040000 0x00100000>;
333 };
334 partition@2 {
335 label = "QSPI.u-boot-spl-os";
336 reg = <0x00140000 0x00080000>;
337 };
338 partition@3 {
339 label = "QSPI.u-boot-env";
340 reg = <0x001c0000 0x00010000>;
341 };
342 partition@4 {
343 label = "QSPI.u-boot-env.backup1";
344 reg = <0x001d0000 0x0010000>;
345 };
346 partition@5 {
347 label = "QSPI.kernel";
348 reg = <0x001e0000 0x0800000>;
349 };
350 partition@6 {
351 label = "QSPI.file-system";
352 reg = <0x009e0000 0x01620000>;
353 };
354 };
355};
diff --git a/arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dts b/arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dts
new file mode 100644
index 000000000000..e18769df9fd9
--- /dev/null
+++ b/arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dts
@@ -0,0 +1,32 @@
1/*
2 * Copyright 2016 Linaro Ltd
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23#include "arm-realview-eb-11mp-ctrevb.dts"
24#include "arm-realview-eb-bbrevd.dtsi"
25
26/*
27 * This is the EB with the new Revision D baseboard with SMSC9118 ethernet and
28 * the Rev B core tile.
29 */
30/ {
31 model = "ARM RealView Emulation Baseboard Rev D with ARM11MPCore Core Tile Rev B";
32};
diff --git a/arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dts b/arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dts
new file mode 100644
index 000000000000..26b1c69e9f43
--- /dev/null
+++ b/arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dts
@@ -0,0 +1,28 @@
1/*
2 * Copyright 2016 Linaro Ltd
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23#include "arm-realview-eb-11mp.dts"
24#include "arm-realview-eb-bbrevd.dtsi"
25
26/ {
27 model = "ARM RealView Emulation Baseboard Rev D with ARM11MPCore Rev C Core Tile";
28};
diff --git a/arch/arm/boot/dts/arm-realview-eb-11mp-revb.dts b/arch/arm/boot/dts/arm-realview-eb-11mp-ctrevb.dts
index e68527b0d552..e68527b0d552 100644
--- a/arch/arm/boot/dts/arm-realview-eb-11mp-revb.dts
+++ b/arch/arm/boot/dts/arm-realview-eb-11mp-ctrevb.dts
diff --git a/arch/arm/boot/dts/arm-realview-eb-11mp.dts b/arch/arm/boot/dts/arm-realview-eb-11mp.dts
index 87ff602a2a2d..aac1edd4b227 100644
--- a/arch/arm/boot/dts/arm-realview-eb-11mp.dts
+++ b/arch/arm/boot/dts/arm-realview-eb-11mp.dts
@@ -24,7 +24,7 @@
24#include "arm-realview-eb-mp.dtsi" 24#include "arm-realview-eb-mp.dtsi"
25 25
26/ { 26/ {
27 model = "ARM RealView Emulation Baseboard with ARM11MPCore Rev C"; 27 model = "ARM RealView Emulation Baseboard with ARM11MPCore Rev C Core Tile";
28 arm,hbi = <0x146>; 28 arm,hbi = <0x146>;
29 29
30 /* 30 /*
diff --git a/arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dts b/arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dts
new file mode 100644
index 000000000000..42efac7496ef
--- /dev/null
+++ b/arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dts
@@ -0,0 +1,28 @@
1/*
2 * Copyright 2016 Linaro Ltd
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23#include "arm-realview-eb-a9mp.dts"
24#include "arm-realview-eb-bbrevd.dtsi"
25
26/ {
27 model = "ARM RealView EB Baseboard Rev D Cortex A9 MPCore";
28};
diff --git a/arch/arm/boot/dts/arm-realview-eb-bbrevd.dts b/arch/arm/boot/dts/arm-realview-eb-bbrevd.dts
new file mode 100644
index 000000000000..f533c8b49d97
--- /dev/null
+++ b/arch/arm/boot/dts/arm-realview-eb-bbrevd.dts
@@ -0,0 +1,29 @@
1/*
2 * Copyright 2016 Linaro Ltd
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23/* This derives from the Realview Baseboard, and overlays the new ethernet */
24#include "arm-realview-eb.dts"
25#include "arm-realview-eb-bbrevd.dtsi"
26
27/ {
28 model = "ARM RealView Emulation Baseboard Rev D";
29};
diff --git a/arch/arm/boot/dts/arm-realview-eb-bbrevd.dtsi b/arch/arm/boot/dts/arm-realview-eb-bbrevd.dtsi
new file mode 100644
index 000000000000..a79e1d1d30a7
--- /dev/null
+++ b/arch/arm/boot/dts/arm-realview-eb-bbrevd.dtsi
@@ -0,0 +1,45 @@
1/*
2 * Copyright 2016 Linaro Ltd
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23/ {
24 /* Introduce a fixed regulator for the new ethernet controller */
25 veth: fixedregulator@0 {
26 compatible = "regulator-fixed";
27 regulator-name = "veth";
28 regulator-min-microvolt = <3300000>;
29 regulator-max-microvolt = <3300000>;
30 regulator-boot-on;
31 };
32};
33
34/*
35 * The revision D has a different ethernet controller that the elder boards:
36 * the older board uses LAN91C111 but the new one uses LAN9118.
37 */
38&ethernet {
39 compatible = "smsc,lan9118", "smsc,lan9115";
40 phy-mode = "mii";
41 smsc,irq-active-high;
42 smsc,irq-push-pull;
43 vdd33a-supply = <&veth>;
44 vddvario-supply = <&veth>;
45};
diff --git a/arch/arm/boot/dts/arm-realview-eb.dtsi b/arch/arm/boot/dts/arm-realview-eb.dtsi
index 1c6a040218e3..e2e9599596e2 100644
--- a/arch/arm/boot/dts/arm-realview-eb.dtsi
+++ b/arch/arm/boot/dts/arm-realview-eb.dtsi
@@ -51,14 +51,6 @@
51 regulator-boot-on; 51 regulator-boot-on;
52 }; 52 };
53 53
54 veth: fixedregulator@0 {
55 compatible = "regulator-fixed";
56 regulator-name = "veth";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 regulator-boot-on;
60 };
61
62 xtal24mhz: xtal24mhz@24M { 54 xtal24mhz: xtal24mhz@24M {
63 #clock-cells = <0>; 55 #clock-cells = <0>;
64 compatible = "fixed-clock"; 56 compatible = "fixed-clock";
@@ -134,16 +126,15 @@
134 bank-width = <4>; 126 bank-width = <4>;
135 }; 127 };
136 128
137 /* SMSC 9118 ethernet with PHY and EEPROM */ 129 /* SMSC LAN91C111 ethernet with PHY and EEPROM */
138 ethernet: ethernet@4e000000 { 130 ethernet: ethernet@4e000000 {
139 compatible = "smsc,lan9118", "smsc,lan9115"; 131 compatible = "smsc,lan91c111";
140 reg = <0x4e000000 0x10000>; 132 reg = <0x4e000000 0x10000>;
141 phy-mode = "mii"; 133 /*
142 reg-io-width = <4>; 134 * This means the adapter can be accessed with 8, 16 or
143 smsc,irq-active-high; 135 * 32 bit reads/writes.
144 smsc,irq-push-pull; 136 */
145 vdd33a-supply = <&veth>; 137 reg-io-width = <7>;
146 vddvario-supply = <&veth>;
147 }; 138 };
148 139
149 usb: usb@4f000000 { 140 usb: usb@4f000000 {
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 2364fc56ae13..033fa63544f7 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -155,20 +155,6 @@
155 status = "okay"; 155 status = "okay";
156 }; 156 };
157 157
158 spi0: spi@10600 {
159 pinctrl-0 = <&spi0_pins2>;
160 pinctrl-names = "default";
161 status = "okay";
162
163 spi-flash@0 {
164 #address-cells = <1>;
165 #size-cells = <1>;
166 compatible = "mx25l25635e", "jedec,spi-nor";
167 reg = <0>; /* Chip select 0 */
168 spi-max-frequency = <50000000>;
169 };
170 };
171
172 nand@d0000 { 158 nand@d0000 {
173 status = "okay"; 159 status = "okay";
174 num-cs = <1>; 160 num-cs = <1>;
@@ -274,3 +260,18 @@
274 compatible = "linux,spdif-dir"; 260 compatible = "linux,spdif-dir";
275 }; 261 };
276}; 262};
263
264&spi0 {
265 pinctrl-0 = <&spi0_pins2>;
266 pinctrl-names = "default";
267 status = "okay";
268
269 spi-flash@0 {
270 #address-cells = <1>;
271 #size-cells = <1>;
272 compatible = "mx25l25635e", "jedec,spi-nor";
273 reg = <0>; /* Chip select 0 */
274 spi-max-frequency = <50000000>;
275 };
276};
277
diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
index 1aba08e4377c..01cded310cbc 100644
--- a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
+++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
@@ -68,26 +68,6 @@
68 phy-mode = "rgmii-id"; 68 phy-mode = "rgmii-id";
69 }; 69 };
70 70
71 spi@10600 {
72 status = "okay";
73 pinctrl-0 = <&spi0_pins2>;
74 pinctrl-names = "default";
75
76 spi-flash@0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 /* MX25L8006E */
80 compatible = "mxicy,mx25l8005", "jedec,spi-nor";
81 reg = <0>; /* Chip select 0 */
82 spi-max-frequency = <50000000>;
83
84 partition@0 {
85 label = "u-boot";
86 reg = <0x0 0x100000>;
87 };
88 };
89 };
90
91 usb@50000 { 71 usb@50000 {
92 status = "okay"; 72 status = "okay";
93 }; 73 };
@@ -176,3 +156,23 @@
176 marvell,function = "gpio"; 156 marvell,function = "gpio";
177 }; 157 };
178}; 158};
159
160&spi0 {
161 status = "okay";
162 pinctrl-0 = <&spi0_pins2>;
163 pinctrl-names = "default";
164
165 spi-flash@0 {
166 #address-cells = <1>;
167 #size-cells = <1>;
168 /* MX25L8006E */
169 compatible = "mxicy,mx25l8005", "jedec,spi-nor";
170 reg = <0>; /* Chip select 0 */
171 spi-max-frequency = <50000000>;
172
173 partition@0 {
174 label = "u-boot";
175 reg = <0x0 0x100000>;
176 };
177 };
178};
diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
index 8ca7a4340c0f..a9cc42776874 100644
--- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts
+++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
@@ -87,62 +87,6 @@
87 status = "disabled"; 87 status = "disabled";
88 }; 88 };
89 89
90 spi0: spi@10600 {
91 status = "okay";
92
93 spi-flash@0 {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 compatible = "micron,n25q064", "jedec,spi-nor";
97 reg = <0>; /* Chip select 0 */
98 spi-max-frequency = <20000000>;
99
100 /*
101 * Warning!
102 *
103 * Synology u-boot uses its compiled-in environment
104 * and it seems Synology did not care to change u-boot
105 * default configuration in order to allow saving a
106 * modified environment at a sensible location. So,
107 * if you do a 'saveenv' under u-boot, your modified
108 * environment will be saved at 1MB after the start
109 * of the flash, i.e. in the middle of the uImage.
110 * For that reason, it is strongly advised not to
111 * change the default environment, unless you know
112 * what you are doing.
113 */
114 partition@00000000 { /* u-boot */
115 label = "RedBoot";
116 reg = <0x00000000 0x000c0000>; /* 768KB */
117 };
118
119 partition@000c0000 { /* uImage */
120 label = "zImage";
121 reg = <0x000c0000 0x002d0000>; /* 2880KB */
122 };
123
124 partition@00390000 { /* uInitramfs */
125 label = "rd.gz";
126 reg = <0x00390000 0x00440000>; /* 4250KB */
127 };
128
129 partition@007d0000 { /* MAC address and serial number */
130 label = "vendor";
131 reg = <0x007d0000 0x00010000>; /* 64KB */
132 };
133
134 partition@007e0000 {
135 label = "RedBoot config";
136 reg = <0x007e0000 0x00010000>; /* 64KB */
137 };
138
139 partition@007f0000 {
140 label = "FIS directory";
141 reg = <0x007f0000 0x00010000>; /* 64KB */
142 };
143 };
144 };
145
146 i2c@11000 { 90 i2c@11000 {
147 compatible = "marvell,mv64xxx-i2c"; 91 compatible = "marvell,mv64xxx-i2c";
148 pinctrl-0 = <&i2c0_pins>; 92 pinctrl-0 = <&i2c0_pins>;
@@ -347,3 +291,59 @@
347 marvell,function = "gpio"; 291 marvell,function = "gpio";
348 }; 292 };
349}; 293};
294
295&spi0 {
296 status = "okay";
297
298 spi-flash@0 {
299 #address-cells = <1>;
300 #size-cells = <1>;
301 compatible = "micron,n25q064", "jedec,spi-nor";
302 reg = <0>; /* Chip select 0 */
303 spi-max-frequency = <20000000>;
304
305 /*
306 * Warning!
307 *
308 * Synology u-boot uses its compiled-in environment
309 * and it seems Synology did not care to change u-boot
310 * default configuration in order to allow saving a
311 * modified environment at a sensible location. So,
312 * if you do a 'saveenv' under u-boot, your modified
313 * environment will be saved at 1MB after the start
314 * of the flash, i.e. in the middle of the uImage.
315 * For that reason, it is strongly advised not to
316 * change the default environment, unless you know
317 * what you are doing.
318 */
319 partition@00000000 { /* u-boot */
320 label = "RedBoot";
321 reg = <0x00000000 0x000c0000>; /* 768KB */
322 };
323
324 partition@000c0000 { /* uImage */
325 label = "zImage";
326 reg = <0x000c0000 0x002d0000>; /* 2880KB */
327 };
328
329 partition@00390000 { /* uInitramfs */
330 label = "rd.gz";
331 reg = <0x00390000 0x00440000>; /* 4250KB */
332 };
333
334 partition@007d0000 { /* MAC address and serial number */
335 label = "vendor";
336 reg = <0x007d0000 0x00010000>; /* 64KB */
337 };
338
339 partition@007e0000 {
340 label = "RedBoot config";
341 reg = <0x007e0000 0x00010000>; /* 64KB */
342 };
343
344 partition@007f0000 {
345 label = "FIS directory";
346 reg = <0x007f0000 0x00010000>; /* 64KB */
347 };
348 };
349};
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index a718866ba52d..3ccedc9dffb2 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -148,26 +148,6 @@
148 interrupts = <50>; 148 interrupts = <50>;
149 }; 149 };
150 150
151 spi0: spi@10600 {
152 reg = <0x10600 0x28>;
153 #address-cells = <1>;
154 #size-cells = <0>;
155 cell-index = <0>;
156 interrupts = <30>;
157 clocks = <&coreclk 0>;
158 status = "disabled";
159 };
160
161 spi1: spi@10680 {
162 reg = <0x10680 0x28>;
163 #address-cells = <1>;
164 #size-cells = <0>;
165 cell-index = <1>;
166 interrupts = <92>;
167 clocks = <&coreclk 0>;
168 status = "disabled";
169 };
170
171 i2c0: i2c@11000 { 151 i2c0: i2c@11000 {
172 compatible = "marvell,mv64xxx-i2c"; 152 compatible = "marvell,mv64xxx-i2c";
173 #address-cells = <1>; 153 #address-cells = <1>;
@@ -320,6 +300,42 @@
320 status = "disabled"; 300 status = "disabled";
321 }; 301 };
322 }; 302 };
303
304 spi0: spi@10600 {
305 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
306 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
307 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
308 <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
309 <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
310 <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
311 <MBUS_ID(0x01, 0x5f) 0 0xffffffff>, /* CS5 */
312 <MBUS_ID(0x01, 0x9f) 0 0xffffffff>, /* CS6 */
313 <MBUS_ID(0x01, 0xdf) 0 0xffffffff>; /* CS7 */
314 #address-cells = <1>;
315 #size-cells = <0>;
316 cell-index = <0>;
317 interrupts = <30>;
318 clocks = <&coreclk 0>;
319 status = "disabled";
320 };
321
322 spi1: spi@10680 {
323 reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x28>, /* control */
324 <MBUS_ID(0x01, 0x1a) 0 0xffffffff>, /* CS0 */
325 <MBUS_ID(0x01, 0x5a) 0 0xffffffff>, /* CS1 */
326 <MBUS_ID(0x01, 0x9a) 0 0xffffffff>, /* CS2 */
327 <MBUS_ID(0x01, 0xda) 0 0xffffffff>, /* CS3 */
328 <MBUS_ID(0x01, 0x1b) 0 0xffffffff>, /* CS4 */
329 <MBUS_ID(0x01, 0x5b) 0 0xffffffff>, /* CS5 */
330 <MBUS_ID(0x01, 0x9b) 0 0xffffffff>, /* CS6 */
331 <MBUS_ID(0x01, 0xdb) 0 0xffffffff>; /* CS7 */
332 #address-cells = <1>;
333 #size-cells = <0>;
334 cell-index = <1>;
335 interrupts = <92>;
336 clocks = <&coreclk 0>;
337 status = "disabled";
338 };
323 }; 339 };
324 340
325 clocks { 341 clocks {
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 3b06aa835448..b4258105e91f 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -134,24 +134,6 @@
134 wt-override; 134 wt-override;
135 }; 135 };
136 136
137 /*
138 * Default SPI pinctrl setting, can be overwritten on
139 * board level if a different configuration is used.
140 */
141 spi0: spi@10600 {
142 compatible = "marvell,armada-370-spi",
143 "marvell,orion-spi";
144 pinctrl-0 = <&spi0_pins1>;
145 pinctrl-names = "default";
146 };
147
148 spi1: spi@10680 {
149 compatible = "marvell,armada-370-spi",
150 "marvell,orion-spi";
151 pinctrl-0 = <&spi1_pins>;
152 pinctrl-names = "default";
153 };
154
155 i2c0: i2c@11000 { 137 i2c0: i2c@11000 {
156 reg = <0x11000 0x20>; 138 reg = <0x11000 0x20>;
157 }; 139 };
@@ -447,3 +429,19 @@
447 marvell,function = "ge1"; 429 marvell,function = "ge1";
448 }; 430 };
449}; 431};
432
433/*
434 * Default SPI pinctrl setting, can be overwritten on
435 * board level if a different configuration is used.
436 */
437&spi0 {
438 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
439 pinctrl-0 = <&spi0_pins1>;
440 pinctrl-names = "default";
441};
442
443&spi1 {
444 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
445 pinctrl-0 = <&spi1_pins>;
446 pinctrl-names = "default";
447};
diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
index 2d3fd6e76e2c..db5b9f6b615d 100644
--- a/arch/arm/boot/dts/armada-385-db-ap.dts
+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
@@ -65,20 +65,6 @@
65 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 65 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
66 66
67 internal-regs { 67 internal-regs {
68 spi1: spi@10680 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&spi1_pins>;
71 status = "okay";
72
73 spi-flash@0 {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "st,m25p128", "jedec,spi-nor";
77 reg = <0>; /* Chip select 0 */
78 spi-max-frequency = <54000000>;
79 };
80 };
81
82 i2c0: i2c@11000 { 68 i2c0: i2c@11000 {
83 pinctrl-names = "default"; 69 pinctrl-names = "default";
84 pinctrl-0 = <&i2c0_pins>; 70 pinctrl-0 = <&i2c0_pins>;
@@ -155,6 +141,10 @@
155 bm,pool-short = <3>; 141 bm,pool-short = <3>;
156 }; 142 };
157 143
144 usb@58000 {
145 status = "okay";
146 };
147
158 /* CON4 */ 148 /* CON4 */
159 ethernet@70000 { 149 ethernet@70000 {
160 pinctrl-names = "default"; 150 pinctrl-names = "default";
@@ -178,15 +168,35 @@
178 168
179 nfc: flash@d0000 { 169 nfc: flash@d0000 {
180 status = "okay"; 170 status = "okay";
181 #address-cells = <1>;
182 #size-cells = <1>;
183
184 num-cs = <1>; 171 num-cs = <1>;
185 nand-ecc-strength = <4>; 172 nand-ecc-strength = <4>;
186 nand-ecc-step-size = <512>; 173 nand-ecc-step-size = <512>;
187 marvell,nand-keep-config; 174 marvell,nand-keep-config;
188 marvell,nand-enable-arbiter; 175 marvell,nand-enable-arbiter;
189 nand-on-flash-bbt; 176 nand-on-flash-bbt;
177
178 partitions {
179 compatible = "fixed-partitions";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 partition@0 {
184 label = "U-Boot";
185 reg = <0x00000000 0x00800000>;
186 read-only;
187 };
188
189 partition@800000 {
190 label = "uImage";
191 reg = <0x00800000 0x00400000>;
192 read-only;
193 };
194
195 partition@c00000 {
196 label = "Root";
197 reg = <0x00c00000 0x3f400000>;
198 };
199 };
190 }; 200 };
191 201
192 usb3@f0000 { 202 usb3@f0000 {
@@ -239,3 +249,17 @@
239 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 249 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
240 }; 250 };
241}; 251};
252
253&spi1 {
254 pinctrl-names = "default";
255 pinctrl-0 = <&spi1_pins>;
256 status = "okay";
257
258 spi-flash@0 {
259 #address-cells = <1>;
260 #size-cells = <1>;
261 compatible = "st,m25p128", "jedec,spi-nor";
262 reg = <0>; /* Chip select 0 */
263 spi-max-frequency = <54000000>;
264 };
265};
diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi
index 22f7a13e20b4..8f0e508f64ae 100644
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
@@ -62,11 +62,6 @@
62 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; 62 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
63 63
64 internal-regs { 64 internal-regs {
65
66 spi@10600 {
67 status = "disabled";
68 };
69
70 i2c@11000 { 65 i2c@11000 {
71 pinctrl-names = "default"; 66 pinctrl-names = "default";
72 pinctrl-0 = <&i2c0_pins>; 67 pinctrl-0 = <&i2c0_pins>;
@@ -332,3 +327,7 @@
332 marvell,function = "gpio"; 327 marvell,function = "gpio";
333 }; 328 };
334}; 329};
330
331&spi0 {
332 status = "disabled";
333};
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts
index d3e6bd805006..71ce201c903e 100644
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
@@ -315,30 +315,6 @@
315 status = "okay"; 315 status = "okay";
316 }; 316 };
317 317
318 spi@10680 {
319 /*
320 * We don't seem to have the W25Q32 on the
321 * A1 Rev 2.0 boards, so disable SPI.
322 * CS0: W25Q32 (doesn't appear to be present)
323 * CS1:
324 * CS2: mikrobus
325 */
326 pinctrl-0 = <&spi1_pins
327 &clearfog_spi1_cs_pins
328 &mikro_spi_pins>;
329 pinctrl-names = "default";
330 status = "okay";
331
332 spi-flash@0 {
333 #address-cells = <1>;
334 #size-cells = <0>;
335 compatible = "w25q32", "jedec,spi-nor";
336 reg = <0>; /* Chip select 0 */
337 spi-max-frequency = <3000000>;
338 status = "disabled";
339 };
340 };
341
342 usb@58000 { 318 usb@58000 {
343 /* CON3, nearest power. */ 319 /* CON3, nearest power. */
344 status = "okay"; 320 status = "okay";
@@ -444,3 +420,27 @@
444 }; 420 };
445 }; 421 };
446}; 422};
423
424&spi1 {
425 /*
426 * We don't seem to have the W25Q32 on the
427 * A1 Rev 2.0 boards, so disable SPI.
428 * CS0: W25Q32 (doesn't appear to be present)
429 * CS1:
430 * CS2: mikrobus
431 */
432 pinctrl-0 = <&spi1_pins
433 &clearfog_spi1_cs_pins
434 &mikro_spi_pins>;
435 pinctrl-names = "default";
436 status = "okay";
437
438 spi-flash@0 {
439 #address-cells = <1>;
440 #size-cells = <0>;
441 compatible = "w25q32", "jedec,spi-nor";
442 reg = <0>; /* Chip select 0 */
443 spi-max-frequency = <3000000>;
444 status = "disabled";
445 };
446};
diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts
index ea93ed727030..de26c762239c 100644
--- a/arch/arm/boot/dts/armada-388-db.dts
+++ b/arch/arm/boot/dts/armada-388-db.dts
@@ -70,18 +70,6 @@
70 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 70 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
71 71
72 internal-regs { 72 internal-regs {
73 spi@10600 {
74 status = "okay";
75
76 spi-flash@0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "w25q32", "jedec,spi-nor";
80 reg = <0>; /* Chip select 0 */
81 spi-max-frequency = <108000000>;
82 };
83 };
84
85 i2c@11000 { 73 i2c@11000 {
86 status = "okay"; 74 status = "okay";
87 clock-frequency = <100000>; 75 clock-frequency = <100000>;
@@ -201,3 +189,16 @@
201 }; 189 };
202 }; 190 };
203}; 191};
192
193&spi0 {
194 status = "okay";
195
196 spi-flash@0 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 compatible = "w25q32", "jedec,spi-nor";
200 reg = <0>; /* Chip select 0 */
201 spi-max-frequency = <108000000>;
202 };
203};
204
diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts
index fd75e5e9550f..895fa6cfa15a 100644
--- a/arch/arm/boot/dts/armada-388-gp.dts
+++ b/arch/arm/boot/dts/armada-388-gp.dts
@@ -64,21 +64,6 @@
64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
65 65
66 internal-regs { 66 internal-regs {
67 spi@10600 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&spi0_pins>;
70 status = "okay";
71
72 spi-flash@0 {
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "st,m25p128", "jedec,spi-nor";
76 reg = <0>; /* Chip select 0 */
77 spi-max-frequency = <50000000>;
78 m25p,fast-read;
79 };
80 };
81
82 i2c@11000 { 67 i2c@11000 {
83 pinctrl-names = "default"; 68 pinctrl-names = "default";
84 pinctrl-0 = <&i2c0_pins>; 69 pinctrl-0 = <&i2c0_pins>;
@@ -433,3 +418,18 @@
433 marvell,function = "gpio"; 418 marvell,function = "gpio";
434 }; 419 };
435}; 420};
421
422&spi0 {
423 pinctrl-names = "default";
424 pinctrl-0 = <&spi0_pins>;
425 status = "okay";
426
427 spi-flash@0 {
428 #address-cells = <1>;
429 #size-cells = <1>;
430 compatible = "st,m25p128", "jedec,spi-nor";
431 reg = <0>; /* Chip select 0 */
432 spi-max-frequency = <50000000>;
433 m25p,fast-read;
434 };
435};
diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts
index 853f9735cc70..dd3462ddb6b9 100644
--- a/arch/arm/boot/dts/armada-388-rd.dts
+++ b/arch/arm/boot/dts/armada-388-rd.dts
@@ -70,18 +70,6 @@
70 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; 70 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
71 71
72 internal-regs { 72 internal-regs {
73 spi@10600 {
74 status = "okay";
75
76 spi-flash@0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "st,m25p128", "jedec,spi-nor";
80 reg = <0>; /* Chip select 0 */
81 spi-max-frequency = <108000000>;
82 };
83 };
84
85 i2c@11000 { 73 i2c@11000 {
86 status = "okay"; 74 status = "okay";
87 clock-frequency = <100000>; 75 clock-frequency = <100000>;
@@ -142,3 +130,16 @@
142 }; 130 };
143 }; 131 };
144}; 132};
133
134&spi0 {
135 status = "okay";
136
137 spi-flash@0 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "st,m25p128", "jedec,spi-nor";
141 reg = <0>; /* Chip select 0 */
142 spi-max-frequency = <108000000>;
143 };
144};
145
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 3312be6c82cc..2d7668848c5a 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -170,30 +170,6 @@
170 <0xc100 0x100>; 170 <0xc100 0x100>;
171 }; 171 };
172 172
173 spi0: spi@10600 {
174 compatible = "marvell,armada-380-spi",
175 "marvell,orion-spi";
176 reg = <0x10600 0x50>;
177 #address-cells = <1>;
178 #size-cells = <0>;
179 cell-index = <0>;
180 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
181 clocks = <&coreclk 0>;
182 status = "disabled";
183 };
184
185 spi1: spi@10680 {
186 compatible = "marvell,armada-380-spi",
187 "marvell,orion-spi";
188 reg = <0x10680 0x50>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 cell-index = <1>;
192 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
193 clocks = <&coreclk 0>;
194 status = "disabled";
195 };
196
197 i2c0: i2c@11000 { 173 i2c0: i2c@11000 {
198 compatible = "marvell,mv64xxx-i2c"; 174 compatible = "marvell,mv64xxx-i2c";
199 reg = <0x11000 0x20>; 175 reg = <0x11000 0x20>;
@@ -287,6 +263,15 @@
287 marvell,function = "spi1"; 263 marvell,function = "spi1";
288 }; 264 };
289 265
266 nand_pins: nand-pins {
267 marvell,pins = "mpp22", "mpp34", "mpp23",
268 "mpp33", "mpp38", "mpp28",
269 "mpp40", "mpp42", "mpp35",
270 "mpp36", "mpp25", "mpp30",
271 "mpp32";
272 marvell,function = "dev";
273 };
274
290 uart0_pins: uart-pins-0 { 275 uart0_pins: uart-pins-0 {
291 marvell,pins = "mpp0", "mpp1"; 276 marvell,pins = "mpp0", "mpp1";
292 marvell,function = "ua0"; 277 marvell,function = "ua0";
@@ -649,6 +634,30 @@
649 no-memory-wc; 634 no-memory-wc;
650 status = "disabled"; 635 status = "disabled";
651 }; 636 };
637
638 spi0: spi@10600 {
639 compatible = "marvell,armada-380-spi",
640 "marvell,orion-spi";
641 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
642 #address-cells = <1>;
643 #size-cells = <0>;
644 cell-index = <0>;
645 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
646 clocks = <&coreclk 0>;
647 status = "disabled";
648 };
649
650 spi1: spi@10680 {
651 compatible = "marvell,armada-380-spi",
652 "marvell,orion-spi";
653 reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
654 #address-cells = <1>;
655 #size-cells = <0>;
656 cell-index = <1>;
657 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
658 clocks = <&coreclk 0>;
659 status = "disabled";
660 };
652 }; 661 };
653 662
654 clocks { 663 clocks {
diff --git a/arch/arm/boot/dts/armada-390-db.dts b/arch/arm/boot/dts/armada-390-db.dts
new file mode 100644
index 000000000000..34e279d973c8
--- /dev/null
+++ b/arch/arm/boot/dts/armada-390-db.dts
@@ -0,0 +1,175 @@
1/*
2 * Device Tree file for Marvell Armada 390 Development Board
3 * (DB-88F6920)
4 *
5 * Copyright (C) 2016 Marvell
6 *
7 * Grzegorz Jaszczyk <jaz@semihalf.com>
8 *
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
12 * whole.
13 *
14 * a) This file is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of the
17 * License, or (at your option) any later version.
18 *
19 * This file is distributed in the hope that it will be useful
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * Or, alternatively
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48/dts-v1/;
49#include "armada-390.dtsi"
50
51/ {
52 model = "Marvell Armada 390 Development Board";
53 compatible = "marvell,a390-db", "marvell,armada390";
54
55 chosen {
56 stdout-path = "serial0:115200n8";
57 };
58
59 memory {
60 device_type = "memory";
61 reg = <0x00000000 0x80000000>; /* 2 GB */
62 };
63
64 soc {
65 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
66 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
67
68 internal-regs {
69 i2c@11000 {
70 status = "okay";
71 clock-frequency = <100000>;
72
73 eeprom@50 {
74 compatible = "atmel,24c64";
75 reg = <0x50>;
76 };
77 };
78
79 /* CON104 */
80 serial@12000 {
81 status = "okay";
82 };
83
84 /* CON97 */
85 usb@58000 {
86 status = "okay";
87 };
88
89 flash@d0000 {
90 status = "okay";
91 pinctrl-0 = <&nand_pins>;
92 pinctrl-names = "default";
93 num-cs = <1>;
94 marvell,nand-keep-config;
95 marvell,nand-enable-arbiter;
96 nand-on-flash-bbt;
97 nand-ecc-strength = <8>;
98 nand-ecc-step-size = <512>;
99
100 partitions {
101 compatible = "fixed-partitions";
102 #address-cells = <1>;
103 #size-cells = <1>;
104
105 partition@0 {
106 label = "U-Boot";
107 reg = <0 0x800000>;
108 };
109 partition@800000 {
110 label = "Linux";
111 reg = <0x800000 0x800000>;
112 };
113 partition@1000000 {
114 label = "Filesystem";
115 reg = <0x1000000 0x3f000000>;
116 };
117 };
118 };
119
120 /* CON98 */
121 usb3@f8000 {
122 status = "okay";
123 };
124 };
125
126 pcie-controller {
127 status = "okay";
128
129 /* CON30 */
130 pcie@1,0 {
131 status = "okay";
132 };
133
134 /* CON44 */
135 pcie@2,0 {
136 status = "okay";
137 };
138
139 /* CON61 */
140 pcie@3,0 {
141 status = "okay";
142 };
143 };
144 };
145};
146
147&spi1 {
148 status = "okay";
149 pinctrl-0 = <&spi1_pins>;
150 pinctrl-names = "default";
151
152 spi-flash@1 {
153 #address-cells = <1>;
154 #size-cells = <1>;
155 compatible = "n25q128a13",
156 "jedec,spi-nor";
157 reg = <0>; /* Chip select 0 */
158 spi-max-frequency = <108000000>;
159
160 partitions {
161 compatible = "fixed-partitions";
162 #address-cells = <1>;
163 #size-cells = <1>;
164
165 partition@0 {
166 label = "U-Boot";
167 reg = <0 0x400000>;
168 };
169 partition@400000 {
170 label = "Filesystem";
171 reg = <0x400000 0xc00000>;
172 };
173 };
174 };
175};
diff --git a/arch/arm/boot/dts/armada-390.dtsi b/arch/arm/boot/dts/armada-390.dtsi
index 094e39c66039..6cd18d8aaac7 100644
--- a/arch/arm/boot/dts/armada-390.dtsi
+++ b/arch/arm/boot/dts/armada-390.dtsi
@@ -47,6 +47,8 @@
47#include "armada-39x.dtsi" 47#include "armada-39x.dtsi"
48 48
49/ { 49/ {
50 compatible = "marvell,armada390";
51
50 soc { 52 soc {
51 internal-regs { 53 internal-regs {
52 pinctrl@18000 { 54 pinctrl@18000 {
@@ -54,4 +56,5 @@
54 reg = <0x18000 0x20>; 56 reg = <0x18000 0x20>;
55 }; 57 };
56 }; 58 };
59 };
57}; 60};
diff --git a/arch/arm/boot/dts/armada-395-gp.dts b/arch/arm/boot/dts/armada-395-gp.dts
new file mode 100644
index 000000000000..2cdbba804c1e
--- /dev/null
+++ b/arch/arm/boot/dts/armada-395-gp.dts
@@ -0,0 +1,163 @@
1/*
2 * Device Tree file for Marvell Armada 395 GP board
3 *
4 * Copyright (C) 2016 Marvell
5 *
6 * Grzegorz Jaszczyk <jaz@semihalf.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPL or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without
15 * any warranty of any kind, whether express or implied.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41/dts-v1/;
42#include "armada-395.dtsi"
43
44/ {
45 model = "Marvell Armada 395 GP Board";
46 compatible = "marvell,a395-gp", "marvell,armada395",
47 "marvell,armada390";
48
49 chosen {
50 stdout-path = "serial0:115200n8";
51 };
52
53 memory {
54 device_type = "memory";
55 reg = <0x00000000 0x40000000>; /* 1 GB */
56 };
57
58 soc {
59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
61
62 internal-regs {
63 i2c@11000 {
64 status = "okay";
65 clock-frequency = <100000>;
66
67 eeprom@57 {
68 compatible = "atmel,24c64";
69 reg = <0x57>;
70 };
71 };
72
73 serial@12000 {
74 /*
75 * Exported on the micro USB connector CON17
76 * through an FTDI
77 */
78 status = "okay";
79 };
80
81 /* CON1 */
82 usb@58000 {
83 status = "okay";
84 };
85
86 /* CON2 */
87 sata@a8000 {
88 status = "okay";
89 };
90
91 flash@d0000 {
92 status = "okay";
93 pinctrl-0 = <&nand_pins>;
94 pinctrl-names = "default";
95 num-cs = <1>;
96 marvell,nand-keep-config;
97 marvell,nand-enable-arbiter;
98 nand-on-flash-bbt;
99 nand-ecc-strength = <4>;
100 nand-ecc-step-size = <512>;
101
102 partitions {
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 partition@0 {
108 label = "U-Boot";
109 reg = <0x00000000 0x00600000>;
110 read-only;
111 };
112
113 partition@800000 {
114 label = "uImage";
115 reg = <0x00600000 0x00400000>;
116 read-only;
117 };
118
119 partition@1000000 {
120 label = "Root";
121 reg = <0x00a00000 0x3f600000>;
122 };
123 };
124 };
125
126 /* CON18 */
127 sdhci@d8000 {
128 clock-frequency = <200000000>;
129 broken-cd;
130 wp-inverted;
131 bus-width = <8>;
132 status = "okay";
133 no-1-8-v;
134 };
135
136 /* CON4 */
137 usb3@f0000 {
138 status = "okay";
139 };
140 };
141
142 pcie-controller {
143 status = "okay";
144
145 /*
146 * The two PCIe units are accessible through
147 * mini PCIe slot on the board.
148 */
149
150 /* CON7 */
151 pcie@2,0 {
152 /* Port 1, Lane 0 */
153 status = "okay";
154 };
155
156 /* CON8 */
157 pcie@4,0 {
158 /* Port 3, Lane 0 */
159 status = "okay";
160 };
161 };
162 };
163};
diff --git a/arch/arm/boot/dts/armada-395.dtsi b/arch/arm/boot/dts/armada-395.dtsi
new file mode 100644
index 000000000000..ab5dc49f2bff
--- /dev/null
+++ b/arch/arm/boot/dts/armada-395.dtsi
@@ -0,0 +1,76 @@
1/*
2 * Device Tree Include file for Marvell Armada 395 SoC.
3 *
4 * Copyright (C) 2016 Marvell
5 *
6 * Grzegorz Jaszczyk <jaz@semihalf.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPL or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This file is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This file is distributed in the hope that it will be useful
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47#include "armada-39x.dtsi"
48
49/ {
50 compatible = "marvell,armada395", "marvell,armada390";
51
52 soc {
53 internal-regs {
54 pinctrl@18000 {
55 compatible = "marvell,mv88f6925-pinctrl";
56 reg = <0x18000 0x20>;
57 };
58
59 sata@a8000 {
60 compatible = "marvell,armada-380-ahci";
61 reg = <0xa8000 0x2000>;
62 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
63 clocks = <&gateclk 15>;
64 status = "disabled";
65 };
66
67 usb3@f0000 {
68 compatible = "marvell,armada-380-xhci";
69 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
70 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
71 clocks = <&gateclk 9>;
72 status = "disabled";
73 };
74 };
75 };
76};
diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts
index 788c3badb681..268c8349c884 100644
--- a/arch/arm/boot/dts/armada-398-db.dts
+++ b/arch/arm/boot/dts/armada-398-db.dts
@@ -65,30 +65,6 @@
65 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 65 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
66 66
67 internal-regs { 67 internal-regs {
68 spi@10680 {
69 status = "okay";
70 pinctrl-0 = <&spi1_pins>;
71 pinctrl-names = "default";
72
73 spi-flash@0 {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 compatible = "n25q128a13", "jedec,spi-nor";
77 reg = <0>;
78 spi-max-frequency = <108000000>;
79
80 partition@0 {
81 label = "U-Boot";
82 reg = <0 0x400000>;
83 };
84
85 partition@400000 {
86 label = "Filesystem";
87 reg = <0x400000 0x1000000>;
88 };
89 };
90 };
91
92 i2c@11000 { 68 i2c@11000 {
93 pinctrl-0 = <&i2c0_pins>; 69 pinctrl-0 = <&i2c0_pins>;
94 pinctrl-names = "default"; 70 pinctrl-names = "default";
@@ -108,6 +84,10 @@
108 status = "okay"; 84 status = "okay";
109 }; 85 };
110 86
87 usb@58000 {
88 status = "okay";
89 };
90
111 flash@d0000 { 91 flash@d0000 {
112 status = "okay"; 92 status = "okay";
113 pinctrl-0 = <&nand_pins>; 93 pinctrl-0 = <&nand_pins>;
@@ -132,6 +112,10 @@
132 reg = <0x1000000 0x3f000000>; 112 reg = <0x1000000 0x3f000000>;
133 }; 113 };
134 }; 114 };
115
116 usb3@f8000 {
117 status = "okay";
118 };
135 }; 119 };
136 120
137 pcie-controller { 121 pcie-controller {
@@ -151,3 +135,27 @@
151 }; 135 };
152 }; 136 };
153}; 137};
138
139&spi1 {
140 status = "okay";
141 pinctrl-0 = <&spi1_pins>;
142 pinctrl-names = "default";
143
144 spi-flash@0 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "n25q128a13", "jedec,spi-nor";
148 reg = <0>;
149 spi-max-frequency = <108000000>;
150
151 partition@0 {
152 label = "U-Boot";
153 reg = <0 0x400000>;
154 };
155
156 partition@400000 {
157 label = "Filesystem";
158 reg = <0x400000 0x1000000>;
159 };
160 };
161};
diff --git a/arch/arm/boot/dts/armada-398.dtsi b/arch/arm/boot/dts/armada-398.dtsi
index fdc25914e3a3..234a99891a29 100644
--- a/arch/arm/boot/dts/armada-398.dtsi
+++ b/arch/arm/boot/dts/armada-398.dtsi
@@ -44,7 +44,7 @@
44 * OTHER DEALINGS IN THE SOFTWARE. 44 * OTHER DEALINGS IN THE SOFTWARE.
45 */ 45 */
46 46
47#include "armada-39x.dtsi" 47#include "armada-395.dtsi"
48 48
49/ { 49/ {
50 compatible = "marvell,armada398", "marvell,armada390"; 50 compatible = "marvell,armada398", "marvell,armada390";
@@ -55,6 +55,14 @@
55 compatible = "marvell,mv88f6928-pinctrl"; 55 compatible = "marvell,mv88f6928-pinctrl";
56 reg = <0x18000 0x20>; 56 reg = <0x18000 0x20>;
57 }; 57 };
58
59 sata@e0000 {
60 compatible = "marvell,armada-380-ahci";
61 reg = <0xe0000 0x2000>;
62 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
63 clocks = <&gateclk 30>;
64 status = "disabled";
65 };
58 }; 66 };
59 }; 67 };
60}; 68};
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index dc6efd386dbc..34cba87f9200 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -55,6 +55,8 @@
55 compatible = "marvell,armada390"; 55 compatible = "marvell,armada390";
56 56
57 aliases { 57 aliases {
58 gpio0 = &gpio0;
59 gpio1 = &gpio1;
58 serial0 = &uart0; 60 serial0 = &uart0;
59 serial1 = &uart1; 61 serial1 = &uart1;
60 serial2 = &uart2; 62 serial2 = &uart2;
@@ -78,6 +80,11 @@
78 }; 80 };
79 }; 81 };
80 82
83 pmu {
84 compatible = "arm,cortex-a9-pmu";
85 interrupts-extended = <&mpic 3>;
86 };
87
81 soc { 88 soc {
82 compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus", 89 compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus",
83 "simple-bus"; 90 "simple-bus";
@@ -131,30 +138,6 @@
131 <0xc100 0x100>; 138 <0xc100 0x100>;
132 }; 139 };
133 140
134 spi0: spi@10600 {
135 compatible = "marvell,armada-390-spi",
136 "marvell,orion-spi";
137 reg = <0x10600 0x50>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 cell-index = <0>;
141 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
142 clocks = <&coreclk 0>;
143 status = "disabled";
144 };
145
146 spi1: spi@10680 {
147 compatible = "marvell,armada-390-spi",
148 "marvell,orion-spi";
149 reg = <0x10680 0x50>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152 cell-index = <1>;
153 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
154 clocks = <&coreclk 0>;
155 status = "disabled";
156 };
157
158 i2c0: i2c@11000 { 141 i2c0: i2c@11000 {
159 compatible = "marvell,mv64xxx-i2c"; 142 compatible = "marvell,mv64xxx-i2c";
160 reg = <0x11000 0x20>; 143 reg = <0x11000 0x20>;
@@ -269,6 +252,34 @@
269 }; 252 };
270 }; 253 };
271 254
255 gpio0: gpio@18100 {
256 compatible = "marvell,orion-gpio";
257 reg = <0x18100 0x40>;
258 ngpios = <32>;
259 gpio-controller;
260 #gpio-cells = <2>;
261 interrupt-controller;
262 #interrupt-cells = <2>;
263 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
264 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
265 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
267 };
268
269 gpio1: gpio@18140 {
270 compatible = "marvell,orion-gpio";
271 reg = <0x18140 0x40>;
272 ngpios = <28>;
273 gpio-controller;
274 #gpio-cells = <2>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
277 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
281 };
282
272 system-controller@18200 { 283 system-controller@18200 {
273 compatible = "marvell,armada-390-system-controller", 284 compatible = "marvell,armada-390-system-controller",
274 "marvell,armada-370-xp-system-controller"; 285 "marvell,armada-370-xp-system-controller";
@@ -317,11 +328,29 @@
317 clock-names = "nbclk", "fixed"; 328 clock-names = "nbclk", "fixed";
318 }; 329 };
319 330
331 watchdog@20300 {
332 compatible = "marvell,armada-380-wdt";
333 reg = <0x20300 0x34>, <0x20704 0x4>,
334 <0x18260 0x4>;
335 clocks = <&coreclk 2>, <&refclk>;
336 clock-names = "nbclk", "fixed";
337 };
338
320 cpurst@20800 { 339 cpurst@20800 {
321 compatible = "marvell,armada-370-cpu-reset"; 340 compatible = "marvell,armada-370-cpu-reset";
322 reg = <0x20800 0x10>; 341 reg = <0x20800 0x10>;
323 }; 342 };
324 343
344 mpcore-soc-ctrl@20d20 {
345 compatible = "marvell,armada-380-mpcore-soc-ctrl";
346 reg = <0x20d20 0x6c>;
347 };
348
349 coherency-fabric@21010 {
350 compatible = "marvell,armada-380-coherency-fabric";
351 reg = <0x21010 0x1c>;
352 };
353
325 pmsu@22000 { 354 pmsu@22000 {
326 compatible = "marvell,armada-390-pmsu", 355 compatible = "marvell,armada-390-pmsu",
327 "marvell,armada-380-pmsu"; 356 "marvell,armada-380-pmsu";
@@ -368,6 +397,13 @@
368 }; 397 };
369 }; 398 };
370 399
400 rtc@a3800 {
401 compatible = "marvell,armada-380-rtc";
402 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
403 reg-names = "rtc", "rtc-soc";
404 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
405 };
406
371 flash@d0000 { 407 flash@d0000 {
372 compatible = "marvell,armada370-nand"; 408 compatible = "marvell,armada370-nand";
373 reg = <0xd0000 0x54>; 409 reg = <0xd0000 0x54>;
@@ -380,7 +416,10 @@
380 416
381 sdhci@d8000 { 417 sdhci@d8000 {
382 compatible = "marvell,armada-380-sdhci"; 418 compatible = "marvell,armada-380-sdhci";
383 reg = <0xd8000 0x1000>, <0xdc000 0x100>; 419 reg-names = "sdhci", "mbus", "conf-sdio3";
420 reg = <0xd8000 0x1000>,
421 <0xdc000 0x100>,
422 <0x18454 0x4>;
384 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 423 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
385 clocks = <&gateclk 17>; 424 clocks = <&gateclk 17>;
386 mrvl,clk-delay-cycles = <0x1F>; 425 mrvl,clk-delay-cycles = <0x1F>;
@@ -395,6 +434,12 @@
395 clocks = <&mainpll>; 434 clocks = <&mainpll>;
396 clock-output-names = "nand"; 435 clock-output-names = "nand";
397 }; 436 };
437
438 thermal@e8078 {
439 compatible = "marvell,armada380-thermal";
440 reg = <0xe4078 0x4>, <0xe4074 0x4>;
441 status = "okay";
442 };
398 }; 443 };
399 444
400 pcie-controller { 445 pcie-controller {
@@ -501,6 +546,30 @@
501 status = "disabled"; 546 status = "disabled";
502 }; 547 };
503 }; 548 };
549
550 spi0: spi@10600 {
551 compatible = "marvell,armada-390-spi",
552 "marvell,orion-spi";
553 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
554 #address-cells = <1>;
555 #size-cells = <0>;
556 cell-index = <0>;
557 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&coreclk 0>;
559 status = "disabled";
560 };
561
562 spi1: spi@10680 {
563 compatible = "marvell,armada-390-spi",
564 "marvell,orion-spi";
565 reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
566 #address-cells = <1>;
567 #size-cells = <0>;
568 cell-index = <1>;
569 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
570 clocks = <&coreclk 0>;
571 status = "disabled";
572 };
504 }; 573 };
505 574
506 clocks { 575 clocks {
@@ -510,5 +579,12 @@
510 #clock-cells = <0>; 579 #clock-cells = <0>;
511 clock-frequency = <1000000000>; 580 clock-frequency = <1000000000>;
512 }; 581 };
582
583 /* 25 MHz reference crystal */
584 refclk: oscillator {
585 compatible = "fixed-clock";
586 #clock-cells = <0>;
587 clock-frequency = <25000000>;
588 };
513 }; 589 };
514}; 590};
diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
index 5c21b236721f..ce152719bc28 100644
--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
@@ -135,18 +135,6 @@
135 phy = <&phy1>; 135 phy = <&phy1>;
136 phy-mode = "rgmii-id"; 136 phy-mode = "rgmii-id";
137 }; 137 };
138
139 spi0: spi@10600 {
140 status = "okay";
141
142 spi-flash@0 {
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "n25q128a13", "jedec,spi-nor";
146 reg = <0>; /* Chip select 0 */
147 spi-max-frequency = <108000000>;
148 };
149 };
150 }; 138 };
151 }; 139 };
152 140
@@ -179,3 +167,15 @@
179 marvell,function = "gpio"; 167 marvell,function = "gpio";
180 }; 168 };
181}; 169};
170
171&spi0 {
172 status = "okay";
173
174 spi-flash@0 {
175 #address-cells = <1>;
176 #size-cells = <1>;
177 compatible = "n25q128a13", "jedec,spi-nor";
178 reg = <0>; /* Chip select 0 */
179 spi-max-frequency = <108000000>;
180 };
181};
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 62422a90aeb2..075120bc3ec4 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -231,18 +231,6 @@
231 status = "okay"; 231 status = "okay";
232 }; 232 };
233 233
234 spi0: spi@10600 {
235 status = "okay";
236
237 spi-flash@0 {
238 #address-cells = <1>;
239 #size-cells = <1>;
240 compatible = "m25p64", "jedec,spi-nor";
241 reg = <0>; /* Chip select 0 */
242 spi-max-frequency = <20000000>;
243 };
244 };
245
246 nand@d0000 { 234 nand@d0000 {
247 status = "okay"; 235 status = "okay";
248 num-cs = <1>; 236 num-cs = <1>;
@@ -277,3 +265,15 @@
277 }; 265 };
278 }; 266 };
279}; 267};
268
269&spi0 {
270 status = "okay";
271
272 spi-flash@0 {
273 #address-cells = <1>;
274 #size-cells = <1>;
275 compatible = "m25p64", "jedec,spi-nor";
276 reg = <0>; /* Chip select 0 */
277 spi-max-frequency = <20000000>;
278 };
279};
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 061f4237760e..190e4eccb180 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -232,18 +232,6 @@
232 status = "okay"; 232 status = "okay";
233 }; 233 };
234 234
235 spi0: spi@10600 {
236 status = "okay";
237
238 spi-flash@0 {
239 #address-cells = <1>;
240 #size-cells = <1>;
241 compatible = "n25q128a13", "jedec,spi-nor";
242 reg = <0>; /* Chip select 0 */
243 spi-max-frequency = <108000000>;
244 };
245 };
246
247 bm@c0000 { 235 bm@c0000 {
248 status = "okay"; 236 status = "okay";
249 }; 237 };
@@ -262,3 +250,15 @@
262 }; 250 };
263 }; 251 };
264}; 252};
253
254&spi0 {
255 status = "okay";
256
257 spi-flash@0 {
258 #address-cells = <1>;
259 #size-cells = <1>;
260 compatible = "n25q128a13", "jedec,spi-nor";
261 reg = <0>; /* Chip select 0 */
262 spi-max-frequency = <108000000>;
263 };
264};
diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 7a461541ce50..076f27f22c3b 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -279,18 +279,6 @@
279 reg = <0x180000 0x780000>; /* 7.5MB */ 279 reg = <0x180000 0x780000>; /* 7.5MB */
280 }; 280 };
281 }; 281 };
282
283 spi0: spi@10600 {
284 status = "okay";
285
286 spi-flash@0 {
287 #address-cells = <1>;
288 #size-cells = <1>;
289 compatible = "everspin,mr25h256";
290 reg = <0>; /* Chip select 0 */
291 spi-max-frequency = <40000000>;
292 };
293 };
294 }; 282 };
295 }; 283 };
296 284
@@ -398,3 +386,15 @@
398 marvell,function = "gpio"; 386 marvell,function = "gpio";
399 }; 387 };
400}; 388};
389
390&spi0 {
391 status = "okay";
392
393 spi-flash@0 {
394 #address-cells = <1>;
395 #size-cells = <1>;
396 compatible = "everspin,mr25h256";
397 reg = <0>; /* Chip select 0 */
398 spi-max-frequency = <40000000>;
399 };
400};
diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
index d17dab0a6f51..ae286736b90a 100644
--- a/arch/arm/boot/dts/armada-xp-synology-ds414.dts
+++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
@@ -110,62 +110,6 @@
110 status = "disabled"; 110 status = "disabled";
111 }; 111 };
112 112
113 spi0: spi@10600 {
114 status = "okay";
115
116 spi-flash@0 {
117 #address-cells = <1>;
118 #size-cells = <1>;
119 compatible = "micron,n25q064", "jedec,spi-nor";
120 reg = <0>; /* Chip select 0 */
121 spi-max-frequency = <20000000>;
122
123 /*
124 * Warning!
125 *
126 * Synology u-boot uses its compiled-in environment
127 * and it seems Synology did not care to change u-boot
128 * default configuration in order to allow saving a
129 * modified environment at a sensible location. So,
130 * if you do a 'saveenv' under u-boot, your modified
131 * environment will be saved at 1MB after the start
132 * of the flash, i.e. in the middle of the uImage.
133 * For that reason, it is strongly advised not to
134 * change the default environment, unless you know
135 * what you are doing.
136 */
137 partition@00000000 { /* u-boot */
138 label = "RedBoot";
139 reg = <0x00000000 0x000d0000>; /* 832KB */
140 };
141
142 partition@000c0000 { /* uImage */
143 label = "zImage";
144 reg = <0x000d0000 0x002d0000>; /* 2880KB */
145 };
146
147 partition@003a0000 { /* uInitramfs */
148 label = "rd.gz";
149 reg = <0x003a0000 0x00430000>; /* 4250KB */
150 };
151
152 partition@007d0000 { /* MAC address and serial number */
153 label = "vendor";
154 reg = <0x007d0000 0x00010000>; /* 64KB */
155 };
156
157 partition@007e0000 {
158 label = "RedBoot config";
159 reg = <0x007e0000 0x00010000>; /* 64KB */
160 };
161
162 partition@007f0000 {
163 label = "FIS directory";
164 reg = <0x007f0000 0x00010000>; /* 64KB */
165 };
166 };
167 };
168
169 i2c@11000 { 113 i2c@11000 {
170 clock-frequency = <400000>; 114 clock-frequency = <400000>;
171 status = "okay"; 115 status = "okay";
@@ -362,3 +306,59 @@
362 marvell,function = "gpio"; 306 marvell,function = "gpio";
363 }; 307 };
364}; 308};
309
310&spi0 {
311 status = "okay";
312
313 spi-flash@0 {
314 #address-cells = <1>;
315 #size-cells = <1>;
316 compatible = "micron,n25q064", "jedec,spi-nor";
317 reg = <0>; /* Chip select 0 */
318 spi-max-frequency = <20000000>;
319
320 /*
321 * Warning!
322 *
323 * Synology u-boot uses its compiled-in environment
324 * and it seems Synology did not care to change u-boot
325 * default configuration in order to allow saving a
326 * modified environment at a sensible location. So,
327 * if you do a 'saveenv' under u-boot, your modified
328 * environment will be saved at 1MB after the start
329 * of the flash, i.e. in the middle of the uImage.
330 * For that reason, it is strongly advised not to
331 * change the default environment, unless you know
332 * what you are doing.
333 */
334 partition@00000000 { /* u-boot */
335 label = "RedBoot";
336 reg = <0x00000000 0x000d0000>; /* 832KB */
337 };
338
339 partition@000c0000 { /* uImage */
340 label = "zImage";
341 reg = <0x000d0000 0x002d0000>; /* 2880KB */
342 };
343
344 partition@003a0000 { /* uInitramfs */
345 label = "rd.gz";
346 reg = <0x003a0000 0x00430000>; /* 4250KB */
347 };
348
349 partition@007d0000 { /* MAC address and serial number */
350 label = "vendor";
351 reg = <0x007d0000 0x00010000>; /* 64KB */
352 };
353
354 partition@007e0000 {
355 label = "RedBoot config";
356 reg = <0x007e0000 0x00010000>; /* 64KB */
357 };
358
359 partition@007f0000 {
360 label = "FIS directory";
361 reg = <0x007f0000 0x00010000>; /* 64KB */
362 };
363 };
364};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 553349c07f28..4a5f99e65b51 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -84,19 +84,6 @@
84 wt-override; 84 wt-override;
85 }; 85 };
86 86
87 spi0: spi@10600 {
88 compatible = "marvell,armada-xp-spi",
89 "marvell,orion-spi";
90 pinctrl-0 = <&spi0_pins>;
91 pinctrl-names = "default";
92 };
93
94 spi1: spi@10680 {
95 compatible = "marvell,armada-xp-spi",
96 "marvell,orion-spi";
97 };
98
99
100 i2c0: i2c@11000 { 87 i2c0: i2c@11000 {
101 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; 88 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
102 reg = <0x11000 0x100>; 89 reg = <0x11000 0x100>;
@@ -362,6 +349,12 @@
362 marvell,function = "spi0"; 349 marvell,function = "spi0";
363 }; 350 };
364 351
352 spi1_pins: spi1-pins {
353 marvell,pins = "mpp13", "mpp14",
354 "mpp16", "mpp17";
355 marvell,function = "spi1";
356 };
357
365 uart2_pins: uart2-pins { 358 uart2_pins: uart2-pins {
366 marvell,pins = "mpp42", "mpp43"; 359 marvell,pins = "mpp42", "mpp43";
367 marvell,function = "uart2"; 360 marvell,function = "uart2";
@@ -372,3 +365,15 @@
372 marvell,function = "uart3"; 365 marvell,function = "uart3";
373 }; 366 };
374}; 367};
368
369&spi0 {
370 compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
371 pinctrl-0 = <&spi0_pins>;
372 pinctrl-names = "default";
373};
374
375&spi1 {
376 compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
377 pinctrl-0 = <&spi1_pins>;
378 pinctrl-names = "default";
379};
diff --git a/arch/arm/boot/dts/armv7-m.dtsi b/arch/arm/boot/dts/armv7-m.dtsi
index 16331aa79775..ba332e399be4 100644
--- a/arch/arm/boot/dts/armv7-m.dtsi
+++ b/arch/arm/boot/dts/armv7-m.dtsi
@@ -1,5 +1,3 @@
1#include "skeleton.dtsi"
2
3/ { 1/ {
4 nvic: interrupt-controller@e000e100 { 2 nvic: interrupt-controller@e000e100 {
5 compatible = "arm,armv7m-nvic"; 3 compatible = "arm,armv7m-nvic";
diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi
index 3fac4c4d0007..3489019cc0dc 100644
--- a/arch/arm/boot/dts/artpec6.dtsi
+++ b/arch/arm/boot/dts/artpec6.dtsi
@@ -41,6 +41,7 @@
41 */ 41 */
42 42
43#include <dt-bindings/interrupt-controller/arm-gic.h> 43#include <dt-bindings/interrupt-controller/arm-gic.h>
44#include <dt-bindings/clock/axis,artpec6-clkctrl.h>
44#include "skeleton.dtsi" 45#include "skeleton.dtsi"
45 46
46/ { 47/ {
@@ -109,14 +110,14 @@
109 compatible = "arm,cortex-a9-global-timer"; 110 compatible = "arm,cortex-a9-global-timer";
110 reg = <0xfaf00200 0x20>; 111 reg = <0xfaf00200 0x20>;
111 interrupts = <GIC_PPI 11 0xf01>; 112 interrupts = <GIC_PPI 11 0xf01>;
112 clocks = <&clkctrl 1>; 113 clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
113 }; 114 };
114 115
115 timer@faf00600 { 116 timer@faf00600 {
116 compatible = "arm,cortex-a9-twd-timer"; 117 compatible = "arm,cortex-a9-twd-timer";
117 reg = <0xfaf00600 0x20>; 118 reg = <0xfaf00600 0x20>;
118 interrupts = <GIC_PPI 13 0xf04>; 119 interrupts = <GIC_PPI 13 0xf04>;
119 clocks = <&clkctrl 1>; 120 clocks = <&clkctrl ARTPEC6_CLK_CPU_PERIPH>;
120 status = "disabled"; 121 status = "disabled";
121 }; 122 };
122 123
@@ -136,12 +137,20 @@
136 arm,data-latency = <1 1 1>; 137 arm,data-latency = <1 1 1>;
137 arm,tag-latency = <1 1 1>; 138 arm,tag-latency = <1 1 1>;
138 arm,filter-ranges = <0x0 0x80000000>; 139 arm,filter-ranges = <0x0 0x80000000>;
140 arm,double-linefill = <1>;
141 arm,double-linefill-incr = <0>;
142 arm,double-linefill-wrap = <0>;
143 prefetch-data = <1>;
144 prefetch-instr = <1>;
145 arm,prefetch-offset = <0>;
146 arm,prefetch-drop = <1>;
139 }; 147 };
140 148
141 pmu { 149 pmu {
142 compatible = "arm,cortex-a9-pmu"; 150 compatible = "arm,cortex-a9-pmu";
143 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 151 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
144 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; 152 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
153 interrupt-affinity = <&cpu0>, <&cpu1>;
145 interrupt-parent = <&intc>; 154 interrupt-parent = <&intc>;
146 }; 155 };
147 156
@@ -157,7 +166,7 @@
157 ethernet: ethernet@f8010000 { 166 ethernet: ethernet@f8010000 {
158 clock-names = "phy_ref_clk", "apb_pclk"; 167 clock-names = "phy_ref_clk", "apb_pclk";
159 clocks = <&eth_phy_ref_clk>, 168 clocks = <&eth_phy_ref_clk>,
160 <&clkctrl 4>; 169 <&clkctrl ARTPEC6_CLK_ETH_ACLK>;
161 compatible = "snps,dwc-qos-ethernet-4.10"; 170 compatible = "snps,dwc-qos-ethernet-4.10";
162 interrupt-parent = <&intc>; 171 interrupt-parent = <&intc>;
163 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 172 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
@@ -175,8 +184,8 @@
175 compatible = "arm,pl011", "arm,primecell"; 184 compatible = "arm,pl011", "arm,primecell";
176 reg = <0xf8036000 0x1000>; 185 reg = <0xf8036000 0x1000>;
177 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 186 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
178 clocks = <&clkctrl 13>, 187 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
179 <&clkctrl 12>; 188 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
180 clock-names = "uart_clk", "apb_pclk"; 189 clock-names = "uart_clk", "apb_pclk";
181 status = "disabled"; 190 status = "disabled";
182 }; 191 };
@@ -184,8 +193,8 @@
184 compatible = "arm,pl011", "arm,primecell"; 193 compatible = "arm,pl011", "arm,primecell";
185 reg = <0xf8037000 0x1000>; 194 reg = <0xf8037000 0x1000>;
186 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 195 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
187 clocks = <&clkctrl 13>, 196 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
188 <&clkctrl 12>; 197 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
189 clock-names = "uart_clk", "apb_pclk"; 198 clock-names = "uart_clk", "apb_pclk";
190 status = "disabled"; 199 status = "disabled";
191 }; 200 };
@@ -193,8 +202,8 @@
193 compatible = "arm,pl011", "arm,primecell"; 202 compatible = "arm,pl011", "arm,primecell";
194 reg = <0xf8038000 0x1000>; 203 reg = <0xf8038000 0x1000>;
195 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 204 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
196 clocks = <&clkctrl 13>, 205 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
197 <&clkctrl 12>; 206 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
198 clock-names = "uart_clk", "apb_pclk"; 207 clock-names = "uart_clk", "apb_pclk";
199 status = "disabled"; 208 status = "disabled";
200 }; 209 };
@@ -202,8 +211,8 @@
202 compatible = "arm,pl011", "arm,primecell"; 211 compatible = "arm,pl011", "arm,primecell";
203 reg = <0xf8039000 0x1000>; 212 reg = <0xf8039000 0x1000>;
204 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; 213 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
205 clocks = <&clkctrl 13>, 214 clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
206 <&clkctrl 12>; 215 <&clkctrl ARTPEC6_CLK_UART_PCLK>;
207 clock-names = "uart_clk", "apb_pclk"; 216 clock-names = "uart_clk", "apb_pclk";
208 status = "disabled"; 217 status = "disabled";
209 }; 218 };
diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi
index afbe89c01df5..675bb0f30825 100644
--- a/arch/arm/boot/dts/axp209.dtsi
+++ b/arch/arm/boot/dts/axp209.dtsi
@@ -53,6 +53,12 @@
53 interrupt-controller; 53 interrupt-controller;
54 #interrupt-cells = <1>; 54 #interrupt-cells = <1>;
55 55
56 axp_gpio: gpio {
57 compatible = "x-powers,axp209-gpio";
58 gpio-controller;
59 #gpio-cells = <2>;
60 };
61
56 regulators { 62 regulators {
57 /* Default work frequency for buck regulators */ 63 /* Default work frequency for buck regulators */
58 x-powers,dcdc-freq = <1500>; 64 x-powers,dcdc-freq = <1500>;
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index c3bf7d23f136..7c9e0fae9bb9 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -209,6 +209,24 @@
209 #dma-cells = <1>; 209 #dma-cells = <1>;
210 }; 210 };
211 211
212 amac0: ethernet@22000 {
213 compatible = "brcm,nsp-amac";
214 reg = <0x022000 0x1000>,
215 <0x110000 0x1000>;
216 reg-names = "amac_base", "idm_base";
217 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
218 status = "disabled";
219 };
220
221 amac1: ethernet@23000 {
222 compatible = "brcm,nsp-amac";
223 reg = <0x023000 0x1000>,
224 <0x111000 0x1000>;
225 reg-names = "amac_base", "idm_base";
226 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
227 status = "disabled";
228 };
229
212 nand: nand@26000 { 230 nand: nand@26000 {
213 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; 231 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
214 reg = <0x026000 0x600>, 232 reg = <0x026000 0x600>,
@@ -223,6 +241,14 @@
223 brcm,nand-has-wp; 241 brcm,nand-has-wp;
224 }; 242 };
225 243
244 pwm: pwm@31000 {
245 compatible = "brcm,iproc-pwm";
246 reg = <0x31000 0x28>;
247 clocks = <&osc>;
248 #pwm-cells = <3>;
249 status = "disabled";
250 };
251
226 rng: rng@33000 { 252 rng: rng@33000 {
227 compatible = "brcm,bcm-nsp-rng"; 253 compatible = "brcm,bcm-nsp-rng";
228 reg = <0x33000 0x14>; 254 reg = <0x33000 0x14>;
@@ -246,6 +272,17 @@
246 clock-names = "apb_pclk"; 272 clock-names = "apb_pclk";
247 }; 273 };
248 274
275 srab: srab@36000 {
276 compatible = "brcm,nsp-srab";
277 reg = <0x36000 0x1000>;
278 #address-cells = <1>;
279 #size-cells = <0>;
280
281 status = "disabled";
282
283 /* ports are defined in board DTS */
284 };
285
249 i2c0: i2c@38000 { 286 i2c0: i2c@38000 {
250 compatible = "brcm,iproc-i2c"; 287 compatible = "brcm,iproc-i2c";
251 reg = <0x38000 0x50>; 288 reg = <0x38000 0x50>;
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
index 35ff4e7a4aac..f7f9db355d98 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2#include "bcm2835.dtsi" 2#include "bcm2835.dtsi"
3#include "bcm2835-rpi.dtsi" 3#include "bcm2835-rpi.dtsi"
4#include "bcm283x-rpi-usb-host.dtsi"
4 5
5/ { 6/ {
6 compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; 7 compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
index 306a84ee9898..8be102f5d826 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2#include "bcm2835.dtsi" 2#include "bcm2835.dtsi"
3#include "bcm2835-rpi.dtsi" 3#include "bcm2835-rpi.dtsi"
4#include "bcm283x-rpi-usb-host.dtsi"
4 5
5/ { 6/ {
6 compatible = "raspberrypi,model-a", "brcm,bcm2835"; 7 compatible = "raspberrypi,model-a", "brcm,bcm2835";
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
index d5fdb8e761a3..35cde65c975e 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
@@ -2,6 +2,7 @@
2#include "bcm2835.dtsi" 2#include "bcm2835.dtsi"
3#include "bcm2835-rpi.dtsi" 3#include "bcm2835-rpi.dtsi"
4#include "bcm283x-rpi-smsc9514.dtsi" 4#include "bcm283x-rpi-smsc9514.dtsi"
5#include "bcm283x-rpi-usb-host.dtsi"
5 6
6/ { 7/ {
7 compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; 8 compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
index bfc4bd9b7733..84df85ea6296 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
@@ -2,6 +2,7 @@
2#include "bcm2835.dtsi" 2#include "bcm2835.dtsi"
3#include "bcm2835-rpi.dtsi" 3#include "bcm2835-rpi.dtsi"
4#include "bcm283x-rpi-smsc9512.dtsi" 4#include "bcm283x-rpi-smsc9512.dtsi"
5#include "bcm283x-rpi-usb-host.dtsi"
5 6
6/ { 7/ {
7 compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; 8 compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index 0371bb7374b8..8e626a80fe24 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -2,6 +2,7 @@
2#include "bcm2835.dtsi" 2#include "bcm2835.dtsi"
3#include "bcm2835-rpi.dtsi" 3#include "bcm2835-rpi.dtsi"
4#include "bcm283x-rpi-smsc9512.dtsi" 4#include "bcm283x-rpi-smsc9512.dtsi"
5#include "bcm283x-rpi-usb-host.dtsi"
5 6
6/ { 7/ {
7 compatible = "raspberrypi,model-b", "brcm,bcm2835"; 8 compatible = "raspberrypi,model-b", "brcm,bcm2835";
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
new file mode 100644
index 000000000000..60e359fafc5b
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
@@ -0,0 +1,40 @@
1/*
2 * Copyright (C) 2016 Stefan Wahren <stefan.wahren@i2se.com>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "bcm2835.dtsi"
14#include "bcm2835-rpi.dtsi"
15#include "bcm283x-rpi-usb-host.dtsi"
16
17/ {
18 compatible = "raspberrypi,model-zero", "brcm,bcm2835";
19 model = "Raspberry Pi Zero";
20
21 leds {
22 act {
23 gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
24 };
25 };
26};
27
28&gpio {
29 pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
30
31 /* I2S interface */
32 i2s_alt0: i2s_alt0 {
33 brcm,pins = <18 19 20 21>;
34 brcm,function = <BCM2835_FSEL_ALT0>;
35 };
36};
37
38&hdmi {
39 hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
40};
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
index 29e1cfe8eb14..39dccf62ac96 100644
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -2,6 +2,7 @@
2#include "bcm2836.dtsi" 2#include "bcm2836.dtsi"
3#include "bcm2835-rpi.dtsi" 3#include "bcm2835-rpi.dtsi"
4#include "bcm283x-rpi-smsc9514.dtsi" 4#include "bcm283x-rpi-smsc9514.dtsi"
5#include "bcm283x-rpi-usb-host.dtsi"
5 6
6/ { 7/ {
7 compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; 8 compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
diff --git a/arch/arm/boot/dts/bcm283x-rpi-usb-host.dtsi b/arch/arm/boot/dts/bcm283x-rpi-usb-host.dtsi
new file mode 100644
index 000000000000..73f4ece8dcd0
--- /dev/null
+++ b/arch/arm/boot/dts/bcm283x-rpi-usb-host.dtsi
@@ -0,0 +1,3 @@
1&usb {
2 dr_mode = "host";
3};
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 445624a1a1de..46d46d894a44 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -290,6 +290,8 @@
290 interrupts = <1 9>; 290 interrupts = <1 9>;
291 #address-cells = <1>; 291 #address-cells = <1>;
292 #size-cells = <0>; 292 #size-cells = <0>;
293 clocks = <&clk_usb>;
294 clock-names = "otg";
293 }; 295 };
294 296
295 v3d: v3d@7ec00000 { 297 v3d: v3d@7ec00000 {
@@ -317,5 +319,12 @@
317 clock-frequency = <19200000>; 319 clock-frequency = <19200000>;
318 }; 320 };
319 321
322 clk_usb: clock@4 {
323 compatible = "fixed-clock";
324 reg = <4>;
325 #clock-cells = <0>;
326 clock-output-names = "otg";
327 clock-frequency = <480000000>;
328 };
320 }; 329 };
321}; 330};
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 8af47913b3b4..ae4b3880616d 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -140,6 +140,15 @@
140 }; 140 };
141 }; 141 };
142 142
143 usb2_phy: usb2-phy {
144 compatible = "brcm,ns-usb2-phy";
145 reg = <0x1800c000 0x1000>;
146 reg-names = "dmu";
147 #phy-cells = <0>;
148 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
149 clock-names = "phy-ref-clk";
150 };
151
143 axi@18000000 { 152 axi@18000000 {
144 compatible = "brcm,bus-axi"; 153 compatible = "brcm,bus-axi";
145 reg = <0x18000000 0x1000>; 154 reg = <0x18000000 0x1000>;
@@ -232,6 +241,8 @@
232 241
233 #address-cells = <1>; 242 #address-cells = <1>;
234 #size-cells = <1>; 243 #size-cells = <1>;
244
245 phys = <&usb2_phy>;
235 }; 246 };
236 247
237 usb3: usb3@23000 { 248 usb3: usb3@23000 {
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
new file mode 100644
index 000000000000..a21b0fd21f4e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -0,0 +1,130 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2016 Broadcom. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/dts-v1/;
34
35#include "bcm-nsp.dtsi"
36#include <dt-bindings/gpio/gpio.h>
37
38/ {
39 model = "NorthStar Plus SVK (BCM958522ER)";
40 compatible = "brcm,bcm58522", "brcm,nsp";
41
42 aliases {
43 serial0 = &uart0;
44 };
45
46 chosen {
47 stdout-path = "serial0:115200n8";
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x60000000 0x80000000>;
53 };
54
55 gpio-restart {
56 compatible = "gpio-restart";
57 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
58 priority = <200>;
59 };
60};
61
62/* USB 2/3 support needed to be complete */
63
64&amac0 {
65 status = "okay";
66};
67
68
69&amac1 {
70 status = "okay";
71};
72
73&nand {
74 nandcs@0 {
75 compatible = "brcm,nandcs";
76 reg = <0>;
77 nand-on-flash-bbt;
78
79 #address-cells = <1>;
80 #size-cells = <1>;
81
82 nand-ecc-strength = <24>;
83 nand-ecc-step-size = <1024>;
84
85 brcm,nand-oob-sector-size = <27>;
86
87 partition@0 {
88 label = "nboot";
89 reg = <0x00000000 0x00200000>;
90 read-only;
91 };
92 partition@200000 {
93 label = "nenv";
94 reg = <0x00200000 0x00400000>;
95 };
96 partition@600000 {
97 label = "nsystem";
98 reg = <0x00600000 0x00a00000>;
99 };
100 partition@1000000 {
101 label = "nrootfs";
102 reg = <0x01000000 0x03000000>;
103 };
104 partition@4000000 {
105 label = "ncustfs";
106 reg = <0x04000000 0x3c000000>;
107 };
108 };
109};
110
111&pcie0 {
112 status = "okay";
113};
114
115&pcie1 {
116 status = "okay";
117};
118
119&pinctrl {
120 pinctrl-names = "default";
121 pinctrl-0 = <&nand_sel>;
122 nand_sel: nand_sel {
123 function = "nand";
124 groups = "nand_grp";
125 };
126};
127
128&uart0 {
129 status = "okay";
130};
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
new file mode 100644
index 000000000000..be7f2f8ecf39
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -0,0 +1,142 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2016 Broadcom. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/dts-v1/;
34
35#include "bcm-nsp.dtsi"
36#include <dt-bindings/gpio/gpio.h>
37
38/ {
39 model = "NorthStar Plus SVK (BCM958525ER)";
40 compatible = "brcm,bcm58525", "brcm,nsp";
41
42 aliases {
43 serial0 = &uart0;
44 };
45
46 chosen {
47 stdout-path = "serial0:115200n8";
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x60000000 0x80000000>;
53 };
54
55 gpio-restart {
56 compatible = "gpio-restart";
57 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
58 priority = <200>;
59 };
60};
61
62/* USB 2/3 support needed to be complete */
63
64&amac0 {
65 status = "okay";
66};
67
68
69&amac1 {
70 status = "okay";
71};
72
73&nand {
74 nandcs@0 {
75 compatible = "brcm,nandcs";
76 reg = <0>;
77 nand-on-flash-bbt;
78
79 #address-cells = <1>;
80 #size-cells = <1>;
81
82 nand-ecc-strength = <24>;
83 nand-ecc-step-size = <1024>;
84
85 brcm,nand-oob-sector-size = <27>;
86
87 partition@0 {
88 label = "nboot";
89 reg = <0x00000000 0x00200000>;
90 read-only;
91 };
92 partition@200000 {
93 label = "nenv";
94 reg = <0x00200000 0x00400000>;
95 };
96 partition@600000 {
97 label = "nsystem";
98 reg = <0x00600000 0x00a00000>;
99 };
100 partition@1000000 {
101 label = "nrootfs";
102 reg = <0x01000000 0x03000000>;
103 };
104 partition@4000000 {
105 label = "ncustfs";
106 reg = <0x04000000 0x3c000000>;
107 };
108 };
109};
110
111&pcie0 {
112 status = "okay";
113};
114
115&pcie1 {
116 status = "okay";
117};
118
119&pinctrl {
120 pinctrl-names = "default";
121 pinctrl-0 = <&nand_sel>;
122 nand_sel: nand_sel {
123 function = "nand";
124 groups = "nand_grp";
125 };
126};
127
128&sata_phy0 {
129 status = "okay";
130};
131
132&sata_phy1 {
133 status = "okay";
134};
135
136&sata {
137 status = "okay";
138};
139
140&uart0 {
141 status = "okay";
142};
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index d257e83dedfc..959cde911c3c 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -33,6 +33,7 @@
33/dts-v1/; 33/dts-v1/;
34 34
35#include "bcm-nsp.dtsi" 35#include "bcm-nsp.dtsi"
36#include <dt-bindings/gpio/gpio.h>
36 37
37/ { 38/ {
38 model = "NorthStar Plus XMC (BCM958525xmc)"; 39 model = "NorthStar Plus XMC (BCM958525xmc)";
@@ -45,6 +46,35 @@
45 chosen { 46 chosen {
46 stdout-path = "serial0:115200n8"; 47 stdout-path = "serial0:115200n8";
47 }; 48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x60000000 0x40000000>;
53 };
54
55 gpio-restart {
56 compatible = "gpio-restart";
57 gpios = <&gpioa 31 GPIO_ACTIVE_LOW>;
58 priority = <200>;
59 };
60};
61
62&i2c0 {
63 temperature-sensor@4c {
64 compatible = "adi,adt7461a";
65 reg = <0x4c>;
66 };
67
68 eeprom@52 {
69 compatible = "atmel,24c02";
70 reg = <0x52>;
71 pagesize = <16>;
72 };
73
74 rtc@68 {
75 compatible = "st,m41t81";
76 reg = <0x68>;
77 };
48}; 78};
49 79
50&nand { 80&nand {
@@ -85,7 +115,7 @@
85 }; 115 };
86}; 116};
87 117
88/* XHCI, SATA, MMC, and Ethernet support needed to be complete */ 118/* XHCI, MMC, and Ethernet support needed to be complete */
89 119
90&uart0 { 120&uart0 {
91 status = "okay"; 121 status = "okay";
@@ -99,6 +129,18 @@
99 status = "okay"; 129 status = "okay";
100}; 130};
101 131
132&sata_phy0 {
133 status = "okay";
134};
135
136&sata_phy1 {
137 status = "okay";
138};
139
140&sata {
141 status = "okay";
142};
143
102&pinctrl { 144&pinctrl {
103 pinctrl-names = "default"; 145 pinctrl-names = "default";
104 pinctrl-0 = <&nand_sel>; 146 pinctrl-0 = <&nand_sel>;
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
new file mode 100644
index 000000000000..ad2aa87dd15a
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -0,0 +1,170 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2016 Broadcom. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/dts-v1/;
34
35#include "bcm-nsp.dtsi"
36#include <dt-bindings/gpio/gpio.h>
37
38/ {
39 model = "NorthStar Plus SVK (BCM958622HR)";
40 compatible = "brcm,bcm58622", "brcm,nsp";
41
42 aliases {
43 serial0 = &uart0;
44 };
45
46 chosen {
47 stdout-path = "serial0:115200n8";
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x60000000 0x80000000>;
53 };
54
55 gpio-restart {
56 compatible = "gpio-restart";
57 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
58 priority = <200>;
59 };
60};
61
62/* USB 2/3 and SLIC support needed to be complete */
63
64&amac0 {
65 status = "okay";
66};
67
68&nand {
69 nandcs@0 {
70 compatible = "brcm,nandcs";
71 reg = <0>;
72 nand-on-flash-bbt;
73
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 nand-ecc-strength = <24>;
78 nand-ecc-step-size = <1024>;
79
80 brcm,nand-oob-sector-size = <27>;
81
82 partition@0 {
83 label = "nboot";
84 reg = <0x00000000 0x00200000>;
85 read-only;
86 };
87 partition@200000 {
88 label = "nenv";
89 reg = <0x00200000 0x00400000>;
90 };
91 partition@600000 {
92 label = "nsystem";
93 reg = <0x00600000 0x00a00000>;
94 };
95 partition@1000000 {
96 label = "nrootfs";
97 reg = <0x01000000 0x03000000>;
98 };
99 partition@4000000 {
100 label = "ncustfs";
101 reg = <0x04000000 0x3c000000>;
102 };
103 };
104};
105
106&pcie0 {
107 status = "okay";
108};
109
110&pcie1 {
111 status = "okay";
112};
113
114&pinctrl {
115 pinctrl-names = "default";
116 pinctrl-0 = <&nand_sel>;
117 nand_sel: nand_sel {
118 function = "nand";
119 groups = "nand_grp";
120 };
121};
122
123&srab {
124 compatible = "brcm,bcm58622-srab", "brcm,nsp-srab";
125 status = "okay";
126
127 ports {
128 #address-cells = <1>;
129 #size-cells = <0>;
130
131 port@0 {
132 label = "port0";
133 reg = <0>;
134 };
135
136 port@1 {
137 label = "port1";
138 reg = <1>;
139 };
140
141 port@2 {
142 label = "port2";
143 reg = <2>;
144 };
145
146 port@3 {
147 label = "port3";
148 reg = <3>;
149 };
150
151 port@4 {
152 label = "port4";
153 reg = <4>;
154 };
155
156 port@5 {
157 ethernet = <&amac0>;
158 label = "cpu";
159 reg = <5>;
160 fixed-link {
161 speed = <1000>;
162 full-duplex;
163 };
164 };
165 };
166};
167
168&uart0 {
169 status = "okay";
170};
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
new file mode 100644
index 000000000000..4ceb8fef8041
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -0,0 +1,178 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2016 Broadcom. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/dts-v1/;
34
35#include "bcm-nsp.dtsi"
36#include <dt-bindings/gpio/gpio.h>
37
38/ {
39 model = "NorthStar Plus SVK (BCM958623HR)";
40 compatible = "brcm,bcm58623", "brcm,nsp";
41
42 aliases {
43 serial0 = &uart0;
44 };
45
46 chosen {
47 stdout-path = "serial0:115200n8";
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x60000000 0x80000000>;
53 };
54
55 gpio-restart {
56 compatible = "gpio-restart";
57 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
58 priority = <200>;
59 };
60};
61
62/* USB 2/3 and SLIC support needed to be complete */
63
64&amac0 {
65 status = "okay";
66};
67
68&nand {
69 nandcs@0 {
70 compatible = "brcm,nandcs";
71 reg = <0>;
72 nand-on-flash-bbt;
73
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 nand-ecc-strength = <24>;
78 nand-ecc-step-size = <1024>;
79
80 brcm,nand-oob-sector-size = <27>;
81
82 partition@0 {
83 label = "nboot";
84 reg = <0x00000000 0x00200000>;
85 read-only;
86 };
87 partition@200000 {
88 label = "nenv";
89 reg = <0x00200000 0x00400000>;
90 };
91 partition@600000 {
92 label = "nsystem";
93 reg = <0x00600000 0x00a00000>;
94 };
95 partition@1000000 {
96 label = "nrootfs";
97 reg = <0x01000000 0x03000000>;
98 };
99 partition@4000000 {
100 label = "ncustfs";
101 reg = <0x04000000 0x3c000000>;
102 };
103 };
104};
105
106&pcie0 {
107 status = "okay";
108};
109
110&pcie1 {
111 status = "okay";
112};
113
114&pinctrl {
115 pinctrl-names = "default";
116 pinctrl-0 = <&nand_sel>;
117 nand_sel: nand_sel {
118 function = "nand";
119 groups = "nand_grp";
120 };
121};
122
123&srab {
124 compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";
125 status = "okay";
126
127 ports {
128 #address-cells = <1>;
129 #size-cells = <0>;
130
131 port@0 {
132 label = "port0";
133 reg = <0>;
134 };
135
136 port@1 {
137 label = "port1";
138 reg = <1>;
139 };
140
141 port@2 {
142 label = "port2";
143 reg = <2>;
144 };
145
146 port@3 {
147 label = "port3";
148 reg = <3>;
149 };
150
151 port@4 {
152 label = "port4";
153 reg = <4>;
154 };
155
156 port@5 {
157 ethernet = <&amac0>;
158 label = "cpu";
159 reg = <5>;
160 fixed-link {
161 speed = <1000>;
162 full-duplex;
163 };
164 };
165 };
166};
167
168&sata_phy0 {
169 status = "okay";
170};
171
172&sata {
173 status = "okay";
174};
175
176&uart0 {
177 status = "okay";
178};
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 03b8bbeb694f..442002597063 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -33,6 +33,7 @@
33/dts-v1/; 33/dts-v1/;
34 34
35#include "bcm-nsp.dtsi" 35#include "bcm-nsp.dtsi"
36#include <dt-bindings/gpio/gpio.h>
36 37
37/ { 38/ {
38 model = "NorthStar Plus SVK (BCM958625HR)"; 39 model = "NorthStar Plus SVK (BCM958625HR)";
@@ -47,7 +48,14 @@
47 }; 48 };
48 49
49 memory { 50 memory {
50 reg = <0x60000000 0x20000000>; 51 device_type = "memory";
52 reg = <0x60000000 0x80000000>;
53 };
54
55 gpio-restart {
56 compatible = "gpio-restart";
57 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
58 priority = <200>;
51 }; 59 };
52}; 60};
53 61
@@ -109,3 +117,64 @@
109 groups = "nand_grp"; 117 groups = "nand_grp";
110 }; 118 };
111}; 119};
120
121&amac0 {
122 status = "okay";
123};
124
125&srab {
126 compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
127 status = "okay";
128
129 ports {
130 #address-cells = <1>;
131 #size-cells = <0>;
132
133 port@0 {
134 label = "port0";
135 reg = <0>;
136 };
137
138 port@1 {
139 label = "port1";
140 reg = <1>;
141 };
142
143 port@2 {
144 label = "port2";
145 reg = <2>;
146 };
147
148 port@3 {
149 label = "port3";
150 reg = <3>;
151 };
152
153 port@4 {
154 label = "port4";
155 reg = <4>;
156 };
157
158 port@5 {
159 ethernet = <&amac0>;
160 label = "cpu";
161 reg = <5>;
162 fixed-link {
163 speed = <1000>;
164 full-duplex;
165 };
166 };
167 };
168};
169
170&sata_phy0 {
171 status = "okay";
172};
173
174&sata_phy1 {
175 status = "okay";
176};
177
178&sata {
179 status = "okay";
180};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 2d8422632b2b..05c5f98c8782 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -46,6 +46,11 @@
46 chosen { 46 chosen {
47 stdout-path = "serial0:115200n8"; 47 stdout-path = "serial0:115200n8";
48 }; 48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x60000000 0x80000000>;
53 };
49}; 54};
50 55
51&uart0 { 56&uart0 {
@@ -56,6 +61,14 @@
56 status = "okay"; 61 status = "okay";
57}; 62};
58 63
64&amac0 {
65 status = "okay";
66};
67
68&amac1 {
69 status = "okay";
70};
71
59&pcie0 { 72&pcie0 {
60 status = "okay"; 73 status = "okay";
61}; 74};
diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts
new file mode 100644
index 000000000000..104afe98a43b
--- /dev/null
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -0,0 +1,182 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2016 Broadcom. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/dts-v1/;
34
35#include "bcm-nsp.dtsi"
36#include <dt-bindings/gpio/gpio.h>
37
38/ {
39 model = "NorthStar Plus SVK (BCM988312HR)";
40 compatible = "brcm,bcm88312", "brcm,nsp";
41
42 aliases {
43 serial0 = &uart0;
44 };
45
46 chosen {
47 stdout-path = "serial0:115200n8";
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x60000000 0x80000000>;
53 };
54
55 gpio-restart {
56 compatible = "gpio-restart";
57 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
58 priority = <200>;
59 };
60};
61
62/* USB 2/3 support needed to be complete */
63
64&amac0 {
65 status = "okay";
66};
67
68&nand {
69 nandcs@0 {
70 compatible = "brcm,nandcs";
71 reg = <0>;
72 nand-on-flash-bbt;
73
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 nand-ecc-strength = <24>;
78 nand-ecc-step-size = <1024>;
79
80 brcm,nand-oob-sector-size = <27>;
81
82 partition@0 {
83 label = "nboot";
84 reg = <0x00000000 0x00200000>;
85 read-only;
86 };
87 partition@200000 {
88 label = "nenv";
89 reg = <0x00200000 0x00400000>;
90 };
91 partition@600000 {
92 label = "nsystem";
93 reg = <0x00600000 0x00a00000>;
94 };
95 partition@1000000 {
96 label = "nrootfs";
97 reg = <0x01000000 0x03000000>;
98 };
99 partition@4000000 {
100 label = "ncustfs";
101 reg = <0x04000000 0x3c000000>;
102 };
103 };
104};
105
106&pcie0 {
107 status = "okay";
108};
109
110&pcie1 {
111 status = "okay";
112};
113
114&pinctrl {
115 pinctrl-names = "default";
116 pinctrl-0 = <&nand_sel>;
117 nand_sel: nand_sel {
118 function = "nand";
119 groups = "nand_grp";
120 };
121};
122
123&sata_phy0 {
124 status = "okay";
125};
126
127&sata_phy1 {
128 status = "okay";
129};
130
131&sata {
132 status = "okay";
133};
134
135&srab {
136 compatible = "brcm,bcm88312-srab", "brcm,nsp-srab";
137 status = "okay";
138
139 ports {
140 #address-cells = <1>;
141 #size-cells = <0>;
142
143 port@0 {
144 label = "port0";
145 reg = <0>;
146 };
147
148 port@1 {
149 label = "port1";
150 reg = <1>;
151 };
152
153 port@2 {
154 label = "port2";
155 reg = <2>;
156 };
157
158 port@3 {
159 label = "port3";
160 reg = <3>;
161 };
162
163 port@4 {
164 label = "port4";
165 reg = <4>;
166 };
167
168 port@5 {
169 ethernet = <&amac0>;
170 label = "cpu";
171 reg = <5>;
172 fixed-link {
173 speed = <1000>;
174 full-duplex;
175 };
176 };
177 };
178};
179
180&uart0 {
181 status = "okay";
182};
diff --git a/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
index 3c0907b87fd6..1c475796d17f 100644
--- a/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
+++ b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
@@ -49,7 +49,7 @@
49 stdout-path = "serial0:115200n8"; 49 stdout-path = "serial0:115200n8";
50 }; 50 };
51 51
52 memory { 52 memory@0 {
53 device_type = "memory"; 53 device_type = "memory";
54 reg = <0x00000000 0x40000000>; /* 1 GB */ 54 reg = <0x00000000 0x40000000>; /* 1 GB */
55 }; 55 };
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index ae81009741ff..425c48971abe 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -39,13 +39,14 @@
39 * OTHER DEALINGS IN THE SOFTWARE. 39 * OTHER DEALINGS IN THE SOFTWARE.
40 */ 40 */
41 41
42#include "skeleton.dtsi"
43#include <dt-bindings/clock/berlin2.h> 42#include <dt-bindings/clock/berlin2.h>
44#include <dt-bindings/interrupt-controller/arm-gic.h> 43#include <dt-bindings/interrupt-controller/arm-gic.h>
45 44
46/ { 45/ {
47 model = "Marvell Armada 1500 (BG2) SoC"; 46 model = "Marvell Armada 1500 (BG2) SoC";
48 compatible = "marvell,berlin2", "marvell,berlin"; 47 compatible = "marvell,berlin2", "marvell,berlin";
48 #address-cells = <1>;
49 #size-cells = <1>;
49 50
50 aliases { 51 aliases {
51 serial0 = &uart0; 52 serial0 = &uart0;
@@ -89,7 +90,7 @@
89 clock-frequency = <25000000>; 90 clock-frequency = <25000000>;
90 }; 91 };
91 92
92 soc { 93 soc@f7000000 {
93 compatible = "simple-bus"; 94 compatible = "simple-bus";
94 #address-cells = <1>; 95 #address-cells = <1>;
95 #size-cells = <1>; 96 #size-cells = <1>;
@@ -447,7 +448,6 @@
447 reg = <0x2000 0x100>; 448 reg = <0x2000 0x100>;
448 clocks = <&refclk>; 449 clocks = <&refclk>;
449 interrupts = <1>; 450 interrupts = <1>;
450 status = "disabled";
451 }; 451 };
452 452
453 wdt2: watchdog@3000 { 453 wdt2: watchdog@3000 {
@@ -455,7 +455,6 @@
455 reg = <0x3000 0x100>; 455 reg = <0x3000 0x100>;
456 clocks = <&refclk>; 456 clocks = <&refclk>;
457 interrupts = <2>; 457 interrupts = <2>;
458 status = "disabled";
459 }; 458 };
460 459
461 sm_gpio1: gpio@5000 { 460 sm_gpio1: gpio@5000 {
diff --git a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
index 8ba8b50ce997..ca24def0ce13 100644
--- a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
+++ b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
@@ -50,7 +50,7 @@
50 stdout-path = "serial0:115200n8"; 50 stdout-path = "serial0:115200n8";
51 }; 51 };
52 52
53 memory { 53 memory@0 {
54 device_type = "memory"; 54 device_type = "memory";
55 reg = <0x00000000 0x20000000>; /* 512 MB */ 55 reg = <0x00000000 0x20000000>; /* 512 MB */
56 }; 56 };
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 6d06b6118d83..4fe1574d08c3 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -39,13 +39,14 @@
39 * OTHER DEALINGS IN THE SOFTWARE. 39 * OTHER DEALINGS IN THE SOFTWARE.
40 */ 40 */
41 41
42#include "skeleton.dtsi"
43#include <dt-bindings/clock/berlin2.h> 42#include <dt-bindings/clock/berlin2.h>
44#include <dt-bindings/interrupt-controller/arm-gic.h> 43#include <dt-bindings/interrupt-controller/arm-gic.h>
45 44
46/ { 45/ {
47 model = "Marvell Armada 1500-mini (BG2CD) SoC"; 46 model = "Marvell Armada 1500-mini (BG2CD) SoC";
48 compatible = "marvell,berlin2cd", "marvell,berlin"; 47 compatible = "marvell,berlin2cd", "marvell,berlin";
48 #address-cells = <1>;
49 #size-cells = <1>;
49 50
50 aliases { 51 aliases {
51 serial0 = &uart0; 52 serial0 = &uart0;
@@ -78,7 +79,7 @@
78 clock-frequency = <25000000>; 79 clock-frequency = <25000000>;
79 }; 80 };
80 81
81 soc { 82 soc@f7000000 {
82 compatible = "simple-bus"; 83 compatible = "simple-bus";
83 #address-cells = <1>; 84 #address-cells = <1>;
84 #size-cells = <1>; 85 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 33b28757b8f6..f485308840ab 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -43,7 +43,7 @@
43 model = "Marvell BG2-Q DMP"; 43 model = "Marvell BG2-Q DMP";
44 compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin"; 44 compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin";
45 45
46 memory { 46 memory@0 {
47 device_type = "memory"; 47 device_type = "memory";
48 reg = <0x00000000 0x80000000>; 48 reg = <0x00000000 0x80000000>;
49 }; 49 };
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 2c34bfb13632..e548229697fc 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -37,11 +37,11 @@
37#include <dt-bindings/clock/berlin2q.h> 37#include <dt-bindings/clock/berlin2q.h>
38#include <dt-bindings/interrupt-controller/arm-gic.h> 38#include <dt-bindings/interrupt-controller/arm-gic.h>
39 39
40#include "skeleton.dtsi"
41
42/ { 40/ {
43 model = "Marvell Armada 1500 pro (BG2-Q) SoC"; 41 model = "Marvell Armada 1500 pro (BG2-Q) SoC";
44 compatible = "marvell,berlin2q", "marvell,berlin"; 42 compatible = "marvell,berlin2q", "marvell,berlin";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 45
46 aliases { 46 aliases {
47 serial0 = &uart0; 47 serial0 = &uart0;
@@ -99,7 +99,7 @@
99 clock-frequency = <25000000>; 99 clock-frequency = <25000000>;
100 }; 100 };
101 101
102 soc { 102 soc@f7000000 {
103 compatible = "simple-bus"; 103 compatible = "simple-bus";
104 #address-cells = <1>; 104 #address-cells = <1>;
105 #size-cells = <1>; 105 #size-cells = <1>;
@@ -525,7 +525,6 @@
525 reg = <0x2000 0x100>; 525 reg = <0x2000 0x100>;
526 clocks = <&refclk>; 526 clocks = <&refclk>;
527 interrupts = <1>; 527 interrupts = <1>;
528 status = "disabled";
529 }; 528 };
530 529
531 wdt2: watchdog@3000 { 530 wdt2: watchdog@3000 {
@@ -533,7 +532,6 @@
533 reg = <0x3000 0x100>; 532 reg = <0x3000 0x100>;
534 clocks = <&refclk>; 533 clocks = <&refclk>;
535 interrupts = <2>; 534 interrupts = <2>;
536 status = "disabled";
537 }; 535 };
538 536
539 sm_gpio1: gpio@5000 { 537 sm_gpio1: gpio@5000 {
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 1a15db8e376b..41de15fe15a2 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -29,6 +29,20 @@
29 0x04 0x00011000 0x000ff000 29 0x04 0x00011000 0x000ff000
30 >; 30 >;
31 }; 31 };
32 nand_pins: nand_pins {
33 pinctrl-single,bits = <
34 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
35 0x1c 0x10110110 0xf0ff0ff0
36 /*
37 * EMA_D[0], EMA_D[1], EMA_D[2],
38 * EMA_D[3], EMA_D[4], EMA_D[5],
39 * EMA_D[6], EMA_D[7]
40 */
41 0x24 0x11111111 0xffffffff
42 /* EMA_A[1], EMA_A[2] */
43 0x30 0x01100000 0x0ff00000
44 >;
45 };
32 }; 46 };
33 serial0: serial@42000 { 47 serial0: serial@42000 {
34 status = "okay"; 48 status = "okay";
@@ -131,12 +145,7 @@
131 status = "okay"; 145 status = "okay";
132 }; 146 };
133 }; 147 };
134 nand_cs3@62000000 { 148 vbat: fixedregulator0 {
135 status = "okay";
136 pinctrl-names = "default";
137 pinctrl-0 = <&nand_cs3_pins>;
138 };
139 vbat: fixedregulator@0 {
140 compatible = "regulator-fixed"; 149 compatible = "regulator-fixed";
141 regulator-name = "vbat"; 150 regulator-name = "vbat";
142 regulator-min-microvolt = <5000000>; 151 regulator-min-microvolt = <5000000>;
@@ -250,3 +259,33 @@
250&edma1 { 259&edma1 {
251 ti,edma-reserved-slot-ranges = <32 90>; 260 ti,edma-reserved-slot-ranges = <32 90>;
252}; 261};
262
263&aemif {
264 pinctrl-names = "default";
265 pinctrl-0 = <&nand_pins>;
266 status = "ok";
267 cs3 {
268 #address-cells = <2>;
269 #size-cells = <1>;
270 clock-ranges;
271 ranges;
272
273 ti,cs-chipselect = <3>;
274
275 nand@2000000,0 {
276 compatible = "ti,davinci-nand";
277 #address-cells = <1>;
278 #size-cells = <1>;
279 reg = <0 0x02000000 0x02000000
280 1 0x00000000 0x00008000>;
281
282 ti,davinci-chipselect = <1>;
283 ti,davinci-mask-ale = <0>;
284 ti,davinci-mask-cle = <0>;
285 ti,davinci-mask-chipsel = <0>;
286 ti,davinci-ecc-mode = "hw";
287 ti,davinci-ecc-bits = <4>;
288 ti,davinci-nand-use-bbt;
289 };
290 };
291};
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
new file mode 100644
index 000000000000..7b8ab21fed6c
--- /dev/null
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -0,0 +1,221 @@
1/*
2 * Copyright (c) 2016 BayLibre, Inc.
3 *
4 * Licensed under GPLv2.
5 */
6/dts-v1/;
7#include "da850.dtsi"
8#include <dt-bindings/gpio/gpio.h>
9
10/ {
11 model = "DA850/AM1808/OMAP-L138 LCDK";
12 compatible = "ti,da850-lcdk", "ti,da850";
13
14 aliases {
15 serial2 = &serial2;
16 };
17
18 chosen {
19 stdout-path = "serial2:115200n8";
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0xc0000000 0x08000000>;
25 };
26
27 sound {
28 compatible = "simple-audio-card";
29 simple-audio-card,name = "DA850/OMAP-L138 LCDK";
30 simple-audio-card,widgets =
31 "Line", "Line In",
32 "Line", "Line Out";
33 simple-audio-card,routing =
34 "LINE1L", "Line In",
35 "LINE1R", "Line In",
36 "Line Out", "LLOUT",
37 "Line Out", "RLOUT";
38 simple-audio-card,format = "dsp_b";
39 simple-audio-card,bitclock-master = <&link0_codec>;
40 simple-audio-card,frame-master = <&link0_codec>;
41 simple-audio-card,bitclock-inversion;
42
43 simple-audio-card,cpu {
44 sound-dai = <&mcasp0>;
45 system-clock-frequency = <24576000>;
46 };
47
48 link0_codec: simple-audio-card,codec {
49 sound-dai = <&tlv320aic3106>;
50 system-clock-frequency = <24576000>;
51 };
52 };
53};
54
55&pmx_core {
56 status = "okay";
57
58 mcasp0_pins: pinmux_mcasp0_pins {
59 pinctrl-single,bits = <
60 /* AHCLKX AFSX ACLKX */
61 0x00 0x00101010 0x00f0f0f0
62 /* ARX13 ARX14 */
63 0x04 0x00000110 0x00000ff0
64 >;
65 };
66
67 nand_pins: nand_pins {
68 pinctrl-single,bits = <
69 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
70 0x1c 0x10110010 0xf0ff00f0
71 /*
72 * EMA_D[0], EMA_D[1], EMA_D[2],
73 * EMA_D[3], EMA_D[4], EMA_D[5],
74 * EMA_D[6], EMA_D[7]
75 */
76 0x24 0x11111111 0xffffffff
77 /*
78 * EMA_D[8], EMA_D[9], EMA_D[10],
79 * EMA_D[11], EMA_D[12], EMA_D[13],
80 * EMA_D[14], EMA_D[15]
81 */
82 0x20 0x11111111 0xffffffff
83 /* EMA_A[1], EMA_A[2] */
84 0x30 0x01100000 0x0ff00000
85 >;
86 };
87};
88
89&serial2 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&serial2_rxtx_pins>;
92 status = "okay";
93};
94
95&wdt {
96 status = "okay";
97};
98
99&rtc0 {
100 status = "okay";
101};
102
103&gpio {
104 status = "okay";
105};
106
107&mdio {
108 pinctrl-names = "default";
109 pinctrl-0 = <&mdio_pins>;
110 bus_freq = <2200000>;
111 status = "okay";
112};
113
114&eth0 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&mii_pins>;
117 status = "okay";
118};
119
120&mmc0 {
121 max-frequency = <50000000>;
122 bus-width = <4>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&mmc0_pins>;
125 cd-gpios = <&gpio 64 GPIO_ACTIVE_HIGH>;
126 status = "okay";
127};
128
129&i2c0 {
130 pinctrl-names = "default";
131 pinctrl-0 = <&i2c0_pins>;
132 clock-frequency = <100000>;
133 status = "okay";
134
135 tlv320aic3106: tlv320aic3106@18 {
136 #sound-dai-cells = <0>;
137 compatible = "ti,tlv320aic3106";
138 reg = <0x18>;
139 status = "okay";
140 };
141};
142
143&mcasp0 {
144 #sound-dai-cells = <0>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&mcasp0_pins>;
147 status = "okay";
148
149 op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
150 tdm-slots = <2>;
151 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
152 0 0 0 0
153 0 0 0 0
154 0 0 0 0
155 0 1 2 0
156 >;
157 tx-num-evt = <32>;
158 rx-num-evt = <32>;
159};
160
161&aemif {
162 pinctrl-names = "default";
163 pinctrl-0 = <&nand_pins>;
164 status = "okay";
165 cs3 {
166 #address-cells = <2>;
167 #size-cells = <1>;
168 clock-ranges;
169 ranges;
170
171 ti,cs-chipselect = <3>;
172
173 nand@2000000,0 {
174 compatible = "ti,davinci-nand";
175 #address-cells = <1>;
176 #size-cells = <1>;
177 reg = <0 0x02000000 0x02000000
178 1 0x00000000 0x00008000>;
179
180 ti,davinci-chipselect = <1>;
181 ti,davinci-mask-ale = <0>;
182 ti,davinci-mask-cle = <0>;
183 ti,davinci-mask-chipsel = <0>;
184
185 ti,davinci-nand-buswidth = <16>;
186 ti,davinci-ecc-mode = "hw";
187 ti,davinci-ecc-bits = <4>;
188 ti,davinci-nand-use-bbt;
189
190 /*
191 * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
192 * "To boot from NAND Flash, the AIS should be written
193 * to NAND block 1 (NAND block 0 is not used by default)".
194 * The same doc mentions that for ROM "Silicon Revision 2.1",
195 * "Updated NAND boot mode to offer boot from block 0 or block 1".
196 * However the limitaion is left here by default for compatibility
197 * with older silicon and because it needs new boot pin settings
198 * not possible in stock LCDK.
199 */
200 partitions {
201 compatible = "fixed-partitions";
202 #address-cells = <1>;
203 #size-cells = <1>;
204
205 partition@0 {
206 label = "u-boot env";
207 reg = <0 0x020000>;
208 };
209 partition@0x020000 {
210 /* The LCDK defaults to booting from this partition */
211 label = "u-boot";
212 reg = <0x020000 0x080000>;
213 };
214 partition@0x0a0000 {
215 label = "free space";
216 reg = <0x0a0000 0>;
217 };
218 };
219 };
220 };
221};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 25f0f8e6dde5..f79e1b91c680 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -41,20 +41,40 @@
41 pinctrl-single,function-mask = <0xf>; 41 pinctrl-single,function-mask = <0xf>;
42 status = "disabled"; 42 status = "disabled";
43 43
44 nand_cs3_pins: pinmux_nand_pins { 44 serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
45 pinctrl-single,bits = < 45 pinctrl-single,bits = <
46 /* EMA_OE, EMA_WE */ 46 /* UART0_RTS UART0_CTS */
47 0x1c 0x00110000 0x00ff0000 47 0x0c 0x22000000 0xff000000
48 /* EMA_CS[4],EMA_CS[3]*/ 48 >;
49 0x1c 0x00000110 0x00000ff0 49 };
50 /* 50 serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
51 * EMA_D[0], EMA_D[1], EMA_D[2], 51 pinctrl-single,bits = <
52 * EMA_D[3], EMA_D[4], EMA_D[5], 52 /* UART0_TXD UART0_RXD */
53 * EMA_D[6], EMA_D[7] 53 0x0c 0x00220000 0x00ff0000
54 */ 54 >;
55 0x24 0x11111111 0xffffffff 55 };
56 /* EMA_A[1], EMA_A[2] */ 56 serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
57 0x30 0x01100000 0x0ff00000 57 pinctrl-single,bits = <
58 /* UART1_CTS UART1_RTS */
59 0x00 0x00440000 0x00ff0000
60 >;
61 };
62 serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
63 pinctrl-single,bits = <
64 /* UART1_TXD UART1_RXD */
65 0x10 0x22000000 0xff000000
66 >;
67 };
68 serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
69 pinctrl-single,bits = <
70 /* UART2_CTS UART2_RTS */
71 0x00 0x44000000 0xff000000
72 >;
73 };
74 serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
75 pinctrl-single,bits = <
76 /* UART2_TXD UART2_RXD */
77 0x10 0x00220000 0x00ff0000
58 >; 78 >;
59 }; 79 };
60 i2c0_pins: pinmux_i2c0_pins { 80 i2c0_pins: pinmux_i2c0_pins {
@@ -274,31 +294,36 @@
274 status = "disabled"; 294 status = "disabled";
275 }; 295 };
276 ehrpwm0: pwm@300000 { 296 ehrpwm0: pwm@300000 {
277 compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; 297 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
298 "ti,am33xx-ehrpwm";
278 #pwm-cells = <3>; 299 #pwm-cells = <3>;
279 reg = <0x300000 0x2000>; 300 reg = <0x300000 0x2000>;
280 status = "disabled"; 301 status = "disabled";
281 }; 302 };
282 ehrpwm1: pwm@302000 { 303 ehrpwm1: pwm@302000 {
283 compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; 304 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
305 "ti,am33xx-ehrpwm";
284 #pwm-cells = <3>; 306 #pwm-cells = <3>;
285 reg = <0x302000 0x2000>; 307 reg = <0x302000 0x2000>;
286 status = "disabled"; 308 status = "disabled";
287 }; 309 };
288 ecap0: ecap@306000 { 310 ecap0: ecap@306000 {
289 compatible = "ti,da850-ecap", "ti,am33xx-ecap"; 311 compatible = "ti,da850-ecap", "ti,am3352-ecap",
312 "ti,am33xx-ecap";
290 #pwm-cells = <3>; 313 #pwm-cells = <3>;
291 reg = <0x306000 0x80>; 314 reg = <0x306000 0x80>;
292 status = "disabled"; 315 status = "disabled";
293 }; 316 };
294 ecap1: ecap@307000 { 317 ecap1: ecap@307000 {
295 compatible = "ti,da850-ecap", "ti,am33xx-ecap"; 318 compatible = "ti,da850-ecap", "ti,am3352-ecap",
319 "ti,am33xx-ecap";
296 #pwm-cells = <3>; 320 #pwm-cells = <3>;
297 reg = <0x307000 0x80>; 321 reg = <0x307000 0x80>;
298 status = "disabled"; 322 status = "disabled";
299 }; 323 };
300 ecap2: ecap@308000 { 324 ecap2: ecap@308000 {
301 compatible = "ti,da850-ecap", "ti,am33xx-ecap"; 325 compatible = "ti,da850-ecap", "ti,am3352-ecap",
326 "ti,am33xx-ecap";
302 #pwm-cells = <3>; 327 #pwm-cells = <3>;
303 reg = <0x308000 0x80>; 328 reg = <0x308000 0x80>;
304 status = "disabled"; 329 status = "disabled";
@@ -375,17 +400,14 @@
375 dma-names = "tx", "rx"; 400 dma-names = "tx", "rx";
376 }; 401 };
377 }; 402 };
378 nand_cs3@62000000 { 403 aemif: aemif@68000000 {
379 compatible = "ti,davinci-nand"; 404 compatible = "ti,da850-aemif";
380 reg = <0x62000000 0x807ff 405 #address-cells = <2>;
381 0x68000000 0x8000>; 406 #size-cells = <1>;
382 ti,davinci-chipselect = <1>; 407
383 ti,davinci-mask-ale = <0>; 408 reg = <0x68000000 0x00008000>;
384 ti,davinci-mask-cle = <0>; 409 ranges = <0 0 0x60000000 0x08000000
385 ti,davinci-mask-chipsel = <0>; 410 1 0 0x68000000 0x00008000>;
386 ti,davinci-ecc-mode = "hw";
387 ti,davinci-ecc-bits = <4>;
388 ti,davinci-nand-use-bbt;
389 status = "disabled"; 411 status = "disabled";
390 }; 412 };
391}; 413};
diff --git a/arch/arm/boot/dts/dm8148-evm.dts b/arch/arm/boot/dts/dm8148-evm.dts
index 4128fa91823c..d6657b3bae84 100644
--- a/arch/arm/boot/dts/dm8148-evm.dts
+++ b/arch/arm/boot/dts/dm8148-evm.dts
@@ -12,13 +12,13 @@
12 model = "DM8148 EVM"; 12 model = "DM8148 EVM";
13 compatible = "ti,dm8148-evm", "ti,dm8148"; 13 compatible = "ti,dm8148-evm", "ti,dm8148";
14 14
15 memory { 15 memory@80000000 {
16 device_type = "memory"; 16 device_type = "memory";
17 reg = <0x80000000 0x40000000>; /* 1 GB */ 17 reg = <0x80000000 0x40000000>; /* 1 GB */
18 }; 18 };
19 19
20 /* MIC94060YC6 controlled by SD1_POW pin */ 20 /* MIC94060YC6 controlled by SD1_POW pin */
21 vmmcsd_fixed: fixedregulator@0 { 21 vmmcsd_fixed: fixedregulator0 {
22 compatible = "regulator-fixed"; 22 compatible = "regulator-fixed";
23 regulator-name = "vmmcsd_fixed"; 23 regulator-name = "vmmcsd_fixed";
24 regulator-min-microvolt = <3300000>; 24 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/dm8148-t410.dts b/arch/arm/boot/dts/dm8148-t410.dts
index 3f184863e0c5..63883b3479f9 100644
--- a/arch/arm/boot/dts/dm8148-t410.dts
+++ b/arch/arm/boot/dts/dm8148-t410.dts
@@ -11,7 +11,7 @@
11 model = "HP t410 Smart Zero Client"; 11 model = "HP t410 Smart Zero Client";
12 compatible = "hp,t410", "ti,dm8148"; 12 compatible = "hp,t410", "ti,dm8148";
13 13
14 memory { 14 memory@80000000 {
15 device_type = "memory"; 15 device_type = "memory";
16 reg = <0x80000000 0x40000000>; /* 1 GB */ 16 reg = <0x80000000 0x40000000>; /* 1 GB */
17 }; 17 };
@@ -27,7 +27,7 @@
27 regulator-always-on; 27 regulator-always-on;
28 }; 28 };
29 29
30 vmmcsd_fixed: fixedregulator@0 { 30 vmmcsd_fixed: fixedregulator0 {
31 compatible = "regulator-fixed"; 31 compatible = "regulator-fixed";
32 regulator-name = "vmmcsd_fixed"; 32 regulator-name = "vmmcsd_fixed";
33 regulator-min-microvolt = <3300000>; 33 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi
index 68e412c9863c..ff90a6ce6bdc 100644
--- a/arch/arm/boot/dts/dm814x.dtsi
+++ b/arch/arm/boot/dts/dm814x.dtsi
@@ -7,11 +7,11 @@
7#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/dm814x.h> 8#include <dt-bindings/pinctrl/dm814x.h>
9 9
10#include "skeleton.dtsi"
11
12/ { 10/ {
13 compatible = "ti,dm814"; 11 compatible = "ti,dm814";
14 interrupt-parent = <&intc>; 12 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 15
16 aliases { 16 aliases {
17 i2c0 = &i2c1; 17 i2c0 = &i2c1;
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index f50348bdd857..0bf55fa72dea 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -12,14 +12,14 @@
12 model = "DM8168 EVM"; 12 model = "DM8168 EVM";
13 compatible = "ti,dm8168-evm", "ti,dm8168"; 13 compatible = "ti,dm8168-evm", "ti,dm8168";
14 14
15 memory { 15 memory@80000000 {
16 device_type = "memory"; 16 device_type = "memory";
17 reg = <0x80000000 0x40000000 /* 1 GB */ 17 reg = <0x80000000 0x40000000 /* 1 GB */
18 0xc0000000 0x40000000>; /* 1 GB */ 18 0xc0000000 0x40000000>; /* 1 GB */
19 }; 19 };
20 20
21 /* FDC6331L controlled by SD_POW pin */ 21 /* FDC6331L controlled by SD_POW pin */
22 vmmcsd_fixed: fixedregulator@0 { 22 vmmcsd_fixed: fixedregulator0 {
23 compatible = "regulator-fixed"; 23 compatible = "regulator-fixed";
24 regulator-name = "vmmcsd_fixed"; 24 regulator-name = "vmmcsd_fixed";
25 regulator-min-microvolt = <3300000>; 25 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index 44e39c743b53..f1e0f771ff29 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -7,11 +7,11 @@
7#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/omap.h> 8#include <dt-bindings/pinctrl/omap.h>
9 9
10#include "skeleton.dtsi"
11
12/ { 10/ {
13 compatible = "ti,dm816"; 11 compatible = "ti,dm816";
14 interrupt-parent = <&intc>; 12 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 15
16 aliases { 16 aliases {
17 i2c0 = &i2c1; 17 i2c0 = &i2c1;
diff --git a/arch/arm/boot/dts/dra62x-j5eco-evm.dts b/arch/arm/boot/dts/dra62x-j5eco-evm.dts
index f820573f4a4a..155eb32ee213 100644
--- a/arch/arm/boot/dts/dra62x-j5eco-evm.dts
+++ b/arch/arm/boot/dts/dra62x-j5eco-evm.dts
@@ -12,13 +12,13 @@
12 model = "DRA62x J5 Eco EVM"; 12 model = "DRA62x J5 Eco EVM";
13 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148"; 13 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148";
14 14
15 memory { 15 memory@80000000 {
16 device_type = "memory"; 16 device_type = "memory";
17 reg = <0x80000000 0x40000000>; /* 1 GB */ 17 reg = <0x80000000 0x40000000>; /* 1 GB */
18 }; 18 };
19 19
20 /* MIC94060YC6 controlled by SD1_POW pin */ 20 /* MIC94060YC6 controlled by SD1_POW pin */
21 vmmcsd_fixed: fixedregulator@0 { 21 vmmcsd_fixed: fixedregulator0 {
22 compatible = "regulator-fixed"; 22 compatible = "regulator-fixed";
23 regulator-name = "vmmcsd_fixed"; 23 regulator-name = "vmmcsd_fixed";
24 regulator-min-microvolt = <3300000>; 24 regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index bafcfac067ec..132f2be10889 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -16,7 +16,7 @@
16 model = "TI DRA742"; 16 model = "TI DRA742";
17 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; 17 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
18 18
19 memory { 19 memory@0 {
20 device_type = "memory"; 20 device_type = "memory";
21 reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */ 21 reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
22 }; 22 };
@@ -105,25 +105,25 @@
105 105
106 leds { 106 leds {
107 compatible = "gpio-leds"; 107 compatible = "gpio-leds";
108 led@0 { 108 led0 {
109 label = "dra7:usr1"; 109 label = "dra7:usr1";
110 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>; 110 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
111 default-state = "off"; 111 default-state = "off";
112 }; 112 };
113 113
114 led@1 { 114 led1 {
115 label = "dra7:usr2"; 115 label = "dra7:usr2";
116 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>; 116 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
117 default-state = "off"; 117 default-state = "off";
118 }; 118 };
119 119
120 led@2 { 120 led2 {
121 label = "dra7:usr3"; 121 label = "dra7:usr3";
122 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>; 122 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
123 default-state = "off"; 123 default-state = "off";
124 }; 124 };
125 125
126 led@3 { 126 led3 {
127 label = "dra7:usr4"; 127 label = "dra7:usr4";
128 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>; 128 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
129 default-state = "off"; 129 default-state = "off";
@@ -664,10 +664,10 @@
664&qspi { 664&qspi {
665 status = "okay"; 665 status = "okay";
666 666
667 spi-max-frequency = <64000000>; 667 spi-max-frequency = <76800000>;
668 m25p80@0 { 668 m25p80@0 {
669 compatible = "s25fl256s1"; 669 compatible = "s25fl256s1";
670 spi-max-frequency = <64000000>; 670 spi-max-frequency = <76800000>;
671 reg = <0>; 671 reg = <0>;
672 spi-tx-bus-width = <1>; 672 spi-tx-bus-width = <1>;
673 spi-rx-bus-width = <4>; 673 spi-rx-bus-width = <4>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d9bfb94a2992..d4fcd68f6349 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -10,8 +10,6 @@
10#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/pinctrl/dra.h> 11#include <dt-bindings/pinctrl/dra.h>
12 12
13#include "skeleton.dtsi"
14
15#define MAX_SOURCES 400 13#define MAX_SOURCES 400
16 14
17/ { 15/ {
@@ -82,9 +80,11 @@
82 compatible = "arm,cortex-a15"; 80 compatible = "arm,cortex-a15";
83 reg = <0>; 81 reg = <0>;
84 82
85 operating-points-v2 = <&cpu0_opp_table>; 83 operating-points = <
86 ti,syscon-efuse = <&scm_wkup 0x20c 0xf80000 19>; 84 /* kHz uV */
87 ti,syscon-rev = <&scm_wkup 0x204>; 85 1000000 1060000
86 1176000 1160000
87 >;
88 88
89 clocks = <&dpll_mpu_ck>; 89 clocks = <&dpll_mpu_ck>;
90 clock-names = "cpu"; 90 clock-names = "cpu";
@@ -98,24 +98,6 @@
98 }; 98 };
99 }; 99 };
100 100
101 cpu0_opp_table: opp_table0 {
102 compatible = "operating-points-v2";
103 opp-shared;
104
105 opp_nom@1000000000 {
106 opp-hz = /bits/ 64 <1000000000>;
107 opp-microvolt = <1060000 850000 1150000>;
108 opp-supported-hw = <0xFF 0x01>;
109 opp-suspend;
110 };
111
112 opp_od@1176000000 {
113 opp-hz = /bits/ 64 <1176000000>;
114 opp-microvolt = <1160000 885000 1160000>;
115 opp-supported-hw = <0xFF 0x02>;
116 };
117 };
118
119 /* 101 /*
120 * The soc node represents the soc top level view. It is used for IPs 102 * The soc node represents the soc top level view. It is used for IPs
121 * that are not memory mapped in the MPU view or for the MPU itself. 103 * that are not memory mapped in the MPU view or for the MPU itself.
@@ -301,6 +283,7 @@
301 0x82000000 0 0x20013000 0x13000 0 0xffed000>; 283 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
302 #interrupt-cells = <1>; 284 #interrupt-cells = <1>;
303 num-lanes = <1>; 285 num-lanes = <1>;
286 linux,pci-domain = <0>;
304 ti,hwmods = "pcie1"; 287 ti,hwmods = "pcie1";
305 phys = <&pcie1_phy>; 288 phys = <&pcie1_phy>;
306 phy-names = "pcie-phy0"; 289 phy-names = "pcie-phy0";
@@ -336,6 +319,7 @@
336 0x82000000 0 0x30013000 0x13000 0 0xffed000>; 319 0x82000000 0 0x30013000 0x13000 0 0xffed000>;
337 #interrupt-cells = <1>; 320 #interrupt-cells = <1>;
338 num-lanes = <1>; 321 num-lanes = <1>;
322 linux,pci-domain = <1>;
339 ti,hwmods = "pcie2"; 323 ti,hwmods = "pcie2";
340 phys = <&pcie2_phy>; 324 phys = <&pcie2_phy>;
341 phy-names = "pcie-phy0"; 325 phy-names = "pcie-phy0";
@@ -1413,7 +1397,7 @@
1413 ti,hwmods = "ocp2scp1"; 1397 ti,hwmods = "ocp2scp1";
1414 1398
1415 usb2_phy1: phy@4a084000 { 1399 usb2_phy1: phy@4a084000 {
1416 compatible = "ti,omap-usb2"; 1400 compatible = "ti,dra7x-usb2", "ti,omap-usb2";
1417 reg = <0x4a084000 0x400>; 1401 reg = <0x4a084000 0x400>;
1418 syscon-phy-power = <&scm_conf 0x300>; 1402 syscon-phy-power = <&scm_conf 0x300>;
1419 clocks = <&usb_phy1_always_on_clk32k>, 1403 clocks = <&usb_phy1_always_on_clk32k>,
@@ -1717,7 +1701,7 @@
1717 mac: ethernet@48484000 { 1701 mac: ethernet@48484000 {
1718 compatible = "ti,dra7-cpsw","ti,cpsw"; 1702 compatible = "ti,dra7-cpsw","ti,cpsw";
1719 ti,hwmods = "gmac"; 1703 ti,hwmods = "gmac";
1720 clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>; 1704 clocks = <&gmac_main_clk>, <&gmac_rft_clk_mux>;
1721 clock-names = "fck", "cpts"; 1705 clock-names = "fck", "cpts";
1722 cpdma_channels = <8>; 1706 cpdma_channels = <8>;
1723 ale_entries = <1024>; 1707 ale_entries = <1024>;
@@ -1726,7 +1710,7 @@
1726 mac_control = <0x20>; 1710 mac_control = <0x20>;
1727 slaves = <2>; 1711 slaves = <2>;
1728 active_slave = <0>; 1712 active_slave = <0>;
1729 cpts_clock_mult = <0x80000000>; 1713 cpts_clock_mult = <0x784CFE14>;
1730 cpts_clock_shift = <29>; 1714 cpts_clock_shift = <29>;
1731 reg = <0x48484000 0x1000 1715 reg = <0x48484000 0x1000
1732 0x48485200 0x2E00>; 1716 0x48485200 0x2E00>;
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index 9d3cf50ca37e..c94d8d64710d 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -681,10 +681,10 @@
681&qspi { 681&qspi {
682 status = "okay"; 682 status = "okay";
683 683
684 spi-max-frequency = <64000000>; 684 spi-max-frequency = <76800000>;
685 m25p80@0 { 685 m25p80@0 {
686 compatible = "s25fl256s1"; 686 compatible = "s25fl256s1";
687 spi-max-frequency = <64000000>; 687 spi-max-frequency = <76800000>;
688 reg = <0>; 688 reg = <0>;
689 spi-tx-bus-width = <1>; 689 spi-tx-bus-width = <1>;
690 spi-rx-bus-width = <4>; 690 spi-rx-bus-width = <4>;
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
index f9cfd3bb4dc2..064b322a7a04 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -11,7 +11,7 @@
11/ { 11/ {
12 model = "TI DRA722 Rev C EVM"; 12 model = "TI DRA722 Rev C EVM";
13 13
14 memory { 14 memory@0 {
15 device_type = "memory"; 15 device_type = "memory";
16 reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ 16 reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
17 }; 17 };
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index cc1d32ca4a8a..e3a9b6985693 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -9,7 +9,7 @@
9/ { 9/ {
10 model = "TI DRA722"; 10 model = "TI DRA722";
11 11
12 memory { 12 memory@0 {
13 device_type = "memory"; 13 device_type = "memory";
14 reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */ 14 reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
15 }; 15 };
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 8987b3e180a1..0a78347e6615 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -17,7 +17,6 @@
17 device_type = "cpu"; 17 device_type = "cpu";
18 compatible = "arm,cortex-a15"; 18 compatible = "arm,cortex-a15";
19 reg = <1>; 19 reg = <1>;
20 operating-points-v2 = <&cpu0_opp_table>;
21 }; 20 };
22 }; 21 };
23 22
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 8378b44ee567..3330738e4c6e 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1003,6 +1003,14 @@
1003 ti,index-power-of-two; 1003 ti,index-power-of-two;
1004 }; 1004 };
1005 1005
1006 gmac_main_clk: gmac_main_clk {
1007 #clock-cells = <0>;
1008 compatible = "fixed-factor-clock";
1009 clocks = <&gmac_250m_dclk_div>;
1010 clock-mult = <1>;
1011 clock-div = <2>;
1012 };
1013
1006 l3init_480m_dclk_div: l3init_480m_dclk_div@1ac { 1014 l3init_480m_dclk_div: l3init_480m_dclk_div@1ac {
1007 #clock-cells = <0>; 1015 #clock-cells = <0>;
1008 compatible = "ti,divider-clock"; 1016 compatible = "ti,divider-clock";
@@ -1718,13 +1726,12 @@
1718 reg = <0x0c00>; 1726 reg = <0x0c00>;
1719 }; 1727 };
1720 1728
1721 gmac_gmii_ref_clk_div: gmac_gmii_ref_clk_div@13d0 { 1729 rmii_50mhz_clk_mux: rmii_50mhz_clk_mux@13d0 {
1722 #clock-cells = <0>; 1730 #clock-cells = <0>;
1723 compatible = "ti,divider-clock"; 1731 compatible = "ti,mux-clock";
1724 clocks = <&dpll_gmac_m2_ck>; 1732 clocks = <&dpll_gmac_h11x2_ck>, <&rmii_clk_ck>;
1725 ti,bit-shift = <24>; 1733 ti,bit-shift = <24>;
1726 reg = <0x13d0>; 1734 reg = <0x13d0>;
1727 ti,dividers = <2>;
1728 }; 1735 };
1729 1736
1730 gmac_rft_clk_mux: gmac_rft_clk_mux@13d0 { 1737 gmac_rft_clk_mux: gmac_rft_clk_mux@13d0 {
diff --git a/arch/arm/boot/dts/efm32gg-dk3750.dts b/arch/arm/boot/dts/efm32gg-dk3750.dts
index 504cf45d3cb8..98fc667d22c7 100644
--- a/arch/arm/boot/dts/efm32gg-dk3750.dts
+++ b/arch/arm/boot/dts/efm32gg-dk3750.dts
@@ -16,7 +16,8 @@
16 bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0"; 16 bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0";
17 }; 17 };
18 18
19 memory { 19 memory@88000000 {
20 device_type = "memory";
20 reg = <0x88000000 0x400000>; 21 reg = <0x88000000 0x400000>;
21 }; 22 };
22 23
@@ -74,7 +75,7 @@
74 status = "ok"; 75 status = "ok";
75 }; 76 };
76 77
77 boardfpga: boardfpga { 78 boardfpga: boardfpga@80000000 {
78 compatible = "efm32board"; 79 compatible = "efm32board";
79 reg = <0x80000000 0x400>; 80 reg = <0x80000000 0x400>;
80 irq-gpios = <&gpio 64 1>; 81 irq-gpios = <&gpio 64 1>;
diff --git a/arch/arm/boot/dts/efm32gg.dtsi b/arch/arm/boot/dts/efm32gg.dtsi
index c747983771c7..b78c57e51ed5 100644
--- a/arch/arm/boot/dts/efm32gg.dtsi
+++ b/arch/arm/boot/dts/efm32gg.dtsi
@@ -4,10 +4,14 @@
4 * Documentation available from 4 * Documentation available from
5 * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf 5 * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
6 */ 6 */
7
7#include "armv7-m.dtsi" 8#include "armv7-m.dtsi"
8#include "dt-bindings/clock/efm32-cmu.h" 9#include "dt-bindings/clock/efm32-cmu.h"
9 10
10/ { 11/ {
12 #address-cells = <1>;
13 #size-cells = <1>;
14
11 aliases { 15 aliases {
12 i2c0 = &i2c0; 16 i2c0 = &i2c0;
13 i2c1 = &i2c1; 17 i2c1 = &i2c1;
diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi
index 130e946f1414..a70819b1b739 100644
--- a/arch/arm/boot/dts/exynos3250-artik5.dtsi
+++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi
@@ -24,7 +24,8 @@
24 stdout-path = &serial_2; 24 stdout-path = &serial_2;
25 }; 25 };
26 26
27 memory { 27 memory@40000000 {
28 device_type = "memory";
28 reg = <0x40000000 0x1ff00000>; 29 reg = <0x40000000 0x1ff00000>;
29 }; 30 };
30 31
diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
index 8c8906266310..66f04f6ba6bb 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -27,7 +27,8 @@
27 i2c7 = &i2c_max77836; 27 i2c7 = &i2c_max77836;
28 }; 28 };
29 29
30 memory { 30 memory@40000000 {
31 device_type = "memory";
31 reg = <0x40000000 0x1ff00000>; 32 reg = <0x40000000 0x1ff00000>;
32 }; 33 };
33 34
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
index 40ea7de44933..ec331169c3d9 100644
--- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -12,58 +12,46 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#define PIN_PULL_NONE 0 15#include <dt-bindings/pinctrl/samsung.h>
16#define PIN_PULL_DOWN 1 16
17#define PIN_PULL_UP 3 17#define PIN_IN(_pin, _pull, _drv) \
18 18 _pin { \
19#define PIN_DRV_LV1 0 19 samsung,pins = #_pin; \
20#define PIN_DRV_LV2 2 20 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
21#define PIN_DRV_LV3 1 21 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
22#define PIN_DRV_LV4 3 22 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
23
24#define PIN_PDN_OUT0 0
25#define PIN_PDN_OUT1 1
26#define PIN_PDN_INPUT 2
27#define PIN_PDN_PREV 3
28
29#define PIN_IN(_pin, _pull, _drv) \
30 _pin { \
31 samsung,pins = #_pin; \
32 samsung,pin-function = <0>; \
33 samsung,pin-pud = <PIN_PULL_ ##_pull>; \
34 samsung,pin-drv = <PIN_DRV_ ##_drv>; \
35 } 23 }
36 24
37#define PIN_OUT(_pin, _drv) \ 25#define PIN_OUT(_pin, _drv) \
38 _pin { \ 26 _pin { \
39 samsung,pins = #_pin; \ 27 samsung,pins = #_pin; \
40 samsung,pin-function = <1>; \ 28 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
41 samsung,pin-pud = <0>; \ 29 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
42 samsung,pin-drv = <PIN_DRV_ ##_drv>; \ 30 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
43 } 31 }
44 32
45#define PIN_OUT_SET(_pin, _val, _drv) \ 33#define PIN_OUT_SET(_pin, _val, _drv) \
46 _pin { \ 34 _pin { \
47 samsung,pins = #_pin; \ 35 samsung,pins = #_pin; \
48 samsung,pin-function = <1>; \ 36 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
49 samsung,pin-pud = <0>; \ 37 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
50 samsung,pin-drv = <PIN_DRV_ ##_drv>; \ 38 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
51 samsung,pin-val = <_val>; \ 39 samsung,pin-val = <_val>; \
52 } 40 }
53 41
54#define PIN_CFG(_pin, _sel, _pull, _drv) \ 42#define PIN_CFG(_pin, _sel, _pull, _drv) \
55 _pin { \ 43 _pin { \
56 samsung,pins = #_pin; \ 44 samsung,pins = #_pin; \
57 samsung,pin-function = <_sel>; \ 45 samsung,pin-function = <_sel>; \
58 samsung,pin-pud = <PIN_PULL_ ##_pull>; \ 46 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
59 samsung,pin-drv = <PIN_DRV_ ##_drv>; \ 47 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
60 } 48 }
61 49
62#define PIN_SLP(_pin, _mode, _pull) \ 50#define PIN_SLP(_pin, _mode, _pull) \
63 _pin { \ 51 _pin { \
64 samsung,pins = #_pin; \ 52 samsung,pins = #_pin; \
65 samsung,pin-con-pdn = <PIN_PDN_ ##_mode>; \ 53 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
66 samsung,pin-pud-pdn = <PIN_PULL_ ##_pull>; \ 54 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
67 } 55 }
68 56
69&pinctrl_0 { 57&pinctrl_0 {
@@ -125,158 +113,158 @@
125 113
126 uart0_data: uart0-data { 114 uart0_data: uart0-data {
127 samsung,pins = "gpa0-0", "gpa0-1"; 115 samsung,pins = "gpa0-0", "gpa0-1";
128 samsung,pin-function = <0x2>; 116 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
129 samsung,pin-pud = <0>; 117 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
130 samsung,pin-drv = <0>; 118 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
131 }; 119 };
132 120
133 uart0_fctl: uart0-fctl { 121 uart0_fctl: uart0-fctl {
134 samsung,pins = "gpa0-2", "gpa0-3"; 122 samsung,pins = "gpa0-2", "gpa0-3";
135 samsung,pin-function = <2>; 123 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
136 samsung,pin-pud = <0>; 124 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
137 samsung,pin-drv = <0>; 125 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
138 }; 126 };
139 127
140 uart1_data: uart1-data { 128 uart1_data: uart1-data {
141 samsung,pins = "gpa0-4", "gpa0-5"; 129 samsung,pins = "gpa0-4", "gpa0-5";
142 samsung,pin-function = <2>; 130 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
143 samsung,pin-pud = <0>; 131 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
144 samsung,pin-drv = <0>; 132 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
145 }; 133 };
146 134
147 uart1_fctl: uart1-fctl { 135 uart1_fctl: uart1-fctl {
148 samsung,pins = "gpa0-6", "gpa0-7"; 136 samsung,pins = "gpa0-6", "gpa0-7";
149 samsung,pin-function = <2>; 137 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
150 samsung,pin-pud = <0>; 138 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
151 samsung,pin-drv = <0>; 139 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
152 }; 140 };
153 141
154 i2c2_bus: i2c2-bus { 142 i2c2_bus: i2c2-bus {
155 samsung,pins = "gpa0-6", "gpa0-7"; 143 samsung,pins = "gpa0-6", "gpa0-7";
156 samsung,pin-function = <3>; 144 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
157 samsung,pin-pud = <3>; 145 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
158 samsung,pin-drv = <0>; 146 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
159 }; 147 };
160 148
161 uart2_data: uart2-data { 149 uart2_data: uart2-data {
162 samsung,pins = "gpa1-0", "gpa1-1"; 150 samsung,pins = "gpa1-0", "gpa1-1";
163 samsung,pin-function = <2>; 151 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
164 samsung,pin-pud = <0>; 152 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
165 samsung,pin-drv = <0>; 153 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
166 }; 154 };
167 155
168 i2c3_bus: i2c3-bus { 156 i2c3_bus: i2c3-bus {
169 samsung,pins = "gpa1-2", "gpa1-3"; 157 samsung,pins = "gpa1-2", "gpa1-3";
170 samsung,pin-function = <3>; 158 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
171 samsung,pin-pud = <3>; 159 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
172 samsung,pin-drv = <0>; 160 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
173 }; 161 };
174 162
175 spi0_bus: spi0-bus { 163 spi0_bus: spi0-bus {
176 samsung,pins = "gpb-0", "gpb-2", "gpb-3"; 164 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
177 samsung,pin-function = <2>; 165 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
178 samsung,pin-pud = <3>; 166 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
179 samsung,pin-drv = <0>; 167 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
180 }; 168 };
181 169
182 i2c4_bus: i2c4-bus { 170 i2c4_bus: i2c4-bus {
183 samsung,pins = "gpb-0", "gpb-1"; 171 samsung,pins = "gpb-0", "gpb-1";
184 samsung,pin-function = <3>; 172 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
185 samsung,pin-pud = <3>; 173 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
186 samsung,pin-drv = <0>; 174 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
187 }; 175 };
188 176
189 spi1_bus: spi1-bus { 177 spi1_bus: spi1-bus {
190 samsung,pins = "gpb-4", "gpb-6", "gpb-7"; 178 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
191 samsung,pin-function = <2>; 179 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
192 samsung,pin-pud = <3>; 180 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
193 samsung,pin-drv = <0>; 181 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
194 }; 182 };
195 183
196 i2c5_bus: i2c5-bus { 184 i2c5_bus: i2c5-bus {
197 samsung,pins = "gpb-2", "gpb-3"; 185 samsung,pins = "gpb-2", "gpb-3";
198 samsung,pin-function = <3>; 186 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
199 samsung,pin-pud = <3>; 187 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
200 samsung,pin-drv = <0>; 188 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
201 }; 189 };
202 190
203 i2s2_bus: i2s2-bus { 191 i2s2_bus: i2s2-bus {
204 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 192 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
205 "gpc1-4"; 193 "gpc1-4";
206 samsung,pin-function = <2>; 194 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
207 samsung,pin-pud = <0>; 195 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
208 samsung,pin-drv = <0>; 196 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
209 }; 197 };
210 198
211 pcm2_bus: pcm2-bus { 199 pcm2_bus: pcm2-bus {
212 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 200 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
213 "gpc1-4"; 201 "gpc1-4";
214 samsung,pin-function = <3>; 202 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
215 samsung,pin-pud = <0>; 203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
216 samsung,pin-drv = <0>; 204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
217 }; 205 };
218 206
219 i2c6_bus: i2c6-bus { 207 i2c6_bus: i2c6-bus {
220 samsung,pins = "gpc1-3", "gpc1-4"; 208 samsung,pins = "gpc1-3", "gpc1-4";
221 samsung,pin-function = <4>; 209 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
222 samsung,pin-pud = <3>; 210 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
223 samsung,pin-drv = <0>; 211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
224 }; 212 };
225 213
226 pwm0_out: pwm0-out { 214 pwm0_out: pwm0-out {
227 samsung,pins = "gpd0-0"; 215 samsung,pins = "gpd0-0";
228 samsung,pin-function = <2>; 216 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
229 samsung,pin-pud = <0>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
230 samsung,pin-drv = <0>; 218 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
231 }; 219 };
232 220
233 pwm1_out: pwm1-out { 221 pwm1_out: pwm1-out {
234 samsung,pins = "gpd0-1"; 222 samsung,pins = "gpd0-1";
235 samsung,pin-function = <2>; 223 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
236 samsung,pin-pud = <0>; 224 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
237 samsung,pin-drv = <0>; 225 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
238 }; 226 };
239 227
240 i2c7_bus: i2c7-bus { 228 i2c7_bus: i2c7-bus {
241 samsung,pins = "gpd0-2", "gpd0-3"; 229 samsung,pins = "gpd0-2", "gpd0-3";
242 samsung,pin-function = <3>; 230 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
243 samsung,pin-pud = <3>; 231 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
244 samsung,pin-drv = <0>; 232 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
245 }; 233 };
246 234
247 pwm2_out: pwm2-out { 235 pwm2_out: pwm2-out {
248 samsung,pins = "gpd0-2"; 236 samsung,pins = "gpd0-2";
249 samsung,pin-function = <2>; 237 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
250 samsung,pin-pud = <0>; 238 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
251 samsung,pin-drv = <0>; 239 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
252 }; 240 };
253 241
254 pwm3_out: pwm3-out { 242 pwm3_out: pwm3-out {
255 samsung,pins = "gpd0-3"; 243 samsung,pins = "gpd0-3";
256 samsung,pin-function = <2>; 244 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
257 samsung,pin-pud = <0>; 245 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
258 samsung,pin-drv = <0>; 246 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
259 }; 247 };
260 248
261 i2c0_bus: i2c0-bus { 249 i2c0_bus: i2c0-bus {
262 samsung,pins = "gpd1-0", "gpd1-1"; 250 samsung,pins = "gpd1-0", "gpd1-1";
263 samsung,pin-function = <2>; 251 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
264 samsung,pin-pud = <3>; 252 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
265 samsung,pin-drv = <0>; 253 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
266 }; 254 };
267 255
268 mipi0_clk: mipi0-clk { 256 mipi0_clk: mipi0-clk {
269 samsung,pins = "gpd1-0", "gpd1-1"; 257 samsung,pins = "gpd1-0", "gpd1-1";
270 samsung,pin-function = <3>; 258 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
271 samsung,pin-pud = <0>; 259 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
272 samsung,pin-drv = <0>; 260 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
273 }; 261 };
274 262
275 i2c1_bus: i2c1-bus { 263 i2c1_bus: i2c1-bus {
276 samsung,pins = "gpd1-2", "gpd1-3"; 264 samsung,pins = "gpd1-2", "gpd1-3";
277 samsung,pin-function = <2>; 265 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
278 samsung,pin-pud = <3>; 266 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
279 samsung,pin-drv = <0>; 267 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
280 }; 268 };
281}; 269};
282 270
@@ -408,164 +396,164 @@
408 396
409 sd0_clk: sd0-clk { 397 sd0_clk: sd0-clk {
410 samsung,pins = "gpk0-0"; 398 samsung,pins = "gpk0-0";
411 samsung,pin-function = <2>; 399 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
412 samsung,pin-pud = <0>; 400 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
413 samsung,pin-drv = <3>; 401 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
414 }; 402 };
415 403
416 sd0_cmd: sd0-cmd { 404 sd0_cmd: sd0-cmd {
417 samsung,pins = "gpk0-1"; 405 samsung,pins = "gpk0-1";
418 samsung,pin-function = <2>; 406 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
419 samsung,pin-pud = <0>; 407 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
420 samsung,pin-drv = <3>; 408 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
421 }; 409 };
422 410
423 sd0_cd: sd0-cd { 411 sd0_cd: sd0-cd {
424 samsung,pins = "gpk0-2"; 412 samsung,pins = "gpk0-2";
425 samsung,pin-function = <2>; 413 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
426 samsung,pin-pud = <3>; 414 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
427 samsung,pin-drv = <3>; 415 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
428 }; 416 };
429 417
430 sd0_rdqs: sd0-rdqs { 418 sd0_rdqs: sd0-rdqs {
431 samsung,pins = "gpk0-7"; 419 samsung,pins = "gpk0-7";
432 samsung,pin-function = <2>; 420 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
433 samsung,pin-pud = <0>; 421 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
434 samsung,pin-drv = <3>; 422 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
435 }; 423 };
436 424
437 sd0_bus1: sd0-bus-width1 { 425 sd0_bus1: sd0-bus-width1 {
438 samsung,pins = "gpk0-3"; 426 samsung,pins = "gpk0-3";
439 samsung,pin-function = <2>; 427 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
440 samsung,pin-pud = <3>; 428 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
441 samsung,pin-drv = <3>; 429 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
442 }; 430 };
443 431
444 sd0_bus4: sd0-bus-width4 { 432 sd0_bus4: sd0-bus-width4 {
445 samsung,pins = "gpk0-4", "gpk0-5", "gpk0-6"; 433 samsung,pins = "gpk0-4", "gpk0-5", "gpk0-6";
446 samsung,pin-function = <2>; 434 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
447 samsung,pin-pud = <3>; 435 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
448 samsung,pin-drv = <3>; 436 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
449 }; 437 };
450 438
451 sd0_bus8: sd0-bus-width8 { 439 sd0_bus8: sd0-bus-width8 {
452 samsung,pins = "gpl0-0", "gpl0-1", "gpl0-2", "gpl0-3"; 440 samsung,pins = "gpl0-0", "gpl0-1", "gpl0-2", "gpl0-3";
453 samsung,pin-function = <2>; 441 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
454 samsung,pin-pud = <3>; 442 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
455 samsung,pin-drv = <3>; 443 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
456 }; 444 };
457 445
458 sd1_clk: sd1-clk { 446 sd1_clk: sd1-clk {
459 samsung,pins = "gpk1-0"; 447 samsung,pins = "gpk1-0";
460 samsung,pin-function = <2>; 448 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
461 samsung,pin-pud = <0>; 449 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
462 samsung,pin-drv = <3>; 450 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
463 }; 451 };
464 452
465 sd1_cmd: sd1-cmd { 453 sd1_cmd: sd1-cmd {
466 samsung,pins = "gpk1-1"; 454 samsung,pins = "gpk1-1";
467 samsung,pin-function = <2>; 455 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
468 samsung,pin-pud = <0>; 456 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
469 samsung,pin-drv = <3>; 457 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
470 }; 458 };
471 459
472 sd1_cd: sd1-cd { 460 sd1_cd: sd1-cd {
473 samsung,pins = "gpk1-2"; 461 samsung,pins = "gpk1-2";
474 samsung,pin-function = <2>; 462 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
475 samsung,pin-pud = <3>; 463 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
476 samsung,pin-drv = <3>; 464 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
477 }; 465 };
478 466
479 sd1_bus1: sd1-bus-width1 { 467 sd1_bus1: sd1-bus-width1 {
480 samsung,pins = "gpk1-3"; 468 samsung,pins = "gpk1-3";
481 samsung,pin-function = <2>; 469 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
482 samsung,pin-pud = <3>; 470 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
483 samsung,pin-drv = <3>; 471 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
484 }; 472 };
485 473
486 sd1_bus4: sd1-bus-width4 { 474 sd1_bus4: sd1-bus-width4 {
487 samsung,pins = "gpk1-4", "gpk1-5", "gpk1-6"; 475 samsung,pins = "gpk1-4", "gpk1-5", "gpk1-6";
488 samsung,pin-function = <2>; 476 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
489 samsung,pin-pud = <3>; 477 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
490 samsung,pin-drv = <3>; 478 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
491 }; 479 };
492 480
493 sd2_clk: sd2-clk { 481 sd2_clk: sd2-clk {
494 samsung,pins = "gpk2-0"; 482 samsung,pins = "gpk2-0";
495 samsung,pin-function = <2>; 483 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
496 samsung,pin-pud = <0>; 484 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
497 samsung,pin-drv = <3>; 485 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
498 }; 486 };
499 487
500 sd2_cmd: sd2-cmd { 488 sd2_cmd: sd2-cmd {
501 samsung,pins = "gpk2-1"; 489 samsung,pins = "gpk2-1";
502 samsung,pin-function = <2>; 490 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
503 samsung,pin-pud = <0>; 491 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
504 samsung,pin-drv = <3>; 492 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
505 }; 493 };
506 494
507 sd2_cd: sd2-cd { 495 sd2_cd: sd2-cd {
508 samsung,pins = "gpk2-2"; 496 samsung,pins = "gpk2-2";
509 samsung,pin-function = <2>; 497 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
510 samsung,pin-pud = <3>; 498 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
511 samsung,pin-drv = <3>; 499 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
512 }; 500 };
513 501
514 sd2_bus1: sd2-bus-width1 { 502 sd2_bus1: sd2-bus-width1 {
515 samsung,pins = "gpk2-3"; 503 samsung,pins = "gpk2-3";
516 samsung,pin-function = <2>; 504 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
517 samsung,pin-pud = <3>; 505 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
518 samsung,pin-drv = <3>; 506 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
519 }; 507 };
520 508
521 sd2_bus4: sd2-bus-width4 { 509 sd2_bus4: sd2-bus-width4 {
522 samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6"; 510 samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6";
523 samsung,pin-function = <2>; 511 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
524 samsung,pin-pud = <3>; 512 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
525 samsung,pin-drv = <3>; 513 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
526 }; 514 };
527 515
528 cam_port_b_io: cam-port-b-io { 516 cam_port_b_io: cam-port-b-io {
529 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", 517 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
530 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", 518 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
531 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1"; 519 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
532 samsung,pin-function = <3>; 520 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
533 samsung,pin-pud = <3>; 521 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
534 samsung,pin-drv = <0>; 522 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
535 }; 523 };
536 524
537 cam_port_b_clk_active: cam-port-b-clk-active { 525 cam_port_b_clk_active: cam-port-b-clk-active {
538 samsung,pins = "gpm2-2"; 526 samsung,pins = "gpm2-2";
539 samsung,pin-function = <3>; 527 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
540 samsung,pin-pud = <0>; 528 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
541 samsung,pin-drv = <3>; 529 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
542 }; 530 };
543 531
544 cam_port_b_clk_idle: cam-port-b-clk-idle { 532 cam_port_b_clk_idle: cam-port-b-clk-idle {
545 samsung,pins = "gpm2-2"; 533 samsung,pins = "gpm2-2";
546 samsung,pin-function = <0>; 534 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
547 samsung,pin-pud = <0>; 535 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
548 samsung,pin-drv = <0>; 536 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
549 }; 537 };
550 538
551 fimc_is_i2c0: fimc-is-i2c0 { 539 fimc_is_i2c0: fimc-is-i2c0 {
552 samsung,pins = "gpm4-0", "gpm4-1"; 540 samsung,pins = "gpm4-0", "gpm4-1";
553 samsung,pin-function = <2>; 541 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
554 samsung,pin-pud = <0>; 542 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
555 samsung,pin-drv = <0>; 543 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
556 }; 544 };
557 545
558 fimc_is_i2c1: fimc-is-i2c1 { 546 fimc_is_i2c1: fimc-is-i2c1 {
559 samsung,pins = "gpm4-2", "gpm4-3"; 547 samsung,pins = "gpm4-2", "gpm4-3";
560 samsung,pin-function = <2>; 548 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
561 samsung,pin-pud = <0>; 549 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
562 samsung,pin-drv = <0>; 550 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
563 }; 551 };
564 552
565 fimc_is_uart: fimc-is-uart { 553 fimc_is_uart: fimc-is-uart {
566 samsung,pins = "gpm3-5", "gpm3-7"; 554 samsung,pins = "gpm3-5", "gpm3-7";
567 samsung,pin-function = <3>; 555 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
568 samsung,pin-pud = <0>; 556 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
569 samsung,pin-drv = <0>; 557 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
570 }; 558 };
571}; 559};
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index a92181368e5b..3967ee5f7752 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -27,7 +27,8 @@
27 i2c7 = &i2c_max77836; 27 i2c7 = &i2c_max77836;
28 }; 28 };
29 29
30 memory { 30 memory@40000000 {
31 device_type = "memory";
31 reg = <0x40000000 0x1ff00000>; 32 reg = <0x40000000 0x1ff00000>;
32 }; 33 };
33 34
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 70e3aceab3a9..e9d2556c0dfd 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -17,7 +17,6 @@
17 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
18 */ 18 */
19 19
20#include "skeleton.dtsi"
21#include "exynos4-cpu-thermal.dtsi" 20#include "exynos4-cpu-thermal.dtsi"
22#include "exynos-syscon-restart.dtsi" 21#include "exynos-syscon-restart.dtsi"
23#include <dt-bindings/clock/exynos3250.h> 22#include <dt-bindings/clock/exynos3250.h>
@@ -25,6 +24,8 @@
25/ { 24/ {
26 compatible = "samsung,exynos3250"; 25 compatible = "samsung,exynos3250";
27 interrupt-parent = <&gic>; 26 interrupt-parent = <&gic>;
27 #address-cells = <1>;
28 #size-cells = <1>;
28 29
29 aliases { 30 aliases {
30 pinctrl0 = &pinctrl_0; 31 pinctrl0 = &pinctrl_0;
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 32f22e12c70b..5f034eb5a5e2 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -21,11 +21,12 @@
21 21
22#include <dt-bindings/clock/exynos4.h> 22#include <dt-bindings/clock/exynos4.h>
23#include <dt-bindings/clock/exynos-audss-clk.h> 23#include <dt-bindings/clock/exynos-audss-clk.h>
24#include "skeleton.dtsi"
25#include "exynos-syscon-restart.dtsi" 24#include "exynos-syscon-restart.dtsi"
26 25
27/ { 26/ {
28 interrupt-parent = <&gic>; 27 interrupt-parent = <&gic>;
28 #address-cells = <1>;
29 #size-cells = <1>;
29 30
30 aliases { 31 aliases {
31 spi0 = &spi_0; 32 spi0 = &spi_0;
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index be2751eebaf8..a2c6a13fe67b 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -24,7 +24,8 @@
24 model = "Insignal Origen evaluation board based on Exynos4210"; 24 model = "Insignal Origen evaluation board based on Exynos4210";
25 compatible = "insignal,origen", "samsung,exynos4210", "samsung,exynos4"; 25 compatible = "insignal,origen", "samsung,exynos4210", "samsung,exynos4";
26 26
27 memory { 27 memory@40000000 {
28 device_type = "memory";
28 reg = <0x40000000 0x10000000 29 reg = <0x40000000 0x10000000
29 0x50000000 0x10000000 30 0x50000000 0x10000000
30 0x60000000 0x10000000 31 0x60000000 0x10000000
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index 9331c6252eff..d9b6d25e4abe 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -14,6 +14,8 @@
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15*/ 15*/
16 16
17#include <dt-bindings/pinctrl/samsung.h>
18
17/ { 19/ {
18 pinctrl@11400000 { 20 pinctrl@11400000 {
19 gpa0: gpa0 { 21 gpa0: gpa0 {
@@ -146,245 +148,245 @@
146 148
147 uart0_data: uart0-data { 149 uart0_data: uart0-data {
148 samsung,pins = "gpa0-0", "gpa0-1"; 150 samsung,pins = "gpa0-0", "gpa0-1";
149 samsung,pin-function = <0x2>; 151 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
150 samsung,pin-pud = <0>; 152 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
151 samsung,pin-drv = <0>; 153 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
152 }; 154 };
153 155
154 uart0_fctl: uart0-fctl { 156 uart0_fctl: uart0-fctl {
155 samsung,pins = "gpa0-2", "gpa0-3"; 157 samsung,pins = "gpa0-2", "gpa0-3";
156 samsung,pin-function = <2>; 158 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
157 samsung,pin-pud = <0>; 159 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
158 samsung,pin-drv = <0>; 160 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
159 }; 161 };
160 162
161 uart1_data: uart1-data { 163 uart1_data: uart1-data {
162 samsung,pins = "gpa0-4", "gpa0-5"; 164 samsung,pins = "gpa0-4", "gpa0-5";
163 samsung,pin-function = <2>; 165 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
164 samsung,pin-pud = <0>; 166 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
165 samsung,pin-drv = <0>; 167 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
166 }; 168 };
167 169
168 uart1_fctl: uart1-fctl { 170 uart1_fctl: uart1-fctl {
169 samsung,pins = "gpa0-6", "gpa0-7"; 171 samsung,pins = "gpa0-6", "gpa0-7";
170 samsung,pin-function = <2>; 172 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
171 samsung,pin-pud = <0>; 173 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
172 samsung,pin-drv = <0>; 174 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
173 }; 175 };
174 176
175 i2c2_bus: i2c2-bus { 177 i2c2_bus: i2c2-bus {
176 samsung,pins = "gpa0-6", "gpa0-7"; 178 samsung,pins = "gpa0-6", "gpa0-7";
177 samsung,pin-function = <3>; 179 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
178 samsung,pin-pud = <3>; 180 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
179 samsung,pin-drv = <0>; 181 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
180 }; 182 };
181 183
182 uart2_data: uart2-data { 184 uart2_data: uart2-data {
183 samsung,pins = "gpa1-0", "gpa1-1"; 185 samsung,pins = "gpa1-0", "gpa1-1";
184 samsung,pin-function = <2>; 186 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
185 samsung,pin-pud = <0>; 187 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
186 samsung,pin-drv = <0>; 188 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
187 }; 189 };
188 190
189 uart2_fctl: uart2-fctl { 191 uart2_fctl: uart2-fctl {
190 samsung,pins = "gpa1-2", "gpa1-3"; 192 samsung,pins = "gpa1-2", "gpa1-3";
191 samsung,pin-function = <2>; 193 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
192 samsung,pin-pud = <0>; 194 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
193 samsung,pin-drv = <0>; 195 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
194 }; 196 };
195 197
196 uart_audio_a: uart-audio-a { 198 uart_audio_a: uart-audio-a {
197 samsung,pins = "gpa1-0", "gpa1-1"; 199 samsung,pins = "gpa1-0", "gpa1-1";
198 samsung,pin-function = <4>; 200 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
199 samsung,pin-pud = <0>; 201 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
200 samsung,pin-drv = <0>; 202 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
201 }; 203 };
202 204
203 i2c3_bus: i2c3-bus { 205 i2c3_bus: i2c3-bus {
204 samsung,pins = "gpa1-2", "gpa1-3"; 206 samsung,pins = "gpa1-2", "gpa1-3";
205 samsung,pin-function = <3>; 207 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
206 samsung,pin-pud = <3>; 208 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
207 samsung,pin-drv = <0>; 209 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
208 }; 210 };
209 211
210 uart3_data: uart3-data { 212 uart3_data: uart3-data {
211 samsung,pins = "gpa1-4", "gpa1-5"; 213 samsung,pins = "gpa1-4", "gpa1-5";
212 samsung,pin-function = <2>; 214 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
213 samsung,pin-pud = <0>; 215 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
214 samsung,pin-drv = <0>; 216 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
215 }; 217 };
216 218
217 uart_audio_b: uart-audio-b { 219 uart_audio_b: uart-audio-b {
218 samsung,pins = "gpa1-4", "gpa1-5"; 220 samsung,pins = "gpa1-4", "gpa1-5";
219 samsung,pin-function = <4>; 221 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
220 samsung,pin-pud = <0>; 222 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
221 samsung,pin-drv = <0>; 223 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
222 }; 224 };
223 225
224 spi0_bus: spi0-bus { 226 spi0_bus: spi0-bus {
225 samsung,pins = "gpb-0", "gpb-2", "gpb-3"; 227 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
226 samsung,pin-function = <2>; 228 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
227 samsung,pin-pud = <3>; 229 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
228 samsung,pin-drv = <0>; 230 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
229 }; 231 };
230 232
231 i2c4_bus: i2c4-bus { 233 i2c4_bus: i2c4-bus {
232 samsung,pins = "gpb-2", "gpb-3"; 234 samsung,pins = "gpb-2", "gpb-3";
233 samsung,pin-function = <3>; 235 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
234 samsung,pin-pud = <3>; 236 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
235 samsung,pin-drv = <0>; 237 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
236 }; 238 };
237 239
238 spi1_bus: spi1-bus { 240 spi1_bus: spi1-bus {
239 samsung,pins = "gpb-4", "gpb-6", "gpb-7"; 241 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
240 samsung,pin-function = <2>; 242 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
241 samsung,pin-pud = <3>; 243 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
242 samsung,pin-drv = <0>; 244 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
243 }; 245 };
244 246
245 i2c5_bus: i2c5-bus { 247 i2c5_bus: i2c5-bus {
246 samsung,pins = "gpb-6", "gpb-7"; 248 samsung,pins = "gpb-6", "gpb-7";
247 samsung,pin-function = <3>; 249 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
248 samsung,pin-pud = <3>; 250 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
249 samsung,pin-drv = <0>; 251 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
250 }; 252 };
251 253
252 i2s1_bus: i2s1-bus { 254 i2s1_bus: i2s1-bus {
253 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 255 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
254 "gpc0-4"; 256 "gpc0-4";
255 samsung,pin-function = <2>; 257 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
256 samsung,pin-pud = <0>; 258 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
257 samsung,pin-drv = <0>; 259 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
258 }; 260 };
259 261
260 pcm1_bus: pcm1-bus { 262 pcm1_bus: pcm1-bus {
261 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 263 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
262 "gpc0-4"; 264 "gpc0-4";
263 samsung,pin-function = <3>; 265 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
264 samsung,pin-pud = <0>; 266 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
265 samsung,pin-drv = <0>; 267 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
266 }; 268 };
267 269
268 ac97_bus: ac97-bus { 270 ac97_bus: ac97-bus {
269 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 271 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
270 "gpc0-4"; 272 "gpc0-4";
271 samsung,pin-function = <4>; 273 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
272 samsung,pin-pud = <0>; 274 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
273 samsung,pin-drv = <0>; 275 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
274 }; 276 };
275 277
276 i2s2_bus: i2s2-bus { 278 i2s2_bus: i2s2-bus {
277 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 279 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
278 "gpc1-4"; 280 "gpc1-4";
279 samsung,pin-function = <2>; 281 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
280 samsung,pin-pud = <0>; 282 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
281 samsung,pin-drv = <0>; 283 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
282 }; 284 };
283 285
284 pcm2_bus: pcm2-bus { 286 pcm2_bus: pcm2-bus {
285 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 287 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
286 "gpc1-4"; 288 "gpc1-4";
287 samsung,pin-function = <3>; 289 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
288 samsung,pin-pud = <0>; 290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
289 samsung,pin-drv = <0>; 291 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
290 }; 292 };
291 293
292 spdif_bus: spdif-bus { 294 spdif_bus: spdif-bus {
293 samsung,pins = "gpc1-0", "gpc1-1"; 295 samsung,pins = "gpc1-0", "gpc1-1";
294 samsung,pin-function = <4>; 296 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
295 samsung,pin-pud = <0>; 297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
296 samsung,pin-drv = <0>; 298 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
297 }; 299 };
298 300
299 i2c6_bus: i2c6-bus { 301 i2c6_bus: i2c6-bus {
300 samsung,pins = "gpc1-3", "gpc1-4"; 302 samsung,pins = "gpc1-3", "gpc1-4";
301 samsung,pin-function = <4>; 303 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
302 samsung,pin-pud = <3>; 304 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
303 samsung,pin-drv = <0>; 305 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
304 }; 306 };
305 307
306 spi2_bus: spi2-bus { 308 spi2_bus: spi2-bus {
307 samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; 309 samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4";
308 samsung,pin-function = <5>; 310 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
309 samsung,pin-pud = <3>; 311 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
310 samsung,pin-drv = <0>; 312 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
311 }; 313 };
312 314
313 i2c7_bus: i2c7-bus { 315 i2c7_bus: i2c7-bus {
314 samsung,pins = "gpd0-2", "gpd0-3"; 316 samsung,pins = "gpd0-2", "gpd0-3";
315 samsung,pin-function = <3>; 317 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
316 samsung,pin-pud = <3>; 318 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
317 samsung,pin-drv = <0>; 319 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
318 }; 320 };
319 321
320 i2c0_bus: i2c0-bus { 322 i2c0_bus: i2c0-bus {
321 samsung,pins = "gpd1-0", "gpd1-1"; 323 samsung,pins = "gpd1-0", "gpd1-1";
322 samsung,pin-function = <2>; 324 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
323 samsung,pin-pud = <3>; 325 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
324 samsung,pin-drv = <0>; 326 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
325 }; 327 };
326 328
327 i2c1_bus: i2c1-bus { 329 i2c1_bus: i2c1-bus {
328 samsung,pins = "gpd1-2", "gpd1-3"; 330 samsung,pins = "gpd1-2", "gpd1-3";
329 samsung,pin-function = <2>; 331 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
330 samsung,pin-pud = <3>; 332 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
331 samsung,pin-drv = <0>; 333 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
332 }; 334 };
333 335
334 pwm0_out: pwm0-out { 336 pwm0_out: pwm0-out {
335 samsung,pins = "gpd0-0"; 337 samsung,pins = "gpd0-0";
336 samsung,pin-function = <2>; 338 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
337 samsung,pin-pud = <0>; 339 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
338 samsung,pin-drv = <0>; 340 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
339 }; 341 };
340 342
341 pwm1_out: pwm1-out { 343 pwm1_out: pwm1-out {
342 samsung,pins = "gpd0-1"; 344 samsung,pins = "gpd0-1";
343 samsung,pin-function = <2>; 345 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
344 samsung,pin-pud = <0>; 346 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
345 samsung,pin-drv = <0>; 347 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
346 }; 348 };
347 349
348 pwm2_out: pwm2-out { 350 pwm2_out: pwm2-out {
349 samsung,pins = "gpd0-2"; 351 samsung,pins = "gpd0-2";
350 samsung,pin-function = <2>; 352 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
351 samsung,pin-pud = <0>; 353 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
352 samsung,pin-drv = <0>; 354 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
353 }; 355 };
354 356
355 pwm3_out: pwm3-out { 357 pwm3_out: pwm3-out {
356 samsung,pins = "gpd0-3"; 358 samsung,pins = "gpd0-3";
357 samsung,pin-function = <2>; 359 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
358 samsung,pin-pud = <0>; 360 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
359 samsung,pin-drv = <0>; 361 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
360 }; 362 };
361 363
362 lcd_ctrl: lcd-ctrl { 364 lcd_ctrl: lcd-ctrl {
363 samsung,pins = "gpd0-0", "gpd0-1"; 365 samsung,pins = "gpd0-0", "gpd0-1";
364 samsung,pin-function = <3>; 366 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
365 samsung,pin-pud = <0>; 367 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
366 samsung,pin-drv = <0>; 368 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
367 }; 369 };
368 370
369 lcd_sync: lcd-sync { 371 lcd_sync: lcd-sync {
370 samsung,pins = "gpf0-0", "gpf0-1"; 372 samsung,pins = "gpf0-0", "gpf0-1";
371 samsung,pin-function = <2>; 373 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
372 samsung,pin-pud = <0>; 374 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
373 samsung,pin-drv = <0>; 375 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
374 }; 376 };
375 377
376 lcd_en: lcd-en { 378 lcd_en: lcd-en {
377 samsung,pins = "gpe3-4"; 379 samsung,pins = "gpe3-4";
378 samsung,pin-function = <2>; 380 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
379 samsung,pin-pud = <0>; 381 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
380 samsung,pin-drv = <0>; 382 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
381 }; 383 };
382 384
383 lcd_clk: lcd-clk { 385 lcd_clk: lcd-clk {
384 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; 386 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
385 samsung,pin-function = <2>; 387 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
386 samsung,pin-pud = <0>; 388 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
387 samsung,pin-drv = <0>; 389 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
388 }; 390 };
389 391
390 lcd_data16: lcd-data-width16 { 392 lcd_data16: lcd-data-width16 {
@@ -392,9 +394,9 @@
392 "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", 394 "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
393 "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7", 395 "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
394 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; 396 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
395 samsung,pin-function = <2>; 397 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
396 samsung,pin-pud = <0>; 398 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
397 samsung,pin-drv = <0>; 399 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
398 }; 400 };
399 401
400 lcd_data18: lcd-data-width18 { 402 lcd_data18: lcd-data-width18 {
@@ -403,9 +405,9 @@
403 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", 405 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
404 "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1", 406 "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
405 "gpf3-2", "gpf3-3"; 407 "gpf3-2", "gpf3-3";
406 samsung,pin-function = <2>; 408 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
407 samsung,pin-pud = <0>; 409 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
408 samsung,pin-drv = <0>; 410 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
409 }; 411 };
410 412
411 lcd_data24: lcd-data-width24 { 413 lcd_data24: lcd-data-width24 {
@@ -415,9 +417,9 @@
415 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", 417 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
416 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", 418 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
417 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; 419 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
418 samsung,pin-function = <2>; 420 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
419 samsung,pin-pud = <0>; 421 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
420 samsung,pin-drv = <0>; 422 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
421 }; 423 };
422 }; 424 };
423 425
@@ -569,263 +571,263 @@
569 571
570 sd0_clk: sd0-clk { 572 sd0_clk: sd0-clk {
571 samsung,pins = "gpk0-0"; 573 samsung,pins = "gpk0-0";
572 samsung,pin-function = <2>; 574 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
573 samsung,pin-pud = <0>; 575 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
574 samsung,pin-drv = <3>; 576 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
575 }; 577 };
576 578
577 sd0_cmd: sd0-cmd { 579 sd0_cmd: sd0-cmd {
578 samsung,pins = "gpk0-1"; 580 samsung,pins = "gpk0-1";
579 samsung,pin-function = <2>; 581 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
580 samsung,pin-pud = <0>; 582 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
581 samsung,pin-drv = <3>; 583 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
582 }; 584 };
583 585
584 sd0_cd: sd0-cd { 586 sd0_cd: sd0-cd {
585 samsung,pins = "gpk0-2"; 587 samsung,pins = "gpk0-2";
586 samsung,pin-function = <2>; 588 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
587 samsung,pin-pud = <3>; 589 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
588 samsung,pin-drv = <3>; 590 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
589 }; 591 };
590 592
591 sd0_bus1: sd0-bus-width1 { 593 sd0_bus1: sd0-bus-width1 {
592 samsung,pins = "gpk0-3"; 594 samsung,pins = "gpk0-3";
593 samsung,pin-function = <2>; 595 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
594 samsung,pin-pud = <3>; 596 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
595 samsung,pin-drv = <3>; 597 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
596 }; 598 };
597 599
598 sd0_bus4: sd0-bus-width4 { 600 sd0_bus4: sd0-bus-width4 {
599 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; 601 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
600 samsung,pin-function = <2>; 602 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
601 samsung,pin-pud = <3>; 603 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
602 samsung,pin-drv = <3>; 604 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
603 }; 605 };
604 606
605 sd0_bus8: sd0-bus-width8 { 607 sd0_bus8: sd0-bus-width8 {
606 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 608 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
607 samsung,pin-function = <3>; 609 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
608 samsung,pin-pud = <3>; 610 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
609 samsung,pin-drv = <3>; 611 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
610 }; 612 };
611 613
612 sd4_clk: sd4-clk { 614 sd4_clk: sd4-clk {
613 samsung,pins = "gpk0-0"; 615 samsung,pins = "gpk0-0";
614 samsung,pin-function = <3>; 616 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
615 samsung,pin-pud = <0>; 617 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
616 samsung,pin-drv = <3>; 618 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
617 }; 619 };
618 620
619 sd4_cmd: sd4-cmd { 621 sd4_cmd: sd4-cmd {
620 samsung,pins = "gpk0-1"; 622 samsung,pins = "gpk0-1";
621 samsung,pin-function = <3>; 623 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
622 samsung,pin-pud = <0>; 624 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
623 samsung,pin-drv = <3>; 625 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
624 }; 626 };
625 627
626 sd4_cd: sd4-cd { 628 sd4_cd: sd4-cd {
627 samsung,pins = "gpk0-2"; 629 samsung,pins = "gpk0-2";
628 samsung,pin-function = <3>; 630 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
629 samsung,pin-pud = <3>; 631 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
630 samsung,pin-drv = <3>; 632 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
631 }; 633 };
632 634
633 sd4_bus1: sd4-bus-width1 { 635 sd4_bus1: sd4-bus-width1 {
634 samsung,pins = "gpk0-3"; 636 samsung,pins = "gpk0-3";
635 samsung,pin-function = <3>; 637 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
636 samsung,pin-pud = <3>; 638 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
637 samsung,pin-drv = <3>; 639 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
638 }; 640 };
639 641
640 sd4_bus4: sd4-bus-width4 { 642 sd4_bus4: sd4-bus-width4 {
641 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; 643 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
642 samsung,pin-function = <3>; 644 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
643 samsung,pin-pud = <3>; 645 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
644 samsung,pin-drv = <3>; 646 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
645 }; 647 };
646 648
647 sd4_bus8: sd4-bus-width8 { 649 sd4_bus8: sd4-bus-width8 {
648 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 650 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
649 samsung,pin-function = <3>; 651 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
650 samsung,pin-pud = <4>; 652 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
651 samsung,pin-drv = <3>; 653 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
652 }; 654 };
653 655
654 sd1_clk: sd1-clk { 656 sd1_clk: sd1-clk {
655 samsung,pins = "gpk1-0"; 657 samsung,pins = "gpk1-0";
656 samsung,pin-function = <2>; 658 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
657 samsung,pin-pud = <0>; 659 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
658 samsung,pin-drv = <3>; 660 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
659 }; 661 };
660 662
661 sd1_cmd: sd1-cmd { 663 sd1_cmd: sd1-cmd {
662 samsung,pins = "gpk1-1"; 664 samsung,pins = "gpk1-1";
663 samsung,pin-function = <2>; 665 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
664 samsung,pin-pud = <0>; 666 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
665 samsung,pin-drv = <3>; 667 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
666 }; 668 };
667 669
668 sd1_cd: sd1-cd { 670 sd1_cd: sd1-cd {
669 samsung,pins = "gpk1-2"; 671 samsung,pins = "gpk1-2";
670 samsung,pin-function = <2>; 672 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
671 samsung,pin-pud = <3>; 673 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
672 samsung,pin-drv = <3>; 674 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
673 }; 675 };
674 676
675 sd1_bus1: sd1-bus-width1 { 677 sd1_bus1: sd1-bus-width1 {
676 samsung,pins = "gpk1-3"; 678 samsung,pins = "gpk1-3";
677 samsung,pin-function = <2>; 679 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
678 samsung,pin-pud = <3>; 680 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
679 samsung,pin-drv = <3>; 681 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
680 }; 682 };
681 683
682 sd1_bus4: sd1-bus-width4 { 684 sd1_bus4: sd1-bus-width4 {
683 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 685 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
684 samsung,pin-function = <2>; 686 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
685 samsung,pin-pud = <3>; 687 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
686 samsung,pin-drv = <3>; 688 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
687 }; 689 };
688 690
689 sd2_clk: sd2-clk { 691 sd2_clk: sd2-clk {
690 samsung,pins = "gpk2-0"; 692 samsung,pins = "gpk2-0";
691 samsung,pin-function = <2>; 693 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
692 samsung,pin-pud = <0>; 694 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
693 samsung,pin-drv = <3>; 695 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
694 }; 696 };
695 697
696 sd2_cmd: sd2-cmd { 698 sd2_cmd: sd2-cmd {
697 samsung,pins = "gpk2-1"; 699 samsung,pins = "gpk2-1";
698 samsung,pin-function = <2>; 700 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
699 samsung,pin-pud = <0>; 701 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
700 samsung,pin-drv = <3>; 702 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
701 }; 703 };
702 704
703 sd2_cd: sd2-cd { 705 sd2_cd: sd2-cd {
704 samsung,pins = "gpk2-2"; 706 samsung,pins = "gpk2-2";
705 samsung,pin-function = <2>; 707 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
706 samsung,pin-pud = <3>; 708 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
707 samsung,pin-drv = <3>; 709 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
708 }; 710 };
709 711
710 sd2_bus1: sd2-bus-width1 { 712 sd2_bus1: sd2-bus-width1 {
711 samsung,pins = "gpk2-3"; 713 samsung,pins = "gpk2-3";
712 samsung,pin-function = <2>; 714 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
713 samsung,pin-pud = <3>; 715 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
714 samsung,pin-drv = <3>; 716 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
715 }; 717 };
716 718
717 sd2_bus4: sd2-bus-width4 { 719 sd2_bus4: sd2-bus-width4 {
718 samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; 720 samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
719 samsung,pin-function = <2>; 721 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
720 samsung,pin-pud = <3>; 722 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
721 samsung,pin-drv = <3>; 723 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
722 }; 724 };
723 725
724 sd2_bus8: sd2-bus-width8 { 726 sd2_bus8: sd2-bus-width8 {
725 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; 727 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
726 samsung,pin-function = <3>; 728 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
727 samsung,pin-pud = <3>; 729 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
728 samsung,pin-drv = <3>; 730 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
729 }; 731 };
730 732
731 sd3_clk: sd3-clk { 733 sd3_clk: sd3-clk {
732 samsung,pins = "gpk3-0"; 734 samsung,pins = "gpk3-0";
733 samsung,pin-function = <2>; 735 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
734 samsung,pin-pud = <0>; 736 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
735 samsung,pin-drv = <3>; 737 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
736 }; 738 };
737 739
738 sd3_cmd: sd3-cmd { 740 sd3_cmd: sd3-cmd {
739 samsung,pins = "gpk3-1"; 741 samsung,pins = "gpk3-1";
740 samsung,pin-function = <2>; 742 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
741 samsung,pin-pud = <0>; 743 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
742 samsung,pin-drv = <3>; 744 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
743 }; 745 };
744 746
745 sd3_cd: sd3-cd { 747 sd3_cd: sd3-cd {
746 samsung,pins = "gpk3-2"; 748 samsung,pins = "gpk3-2";
747 samsung,pin-function = <2>; 749 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
748 samsung,pin-pud = <3>; 750 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
749 samsung,pin-drv = <3>; 751 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
750 }; 752 };
751 753
752 sd3_bus1: sd3-bus-width1 { 754 sd3_bus1: sd3-bus-width1 {
753 samsung,pins = "gpk3-3"; 755 samsung,pins = "gpk3-3";
754 samsung,pin-function = <2>; 756 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
755 samsung,pin-pud = <3>; 757 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
756 samsung,pin-drv = <3>; 758 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
757 }; 759 };
758 760
759 sd3_bus4: sd3-bus-width4 { 761 sd3_bus4: sd3-bus-width4 {
760 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; 762 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
761 samsung,pin-function = <2>; 763 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
762 samsung,pin-pud = <3>; 764 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
763 samsung,pin-drv = <3>; 765 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
764 }; 766 };
765 767
766 eint0: ext-int0 { 768 eint0: ext-int0 {
767 samsung,pins = "gpx0-0"; 769 samsung,pins = "gpx0-0";
768 samsung,pin-function = <0xf>; 770 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
769 samsung,pin-pud = <0>; 771 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
770 samsung,pin-drv = <0>; 772 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
771 }; 773 };
772 774
773 eint8: ext-int8 { 775 eint8: ext-int8 {
774 samsung,pins = "gpx1-0"; 776 samsung,pins = "gpx1-0";
775 samsung,pin-function = <0xf>; 777 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
776 samsung,pin-pud = <0>; 778 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
777 samsung,pin-drv = <0>; 779 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
778 }; 780 };
779 781
780 eint15: ext-int15 { 782 eint15: ext-int15 {
781 samsung,pins = "gpx1-7"; 783 samsung,pins = "gpx1-7";
782 samsung,pin-function = <0xf>; 784 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
783 samsung,pin-pud = <0>; 785 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
784 samsung,pin-drv = <0>; 786 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
785 }; 787 };
786 788
787 eint16: ext-int16 { 789 eint16: ext-int16 {
788 samsung,pins = "gpx2-0"; 790 samsung,pins = "gpx2-0";
789 samsung,pin-function = <0xf>; 791 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
790 samsung,pin-pud = <0>; 792 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
791 samsung,pin-drv = <0>; 793 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
792 }; 794 };
793 795
794 eint31: ext-int31 { 796 eint31: ext-int31 {
795 samsung,pins = "gpx3-7"; 797 samsung,pins = "gpx3-7";
796 samsung,pin-function = <0xf>; 798 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
797 samsung,pin-pud = <0>; 799 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
798 samsung,pin-drv = <0>; 800 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
799 }; 801 };
800 802
801 cam_port_a_io: cam-port-a-io { 803 cam_port_a_io: cam-port-a-io {
802 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", 804 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
803 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", 805 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
804 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; 806 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
805 samsung,pin-function = <2>; 807 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
806 samsung,pin-pud = <0>; 808 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
807 samsung,pin-drv = <0>; 809 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
808 }; 810 };
809 811
810 cam_port_a_clk_active: cam-port-a-clk-active { 812 cam_port_a_clk_active: cam-port-a-clk-active {
811 samsung,pins = "gpj1-3"; 813 samsung,pins = "gpj1-3";
812 samsung,pin-function = <2>; 814 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
813 samsung,pin-pud = <0>; 815 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
814 samsung,pin-drv = <3>; 816 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
815 }; 817 };
816 818
817 cam_port_a_clk_idle: cam-port-a-clk-idle { 819 cam_port_a_clk_idle: cam-port-a-clk-idle {
818 samsung,pins = "gpj1-3"; 820 samsung,pins = "gpj1-3";
819 samsung,pin-function = <0>; 821 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
820 samsung,pin-pud = <1>; 822 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
821 samsung,pin-drv = <0>; 823 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
822 }; 824 };
823 825
824 hdmi_cec: hdmi-cec { 826 hdmi_cec: hdmi-cec {
825 samsung,pins = "gpx3-6"; 827 samsung,pins = "gpx3-6";
826 samsung,pin-function = <3>; 828 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
827 samsung,pin-pud = <0>; 829 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
828 samsung,pin-drv = <0>; 830 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
829 }; 831 };
830 }; 832 };
831 833
@@ -838,17 +840,17 @@
838 i2s0_bus: i2s0-bus { 840 i2s0_bus: i2s0-bus {
839 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", 841 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
840 "gpz-4", "gpz-5", "gpz-6"; 842 "gpz-4", "gpz-5", "gpz-6";
841 samsung,pin-function = <0x2>; 843 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
842 samsung,pin-pud = <0>; 844 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
843 samsung,pin-drv = <0>; 845 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
844 }; 846 };
845 847
846 pcm0_bus: pcm0-bus { 848 pcm0_bus: pcm0-bus {
847 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", 849 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
848 "gpz-4"; 850 "gpz-4";
849 samsung,pin-function = <0x3>; 851 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
850 samsung,pin-pud = <0>; 852 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
851 samsung,pin-drv = <0>; 853 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
852 }; 854 };
853 }; 855 };
854}; 856};
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 847fae3dd1f1..9c98a3724396 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -23,7 +23,8 @@
23 model = "Samsung smdkv310 evaluation board based on Exynos4210"; 23 model = "Samsung smdkv310 evaluation board based on Exynos4210";
24 compatible = "samsung,smdkv310", "samsung,exynos4210", "samsung,exynos4"; 24 compatible = "samsung,smdkv310", "samsung,exynos4210", "samsung,exynos4";
25 25
26 memory { 26 memory@40000000 {
27 device_type = "memory";
27 reg = <0x40000000 0x80000000>; 28 reg = <0x40000000 0x80000000>;
28 }; 29 };
29 30
@@ -136,17 +137,17 @@
136&pinctrl_1 { 137&pinctrl_1 {
137 keypad_rows: keypad-rows { 138 keypad_rows: keypad-rows {
138 samsung,pins = "gpx2-0", "gpx2-1"; 139 samsung,pins = "gpx2-0", "gpx2-1";
139 samsung,pin-function = <3>; 140 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
140 samsung,pin-pud = <3>; 141 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
141 samsung,pin-drv = <0>; 142 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
142 }; 143 };
143 144
144 keypad_cols: keypad-cols { 145 keypad_cols: keypad-cols {
145 samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3", 146 samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
146 "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7"; 147 "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
147 samsung,pin-function = <3>; 148 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
148 samsung,pin-pud = <0>; 149 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
149 samsung,pin-drv = <0>; 150 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
150 }; 151 };
151}; 152};
152 153
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 79d983036560..0ca1b4d355f2 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -20,7 +20,8 @@
20 model = "Samsung Trats based on Exynos4210"; 20 model = "Samsung Trats based on Exynos4210";
21 compatible = "samsung,trats", "samsung,exynos4210", "samsung,exynos4"; 21 compatible = "samsung,trats", "samsung,exynos4210", "samsung,exynos4";
22 22
23 memory { 23 memory@40000000 {
24 device_type = "memory";
24 reg = <0x40000000 0x10000000 25 reg = <0x40000000 0x10000000
25 0x50000000 0x10000000 26 0x50000000 0x10000000
26 0x60000000 0x10000000 27 0x60000000 0x10000000
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 9a75e3effbc9..0c89ea99de54 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -20,7 +20,8 @@
20 model = "Samsung Universal C210 based on Exynos4210 rev0"; 20 model = "Samsung Universal C210 based on Exynos4210 rev0";
21 compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4"; 21 compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4";
22 22
23 memory { 23 memory@40000000 {
24 device_type = "memory";
24 reg = <0x40000000 0x10000000 25 reg = <0x40000000 0x10000000
25 0x50000000 0x10000000>; 26 0x50000000 0x10000000>;
26 }; 27 };
@@ -269,7 +270,7 @@
269}; 270};
270 271
271&hdmi { 272&hdmi {
272 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 273 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
273 pinctrl-names = "default"; 274 pinctrl-names = "default";
274 pinctrl-0 = <&hdmi_hpd>; 275 pinctrl-0 = <&hdmi_hpd>;
275 hdmi-en-supply = <&hdmi_en>; 276 hdmi-en-supply = <&hdmi_en>;
@@ -521,16 +522,16 @@
521&pinctrl_1 { 522&pinctrl_1 {
522 hdmi_hpd: hdmi-hpd { 523 hdmi_hpd: hdmi-hpd {
523 samsung,pins = "gpx3-7"; 524 samsung,pins = "gpx3-7";
524 samsung,pin-pud = <0>; 525 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
525 }; 526 };
526}; 527};
527 528
528&pinctrl_0 { 529&pinctrl_0 {
529 i2c_ddc_bus: i2c-ddc-bus { 530 i2c_ddc_bus: i2c-ddc-bus {
530 samsung,pins = "gpe4-2", "gpe4-3"; 531 samsung,pins = "gpe4-2", "gpe4-3";
531 samsung,pin-function = <2>; 532 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
532 samsung,pin-pud = <3>; 533 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
533 samsung,pin-drv = <0>; 534 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
534 }; 535 };
535}; 536};
536 537
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 58ad48e7b8f7..8aa19ba14436 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -163,26 +163,26 @@
163 163
164/* RSTN signal for eMMC */ 164/* RSTN signal for eMMC */
165&sd1_cd { 165&sd1_cd {
166 samsung,pin-pud = <0>; 166 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
167 samsung,pin-drv = <0>; 167 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
168}; 168};
169 169
170&pinctrl_1 { 170&pinctrl_1 {
171 gpio_power_key: power_key { 171 gpio_power_key: power_key {
172 samsung,pins = "gpx1-3"; 172 samsung,pins = "gpx1-3";
173 samsung,pin-pud = <0>; 173 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
174 }; 174 };
175 175
176 max77686_irq: max77686-irq { 176 max77686_irq: max77686-irq {
177 samsung,pins = "gpx3-2"; 177 samsung,pins = "gpx3-2";
178 samsung,pin-function = <0>; 178 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
179 samsung,pin-pud = <0>; 179 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
180 samsung,pin-drv = <0>; 180 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
181 }; 181 };
182 182
183 hdmi_hpd: hdmi-hpd { 183 hdmi_hpd: hdmi-hpd {
184 samsung,pins = "gpx3-7"; 184 samsung,pins = "gpx3-7";
185 samsung,pin-pud = <1>; 185 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
186 }; 186 };
187}; 187};
188 188
@@ -227,7 +227,7 @@
227}; 227};
228 228
229&hdmi { 229&hdmi {
230 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 230 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
231 pinctrl-names = "default"; 231 pinctrl-names = "default";
232 pinctrl-0 = <&hdmi_hpd>; 232 pinctrl-0 = <&hdmi_hpd>;
233 vdd-supply = <&ldo8_reg>; 233 vdd-supply = <&ldo8_reg>;
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index d73aa6c58fe3..99634c54dca9 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -18,7 +18,8 @@
18 model = "Hardkernel ODROID-U3 board based on Exynos4412"; 18 model = "Hardkernel ODROID-U3 board based on Exynos4412";
19 compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4"; 19 compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4";
20 20
21 memory { 21 memory@40000000 {
22 device_type = "memory";
22 reg = <0x40000000 0x7FF00000>; 23 reg = <0x40000000 0x7FF00000>;
23 }; 24 };
24 25
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 2af235151301..61906b35ea7a 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -18,7 +18,8 @@
18 model = "Hardkernel ODROID-X board based on Exynos4412"; 18 model = "Hardkernel ODROID-X board based on Exynos4412";
19 compatible = "hardkernel,odroid-x", "samsung,exynos4412", "samsung,exynos4"; 19 compatible = "hardkernel,odroid-x", "samsung,exynos4412", "samsung,exynos4";
20 20
21 memory { 21 memory@40000000 {
22 device_type = "memory";
22 reg = <0x40000000 0x3FF00000>; 23 reg = <0x40000000 0x3FF00000>;
23 }; 24 };
24 25
@@ -83,7 +84,7 @@
83&pinctrl_1 { 84&pinctrl_1 {
84 gpio_home_key: home_key { 85 gpio_home_key: home_key {
85 samsung,pins = "gpx2-2"; 86 samsung,pins = "gpx2-2";
86 samsung,pin-pud = <0>; 87 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
87 }; 88 };
88}; 89};
89 90
diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts b/arch/arm/boot/dts/exynos4412-odroidx2.dts
index 3e3584270e00..4d228858f172 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx2.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts
@@ -17,7 +17,8 @@
17 model = "Hardkernel ODROID-X2 board based on Exynos4412"; 17 model = "Hardkernel ODROID-X2 board based on Exynos4412";
18 compatible = "hardkernel,odroid-x2", "samsung,exynos4412", "samsung,exynos4"; 18 compatible = "hardkernel,odroid-x2", "samsung,exynos4412", "samsung,exynos4";
19 19
20 memory { 20 memory@40000000 {
21 device_type = "memory";
21 reg = <0x40000000 0x7FF00000>; 22 reg = <0x40000000 0x7FF00000>;
22 }; 23 };
23}; 24};
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 26a36fed9652..a1ab6f94bb64 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -22,7 +22,8 @@
22 model = "Insignal Origen evaluation board based on Exynos4412"; 22 model = "Insignal Origen evaluation board based on Exynos4412";
23 compatible = "insignal,origen4412", "samsung,exynos4412", "samsung,exynos4"; 23 compatible = "insignal,origen4412", "samsung,exynos4412", "samsung,exynos4";
24 24
25 memory { 25 memory@40000000 {
26 device_type = "memory";
26 reg = <0x40000000 0x40000000>; 27 reg = <0x40000000 0x40000000>;
27 }; 28 };
28 29
@@ -500,16 +501,16 @@
500&pinctrl_1 { 501&pinctrl_1 {
501 keypad_rows: keypad-rows { 502 keypad_rows: keypad-rows {
502 samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; 503 samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";
503 samsung,pin-function = <3>; 504 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
504 samsung,pin-pud = <3>; 505 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
505 samsung,pin-drv = <0>; 506 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
506 }; 507 };
507 508
508 keypad_cols: keypad-cols { 509 keypad_cols: keypad-cols {
509 samsung,pins = "gpx1-0", "gpx1-1"; 510 samsung,pins = "gpx1-0", "gpx1-1";
510 samsung,pin-function = <3>; 511 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
511 samsung,pin-pud = <0>; 512 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
512 samsung,pin-drv = <0>; 513 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
513 }; 514 };
514}; 515};
515 516
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index 231ffbdbf9d0..7fcb43431b59 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -20,7 +20,8 @@
20 model = "Samsung SMDK evaluation board based on Exynos4412"; 20 model = "Samsung SMDK evaluation board based on Exynos4412";
21 compatible = "samsung,smdk4412", "samsung,exynos4412", "samsung,exynos4"; 21 compatible = "samsung,smdk4412", "samsung,exynos4412", "samsung,exynos4";
22 22
23 memory { 23 memory@40000000 {
24 device_type = "memory";
24 reg = <0x40000000 0x40000000>; 25 reg = <0x40000000 0x40000000>;
25 }; 26 };
26 27
@@ -115,17 +116,17 @@
115&pinctrl_1 { 116&pinctrl_1 {
116 keypad_rows: keypad-rows { 117 keypad_rows: keypad-rows {
117 samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; 118 samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";
118 samsung,pin-function = <3>; 119 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
119 samsung,pin-pud = <3>; 120 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
120 samsung,pin-drv = <0>; 121 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
121 }; 122 };
122 123
123 keypad_cols: keypad-cols { 124 keypad_cols: keypad-cols {
124 samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3", 125 samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
125 "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7"; 126 "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
126 samsung,pin-function = <3>; 127 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
127 samsung,pin-pud = <0>; 128 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
128 samsung,pin-drv = <0>; 129 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
129 }; 130 };
130}; 131};
131 132
diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts
index 4840bbdaa9ec..5504398e6e37 100644
--- a/arch/arm/boot/dts/exynos4412-tiny4412.dts
+++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts
@@ -23,7 +23,8 @@
23 stdout-path = &serial_0; 23 stdout-path = &serial_0;
24 }; 24 };
25 25
26 memory { 26 memory@40000000 {
27 device_type = "memory";
27 reg = <0x40000000 0x40000000>; 28 reg = <0x40000000 0x40000000>;
28 }; 29 };
29 30
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 129e973a06a6..41ecd6d465a7 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -30,7 +30,8 @@
30 i2c12 = &i2c_max77693_fuel; 30 i2c12 = &i2c_max77693_fuel;
31 }; 31 };
32 32
33 memory { 33 memory@40000000 {
34 device_type = "memory";
34 reg = <0x40000000 0x40000000>; 35 reg = <0x40000000 0x40000000>;
35 }; 36 };
36 37
diff --git a/arch/arm/boot/dts/exynos4415-pinctrl.dtsi b/arch/arm/boot/dts/exynos4415-pinctrl.dtsi
index 75af9c56123e..76cfd872ead3 100644
--- a/arch/arm/boot/dts/exynos4415-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4415-pinctrl.dtsi
@@ -11,6 +11,8 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12*/ 12*/
13 13
14#include <dt-bindings/pinctrl/samsung.h>
15
14&pinctrl_0 { 16&pinctrl_0 {
15 gpa0: gpa0 { 17 gpa0: gpa0 {
16 gpio-controller; 18 gpio-controller;
@@ -94,180 +96,180 @@
94 96
95 uart0_data: uart0-data { 97 uart0_data: uart0-data {
96 samsung,pins = "gpa0-0", "gpa0-1"; 98 samsung,pins = "gpa0-0", "gpa0-1";
97 samsung,pin-function = <0x2>; 99 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
98 samsung,pin-pud = <0>; 100 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
99 samsung,pin-drv = <0>; 101 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
100 }; 102 };
101 103
102 uart0_fctl: uart0-fctl { 104 uart0_fctl: uart0-fctl {
103 samsung,pins = "gpa0-2", "gpa0-3"; 105 samsung,pins = "gpa0-2", "gpa0-3";
104 samsung,pin-function = <2>; 106 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
105 samsung,pin-pud = <0>; 107 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
106 samsung,pin-drv = <0>; 108 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
107 }; 109 };
108 110
109 uart1_data: uart1-data { 111 uart1_data: uart1-data {
110 samsung,pins = "gpa0-4", "gpa0-5"; 112 samsung,pins = "gpa0-4", "gpa0-5";
111 samsung,pin-function = <2>; 113 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
112 samsung,pin-pud = <0>; 114 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
113 samsung,pin-drv = <0>; 115 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
114 }; 116 };
115 117
116 uart1_fctl: uart1-fctl { 118 uart1_fctl: uart1-fctl {
117 samsung,pins = "gpa0-6", "gpa0-7"; 119 samsung,pins = "gpa0-6", "gpa0-7";
118 samsung,pin-function = <2>; 120 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
119 samsung,pin-pud = <0>; 121 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
120 samsung,pin-drv = <0>; 122 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
121 }; 123 };
122 124
123 uart2_data: uart2-data { 125 uart2_data: uart2-data {
124 samsung,pins = "gpa1-0", "gpa1-1"; 126 samsung,pins = "gpa1-0", "gpa1-1";
125 samsung,pin-function = <2>; 127 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
126 samsung,pin-pud = <0>; 128 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
127 samsung,pin-drv = <0>; 129 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
128 }; 130 };
129 131
130 uart2_fctl: uart2-fctl { 132 uart2_fctl: uart2-fctl {
131 samsung,pins = "gpa1-2", "gpa1-3"; 133 samsung,pins = "gpa1-2", "gpa1-3";
132 samsung,pin-function = <2>; 134 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
133 samsung,pin-pud = <0>; 135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
134 samsung,pin-drv = <0>; 136 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
135 }; 137 };
136 138
137 uart3_data: uart3-data { 139 uart3_data: uart3-data {
138 samsung,pins = "gpa1-4", "gpa1-5"; 140 samsung,pins = "gpa1-4", "gpa1-5";
139 samsung,pin-function = <2>; 141 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
140 samsung,pin-pud = <0>; 142 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
141 samsung,pin-drv = <0>; 143 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
142 }; 144 };
143 145
144 i2c2_bus: i2c2-bus { 146 i2c2_bus: i2c2-bus {
145 samsung,pins = "gpa0-6", "gpa0-7"; 147 samsung,pins = "gpa0-6", "gpa0-7";
146 samsung,pin-function = <3>; 148 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
147 samsung,pin-pud = <3>; 149 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
148 samsung,pin-drv = <0>; 150 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
149 }; 151 };
150 152
151 i2c3_bus: i2c3-bus { 153 i2c3_bus: i2c3-bus {
152 samsung,pins = "gpa1-2", "gpa1-3"; 154 samsung,pins = "gpa1-2", "gpa1-3";
153 samsung,pin-function = <3>; 155 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
154 samsung,pin-pud = <3>; 156 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
155 samsung,pin-drv = <0>; 157 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
156 }; 158 };
157 159
158 spi0_bus: spi0-bus { 160 spi0_bus: spi0-bus {
159 samsung,pins = "gpb-0", "gpb-2", "gpb-3"; 161 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
160 samsung,pin-function = <2>; 162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
161 samsung,pin-pud = <3>; 163 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
162 samsung,pin-drv = <0>; 164 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
163 }; 165 };
164 166
165 i2c4_bus: i2c4-bus { 167 i2c4_bus: i2c4-bus {
166 samsung,pins = "gpb-0", "gpb-1"; 168 samsung,pins = "gpb-0", "gpb-1";
167 samsung,pin-function = <3>; 169 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
168 samsung,pin-pud = <3>; 170 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
169 samsung,pin-drv = <0>; 171 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
170 }; 172 };
171 173
172 spi1_bus: spi1-bus { 174 spi1_bus: spi1-bus {
173 samsung,pins = "gpb-4", "gpb-6", "gpb-7"; 175 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
174 samsung,pin-function = <2>; 176 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
175 samsung,pin-pud = <3>; 177 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
176 samsung,pin-drv = <0>; 178 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
177 }; 179 };
178 180
179 i2c5_bus: i2c5-bus { 181 i2c5_bus: i2c5-bus {
180 samsung,pins = "gpb-2", "gpb-3"; 182 samsung,pins = "gpb-2", "gpb-3";
181 samsung,pin-function = <3>; 183 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
182 samsung,pin-pud = <3>; 184 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
183 samsung,pin-drv = <0>; 185 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
184 }; 186 };
185 187
186 i2s1_bus: i2s1-bus { 188 i2s1_bus: i2s1-bus {
187 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 189 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
188 "gpc0-4"; 190 "gpc0-4";
189 samsung,pin-function = <2>; 191 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
190 samsung,pin-pud = <0>; 192 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
191 samsung,pin-drv = <0>; 193 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
192 }; 194 };
193 195
194 i2s2_bus: i2s2-bus { 196 i2s2_bus: i2s2-bus {
195 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 197 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
196 "gpc1-4"; 198 "gpc1-4";
197 samsung,pin-function = <2>; 199 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
198 samsung,pin-pud = <0>; 200 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
199 samsung,pin-drv = <0>; 201 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
200 }; 202 };
201 203
202 pcm2_bus: pcm2-bus { 204 pcm2_bus: pcm2-bus {
203 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 205 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
204 "gpc1-4"; 206 "gpc1-4";
205 samsung,pin-function = <3>; 207 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
206 samsung,pin-pud = <0>; 208 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
207 samsung,pin-drv = <0>; 209 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
208 }; 210 };
209 211
210 i2c6_bus: i2c6-bus { 212 i2c6_bus: i2c6-bus {
211 samsung,pins = "gpc1-3", "gpc1-4"; 213 samsung,pins = "gpc1-3", "gpc1-4";
212 samsung,pin-function = <4>; 214 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
213 samsung,pin-pud = <3>; 215 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
214 samsung,pin-drv = <0>; 216 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
215 }; 217 };
216 218
217 spi2_bus: spi2-bus { 219 spi2_bus: spi2-bus {
218 samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4"; 220 samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
219 samsung,pin-function = <5>; 221 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
220 samsung,pin-pud = <3>; 222 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
221 samsung,pin-drv = <0>; 223 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
222 }; 224 };
223 225
224 pwm0_out: pwm0-out { 226 pwm0_out: pwm0-out {
225 samsung,pins = "gpd0-0"; 227 samsung,pins = "gpd0-0";
226 samsung,pin-function = <2>; 228 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
227 samsung,pin-pud = <0>; 229 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
228 samsung,pin-drv = <0>; 230 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
229 }; 231 };
230 232
231 pwm1_out: pwm1-out { 233 pwm1_out: pwm1-out {
232 samsung,pins = "gpd0-1"; 234 samsung,pins = "gpd0-1";
233 samsung,pin-function = <2>; 235 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
234 samsung,pin-pud = <0>; 236 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
235 samsung,pin-drv = <0>; 237 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
236 }; 238 };
237 239
238 pwm2_out: pwm2-out { 240 pwm2_out: pwm2-out {
239 samsung,pins = "gpd0-2"; 241 samsung,pins = "gpd0-2";
240 samsung,pin-function = <2>; 242 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
241 samsung,pin-pud = <0>; 243 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
242 samsung,pin-drv = <0>; 244 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
243 }; 245 };
244 246
245 pwm3_out: pwm3-out { 247 pwm3_out: pwm3-out {
246 samsung,pins = "gpd0-3"; 248 samsung,pins = "gpd0-3";
247 samsung,pin-function = <2>; 249 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
248 samsung,pin-pud = <0>; 250 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
249 samsung,pin-drv = <0>; 251 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
250 }; 252 };
251 253
252 i2c7_bus: i2c7-bus { 254 i2c7_bus: i2c7-bus {
253 samsung,pins = "gpd0-2", "gpd0-3"; 255 samsung,pins = "gpd0-2", "gpd0-3";
254 samsung,pin-function = <3>; 256 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
255 samsung,pin-pud = <3>; 257 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
256 samsung,pin-drv = <0>; 258 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
257 }; 259 };
258 260
259 i2c0_bus: i2c0-bus { 261 i2c0_bus: i2c0-bus {
260 samsung,pins = "gpd1-0", "gpd1-1"; 262 samsung,pins = "gpd1-0", "gpd1-1";
261 samsung,pin-function = <2>; 263 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
262 samsung,pin-pud = <3>; 264 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
263 samsung,pin-drv = <0>; 265 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
264 }; 266 };
265 267
266 i2c1_bus: i2c1-bus { 268 i2c1_bus: i2c1-bus {
267 samsung,pins = "gpd1-2", "gpd1-3"; 269 samsung,pins = "gpd1-2", "gpd1-3";
268 samsung,pin-function = <2>; 270 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
269 samsung,pin-pud = <3>; 271 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
270 samsung,pin-drv = <0>; 272 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
271 }; 273 };
272}; 274};
273 275
@@ -392,165 +394,165 @@
392 394
393 sd0_clk: sd0-clk { 395 sd0_clk: sd0-clk {
394 samsung,pins = "gpk0-0"; 396 samsung,pins = "gpk0-0";
395 samsung,pin-function = <2>; 397 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
396 samsung,pin-pud = <0>; 398 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
397 samsung,pin-drv = <3>; 399 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
398 }; 400 };
399 401
400 sd0_cmd: sd0-cmd { 402 sd0_cmd: sd0-cmd {
401 samsung,pins = "gpk0-1"; 403 samsung,pins = "gpk0-1";
402 samsung,pin-function = <2>; 404 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
403 samsung,pin-pud = <0>; 405 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
404 samsung,pin-drv = <3>; 406 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
405 }; 407 };
406 408
407 sd0_cd: sd0-cd { 409 sd0_cd: sd0-cd {
408 samsung,pins = "gpk0-2"; 410 samsung,pins = "gpk0-2";
409 samsung,pin-function = <2>; 411 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
410 samsung,pin-pud = <3>; 412 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
411 samsung,pin-drv = <3>; 413 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
412 }; 414 };
413 415
414 sd0_rdqs: sd0-rdqs { 416 sd0_rdqs: sd0-rdqs {
415 samsung,pins = "gpk0-7"; 417 samsung,pins = "gpk0-7";
416 samsung,pin-function = <2>; 418 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
417 samsung,pin-pud = <0>; 419 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
418 samsung,pin-drv = <3>; 420 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
419 }; 421 };
420 422
421 sd0_bus1: sd0-bus-width1 { 423 sd0_bus1: sd0-bus-width1 {
422 samsung,pins = "gpk0-3"; 424 samsung,pins = "gpk0-3";
423 samsung,pin-function = <2>; 425 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
424 samsung,pin-pud = <3>; 426 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
425 samsung,pin-drv = <3>; 427 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
426 }; 428 };
427 429
428 sd0_bus4: sd0-bus-width4 { 430 sd0_bus4: sd0-bus-width4 {
429 samsung,pins = "gpk0-4", "gpk0-5", "gpk0-6"; 431 samsung,pins = "gpk0-4", "gpk0-5", "gpk0-6";
430 samsung,pin-function = <2>; 432 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
431 samsung,pin-pud = <3>; 433 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
432 samsung,pin-drv = <3>; 434 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
433 }; 435 };
434 436
435 sd0_bus8: sd0-bus-width8 { 437 sd0_bus8: sd0-bus-width8 {
436 samsung,pins = "gpl0-0", "gpl0-1", "gpl0-2", "gpl0-3"; 438 samsung,pins = "gpl0-0", "gpl0-1", "gpl0-2", "gpl0-3";
437 samsung,pin-function = <2>; 439 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
438 samsung,pin-pud = <3>; 440 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
439 samsung,pin-drv = <3>; 441 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
440 }; 442 };
441 443
442 sd1_clk: sd1-clk { 444 sd1_clk: sd1-clk {
443 samsung,pins = "gpk1-0"; 445 samsung,pins = "gpk1-0";
444 samsung,pin-function = <2>; 446 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
445 samsung,pin-pud = <0>; 447 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
446 samsung,pin-drv = <3>; 448 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
447 }; 449 };
448 450
449 sd1_cmd: sd1-cmd { 451 sd1_cmd: sd1-cmd {
450 samsung,pins = "gpk1-1"; 452 samsung,pins = "gpk1-1";
451 samsung,pin-function = <2>; 453 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
452 samsung,pin-pud = <0>; 454 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
453 samsung,pin-drv = <3>; 455 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
454 }; 456 };
455 457
456 sd1_cd: sd1-cd { 458 sd1_cd: sd1-cd {
457 samsung,pins = "gpk1-2"; 459 samsung,pins = "gpk1-2";
458 samsung,pin-function = <2>; 460 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
459 samsung,pin-pud = <3>; 461 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
460 samsung,pin-drv = <3>; 462 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
461 }; 463 };
462 464
463 sd1_bus1: sd1-bus-width1 { 465 sd1_bus1: sd1-bus-width1 {
464 samsung,pins = "gpk1-3"; 466 samsung,pins = "gpk1-3";
465 samsung,pin-function = <2>; 467 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
466 samsung,pin-pud = <3>; 468 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
467 samsung,pin-drv = <3>; 469 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
468 }; 470 };
469 471
470 sd1_bus4: sd1-bus-width4 { 472 sd1_bus4: sd1-bus-width4 {
471 samsung,pins = "gpk1-4", "gpk1-5", "gpk1-6"; 473 samsung,pins = "gpk1-4", "gpk1-5", "gpk1-6";
472 samsung,pin-function = <2>; 474 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
473 samsung,pin-pud = <3>; 475 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
474 samsung,pin-drv = <3>; 476 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
475 }; 477 };
476 478
477 sd2_clk: sd2-clk { 479 sd2_clk: sd2-clk {
478 samsung,pins = "gpk2-0"; 480 samsung,pins = "gpk2-0";
479 samsung,pin-function = <2>; 481 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
480 samsung,pin-pud = <0>; 482 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
481 samsung,pin-drv = <4>; 483 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
482 }; 484 };
483 485
484 sd2_cmd: sd2-cmd { 486 sd2_cmd: sd2-cmd {
485 samsung,pins = "gpk2-1"; 487 samsung,pins = "gpk2-1";
486 samsung,pin-function = <2>; 488 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
487 samsung,pin-pud = <0>; 489 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
488 samsung,pin-drv = <4>; 490 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
489 }; 491 };
490 492
491 sd2_cd: sd2-cd { 493 sd2_cd: sd2-cd {
492 samsung,pins = "gpk2-2"; 494 samsung,pins = "gpk2-2";
493 samsung,pin-function = <2>; 495 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
494 samsung,pin-pud = <3>; 496 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
495 samsung,pin-drv = <3>; 497 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
496 }; 498 };
497 499
498 sd2_bus1: sd2-bus-width1 { 500 sd2_bus1: sd2-bus-width1 {
499 samsung,pins = "gpk2-3"; 501 samsung,pins = "gpk2-3";
500 samsung,pin-function = <2>; 502 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
501 samsung,pin-pud = <3>; 503 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
502 samsung,pin-drv = <4>; 504 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
503 }; 505 };
504 506
505 sd2_bus4: sd2-bus-width4 { 507 sd2_bus4: sd2-bus-width4 {
506 samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6"; 508 samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6";
507 samsung,pin-function = <2>; 509 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
508 samsung,pin-pud = <3>; 510 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
509 samsung,pin-drv = <4>; 511 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
510 }; 512 };
511 513
512 cam_port_b_io: cam-port-b-io { 514 cam_port_b_io: cam-port-b-io {
513 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", 515 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
514 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", 516 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
515 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1"; 517 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
516 samsung,pin-function = <3>; 518 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
517 samsung,pin-pud = <3>; 519 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
518 samsung,pin-drv = <0>; 520 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
519 }; 521 };
520 522
521 cam_port_b_clk_active: cam-port-b-clk-active { 523 cam_port_b_clk_active: cam-port-b-clk-active {
522 samsung,pins = "gpm2-2"; 524 samsung,pins = "gpm2-2";
523 samsung,pin-function = <3>; 525 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
524 samsung,pin-pud = <0>; 526 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
525 samsung,pin-drv = <3>; 527 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
526 }; 528 };
527 529
528 cam_port_b_clk_idle: cam-port-b-clk-idle { 530 cam_port_b_clk_idle: cam-port-b-clk-idle {
529 samsung,pins = "gpm2-2"; 531 samsung,pins = "gpm2-2";
530 samsung,pin-function = <0>; 532 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
531 samsung,pin-pud = <0>; 533 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
532 samsung,pin-drv = <0>; 534 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
533 }; 535 };
534 536
535 fimc_is_i2c0: fimc-is-i2c0 { 537 fimc_is_i2c0: fimc-is-i2c0 {
536 samsung,pins = "gpm4-0", "gpm4-1"; 538 samsung,pins = "gpm4-0", "gpm4-1";
537 samsung,pin-function = <2>; 539 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
538 samsung,pin-pud = <0>; 540 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
539 samsung,pin-drv = <0>; 541 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
540 }; 542 };
541 543
542 fimc_is_i2c1: fimc-is-i2c1 { 544 fimc_is_i2c1: fimc-is-i2c1 {
543 samsung,pins = "gpm4-2", "gpm4-3"; 545 samsung,pins = "gpm4-2", "gpm4-3";
544 samsung,pin-function = <2>; 546 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
545 samsung,pin-pud = <0>; 547 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
546 samsung,pin-drv = <0>; 548 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
547 }; 549 };
548 550
549 fimc_is_uart: fimc-is-uart { 551 fimc_is_uart: fimc-is-uart {
550 samsung,pins = "gpm3-5", "gpm3-7"; 552 samsung,pins = "gpm3-5", "gpm3-7";
551 samsung,pin-function = <3>; 553 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
552 samsung,pin-pud = <0>; 554 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
553 samsung,pin-drv = <0>; 555 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
554 }; 556 };
555}; 557};
556 558
@@ -566,8 +568,8 @@
566 i2s0_bus: i2s0-bus { 568 i2s0_bus: i2s0-bus {
567 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", 569 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
568 "gpz-4", "gpz-5", "gpz-6"; 570 "gpz-4", "gpz-5", "gpz-6";
569 samsung,pin-function = <2>; 571 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
570 samsung,pin-pud = <0>; 572 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
571 samsung,pin-drv = <0>; 573 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
572 }; 574 };
573}; 575};
diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi
index 28b04b6795c9..3c40f8a956dd 100644
--- a/arch/arm/boot/dts/exynos4415.dtsi
+++ b/arch/arm/boot/dts/exynos4415.dtsi
@@ -16,13 +16,14 @@
16 * published by the Free Software Foundation. 16 * published by the Free Software Foundation.
17 */ 17 */
18 18
19#include "skeleton.dtsi"
20#include <dt-bindings/clock/exynos4415.h> 19#include <dt-bindings/clock/exynos4415.h>
21#include <dt-bindings/clock/exynos-audss-clk.h> 20#include <dt-bindings/clock/exynos-audss-clk.h>
22 21
23/ { 22/ {
24 compatible = "samsung,exynos4415"; 23 compatible = "samsung,exynos4415";
25 interrupt-parent = <&gic>; 24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
26 27
27 aliases { 28 aliases {
28 pinctrl0 = &pinctrl_0; 29 pinctrl0 = &pinctrl_0;
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
index 856b29254374..a56bf9b1a412 100644
--- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -12,20 +12,13 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#define PIN_PULL_NONE 0 15#include <dt-bindings/pinctrl/samsung.h>
16#define PIN_PULL_DOWN 1 16
17#define PIN_PULL_UP 3 17#define PIN_SLP(_pin, _mode, _pull) \
18 18 _pin { \
19#define PIN_PDN_OUT0 0 19 samsung,pins = #_pin; \
20#define PIN_PDN_OUT1 1 20 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
21#define PIN_PDN_INPUT 2 21 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
22#define PIN_PDN_PREV 3
23
24#define PIN_SLP(_pin, _mode, _pull) \
25 _pin { \
26 samsung,pins = #_pin; \
27 samsung,pin-con-pdn = <PIN_PDN_ ##_mode>; \
28 samsung,pin-pud-pdn = <PIN_PULL_ ##_pull>; \
29 } 22 }
30 23
31/ { 24/ {
@@ -136,245 +129,245 @@
136 129
137 uart0_data: uart0-data { 130 uart0_data: uart0-data {
138 samsung,pins = "gpa0-0", "gpa0-1"; 131 samsung,pins = "gpa0-0", "gpa0-1";
139 samsung,pin-function = <0x2>; 132 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
140 samsung,pin-pud = <0>; 133 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
141 samsung,pin-drv = <0>; 134 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
142 }; 135 };
143 136
144 uart0_fctl: uart0-fctl { 137 uart0_fctl: uart0-fctl {
145 samsung,pins = "gpa0-2", "gpa0-3"; 138 samsung,pins = "gpa0-2", "gpa0-3";
146 samsung,pin-function = <2>; 139 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
147 samsung,pin-pud = <0>; 140 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
148 samsung,pin-drv = <0>; 141 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
149 }; 142 };
150 143
151 uart1_data: uart1-data { 144 uart1_data: uart1-data {
152 samsung,pins = "gpa0-4", "gpa0-5"; 145 samsung,pins = "gpa0-4", "gpa0-5";
153 samsung,pin-function = <2>; 146 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
154 samsung,pin-pud = <0>; 147 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
155 samsung,pin-drv = <0>; 148 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
156 }; 149 };
157 150
158 uart1_fctl: uart1-fctl { 151 uart1_fctl: uart1-fctl {
159 samsung,pins = "gpa0-6", "gpa0-7"; 152 samsung,pins = "gpa0-6", "gpa0-7";
160 samsung,pin-function = <2>; 153 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
161 samsung,pin-pud = <0>; 154 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
162 samsung,pin-drv = <0>; 155 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
163 }; 156 };
164 157
165 i2c2_bus: i2c2-bus { 158 i2c2_bus: i2c2-bus {
166 samsung,pins = "gpa0-6", "gpa0-7"; 159 samsung,pins = "gpa0-6", "gpa0-7";
167 samsung,pin-function = <3>; 160 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
168 samsung,pin-pud = <3>; 161 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
169 samsung,pin-drv = <0>; 162 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
170 }; 163 };
171 164
172 uart2_data: uart2-data { 165 uart2_data: uart2-data {
173 samsung,pins = "gpa1-0", "gpa1-1"; 166 samsung,pins = "gpa1-0", "gpa1-1";
174 samsung,pin-function = <2>; 167 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
175 samsung,pin-pud = <0>; 168 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
176 samsung,pin-drv = <0>; 169 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
177 }; 170 };
178 171
179 uart2_fctl: uart2-fctl { 172 uart2_fctl: uart2-fctl {
180 samsung,pins = "gpa1-2", "gpa1-3"; 173 samsung,pins = "gpa1-2", "gpa1-3";
181 samsung,pin-function = <2>; 174 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
182 samsung,pin-pud = <0>; 175 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
183 samsung,pin-drv = <0>; 176 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
184 }; 177 };
185 178
186 uart_audio_a: uart-audio-a { 179 uart_audio_a: uart-audio-a {
187 samsung,pins = "gpa1-0", "gpa1-1"; 180 samsung,pins = "gpa1-0", "gpa1-1";
188 samsung,pin-function = <4>; 181 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
189 samsung,pin-pud = <0>; 182 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
190 samsung,pin-drv = <0>; 183 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
191 }; 184 };
192 185
193 i2c3_bus: i2c3-bus { 186 i2c3_bus: i2c3-bus {
194 samsung,pins = "gpa1-2", "gpa1-3"; 187 samsung,pins = "gpa1-2", "gpa1-3";
195 samsung,pin-function = <3>; 188 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
196 samsung,pin-pud = <3>; 189 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
197 samsung,pin-drv = <0>; 190 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
198 }; 191 };
199 192
200 uart3_data: uart3-data { 193 uart3_data: uart3-data {
201 samsung,pins = "gpa1-4", "gpa1-5"; 194 samsung,pins = "gpa1-4", "gpa1-5";
202 samsung,pin-function = <2>; 195 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
203 samsung,pin-pud = <0>; 196 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
204 samsung,pin-drv = <0>; 197 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
205 }; 198 };
206 199
207 uart_audio_b: uart-audio-b { 200 uart_audio_b: uart-audio-b {
208 samsung,pins = "gpa1-4", "gpa1-5"; 201 samsung,pins = "gpa1-4", "gpa1-5";
209 samsung,pin-function = <4>; 202 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
210 samsung,pin-pud = <0>; 203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
211 samsung,pin-drv = <0>; 204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
212 }; 205 };
213 206
214 spi0_bus: spi0-bus { 207 spi0_bus: spi0-bus {
215 samsung,pins = "gpb-0", "gpb-2", "gpb-3"; 208 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
216 samsung,pin-function = <2>; 209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
217 samsung,pin-pud = <3>; 210 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
218 samsung,pin-drv = <0>; 211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
219 }; 212 };
220 213
221 i2c4_bus: i2c4-bus { 214 i2c4_bus: i2c4-bus {
222 samsung,pins = "gpb-0", "gpb-1"; 215 samsung,pins = "gpb-0", "gpb-1";
223 samsung,pin-function = <3>; 216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
224 samsung,pin-pud = <3>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
225 samsung,pin-drv = <0>; 218 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
226 }; 219 };
227 220
228 spi1_bus: spi1-bus { 221 spi1_bus: spi1-bus {
229 samsung,pins = "gpb-4", "gpb-6", "gpb-7"; 222 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
230 samsung,pin-function = <2>; 223 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
231 samsung,pin-pud = <3>; 224 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
232 samsung,pin-drv = <0>; 225 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
233 }; 226 };
234 227
235 i2c5_bus: i2c5-bus { 228 i2c5_bus: i2c5-bus {
236 samsung,pins = "gpb-2", "gpb-3"; 229 samsung,pins = "gpb-2", "gpb-3";
237 samsung,pin-function = <3>; 230 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
238 samsung,pin-pud = <3>; 231 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
239 samsung,pin-drv = <0>; 232 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
240 }; 233 };
241 234
242 i2s1_bus: i2s1-bus { 235 i2s1_bus: i2s1-bus {
243 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 236 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
244 "gpc0-4"; 237 "gpc0-4";
245 samsung,pin-function = <2>; 238 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
246 samsung,pin-pud = <0>; 239 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
247 samsung,pin-drv = <0>; 240 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
248 }; 241 };
249 242
250 pcm1_bus: pcm1-bus { 243 pcm1_bus: pcm1-bus {
251 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 244 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
252 "gpc0-4"; 245 "gpc0-4";
253 samsung,pin-function = <3>; 246 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
254 samsung,pin-pud = <0>; 247 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
255 samsung,pin-drv = <0>; 248 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
256 }; 249 };
257 250
258 ac97_bus: ac97-bus { 251 ac97_bus: ac97-bus {
259 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 252 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
260 "gpc0-4"; 253 "gpc0-4";
261 samsung,pin-function = <4>; 254 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
262 samsung,pin-pud = <0>; 255 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
263 samsung,pin-drv = <0>; 256 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
264 }; 257 };
265 258
266 i2s2_bus: i2s2-bus { 259 i2s2_bus: i2s2-bus {
267 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 260 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
268 "gpc1-4"; 261 "gpc1-4";
269 samsung,pin-function = <2>; 262 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
270 samsung,pin-pud = <0>; 263 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
271 samsung,pin-drv = <0>; 264 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
272 }; 265 };
273 266
274 pcm2_bus: pcm2-bus { 267 pcm2_bus: pcm2-bus {
275 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 268 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
276 "gpc1-4"; 269 "gpc1-4";
277 samsung,pin-function = <3>; 270 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
278 samsung,pin-pud = <0>; 271 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
279 samsung,pin-drv = <0>; 272 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
280 }; 273 };
281 274
282 spdif_bus: spdif-bus { 275 spdif_bus: spdif-bus {
283 samsung,pins = "gpc1-0", "gpc1-1"; 276 samsung,pins = "gpc1-0", "gpc1-1";
284 samsung,pin-function = <4>; 277 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
285 samsung,pin-pud = <0>; 278 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
286 samsung,pin-drv = <0>; 279 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
287 }; 280 };
288 281
289 i2c6_bus: i2c6-bus { 282 i2c6_bus: i2c6-bus {
290 samsung,pins = "gpc1-3", "gpc1-4"; 283 samsung,pins = "gpc1-3", "gpc1-4";
291 samsung,pin-function = <4>; 284 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
292 samsung,pin-pud = <3>; 285 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
293 samsung,pin-drv = <0>; 286 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
294 }; 287 };
295 288
296 spi2_bus: spi2-bus { 289 spi2_bus: spi2-bus {
297 samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4"; 290 samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
298 samsung,pin-function = <5>; 291 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
299 samsung,pin-pud = <3>; 292 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
300 samsung,pin-drv = <0>; 293 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
301 }; 294 };
302 295
303 pwm0_out: pwm0-out { 296 pwm0_out: pwm0-out {
304 samsung,pins = "gpd0-0"; 297 samsung,pins = "gpd0-0";
305 samsung,pin-function = <2>; 298 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
306 samsung,pin-pud = <0>; 299 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
307 samsung,pin-drv = <0>; 300 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
308 }; 301 };
309 302
310 pwm1_out: pwm1-out { 303 pwm1_out: pwm1-out {
311 samsung,pins = "gpd0-1"; 304 samsung,pins = "gpd0-1";
312 samsung,pin-function = <2>; 305 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
313 samsung,pin-pud = <0>; 306 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
314 samsung,pin-drv = <0>; 307 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
315 }; 308 };
316 309
317 lcd_ctrl: lcd-ctrl { 310 lcd_ctrl: lcd-ctrl {
318 samsung,pins = "gpd0-0", "gpd0-1"; 311 samsung,pins = "gpd0-0", "gpd0-1";
319 samsung,pin-function = <3>; 312 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
320 samsung,pin-pud = <0>; 313 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
321 samsung,pin-drv = <0>; 314 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
322 }; 315 };
323 316
324 i2c7_bus: i2c7-bus { 317 i2c7_bus: i2c7-bus {
325 samsung,pins = "gpd0-2", "gpd0-3"; 318 samsung,pins = "gpd0-2", "gpd0-3";
326 samsung,pin-function = <3>; 319 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
327 samsung,pin-pud = <3>; 320 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
328 samsung,pin-drv = <0>; 321 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
329 }; 322 };
330 323
331 pwm2_out: pwm2-out { 324 pwm2_out: pwm2-out {
332 samsung,pins = "gpd0-2"; 325 samsung,pins = "gpd0-2";
333 samsung,pin-function = <2>; 326 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
334 samsung,pin-pud = <0>; 327 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
335 samsung,pin-drv = <0>; 328 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
336 }; 329 };
337 330
338 pwm3_out: pwm3-out { 331 pwm3_out: pwm3-out {
339 samsung,pins = "gpd0-3"; 332 samsung,pins = "gpd0-3";
340 samsung,pin-function = <2>; 333 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
341 samsung,pin-pud = <0>; 334 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
342 samsung,pin-drv = <0>; 335 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
343 }; 336 };
344 337
345 i2c0_bus: i2c0-bus { 338 i2c0_bus: i2c0-bus {
346 samsung,pins = "gpd1-0", "gpd1-1"; 339 samsung,pins = "gpd1-0", "gpd1-1";
347 samsung,pin-function = <2>; 340 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
348 samsung,pin-pud = <3>; 341 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
349 samsung,pin-drv = <0>; 342 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
350 }; 343 };
351 344
352 mipi0_clk: mipi0-clk { 345 mipi0_clk: mipi0-clk {
353 samsung,pins = "gpd1-0", "gpd1-1"; 346 samsung,pins = "gpd1-0", "gpd1-1";
354 samsung,pin-function = <3>; 347 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
355 samsung,pin-pud = <0>; 348 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
356 samsung,pin-drv = <0>; 349 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
357 }; 350 };
358 351
359 i2c1_bus: i2c1-bus { 352 i2c1_bus: i2c1-bus {
360 samsung,pins = "gpd1-2", "gpd1-3"; 353 samsung,pins = "gpd1-2", "gpd1-3";
361 samsung,pin-function = <2>; 354 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
362 samsung,pin-pud = <3>; 355 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
363 samsung,pin-drv = <0>; 356 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
364 }; 357 };
365 358
366 mipi1_clk: mipi1-clk { 359 mipi1_clk: mipi1-clk {
367 samsung,pins = "gpd1-2", "gpd1-3"; 360 samsung,pins = "gpd1-2", "gpd1-3";
368 samsung,pin-function = <3>; 361 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
369 samsung,pin-pud = <0>; 362 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
370 samsung,pin-drv = <0>; 363 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
371 }; 364 };
372 365
373 lcd_clk: lcd-clk { 366 lcd_clk: lcd-clk {
374 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; 367 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
375 samsung,pin-function = <2>; 368 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
376 samsung,pin-pud = <0>; 369 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
377 samsung,pin-drv = <0>; 370 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
378 }; 371 };
379 372
380 lcd_data16: lcd-data-width16 { 373 lcd_data16: lcd-data-width16 {
@@ -382,9 +375,9 @@
382 "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", 375 "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
383 "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7", 376 "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
384 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; 377 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
385 samsung,pin-function = <2>; 378 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
386 samsung,pin-pud = <0>; 379 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
387 samsung,pin-drv = <0>; 380 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
388 }; 381 };
389 382
390 lcd_data18: lcd-data-width18 { 383 lcd_data18: lcd-data-width18 {
@@ -393,9 +386,9 @@
393 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", 386 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
394 "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1", 387 "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
395 "gpf3-2", "gpf3-3"; 388 "gpf3-2", "gpf3-3";
396 samsung,pin-function = <2>; 389 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
397 samsung,pin-pud = <0>; 390 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
398 samsung,pin-drv = <0>; 391 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
399 }; 392 };
400 393
401 lcd_data24: lcd-data-width24 { 394 lcd_data24: lcd-data-width24 {
@@ -405,39 +398,39 @@
405 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", 398 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
406 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", 399 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
407 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; 400 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
408 samsung,pin-function = <2>; 401 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
409 samsung,pin-pud = <0>; 402 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
410 samsung,pin-drv = <0>; 403 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
411 }; 404 };
412 405
413 lcd_ldi: lcd-ldi { 406 lcd_ldi: lcd-ldi {
414 samsung,pins = "gpf3-4"; 407 samsung,pins = "gpf3-4";
415 samsung,pin-function = <2>; 408 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
416 samsung,pin-pud = <0>; 409 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
417 samsung,pin-drv = <0>; 410 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
418 }; 411 };
419 412
420 cam_port_a_io: cam-port-a-io { 413 cam_port_a_io: cam-port-a-io {
421 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", 414 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
422 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", 415 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
423 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; 416 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
424 samsung,pin-function = <2>; 417 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
425 samsung,pin-pud = <0>; 418 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
426 samsung,pin-drv = <0>; 419 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
427 }; 420 };
428 421
429 cam_port_a_clk_active: cam-port-a-clk-active { 422 cam_port_a_clk_active: cam-port-a-clk-active {
430 samsung,pins = "gpj1-3"; 423 samsung,pins = "gpj1-3";
431 samsung,pin-function = <2>; 424 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
432 samsung,pin-pud = <0>; 425 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
433 samsung,pin-drv = <3>; 426 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
434 }; 427 };
435 428
436 cam_port_a_clk_idle: cam-port-a-clk-idle { 429 cam_port_a_clk_idle: cam-port-a-clk-idle {
437 samsung,pins = "gpj1-3"; 430 samsung,pins = "gpj1-3";
438 samsung,pin-function = <0>; 431 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
439 samsung,pin-pud = <1>; 432 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
440 samsung,pin-drv = <0>; 433 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
441 }; 434 };
442 }; 435 };
443 436
@@ -613,284 +606,284 @@
613 606
614 sd0_clk: sd0-clk { 607 sd0_clk: sd0-clk {
615 samsung,pins = "gpk0-0"; 608 samsung,pins = "gpk0-0";
616 samsung,pin-function = <2>; 609 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
617 samsung,pin-pud = <0>; 610 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
618 samsung,pin-drv = <3>; 611 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
619 }; 612 };
620 613
621 sd0_cmd: sd0-cmd { 614 sd0_cmd: sd0-cmd {
622 samsung,pins = "gpk0-1"; 615 samsung,pins = "gpk0-1";
623 samsung,pin-function = <2>; 616 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
624 samsung,pin-pud = <0>; 617 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
625 samsung,pin-drv = <3>; 618 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
626 }; 619 };
627 620
628 sd0_cd: sd0-cd { 621 sd0_cd: sd0-cd {
629 samsung,pins = "gpk0-2"; 622 samsung,pins = "gpk0-2";
630 samsung,pin-function = <2>; 623 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
631 samsung,pin-pud = <3>; 624 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
632 samsung,pin-drv = <3>; 625 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
633 }; 626 };
634 627
635 sd0_bus1: sd0-bus-width1 { 628 sd0_bus1: sd0-bus-width1 {
636 samsung,pins = "gpk0-3"; 629 samsung,pins = "gpk0-3";
637 samsung,pin-function = <2>; 630 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
638 samsung,pin-pud = <3>; 631 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
639 samsung,pin-drv = <3>; 632 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
640 }; 633 };
641 634
642 sd0_bus4: sd0-bus-width4 { 635 sd0_bus4: sd0-bus-width4 {
643 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; 636 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
644 samsung,pin-function = <2>; 637 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
645 samsung,pin-pud = <3>; 638 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
646 samsung,pin-drv = <3>; 639 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
647 }; 640 };
648 641
649 sd0_bus8: sd0-bus-width8 { 642 sd0_bus8: sd0-bus-width8 {
650 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 643 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
651 samsung,pin-function = <3>; 644 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
652 samsung,pin-pud = <3>; 645 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
653 samsung,pin-drv = <3>; 646 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
654 }; 647 };
655 648
656 sd4_clk: sd4-clk { 649 sd4_clk: sd4-clk {
657 samsung,pins = "gpk0-0"; 650 samsung,pins = "gpk0-0";
658 samsung,pin-function = <3>; 651 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
659 samsung,pin-pud = <0>; 652 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
660 samsung,pin-drv = <3>; 653 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
661 }; 654 };
662 655
663 sd4_cmd: sd4-cmd { 656 sd4_cmd: sd4-cmd {
664 samsung,pins = "gpk0-1"; 657 samsung,pins = "gpk0-1";
665 samsung,pin-function = <3>; 658 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
666 samsung,pin-pud = <0>; 659 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
667 samsung,pin-drv = <3>; 660 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
668 }; 661 };
669 662
670 sd4_cd: sd4-cd { 663 sd4_cd: sd4-cd {
671 samsung,pins = "gpk0-2"; 664 samsung,pins = "gpk0-2";
672 samsung,pin-function = <3>; 665 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
673 samsung,pin-pud = <3>; 666 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
674 samsung,pin-drv = <3>; 667 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
675 }; 668 };
676 669
677 sd4_bus1: sd4-bus-width1 { 670 sd4_bus1: sd4-bus-width1 {
678 samsung,pins = "gpk0-3"; 671 samsung,pins = "gpk0-3";
679 samsung,pin-function = <3>; 672 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
680 samsung,pin-pud = <3>; 673 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
681 samsung,pin-drv = <3>; 674 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
682 }; 675 };
683 676
684 sd4_bus4: sd4-bus-width4 { 677 sd4_bus4: sd4-bus-width4 {
685 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; 678 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
686 samsung,pin-function = <3>; 679 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
687 samsung,pin-pud = <3>; 680 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
688 samsung,pin-drv = <3>; 681 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
689 }; 682 };
690 683
691 sd4_bus8: sd4-bus-width8 { 684 sd4_bus8: sd4-bus-width8 {
692 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 685 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
693 samsung,pin-function = <4>; 686 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
694 samsung,pin-pud = <3>; 687 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
695 samsung,pin-drv = <3>; 688 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
696 }; 689 };
697 690
698 sd1_clk: sd1-clk { 691 sd1_clk: sd1-clk {
699 samsung,pins = "gpk1-0"; 692 samsung,pins = "gpk1-0";
700 samsung,pin-function = <2>; 693 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
701 samsung,pin-pud = <0>; 694 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
702 samsung,pin-drv = <3>; 695 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
703 }; 696 };
704 697
705 sd1_cmd: sd1-cmd { 698 sd1_cmd: sd1-cmd {
706 samsung,pins = "gpk1-1"; 699 samsung,pins = "gpk1-1";
707 samsung,pin-function = <2>; 700 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
708 samsung,pin-pud = <0>; 701 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
709 samsung,pin-drv = <3>; 702 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
710 }; 703 };
711 704
712 sd1_cd: sd1-cd { 705 sd1_cd: sd1-cd {
713 samsung,pins = "gpk1-2"; 706 samsung,pins = "gpk1-2";
714 samsung,pin-function = <2>; 707 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
715 samsung,pin-pud = <3>; 708 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
716 samsung,pin-drv = <3>; 709 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
717 }; 710 };
718 711
719 sd1_bus1: sd1-bus-width1 { 712 sd1_bus1: sd1-bus-width1 {
720 samsung,pins = "gpk1-3"; 713 samsung,pins = "gpk1-3";
721 samsung,pin-function = <2>; 714 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
722 samsung,pin-pud = <3>; 715 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
723 samsung,pin-drv = <3>; 716 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
724 }; 717 };
725 718
726 sd1_bus4: sd1-bus-width4 { 719 sd1_bus4: sd1-bus-width4 {
727 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 720 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
728 samsung,pin-function = <2>; 721 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
729 samsung,pin-pud = <3>; 722 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
730 samsung,pin-drv = <3>; 723 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
731 }; 724 };
732 725
733 sd2_clk: sd2-clk { 726 sd2_clk: sd2-clk {
734 samsung,pins = "gpk2-0"; 727 samsung,pins = "gpk2-0";
735 samsung,pin-function = <2>; 728 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
736 samsung,pin-pud = <0>; 729 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
737 samsung,pin-drv = <3>; 730 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
738 }; 731 };
739 732
740 sd2_cmd: sd2-cmd { 733 sd2_cmd: sd2-cmd {
741 samsung,pins = "gpk2-1"; 734 samsung,pins = "gpk2-1";
742 samsung,pin-function = <2>; 735 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
743 samsung,pin-pud = <0>; 736 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
744 samsung,pin-drv = <3>; 737 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
745 }; 738 };
746 739
747 sd2_cd: sd2-cd { 740 sd2_cd: sd2-cd {
748 samsung,pins = "gpk2-2"; 741 samsung,pins = "gpk2-2";
749 samsung,pin-function = <2>; 742 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
750 samsung,pin-pud = <3>; 743 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
751 samsung,pin-drv = <3>; 744 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
752 }; 745 };
753 746
754 sd2_bus1: sd2-bus-width1 { 747 sd2_bus1: sd2-bus-width1 {
755 samsung,pins = "gpk2-3"; 748 samsung,pins = "gpk2-3";
756 samsung,pin-function = <2>; 749 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
757 samsung,pin-pud = <3>; 750 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
758 samsung,pin-drv = <3>; 751 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
759 }; 752 };
760 753
761 sd2_bus4: sd2-bus-width4 { 754 sd2_bus4: sd2-bus-width4 {
762 samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; 755 samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
763 samsung,pin-function = <2>; 756 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
764 samsung,pin-pud = <3>; 757 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
765 samsung,pin-drv = <3>; 758 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
766 }; 759 };
767 760
768 sd2_bus8: sd2-bus-width8 { 761 sd2_bus8: sd2-bus-width8 {
769 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; 762 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
770 samsung,pin-function = <3>; 763 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
771 samsung,pin-pud = <3>; 764 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
772 samsung,pin-drv = <3>; 765 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
773 }; 766 };
774 767
775 sd3_clk: sd3-clk { 768 sd3_clk: sd3-clk {
776 samsung,pins = "gpk3-0"; 769 samsung,pins = "gpk3-0";
777 samsung,pin-function = <2>; 770 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
778 samsung,pin-pud = <0>; 771 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
779 samsung,pin-drv = <3>; 772 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
780 }; 773 };
781 774
782 sd3_cmd: sd3-cmd { 775 sd3_cmd: sd3-cmd {
783 samsung,pins = "gpk3-1"; 776 samsung,pins = "gpk3-1";
784 samsung,pin-function = <2>; 777 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
785 samsung,pin-pud = <0>; 778 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
786 samsung,pin-drv = <3>; 779 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
787 }; 780 };
788 781
789 sd3_cd: sd3-cd { 782 sd3_cd: sd3-cd {
790 samsung,pins = "gpk3-2"; 783 samsung,pins = "gpk3-2";
791 samsung,pin-function = <2>; 784 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
792 samsung,pin-pud = <3>; 785 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
793 samsung,pin-drv = <3>; 786 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
794 }; 787 };
795 788
796 sd3_bus1: sd3-bus-width1 { 789 sd3_bus1: sd3-bus-width1 {
797 samsung,pins = "gpk3-3"; 790 samsung,pins = "gpk3-3";
798 samsung,pin-function = <2>; 791 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
799 samsung,pin-pud = <3>; 792 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
800 samsung,pin-drv = <3>; 793 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
801 }; 794 };
802 795
803 sd3_bus4: sd3-bus-width4 { 796 sd3_bus4: sd3-bus-width4 {
804 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; 797 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
805 samsung,pin-function = <2>; 798 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
806 samsung,pin-pud = <3>; 799 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
807 samsung,pin-drv = <3>; 800 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
808 }; 801 };
809 802
810 cam_port_b_io: cam-port-b-io { 803 cam_port_b_io: cam-port-b-io {
811 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", 804 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
812 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", 805 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
813 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1"; 806 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
814 samsung,pin-function = <3>; 807 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
815 samsung,pin-pud = <3>; 808 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
816 samsung,pin-drv = <0>; 809 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
817 }; 810 };
818 811
819 cam_port_b_clk_active: cam-port-b-clk-active { 812 cam_port_b_clk_active: cam-port-b-clk-active {
820 samsung,pins = "gpm2-2"; 813 samsung,pins = "gpm2-2";
821 samsung,pin-function = <3>; 814 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
822 samsung,pin-pud = <0>; 815 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
823 samsung,pin-drv = <3>; 816 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
824 }; 817 };
825 818
826 cam_port_b_clk_idle: cam-port-b-clk-idle { 819 cam_port_b_clk_idle: cam-port-b-clk-idle {
827 samsung,pins = "gpm2-2"; 820 samsung,pins = "gpm2-2";
828 samsung,pin-function = <0>; 821 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
829 samsung,pin-pud = <1>; 822 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
830 samsung,pin-drv = <0>; 823 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
831 }; 824 };
832 825
833 eint0: ext-int0 { 826 eint0: ext-int0 {
834 samsung,pins = "gpx0-0"; 827 samsung,pins = "gpx0-0";
835 samsung,pin-function = <0xf>; 828 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
836 samsung,pin-pud = <0>; 829 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
837 samsung,pin-drv = <0>; 830 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
838 }; 831 };
839 832
840 eint8: ext-int8 { 833 eint8: ext-int8 {
841 samsung,pins = "gpx1-0"; 834 samsung,pins = "gpx1-0";
842 samsung,pin-function = <0xf>; 835 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
843 samsung,pin-pud = <0>; 836 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
844 samsung,pin-drv = <0>; 837 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
845 }; 838 };
846 839
847 eint15: ext-int15 { 840 eint15: ext-int15 {
848 samsung,pins = "gpx1-7"; 841 samsung,pins = "gpx1-7";
849 samsung,pin-function = <0xf>; 842 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
850 samsung,pin-pud = <0>; 843 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
851 samsung,pin-drv = <0>; 844 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
852 }; 845 };
853 846
854 eint16: ext-int16 { 847 eint16: ext-int16 {
855 samsung,pins = "gpx2-0"; 848 samsung,pins = "gpx2-0";
856 samsung,pin-function = <0xf>; 849 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
857 samsung,pin-pud = <0>; 850 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
858 samsung,pin-drv = <0>; 851 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
859 }; 852 };
860 853
861 eint31: ext-int31 { 854 eint31: ext-int31 {
862 samsung,pins = "gpx3-7"; 855 samsung,pins = "gpx3-7";
863 samsung,pin-function = <0xf>; 856 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
864 samsung,pin-pud = <0>; 857 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
865 samsung,pin-drv = <0>; 858 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
866 }; 859 };
867 860
868 fimc_is_i2c0: fimc-is-i2c0 { 861 fimc_is_i2c0: fimc-is-i2c0 {
869 samsung,pins = "gpm4-0", "gpm4-1"; 862 samsung,pins = "gpm4-0", "gpm4-1";
870 samsung,pin-function = <2>; 863 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
871 samsung,pin-pud = <0>; 864 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
872 samsung,pin-drv = <0>; 865 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
873 }; 866 };
874 867
875 fimc_is_i2c1: fimc-is-i2c1 { 868 fimc_is_i2c1: fimc-is-i2c1 {
876 samsung,pins = "gpm4-2", "gpm4-3"; 869 samsung,pins = "gpm4-2", "gpm4-3";
877 samsung,pin-function = <2>; 870 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
878 samsung,pin-pud = <0>; 871 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
879 samsung,pin-drv = <0>; 872 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
880 }; 873 };
881 874
882 fimc_is_uart: fimc-is-uart { 875 fimc_is_uart: fimc-is-uart {
883 samsung,pins = "gpm3-5", "gpm3-7"; 876 samsung,pins = "gpm3-5", "gpm3-7";
884 samsung,pin-function = <3>; 877 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
885 samsung,pin-pud = <0>; 878 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
886 samsung,pin-drv = <0>; 879 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
887 }; 880 };
888 881
889 hdmi_cec: hdmi-cec { 882 hdmi_cec: hdmi-cec {
890 samsung,pins = "gpx3-6"; 883 samsung,pins = "gpx3-6";
891 samsung,pin-function = <3>; 884 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
892 samsung,pin-pud = <0>; 885 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
893 samsung,pin-drv = <0>; 886 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
894 }; 887 };
895 }; 888 };
896 889
@@ -906,17 +899,17 @@
906 i2s0_bus: i2s0-bus { 899 i2s0_bus: i2s0-bus {
907 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", 900 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
908 "gpz-4", "gpz-5", "gpz-6"; 901 "gpz-4", "gpz-5", "gpz-6";
909 samsung,pin-function = <0x2>; 902 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
910 samsung,pin-pud = <0>; 903 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
911 samsung,pin-drv = <0>; 904 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
912 }; 905 };
913 906
914 pcm0_bus: pcm0-bus { 907 pcm0_bus: pcm0-bus {
915 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", 908 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
916 "gpz-4"; 909 "gpz-4";
917 samsung,pin-function = <0x3>; 910 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
918 samsung,pin-pud = <0>; 911 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
919 samsung,pin-drv = <0>; 912 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
920 }; 913 };
921 }; 914 };
922 915
@@ -971,9 +964,9 @@
971 "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3", 964 "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
972 "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7", 965 "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7",
973 "gpv4-0", "gpv4-1"; 966 "gpv4-0", "gpv4-1";
974 samsung,pin-function = <0x2>; 967 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
975 samsung,pin-pud = <0>; 968 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
976 samsung,pin-drv = <0>; 969 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
977 }; 970 };
978 }; 971 };
979}; 972};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index c452499ae8c9..3394bdcf10ae 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -157,7 +157,9 @@
157 <&clock CLK_MOUT_MPLL_USER_T>, 157 <&clock CLK_MOUT_MPLL_USER_T>,
158 <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>, 158 <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
159 <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>, 159 <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
160 <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>, 160 <&clock CLK_GICISP>, <&clock CLK_MCUCTL_ISP>,
161 <&clock CLK_PWM_ISP>,
162 <&clock CLK_DIV_ISP0>, <&clock CLK_DIV_ISP1>,
161 <&clock CLK_DIV_MCUISP0>, 163 <&clock CLK_DIV_MCUISP0>,
162 <&clock CLK_DIV_MCUISP1>, 164 <&clock CLK_DIV_MCUISP1>,
163 <&clock CLK_UART_ISP_SCLK>, 165 <&clock CLK_UART_ISP_SCLK>,
@@ -167,6 +169,7 @@
167 clock-names = "lite0", "lite1", "ppmuispx", 169 clock-names = "lite0", "lite1", "ppmuispx",
168 "ppmuispmx", "mpll", "isp", 170 "ppmuispmx", "mpll", "isp",
169 "drc", "fd", "mcuisp", 171 "drc", "fd", "mcuisp",
172 "gicisp", "mcuctl_isp", "pwm_isp",
170 "ispdiv0", "ispdiv1", "mcuispdiv0", 173 "ispdiv0", "ispdiv1", "mcuispdiv0",
171 "mcuispdiv1", "uart", "aclk200", 174 "mcuispdiv1", "uart", "aclk200",
172 "div_aclk200", "aclk400mcuisp", 175 "div_aclk200", "aclk400mcuisp",
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index cab91782e20c..8f06609879f5 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -13,11 +13,12 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15 15
16#include "skeleton.dtsi"
17#include "exynos-syscon-restart.dtsi" 16#include "exynos-syscon-restart.dtsi"
18 17
19/ { 18/ {
20 interrupt-parent = <&gic>; 19 interrupt-parent = <&gic>;
20 #address-cells = <1>;
21 #size-cells = <1>;
21 22
22 aliases { 23 aliases {
23 i2c0 = &i2c_0; 24 i2c0 = &i2c_0;
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index ea70603f660d..6098dacd09f1 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -20,7 +20,8 @@
20 model = "Insignal Arndale evaluation board based on EXYNOS5250"; 20 model = "Insignal Arndale evaluation board based on EXYNOS5250";
21 compatible = "insignal,arndale", "samsung,exynos5250", "samsung,exynos5"; 21 compatible = "insignal,arndale", "samsung,exynos5250", "samsung,exynos5";
22 22
23 memory { 23 memory@40000000 {
24 device_type = "memory";
24 reg = <0x40000000 0x80000000>; 25 reg = <0x40000000 0x80000000>;
25 }; 26 };
26 27
@@ -152,7 +153,7 @@
152}; 153};
153 154
154&hdmi { 155&hdmi {
155 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_LOW>; 156 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>;
156 vdd_osc-supply = <&ldo10_reg>; 157 vdd_osc-supply = <&ldo10_reg>;
157 vdd_pll-supply = <&ldo8_reg>; 158 vdd_pll-supply = <&ldo8_reg>;
158 vdd-supply = <&ldo8_reg>; 159 vdd-supply = <&ldo8_reg>;
diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
index 880917e508b2..2f6ab32b5954 100644
--- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
@@ -12,6 +12,8 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#include <dt-bindings/pinctrl/samsung.h>
16
15&pinctrl_0 { 17&pinctrl_0 {
16 gpa0: gpa0 { 18 gpa0: gpa0 {
17 gpio-controller; 19 gpio-controller;
@@ -200,392 +202,392 @@
200 202
201 uart0_data: uart0-data { 203 uart0_data: uart0-data {
202 samsung,pins = "gpa0-0", "gpa0-1"; 204 samsung,pins = "gpa0-0", "gpa0-1";
203 samsung,pin-function = <2>; 205 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
204 samsung,pin-pud = <0>; 206 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
205 samsung,pin-drv = <0>; 207 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
206 }; 208 };
207 209
208 uart0_fctl: uart0-fctl { 210 uart0_fctl: uart0-fctl {
209 samsung,pins = "gpa0-2", "gpa0-3"; 211 samsung,pins = "gpa0-2", "gpa0-3";
210 samsung,pin-function = <2>; 212 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
211 samsung,pin-pud = <0>; 213 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
212 samsung,pin-drv = <0>; 214 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
213 }; 215 };
214 216
215 i2c2_bus: i2c2-bus { 217 i2c2_bus: i2c2-bus {
216 samsung,pins = "gpa0-6", "gpa0-7"; 218 samsung,pins = "gpa0-6", "gpa0-7";
217 samsung,pin-function = <3>; 219 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
218 samsung,pin-pud = <3>; 220 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
219 samsung,pin-drv = <0>; 221 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
220 }; 222 };
221 223
222 i2c2_hs_bus: i2c2-hs-bus { 224 i2c2_hs_bus: i2c2-hs-bus {
223 samsung,pins = "gpa0-6", "gpa0-7"; 225 samsung,pins = "gpa0-6", "gpa0-7";
224 samsung,pin-function = <4>; 226 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
225 samsung,pin-pud = <3>; 227 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
226 samsung,pin-drv = <0>; 228 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
227 }; 229 };
228 230
229 uart2_data: uart2-data { 231 uart2_data: uart2-data {
230 samsung,pins = "gpa1-0", "gpa1-1"; 232 samsung,pins = "gpa1-0", "gpa1-1";
231 samsung,pin-function = <2>; 233 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
232 samsung,pin-pud = <0>; 234 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
233 samsung,pin-drv = <0>; 235 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
234 }; 236 };
235 237
236 uart2_fctl: uart2-fctl { 238 uart2_fctl: uart2-fctl {
237 samsung,pins = "gpa1-2", "gpa1-3"; 239 samsung,pins = "gpa1-2", "gpa1-3";
238 samsung,pin-function = <2>; 240 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
239 samsung,pin-pud = <0>; 241 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
240 samsung,pin-drv = <0>; 242 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
241 }; 243 };
242 244
243 i2c3_bus: i2c3-bus { 245 i2c3_bus: i2c3-bus {
244 samsung,pins = "gpa1-2", "gpa1-3"; 246 samsung,pins = "gpa1-2", "gpa1-3";
245 samsung,pin-function = <3>; 247 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
246 samsung,pin-pud = <3>; 248 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
247 samsung,pin-drv = <0>; 249 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
248 }; 250 };
249 251
250 i2c3_hs_bus: i2c3-hs-bus { 252 i2c3_hs_bus: i2c3-hs-bus {
251 samsung,pins = "gpa1-2", "gpa1-3"; 253 samsung,pins = "gpa1-2", "gpa1-3";
252 samsung,pin-function = <4>; 254 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
253 samsung,pin-pud = <3>; 255 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
254 samsung,pin-drv = <0>; 256 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
255 }; 257 };
256 258
257 uart3_data: uart3-data { 259 uart3_data: uart3-data {
258 samsung,pins = "gpa1-4", "gpa1-4"; 260 samsung,pins = "gpa1-4", "gpa1-4";
259 samsung,pin-function = <2>; 261 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
260 samsung,pin-pud = <0>; 262 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
261 samsung,pin-drv = <0>; 263 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
262 }; 264 };
263 265
264 spi0_bus: spi0-bus { 266 spi0_bus: spi0-bus {
265 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3"; 267 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3";
266 samsung,pin-function = <2>; 268 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
267 samsung,pin-pud = <3>; 269 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
268 samsung,pin-drv = <0>; 270 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
269 }; 271 };
270 272
271 i2c4_bus: i2c4-bus { 273 i2c4_bus: i2c4-bus {
272 samsung,pins = "gpa2-0", "gpa2-1"; 274 samsung,pins = "gpa2-0", "gpa2-1";
273 samsung,pin-function = <3>; 275 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
274 samsung,pin-pud = <3>; 276 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
275 samsung,pin-drv = <0>; 277 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
276 }; 278 };
277 279
278 i2c5_bus: i2c5-bus { 280 i2c5_bus: i2c5-bus {
279 samsung,pins = "gpa2-2", "gpa2-3"; 281 samsung,pins = "gpa2-2", "gpa2-3";
280 samsung,pin-function = <3>; 282 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
281 samsung,pin-pud = <3>; 283 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
282 samsung,pin-drv = <0>; 284 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
283 }; 285 };
284 286
285 spi1_bus: spi1-bus { 287 spi1_bus: spi1-bus {
286 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; 288 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7";
287 samsung,pin-function = <2>; 289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
288 samsung,pin-pud = <3>; 290 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
289 samsung,pin-drv = <0>; 291 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
290 }; 292 };
291 293
292 i2s1_bus: i2s1-bus { 294 i2s1_bus: i2s1-bus {
293 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", 295 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
294 "gpb0-4"; 296 "gpb0-4";
295 samsung,pin-function = <2>; 297 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
296 samsung,pin-pud = <0>; 298 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
297 samsung,pin-drv = <0>; 299 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
298 }; 300 };
299 301
300 pcm1_bus: pcm1-bus { 302 pcm1_bus: pcm1-bus {
301 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", 303 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
302 "gpb0-4"; 304 "gpb0-4";
303 samsung,pin-function = <3>; 305 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
304 samsung,pin-pud = <0>; 306 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
305 samsung,pin-drv = <0>; 307 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
306 }; 308 };
307 309
308 ac97_bus: ac97-bus { 310 ac97_bus: ac97-bus {
309 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", 311 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
310 "gpb0-4"; 312 "gpb0-4";
311 samsung,pin-function = <4>; 313 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
312 samsung,pin-pud = <0>; 314 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
313 samsung,pin-drv = <0>; 315 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
314 }; 316 };
315 317
316 i2s2_bus: i2s2-bus { 318 i2s2_bus: i2s2-bus {
317 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", 319 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3",
318 "gpb1-4"; 320 "gpb1-4";
319 samsung,pin-function = <2>; 321 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
320 samsung,pin-pud = <0>; 322 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
321 samsung,pin-drv = <0>; 323 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
322 }; 324 };
323 325
324 pcm2_bus: pcm2-bus { 326 pcm2_bus: pcm2-bus {
325 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", 327 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3",
326 "gpb1-4"; 328 "gpb1-4";
327 samsung,pin-function = <3>; 329 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
328 samsung,pin-pud = <0>; 330 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
329 samsung,pin-drv = <0>; 331 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
330 }; 332 };
331 333
332 spdif_bus: spdif-bus { 334 spdif_bus: spdif-bus {
333 samsung,pins = "gpb1-0", "gpb1-1"; 335 samsung,pins = "gpb1-0", "gpb1-1";
334 samsung,pin-function = <4>; 336 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
335 samsung,pin-pud = <0>; 337 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
336 samsung,pin-drv = <0>; 338 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
337 }; 339 };
338 340
339 spi2_bus: spi2-bus { 341 spi2_bus: spi2-bus {
340 samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; 342 samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4";
341 samsung,pin-function = <5>; 343 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
342 samsung,pin-pud = <3>; 344 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
343 samsung,pin-drv = <0>; 345 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
344 }; 346 };
345 347
346 i2c6_bus: i2c6-bus { 348 i2c6_bus: i2c6-bus {
347 samsung,pins = "gpb1-3", "gpb1-4"; 349 samsung,pins = "gpb1-3", "gpb1-4";
348 samsung,pin-function = <4>; 350 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
349 samsung,pin-pud = <3>; 351 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
350 samsung,pin-drv = <0>; 352 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
351 }; 353 };
352 354
353 pwm0_out: pwm0-out { 355 pwm0_out: pwm0-out {
354 samsung,pins = "gpb2-0"; 356 samsung,pins = "gpb2-0";
355 samsung,pin-function = <2>; 357 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
356 samsung,pin-pud = <0>; 358 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
357 samsung,pin-drv = <0>; 359 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
358 }; 360 };
359 361
360 pwm1_out: pwm1-out { 362 pwm1_out: pwm1-out {
361 samsung,pins = "gpb2-1"; 363 samsung,pins = "gpb2-1";
362 samsung,pin-function = <2>; 364 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
363 samsung,pin-pud = <0>; 365 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
364 samsung,pin-drv = <0>; 366 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
365 }; 367 };
366 368
367 pwm2_out: pwm2-out { 369 pwm2_out: pwm2-out {
368 samsung,pins = "gpb2-2"; 370 samsung,pins = "gpb2-2";
369 samsung,pin-function = <2>; 371 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
370 samsung,pin-pud = <0>; 372 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
371 samsung,pin-drv = <0>; 373 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
372 }; 374 };
373 375
374 pwm3_out: pwm3-out { 376 pwm3_out: pwm3-out {
375 samsung,pins = "gpb2-3"; 377 samsung,pins = "gpb2-3";
376 samsung,pin-function = <2>; 378 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
377 samsung,pin-pud = <0>; 379 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
378 samsung,pin-drv = <0>; 380 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
379 }; 381 };
380 382
381 i2c7_bus: i2c7-bus { 383 i2c7_bus: i2c7-bus {
382 samsung,pins = "gpb2-2", "gpb2-3"; 384 samsung,pins = "gpb2-2", "gpb2-3";
383 samsung,pin-function = <3>; 385 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
384 samsung,pin-pud = <3>; 386 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
385 samsung,pin-drv = <0>; 387 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
386 }; 388 };
387 389
388 i2c0_bus: i2c0-bus { 390 i2c0_bus: i2c0-bus {
389 samsung,pins = "gpb3-0", "gpb3-1"; 391 samsung,pins = "gpb3-0", "gpb3-1";
390 samsung,pin-function = <2>; 392 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
391 samsung,pin-pud = <3>; 393 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
392 samsung,pin-drv = <0>; 394 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
393 }; 395 };
394 396
395 i2c1_bus: i2c1-bus { 397 i2c1_bus: i2c1-bus {
396 samsung,pins = "gpb3-2", "gpb3-3"; 398 samsung,pins = "gpb3-2", "gpb3-3";
397 samsung,pin-function = <2>; 399 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
398 samsung,pin-pud = <3>; 400 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
399 samsung,pin-drv = <0>; 401 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
400 }; 402 };
401 403
402 i2c0_hs_bus: i2c0-hs-bus { 404 i2c0_hs_bus: i2c0-hs-bus {
403 samsung,pins = "gpb3-0", "gpb3-1"; 405 samsung,pins = "gpb3-0", "gpb3-1";
404 samsung,pin-function = <4>; 406 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
405 samsung,pin-pud = <3>; 407 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
406 samsung,pin-drv = <0>; 408 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
407 }; 409 };
408 410
409 i2c1_hs_bus: i2c1-hs-bus { 411 i2c1_hs_bus: i2c1-hs-bus {
410 samsung,pins = "gpb3-2", "gpb3-3"; 412 samsung,pins = "gpb3-2", "gpb3-3";
411 samsung,pin-function = <4>; 413 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
412 samsung,pin-pud = <3>; 414 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
413 samsung,pin-drv = <0>; 415 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
414 }; 416 };
415 417
416 sd0_clk: sd0-clk { 418 sd0_clk: sd0-clk {
417 samsung,pins = "gpc0-0"; 419 samsung,pins = "gpc0-0";
418 samsung,pin-function = <2>; 420 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
419 samsung,pin-pud = <0>; 421 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
420 samsung,pin-drv = <3>; 422 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
421 }; 423 };
422 424
423 sd0_cmd: sd0-cmd { 425 sd0_cmd: sd0-cmd {
424 samsung,pins = "gpc0-1"; 426 samsung,pins = "gpc0-1";
425 samsung,pin-function = <2>; 427 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
426 samsung,pin-pud = <0>; 428 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
427 samsung,pin-drv = <3>; 429 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
428 }; 430 };
429 431
430 sd0_cd: sd0-cd { 432 sd0_cd: sd0-cd {
431 samsung,pins = "gpc0-2"; 433 samsung,pins = "gpc0-2";
432 samsung,pin-function = <2>; 434 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
433 samsung,pin-pud = <3>; 435 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
434 samsung,pin-drv = <3>; 436 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
435 }; 437 };
436 438
437 sd0_bus1: sd0-bus-width1 { 439 sd0_bus1: sd0-bus-width1 {
438 samsung,pins = "gpc0-3"; 440 samsung,pins = "gpc0-3";
439 samsung,pin-function = <2>; 441 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
440 samsung,pin-pud = <3>; 442 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
441 samsung,pin-drv = <3>; 443 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
442 }; 444 };
443 445
444 sd0_bus4: sd0-bus-width4 { 446 sd0_bus4: sd0-bus-width4 {
445 samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; 447 samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6";
446 samsung,pin-function = <2>; 448 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
447 samsung,pin-pud = <3>; 449 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
448 samsung,pin-drv = <3>; 450 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
449 }; 451 };
450 452
451 sd0_bus8: sd0-bus-width8 { 453 sd0_bus8: sd0-bus-width8 {
452 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3"; 454 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3";
453 samsung,pin-function = <2>; 455 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
454 samsung,pin-pud = <3>; 456 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
455 samsung,pin-drv = <3>; 457 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
456 }; 458 };
457 459
458 sd1_clk: sd1-clk { 460 sd1_clk: sd1-clk {
459 samsung,pins = "gpc2-0"; 461 samsung,pins = "gpc2-0";
460 samsung,pin-function = <2>; 462 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
461 samsung,pin-pud = <0>; 463 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
462 samsung,pin-drv = <3>; 464 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
463 }; 465 };
464 466
465 sd1_cmd: sd1-cmd { 467 sd1_cmd: sd1-cmd {
466 samsung,pins = "gpc2-1"; 468 samsung,pins = "gpc2-1";
467 samsung,pin-function = <2>; 469 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
468 samsung,pin-pud = <0>; 470 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
469 samsung,pin-drv = <3>; 471 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
470 }; 472 };
471 473
472 sd1_cd: sd1-cd { 474 sd1_cd: sd1-cd {
473 samsung,pins = "gpc2-2"; 475 samsung,pins = "gpc2-2";
474 samsung,pin-function = <2>; 476 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
475 samsung,pin-pud = <3>; 477 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
476 samsung,pin-drv = <3>; 478 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
477 }; 479 };
478 480
479 sd1_bus1: sd1-bus-width1 { 481 sd1_bus1: sd1-bus-width1 {
480 samsung,pins = "gpc2-3"; 482 samsung,pins = "gpc2-3";
481 samsung,pin-function = <2>; 483 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
482 samsung,pin-pud = <3>; 484 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
483 samsung,pin-drv = <3>; 485 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
484 }; 486 };
485 487
486 sd1_bus4: sd1-bus-width4 { 488 sd1_bus4: sd1-bus-width4 {
487 samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6"; 489 samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6";
488 samsung,pin-function = <2>; 490 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
489 samsung,pin-pud = <3>; 491 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
490 samsung,pin-drv = <3>; 492 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
491 }; 493 };
492 494
493 sd2_clk: sd2-clk { 495 sd2_clk: sd2-clk {
494 samsung,pins = "gpc3-0"; 496 samsung,pins = "gpc3-0";
495 samsung,pin-function = <2>; 497 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
496 samsung,pin-pud = <0>; 498 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
497 samsung,pin-drv = <3>; 499 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
498 }; 500 };
499 501
500 sd2_cmd: sd2-cmd { 502 sd2_cmd: sd2-cmd {
501 samsung,pins = "gpc3-1"; 503 samsung,pins = "gpc3-1";
502 samsung,pin-function = <2>; 504 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
503 samsung,pin-pud = <0>; 505 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
504 samsung,pin-drv = <3>; 506 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
505 }; 507 };
506 508
507 sd2_cd: sd2-cd { 509 sd2_cd: sd2-cd {
508 samsung,pins = "gpc3-2"; 510 samsung,pins = "gpc3-2";
509 samsung,pin-function = <2>; 511 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
510 samsung,pin-pud = <3>; 512 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
511 samsung,pin-drv = <3>; 513 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
512 }; 514 };
513 515
514 sd2_bus1: sd2-bus-width1 { 516 sd2_bus1: sd2-bus-width1 {
515 samsung,pins = "gpc3-3"; 517 samsung,pins = "gpc3-3";
516 samsung,pin-function = <2>; 518 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
517 samsung,pin-pud = <3>; 519 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
518 samsung,pin-drv = <3>; 520 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
519 }; 521 };
520 522
521 sd2_bus4: sd2-bus-width4 { 523 sd2_bus4: sd2-bus-width4 {
522 samsung,pins = "gpc3-3", "gpc3-4", "gpc3-5", "gpc3-6"; 524 samsung,pins = "gpc3-3", "gpc3-4", "gpc3-5", "gpc3-6";
523 samsung,pin-function = <2>; 525 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
524 samsung,pin-pud = <3>; 526 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
525 samsung,pin-drv = <3>; 527 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
526 }; 528 };
527 529
528 sd2_bus8: sd2-bus-width8 { 530 sd2_bus8: sd2-bus-width8 {
529 samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6"; 531 samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6";
530 samsung,pin-function = <3>; 532 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
531 samsung,pin-pud = <3>; 533 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
532 samsung,pin-drv = <3>; 534 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
533 }; 535 };
534 536
535 sd3_clk: sd3-clk { 537 sd3_clk: sd3-clk {
536 samsung,pins = "gpc4-0"; 538 samsung,pins = "gpc4-0";
537 samsung,pin-function = <2>; 539 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
538 samsung,pin-pud = <0>; 540 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
539 samsung,pin-drv = <3>; 541 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
540 }; 542 };
541 543
542 sd3_cmd: sd3-cmd { 544 sd3_cmd: sd3-cmd {
543 samsung,pins = "gpc4-1"; 545 samsung,pins = "gpc4-1";
544 samsung,pin-function = <2>; 546 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
545 samsung,pin-pud = <0>; 547 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
546 samsung,pin-drv = <3>; 548 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
547 }; 549 };
548 550
549 sd3_cd: sd3-cd { 551 sd3_cd: sd3-cd {
550 samsung,pins = "gpc4-2"; 552 samsung,pins = "gpc4-2";
551 samsung,pin-function = <2>; 553 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
552 samsung,pin-pud = <3>; 554 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
553 samsung,pin-drv = <3>; 555 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
554 }; 556 };
555 557
556 sd3_bus1: sd3-bus-width1 { 558 sd3_bus1: sd3-bus-width1 {
557 samsung,pins = "gpc4-3"; 559 samsung,pins = "gpc4-3";
558 samsung,pin-function = <2>; 560 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
559 samsung,pin-pud = <3>; 561 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
560 samsung,pin-drv = <3>; 562 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
561 }; 563 };
562 564
563 sd3_bus4: sd3-bus-width4 { 565 sd3_bus4: sd3-bus-width4 {
564 samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6"; 566 samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6";
565 samsung,pin-function = <2>; 567 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
566 samsung,pin-pud = <3>; 568 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
567 samsung,pin-drv = <3>; 569 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
568 }; 570 };
569 571
570 uart1_data: uart1-data { 572 uart1_data: uart1-data {
571 samsung,pins = "gpd0-0", "gpd0-1"; 573 samsung,pins = "gpd0-0", "gpd0-1";
572 samsung,pin-function = <2>; 574 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
573 samsung,pin-pud = <0>; 575 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
574 samsung,pin-drv = <0>; 576 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
575 }; 577 };
576 578
577 uart1_fctl: uart1-fctl { 579 uart1_fctl: uart1-fctl {
578 samsung,pins = "gpd0-2", "gpd0-3"; 580 samsung,pins = "gpd0-2", "gpd0-3";
579 samsung,pin-function = <2>; 581 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
580 samsung,pin-pud = <0>; 582 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
581 samsung,pin-drv = <0>; 583 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
582 }; 584 };
583 585
584 dp_hpd: dp_hpd { 586 dp_hpd: dp_hpd {
585 samsung,pins = "gpx0-7"; 587 samsung,pins = "gpx0-7";
586 samsung,pin-function = <3>; 588 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
587 samsung,pin-pud = <0>; 589 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
588 samsung,pin-drv = <0>; 590 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
589 }; 591 };
590}; 592};
591 593
@@ -666,52 +668,52 @@
666 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", 668 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
667 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", 669 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
668 "gpe1-0", "gpe1-1"; 670 "gpe1-0", "gpe1-1";
669 samsung,pin-function = <2>; 671 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
670 samsung,pin-pud = <0>; 672 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
671 samsung,pin-drv = <0>; 673 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
672 }; 674 };
673 675
674 cam_gpio_b: cam-gpio-b { 676 cam_gpio_b: cam-gpio-b {
675 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", 677 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3",
676 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; 678 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
677 samsung,pin-function = <3>; 679 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
678 samsung,pin-pud = <0>; 680 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
679 samsung,pin-drv = <0>; 681 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
680 }; 682 };
681 683
682 cam_i2c2_bus: cam-i2c2-bus { 684 cam_i2c2_bus: cam-i2c2-bus {
683 samsung,pins = "gpe0-6", "gpe1-0"; 685 samsung,pins = "gpe0-6", "gpe1-0";
684 samsung,pin-function = <4>; 686 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
685 samsung,pin-pud = <3>; 687 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
686 samsung,pin-drv = <0>; 688 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
687 }; 689 };
688 690
689 cam_spi1_bus: cam-spi1-bus { 691 cam_spi1_bus: cam-spi1-bus {
690 samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; 692 samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3";
691 samsung,pin-function = <4>; 693 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
692 samsung,pin-pud = <0>; 694 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
693 samsung,pin-drv = <0>; 695 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
694 }; 696 };
695 697
696 cam_i2c1_bus: cam-i2c1-bus { 698 cam_i2c1_bus: cam-i2c1-bus {
697 samsung,pins = "gpf0-2", "gpf0-3"; 699 samsung,pins = "gpf0-2", "gpf0-3";
698 samsung,pin-function = <2>; 700 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
699 samsung,pin-pud = <3>; 701 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
700 samsung,pin-drv = <0>; 702 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
701 }; 703 };
702 704
703 cam_i2c0_bus: cam-i2c0-bus { 705 cam_i2c0_bus: cam-i2c0-bus {
704 samsung,pins = "gpf0-0", "gpf0-1"; 706 samsung,pins = "gpf0-0", "gpf0-1";
705 samsung,pin-function = <2>; 707 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
706 samsung,pin-pud = <3>; 708 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
707 samsung,pin-drv = <0>; 709 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
708 }; 710 };
709 711
710 cam_spi0_bus: cam-spi0-bus { 712 cam_spi0_bus: cam-spi0-bus {
711 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; 713 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
712 samsung,pin-function = <2>; 714 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
713 samsung,pin-pud = <0>; 715 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
714 samsung,pin-drv = <0>; 716 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
715 }; 717 };
716 718
717 cam_bayrgb_bus: cam-bayrgb-bus { 719 cam_bayrgb_bus: cam-bayrgb-bus {
@@ -720,18 +722,18 @@
720 "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", 722 "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3",
721 "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7", 723 "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7",
722 "gpg2-0", "gpg2-1"; 724 "gpg2-0", "gpg2-1";
723 samsung,pin-function = <2>; 725 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
724 samsung,pin-pud = <0>; 726 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
725 samsung,pin-drv = <0>; 727 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
726 }; 728 };
727 729
728 cam_port_a: cam-port-a { 730 cam_port_a: cam-port-a {
729 samsung,pins = "gph0-0", "gph0-1", "gph0-2", "gph0-3", 731 samsung,pins = "gph0-0", "gph0-1", "gph0-2", "gph0-3",
730 "gph1-0", "gph1-1", "gph1-2", "gph1-3", 732 "gph1-0", "gph1-1", "gph1-2", "gph1-3",
731 "gph1-4", "gph1-5", "gph1-6", "gph1-7"; 733 "gph1-4", "gph1-5", "gph1-6", "gph1-7";
732 samsung,pin-function = <2>; 734 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
733 samsung,pin-pud = <0>; 735 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
734 samsung,pin-drv = <0>; 736 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
735 }; 737 };
736}; 738};
737 739
@@ -781,9 +783,9 @@
781 "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7", 783 "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7",
782 "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3", 784 "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3",
783 "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7"; 785 "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7";
784 samsung,pin-function = <2>; 786 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
785 samsung,pin-pud = <0>; 787 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
786 samsung,pin-drv = <0>; 788 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
787 }; 789 };
788 790
789 c2c_txd: c2c-txd { 791 c2c_txd: c2c-txd {
@@ -791,9 +793,9 @@
791 "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7", 793 "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7",
792 "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3", 794 "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
793 "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7"; 795 "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7";
794 samsung,pin-function = <2>; 796 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
795 samsung,pin-pud = <0>; 797 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
796 samsung,pin-drv = <0>; 798 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
797 }; 799 };
798}; 800};
799 801
@@ -809,8 +811,8 @@
809 i2s0_bus: i2s0-bus { 811 i2s0_bus: i2s0-bus {
810 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", 812 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
811 "gpz-4", "gpz-5", "gpz-6"; 813 "gpz-4", "gpz-5", "gpz-6";
812 samsung,pin-function = <2>; 814 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
813 samsung,pin-pud = <0>; 815 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
814 samsung,pin-drv = <0>; 816 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
815 }; 817 };
816}; 818};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 381af134c4c8..a97a785ccc6b 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -22,7 +22,8 @@
22 aliases { 22 aliases {
23 }; 23 };
24 24
25 memory { 25 memory@40000000 {
26 device_type = "memory";
26 reg = <0x40000000 0x80000000>; 27 reg = <0x40000000 0x80000000>;
27 }; 28 };
28 29
@@ -116,7 +117,7 @@
116}; 117};
117 118
118&hdmi { 119&hdmi {
119 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 120 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
120}; 121};
121 122
122&i2c_0 { 123&i2c_0 {
@@ -416,8 +417,8 @@
416&pinctrl_0 { 417&pinctrl_0 {
417 max77686_irq: max77686-irq { 418 max77686_irq: max77686-irq {
418 samsung,pins = "gpx3-2"; 419 samsung,pins = "gpx3-2";
419 samsung,pin-function = <0xf>; 420 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
420 samsung,pin-pud = <0>; 421 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
421 samsung,pin-drv = <0>; 422 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
422 }; 423 };
423}; 424};
diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
index fadbea744e1a..d5d51916bb74 100644
--- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
@@ -19,7 +19,8 @@
19 i2c104 = &i2c_104; 19 i2c104 = &i2c_104;
20 }; 20 };
21 21
22 memory { 22 memory@40000000 {
23 device_type = "memory";
23 reg = <0x40000000 0x80000000>; 24 reg = <0x40000000 0x80000000>;
24 }; 25 };
25 26
@@ -260,7 +261,7 @@
260}; 261};
261 262
262&hdmi { 263&hdmi {
263 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 264 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
264 pinctrl-names = "default"; 265 pinctrl-names = "default";
265 pinctrl-0 = <&hdmi_hpd_irq>; 266 pinctrl-0 = <&hdmi_hpd_irq>;
266 phy = <&hdmiphy>; 267 phy = <&hdmiphy>;
@@ -440,7 +441,7 @@
440 * double-pulling gets us out of spec in some cases. 441 * double-pulling gets us out of spec in some cases.
441 */ 442 */
442&i2c2_bus { 443&i2c2_bus {
443 samsung,pin-pud = <0>; 444 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
444}; 445};
445 446
446&i2c_2 { 447&i2c_2 {
@@ -572,81 +573,81 @@
572&pinctrl_0 { 573&pinctrl_0 {
573 wifi_en: wifi-en { 574 wifi_en: wifi-en {
574 samsung,pins = "gpx0-1"; 575 samsung,pins = "gpx0-1";
575 samsung,pin-function = <1>; 576 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
576 samsung,pin-pud = <0>; 577 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
577 samsung,pin-drv = <0>; 578 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
578 }; 579 };
579 580
580 wifi_rst: wifi-rst { 581 wifi_rst: wifi-rst {
581 samsung,pins = "gpx0-2"; 582 samsung,pins = "gpx0-2";
582 samsung,pin-function = <1>; 583 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
583 samsung,pin-pud = <0>; 584 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
584 samsung,pin-drv = <0>; 585 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
585 }; 586 };
586 587
587 power_key_irq: power-key-irq { 588 power_key_irq: power-key-irq {
588 samsung,pins = "gpx1-3"; 589 samsung,pins = "gpx1-3";
589 samsung,pin-function = <0xf>; 590 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
590 samsung,pin-pud = <0>; 591 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
591 samsung,pin-drv = <0>; 592 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
592 }; 593 };
593 594
594 ec_irq: ec-irq { 595 ec_irq: ec-irq {
595 samsung,pins = "gpx1-6"; 596 samsung,pins = "gpx1-6";
596 samsung,pin-function = <0>; 597 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
597 samsung,pin-pud = <0>; 598 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
598 samsung,pin-drv = <0>; 599 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
599 }; 600 };
600 601
601 tps65090_irq: tps65090-irq { 602 tps65090_irq: tps65090-irq {
602 samsung,pins = "gpx2-6"; 603 samsung,pins = "gpx2-6";
603 samsung,pin-function = <0>; 604 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
604 samsung,pin-pud = <0>; 605 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
605 samsung,pin-drv = <0>; 606 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
606 }; 607 };
607 608
608 usb3_vbus_en: usb3-vbus-en { 609 usb3_vbus_en: usb3-vbus-en {
609 samsung,pins = "gpx2-7"; 610 samsung,pins = "gpx2-7";
610 samsung,pin-function = <1>; 611 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
611 samsung,pin-pud = <0>; 612 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
612 samsung,pin-drv = <0>; 613 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
613 }; 614 };
614 615
615 max77686_irq: max77686-irq { 616 max77686_irq: max77686-irq {
616 samsung,pins = "gpx3-2"; 617 samsung,pins = "gpx3-2";
617 samsung,pin-function = <0>; 618 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
618 samsung,pin-pud = <0>; 619 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
619 samsung,pin-drv = <0>; 620 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
620 }; 621 };
621 622
622 lid_irq: lid-irq { 623 lid_irq: lid-irq {
623 samsung,pins = "gpx3-5"; 624 samsung,pins = "gpx3-5";
624 samsung,pin-function = <0xf>; 625 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
625 samsung,pin-pud = <0>; 626 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
626 samsung,pin-drv = <0>; 627 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
627 }; 628 };
628 629
629 hdmi_hpd_irq: hdmi-hpd-irq { 630 hdmi_hpd_irq: hdmi-hpd-irq {
630 samsung,pins = "gpx3-7"; 631 samsung,pins = "gpx3-7";
631 samsung,pin-function = <0>; 632 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
632 samsung,pin-pud = <1>; 633 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
633 samsung,pin-drv = <0>; 634 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
634 }; 635 };
635}; 636};
636 637
637&pinctrl_1 { 638&pinctrl_1 {
638 arb_their_claim: arb-their-claim { 639 arb_their_claim: arb-their-claim {
639 samsung,pins = "gpe0-4"; 640 samsung,pins = "gpe0-4";
640 samsung,pin-function = <0>; 641 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
641 samsung,pin-pud = <3>; 642 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
642 samsung,pin-drv = <0>; 643 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
643 }; 644 };
644 645
645 arb_our_claim: arb-our-claim { 646 arb_our_claim: arb-our-claim {
646 samsung,pins = "gpf0-3"; 647 samsung,pins = "gpf0-3";
647 samsung,pin-function = <1>; 648 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
648 samsung,pin-pud = <0>; 649 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
649 samsung,pin-drv = <0>; 650 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
650 }; 651 };
651}; 652};
652 653
@@ -657,16 +658,16 @@
657}; 658};
658 659
659&sd3_bus4 { 660&sd3_bus4 {
660 samsung,pin-drv = <0>; 661 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
661}; 662};
662 663
663&sd3_clk { 664&sd3_clk {
664 samsung,pin-drv = <0>; 665 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
665}; 666};
666 667
667&sd3_cmd { 668&sd3_cmd {
668 samsung,pin-pud = <3>; 669 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
669 samsung,pin-drv = <0>; 670 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
670}; 671};
671 672
672&spi_1 { 673&spi_1 {
diff --git a/arch/arm/boot/dts/exynos5250-snow-rev5.dts b/arch/arm/boot/dts/exynos5250-snow-rev5.dts
index f811dc800660..90560c316f64 100644
--- a/arch/arm/boot/dts/exynos5250-snow-rev5.dts
+++ b/arch/arm/boot/dts/exynos5250-snow-rev5.dts
@@ -40,8 +40,8 @@
40&pinctrl_0 { 40&pinctrl_0 {
41 max98090_irq: max98090-irq { 41 max98090_irq: max98090-irq {
42 samsung,pins = "gpx0-4"; 42 samsung,pins = "gpx0-4";
43 samsung,pin-function = <0>; 43 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
44 samsung,pin-pud = <0>; 44 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
45 samsung,pin-drv = <0>; 45 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
46 }; 46 };
47}; 47};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index 995c7ce6c12b..df48f2cc96f7 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -36,8 +36,8 @@
36&pinctrl_0 { 36&pinctrl_0 {
37 max98095_en: max98095-en { 37 max98095_en: max98095-en {
38 samsung,pins = "gpx1-7"; 38 samsung,pins = "gpx1-7";
39 samsung,pin-function = <0>; 39 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
40 samsung,pin-pud = <3>; 40 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
41 samsung,pin-drv = <0>; 41 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
42 }; 42 };
43}; 43};
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts
index 44f4292bfef6..4d7bdb735ed3 100644
--- a/arch/arm/boot/dts/exynos5250-spring.dts
+++ b/arch/arm/boot/dts/exynos5250-spring.dts
@@ -20,7 +20,8 @@
20 model = "Google Spring"; 20 model = "Google Spring";
21 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5"; 21 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
22 22
23 memory { 23 memory@40000000 {
24 device_type = "memory";
24 reg = <0x40000000 0x80000000>; 25 reg = <0x40000000 0x80000000>;
25 }; 26 };
26 27
@@ -91,7 +92,7 @@
91}; 92};
92 93
93&hdmi { 94&hdmi {
94 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 95 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
95 pinctrl-names = "default"; 96 pinctrl-names = "default";
96 pinctrl-0 = <&hdmi_hpd_irq>; 97 pinctrl-0 = <&hdmi_hpd_irq>;
97 phy = <&hdmiphy>; 98 phy = <&hdmiphy>;
@@ -357,7 +358,7 @@
357 * double-pulling gets us out of spec in some cases. 358 * double-pulling gets us out of spec in some cases.
358 */ 359 */
359&i2c2_bus { 360&i2c2_bus {
360 samsung,pin-pud = <0>; 361 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
361}; 362};
362 363
363&i2c_2 { 364&i2c_2 {
@@ -460,92 +461,92 @@
460&pinctrl_0 { 461&pinctrl_0 {
461 s5m8767_dvs: s5m8767-dvs { 462 s5m8767_dvs: s5m8767-dvs {
462 samsung,pins = "gpd1-0", "gpd1-1", "gpd1-2"; 463 samsung,pins = "gpd1-0", "gpd1-1", "gpd1-2";
463 samsung,pin-function = <0>; 464 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
464 samsung,pin-pud = <1>; 465 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
465 samsung,pin-drv = <0>; 466 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
466 }; 467 };
467 468
468 dp_hpd_gpio: dp-hpd-gpio { 469 dp_hpd_gpio: dp-hpd-gpio {
469 samsung,pins = "gpc3-0"; 470 samsung,pins = "gpc3-0";
470 samsung,pin-function = <0>; 471 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
471 samsung,pin-pud = <3>; 472 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
472 samsung,pin-drv = <0>; 473 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
473 }; 474 };
474 475
475 trackpad_irq: trackpad-irq { 476 trackpad_irq: trackpad-irq {
476 samsung,pins = "gpx1-2"; 477 samsung,pins = "gpx1-2";
477 samsung,pin-function = <0xf>; 478 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
478 samsung,pin-pud = <0>; 479 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
479 samsung,pin-drv = <0>; 480 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
480 }; 481 };
481 482
482 power_key_irq: power-key-irq { 483 power_key_irq: power-key-irq {
483 samsung,pins = "gpx1-3"; 484 samsung,pins = "gpx1-3";
484 samsung,pin-function = <0xf>; 485 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
485 samsung,pin-pud = <0>; 486 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
486 samsung,pin-drv = <0>; 487 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
487 }; 488 };
488 489
489 ec_irq: ec-irq { 490 ec_irq: ec-irq {
490 samsung,pins = "gpx1-6"; 491 samsung,pins = "gpx1-6";
491 samsung,pin-function = <0>; 492 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
492 samsung,pin-pud = <0>; 493 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
493 samsung,pin-drv = <0>; 494 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
494 }; 495 };
495 496
496 s5m8767_ds: s5m8767-ds { 497 s5m8767_ds: s5m8767-ds {
497 samsung,pins = "gpx2-3", "gpx2-4", "gpx2-5"; 498 samsung,pins = "gpx2-3", "gpx2-4", "gpx2-5";
498 samsung,pin-function = <0>; 499 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
499 samsung,pin-pud = <1>; 500 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
500 samsung,pin-drv = <0>; 501 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
501 }; 502 };
502 503
503 s5m8767_irq: s5m8767-irq { 504 s5m8767_irq: s5m8767-irq {
504 samsung,pins = "gpx3-2"; 505 samsung,pins = "gpx3-2";
505 samsung,pin-function = <0>; 506 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
506 samsung,pin-pud = <0>; 507 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
507 samsung,pin-drv = <0>; 508 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
508 }; 509 };
509 510
510 lid_irq: lid-irq { 511 lid_irq: lid-irq {
511 samsung,pins = "gpx3-5"; 512 samsung,pins = "gpx3-5";
512 samsung,pin-function = <0xf>; 513 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
513 samsung,pin-pud = <0>; 514 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
514 samsung,pin-drv = <0>; 515 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
515 }; 516 };
516 517
517 hdmi_hpd_irq: hdmi-hpd-irq { 518 hdmi_hpd_irq: hdmi-hpd-irq {
518 samsung,pins = "gpx3-7"; 519 samsung,pins = "gpx3-7";
519 samsung,pin-function = <0>; 520 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
520 samsung,pin-pud = <1>; 521 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
521 samsung,pin-drv = <0>; 522 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
522 }; 523 };
523}; 524};
524 525
525&pinctrl_1 { 526&pinctrl_1 {
526 hsic_reset: hsic-reset { 527 hsic_reset: hsic-reset {
527 samsung,pins = "gpe1-0"; 528 samsung,pins = "gpe1-0";
528 samsung,pin-function = <1>; 529 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
529 samsung,pin-pud = <0>; 530 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
530 samsung,pin-drv = <0>; 531 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
531 }; 532 };
532}; 533};
533 534
534&sd1_bus4 { 535&sd1_bus4 {
535 samsung,pin-drv = <0>; 536 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
536}; 537};
537 538
538&sd1_cd { 539&sd1_cd {
539 samsung,pin-drv = <0>; 540 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
540}; 541};
541 542
542&sd1_clk { 543&sd1_clk {
543 samsung,pin-drv = <0>; 544 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
544}; 545};
545 546
546&sd1_cmd { 547&sd1_cmd {
547 samsung,pin-pud = <3>; 548 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
548 samsung,pin-drv = <0>; 549 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
549}; 550};
550 551
551&spi_1 { 552&spi_1 {
diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
index f6ee55ea0708..1b911a219a27 100644
--- a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
@@ -12,9 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#define PIN_PULL_NONE 0 15#include <dt-bindings/pinctrl/samsung.h>
16#define PIN_PULL_DOWN 1
17#define PIN_PULL_UP 3
18 16
19&pinctrl_0 { 17&pinctrl_0 {
20 gpa0: gpa0 { 18 gpa0: gpa0 {
@@ -187,217 +185,217 @@
187 185
188 uart0_data: uart0-data { 186 uart0_data: uart0-data {
189 samsung,pins = "gpa0-0", "gpa0-1"; 187 samsung,pins = "gpa0-0", "gpa0-1";
190 samsung,pin-function = <2>; 188 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
191 samsung,pin-pud = <PIN_PULL_NONE>; 189 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
192 samsung,pin-drv = <0>; 190 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
193 }; 191 };
194 192
195 uart0_fctl: uart0-fctl { 193 uart0_fctl: uart0-fctl {
196 samsung,pins = "gpa0-2", "gpa0-3"; 194 samsung,pins = "gpa0-2", "gpa0-3";
197 samsung,pin-function = <2>; 195 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
198 samsung,pin-pud = <PIN_PULL_NONE>; 196 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
199 samsung,pin-drv = <0>; 197 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
200 }; 198 };
201 199
202 uart1_data: uart1-data { 200 uart1_data: uart1-data {
203 samsung,pins = "gpa1-0", "gpa1-1"; 201 samsung,pins = "gpa1-0", "gpa1-1";
204 samsung,pin-function = <2>; 202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
205 samsung,pin-pud = <PIN_PULL_NONE>; 203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
206 samsung,pin-drv = <0>; 204 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
207 }; 205 };
208 206
209 uart1_fctl: uart1-fctl { 207 uart1_fctl: uart1-fctl {
210 samsung,pins = "gpa1-2", "gpa1-3"; 208 samsung,pins = "gpa1-2", "gpa1-3";
211 samsung,pin-function = <2>; 209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
212 samsung,pin-pud = <PIN_PULL_NONE>; 210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
213 samsung,pin-drv = <0>; 211 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
214 }; 212 };
215 213
216 uart2_data: uart2-data { 214 uart2_data: uart2-data {
217 samsung,pins = "gpa1-4", "gpa1-5"; 215 samsung,pins = "gpa1-4", "gpa1-5";
218 samsung,pin-function = <2>; 216 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
219 samsung,pin-pud = <PIN_PULL_NONE>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
220 samsung,pin-drv = <0>; 218 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
221 }; 219 };
222 220
223 spi0_bus: spi0-bus { 221 spi0_bus: spi0-bus {
224 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3"; 222 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3";
225 samsung,pin-function = <2>; 223 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
226 samsung,pin-pud = <PIN_PULL_UP>; 224 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
227 samsung,pin-drv = <0>; 225 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
228 }; 226 };
229 227
230 spi1_bus: spi1-bus { 228 spi1_bus: spi1-bus {
231 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; 229 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7";
232 samsung,pin-function = <2>; 230 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
233 samsung,pin-pud = <PIN_PULL_UP>; 231 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
234 samsung,pin-drv = <0>; 232 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
235 }; 233 };
236 234
237 usb3_vbus0_en: usb3-vbus0-en { 235 usb3_vbus0_en: usb3-vbus0-en {
238 samsung,pins = "gpa2-4"; 236 samsung,pins = "gpa2-4";
239 samsung,pin-function = <1>; 237 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
240 samsung,pin-pud = <PIN_PULL_NONE>; 238 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
241 samsung,pin-drv = <0>; 239 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
242 }; 240 };
243 241
244 i2s1_bus: i2s1-bus { 242 i2s1_bus: i2s1-bus {
245 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", 243 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
246 "gpb0-4"; 244 "gpb0-4";
247 samsung,pin-function = <2>; 245 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
248 samsung,pin-pud = <PIN_PULL_NONE>; 246 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
249 samsung,pin-drv = <0>; 247 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
250 }; 248 };
251 249
252 pcm1_bus: pcm1-bus { 250 pcm1_bus: pcm1-bus {
253 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", 251 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
254 "gpb0-4"; 252 "gpb0-4";
255 samsung,pin-function = <3>; 253 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
256 samsung,pin-pud = <PIN_PULL_NONE>; 254 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
257 samsung,pin-drv = <0>; 255 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
258 }; 256 };
259 257
260 spdif1_bus: spdif1-bus { 258 spdif1_bus: spdif1-bus {
261 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2"; 259 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2";
262 samsung,pin-function = <4>; 260 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
263 samsung,pin-pud = <PIN_PULL_NONE>; 261 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
264 samsung,pin-drv = <0>; 262 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
265 }; 263 };
266 264
267 spi2_bus: spi2-bus { 265 spi2_bus: spi2-bus {
268 samsung,pins = "gpb1-0", "gpb1-2", "gpb1-3"; 266 samsung,pins = "gpb1-0", "gpb1-2", "gpb1-3";
269 samsung,pin-function = <2>; 267 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
270 samsung,pin-pud = <PIN_PULL_UP>; 268 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
271 samsung,pin-drv = <0>; 269 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
272 }; 270 };
273 271
274 i2c0_hs_bus: i2c0-hs-bus { 272 i2c0_hs_bus: i2c0-hs-bus {
275 samsung,pins = "gpb3-0", "gpb3-1"; 273 samsung,pins = "gpb3-0", "gpb3-1";
276 samsung,pin-function = <2>; 274 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
277 samsung,pin-pud = <PIN_PULL_UP>; 275 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
278 samsung,pin-drv = <0>; 276 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
279 }; 277 };
280 278
281 i2c1_hs_bus: i2c1-hs-bus { 279 i2c1_hs_bus: i2c1-hs-bus {
282 samsung,pins = "gpb3-2", "gpb3-3"; 280 samsung,pins = "gpb3-2", "gpb3-3";
283 samsung,pin-function = <2>; 281 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
284 samsung,pin-pud = <PIN_PULL_UP>; 282 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
285 samsung,pin-drv = <0>; 283 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
286 }; 284 };
287 285
288 i2c2_hs_bus: i2c2-hs-bus { 286 i2c2_hs_bus: i2c2-hs-bus {
289 samsung,pins = "gpb3-4", "gpb3-5"; 287 samsung,pins = "gpb3-4", "gpb3-5";
290 samsung,pin-function = <2>; 288 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
291 samsung,pin-pud = <PIN_PULL_UP>; 289 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
292 samsung,pin-drv = <0>; 290 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
293 }; 291 };
294 292
295 i2c3_hs_bus: i2c3-hs-bus { 293 i2c3_hs_bus: i2c3-hs-bus {
296 samsung,pins = "gpb3-6", "gpb3-7"; 294 samsung,pins = "gpb3-6", "gpb3-7";
297 samsung,pin-function = <2>; 295 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
298 samsung,pin-pud = <PIN_PULL_UP>; 296 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
299 samsung,pin-drv = <0>; 297 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
300 }; 298 };
301 299
302 i2c4_bus: i2c4-bus { 300 i2c4_bus: i2c4-bus {
303 samsung,pins = "gpb4-0", "gpb4-1"; 301 samsung,pins = "gpb4-0", "gpb4-1";
304 samsung,pin-function = <2>; 302 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
305 samsung,pin-pud = <PIN_PULL_UP>; 303 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
306 samsung,pin-drv = <0>; 304 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
307 }; 305 };
308 306
309 i2c5_bus: i2c5-bus { 307 i2c5_bus: i2c5-bus {
310 samsung,pins = "gpb4-2", "gpb4-3"; 308 samsung,pins = "gpb4-2", "gpb4-3";
311 samsung,pin-function = <2>; 309 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
312 samsung,pin-pud = <PIN_PULL_UP>; 310 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
313 samsung,pin-drv = <0>; 311 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
314 }; 312 };
315 313
316 i2c6_bus: i2c6-bus { 314 i2c6_bus: i2c6-bus {
317 samsung,pins = "gpb4-4", "gpb4-5"; 315 samsung,pins = "gpb4-4", "gpb4-5";
318 samsung,pin-function = <2>; 316 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
319 samsung,pin-pud = <PIN_PULL_UP>; 317 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
320 samsung,pin-drv = <0>; 318 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
321 }; 319 };
322 320
323 i2c7_bus: i2c7-bus { 321 i2c7_bus: i2c7-bus {
324 samsung,pins = "gpb4-6", "gpb4-7"; 322 samsung,pins = "gpb4-6", "gpb4-7";
325 samsung,pin-function = <2>; 323 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
326 samsung,pin-pud = <PIN_PULL_UP>; 324 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
327 samsung,pin-drv = <0>; 325 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
328 }; 326 };
329 327
330 i2c8_bus: i2c8-bus { 328 i2c8_bus: i2c8-bus {
331 samsung,pins = "gpb5-0", "gpb5-1"; 329 samsung,pins = "gpb5-0", "gpb5-1";
332 samsung,pin-function = <2>; 330 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
333 samsung,pin-pud = <PIN_PULL_UP>; 331 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
334 samsung,pin-drv = <0>; 332 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
335 }; 333 };
336 334
337 i2c9_bus: i2c9-bus { 335 i2c9_bus: i2c9-bus {
338 samsung,pins = "gpb5-2", "gpb5-3"; 336 samsung,pins = "gpb5-2", "gpb5-3";
339 samsung,pin-function = <2>; 337 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
340 samsung,pin-pud = <PIN_PULL_UP>; 338 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
341 samsung,pin-drv = <0>; 339 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
342 }; 340 };
343 341
344 i2c10_bus: i2c10-bus { 342 i2c10_bus: i2c10-bus {
345 samsung,pins = "gpb5-4", "gpb5-5"; 343 samsung,pins = "gpb5-4", "gpb5-5";
346 samsung,pin-function = <2>; 344 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
347 samsung,pin-pud = <PIN_PULL_UP>; 345 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
348 samsung,pin-drv = <0>; 346 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
349 }; 347 };
350 348
351 i2c11_bus: i2c11-bus { 349 i2c11_bus: i2c11-bus {
352 samsung,pins = "gpb5-6", "gpb5-7"; 350 samsung,pins = "gpb5-6", "gpb5-7";
353 samsung,pin-function = <2>; 351 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
354 samsung,pin-pud = <PIN_PULL_UP>; 352 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
355 samsung,pin-drv = <0>; 353 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
356 }; 354 };
357 355
358 cam_gpio_a: cam-gpio-a { 356 cam_gpio_a: cam-gpio-a {
359 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", 357 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
360 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", 358 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
361 "gpe1-0", "gpe1-1"; 359 "gpe1-0", "gpe1-1";
362 samsung,pin-function = <2>; 360 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
363 samsung,pin-pud = <PIN_PULL_NONE>; 361 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
364 samsung,pin-drv = <0>; 362 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
365 }; 363 };
366 364
367 cam_gpio_b: cam-gpio-b { 365 cam_gpio_b: cam-gpio-b {
368 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", 366 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3",
369 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; 367 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
370 samsung,pin-function = <3>; 368 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
371 samsung,pin-pud = <PIN_PULL_NONE>; 369 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
372 samsung,pin-drv = <0>; 370 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
373 }; 371 };
374 372
375 cam_i2c1_bus: cam-i2c1-bus { 373 cam_i2c1_bus: cam-i2c1-bus {
376 samsung,pins = "gpf0-2", "gpf0-3"; 374 samsung,pins = "gpf0-2", "gpf0-3";
377 samsung,pin-function = <2>; 375 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
378 samsung,pin-pud = <PIN_PULL_UP>; 376 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
379 samsung,pin-drv = <0>; 377 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
380 }; 378 };
381 379
382 cam_i2c0_bus: cam-i2c0-bus { 380 cam_i2c0_bus: cam-i2c0-bus {
383 samsung,pins = "gpf0-0", "gpf0-1"; 381 samsung,pins = "gpf0-0", "gpf0-1";
384 samsung,pin-function = <2>; 382 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
385 samsung,pin-pud = <PIN_PULL_UP>; 383 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
386 samsung,pin-drv = <0>; 384 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
387 }; 385 };
388 386
389 cam_spi0_bus: cam-spi0-bus { 387 cam_spi0_bus: cam-spi0-bus {
390 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; 388 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
391 samsung,pin-function = <2>; 389 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
392 samsung,pin-pud = <PIN_PULL_NONE>; 390 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
393 samsung,pin-drv = <0>; 391 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
394 }; 392 };
395 393
396 cam_spi1_bus: cam-spi1-bus { 394 cam_spi1_bus: cam-spi1-bus {
397 samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7"; 395 samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7";
398 samsung,pin-function = <2>; 396 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
399 samsung,pin-pud = <PIN_PULL_NONE>; 397 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
400 samsung,pin-drv = <0>; 398 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
401 }; 399 };
402}; 400};
403 401
@@ -444,114 +442,114 @@
444 442
445 sd0_clk: sd0-clk { 443 sd0_clk: sd0-clk {
446 samsung,pins = "gpc0-0"; 444 samsung,pins = "gpc0-0";
447 samsung,pin-function = <2>; 445 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
448 samsung,pin-pud = <PIN_PULL_NONE>; 446 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
449 samsung,pin-drv = <3>; 447 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
450 }; 448 };
451 449
452 sd0_cmd: sd0-cmd { 450 sd0_cmd: sd0-cmd {
453 samsung,pins = "gpc0-1"; 451 samsung,pins = "gpc0-1";
454 samsung,pin-function = <2>; 452 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
455 samsung,pin-pud = <PIN_PULL_NONE>; 453 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
456 samsung,pin-drv = <3>; 454 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
457 }; 455 };
458 456
459 sd0_bus1: sd0-bus-width1 { 457 sd0_bus1: sd0-bus-width1 {
460 samsung,pins = "gpc0-2"; 458 samsung,pins = "gpc0-2";
461 samsung,pin-function = <2>; 459 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
462 samsung,pin-pud = <PIN_PULL_UP>; 460 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
463 samsung,pin-drv = <3>; 461 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
464 }; 462 };
465 463
466 sd0_bus4: sd0-bus-width4 { 464 sd0_bus4: sd0-bus-width4 {
467 samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5"; 465 samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5";
468 samsung,pin-function = <2>; 466 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
469 samsung,pin-pud = <PIN_PULL_UP>; 467 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
470 samsung,pin-drv = <3>; 468 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
471 }; 469 };
472 470
473 sd0_bus8: sd0-bus-width8 { 471 sd0_bus8: sd0-bus-width8 {
474 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; 472 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3";
475 samsung,pin-function = <2>; 473 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
476 samsung,pin-pud = <PIN_PULL_UP>; 474 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
477 samsung,pin-drv = <3>; 475 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
478 }; 476 };
479 477
480 sd0_rdqs: sd0-rdqs { 478 sd0_rdqs: sd0-rdqs {
481 samsung,pins = "gpc0-6"; 479 samsung,pins = "gpc0-6";
482 samsung,pin-function = <2>; 480 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
483 samsung,pin-pud = <PIN_PULL_UP>; 481 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
484 samsung,pin-drv = <3>; 482 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
485 }; 483 };
486 484
487 sd1_clk: sd1-clk { 485 sd1_clk: sd1-clk {
488 samsung,pins = "gpc1-0"; 486 samsung,pins = "gpc1-0";
489 samsung,pin-function = <2>; 487 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
490 samsung,pin-pud = <PIN_PULL_NONE>; 488 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
491 samsung,pin-drv = <3>; 489 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
492 }; 490 };
493 491
494 sd1_cmd: sd1-cmd { 492 sd1_cmd: sd1-cmd {
495 samsung,pins = "gpc1-1"; 493 samsung,pins = "gpc1-1";
496 samsung,pin-function = <2>; 494 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
497 samsung,pin-pud = <PIN_PULL_NONE>; 495 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
498 samsung,pin-drv = <3>; 496 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
499 }; 497 };
500 498
501 sd1_bus1: sd1-bus-width1 { 499 sd1_bus1: sd1-bus-width1 {
502 samsung,pins = "gpc1-2"; 500 samsung,pins = "gpc1-2";
503 samsung,pin-function = <2>; 501 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
504 samsung,pin-pud = <PIN_PULL_UP>; 502 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
505 samsung,pin-drv = <3>; 503 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
506 }; 504 };
507 505
508 sd1_bus4: sd1-bus-width4 { 506 sd1_bus4: sd1-bus-width4 {
509 samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5"; 507 samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5";
510 samsung,pin-function = <2>; 508 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
511 samsung,pin-pud = <PIN_PULL_UP>; 509 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
512 samsung,pin-drv = <3>; 510 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
513 }; 511 };
514 512
515 sd1_bus8: sd1-bus-width8 { 513 sd1_bus8: sd1-bus-width8 {
516 samsung,pins = "gpc4-0", "gpc4-1", "gpc4-2", "gpc4-3"; 514 samsung,pins = "gpc4-0", "gpc4-1", "gpc4-2", "gpc4-3";
517 samsung,pin-function = <2>; 515 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
518 samsung,pin-pud = <PIN_PULL_UP>; 516 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
519 samsung,pin-drv = <3>; 517 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
520 }; 518 };
521 519
522 sd2_clk: sd2-clk { 520 sd2_clk: sd2-clk {
523 samsung,pins = "gpc2-0"; 521 samsung,pins = "gpc2-0";
524 samsung,pin-function = <2>; 522 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
525 samsung,pin-pud = <PIN_PULL_NONE>; 523 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
526 samsung,pin-drv = <3>; 524 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
527 }; 525 };
528 526
529 sd2_cmd: sd2-cmd { 527 sd2_cmd: sd2-cmd {
530 samsung,pins = "gpc2-1"; 528 samsung,pins = "gpc2-1";
531 samsung,pin-function = <2>; 529 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
532 samsung,pin-pud = <PIN_PULL_NONE>; 530 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
533 samsung,pin-drv = <3>; 531 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
534 }; 532 };
535 533
536 sd2_cd: sd2-cd { 534 sd2_cd: sd2-cd {
537 samsung,pins = "gpc2-2"; 535 samsung,pins = "gpc2-2";
538 samsung,pin-function = <2>; 536 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
539 samsung,pin-pud = <PIN_PULL_UP>; 537 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
540 samsung,pin-drv = <3>; 538 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
541 }; 539 };
542 540
543 sd2_bus1: sd2-bus-width1 { 541 sd2_bus1: sd2-bus-width1 {
544 samsung,pins = "gpc2-3"; 542 samsung,pins = "gpc2-3";
545 samsung,pin-function = <2>; 543 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
546 samsung,pin-pud = <PIN_PULL_UP>; 544 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
547 samsung,pin-drv = <3>; 545 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
548 }; 546 };
549 547
550 sd2_bus4: sd2-bus-width4 { 548 sd2_bus4: sd2-bus-width4 {
551 samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6"; 549 samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6";
552 samsung,pin-function = <2>; 550 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
553 samsung,pin-pud = <PIN_PULL_UP>; 551 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
554 samsung,pin-drv = <3>; 552 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>;
555 }; 553 };
556}; 554};
557 555
diff --git a/arch/arm/boot/dts/exynos5260-xyref5260.dts b/arch/arm/boot/dts/exynos5260-xyref5260.dts
index 3daef94bee38..d0cc300cfb4b 100644
--- a/arch/arm/boot/dts/exynos5260-xyref5260.dts
+++ b/arch/arm/boot/dts/exynos5260-xyref5260.dts
@@ -16,7 +16,8 @@
16 model = "SAMSUNG XYREF5260 board based on EXYNOS5260"; 16 model = "SAMSUNG XYREF5260 board based on EXYNOS5260";
17 compatible = "samsung,xyref5260", "samsung,exynos5260", "samsung,exynos5"; 17 compatible = "samsung,xyref5260", "samsung,exynos5260", "samsung,exynos5";
18 18
19 memory { 19 memory@20000000 {
20 device_type = "memory";
20 reg = <0x20000000 0x80000000>; 21 reg = <0x20000000 0x80000000>;
21 }; 22 };
22 23
@@ -42,9 +43,9 @@
42&pinctrl_0 { 43&pinctrl_0 {
43 hdmi_hpd_irq: hdmi-hpd-irq { 44 hdmi_hpd_irq: hdmi-hpd-irq {
44 samsung,pins = "gpx3-7"; 45 samsung,pins = "gpx3-7";
45 samsung,pin-function = <0>; 46 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
46 samsung,pin-pud = <1>; 47 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
47 samsung,pin-drv = <0>; 48 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
48 }; 49 };
49}; 50};
50 51
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 36da38e29000..a86a4898d077 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -9,13 +9,13 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10*/ 10*/
11 11
12#include "skeleton.dtsi"
13
14#include <dt-bindings/clock/exynos5260-clk.h> 12#include <dt-bindings/clock/exynos5260-clk.h>
15 13
16/ { 14/ {
17 compatible = "samsung,exynos5260", "samsung,exynos5"; 15 compatible = "samsung,exynos5260", "samsung,exynos5";
18 interrupt-parent = <&gic>; 16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 19
20 aliases { 20 aliases {
21 pinctrl0 = &pinctrl_0; 21 pinctrl0 = &pinctrl_0;
diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts
index f6d135245a4b..3c271cb4b2be 100644
--- a/arch/arm/boot/dts/exynos5410-odroidxu.dts
+++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts
@@ -21,12 +21,13 @@
21 model = "Hardkernel Odroid XU"; 21 model = "Hardkernel Odroid XU";
22 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5"; 22 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
23 23
24 memory { 24 memory@40000000 {
25 device_type = "memory";
25 reg = <0x40000000 0x7ea00000>; 26 reg = <0x40000000 0x7ea00000>;
26 }; 27 };
27 28
28 chosen { 29 chosen {
29 linux,stdout-path = &serial_2; 30 stdout-path = "serial2:115200n8";
30 }; 31 };
31 32
32 emmc_pwrseq: pwrseq { 33 emmc_pwrseq: pwrseq {
@@ -473,38 +474,38 @@
473&pinctrl_0 { 474&pinctrl_0 {
474 emmc_nrst_pin: emmc-nrst { 475 emmc_nrst_pin: emmc-nrst {
475 samsung,pins = "gpd1-0"; 476 samsung,pins = "gpd1-0";
476 samsung,pin-function = <2>; 477 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
477 samsung,pin-pud = <0>; 478 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
478 samsung,pin-drv = <0>; 479 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
479 }; 480 };
480 481
481 pmic_dvs_3: pmic-dvs-3 { 482 pmic_dvs_3: pmic-dvs-3 {
482 samsung,pins = "gpx0-0"; 483 samsung,pins = "gpx0-0";
483 samsung,pin-function = <1>; 484 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
484 samsung,pin-pud = <0>; 485 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
485 samsung,pin-drv = <0>; 486 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
486 }; 487 };
487 488
488 pmic_dvs_2: pmic-dvs-2 { 489 pmic_dvs_2: pmic-dvs-2 {
489 samsung,pins = "gpx0-1"; 490 samsung,pins = "gpx0-1";
490 samsung,pin-function = <1>; 491 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
491 samsung,pin-pud = <0>; 492 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
492 samsung,pin-drv = <0>; 493 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
493 }; 494 };
494 495
495 pmic_dvs_1: pmic-dvs-1 { 496 pmic_dvs_1: pmic-dvs-1 {
496 samsung,pins = "gpx0-2"; 497 samsung,pins = "gpx0-2";
497 samsung,pin-function = <1>; 498 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
498 samsung,pin-pud = <0>; 499 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
499 samsung,pin-drv = <0>; 500 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
500 samsung,pin-val = <1>; 501 samsung,pin-val = <1>;
501 }; 502 };
502 503
503 max77802_irq: max77802-irq { 504 max77802_irq: max77802-irq {
504 samsung,pins = "gpx0-4"; 505 samsung,pins = "gpx0-4";
505 samsung,pin-function = <0xf>; 506 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
506 samsung,pin-pud = <0>; 507 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
507 samsung,pin-drv = <0>; 508 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
508 }; 509 };
509}; 510};
510 511
diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi
index b58a0f29f42c..a083d23fdee3 100644
--- a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi
@@ -9,6 +9,8 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#include <dt-bindings/pinctrl/samsung.h>
13
12&pinctrl_0 { 14&pinctrl_0 {
13 gpa0: gpa0 { 15 gpa0: gpa0 {
14 gpio-controller; 16 gpio-controller;
@@ -280,212 +282,212 @@
280 282
281 uart0_data: uart0-data { 283 uart0_data: uart0-data {
282 samsung,pins = "gpa0-0", "gpa0-1"; 284 samsung,pins = "gpa0-0", "gpa0-1";
283 samsung,pin-function = <2>; 285 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
284 samsung,pin-pud = <0>; 286 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
285 samsung,pin-drv = <0>; 287 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
286 }; 288 };
287 289
288 uart0_fctl: uart0-fctl { 290 uart0_fctl: uart0-fctl {
289 samsung,pins = "gpa0-2", "gpa0-3"; 291 samsung,pins = "gpa0-2", "gpa0-3";
290 samsung,pin-function = <2>; 292 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
291 samsung,pin-pud = <0>; 293 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
292 samsung,pin-drv = <0>; 294 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
293 }; 295 };
294 296
295 uart1_data: uart1-data { 297 uart1_data: uart1-data {
296 samsung,pins = "gpa0-4", "gpa0-5"; 298 samsung,pins = "gpa0-4", "gpa0-5";
297 samsung,pin-function = <2>; 299 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
298 samsung,pin-pud = <0>; 300 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
299 samsung,pin-drv = <0>; 301 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
300 }; 302 };
301 303
302 uart1_fctl: uart1-fctl { 304 uart1_fctl: uart1-fctl {
303 samsung,pins = "gpa0-6", "gpa0-7"; 305 samsung,pins = "gpa0-6", "gpa0-7";
304 samsung,pin-function = <2>; 306 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
305 samsung,pin-pud = <0>; 307 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
306 samsung,pin-drv = <0>; 308 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
307 }; 309 };
308 310
309 i2c2_bus: i2c2-bus { 311 i2c2_bus: i2c2-bus {
310 samsung,pins = "gpa0-6", "gpa0-7"; 312 samsung,pins = "gpa0-6", "gpa0-7";
311 samsung,pin-function = <3>; 313 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
312 samsung,pin-pud = <3>; 314 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
313 samsung,pin-drv = <0>; 315 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
314 }; 316 };
315 317
316 uart2_data: uart2-data { 318 uart2_data: uart2-data {
317 samsung,pins = "gpa1-0", "gpa1-1"; 319 samsung,pins = "gpa1-0", "gpa1-1";
318 samsung,pin-function = <2>; 320 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
319 samsung,pin-pud = <0>; 321 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
320 samsung,pin-drv = <0>; 322 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
321 }; 323 };
322 324
323 uart2_fctl: uart2-fctl { 325 uart2_fctl: uart2-fctl {
324 samsung,pins = "gpa1-2", "gpa1-3"; 326 samsung,pins = "gpa1-2", "gpa1-3";
325 samsung,pin-function = <2>; 327 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
326 samsung,pin-pud = <0>; 328 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
327 samsung,pin-drv = <0>; 329 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
328 }; 330 };
329 331
330 i2c3_bus: i2c3-bus { 332 i2c3_bus: i2c3-bus {
331 samsung,pins = "gpa1-2", "gpa1-3"; 333 samsung,pins = "gpa1-2", "gpa1-3";
332 samsung,pin-function = <3>; 334 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
333 samsung,pin-pud = <3>; 335 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
334 samsung,pin-drv = <0>; 336 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
335 }; 337 };
336 338
337 uart3_data: uart3-data { 339 uart3_data: uart3-data {
338 samsung,pins = "gpa1-4", "gpa1-5"; 340 samsung,pins = "gpa1-4", "gpa1-5";
339 samsung,pin-function = <2>; 341 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
340 samsung,pin-pud = <0>; 342 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
341 samsung,pin-drv = <0>; 343 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
342 }; 344 };
343 345
344 i2c4_hs_bus: i2c4-hs-bus { 346 i2c4_hs_bus: i2c4-hs-bus {
345 samsung,pins = "gpa2-0", "gpa2-1"; 347 samsung,pins = "gpa2-0", "gpa2-1";
346 samsung,pin-function = <3>; 348 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
347 samsung,pin-pud = <3>; 349 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
348 samsung,pin-drv = <0>; 350 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
349 }; 351 };
350 352
351 i2c5_hs_bus: i2c5-hs-bus { 353 i2c5_hs_bus: i2c5-hs-bus {
352 samsung,pins = "gpa2-2", "gpa2-3"; 354 samsung,pins = "gpa2-2", "gpa2-3";
353 samsung,pin-function = <3>; 355 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
354 samsung,pin-pud = <3>; 356 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
355 samsung,pin-drv = <0>; 357 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
356 }; 358 };
357 359
358 i2c6_hs_bus: i2c6-hs-bus { 360 i2c6_hs_bus: i2c6-hs-bus {
359 samsung,pins = "gpb1-3", "gpb1-4"; 361 samsung,pins = "gpb1-3", "gpb1-4";
360 samsung,pin-function = <4>; 362 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
361 samsung,pin-pud = <3>; 363 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
362 samsung,pin-drv = <0>; 364 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
363 }; 365 };
364 366
365 pwm0_out: pwm0-out { 367 pwm0_out: pwm0-out {
366 samsung,pins = "gpb2-0"; 368 samsung,pins = "gpb2-0";
367 samsung,pin-function = <2>; 369 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
368 samsung,pin-pud = <0>; 370 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
369 samsung,pin-drv = <0>; 371 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
370 }; 372 };
371 373
372 pwm1_out: pwm1-out { 374 pwm1_out: pwm1-out {
373 samsung,pins = "gpb2-1"; 375 samsung,pins = "gpb2-1";
374 samsung,pin-function = <2>; 376 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
375 samsung,pin-pud = <0>; 377 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
376 samsung,pin-drv = <0>; 378 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
377 }; 379 };
378 380
379 pwm2_out: pwm2-out { 381 pwm2_out: pwm2-out {
380 samsung,pins = "gpb2-2"; 382 samsung,pins = "gpb2-2";
381 samsung,pin-function = <2>; 383 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
382 samsung,pin-pud = <0>; 384 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
383 samsung,pin-drv = <0>; 385 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
384 }; 386 };
385 387
386 pwm3_out: pwm3-out { 388 pwm3_out: pwm3-out {
387 samsung,pins = "gpb2-3"; 389 samsung,pins = "gpb2-3";
388 samsung,pin-function = <2>; 390 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
389 samsung,pin-pud = <0>; 391 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
390 samsung,pin-drv = <0>; 392 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
391 }; 393 };
392 394
393 i2c7_hs_bus: i2c7-hs-bus { 395 i2c7_hs_bus: i2c7-hs-bus {
394 samsung,pins = "gpb2-2", "gpb2-3"; 396 samsung,pins = "gpb2-2", "gpb2-3";
395 samsung,pin-function = <3>; 397 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
396 samsung,pin-pud = <3>; 398 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
397 samsung,pin-drv = <0>; 399 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
398 }; 400 };
399 401
400 i2c0_bus: i2c0-bus { 402 i2c0_bus: i2c0-bus {
401 samsung,pins = "gpb3-0", "gpb3-1"; 403 samsung,pins = "gpb3-0", "gpb3-1";
402 samsung,pin-function = <2>; 404 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
403 samsung,pin-pud = <3>; 405 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
404 samsung,pin-drv = <0>; 406 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
405 }; 407 };
406 408
407 i2c1_bus: i2c1-bus { 409 i2c1_bus: i2c1-bus {
408 samsung,pins = "gpb3-2", "gpb3-3"; 410 samsung,pins = "gpb3-2", "gpb3-3";
409 samsung,pin-function = <2>; 411 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
410 samsung,pin-pud = <3>; 412 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
411 samsung,pin-drv = <0>; 413 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
412 }; 414 };
413 415
414 sd0_clk: sd0-clk { 416 sd0_clk: sd0-clk {
415 samsung,pins = "gpc0-0"; 417 samsung,pins = "gpc0-0";
416 samsung,pin-function = <2>; 418 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
417 samsung,pin-pud = <0>; 419 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
418 samsung,pin-drv = <3>; 420 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
419 }; 421 };
420 422
421 sd0_cmd: sd0-cmd { 423 sd0_cmd: sd0-cmd {
422 samsung,pins = "gpc0-1"; 424 samsung,pins = "gpc0-1";
423 samsung,pin-function = <2>; 425 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
424 samsung,pin-pud = <0>; 426 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
425 samsung,pin-drv = <3>; 427 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
426 }; 428 };
427 429
428 sd0_cd: sd0-cd { 430 sd0_cd: sd0-cd {
429 samsung,pins = "gpc0-2"; 431 samsung,pins = "gpc0-2";
430 samsung,pin-function = <2>; 432 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
431 samsung,pin-pud = <3>; 433 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
432 samsung,pin-drv = <3>; 434 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
433 }; 435 };
434 436
435 sd0_bus1: sd0-bus-width1 { 437 sd0_bus1: sd0-bus-width1 {
436 samsung,pins = "gpc0-3"; 438 samsung,pins = "gpc0-3";
437 samsung,pin-function = <2>; 439 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
438 samsung,pin-pud = <3>; 440 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
439 samsung,pin-drv = <3>; 441 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
440 }; 442 };
441 443
442 sd0_bus4: sd0-bus-width4 { 444 sd0_bus4: sd0-bus-width4 {
443 samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6"; 445 samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6";
444 samsung,pin-function = <2>; 446 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
445 samsung,pin-pud = <3>; 447 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
446 samsung,pin-drv = <3>; 448 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
447 }; 449 };
448 450
449 sd2_clk: sd2-clk { 451 sd2_clk: sd2-clk {
450 samsung,pins = "gpc2-0"; 452 samsung,pins = "gpc2-0";
451 samsung,pin-function = <2>; 453 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
452 samsung,pin-pud = <0>; 454 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
453 samsung,pin-drv = <3>; 455 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
454 }; 456 };
455 457
456 sd2_cmd: sd2-cmd { 458 sd2_cmd: sd2-cmd {
457 samsung,pins = "gpc2-1"; 459 samsung,pins = "gpc2-1";
458 samsung,pin-function = <2>; 460 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
459 samsung,pin-pud = <0>; 461 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
460 samsung,pin-drv = <3>; 462 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
461 }; 463 };
462 464
463 sd2_cd: sd2-cd { 465 sd2_cd: sd2-cd {
464 samsung,pins = "gpc2-2"; 466 samsung,pins = "gpc2-2";
465 samsung,pin-function = <2>; 467 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
466 samsung,pin-pud = <3>; 468 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
467 samsung,pin-drv = <3>; 469 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
468 }; 470 };
469 471
470 sd2_bus1: sd2-bus-width1 { 472 sd2_bus1: sd2-bus-width1 {
471 samsung,pins = "gpc2-3"; 473 samsung,pins = "gpc2-3";
472 samsung,pin-function = <2>; 474 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
473 samsung,pin-pud = <3>; 475 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
474 samsung,pin-drv = <3>; 476 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
475 }; 477 };
476 478
477 sd2_bus4: sd2-bus-width4 { 479 sd2_bus4: sd2-bus-width4 {
478 samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6"; 480 samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6";
479 samsung,pin-function = <2>; 481 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
480 samsung,pin-pud = <3>; 482 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
481 samsung,pin-drv = <3>; 483 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
482 }; 484 };
483 485
484 sd0_bus8: sd0-bus-width8 { 486 sd0_bus8: sd0-bus-width8 {
485 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; 487 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3";
486 samsung,pin-function = <2>; 488 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
487 samsung,pin-pud = <3>; 489 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
488 samsung,pin-drv = <3>; 490 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
489 }; 491 };
490}; 492};
491 493
diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts
index 777fcf2edd79..6cc74d97daae 100644
--- a/arch/arm/boot/dts/exynos5410-smdk5410.dts
+++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts
@@ -16,7 +16,8 @@
16 model = "Samsung SMDK5410 board based on EXYNOS5410"; 16 model = "Samsung SMDK5410 board based on EXYNOS5410";
17 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5"; 17 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
18 18
19 memory { 19 memory@40000000 {
20 device_type = "memory";
20 reg = <0x40000000 0x80000000>; 21 reg = <0x40000000 0x80000000>;
21 }; 22 };
22 23
@@ -66,8 +67,8 @@
66 srom_ctl: srom-ctl { 67 srom_ctl: srom-ctl {
67 samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5", 68 samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
68 "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3"; 69 "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
69 samsung,pin-function = <2>; 70 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
70 samsung,pin-drv = <0>; 71 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
71 }; 72 };
72 73
73 srom_ebi: srom-ebi { 74 srom_ebi: srom-ebi {
@@ -77,9 +78,9 @@
77 "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7", 78 "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
78 "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3", 79 "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
79 "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7"; 80 "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
80 samsung,pin-function = <2>; 81 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
81 samsung,pin-pud = <3>; 82 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
82 samsung,pin-drv = <0>; 83 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
83 }; 84 };
84}; 85};
85 86
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 39a3b81478fd..9cc83c51c925 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -22,7 +22,8 @@
22 model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; 22 model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
23 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5"; 23 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
24 24
25 memory { 25 memory@20000000 {
26 device_type = "memory";
26 reg = <0x20000000 0x80000000>; 27 reg = <0x20000000 0x80000000>;
27 }; 28 };
28 29
@@ -70,6 +71,15 @@
70 status = "disabled"; 71 status = "disabled";
71}; 72};
72 73
74&hdmi {
75 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
76 vdd_osc-supply = <&ldo7_reg>;
77 vdd_pll-supply = <&ldo6_reg>;
78 vdd-supply = <&ldo6_reg>;
79 ddc = <&i2c_2>;
80 status = "okay";
81};
82
73&hsi2c_4 { 83&hsi2c_4 {
74 status = "okay"; 84 status = "okay";
75 85
@@ -347,6 +357,10 @@
347 }; 357 };
348}; 358};
349 359
360&i2c_2 {
361 status = "okay";
362};
363
350&mmc_0 { 364&mmc_0 {
351 status = "okay"; 365 status = "okay";
352 broken-cd; 366 broken-cd;
@@ -378,9 +392,9 @@
378&pinctrl_0 { 392&pinctrl_0 {
379 s2mps11_irq: s2mps11-irq { 393 s2mps11_irq: s2mps11-irq {
380 samsung,pins = "gpx3-2"; 394 samsung,pins = "gpx3-2";
381 samsung,pin-function = <0xf>; 395 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
382 samsung,pin-pud = <0>; 396 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
383 samsung,pin-drv = <0>; 397 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
384 }; 398 };
385}; 399};
386 400
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index fe4e0915c0c6..ec4a00f1ce01 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -79,7 +79,8 @@
79 }; 79 };
80 }; 80 };
81 81
82 memory { 82 memory@20000000 {
83 device_type = "memory";
83 reg = <0x20000000 0x80000000>; 84 reg = <0x20000000 0x80000000>;
84 }; 85 };
85 86
@@ -179,7 +180,7 @@
179 180
180&hdmi { 181&hdmi {
181 status = "okay"; 182 status = "okay";
182 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 183 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
183 pinctrl-names = "default"; 184 pinctrl-names = "default";
184 pinctrl-0 = <&hdmi_hpd_irq>; 185 pinctrl-0 = <&hdmi_hpd_irq>;
185 ddc = <&i2c_2>; 186 ddc = <&i2c_2>;
@@ -753,171 +754,171 @@
753 754
754 wifi_en: wifi-en { 755 wifi_en: wifi-en {
755 samsung,pins = "gpx0-0"; 756 samsung,pins = "gpx0-0";
756 samsung,pin-function = <1>; 757 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
757 samsung,pin-pud = <0>; 758 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
758 samsung,pin-drv = <0>; 759 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
759 }; 760 };
760 761
761 max98090_irq: max98090-irq { 762 max98090_irq: max98090-irq {
762 samsung,pins = "gpx0-2"; 763 samsung,pins = "gpx0-2";
763 samsung,pin-function = <0>; 764 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
764 samsung,pin-pud = <0>; 765 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
765 samsung,pin-drv = <0>; 766 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
766 }; 767 };
767 768
768 /* We need GPX0_6 to be low at sleep time; just keep it low always */ 769 /* We need GPX0_6 to be low at sleep time; just keep it low always */
769 mask_tpm_reset: mask-tpm-reset { 770 mask_tpm_reset: mask-tpm-reset {
770 samsung,pins = "gpx0-6"; 771 samsung,pins = "gpx0-6";
771 samsung,pin-function = <1>; 772 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
772 samsung,pin-pud = <0>; 773 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
773 samsung,pin-drv = <0>; 774 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
774 samsung,pin-val = <0>; 775 samsung,pin-val = <0>;
775 }; 776 };
776 777
777 tpm_irq: tpm-irq { 778 tpm_irq: tpm-irq {
778 samsung,pins = "gpx1-0"; 779 samsung,pins = "gpx1-0";
779 samsung,pin-function = <0>; 780 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
780 samsung,pin-pud = <0>; 781 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
781 samsung,pin-drv = <0>; 782 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
782 }; 783 };
783 784
784 trackpad_irq: trackpad-irq { 785 trackpad_irq: trackpad-irq {
785 samsung,pins = "gpx1-1"; 786 samsung,pins = "gpx1-1";
786 samsung,pin-function = <0xf>; 787 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
787 samsung,pin-pud = <0>; 788 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
788 samsung,pin-drv = <0>; 789 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
789 }; 790 };
790 791
791 power_key_irq: power-key-irq { 792 power_key_irq: power-key-irq {
792 samsung,pins = "gpx1-2"; 793 samsung,pins = "gpx1-2";
793 samsung,pin-function = <0>; 794 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
794 samsung,pin-pud = <0>; 795 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
795 samsung,pin-drv = <0>; 796 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
796 }; 797 };
797 798
798 ec_irq: ec-irq { 799 ec_irq: ec-irq {
799 samsung,pins = "gpx1-5"; 800 samsung,pins = "gpx1-5";
800 samsung,pin-function = <0>; 801 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
801 samsung,pin-pud = <0>; 802 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
802 samsung,pin-drv = <0>; 803 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
803 }; 804 };
804 805
805 tps65090_irq: tps65090-irq { 806 tps65090_irq: tps65090-irq {
806 samsung,pins = "gpx2-5"; 807 samsung,pins = "gpx2-5";
807 samsung,pin-function = <0>; 808 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
808 samsung,pin-pud = <0>; 809 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
809 samsung,pin-drv = <0>; 810 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
810 }; 811 };
811 812
812 dp_hpd_gpio: dp_hpd_gpio { 813 dp_hpd_gpio: dp_hpd_gpio {
813 samsung,pins = "gpx2-6"; 814 samsung,pins = "gpx2-6";
814 samsung,pin-function = <0>; 815 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
815 samsung,pin-pud = <3>; 816 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
816 samsung,pin-drv = <0>; 817 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
817 }; 818 };
818 819
819 max77802_irq: max77802-irq { 820 max77802_irq: max77802-irq {
820 samsung,pins = "gpx3-1"; 821 samsung,pins = "gpx3-1";
821 samsung,pin-function = <0>; 822 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
822 samsung,pin-pud = <0>; 823 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
823 samsung,pin-drv = <0>; 824 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
824 }; 825 };
825 826
826 lid_irq: lid-irq { 827 lid_irq: lid-irq {
827 samsung,pins = "gpx3-4"; 828 samsung,pins = "gpx3-4";
828 samsung,pin-function = <0xf>; 829 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
829 samsung,pin-pud = <0>; 830 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
830 samsung,pin-drv = <0>; 831 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
831 }; 832 };
832 833
833 hdmi_hpd_irq: hdmi-hpd-irq { 834 hdmi_hpd_irq: hdmi-hpd-irq {
834 samsung,pins = "gpx3-7"; 835 samsung,pins = "gpx3-7";
835 samsung,pin-function = <0>; 836 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
836 samsung,pin-pud = <1>; 837 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
837 samsung,pin-drv = <0>; 838 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
838 }; 839 };
839 840
840 pmic_dvs_1: pmic-dvs-1 { 841 pmic_dvs_1: pmic-dvs-1 {
841 samsung,pins = "gpy7-6"; 842 samsung,pins = "gpy7-6";
842 samsung,pin-function = <1>; 843 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
843 samsung,pin-pud = <0>; 844 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
844 samsung,pin-drv = <0>; 845 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
845 }; 846 };
846}; 847};
847 848
848&pinctrl_1 { 849&pinctrl_1 {
849 /* Adjust WiFi drive strengths lower for EMI */ 850 /* Adjust WiFi drive strengths lower for EMI */
850 sd1_clk: sd1-clk { 851 sd1_clk: sd1-clk {
851 samsung,pin-drv = <2>; 852 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
852 }; 853 };
853 854
854 sd1_cmd: sd1-cmd { 855 sd1_cmd: sd1-cmd {
855 samsung,pin-drv = <2>; 856 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
856 }; 857 };
857 858
858 sd1_bus1: sd1-bus-width1 { 859 sd1_bus1: sd1-bus-width1 {
859 samsung,pin-drv = <2>; 860 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
860 }; 861 };
861 862
862 sd1_bus4: sd1-bus-width4 { 863 sd1_bus4: sd1-bus-width4 {
863 samsung,pin-drv = <2>; 864 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
864 }; 865 };
865 866
866 sd1_bus8: sd1-bus-width8 { 867 sd1_bus8: sd1-bus-width8 {
867 samsung,pin-drv = <2>; 868 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
868 }; 869 };
869}; 870};
870 871
871&pinctrl_2 { 872&pinctrl_2 {
872 pmic_dvs_2: pmic-dvs-2 { 873 pmic_dvs_2: pmic-dvs-2 {
873 samsung,pins = "gpj4-2"; 874 samsung,pins = "gpj4-2";
874 samsung,pin-function = <1>; 875 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
875 samsung,pin-pud = <0>; 876 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
876 samsung,pin-drv = <0>; 877 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
877 }; 878 };
878 879
879 pmic_dvs_3: pmic-dvs-3 { 880 pmic_dvs_3: pmic-dvs-3 {
880 samsung,pins = "gpj4-3"; 881 samsung,pins = "gpj4-3";
881 samsung,pin-function = <1>; 882 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
882 samsung,pin-pud = <0>; 883 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
883 samsung,pin-drv = <0>; 884 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
884 }; 885 };
885}; 886};
886 887
887&pinctrl_3 { 888&pinctrl_3 {
888 /* Drive SPI lines at x2 for better integrity */ 889 /* Drive SPI lines at x2 for better integrity */
889 spi2-bus { 890 spi2-bus {
890 samsung,pin-drv = <2>; 891 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
891 }; 892 };
892 893
893 /* Drive SPI chip select at x2 for better integrity */ 894 /* Drive SPI chip select at x2 for better integrity */
894 ec_spi_cs: ec-spi-cs { 895 ec_spi_cs: ec-spi-cs {
895 samsung,pins = "gpb1-2"; 896 samsung,pins = "gpb1-2";
896 samsung,pin-function = <1>; 897 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
897 samsung,pin-pud = <0>; 898 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
898 samsung,pin-drv = <2>; 899 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
899 }; 900 };
900 901
901 usb300_vbus_en: usb300-vbus-en { 902 usb300_vbus_en: usb300-vbus-en {
902 samsung,pins = "gph0-0"; 903 samsung,pins = "gph0-0";
903 samsung,pin-function = <1>; 904 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
904 samsung,pin-pud = <0>; 905 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
905 samsung,pin-drv = <0>; 906 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
906 }; 907 };
907 908
908 usb301_vbus_en: usb301-vbus-en { 909 usb301_vbus_en: usb301-vbus-en {
909 samsung,pins = "gph0-1"; 910 samsung,pins = "gph0-1";
910 samsung,pin-function = <1>; 911 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
911 samsung,pin-pud = <0>; 912 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
912 samsung,pin-drv = <0>; 913 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
913 }; 914 };
914 915
915 pmic_selb: pmic-selb { 916 pmic_selb: pmic-selb {
916 samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5", 917 samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5",
917 "gph0-6"; 918 "gph0-6";
918 samsung,pin-function = <1>; 919 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
919 samsung,pin-pud = <0>; 920 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
920 samsung,pin-drv = <0>; 921 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
921 }; 922 };
922}; 923};
923 924
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index 14beb7e07323..3924b4fafe72 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -12,6 +12,8 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#include <dt-bindings/pinctrl/samsung.h>
16
15&pinctrl_0 { 17&pinctrl_0 {
16 gpy7: gpy7 { 18 gpy7: gpy7 {
17 gpio-controller; 19 gpio-controller;
@@ -61,9 +63,9 @@
61 63
62 dp_hpd: dp_hpd { 64 dp_hpd: dp_hpd {
63 samsung,pins = "gpx0-7"; 65 samsung,pins = "gpx0-7";
64 samsung,pin-function = <3>; 66 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
65 samsung,pin-pud = <0>; 67 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
66 samsung,pin-drv = <0>; 68 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
67 }; 69 };
68}; 70};
69 71
@@ -153,135 +155,135 @@
153 155
154 sd0_clk: sd0-clk { 156 sd0_clk: sd0-clk {
155 samsung,pins = "gpc0-0"; 157 samsung,pins = "gpc0-0";
156 samsung,pin-function = <2>; 158 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
157 samsung,pin-pud = <0>; 159 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
158 samsung,pin-drv = <3>; 160 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
159 }; 161 };
160 162
161 sd0_cmd: sd0-cmd { 163 sd0_cmd: sd0-cmd {
162 samsung,pins = "gpc0-1"; 164 samsung,pins = "gpc0-1";
163 samsung,pin-function = <2>; 165 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
164 samsung,pin-pud = <0>; 166 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
165 samsung,pin-drv = <3>; 167 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
166 }; 168 };
167 169
168 sd0_cd: sd0-cd { 170 sd0_cd: sd0-cd {
169 samsung,pins = "gpc0-2"; 171 samsung,pins = "gpc0-2";
170 samsung,pin-function = <2>; 172 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
171 samsung,pin-pud = <3>; 173 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
172 samsung,pin-drv = <3>; 174 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
173 }; 175 };
174 176
175 sd0_bus1: sd0-bus-width1 { 177 sd0_bus1: sd0-bus-width1 {
176 samsung,pins = "gpc0-3"; 178 samsung,pins = "gpc0-3";
177 samsung,pin-function = <2>; 179 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
178 samsung,pin-pud = <3>; 180 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
179 samsung,pin-drv = <3>; 181 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
180 }; 182 };
181 183
182 sd0_bus4: sd0-bus-width4 { 184 sd0_bus4: sd0-bus-width4 {
183 samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6"; 185 samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6";
184 samsung,pin-function = <2>; 186 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
185 samsung,pin-pud = <3>; 187 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
186 samsung,pin-drv = <3>; 188 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
187 }; 189 };
188 190
189 sd0_bus8: sd0-bus-width8 { 191 sd0_bus8: sd0-bus-width8 {
190 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; 192 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3";
191 samsung,pin-function = <2>; 193 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
192 samsung,pin-pud = <3>; 194 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
193 samsung,pin-drv = <3>; 195 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
194 }; 196 };
195 197
196 sd0_rclk: sd0-rclk { 198 sd0_rclk: sd0-rclk {
197 samsung,pins = "gpc0-7"; 199 samsung,pins = "gpc0-7";
198 samsung,pin-function = <2>; 200 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
199 samsung,pin-pud = <1>; 201 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
200 samsung,pin-drv = <3>; 202 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
201 }; 203 };
202 204
203 sd1_clk: sd1-clk { 205 sd1_clk: sd1-clk {
204 samsung,pins = "gpc1-0"; 206 samsung,pins = "gpc1-0";
205 samsung,pin-function = <2>; 207 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
206 samsung,pin-pud = <0>; 208 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
207 samsung,pin-drv = <3>; 209 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
208 }; 210 };
209 211
210 sd1_cmd: sd1-cmd { 212 sd1_cmd: sd1-cmd {
211 samsung,pins = "gpc1-1"; 213 samsung,pins = "gpc1-1";
212 samsung,pin-function = <2>; 214 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
213 samsung,pin-pud = <0>; 215 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
214 samsung,pin-drv = <3>; 216 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
215 }; 217 };
216 218
217 sd1_cd: sd1-cd { 219 sd1_cd: sd1-cd {
218 samsung,pins = "gpc1-2"; 220 samsung,pins = "gpc1-2";
219 samsung,pin-function = <2>; 221 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
220 samsung,pin-pud = <3>; 222 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
221 samsung,pin-drv = <3>; 223 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
222 }; 224 };
223 225
224 sd1_int: sd1-int { 226 sd1_int: sd1-int {
225 samsung,pins = "gpd1-1"; 227 samsung,pins = "gpd1-1";
226 samsung,pin-function = <2>; 228 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
227 samsung,pin-pud = <3>; 229 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
228 samsung,pin-drv = <0>; 230 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
229 }; 231 };
230 232
231 sd1_bus1: sd1-bus-width1 { 233 sd1_bus1: sd1-bus-width1 {
232 samsung,pins = "gpc1-3"; 234 samsung,pins = "gpc1-3";
233 samsung,pin-function = <2>; 235 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
234 samsung,pin-pud = <3>; 236 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
235 samsung,pin-drv = <3>; 237 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
236 }; 238 };
237 239
238 sd1_bus4: sd1-bus-width4 { 240 sd1_bus4: sd1-bus-width4 {
239 samsung,pins = "gpc1-4", "gpc1-5", "gpc1-6"; 241 samsung,pins = "gpc1-4", "gpc1-5", "gpc1-6";
240 samsung,pin-function = <2>; 242 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
241 samsung,pin-pud = <3>; 243 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
242 samsung,pin-drv = <3>; 244 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
243 }; 245 };
244 246
245 sd1_bus8: sd1-bus-width8 { 247 sd1_bus8: sd1-bus-width8 {
246 samsung,pins = "gpd1-4", "gpd1-5", "gpd1-6", "gpd1-7"; 248 samsung,pins = "gpd1-4", "gpd1-5", "gpd1-6", "gpd1-7";
247 samsung,pin-function = <2>; 249 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
248 samsung,pin-pud = <3>; 250 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
249 samsung,pin-drv = <3>; 251 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
250 }; 252 };
251 253
252 sd2_clk: sd2-clk { 254 sd2_clk: sd2-clk {
253 samsung,pins = "gpc2-0"; 255 samsung,pins = "gpc2-0";
254 samsung,pin-function = <2>; 256 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
255 samsung,pin-pud = <0>; 257 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
256 samsung,pin-drv = <3>; 258 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
257 }; 259 };
258 260
259 sd2_cmd: sd2-cmd { 261 sd2_cmd: sd2-cmd {
260 samsung,pins = "gpc2-1"; 262 samsung,pins = "gpc2-1";
261 samsung,pin-function = <2>; 263 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
262 samsung,pin-pud = <0>; 264 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
263 samsung,pin-drv = <3>; 265 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
264 }; 266 };
265 267
266 sd2_cd: sd2-cd { 268 sd2_cd: sd2-cd {
267 samsung,pins = "gpc2-2"; 269 samsung,pins = "gpc2-2";
268 samsung,pin-function = <2>; 270 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
269 samsung,pin-pud = <3>; 271 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
270 samsung,pin-drv = <3>; 272 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
271 }; 273 };
272 274
273 sd2_bus1: sd2-bus-width1 { 275 sd2_bus1: sd2-bus-width1 {
274 samsung,pins = "gpc2-3"; 276 samsung,pins = "gpc2-3";
275 samsung,pin-function = <2>; 277 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
276 samsung,pin-pud = <3>; 278 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
277 samsung,pin-drv = <3>; 279 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
278 }; 280 };
279 281
280 sd2_bus4: sd2-bus-width4 { 282 sd2_bus4: sd2-bus-width4 {
281 samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6"; 283 samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6";
282 samsung,pin-function = <2>; 284 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
283 samsung,pin-pud = <3>; 285 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
284 samsung,pin-drv = <3>; 286 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
285 }; 287 };
286}; 288};
287 289
@@ -354,52 +356,52 @@
354 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", 356 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
355 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", 357 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
356 "gpe1-0", "gpe1-1"; 358 "gpe1-0", "gpe1-1";
357 samsung,pin-function = <2>; 359 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
358 samsung,pin-pud = <0>; 360 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
359 samsung,pin-drv = <0>; 361 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
360 }; 362 };
361 363
362 cam_gpio_b: cam-gpio-b { 364 cam_gpio_b: cam-gpio-b {
363 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", 365 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3",
364 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; 366 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
365 samsung,pin-function = <3>; 367 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
366 samsung,pin-pud = <0>; 368 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
367 samsung,pin-drv = <0>; 369 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
368 }; 370 };
369 371
370 cam_i2c2_bus: cam-i2c2-bus { 372 cam_i2c2_bus: cam-i2c2-bus {
371 samsung,pins = "gpf0-4", "gpf0-5"; 373 samsung,pins = "gpf0-4", "gpf0-5";
372 samsung,pin-function = <2>; 374 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
373 samsung,pin-pud = <3>; 375 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
374 samsung,pin-drv = <0>; 376 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
375 }; 377 };
376 378
377 cam_spi1_bus: cam-spi1-bus { 379 cam_spi1_bus: cam-spi1-bus {
378 samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; 380 samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3";
379 samsung,pin-function = <4>; 381 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
380 samsung,pin-pud = <0>; 382 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
381 samsung,pin-drv = <0>; 383 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
382 }; 384 };
383 385
384 cam_i2c1_bus: cam-i2c1-bus { 386 cam_i2c1_bus: cam-i2c1-bus {
385 samsung,pins = "gpf0-2", "gpf0-3"; 387 samsung,pins = "gpf0-2", "gpf0-3";
386 samsung,pin-function = <2>; 388 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
387 samsung,pin-pud = <3>; 389 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
388 samsung,pin-drv = <0>; 390 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
389 }; 391 };
390 392
391 cam_i2c0_bus: cam-i2c0-bus { 393 cam_i2c0_bus: cam-i2c0-bus {
392 samsung,pins = "gpf0-0", "gpf0-1"; 394 samsung,pins = "gpf0-0", "gpf0-1";
393 samsung,pin-function = <2>; 395 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
394 samsung,pin-pud = <3>; 396 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
395 samsung,pin-drv = <0>; 397 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
396 }; 398 };
397 399
398 cam_spi0_bus: cam-spi0-bus { 400 cam_spi0_bus: cam-spi0-bus {
399 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; 401 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
400 samsung,pin-function = <2>; 402 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
401 samsung,pin-pud = <0>; 403 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
402 samsung,pin-drv = <0>; 404 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
403 }; 405 };
404 406
405 cam_bayrgb_bus: cam-bayrgb-bus { 407 cam_bayrgb_bus: cam-bayrgb-bus {
@@ -408,9 +410,9 @@
408 "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", 410 "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3",
409 "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7", 411 "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7",
410 "gpg2-0"; 412 "gpg2-0";
411 samsung,pin-function = <2>; 413 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
412 samsung,pin-pud = <0>; 414 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
413 samsung,pin-drv = <0>; 415 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
414 }; 416 };
415}; 417};
416 418
@@ -489,216 +491,216 @@
489 491
490 uart0_data: uart0-data { 492 uart0_data: uart0-data {
491 samsung,pins = "gpa0-0", "gpa0-1"; 493 samsung,pins = "gpa0-0", "gpa0-1";
492 samsung,pin-function = <2>; 494 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
493 samsung,pin-pud = <0>; 495 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
494 samsung,pin-drv = <0>; 496 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
495 }; 497 };
496 498
497 uart0_fctl: uart0-fctl { 499 uart0_fctl: uart0-fctl {
498 samsung,pins = "gpa0-2", "gpa0-3"; 500 samsung,pins = "gpa0-2", "gpa0-3";
499 samsung,pin-function = <2>; 501 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
500 samsung,pin-pud = <0>; 502 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
501 samsung,pin-drv = <0>; 503 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
502 }; 504 };
503 505
504 uart1_data: uart1-data { 506 uart1_data: uart1-data {
505 samsung,pins = "gpa0-4", "gpa0-5"; 507 samsung,pins = "gpa0-4", "gpa0-5";
506 samsung,pin-function = <2>; 508 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
507 samsung,pin-pud = <0>; 509 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
508 samsung,pin-drv = <0>; 510 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
509 }; 511 };
510 512
511 uart1_fctl: uart1-fctl { 513 uart1_fctl: uart1-fctl {
512 samsung,pins = "gpa0-6", "gpa0-7"; 514 samsung,pins = "gpa0-6", "gpa0-7";
513 samsung,pin-function = <2>; 515 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
514 samsung,pin-pud = <0>; 516 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
515 samsung,pin-drv = <0>; 517 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
516 }; 518 };
517 519
518 i2c2_bus: i2c2-bus { 520 i2c2_bus: i2c2-bus {
519 samsung,pins = "gpa0-6", "gpa0-7"; 521 samsung,pins = "gpa0-6", "gpa0-7";
520 samsung,pin-function = <3>; 522 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
521 samsung,pin-pud = <3>; 523 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
522 samsung,pin-drv = <0>; 524 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
523 }; 525 };
524 526
525 uart2_data: uart2-data { 527 uart2_data: uart2-data {
526 samsung,pins = "gpa1-0", "gpa1-1"; 528 samsung,pins = "gpa1-0", "gpa1-1";
527 samsung,pin-function = <2>; 529 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
528 samsung,pin-pud = <0>; 530 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
529 samsung,pin-drv = <0>; 531 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
530 }; 532 };
531 533
532 uart2_fctl: uart2-fctl { 534 uart2_fctl: uart2-fctl {
533 samsung,pins = "gpa1-2", "gpa1-3"; 535 samsung,pins = "gpa1-2", "gpa1-3";
534 samsung,pin-function = <2>; 536 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
535 samsung,pin-pud = <0>; 537 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
536 samsung,pin-drv = <0>; 538 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
537 }; 539 };
538 540
539 i2c3_bus: i2c3-bus { 541 i2c3_bus: i2c3-bus {
540 samsung,pins = "gpa1-2", "gpa1-3"; 542 samsung,pins = "gpa1-2", "gpa1-3";
541 samsung,pin-function = <3>; 543 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
542 samsung,pin-pud = <3>; 544 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
543 samsung,pin-drv = <0>; 545 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
544 }; 546 };
545 547
546 uart3_data: uart3-data { 548 uart3_data: uart3-data {
547 samsung,pins = "gpa1-4", "gpa1-5"; 549 samsung,pins = "gpa1-4", "gpa1-5";
548 samsung,pin-function = <2>; 550 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
549 samsung,pin-pud = <0>; 551 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
550 samsung,pin-drv = <0>; 552 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
551 }; 553 };
552 554
553 spi0_bus: spi0-bus { 555 spi0_bus: spi0-bus {
554 samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3"; 556 samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3";
555 samsung,pin-function = <2>; 557 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
556 samsung,pin-pud = <3>; 558 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
557 samsung,pin-drv = <0>; 559 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
558 }; 560 };
559 561
560 spi1_bus: spi1-bus { 562 spi1_bus: spi1-bus {
561 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; 563 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7";
562 samsung,pin-function = <2>; 564 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
563 samsung,pin-pud = <3>; 565 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
564 samsung,pin-drv = <0>; 566 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
565 }; 567 };
566 568
567 i2c4_hs_bus: i2c4-hs-bus { 569 i2c4_hs_bus: i2c4-hs-bus {
568 samsung,pins = "gpa2-0", "gpa2-1"; 570 samsung,pins = "gpa2-0", "gpa2-1";
569 samsung,pin-function = <3>; 571 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
570 samsung,pin-pud = <3>; 572 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
571 samsung,pin-drv = <0>; 573 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
572 }; 574 };
573 575
574 i2c5_hs_bus: i2c5-hs-bus { 576 i2c5_hs_bus: i2c5-hs-bus {
575 samsung,pins = "gpa2-2", "gpa2-3"; 577 samsung,pins = "gpa2-2", "gpa2-3";
576 samsung,pin-function = <3>; 578 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
577 samsung,pin-pud = <3>; 579 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
578 samsung,pin-drv = <0>; 580 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
579 }; 581 };
580 582
581 i2s1_bus: i2s1-bus { 583 i2s1_bus: i2s1-bus {
582 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", 584 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
583 "gpb0-4"; 585 "gpb0-4";
584 samsung,pin-function = <2>; 586 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
585 samsung,pin-pud = <0>; 587 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
586 samsung,pin-drv = <0>; 588 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
587 }; 589 };
588 590
589 pcm1_bus: pcm1-bus { 591 pcm1_bus: pcm1-bus {
590 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", 592 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
591 "gpb0-4"; 593 "gpb0-4";
592 samsung,pin-function = <3>; 594 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
593 samsung,pin-pud = <0>; 595 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
594 samsung,pin-drv = <0>; 596 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
595 }; 597 };
596 598
597 i2s2_bus: i2s2-bus { 599 i2s2_bus: i2s2-bus {
598 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", 600 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3",
599 "gpb1-4"; 601 "gpb1-4";
600 samsung,pin-function = <2>; 602 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
601 samsung,pin-pud = <0>; 603 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
602 samsung,pin-drv = <0>; 604 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
603 }; 605 };
604 606
605 pcm2_bus: pcm2-bus { 607 pcm2_bus: pcm2-bus {
606 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", 608 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3",
607 "gpb1-4"; 609 "gpb1-4";
608 samsung,pin-function = <3>; 610 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
609 samsung,pin-pud = <0>; 611 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
610 samsung,pin-drv = <0>; 612 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
611 }; 613 };
612 614
613 spdif_bus: spdif-bus { 615 spdif_bus: spdif-bus {
614 samsung,pins = "gpb1-0", "gpb1-1"; 616 samsung,pins = "gpb1-0", "gpb1-1";
615 samsung,pin-function = <4>; 617 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
616 samsung,pin-pud = <0>; 618 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
617 samsung,pin-drv = <0>; 619 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
618 }; 620 };
619 621
620 spi2_bus: spi2-bus { 622 spi2_bus: spi2-bus {
621 samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; 623 samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4";
622 samsung,pin-function = <5>; 624 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
623 samsung,pin-pud = <3>; 625 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
624 samsung,pin-drv = <0>; 626 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
625 }; 627 };
626 628
627 i2c6_hs_bus: i2c6-hs-bus { 629 i2c6_hs_bus: i2c6-hs-bus {
628 samsung,pins = "gpb1-3", "gpb1-4"; 630 samsung,pins = "gpb1-3", "gpb1-4";
629 samsung,pin-function = <4>; 631 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
630 samsung,pin-pud = <3>; 632 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
631 samsung,pin-drv = <0>; 633 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
632 }; 634 };
633 635
634 pwm0_out: pwm0-out { 636 pwm0_out: pwm0-out {
635 samsung,pins = "gpb2-0"; 637 samsung,pins = "gpb2-0";
636 samsung,pin-function = <2>; 638 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
637 samsung,pin-pud = <0>; 639 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
638 samsung,pin-drv = <0>; 640 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
639 }; 641 };
640 642
641 pwm1_out: pwm1-out { 643 pwm1_out: pwm1-out {
642 samsung,pins = "gpb2-1"; 644 samsung,pins = "gpb2-1";
643 samsung,pin-function = <2>; 645 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
644 samsung,pin-pud = <0>; 646 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
645 samsung,pin-drv = <0>; 647 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
646 }; 648 };
647 649
648 pwm2_out: pwm2-out { 650 pwm2_out: pwm2-out {
649 samsung,pins = "gpb2-2"; 651 samsung,pins = "gpb2-2";
650 samsung,pin-function = <2>; 652 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
651 samsung,pin-pud = <0>; 653 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
652 samsung,pin-drv = <0>; 654 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
653 }; 655 };
654 656
655 pwm3_out: pwm3-out { 657 pwm3_out: pwm3-out {
656 samsung,pins = "gpb2-3"; 658 samsung,pins = "gpb2-3";
657 samsung,pin-function = <2>; 659 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
658 samsung,pin-pud = <0>; 660 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
659 samsung,pin-drv = <0>; 661 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
660 }; 662 };
661 663
662 i2c7_hs_bus: i2c7-hs-bus { 664 i2c7_hs_bus: i2c7-hs-bus {
663 samsung,pins = "gpb2-2", "gpb2-3"; 665 samsung,pins = "gpb2-2", "gpb2-3";
664 samsung,pin-function = <3>; 666 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
665 samsung,pin-pud = <3>; 667 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
666 samsung,pin-drv = <0>; 668 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
667 }; 669 };
668 670
669 i2c0_bus: i2c0-bus { 671 i2c0_bus: i2c0-bus {
670 samsung,pins = "gpb3-0", "gpb3-1"; 672 samsung,pins = "gpb3-0", "gpb3-1";
671 samsung,pin-function = <2>; 673 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
672 samsung,pin-pud = <3>; 674 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
673 samsung,pin-drv = <0>; 675 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
674 }; 676 };
675 677
676 i2c1_bus: i2c1-bus { 678 i2c1_bus: i2c1-bus {
677 samsung,pins = "gpb3-2", "gpb3-3"; 679 samsung,pins = "gpb3-2", "gpb3-3";
678 samsung,pin-function = <2>; 680 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
679 samsung,pin-pud = <3>; 681 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
680 samsung,pin-drv = <0>; 682 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
681 }; 683 };
682 684
683 i2c8_hs_bus: i2c8-hs-bus { 685 i2c8_hs_bus: i2c8-hs-bus {
684 samsung,pins = "gpb3-4", "gpb3-5"; 686 samsung,pins = "gpb3-4", "gpb3-5";
685 samsung,pin-function = <2>; 687 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
686 samsung,pin-pud = <3>; 688 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
687 samsung,pin-drv = <0>; 689 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
688 }; 690 };
689 691
690 i2c9_hs_bus: i2c9-hs-bus { 692 i2c9_hs_bus: i2c9-hs-bus {
691 samsung,pins = "gpb3-6", "gpb3-7"; 693 samsung,pins = "gpb3-6", "gpb3-7";
692 samsung,pin-function = <2>; 694 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
693 samsung,pin-pud = <3>; 695 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
694 samsung,pin-drv = <0>; 696 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
695 }; 697 };
696 698
697 i2c10_hs_bus: i2c10-hs-bus { 699 i2c10_hs_bus: i2c10-hs-bus {
698 samsung,pins = "gpb4-0", "gpb4-1"; 700 samsung,pins = "gpb4-0", "gpb4-1";
699 samsung,pin-function = <2>; 701 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
700 samsung,pin-pud = <3>; 702 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
701 samsung,pin-drv = <0>; 703 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
702 }; 704 };
703}; 705};
704 706
@@ -714,8 +716,8 @@
714 i2s0_bus: i2s0-bus { 716 i2s0_bus: i2s0-bus {
715 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", 717 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
716 "gpz-4", "gpz-5", "gpz-6"; 718 "gpz-4", "gpz-5", "gpz-6";
717 samsung,pin-function = <2>; 719 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
718 samsung,pin-pud = <0>; 720 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
719 samsung,pin-drv = <0>; 721 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
720 }; 722 };
721}; 723};
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index ed8f3426911b..aaccd0da41e5 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -19,7 +19,8 @@
19 model = "Samsung SMDK5420 board based on EXYNOS5420"; 19 model = "Samsung SMDK5420 board based on EXYNOS5420";
20 compatible = "samsung,smdk5420", "samsung,exynos5420", "samsung,exynos5"; 20 compatible = "samsung,smdk5420", "samsung,exynos5420", "samsung,exynos5";
21 21
22 memory { 22 memory@20000000 {
23 device_type = "memory";
23 reg = <0x20000000 0x80000000>; 24 reg = <0x20000000 0x80000000>;
24 }; 25 };
25 26
@@ -130,7 +131,7 @@
130 131
131&hdmi { 132&hdmi {
132 status = "okay"; 133 status = "okay";
133 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 134 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
134 pinctrl-names = "default"; 135 pinctrl-names = "default";
135 pinctrl-0 = <&hdmi_hpd_irq>; 136 pinctrl-0 = <&hdmi_hpd_irq>;
136}; 137};
@@ -386,25 +387,25 @@
386&pinctrl_0 { 387&pinctrl_0 {
387 hdmi_hpd_irq: hdmi-hpd-irq { 388 hdmi_hpd_irq: hdmi-hpd-irq {
388 samsung,pins = "gpx3-7"; 389 samsung,pins = "gpx3-7";
389 samsung,pin-function = <0>; 390 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
390 samsung,pin-pud = <1>; 391 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
391 samsung,pin-drv = <0>; 392 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
392 }; 393 };
393}; 394};
394 395
395&pinctrl_2 { 396&pinctrl_2 {
396 usb300_vbus_en: usb300-vbus-en { 397 usb300_vbus_en: usb300-vbus-en {
397 samsung,pins = "gpg0-5"; 398 samsung,pins = "gpg0-5";
398 samsung,pin-function = <1>; 399 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
399 samsung,pin-pud = <0>; 400 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
400 samsung,pin-drv = <0>; 401 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
401 }; 402 };
402 403
403 usb301_vbus_en: usb301-vbus-en { 404 usb301_vbus_en: usb301-vbus-en {
404 samsung,pins = "gpg1-4"; 405 samsung,pins = "gpg1-4";
405 samsung,pin-function = <1>; 406 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
406 samsung,pin-pud = <0>; 407 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
407 samsung,pin-drv = <0>; 408 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
408 }; 409 };
409}; 410};
410 411
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index d56253049ccb..246d298557f5 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -21,12 +21,13 @@
21#include "exynos-mfc-reserved-memory.dtsi" 21#include "exynos-mfc-reserved-memory.dtsi"
22 22
23/ { 23/ {
24 memory { 24 memory@40000000 {
25 device_type = "memory";
25 reg = <0x40000000 0x7EA00000>; 26 reg = <0x40000000 0x7EA00000>;
26 }; 27 };
27 28
28 chosen { 29 chosen {
29 linux,stdout-path = &serial_2; 30 stdout-path = "serial2:115200n8";
30 }; 31 };
31 32
32 firmware@02073000 { 33 firmware@02073000 {
@@ -250,7 +251,7 @@
250 251
251&hdmi { 252&hdmi {
252 status = "okay"; 253 status = "okay";
253 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 254 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
254 pinctrl-names = "default"; 255 pinctrl-names = "default";
255 pinctrl-0 = <&hdmi_hpd_irq>; 256 pinctrl-0 = <&hdmi_hpd_irq>;
256 257
@@ -548,25 +549,25 @@
548&pinctrl_0 { 549&pinctrl_0 {
549 hdmi_hpd_irq: hdmi-hpd-irq { 550 hdmi_hpd_irq: hdmi-hpd-irq {
550 samsung,pins = "gpx3-7"; 551 samsung,pins = "gpx3-7";
551 samsung,pin-function = <0>; 552 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
552 samsung,pin-pud = <1>; 553 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
553 samsung,pin-drv = <0>; 554 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
554 }; 555 };
555 556
556 s2mps11_irq: s2mps11-irq { 557 s2mps11_irq: s2mps11-irq {
557 samsung,pins = "gpx0-4"; 558 samsung,pins = "gpx0-4";
558 samsung,pin-function = <0xf>; 559 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
559 samsung,pin-pud = <0>; 560 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
560 samsung,pin-drv = <0>; 561 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
561 }; 562 };
562}; 563};
563 564
564&pinctrl_1 { 565&pinctrl_1 {
565 emmc_nrst_pin: emmc-nrst { 566 emmc_nrst_pin: emmc-nrst {
566 samsung,pins = "gpd1-0"; 567 samsung,pins = "gpd1-0";
567 samsung,pin-function = <0>; 568 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
568 samsung,pin-pud = <0>; 569 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
569 samsung,pin-drv = <0>; 570 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
570 }; 571 };
571}; 572};
572 573
diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts
index a98501bab6fc..ad6f533b3f40 100644
--- a/arch/arm/boot/dts/exynos5440-sd5v1.dts
+++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts
@@ -20,6 +20,12 @@
20 bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; 20 bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200";
21 }; 21 };
22 22
23 /* FIXME: set reg property with correct start address and size */
24 memory@0 {
25 device_type = "memory";
26 reg = <0 0>;
27 };
28
23 fixed-rate-clocks { 29 fixed-rate-clocks {
24 xtal { 30 xtal {
25 compatible = "samsung,clock-xtal"; 31 compatible = "samsung,clock-xtal";
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index 6a0d802e87c8..92bd2c6f7631 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -21,6 +21,12 @@
21 bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; 21 bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200";
22 }; 22 };
23 23
24 /* FIXME: set reg property with correct start address and size */
25 memory@0 {
26 device_type = "memory";
27 reg = <0 0>;
28 };
29
24 fixed-rate-clocks { 30 fixed-rate-clocks {
25 xtal { 31 xtal {
26 compatible = "samsung,clock-xtal"; 32 compatible = "samsung,clock-xtal";
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index fd176819b4bf..e6bffd13cedd 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -10,12 +10,13 @@
10*/ 10*/
11 11
12#include <dt-bindings/clock/exynos5440.h> 12#include <dt-bindings/clock/exynos5440.h>
13#include "skeleton.dtsi"
14 13
15/ { 14/ {
16 compatible = "samsung,exynos5440", "samsung,exynos5"; 15 compatible = "samsung,exynos5440", "samsung,exynos5";
17 16
18 interrupt-parent = <&gic>; 17 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <1>;
19 20
20 aliases { 21 aliases {
21 serial0 = &serial_0; 22 serial0 = &serial_0;
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 06a604911e87..9d31cdce1959 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -14,7 +14,6 @@
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 */ 15 */
16 16
17#include "skeleton.dtsi"
18#include "exynos5.dtsi" 17#include "exynos5.dtsi"
19 18
20/ { 19/ {
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 5ec71e2400fd..01f466816fea 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -79,7 +79,8 @@
79 79
80 }; 80 };
81 81
82 memory { 82 memory@20000000 {
83 device_type = "memory";
83 reg = <0x20000000 0x80000000>; 84 reg = <0x20000000 0x80000000>;
84 }; 85 };
85 86
@@ -179,7 +180,7 @@
179 180
180&hdmi { 181&hdmi {
181 status = "okay"; 182 status = "okay";
182 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 183 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
183 pinctrl-names = "default"; 184 pinctrl-names = "default";
184 pinctrl-0 = <&hdmi_hpd_irq>; 185 pinctrl-0 = <&hdmi_hpd_irq>;
185 ddc = <&i2c_2>; 186 ddc = <&i2c_2>;
@@ -722,171 +723,171 @@
722 723
723 wifi_en: wifi-en { 724 wifi_en: wifi-en {
724 samsung,pins = "gpx0-0"; 725 samsung,pins = "gpx0-0";
725 samsung,pin-function = <1>; 726 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
726 samsung,pin-pud = <0>; 727 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
727 samsung,pin-drv = <0>; 728 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
728 }; 729 };
729 730
730 max98091_irq: max98091-irq { 731 max98091_irq: max98091-irq {
731 samsung,pins = "gpx0-2"; 732 samsung,pins = "gpx0-2";
732 samsung,pin-function = <0>; 733 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
733 samsung,pin-pud = <0>; 734 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
734 samsung,pin-drv = <0>; 735 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
735 }; 736 };
736 737
737 /* We need GPX0_6 to be low at sleep time; just keep it low always */ 738 /* We need GPX0_6 to be low at sleep time; just keep it low always */
738 mask_tpm_reset: mask-tpm-reset { 739 mask_tpm_reset: mask-tpm-reset {
739 samsung,pins = "gpx0-6"; 740 samsung,pins = "gpx0-6";
740 samsung,pin-function = <1>; 741 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
741 samsung,pin-pud = <0>; 742 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
742 samsung,pin-drv = <0>; 743 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
743 samsung,pin-val = <0>; 744 samsung,pin-val = <0>;
744 }; 745 };
745 746
746 tpm_irq: tpm-irq { 747 tpm_irq: tpm-irq {
747 samsung,pins = "gpx1-0"; 748 samsung,pins = "gpx1-0";
748 samsung,pin-function = <0>; 749 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
749 samsung,pin-pud = <0>; 750 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
750 samsung,pin-drv = <0>; 751 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
751 }; 752 };
752 753
753 trackpad_irq: trackpad-irq { 754 trackpad_irq: trackpad-irq {
754 samsung,pins = "gpx1-1"; 755 samsung,pins = "gpx1-1";
755 samsung,pin-function = <0xf>; 756 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
756 samsung,pin-pud = <0>; 757 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
757 samsung,pin-drv = <0>; 758 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
758 }; 759 };
759 760
760 power_key_irq: power-key-irq { 761 power_key_irq: power-key-irq {
761 samsung,pins = "gpx1-2"; 762 samsung,pins = "gpx1-2";
762 samsung,pin-function = <0>; 763 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
763 samsung,pin-pud = <0>; 764 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
764 samsung,pin-drv = <0>; 765 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
765 }; 766 };
766 767
767 ec_irq: ec-irq { 768 ec_irq: ec-irq {
768 samsung,pins = "gpx1-5"; 769 samsung,pins = "gpx1-5";
769 samsung,pin-function = <0>; 770 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
770 samsung,pin-pud = <0>; 771 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
771 samsung,pin-drv = <0>; 772 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
772 }; 773 };
773 774
774 tps65090_irq: tps65090-irq { 775 tps65090_irq: tps65090-irq {
775 samsung,pins = "gpx2-5"; 776 samsung,pins = "gpx2-5";
776 samsung,pin-function = <0>; 777 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
777 samsung,pin-pud = <0>; 778 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
778 samsung,pin-drv = <0>; 779 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
779 }; 780 };
780 781
781 dp_hpd_gpio: dp_hpd_gpio { 782 dp_hpd_gpio: dp_hpd_gpio {
782 samsung,pins = "gpx2-6"; 783 samsung,pins = "gpx2-6";
783 samsung,pin-function = <0>; 784 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
784 samsung,pin-pud = <3>; 785 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
785 samsung,pin-drv = <0>; 786 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
786 }; 787 };
787 788
788 max77802_irq: max77802-irq { 789 max77802_irq: max77802-irq {
789 samsung,pins = "gpx3-1"; 790 samsung,pins = "gpx3-1";
790 samsung,pin-function = <0>; 791 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
791 samsung,pin-pud = <0>; 792 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
792 samsung,pin-drv = <0>; 793 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
793 }; 794 };
794 795
795 lid_irq: lid-irq { 796 lid_irq: lid-irq {
796 samsung,pins = "gpx3-4"; 797 samsung,pins = "gpx3-4";
797 samsung,pin-function = <0xf>; 798 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
798 samsung,pin-pud = <0>; 799 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
799 samsung,pin-drv = <0>; 800 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
800 }; 801 };
801 802
802 hdmi_hpd_irq: hdmi-hpd-irq { 803 hdmi_hpd_irq: hdmi-hpd-irq {
803 samsung,pins = "gpx3-7"; 804 samsung,pins = "gpx3-7";
804 samsung,pin-function = <0>; 805 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
805 samsung,pin-pud = <1>; 806 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
806 samsung,pin-drv = <0>; 807 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
807 }; 808 };
808 809
809 pmic_dvs_1: pmic-dvs-1 { 810 pmic_dvs_1: pmic-dvs-1 {
810 samsung,pins = "gpy7-6"; 811 samsung,pins = "gpy7-6";
811 samsung,pin-function = <1>; 812 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
812 samsung,pin-pud = <0>; 813 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
813 samsung,pin-drv = <0>; 814 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
814 }; 815 };
815}; 816};
816 817
817&pinctrl_1 { 818&pinctrl_1 {
818 /* Adjust WiFi drive strengths lower for EMI */ 819 /* Adjust WiFi drive strengths lower for EMI */
819 sd1_clk: sd1-clk { 820 sd1_clk: sd1-clk {
820 samsung,pin-drv = <2>; 821 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
821 }; 822 };
822 823
823 sd1_cmd: sd1-cmd { 824 sd1_cmd: sd1-cmd {
824 samsung,pin-drv = <2>; 825 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
825 }; 826 };
826 827
827 sd1_bus1: sd1-bus-width1 { 828 sd1_bus1: sd1-bus-width1 {
828 samsung,pin-drv = <2>; 829 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
829 }; 830 };
830 831
831 sd1_bus4: sd1-bus-width4 { 832 sd1_bus4: sd1-bus-width4 {
832 samsung,pin-drv = <2>; 833 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
833 }; 834 };
834 835
835 sd1_bus8: sd1-bus-width8 { 836 sd1_bus8: sd1-bus-width8 {
836 samsung,pin-drv = <2>; 837 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
837 }; 838 };
838}; 839};
839 840
840&pinctrl_2 { 841&pinctrl_2 {
841 pmic_dvs_2: pmic-dvs-2 { 842 pmic_dvs_2: pmic-dvs-2 {
842 samsung,pins = "gpj4-2"; 843 samsung,pins = "gpj4-2";
843 samsung,pin-function = <1>; 844 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
844 samsung,pin-pud = <0>; 845 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
845 samsung,pin-drv = <0>; 846 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
846 }; 847 };
847 848
848 pmic_dvs_3: pmic-dvs-3 { 849 pmic_dvs_3: pmic-dvs-3 {
849 samsung,pins = "gpj4-3"; 850 samsung,pins = "gpj4-3";
850 samsung,pin-function = <1>; 851 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
851 samsung,pin-pud = <0>; 852 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
852 samsung,pin-drv = <0>; 853 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
853 }; 854 };
854}; 855};
855 856
856&pinctrl_3 { 857&pinctrl_3 {
857 /* Drive SPI lines at x2 for better integrity */ 858 /* Drive SPI lines at x2 for better integrity */
858 spi2-bus { 859 spi2-bus {
859 samsung,pin-drv = <2>; 860 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
860 }; 861 };
861 862
862 /* Drive SPI chip select at x2 for better integrity */ 863 /* Drive SPI chip select at x2 for better integrity */
863 ec_spi_cs: ec-spi-cs { 864 ec_spi_cs: ec-spi-cs {
864 samsung,pins = "gpb1-2"; 865 samsung,pins = "gpb1-2";
865 samsung,pin-function = <1>; 866 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
866 samsung,pin-pud = <0>; 867 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
867 samsung,pin-drv = <2>; 868 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>;
868 }; 869 };
869 870
870 usb300_vbus_en: usb300-vbus-en { 871 usb300_vbus_en: usb300-vbus-en {
871 samsung,pins = "gph0-0"; 872 samsung,pins = "gph0-0";
872 samsung,pin-function = <1>; 873 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
873 samsung,pin-pud = <0>; 874 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
874 samsung,pin-drv = <0>; 875 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
875 }; 876 };
876 877
877 usb301_vbus_en: usb301-vbus-en { 878 usb301_vbus_en: usb301-vbus-en {
878 samsung,pins = "gph0-1"; 879 samsung,pins = "gph0-1";
879 samsung,pin-function = <1>; 880 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
880 samsung,pin-pud = <0>; 881 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
881 samsung,pin-drv = <0>; 882 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
882 }; 883 };
883 884
884 pmic_selb: pmic-selb { 885 pmic_selb: pmic-selb {
885 samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5", 886 samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5",
886 "gph0-6"; 887 "gph0-6";
887 samsung,pin-function = <1>; 888 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
888 samsung,pin-pud = <0>; 889 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
889 samsung,pin-drv = <0>; 890 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
890 }; 891 };
891}; 892};
892 893
diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dtsi
index 490b7b44f1e7..f812d586c5ce 100644
--- a/arch/arm/boot/dts/imx35.dtsi
+++ b/arch/arm/boot/dts/imx35.dtsi
@@ -309,6 +309,13 @@
309 status = "disabled"; 309 status = "disabled";
310 }; 310 };
311 311
312 iim@53ff0000 {
313 compatible = "fsl,imx35-iim";
314 reg = <0x53ff0000 0x4000>;
315 interrupts = <19>;
316 clocks = <&clks 80>;
317 };
318
312 usbotg: usb@53ff4000 { 319 usbotg: usb@53ff4000 {
313 compatible = "fsl,imx35-usb", "fsl,imx27-usb"; 320 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
314 reg = <0x53ff4000 0x0200>; 321 reg = <0x53ff4000 0x0200>;
diff --git a/arch/arm/boot/dts/imx50.dtsi b/arch/arm/boot/dts/imx50.dtsi
index e2457138311f..8fe8beeb68a4 100644
--- a/arch/arm/boot/dts/imx50.dtsi
+++ b/arch/arm/boot/dts/imx50.dtsi
@@ -227,6 +227,7 @@
227 #gpio-cells = <2>; 227 #gpio-cells = <2>;
228 interrupt-controller; 228 interrupt-controller;
229 #interrupt-cells = <2>; 229 #interrupt-cells = <2>;
230 gpio-ranges = <&iomuxc 0 151 28>;
230 }; 231 };
231 232
232 gpio2: gpio@53f88000 { 233 gpio2: gpio@53f88000 {
@@ -237,6 +238,10 @@
237 #gpio-cells = <2>; 238 #gpio-cells = <2>;
238 interrupt-controller; 239 interrupt-controller;
239 #interrupt-cells = <2>; 240 #interrupt-cells = <2>;
241 gpio-ranges = <&iomuxc 0 75 8>, <&iomuxc 8 100 8>,
242 <&iomuxc 16 83 1>, <&iomuxc 17 85 1>,
243 <&iomuxc 18 87 1>, <&iomuxc 19 84 1>,
244 <&iomuxc 20 88 1>, <&iomuxc 21 86 1>;
240 }; 245 };
241 246
242 gpio3: gpio@53f8c000 { 247 gpio3: gpio@53f8c000 {
@@ -247,6 +252,7 @@
247 #gpio-cells = <2>; 252 #gpio-cells = <2>;
248 interrupt-controller; 253 interrupt-controller;
249 #interrupt-cells = <2>; 254 #interrupt-cells = <2>;
255 gpio-ranges = <&iomuxc 0 108 32>;
250 }; 256 };
251 257
252 gpio4: gpio@53f90000 { 258 gpio4: gpio@53f90000 {
@@ -257,6 +263,8 @@
257 #gpio-cells = <2>; 263 #gpio-cells = <2>;
258 interrupt-controller; 264 interrupt-controller;
259 #interrupt-cells = <2>; 265 #interrupt-cells = <2>;
266 gpio-ranges = <&iomuxc 0 8 8>, <&iomuxc 8 45 12>,
267 <&iomuxc 20 140 11>;
260 }; 268 };
261 269
262 wdog1: wdog@53f98000 { 270 wdog1: wdog@53f98000 {
@@ -346,6 +354,7 @@
346 #gpio-cells = <2>; 354 #gpio-cells = <2>;
347 interrupt-controller; 355 interrupt-controller;
348 #interrupt-cells = <2>; 356 #interrupt-cells = <2>;
357 gpio-ranges = <&iomuxc 0 57 18>, <&iomuxc 18 89 11>;
349 }; 358 };
350 359
351 gpio6: gpio@53fe0000 { 360 gpio6: gpio@53fe0000 {
@@ -356,6 +365,7 @@
356 #gpio-cells = <2>; 365 #gpio-cells = <2>;
357 interrupt-controller; 366 interrupt-controller;
358 #interrupt-cells = <2>; 367 #interrupt-cells = <2>;
368 gpio-ranges = <&iomuxc 0 27 18>, <&iomuxc 18 16 11>;
359 }; 369 };
360 370
361 i2c3: i2c@53fec000 { 371 i2c3: i2c@53fec000 {
diff --git a/arch/arm/boot/dts/imx53-usbarmory.dts b/arch/arm/boot/dts/imx53-usbarmory.dts
new file mode 100644
index 000000000000..6782d7fc5961
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-usbarmory.dts
@@ -0,0 +1,224 @@
1/*
2 * USB armory MkI device tree file
3 * https://inversepath.com/usbarmory
4 *
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPL or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This file is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This file is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48#include "imx53.dtsi"
49
50/ {
51 model = "Inverse Path USB armory";
52 compatible = "inversepath,imx53-usbarmory", "fsl,imx53";
53};
54
55/ {
56 chosen {
57 stdout-path = &uart1;
58 };
59
60 memory {
61 reg = <0x70000000 0x20000000>;
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_led>;
68
69 user {
70 label = "LED";
71 gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
72 linux,default-trigger = "heartbeat";
73 };
74 };
75};
76
77/*
78 * Not every i.MX53 P/N supports clock > 800MHz.
79 * As USB armory does not mount a specific P/N set a safe clock upper limit.
80 */
81&cpu0 {
82 operating-points = <
83 /* kHz */
84 166666 850000
85 400000 900000
86 800000 1050000
87 >;
88};
89
90&esdhc1 {
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_esdhc1>;
93 status = "okay";
94};
95
96&iomuxc {
97 pinctrl_esdhc1: esdhc1grp {
98 fsl,pins = <
99 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
100 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
101 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
102 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
103 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
104 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
105 >;
106 };
107
108 pinctrl_i2c1_pmic: i2c1grp {
109 fsl,pins = <
110 MX53_PAD_EIM_D21__I2C1_SCL 0x80
111 MX53_PAD_EIM_D28__I2C1_SDA 0x80
112 >;
113 };
114
115 pinctrl_led: ledgrp {
116 fsl,pins = <
117 MX53_PAD_DISP0_DAT6__GPIO4_27 0x1e4
118 >;
119 };
120
121 /*
122 * UART mode pin header configration
123 * 3 - GPIO5[26], pull-down 100K
124 * 4 - GPIO5[27], pull-down 100K
125 * 5 - TX, pull-up 100K
126 * 6 - RX, pull-up 100K
127 * 7 - GPIO5[30], pull-down 100K
128 */
129 pinctrl_uart1: uart1grp {
130 fsl,pins = <
131 MX53_PAD_CSI0_DAT8__GPIO5_26 0xc0
132 MX53_PAD_CSI0_DAT9__GPIO5_27 0xc0
133 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
134 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
135 MX53_PAD_CSI0_DAT12__GPIO5_30 0xc0
136 >;
137 };
138};
139
140&i2c1 {
141 pinctrl-0 = <&pinctrl_i2c1_pmic>;
142 status = "okay";
143
144 ltc3589: pmic@34 {
145 compatible = "lltc,ltc3589-2";
146 reg = <0x34>;
147
148 regulators {
149 sw1_reg: sw1 {
150 regulator-min-microvolt = <591930>;
151 regulator-max-microvolt = <1224671>;
152 lltc,fb-voltage-divider = <100000 158000>;
153 regulator-ramp-delay = <7000>;
154 regulator-boot-on;
155 regulator-always-on;
156 };
157
158 sw2_reg: sw2 {
159 regulator-min-microvolt = <704123>;
160 regulator-max-microvolt = <1456803>;
161 lltc,fb-voltage-divider = <180000 191000>;
162 regulator-ramp-delay = <7000>;
163 regulator-boot-on;
164 regulator-always-on;
165 };
166
167 sw3_reg: sw3 {
168 regulator-min-microvolt = <1341250>;
169 regulator-max-microvolt = <2775000>;
170 lltc,fb-voltage-divider = <270000 100000>;
171 regulator-ramp-delay = <7000>;
172 regulator-boot-on;
173 regulator-always-on;
174 };
175
176 bb_out_reg: bb-out {
177 regulator-min-microvolt = <3387341>;
178 regulator-max-microvolt = <3387341>;
179 lltc,fb-voltage-divider = <511000 158000>;
180 regulator-boot-on;
181 regulator-always-on;
182 };
183
184 ldo1_reg: ldo1 {
185 regulator-min-microvolt = <1306329>;
186 regulator-max-microvolt = <1306329>;
187 lltc,fb-voltage-divider = <100000 158000>;
188 regulator-boot-on;
189 regulator-always-on;
190 };
191
192 ldo2_reg: ldo2 {
193 regulator-min-microvolt = <704123>;
194 regulator-max-microvolt = <1456806>;
195 lltc,fb-voltage-divider = <180000 191000>;
196 regulator-ramp-delay = <7000>;
197 regulator-boot-on;
198 regulator-always-on;
199 };
200
201 ldo3_reg: ldo3 {
202 regulator-min-microvolt = <2800000>;
203 regulator-max-microvolt = <2800000>;
204 regulator-boot-on;
205 };
206
207 ldo4_reg: ldo4 {
208 regulator-min-microvolt = <1200000>;
209 regulator-max-microvolt = <3200000>;
210 };
211 };
212 };
213};
214
215&uart1 {
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_uart1>;
218 status = "okay";
219};
220
221&usbotg {
222 dr_mode = "peripheral";
223 status = "okay";
224};
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index cd170376eaca..0777b41cdfe8 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -136,6 +136,14 @@
136 clock-names = "bus", "di0", "di1"; 136 clock-names = "bus", "di0", "di1";
137 resets = <&src 2>; 137 resets = <&src 2>;
138 138
139 ipu_csi0: port@0 {
140 reg = <0>;
141 };
142
143 ipu_csi1: port@1 {
144 reg = <1>;
145 };
146
139 ipu_di0: port@2 { 147 ipu_di0: port@2 {
140 #address-cells = <1>; 148 #address-cells = <1>;
141 #size-cells = <0>; 149 #size-cells = <0>;
@@ -217,6 +225,8 @@
217 clocks = <&clks IMX5_CLK_UART3_IPG_GATE>, 225 clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
218 <&clks IMX5_CLK_UART3_PER_GATE>; 226 <&clks IMX5_CLK_UART3_PER_GATE>;
219 clock-names = "ipg", "per"; 227 clock-names = "ipg", "per";
228 dmas = <&sdma 42 4 0>, <&sdma 43 4 0>;
229 dma-names = "rx", "tx";
220 status = "disabled"; 230 status = "disabled";
221 }; 231 };
222 232
@@ -498,6 +508,8 @@
498 clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, 508 clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
499 <&clks IMX5_CLK_UART1_PER_GATE>; 509 <&clks IMX5_CLK_UART1_PER_GATE>;
500 clock-names = "ipg", "per"; 510 clock-names = "ipg", "per";
511 dmas = <&sdma 18 4 0>, <&sdma 19 4 0>;
512 dma-names = "rx", "tx";
501 status = "disabled"; 513 status = "disabled";
502 }; 514 };
503 515
@@ -508,6 +520,8 @@
508 clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, 520 clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
509 <&clks IMX5_CLK_UART2_PER_GATE>; 521 <&clks IMX5_CLK_UART2_PER_GATE>;
510 clock-names = "ipg", "per"; 522 clock-names = "ipg", "per";
523 dmas = <&sdma 12 4 0>, <&sdma 13 4 0>;
524 dma-names = "rx", "tx";
511 status = "disabled"; 525 status = "disabled";
512 }; 526 };
513 527
@@ -591,6 +605,8 @@
591 clocks = <&clks IMX5_CLK_UART4_IPG_GATE>, 605 clocks = <&clks IMX5_CLK_UART4_IPG_GATE>,
592 <&clks IMX5_CLK_UART4_PER_GATE>; 606 <&clks IMX5_CLK_UART4_PER_GATE>;
593 clock-names = "ipg", "per"; 607 clock-names = "ipg", "per";
608 dmas = <&sdma 2 4 0>, <&sdma 3 4 0>;
609 dma-names = "rx", "tx";
594 status = "disabled"; 610 status = "disabled";
595 }; 611 };
596 }; 612 };
@@ -621,6 +637,8 @@
621 clocks = <&clks IMX5_CLK_UART5_IPG_GATE>, 637 clocks = <&clks IMX5_CLK_UART5_IPG_GATE>,
622 <&clks IMX5_CLK_UART5_PER_GATE>; 638 <&clks IMX5_CLK_UART5_PER_GATE>;
623 clock-names = "ipg", "per"; 639 clock-names = "ipg", "per";
640 dmas = <&sdma 16 4 0>, <&sdma 17 4 0>;
641 dma-names = "rx", "tx";
624 status = "disabled"; 642 status = "disabled";
625 }; 643 };
626 644
diff --git a/arch/arm/boot/dts/imx6dl-gw553x.dts b/arch/arm/boot/dts/imx6dl-gw553x.dts
new file mode 100644
index 000000000000..59b8afc36e66
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw553x.dts
@@ -0,0 +1,55 @@
1/*
2 * Copyright 2016 Gateworks Corporation
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48/dts-v1/;
49#include "imx6dl.dtsi"
50#include "imx6qdl-gw553x.dtsi"
51
52/ {
53 model = "Gateworks Ventana i.MX6 DualLite/Solo GW553X";
54 compatible = "gw,imx6dl-gw553x", "gw,ventana", "fsl,imx6dl";
55};
diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts
index 2becd7cd6544..75d73437adf7 100644
--- a/arch/arm/boot/dts/imx6dl-riotboard.dts
+++ b/arch/arm/boot/dts/imx6dl-riotboard.dts
@@ -376,18 +376,18 @@
376 fsl,pins = < 376 fsl,pins = <
377 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 377 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
378 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 378 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
379 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 379 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
380 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 380 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
381 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 381 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
382 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 382 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
383 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 383 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
384 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 384 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
385 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ 385 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
386 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 /* AR8035 pin strapping: IO voltage: pull up */ 386 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: IO voltage: pull up */
387 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 /* AR8035 pin strapping: PHYADDR#0: pull down */ 387 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#0: pull down */
388 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 /* AR8035 pin strapping: PHYADDR#1: pull down */ 388 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */
389 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 /* AR8035 pin strapping: MODE#1: pull up */ 389 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#1: pull up */
390 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 /* AR8035 pin strapping: MODE#3: pull up */ 390 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */
391 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ 391 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */
392 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 /* GPIO16 -> AR8035 25MHz */ 392 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 /* GPIO16 -> AR8035 25MHz */
393 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ 393 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */
diff --git a/arch/arm/boot/dts/imx6dl-ts4900.dts b/arch/arm/boot/dts/imx6dl-ts4900.dts
new file mode 100644
index 000000000000..85eddeb30e21
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-ts4900.dts
@@ -0,0 +1,49 @@
1/*
2 * Copyright 2015 Technologic Systems
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41
42/dts-v1/;
43#include "imx6dl.dtsi"
44#include "imx6qdl-ts4900.dtsi"
45
46/ {
47 model = "Technologic Systems i.MX6 Solo/DualLite TS-4900 (Default Device Tree)";
48 compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl";
49};
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 9a4c22c2dade..1ade1951e620 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -111,6 +111,59 @@
111 }; 111 };
112}; 112};
113 113
114&gpio1 {
115 gpio-ranges = <&iomuxc 0 131 2>, <&iomuxc 2 137 8>, <&iomuxc 10 189 2>,
116 <&iomuxc 12 194 1>, <&iomuxc 13 193 1>, <&iomuxc 14 192 1>,
117 <&iomuxc 15 191 1>, <&iomuxc 16 185 2>, <&iomuxc 18 184 1>,
118 <&iomuxc 19 187 1>, <&iomuxc 20 183 1>, <&iomuxc 21 188 1>,
119 <&iomuxc 22 123 3>, <&iomuxc 25 121 1>, <&iomuxc 26 127 1>,
120 <&iomuxc 27 126 1>, <&iomuxc 28 128 1>, <&iomuxc 29 130 1>,
121 <&iomuxc 30 129 1>, <&iomuxc 31 122 1>;
122};
123
124&gpio2 {
125 gpio-ranges = <&iomuxc 0 161 8>, <&iomuxc 8 208 8>, <&iomuxc 16 74 1>,
126 <&iomuxc 17 73 1>, <&iomuxc 18 72 1>, <&iomuxc 19 71 1>,
127 <&iomuxc 20 70 1>, <&iomuxc 21 69 1>, <&iomuxc 22 68 1>,
128 <&iomuxc 23 79 2>, <&iomuxc 25 118 2>, <&iomuxc 27 117 1>,
129 <&iomuxc 28 113 4>;
130};
131
132&gpio3 {
133 gpio-ranges = <&iomuxc 0 97 2>, <&iomuxc 2 105 8>, <&iomuxc 10 99 6>,
134 <&iomuxc 16 81 16>;
135};
136
137&gpio4 {
138 gpio-ranges = <&iomuxc 5 136 1>, <&iomuxc 6 145 1>, <&iomuxc 7 150 1>,
139 <&iomuxc 8 146 1>, <&iomuxc 9 151 1>, <&iomuxc 10 147 1>,
140 <&iomuxc 11 151 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>,
141 <&iomuxc 14 149 1>, <&iomuxc 15 154 1>, <&iomuxc 16 39 7>,
142 <&iomuxc 23 56 1>, <&iomuxc 24 61 7>, <&iomuxc 31 46 1>;
143};
144
145&gpio5 {
146 gpio-ranges = <&iomuxc 0 120 1>, <&iomuxc 2 77 1>, <&iomuxc 4 76 1>,
147 <&iomuxc 5 47 9>, <&iomuxc 14 57 4>, <&iomuxc 18 37 1>,
148 <&iomuxc 19 36 1>, <&iomuxc 20 35 1>, <&iomuxc 21 38 1>,
149 <&iomuxc 22 29 6>, <&iomuxc 28 19 4>;
150};
151
152&gpio6 {
153 gpio-ranges = <&iomuxc 0 23 6>, <&iomuxc 6 75 1>, <&iomuxc 7 156 1>,
154 <&iomuxc 8 155 1>, <&iomuxc 9 170 1>, <&iomuxc 10 169 1>,
155 <&iomuxc 11 157 1>, <&iomuxc 14 158 3>, <&iomuxc 17 204 1>,
156 <&iomuxc 18 203 1>, <&iomuxc 19 182 1>, <&iomuxc 20 177 4>,
157 <&iomuxc 24 175 1>, <&iomuxc 25 171 1>, <&iomuxc 26 181 1>,
158 <&iomuxc 27 172 3>, <&iomuxc 30 176 1>, <&iomuxc 31 78 1>;
159};
160
161&gpio7 {
162 gpio-ranges = <&iomuxc 0 202 1>, <&iomuxc 1 201 1>, <&iomuxc 2 196 1>,
163 <&iomuxc 3 195 1>, <&iomuxc 4 197 4>, <&iomuxc 8 205 1>,
164 <&iomuxc 9 207 1>, <&iomuxc 10 206 1>, <&iomuxc 11 133 3>;
165};
166
114&gpt { 167&gpt {
115 compatible = "fsl,imx6dl-gpt"; 168 compatible = "fsl,imx6dl-gpt";
116}; 169};
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index d8acf15611e4..4989d0bff10f 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -79,19 +79,19 @@
79 fsl,pins = < 79 fsl,pins = <
80 MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 80 MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
81 MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 81 MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
82 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 82 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
83 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 83 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
84 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 84 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
85 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 85 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
86 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 86 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
87 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 87 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
88 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 88 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
89 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 89 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
90 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 90 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
91 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 91 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
92 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 92 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
93 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 93 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
94 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 94 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
95 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 95 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
96 >; 96 >;
97 }; 97 };
diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts b/arch/arm/boot/dts/imx6q-b450v3.dts
index f0a2be5268e3..78bfc1a307d6 100644
--- a/arch/arm/boot/dts/imx6q-b450v3.dts
+++ b/arch/arm/boot/dts/imx6q-b450v3.dts
@@ -89,3 +89,19 @@
89 }; 89 };
90 }; 90 };
91}; 91};
92
93&pca9539 {
94 P04 {
95 gpio-hog;
96 gpios = <4 0>;
97 output-low;
98 line-name = "PCA9539-P04";
99 };
100
101 P05 {
102 gpio-hog;
103 gpios = <5 0>;
104 output-low;
105 line-name = "PCA9539-P05";
106 };
107};
diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts b/arch/arm/boot/dts/imx6q-b650v3.dts
index 33cb71acadcc..d85388725426 100644
--- a/arch/arm/boot/dts/imx6q-b650v3.dts
+++ b/arch/arm/boot/dts/imx6q-b650v3.dts
@@ -89,3 +89,12 @@
89 }; 89 };
90 }; 90 };
91}; 91};
92
93&pca9539 {
94 P05 {
95 gpio-hog;
96 gpios = <5 0>;
97 output-low;
98 line-name = "PCA9539-P05";
99 };
100};
diff --git a/arch/arm/boot/dts/imx6q-ba16.dtsi b/arch/arm/boot/dts/imx6q-ba16.dtsi
index f2adc60723da..308e11cea1db 100644
--- a/arch/arm/boot/dts/imx6q-ba16.dtsi
+++ b/arch/arm/boot/dts/imx6q-ba16.dtsi
@@ -448,19 +448,19 @@
448 fsl,pins = < 448 fsl,pins = <
449 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 449 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
450 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 450 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
451 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 451 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
452 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 452 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
453 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 453 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
454 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 454 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
455 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 455 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
456 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 456 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
457 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 457 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
458 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 458 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
459 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 459 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
460 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 460 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
461 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 461 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
462 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 462 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
463 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 463 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
464 /* FEC Reset */ 464 /* FEC Reset */
465 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 465 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
466 /* AR8033 Interrupt */ 466 /* AR8033 Interrupt */
diff --git a/arch/arm/boot/dts/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
index cf3fd31e3406..e4a415fd899b 100644
--- a/arch/arm/boot/dts/imx6q-bx50v3.dtsi
+++ b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
@@ -183,6 +183,76 @@
183 interrupt-controller; 183 interrupt-controller;
184 interrupt-parent = <&gpio2>; 184 interrupt-parent = <&gpio2>;
185 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 185 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
186
187 P06 {
188 gpio-hog;
189 gpios = <6 0>;
190 output-low;
191 line-name = "PCA9539-P06";
192 };
193
194 P07 {
195 gpio-hog;
196 gpios = <7 0>;
197 output-low;
198 line-name = "PCA9539-P07";
199 };
200
201 P10 {
202 gpio-hog;
203 gpios = <8 0>;
204 output-low;
205 line-name = "PCA9539-P10";
206 };
207
208 P11 {
209 gpio-hog;
210 gpios = <9 0>;
211 output-low;
212 line-name = "PCA9539-P11";
213 };
214
215 P12 {
216 gpio-hog;
217 gpios = <10 0>;
218 output-low;
219 line-name = "PCA9539-P12";
220 };
221
222 P13 {
223 gpio-hog;
224 gpios = <11 0>;
225 output-low;
226 line-name = "PCA9539-P13";
227 };
228
229 P14 {
230 gpio-hog;
231 gpios = <12 0>;
232 output-low;
233 line-name = "PCA9539-P14";
234 };
235
236 P15 {
237 gpio-hog;
238 gpios = <13 0>;
239 output-low;
240 line-name = "PCA9539-P15";
241 };
242
243 P16 {
244 gpio-hog;
245 gpios = <14 0>;
246 output-low;
247 line-name = "PCA9539-P16";
248 };
249
250 P17 {
251 gpio-hog;
252 gpios = <15 0>;
253 output-low;
254 line-name = "PCA9539-P17";
255 };
186 }; 256 };
187 }; 257 };
188 258
diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index b5de7e620905..59bc5a4dce17 100644
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
@@ -168,18 +168,18 @@
168 168
169 pinctrl_enet: enetgrp { 169 pinctrl_enet: enetgrp {
170 fsl,pins = < 170 fsl,pins = <
171 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 171 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
172 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 172 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
173 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 173 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
174 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 174 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
175 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 175 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
176 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 176 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
177 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 177 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
178 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 178 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
179 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 179 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
180 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 180 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
181 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 181 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
182 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 182 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
183 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 183 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
184 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 184 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
185 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 185 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index 905907325f3b..908dab68bdca 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -324,18 +324,18 @@
324 324
325 pinctrl_enet: enetgrp { 325 pinctrl_enet: enetgrp {
326 fsl,pins = < 326 fsl,pins = <
327 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 327 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
328 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 328 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
329 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 329 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
330 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 330 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
331 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 331 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
332 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 332 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
333 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 333 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
334 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 334 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
335 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 335 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
336 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 336 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
337 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 337 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
338 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 338 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
339 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 339 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
340 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 340 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
341 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 341 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index 4fa56019225e..6de21ff47c3a 100644
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -139,6 +139,9 @@
139 pinctrl-0 = <&pinctrl_enet>; 139 pinctrl-0 = <&pinctrl_enet>;
140 phy-mode = "rgmii"; 140 phy-mode = "rgmii";
141 phy-reset-gpios = <&gpio1 25 0>; 141 phy-reset-gpios = <&gpio1 25 0>;
142 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
143 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
144 fsl,err006687-workaround-present;
142 status = "okay"; 145 status = "okay";
143}; 146};
144 147
@@ -303,21 +306,22 @@
303 fsl,pins = < 306 fsl,pins = <
304 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 307 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
305 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 308 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
306 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 309 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
307 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 310 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
308 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 311 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
309 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 312 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
310 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 313 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
311 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 314 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
312 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 315 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
313 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 316 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
314 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 317 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
315 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 318 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
316 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 319 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
317 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 320 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
318 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 321 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
319 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8 322 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8
320 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 323 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
324 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
321 >; 325 >;
322 }; 326 };
323 327
diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
index 0511137d1e23..747bc104ad00 100644
--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -421,18 +421,18 @@
421 421
422 pinctrl_enet: enetgrp { 422 pinctrl_enet: enetgrp {
423 fsl,pins = < 423 fsl,pins = <
424 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 424 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
425 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 425 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
426 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 426 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
427 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 427 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
428 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 428 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
429 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 429 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
430 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 430 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
431 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 431 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
432 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 432 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
433 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 433 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
434 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 434 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
435 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 435 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
436 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 436 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
437 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 437 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
438 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 438 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
diff --git a/arch/arm/boot/dts/imx6q-gw553x.dts b/arch/arm/boot/dts/imx6q-gw553x.dts
new file mode 100644
index 000000000000..e9c224cea752
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw553x.dts
@@ -0,0 +1,55 @@
1/*
2 * Copyright 2016 Gateworks Corporation
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48/dts-v1/;
49#include "imx6q.dtsi"
50#include "imx6qdl-gw553x.dtsi"
51
52/ {
53 model = "Gateworks Ventana i.MX6 Dual/Quad GW553X";
54 compatible = "gw,imx6q-gw553x", "gw,ventana", "fsl,imx6q";
55};
diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts
index 3f8013c85fb9..f7995c513b67 100644
--- a/arch/arm/boot/dts/imx6q-marsboard.dts
+++ b/arch/arm/boot/dts/imx6q-marsboard.dts
@@ -252,26 +252,26 @@
252 fsl,pins = < 252 fsl,pins = <
253 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 253 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
254 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 254 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
255 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 255 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
256 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 256 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
257 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 257 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
258 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 258 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
259 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 259 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
260 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 260 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
261 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ 261 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
262 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 262 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
263 /* AR8035 pin strapping: IO voltage: pull up */ 263 /* AR8035 pin strapping: IO voltage: pull up */
264 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 264 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
265 /* AR8035 pin strapping: PHYADDR#0: pull down */ 265 /* AR8035 pin strapping: PHYADDR#0: pull down */
266 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 266 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
267 /* AR8035 pin strapping: PHYADDR#1: pull down */ 267 /* AR8035 pin strapping: PHYADDR#1: pull down */
268 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 268 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
269 /* AR8035 pin strapping: MODE#1: pull up */ 269 /* AR8035 pin strapping: MODE#1: pull up */
270 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 270 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
271 /* AR8035 pin strapping: MODE#3: pull up */ 271 /* AR8035 pin strapping: MODE#3: pull up */
272 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 272 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
273 /* AR8035 pin strapping: MODE#0: pull down */ 273 /* AR8035 pin strapping: MODE#0: pull down */
274 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 274 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
275 /* GPIO16 -> AR8035 25MHz */ 275 /* GPIO16 -> AR8035 25MHz */
276 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 276 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
277 /* RGMII_nRST */ 277 /* RGMII_nRST */
diff --git a/arch/arm/boot/dts/imx6q-novena.dts b/arch/arm/boot/dts/imx6q-novena.dts
index 5acd0c63b33b..1723e89e3acc 100644
--- a/arch/arm/boot/dts/imx6q-novena.dts
+++ b/arch/arm/boot/dts/imx6q-novena.dts
@@ -549,12 +549,12 @@
549 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028 549 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028
550 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028 550 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028
551 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 551 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
552 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 552 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
553 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 553 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
554 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 554 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
555 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 555 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
556 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 556 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
557 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 557 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
558 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 558 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
559 /* Ethernet reset */ 559 /* Ethernet reset */
560 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1 560 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1
diff --git a/arch/arm/boot/dts/imx6q-sbc6x.dts b/arch/arm/boot/dts/imx6q-sbc6x.dts
index 86cf09364664..255733063ea4 100644
--- a/arch/arm/boot/dts/imx6q-sbc6x.dts
+++ b/arch/arm/boot/dts/imx6q-sbc6x.dts
@@ -31,19 +31,19 @@
31 fsl,pins = < 31 fsl,pins = <
32 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 32 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
33 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 33 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
34 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 34 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
35 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 35 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
36 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 36 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
37 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 37 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
38 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 38 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
39 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 39 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
40 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 40 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
41 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 41 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
42 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 42 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
43 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 43 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
44 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 44 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
45 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 45 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
46 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 46 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
47 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 47 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
48 >; 48 >;
49 }; 49 };
diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
index d7c8ccb2da95..06f492e17ca7 100644
--- a/arch/arm/boot/dts/imx6q-tbs2910.dts
+++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
@@ -284,19 +284,19 @@
284 fsl,pins = < 284 fsl,pins = <
285 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 285 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
286 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 286 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
287 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 287 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
288 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 288 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
289 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 289 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
290 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 290 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
291 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 291 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
292 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 292 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
293 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 293 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
294 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 294 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
295 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 295 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
296 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 296 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
297 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 297 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
298 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 298 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
299 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 299 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
300 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 300 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
301 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 301 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059
302 >; 302 >;
diff --git a/arch/arm/boot/dts/imx6q-ts4900.dts b/arch/arm/boot/dts/imx6q-ts4900.dts
new file mode 100644
index 000000000000..9b81ebc8b0d4
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-ts4900.dts
@@ -0,0 +1,53 @@
1/*
2 * Copyright 2015 Technologic Systems
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41
42/dts-v1/;
43#include "imx6q.dtsi"
44#include "imx6qdl-ts4900.dtsi"
45
46/ {
47 model = "Technologic Systems i.MX6 Quad TS-4900 (Default Device Tree)";
48 compatible = "technologic,imx6q-ts4900", "fsl,imx6q";
49};
50
51&sata {
52 status = "okay";
53};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index c30c8368cae0..e9a5d0b8c7b0 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -209,6 +209,43 @@
209 }; 209 };
210}; 210};
211 211
212&gpio1 {
213 gpio-ranges = <&iomuxc 0 136 2>, <&iomuxc 2 141 1>, <&iomuxc 3 139 1>,
214 <&iomuxc 4 142 2>, <&iomuxc 6 140 1>, <&iomuxc 7 144 2>,
215 <&iomuxc 9 138 1>, <&iomuxc 10 213 3>, <&iomuxc 13 20 1>,
216 <&iomuxc 14 19 1>, <&iomuxc 15 21 1>, <&iomuxc 16 208 1>,
217 <&iomuxc 17 207 1>, <&iomuxc 18 210 3>, <&iomuxc 21 209 1>,
218 <&iomuxc 22 116 10>;
219};
220
221&gpio2 {
222 gpio-ranges = <&iomuxc 0 191 16>, <&iomuxc 16 55 14>, <&iomuxc 30 35 1>,
223 <&iomuxc 31 44 1>;
224};
225
226&gpio3 {
227 gpio-ranges = <&iomuxc 0 69 16>, <&iomuxc 16 36 8>, <&iomuxc 24 45 8>;
228};
229
230&gpio4 {
231 gpio-ranges = <&iomuxc 5 149 1>, <&iomuxc 6 126 10>, <&iomuxc 16 87 16>;
232};
233
234&gpio5 {
235 gpio-ranges = <&iomuxc 0 85 1>, <&iomuxc 2 34 1>, <&iomuxc 4 53 1>,
236 <&iomuxc 5 103 13>, <&iomuxc 18 150 14>;
237};
238
239&gpio6 {
240 gpio-ranges = <&iomuxc 0 164 6>, <&iomuxc 6 54 1>, <&iomuxc 7 181 5>,
241 <&iomuxc 14 186 3>, <&iomuxc 17 170 2>, <&iomuxc 19 22 12>,
242 <&iomuxc 31 86 1>;
243};
244
245&gpio7 {
246 gpio-ranges = <&iomuxc 0 172 9>, <&iomuxc 9 189 2>, <&iomuxc 11 146 3>;
247};
248
212&hdmi { 249&hdmi {
213 compatible = "fsl,imx6q-hdmi"; 250 compatible = "fsl,imx6q-hdmi";
214 251
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 315e033ff1d8..99e323b57261 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -586,19 +586,19 @@
586 fsl,pins = < 586 fsl,pins = <
587 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 587 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
588 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 588 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
589 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 589 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
590 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 590 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
591 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 591 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
592 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 592 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
593 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 593 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
594 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 594 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
595 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 595 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
596 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 596 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
597 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 597 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
598 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 598 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
599 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 599 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
600 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 600 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
601 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 601 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
602 /* Ethernet PHY reset */ 602 /* Ethernet PHY reset */
603 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 603 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
604 /* Ethernet PHY interrupt */ 604 /* Ethernet PHY interrupt */
diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
index da1341d47b14..b2c083d57598 100644
--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
@@ -67,18 +67,18 @@
67 67
68 pinctrl_enet: enetgrp { 68 pinctrl_enet: enetgrp {
69 fsl,pins = < 69 fsl,pins = <
70 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 70 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
71 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 71 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
72 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 72 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
73 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 73 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
74 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 74 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
75 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 75 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
76 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 76 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
77 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 77 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
78 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 78 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
79 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 79 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
80 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 80 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
81 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 81 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
82 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 82 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
83 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 83 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
84 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 84 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index 9d7ab6cdc9a6..afec2c7628ef 100644
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -228,22 +228,28 @@
228 status = "okay"; 228 status = "okay";
229}; 229};
230 230
231&wdog1 {
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_wdog>;
234 fsl,ext-reset-output;
235};
236
231&iomuxc { 237&iomuxc {
232 imx6qdl-gw51xx { 238 imx6qdl-gw51xx {
233 pinctrl_enet: enetgrp { 239 pinctrl_enet: enetgrp {
234 fsl,pins = < 240 fsl,pins = <
235 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 241 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
236 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 242 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
237 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 243 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
238 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 244 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
239 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 245 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
240 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 246 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
241 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 247 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
242 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 248 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
243 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 249 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
244 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 250 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
245 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 251 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
246 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 252 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
247 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 253 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
248 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 254 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
249 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 255 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
@@ -364,5 +370,11 @@
364 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */ 370 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
365 >; 371 >;
366 }; 372 };
373
374 pinctrl_wdog: wdoggrp {
375 fsl,pins = <
376 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
377 >;
378 };
367 }; 379 };
368}; 380};
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 7191b84770b9..a7100f99123e 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -315,6 +315,8 @@
315&uart1 { 315&uart1 {
316 pinctrl-names = "default"; 316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_uart1>; 317 pinctrl-0 = <&pinctrl_uart1>;
318 uart-has-rtscts;
319 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
318 status = "okay"; 320 status = "okay";
319}; 321};
320 322
@@ -353,6 +355,12 @@
353 status = "okay"; 355 status = "okay";
354}; 356};
355 357
358&wdog1 {
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_wdog>;
361 fsl,ext-reset-output;
362};
363
356&iomuxc { 364&iomuxc {
357 imx6qdl-gw52xx { 365 imx6qdl-gw52xx {
358 pinctrl_audmux: audmuxgrp { 366 pinctrl_audmux: audmuxgrp {
@@ -376,18 +384,18 @@
376 384
377 pinctrl_enet: enetgrp { 385 pinctrl_enet: enetgrp {
378 fsl,pins = < 386 fsl,pins = <
379 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 387 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
380 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 388 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
381 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 389 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
382 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 390 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
383 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 391 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
384 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 392 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
385 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 393 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
386 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 394 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
387 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 395 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
388 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 396 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
389 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 397 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
390 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 398 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
391 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 399 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
392 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 400 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
393 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 401 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
@@ -487,6 +495,7 @@
487 fsl,pins = < 495 fsl,pins = <
488 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 496 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
489 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 497 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
498 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
490 >; 499 >;
491 }; 500 };
492 501
@@ -549,5 +558,11 @@
549 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 558 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
550 >; 559 >;
551 }; 560 };
561
562 pinctrl_wdog: wdoggrp {
563 fsl,pins = <
564 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
565 >;
566 };
552 }; 567 };
553}; 568};
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index 40d06b09deba..8953eba0573d 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -312,6 +312,8 @@
312&uart1 { 312&uart1 {
313 pinctrl-names = "default"; 313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_uart1>; 314 pinctrl-0 = <&pinctrl_uart1>;
315 uart-has-rtscts;
316 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
315 status = "okay"; 317 status = "okay";
316}; 318};
317 319
@@ -351,6 +353,12 @@
351 status = "okay"; 353 status = "okay";
352}; 354};
353 355
356&wdog1 {
357 pinctrl-names = "default";
358 pinctrl-0 = <&pinctrl_wdog>;
359 fsl,ext-reset-output;
360};
361
354&iomuxc { 362&iomuxc {
355 imx6qdl-gw53xx { 363 imx6qdl-gw53xx {
356 pinctrl_audmux: audmuxgrp { 364 pinctrl_audmux: audmuxgrp {
@@ -365,18 +373,18 @@
365 373
366 pinctrl_enet: enetgrp { 374 pinctrl_enet: enetgrp {
367 fsl,pins = < 375 fsl,pins = <
368 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 376 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
369 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 377 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
370 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 378 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
371 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 379 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
372 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 380 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
373 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 381 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
374 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 382 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
375 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 383 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
376 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 384 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
377 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 385 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
378 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 386 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
379 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 387 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
380 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 388 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
381 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 389 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
382 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 390 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
@@ -476,6 +484,7 @@
476 fsl,pins = < 484 fsl,pins = <
477 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 485 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
478 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 486 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
487 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
479 >; 488 >;
480 }; 489 };
481 490
@@ -539,5 +548,11 @@
539 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 548 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
540 >; 549 >;
541 }; 550 };
551
552 pinctrl_wdog: wdoggrp {
553 fsl,pins = <
554 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
555 >;
556 };
542 }; 557 };
543}; 558};
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index d6dbe2a88ee6..6ac41c7ed32e 100644
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -414,6 +414,8 @@
414&uart1 { 414&uart1 {
415 pinctrl-names = "default"; 415 pinctrl-names = "default";
416 pinctrl-0 = <&pinctrl_uart1>; 416 pinctrl-0 = <&pinctrl_uart1>;
417 uart-has-rtscts;
418 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
417 status = "okay"; 419 status = "okay";
418}; 420};
419 421
@@ -453,6 +455,17 @@
453 status = "okay"; 455 status = "okay";
454}; 456};
455 457
458&wdog1 {
459 status = "disabled";
460};
461
462&wdog2 {
463 pinctrl-names = "default";
464 pinctrl-0 = <&pinctrl_wdog>;
465 fsl,ext-reset-output;
466 status = "okay";
467};
468
456&iomuxc { 469&iomuxc {
457 imx6qdl-gw54xx { 470 imx6qdl-gw54xx {
458 pinctrl_audmux: audmuxgrp { 471 pinctrl_audmux: audmuxgrp {
@@ -467,18 +480,18 @@
467 480
468 pinctrl_enet: enetgrp { 481 pinctrl_enet: enetgrp {
469 fsl,pins = < 482 fsl,pins = <
470 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 483 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
471 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 484 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
472 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 485 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
473 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 486 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
474 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 487 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
475 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 488 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
476 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 489 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
477 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 490 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
478 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 491 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
479 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 492 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
480 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 493 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
481 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 494 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
482 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 495 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
483 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 496 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
484 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 497 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
@@ -592,6 +605,7 @@
592 fsl,pins = < 605 fsl,pins = <
593 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 606 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
594 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 607 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
608 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
595 >; 609 >;
596 }; 610 };
597 611
@@ -654,5 +668,11 @@
654 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 668 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
655 >; 669 >;
656 }; 670 };
671
672 pinctrl_wdog: wdoggrp {
673 fsl,pins = <
674 MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
675 >;
676 };
657 }; 677 };
658}; 678};
diff --git a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
index 118bea524dab..4b9fef834822 100644
--- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
@@ -239,6 +239,12 @@
239 status = "okay"; 239 status = "okay";
240}; 240};
241 241
242&wdog1 {
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_wdog>;
245 fsl,ext-reset-output;
246};
247
242&iomuxc { 248&iomuxc {
243 imx6qdl-gw51xx { 249 imx6qdl-gw51xx {
244 pinctrl_flexcan1: flexcan1grp { 250 pinctrl_flexcan1: flexcan1grp {
@@ -333,5 +339,11 @@
333 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 339 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
334 >; 340 >;
335 }; 341 };
342
343 pinctrl_wdog: wdoggrp {
344 fsl,pins = <
345 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
346 >;
347 };
336 }; 348 };
337}; 349};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
index f27f184558fb..805e23674a94 100644
--- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -197,6 +197,12 @@
197 status = "okay"; 197 status = "okay";
198}; 198};
199 199
200&wdog1 {
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_wdog>;
203 fsl,ext-reset-output;
204};
205
200&iomuxc { 206&iomuxc {
201 imx6qdl-gw552x { 207 imx6qdl-gw552x {
202 pinctrl_gpio_leds: gpioledsgrp { 208 pinctrl_gpio_leds: gpioledsgrp {
@@ -286,5 +292,11 @@
286 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 292 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
287 >; 293 >;
288 }; 294 };
295
296 pinctrl_wdog: wdoggrp {
297 fsl,pins = <
298 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
299 >;
300 };
289 }; 301 };
290}; 302};
diff --git a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi
new file mode 100644
index 000000000000..86cec0527f73
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi
@@ -0,0 +1,433 @@
1/*
2 * Copyright 2016 Gateworks Corporation
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48#include <dt-bindings/gpio/gpio.h>
49
50/ {
51 /* these are used by bootloader for disabling nodes */
52 aliases {
53 led0 = &led0;
54 led1 = &led1;
55 nand = &gpmi;
56 usb0 = &usbh1;
57 usb1 = &usbotg;
58 };
59
60 chosen {
61 stdout-path = &uart2;
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_gpio_leds>;
68
69 led0: user1 {
70 label = "user1";
71 gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
72 default-state = "on";
73 linux,default-trigger = "heartbeat";
74 };
75
76 led1: user2 {
77 label = "user2";
78 gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
79 default-state = "off";
80 };
81 };
82
83 memory {
84 reg = <0x10000000 0x20000000>;
85 };
86
87 pps {
88 compatible = "pps-gpio";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_pps>;
91 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
92 status = "okay";
93 };
94
95 reg_3p3v: regulator-3p3v {
96 compatible = "regulator-fixed";
97 regulator-name = "3P0V";
98 regulator-min-microvolt = <3300000>;
99 regulator-max-microvolt = <3300000>;
100 regulator-always-on;
101 };
102
103 reg_5p0v: regulator-5p0v {
104 compatible = "regulator-fixed";
105 regulator-name = "5P0V";
106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>;
108 regulator-always-on;
109 };
110
111 reg_usb_otg_vbus: regulator-usb-otg-vbus {
112 compatible = "regulator-fixed";
113 regulator-name = "usb_otg_vbus";
114 regulator-min-microvolt = <5000000>;
115 regulator-max-microvolt = <5000000>;
116 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
117 enable-active-high;
118 };
119};
120
121&gpmi {
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_gpmi_nand>;
124 status = "okay";
125};
126
127&hdmi {
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_hdmi>;
130 ddc-i2c-bus = <&i2c3>;
131 status = "okay";
132};
133
134&i2c1 {
135 clock-frequency = <100000>;
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_i2c1>;
138 status = "okay";
139
140 gpio: pca9555@23 {
141 compatible = "nxp,pca9555";
142 reg = <0x23>;
143 gpio-controller;
144 #gpio-cells = <2>;
145 };
146
147 eeprom1: eeprom@50 {
148 compatible = "atmel,24c02";
149 reg = <0x50>;
150 pagesize = <16>;
151 };
152
153 eeprom2: eeprom@51 {
154 compatible = "atmel,24c02";
155 reg = <0x51>;
156 pagesize = <16>;
157 };
158
159 eeprom3: eeprom@52 {
160 compatible = "atmel,24c02";
161 reg = <0x52>;
162 pagesize = <16>;
163 };
164
165 eeprom4: eeprom@53 {
166 compatible = "atmel,24c02";
167 reg = <0x53>;
168 pagesize = <16>;
169 };
170
171 rtc: ds1672@68 {
172 compatible = "dallas,ds1672";
173 reg = <0x68>;
174 };
175};
176
177&i2c2 {
178 clock-frequency = <100000>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_i2c2>;
181 status = "okay";
182};
183
184&i2c3 {
185 clock-frequency = <100000>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_i2c3>;
188 status = "okay";
189};
190
191&pcie {
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_pcie>;
194 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
195 status = "okay";
196};
197
198&pwm2 {
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
201 status = "disabled";
202};
203
204&pwm3 {
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
207 status = "disabled";
208};
209
210&pwm4 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
213 status = "disabled";
214};
215
216&uart2 {
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_uart2>;
219 status = "okay";
220};
221
222&uart3 {
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_uart3>;
225 status = "okay";
226};
227
228&uart4 {
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_uart4>;
231 status = "okay";
232};
233
234&uart5 {
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_uart5>;
237 status = "okay";
238};
239
240&usbh1 {
241 status = "okay";
242};
243
244&usbotg {
245 vbus-supply = <&reg_usb_otg_vbus>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_usbotg>;
248 disable-over-current;
249 status = "okay";
250};
251
252&usdhc3 {
253 pinctrl-names = "default", "state_100mhz", "state_200mhz";
254 pinctrl-0 = <&pinctrl_usdhc3>;
255 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
256 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
257 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
258 vmmc-supply = <&reg_3p3v>;
259 status = "okay";
260};
261
262&wdog1 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_wdog>;
265 fsl,ext-reset-output;
266};
267
268&iomuxc {
269 pinctrl_gpmi_nand: gpminandgrp {
270 fsl,pins = <
271 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
272 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
273 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
274 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
275 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
276 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
277 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
278 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
279 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
280 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
281 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
282 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
283 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
284 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
285 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
286 >;
287 };
288
289 pinctrl_hdmi: hdmigrp {
290 fsl,pins = <
291 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
292 >;
293 };
294
295 pinctrl_i2c1: i2c1grp {
296 fsl,pins = <
297 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
298 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
299 >;
300 };
301
302 pinctrl_i2c2: i2c2grp {
303 fsl,pins = <
304 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
305 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
306 >;
307 };
308
309 pinctrl_i2c3: i2c3grp {
310 fsl,pins = <
311 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
312 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
313 >;
314 };
315
316 pinctrl_gpio_leds: gpioledsgrp {
317 fsl,pins = <
318 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
319 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
320 >;
321 };
322
323 pinctrl_pcie: pciegrp {
324 fsl,pins = <
325 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
326 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
327 >;
328 };
329
330 pinctrl_pps: ppsgrp {
331 fsl,pins = <
332 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
333 >;
334 };
335
336 pinctrl_pwm2: pwm2grp {
337 fsl,pins = <
338 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
339 >;
340 };
341
342 pinctrl_pwm3: pwm3grp {
343 fsl,pins = <
344 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
345 >;
346 };
347
348 pinctrl_pwm4: pwm4grp {
349 fsl,pins = <
350 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
351 >;
352 };
353
354 pinctrl_uart2: uart2grp {
355 fsl,pins = <
356 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
357 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
358 >;
359 };
360
361 pinctrl_uart3: uart3grp {
362 fsl,pins = <
363 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
364 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
365 >;
366 };
367
368 pinctrl_uart4: uart4grp {
369 fsl,pins = <
370 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
371 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
372 >;
373 };
374
375 pinctrl_uart5: uart5grp {
376 fsl,pins = <
377 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
378 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
379 >;
380 };
381
382 pinctrl_usbotg: usbotggrp {
383 fsl,pins = <
384 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
385 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
386 >;
387 };
388
389 pinctrl_usdhc3: usdhc3grp {
390 fsl,pins = <
391 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
392 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
393 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
394 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
395 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
396 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
397 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
398 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
399 >;
400 };
401
402 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
403 fsl,pins = <
404 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
405 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
406 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
407 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
408 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
409 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
410 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
411 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
412 >;
413 };
414
415 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
416 fsl,pins = <
417 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
418 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
419 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
420 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
421 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
422 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
423 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
424 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
425 >;
426 };
427
428 pinctrl_wdog: wdoggrp {
429 fsl,pins = <
430 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
431 >;
432 };
433};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
index f8d945a56525..d5c3aa88adbe 100644
--- a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -254,19 +254,19 @@
254 fsl,pins = < 254 fsl,pins = <
255 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 255 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
256 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 256 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
257 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 257 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
258 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 258 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
259 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 259 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
260 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 260 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
261 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 261 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
262 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 262 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
263 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 263 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
264 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 264 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
265 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 265 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
266 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 266 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
267 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 267 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
268 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 268 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
269 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 269 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
270 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 270 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
271 >; 271 >;
272 }; 272 };
diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
index cfd50ea1ed48..880bd782a5b7 100644
--- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
@@ -361,12 +361,12 @@
361 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 361 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
362 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 362 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
363 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 363 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
364 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 364 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
365 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 365 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
366 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 366 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
367 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 367 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
368 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 368 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
369 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 369 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
370 /* Phy reset */ 370 /* Phy reset */
371 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 371 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0
372 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 372 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
index 9677bf323823..b0b3220a1fd9 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
@@ -484,19 +484,19 @@
484 fsl,pins = < 484 fsl,pins = <
485 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 485 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
486 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 486 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
487 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 487 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
488 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 488 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
489 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 489 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
490 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 490 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
491 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 491 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
492 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 492 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
493 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 493 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
494 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 494 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
495 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 495 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
496 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 496 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
497 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 497 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
498 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 498 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
499 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 499 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
500 /* Phy reset */ 500 /* Phy reset */
501 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 501 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0
502 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 502 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 97d9c333902b..db868bc42c0f 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -394,19 +394,19 @@
394 fsl,pins = < 394 fsl,pins = <
395 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 395 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
396 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 396 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
397 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 397 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
398 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 398 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
399 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 399 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
400 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 400 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
401 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 401 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
402 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 402 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
403 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 403 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
404 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 404 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
405 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 405 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
406 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 406 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
407 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 407 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
408 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 408 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
409 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 409 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
410 /* Phy reset */ 410 /* Phy reset */
411 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0 411 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
412 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 412 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index d6d98d426384..e0280cac2484 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -231,19 +231,19 @@
231 fsl,pins = < 231 fsl,pins = <
232 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 232 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
233 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 233 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
234 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 234 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
235 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 235 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
236 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 236 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
237 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 237 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
238 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 238 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
239 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 239 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
240 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 240 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
241 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 241 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
242 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 242 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
243 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 243 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
244 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 244 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
245 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 245 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
246 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 246 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
247 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 247 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
248 >; 248 >;
249 }; 249 };
@@ -379,6 +379,18 @@
379 status = "disabled"; 379 status = "disabled";
380}; 380};
381 381
382&reg_arm {
383 vin-supply = <&vddcore_reg>;
384};
385
386&reg_pu {
387 vin-supply = <&vddsoc_reg>;
388};
389
390&reg_soc {
391 vin-supply = <&vddsoc_reg>;
392};
393
382&uart3 { 394&uart3 {
383 pinctrl-names = "default"; 395 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_uart3>; 396 pinctrl-0 = <&pinctrl_uart3>;
diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi
index cacf5933707d..17704a5c1bcb 100644
--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi
@@ -196,19 +196,19 @@
196 fsl,pins = < 196 fsl,pins = <
197 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 197 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
198 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 198 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
199 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 199 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
200 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 200 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
201 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 201 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
202 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 202 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
203 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 203 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
204 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 204 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
205 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 205 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
206 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 206 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
207 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 207 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
208 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 208 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
209 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 209 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
210 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 210 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
211 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 211 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
212 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 212 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
213 /* Phy reset */ 213 /* Phy reset */
214 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 214 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 6aa193fb283f..e000e6f12bf5 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -345,19 +345,19 @@
345 fsl,pins = < 345 fsl,pins = <
346 MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 346 MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
347 MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 347 MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
348 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 348 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
349 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 349 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
350 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 350 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
351 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 351 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
352 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 352 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
353 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 353 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
354 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 354 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
355 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 355 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
356 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 356 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
357 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 357 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
358 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 358 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
359 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 359 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
360 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 360 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
361 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 361 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
362 >; 362 >;
363 }; 363 };
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index f65fdfc2536d..81dd6cd1937d 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -359,19 +359,19 @@
359 fsl,pins = < 359 fsl,pins = <
360 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 360 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
361 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 361 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
362 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 362 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
363 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 363 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
364 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 364 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
365 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 365 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
366 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 366 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
367 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 367 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
368 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 368 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
369 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 369 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
370 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 370 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
371 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 371 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
372 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 372 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
373 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 373 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
374 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 374 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
375 /* Phy reset */ 375 /* Phy reset */
376 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 376 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
377 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 377 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index d77ea9423bbc..8e9e0d98db2f 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -380,19 +380,19 @@
380 fsl,pins = < 380 fsl,pins = <
381 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 381 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
382 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 382 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
383 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 383 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
384 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 384 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
385 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 385 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
386 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 386 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
387 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 387 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
388 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 388 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
389 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 389 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
390 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 390 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
391 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 391 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
392 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 392 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
393 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 393 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
394 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 394 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
395 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 395 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
396 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 396 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
397 >; 397 >;
398 }; 398 };
diff --git a/arch/arm/boot/dts/imx6qdl-ts4900.dtsi b/arch/arm/boot/dts/imx6qdl-ts4900.dtsi
new file mode 100644
index 000000000000..5c26b26e851a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-ts4900.dtsi
@@ -0,0 +1,481 @@
1/*
2 * Copyright 2015 Technologic Systems
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41
42#include <dt-bindings/gpio/gpio.h>
43#include <dt-bindings/interrupt-controller/irq.h>
44
45/ {
46 aliases {
47 ethernet0 = &fec;
48 };
49
50 leds {
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_leds1>;
53 compatible = "gpio-leds";
54
55 green-led {
56 label = "green-led";
57 gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
58 default-state = "on";
59 };
60
61 red-led {
62 label = "red-led";
63 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
64 default-state = "off";
65 };
66 };
67
68 reg_3p3v: regulator-3p3v {
69 compatible = "regulator-fixed";
70 regulator-name = "3p3v";
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
73 };
74
75 reg_usb_otg_vbus: regulator-usb-otg-vbus {
76 compatible = "regulator-fixed";
77 regulator-name = "usb_otg_vbus";
78 regulator-min-microvolt = <5000000>;
79 regulator-max-microvolt = <5000000>;
80 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
81 enable-active-high;
82 };
83};
84
85&can1 {
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_flexcan1>;
88 status = "okay";
89};
90
91&can2 {
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_flexcan2>;
94 status = "okay";
95};
96
97&ecspi1 {
98 fsl,spi-num-chipselects = <1>;
99 cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_ecspi1>;
102 status = "okay";
103
104 n25q064: flash@0 {
105 compatible = "micron,n25q064", "jedec,spi-nor";
106 reg = <0>;
107 spi-max-frequency = <20000000>;
108 };
109};
110
111&ecspi2 {
112 fsl,spi-num-chipselects = <1>;
113 cs-gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_ecspi2>;
116 status = "okay";
117};
118
119&fec {
120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_enet>;
122 phy-mode = "rgmii";
123 status = "okay";
124};
125
126&i2c1 {
127 clock-frequency = <100000>;
128 pinctrl-names = "default", "gpio";
129 pinctrl-0 = <&pinctrl_i2c1>;
130 pinctrl-1 = <&pinctrl_i2c1_gpio>;
131 scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
132 sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
133 status = "okay";
134
135 isl12022: rtc@6f {
136 compatible = "isil,isl12022";
137 reg = <0x6f>;
138 };
139
140 gpio8: gpio@28 {
141 compatible = "technologic,ts4900-gpio";
142 reg = <0x28>;
143 #gpio-cells = <2>;
144 gpio-controller;
145 ngpio = <32>;
146 };
147};
148
149&i2c2 {
150 clock-frequency = <100000>;
151 pinctrl-names = "default", "gpio";
152 pinctrl-0 = <&pinctrl_i2c2>;
153 pinctrl-1 = <&pinctrl_i2c2_gpio>;
154 scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
155 sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
156 status = "okay";
157};
158
159&iomuxc {
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_hog>;
162
163 pinctrl_ecspi1: ecspi1grp {
164 fsl,pins = <
165 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
166 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
167 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
168 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 /* Onboard flash CS1# */
169 >;
170 };
171
172 pinctrl_ecspi2: ecspi2grp {
173 fsl,pins = <
174 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
175 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
176 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
177 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1 /* Offboard CS0# */
178 MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x100b1 /* FPGA CS1# */
179 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b1 /* FPGA_RESET# */
180 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1 /* FPGA_DONE */
181 MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x10 /* FPGA 24MHZ */
182 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1 /* FPGA_IRQ */
183 >;
184 };
185
186 pinctrl_enet: enetgrp {
187 fsl,pins = <
188 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
189 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
190 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
191 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
192 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
193 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
194 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
195 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
196 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
197 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
198 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
199 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
200 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
201 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
202 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x4001b0a8
203 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1
204 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b1 /* ETH_PHY_RESET */
205 >;
206 };
207
208 pinctrl_flexcan1: flexcan1grp {
209 fsl,pins = <
210 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
211 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
212 >;
213 };
214
215 pinctrl_flexcan2: flexcan2grp {
216 fsl,pins = <
217 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b1
218 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b1
219 >;
220 };
221
222 pinctrl_hog: hoggrp {
223 fsl,pins = <
224 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b1 /* OFF_BD_RESET# */
225 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1 /* EN_USB_5V# */
226 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b1 /* EN_LCD_3.3V */
227 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* Audio CLK */
228 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 /* DIO_1 */
229 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b1 /* DIO_2 */
230 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b1 /* DIO_3 */
231 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b1 /* DIO_4 */
232 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1 /* DIO_5 */
233 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b1 /* DIO_7 */
234 MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b1 /* DIO_8 */
235 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b1 /* DIO_9 */
236 MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b1 /* DIO_0 */
237 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b1 /* DIO_6 */
238 MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b1 /* CPU_DIO_A */
239 MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b1 /* DIO_2 */
240 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1 /* CPU_DIO_B */
241 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b1 /* BUS_ALE# */
242 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b0b1 /* DIO_15 */
243 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b1 /* BUS_DIR */
244 MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b1 /* BUS_CS# */
245 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* DIO_14 */
246 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b1 /* DIO_16 */
247 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x1b0b1 /* DIO_12 */
248 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b1 /* DIO_18 */
249 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b1 /* DIO_19 */
250 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b1 /* DIO_20 */
251 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b1 /* BUS_BHE# */
252 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b1 /* DIO_13 */
253 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b1 /* EIM_WAIT# */
254 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b1 /* DIO_10 */
255 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b1 /* MUX_AD_00 */
256 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b1 /* MUX_AD_01 */
257 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1 /* MUX_AD_02 */
258 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b1 /* MUX_AD_03 */
259 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1 /* MUX_AD_04 */
260 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1 /* MUX_AD_05 */
261 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b1 /* MUX_AD_06 */
262 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b1 /* MUX_AD_07 */
263 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b1 /* MUX_AD_08 */
264 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b1 /* MUX_AD_09 */
265 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b1 /* MUX_AD_10 */
266 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b1 /* MUX_AD_11 */
267 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b0b1 /* MUX_AD_12 */
268 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b1 /* MUX_AD_13 */
269 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b0b1 /* MUX_AD_14 */
270 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b1 /* MUX_AD_15 */
271 MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1 /* LCD_CLK */
272 MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x1b0b1 /* DE */
273 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b1 /* Hsync */
274 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b1 /* Vsync */
275 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b1
276 MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22 0x1b0b1
277 MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23 0x1b0b1
278 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x1b0b1
279 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b1
280 MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b1
281 MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x1b0b1
282 MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b1
283 MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x1b0b1
284 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b1
285 MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b1
286 MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x1b0b1
287 MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b1
288 MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1
289 MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b1
290 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b1
291 MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b1
292 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b1
293 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b1
294 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b1
295 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b1
296 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b1
297 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b1
298 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b1
299 >;
300 };
301
302 pinctrl_i2c1: i2c1grp {
303 fsl,pins = <
304 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
305 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
306 >;
307 };
308
309 pinctrl_i2c1_gpio: i2c1gpiogrp {
310 fsl,pins = <
311 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
312 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
313 >;
314 };
315
316 pinctrl_i2c2: i2c2grp {
317 fsl,pins = <
318 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
319 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
320 >;
321 };
322
323 pinctrl_i2c2_gpio: i2c2gpiogrp {
324 fsl,pins = <
325 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
326 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
327 >;
328 };
329
330 pinctrl_leds1: leds1grp {
331 fsl,pins = <
332 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 /* RED_LED# */
333 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1 /* GREEN_LED# */
334 >;
335 };
336
337 pinctrl_uart1: uart1grp {
338 fsl,pins = <
339 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
340 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
341 >;
342 };
343
344 pinctrl_uart2: uart2grp {
345 fsl,pins = <
346 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
347 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
348 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
349 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
350 >;
351 };
352
353 pinctrl_uart3: uart3grp {
354 fsl,pins = <
355 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
356 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
357 >;
358 };
359
360 pinctrl_uart4: uart4grp {
361 fsl,pins = <
362 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
363 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
364 >;
365 };
366
367 pinctrl_uart5: uart5grp {
368 fsl,pins = <
369 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
370 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
371 >;
372 };
373
374 pinctrl_usbotg: usbotggrp {
375 fsl,pins = <
376 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
377 >;
378 };
379
380 pinctrl_usdhc1: usdhc1grp {
381 fsl,pins = <
382 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
383 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
384 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
385 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
386 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
387 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
388 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x17059 /* WIFI IRQ */
389 >;
390 };
391
392 pinctrl_usdhc2: usdhc2grp {
393 fsl,pins = <
394 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
395 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
396 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
397 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
398 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
399 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
400 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b1 /* EN_SD_POWER# */
401 >;
402 };
403
404 pinctrl_usdhc3: usdhc3grp {
405 fsl,pins = <
406 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
407 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
408 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
409 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
410 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
411 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
412 >;
413 };
414};
415
416&pcie {
417 status = "okay";
418};
419
420&uart1 {
421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_uart1>;
423 status = "okay";
424};
425
426&uart2 {
427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_uart2>;
429 uart-has-rtscts;
430 status = "okay";
431};
432
433&uart3 {
434 pinctrl-names = "default";
435 pinctrl-0 = <&pinctrl_uart3>;
436 status = "okay";
437};
438
439&uart4 {
440 pinctrl-names = "default";
441 pinctrl-0 = <&pinctrl_uart4>;
442 status = "okay";
443};
444
445&uart5 {
446 pinctrl-names = "default";
447 pinctrl-0 = <&pinctrl_uart5>;
448 status = "okay";
449};
450
451&usbh1 {
452 status = "okay";
453};
454
455&usbotg {
456 vbus-supply = <&reg_usb_otg_vbus>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_usbotg>;
459 disable-over-current;
460 status = "okay";
461};
462
463/* SD */
464&usdhc2 {
465 pinctrl-names = "default";
466 pinctrl-0 = <&pinctrl_usdhc2>;
467 vmmc-supply = <&reg_3p3v>;
468 bus-width = <4>;
469 fsl,wp-controller;
470 status = "okay";
471};
472
473/* eMMC */
474&usdhc3 {
475 pinctrl-names = "default";
476 pinctrl-0 = <&pinctrl_usdhc3>;
477 vmmc-supply = <&reg_3p3v>;
478 bus-width = <4>;
479 non-removable;
480 status = "okay";
481};
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index 3bee2f910067..c96c91d83678 100644
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -132,18 +132,18 @@
132 imx6q-udoo { 132 imx6q-udoo {
133 pinctrl_enet: enetgrp { 133 pinctrl_enet: enetgrp {
134 fsl,pins = < 134 fsl,pins = <
135 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 135 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
136 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 136 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
137 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 137 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
138 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 138 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
139 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 139 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
140 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 140 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
141 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 141 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
142 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 142 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
143 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 143 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
144 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 144 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
145 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 145 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
146 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 146 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
147 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 147 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
148 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 148 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
149 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 149 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index 3ffe00c557f1..2b9c2be436f9 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -109,19 +109,19 @@
109 fsl,pins = < 109 fsl,pins = <
110 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 110 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
111 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 111 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
112 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 112 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
113 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 113 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
114 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 114 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
115 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 115 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
116 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 116 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
117 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 117 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
118 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 118 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
119 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 119 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
120 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 120 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
121 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 121 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
122 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 122 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
123 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 123 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
124 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 124 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
125 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 125 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
126 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 126 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
127 >; 127 >;
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 542515089b1e..02378db3f5fc 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -375,6 +375,12 @@
375 #gpio-cells = <2>; 375 #gpio-cells = <2>;
376 interrupt-controller; 376 interrupt-controller;
377 #interrupt-cells = <2>; 377 #interrupt-cells = <2>;
378 gpio-ranges = <&iomuxc 0 22 1>, <&iomuxc 1 20 2>,
379 <&iomuxc 3 23 1>, <&iomuxc 4 25 1>,
380 <&iomuxc 5 24 1>, <&iomuxc 6 19 1>,
381 <&iomuxc 7 36 2>, <&iomuxc 9 44 8>,
382 <&iomuxc 17 38 6>, <&iomuxc 23 68 4>,
383 <&iomuxc 27 64 4>, <&iomuxc 31 52 1>;
378 }; 384 };
379 385
380 gpio2: gpio@020a0000 { 386 gpio2: gpio@020a0000 {
@@ -386,6 +392,13 @@
386 #gpio-cells = <2>; 392 #gpio-cells = <2>;
387 interrupt-controller; 393 interrupt-controller;
388 #interrupt-cells = <2>; 394 #interrupt-cells = <2>;
395 gpio-ranges = <&iomuxc 0 53 3>, <&iomuxc 3 72 2>,
396 <&iomuxc 5 34 2>, <&iomuxc 7 57 4>,
397 <&iomuxc 11 56 1>, <&iomuxc 12 61 3>,
398 <&iomuxc 15 107 1>, <&iomuxc 16 132 2>,
399 <&iomuxc 18 135 1>, <&iomuxc 19 134 1>,
400 <&iomuxc 20 108 2>, <&iomuxc 22 120 1>,
401 <&iomuxc 23 125 7>, <&iomuxc 30 110 2>;
389 }; 402 };
390 403
391 gpio3: gpio@020a4000 { 404 gpio3: gpio@020a4000 {
@@ -397,6 +410,14 @@
397 #gpio-cells = <2>; 410 #gpio-cells = <2>;
398 interrupt-controller; 411 interrupt-controller;
399 #interrupt-cells = <2>; 412 #interrupt-cells = <2>;
413 gpio-ranges = <&iomuxc 0 112 8>, <&iomuxc 8 121 4>,
414 <&iomuxc 12 97 4>, <&iomuxc 16 166 3>,
415 <&iomuxc 19 85 2>, <&iomuxc 21 137 2>,
416 <&iomuxc 23 136 1>, <&iomuxc 24 91 1>,
417 <&iomuxc 25 99 1>, <&iomuxc 26 92 1>,
418 <&iomuxc 27 100 1>, <&iomuxc 28 93 1>,
419 <&iomuxc 29 101 1>, <&iomuxc 30 94 1>,
420 <&iomuxc 31 102 1>;
400 }; 421 };
401 422
402 gpio4: gpio@020a8000 { 423 gpio4: gpio@020a8000 {
@@ -408,6 +429,21 @@
408 #gpio-cells = <2>; 429 #gpio-cells = <2>;
409 interrupt-controller; 430 interrupt-controller;
410 #interrupt-cells = <2>; 431 #interrupt-cells = <2>;
432 gpio-ranges = <&iomuxc 0 95 1>, <&iomuxc 1 103 1>,
433 <&iomuxc 2 96 1>, <&iomuxc 3 104 1>,
434 <&iomuxc 4 97 1>, <&iomuxc 5 105 1>,
435 <&iomuxc 6 98 1>, <&iomuxc 7 106 1>,
436 <&iomuxc 8 28 1>, <&iomuxc 9 27 1>,
437 <&iomuxc 10 26 1>, <&iomuxc 11 29 1>,
438 <&iomuxc 12 32 1>, <&iomuxc 13 31 1>,
439 <&iomuxc 14 30 1>, <&iomuxc 15 33 1>,
440 <&iomuxc 16 84 1>, <&iomuxc 17 79 2>,
441 <&iomuxc 19 78 1>, <&iomuxc 20 76 1>,
442 <&iomuxc 21 81 2>, <&iomuxc 23 75 1>,
443 <&iomuxc 24 83 1>, <&iomuxc 25 74 1>,
444 <&iomuxc 26 77 1>, <&iomuxc 27 159 1>,
445 <&iomuxc 28 154 1>, <&iomuxc 29 157 1>,
446 <&iomuxc 30 152 1>, <&iomuxc 31 156 1>;
411 }; 447 };
412 448
413 gpio5: gpio@020ac000 { 449 gpio5: gpio@020ac000 {
@@ -419,6 +455,17 @@
419 #gpio-cells = <2>; 455 #gpio-cells = <2>;
420 interrupt-controller; 456 interrupt-controller;
421 #interrupt-cells = <2>; 457 #interrupt-cells = <2>;
458 gpio-ranges = <&iomuxc 0 158 1>, <&iomuxc 1 151 1>,
459 <&iomuxc 2 155 1>, <&iomuxc 3 153 1>,
460 <&iomuxc 4 150 1>, <&iomuxc 5 149 1>,
461 <&iomuxc 6 144 1>, <&iomuxc 7 147 1>,
462 <&iomuxc 8 142 1>, <&iomuxc 9 146 1>,
463 <&iomuxc 10 148 1>, <&iomuxc 11 141 1>,
464 <&iomuxc 12 145 1>, <&iomuxc 13 143 1>,
465 <&iomuxc 14 140 1>, <&iomuxc 15 139 1>,
466 <&iomuxc 16 164 2>, <&iomuxc 18 160 1>,
467 <&iomuxc 19 162 1>, <&iomuxc 20 163 1>,
468 <&iomuxc 21 161 1>;
422 }; 469 };
423 470
424 kpp: kpp@020b8000 { 471 kpp: kpp@020b8000 {
diff --git a/arch/arm/boot/dts/imx6sx-pinfunc.h b/arch/arm/boot/dts/imx6sx-pinfunc.h
index bb9c6b78cb97..42c4c800feea 100644
--- a/arch/arm/boot/dts/imx6sx-pinfunc.h
+++ b/arch/arm/boot/dts/imx6sx-pinfunc.h
@@ -308,6 +308,20 @@
308#define MX6SX_PAD_ENET1_RX_CLK__VDEC_DEBUG_35 0x008C 0x03D4 0x0000 0x8 0x0 308#define MX6SX_PAD_ENET1_RX_CLK__VDEC_DEBUG_35 0x008C 0x03D4 0x0000 0x8 0x0
309#define MX6SX_PAD_ENET1_RX_CLK__PCIE_CTRL_DEBUG_29 0x008C 0x03D4 0x0000 0x9 0x0 309#define MX6SX_PAD_ENET1_RX_CLK__PCIE_CTRL_DEBUG_29 0x008C 0x03D4 0x0000 0x9 0x0
310#define MX6SX_PAD_ENET1_TX_CLK__ENET1_TX_CLK 0x0090 0x03D8 0x0000 0x0 0x0 310#define MX6SX_PAD_ENET1_TX_CLK__ENET1_TX_CLK 0x0090 0x03D8 0x0000 0x0 0x0
311/*
312 * SION bit is necessary for ENET1_REF_CLK1 (ENET2_REF_CLK2 untested) if it is
313 * used as clock output of IMX6SX_CLK_ENET_REF (ENET1_TX_CLK) to e.g. supply a
314 * PHY in RMII mode. This configuration is valid if:
315 * - bit 1 in field IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK is set
316 * - bit 1 in field IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK unset
317 * It seems to be a silicon bug that in this configuration ENET1_TX reference
318 * clock isn't provided automatically. According to i.MX6SX reference manual
319 * (IOMUXC_GPR_GPR1 field descriptions: ENET1_CLK_SEL, Rev. 0 from 2/2015) it
320 * should be the case.
321 * So this might have unwanted side effects for other hardware units that are
322 * also connected to that pin and using respective function as input (e.g.
323 * UART1's DTR handling on MX6SX_PAD_ENET1_TX_CLK__UART1_DTR_B).
324 */
311#define MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x0090 0x03D8 0x0760 0x1 0x1 325#define MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x0090 0x03D8 0x0760 0x1 0x1
312#define MX6SX_PAD_ENET1_TX_CLK__AUDMUX_AUD4_RXD 0x0090 0x03D8 0x0644 0x2 0x1 326#define MX6SX_PAD_ENET1_TX_CLK__AUDMUX_AUD4_RXD 0x0090 0x03D8 0x0644 0x2 0x1
313#define MX6SX_PAD_ENET1_TX_CLK__UART1_DTR_B 0x0090 0x03D8 0x0000 0x3 0x0 327#define MX6SX_PAD_ENET1_TX_CLK__UART1_DTR_B 0x0090 0x03D8 0x0000 0x3 0x0
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 2863c52be6f5..1a473e83efbf 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -159,6 +159,16 @@
159 arm,data-latency = <4 2 3>; 159 arm,data-latency = <4 2 3>;
160 }; 160 };
161 161
162 gpu: gpu@01800000 {
163 compatible = "vivante,gc";
164 reg = <0x01800000 0x4000>;
165 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
166 clocks = <&clks IMX6SX_CLK_GPU>,
167 <&clks IMX6SX_CLK_GPU>,
168 <&clks IMX6SX_CLK_GPU>;
169 clock-names = "bus", "core", "shader";
170 };
171
162 dma_apbh: dma-apbh@01804000 { 172 dma_apbh: dma-apbh@01804000 {
163 compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh"; 173 compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh";
164 reg = <0x01804000 0x2000>; 174 reg = <0x01804000 0x2000>;
@@ -438,6 +448,7 @@
438 #gpio-cells = <2>; 448 #gpio-cells = <2>;
439 interrupt-controller; 449 interrupt-controller;
440 #interrupt-cells = <2>; 450 #interrupt-cells = <2>;
451 gpio-ranges = <&iomuxc 0 5 26>;
441 }; 452 };
442 453
443 gpio2: gpio@020a0000 { 454 gpio2: gpio@020a0000 {
@@ -449,6 +460,7 @@
449 #gpio-cells = <2>; 460 #gpio-cells = <2>;
450 interrupt-controller; 461 interrupt-controller;
451 #interrupt-cells = <2>; 462 #interrupt-cells = <2>;
463 gpio-ranges = <&iomuxc 0 31 20>;
452 }; 464 };
453 465
454 gpio3: gpio@020a4000 { 466 gpio3: gpio@020a4000 {
@@ -460,6 +472,7 @@
460 #gpio-cells = <2>; 472 #gpio-cells = <2>;
461 interrupt-controller; 473 interrupt-controller;
462 #interrupt-cells = <2>; 474 #interrupt-cells = <2>;
475 gpio-ranges = <&iomuxc 0 51 29>;
463 }; 476 };
464 477
465 gpio4: gpio@020a8000 { 478 gpio4: gpio@020a8000 {
@@ -471,6 +484,7 @@
471 #gpio-cells = <2>; 484 #gpio-cells = <2>;
472 interrupt-controller; 485 interrupt-controller;
473 #interrupt-cells = <2>; 486 #interrupt-cells = <2>;
487 gpio-ranges = <&iomuxc 0 80 32>;
474 }; 488 };
475 489
476 gpio5: gpio@020ac000 { 490 gpio5: gpio@020ac000 {
@@ -482,6 +496,7 @@
482 #gpio-cells = <2>; 496 #gpio-cells = <2>;
483 interrupt-controller; 497 interrupt-controller;
484 #interrupt-cells = <2>; 498 #interrupt-cells = <2>;
499 gpio-ranges = <&iomuxc 0 112 24>;
485 }; 500 };
486 501
487 gpio6: gpio@020b0000 { 502 gpio6: gpio@020b0000 {
@@ -493,6 +508,7 @@
493 #gpio-cells = <2>; 508 #gpio-cells = <2>;
494 interrupt-controller; 509 interrupt-controller;
495 #interrupt-cells = <2>; 510 #interrupt-cells = <2>;
511 gpio-ranges = <&iomuxc 0 136 12>, <&iomuxc 12 158 11>;
496 }; 512 };
497 513
498 gpio7: gpio@020b4000 { 514 gpio7: gpio@020b4000 {
@@ -504,6 +520,7 @@
504 #gpio-cells = <2>; 520 #gpio-cells = <2>;
505 interrupt-controller; 521 interrupt-controller;
506 #interrupt-cells = <2>; 522 #interrupt-cells = <2>;
523 gpio-ranges = <&iomuxc 0 148 10>, <&iomuxc 10 169 2>;
507 }; 524 };
508 525
509 kpp: kpp@020b8000 { 526 kpp: kpp@020b8000 {
@@ -1273,4 +1290,9 @@
1273 status = "disabled"; 1290 status = "disabled";
1274 }; 1291 };
1275 }; 1292 };
1293
1294 gpu-subsystem {
1295 compatible = "fsl,imx-gpu-subsystem";
1296 cores = <&gpu>;
1297 };
1276}; 1298};
diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts
new file mode 100644
index 000000000000..4c4af76143e3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts
@@ -0,0 +1,101 @@
1/*
2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44
45#include <dt-bindings/gpio/gpio.h>
46#include "imx6ul-geam.dtsi"
47
48/ {
49 model = "Engicam GEAM6UL";
50 compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
51};
52
53&can1 {
54 status = "okay";
55};
56
57&can2 {
58 status = "okay";
59};
60
61&lcdif {
62 display = <&display0>;
63 status = "okay";
64
65 display0: display {
66 bits-per-pixel = <16>;
67 bus-width = <18>;
68 status = "okay";
69
70 display-timings {
71 native-mode = <&timing0>;
72 timing0: timing0 {
73 clock-frequency = <28000000>;
74 hactive = <800>;
75 vactive = <480>;
76 hfront-porch = <30>;
77 hback-porch = <30>;
78 hsync-len = <64>;
79 vback-porch = <5>;
80 vfront-porch = <5>;
81 vsync-len = <20>;
82 hsync-active = <0>;
83 vsync-active = <0>;
84 de-active = <1>;
85 pixelclk-active = <0>;
86 };
87 };
88 };
89};
90
91&usdhc1 {
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_usdhc1>;
94 status = "okay";
95};
96
97&tsc {
98 measure-delay-time = <0x1ffff>;
99 pre-charge-time = <0x1fff>;
100 status = "okay";
101};
diff --git a/arch/arm/boot/dts/imx6ul-geam.dtsi b/arch/arm/boot/dts/imx6ul-geam.dtsi
new file mode 100644
index 000000000000..64eb9ed59b9c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam.dtsi
@@ -0,0 +1,361 @@
1/*
2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/input/input.h>
45#include "imx6ul.dtsi"
46
47/ {
48 memory {
49 reg = <0x80000000 0x08000000>;
50 };
51
52 chosen {
53 stdout-path = &uart1;
54 };
55
56 reg_1p8v: regulator-1p8v {
57 compatible = "regulator-fixed";
58 regulator-name = "1P8V";
59 regulator-min-microvolt = <1800000>;
60 regulator-max-microvolt = <1800000>;
61 regulator-always-on;
62 regulator-boot-on;
63 };
64
65 reg_3p3v: regulator-3p3v {
66 compatible = "regulator-fixed";
67 regulator-name = "3P3V";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 regulator-always-on;
71 regulator-boot-on;
72 };
73};
74
75&can1 {
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_flexcan1>;
78 xceiver-supply = <&reg_3p3v>;
79};
80
81&can2 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_flexcan2>;
84 xceiver-supply = <&reg_3p3v>;
85};
86
87&fec1 {
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_enet1>;
90 phy-mode = "rmii";
91 phy-handle = <&ethphy0>;
92 status = "okay";
93};
94
95&fec2 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_enet2>;
98 phy-mode = "rmii";
99 phy-handle = <&ethphy1>;
100 status = "okay";
101
102 mdio {
103 #address-cells = <1>;
104 #size-cells = <0>;
105
106 ethphy0: ethernet-phy@0 {
107 compatible = "ethernet-phy-ieee802.3-c22";
108 reg = <0>;
109 };
110
111 ethphy1: ethernet-phy@1 {
112 compatible = "ethernet-phy-ieee802.3-c22";
113 reg = <1>;
114 };
115 };
116};
117
118&gpmi {
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_gpmi_nand>;
121 nand-on-flash-bbt;
122 status = "okay";
123};
124
125&i2c1 {
126 clock-frequency = <100000>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_i2c1>;
129 status = "okay";
130};
131
132&i2c2 {
133 clock_frequency = <100000>;
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_i2c2>;
136 status = "okay";
137};
138
139&lcdif {
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_lcdif_dat
142 &pinctrl_lcdif_ctrl>;
143 display = <&display0>;
144};
145
146&tsc {
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_tsc>;
149 xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
150};
151
152&uart1 {
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_uart1>;
155 status = "okay";
156};
157
158&uart2 {
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_uart2>;
161 status = "okay";
162};
163
164&usbotg1 {
165 dr_mode = "peripheral";
166 status = "okay";
167};
168
169&usbotg2 {
170 dr_mode = "host";
171 status = "okay";
172};
173
174&usdhc1 {
175 pinctrl-names = "default", "state_100mhz", "state_200mhz";
176 pinctrl-0 = <&pinctrl_usdhc1>;
177 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
178 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
179 bus-width = <4>;
180 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
181 no-1-8-v;
182 status = "okay";
183};
184
185&iomuxc {
186 pinctrl_enet1: enet1grp {
187 fsl,pins = <
188 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
189 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
190 MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
191 MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
192 MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
193 MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
194 MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
195 >;
196 };
197
198 pinctrl_enet2: enet2grp {
199 fsl,pins = <
200 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
201 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
202 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
203 MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */
204 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
205 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
206 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
207 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
208 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
209 MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031
210 >;
211 };
212
213 pinctrl_flexcan1: flexcan1grp {
214 fsl,pins = <
215 MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
216 MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
217 >;
218 };
219
220 pinctrl_flexcan2: flexcan2grp {
221 fsl,pins = <
222 MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
223 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
224 >;
225 };
226
227 pinctrl_gpmi_nand: gpmi-nand {
228 fsl,pins = <
229 MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
230 MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
231 MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
232 MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
233 MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
234 MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
235 MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
236 MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
237 MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
238 MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
239 MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
240 MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
241 MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
242 MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
243 MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
244 >;
245 };
246
247 pinctrl_i2c1: i2c1grp {
248 fsl,pins = <
249 MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
250 MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
251 >;
252 };
253
254 pinctrl_i2c2: i2c2grp {
255 fsl,pins = <
256 MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
257 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
258 >;
259 };
260
261 pinctrl_lcdif_ctrl: lcdifctrlgrp {
262 fsl,pins = <
263 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
264 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
265 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
266 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
267 >;
268 };
269
270 pinctrl_lcdif_dat: lcdifdatgrp {
271 fsl,pins = <
272 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
273 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
274 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
275 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
276 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
277 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
278 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
279 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
280 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
281 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
282 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
283 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
284 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
285 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
286 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
287 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
288 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
289 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
290 >;
291 };
292
293 pinctrl_tsc: tscgrp {
294 fsl,pin = <
295 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
296 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
297 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
298 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
299 >;
300 };
301
302 pinctrl_uart1: uart1grp {
303 fsl,pins = <
304 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
305 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
306 >;
307 };
308
309 pinctrl_uart2: uart2grp {
310 fsl,pins = <
311 MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
312 MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
313 MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
314 MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
315 >;
316 };
317
318 pinctrl_usdhc1: usdhc1grp {
319 fsl,pins = <
320 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
321 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
322 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
323 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
324 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
325 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
326 >;
327 };
328
329 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
330 fsl,pins = <
331 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
332 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
333 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
334 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
335 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
336 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
337 >;
338 };
339
340 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
341 fsl,pins = <
342 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
343 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
344 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
345 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
346 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
347 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
348 >;
349 };
350
351 pinctrl_usdhc2: usdhc2grp {
352 fsl,pins = <
353 MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070
354 MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070
355 MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070
356 MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070
357 MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070
358 MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070
359 >;
360 };
361};
diff --git a/arch/arm/boot/dts/imx6ul-pico-hobbit.dts b/arch/arm/boot/dts/imx6ul-pico-hobbit.dts
index 86f68faded0e..827d9e8fc74e 100644
--- a/arch/arm/boot/dts/imx6ul-pico-hobbit.dts
+++ b/arch/arm/boot/dts/imx6ul-pico-hobbit.dts
@@ -100,6 +100,18 @@
100 gpio = <&gpio1 6 0>; 100 gpio = <&gpio1 6 0>;
101 }; 101 };
102 102
103 reg_brcm: regulator-brcm {
104 compatible = "regulator-fixed";
105 enable-active-high;
106 gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_brcm_reg>;
109 regulator-name = "brcm_reg";
110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <3300000>;
112 startup-delay-us = <200000>;
113 };
114
103 sound { 115 sound {
104 compatible = "fsl,imx-audio-sgtl5000"; 116 compatible = "fsl,imx-audio-sgtl5000";
105 model = "imx6ul-sgtl5000"; 117 model = "imx6ul-sgtl5000";
@@ -325,12 +337,27 @@
325 pinctrl-names = "default"; 337 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_usdhc2>; 338 pinctrl-0 = <&pinctrl_usdhc2>;
327 no-1-8-v; 339 no-1-8-v;
340 non-removable;
328 keep-power-in-suspend; 341 keep-power-in-suspend;
329 wakeup-source; 342 wakeup-source;
343 vmmc-supply = <&reg_brcm>;
330 status = "okay"; 344 status = "okay";
331}; 345};
332 346
347&wdog1 {
348 pinctrl-names = "default";
349 pinctrl-0 = <&pinctrl_wdog>;
350 fsl,ext-reset-output;
351};
352
333&iomuxc { 353&iomuxc {
354 pinctrl_brcm_reg: brcmreggrp {
355 fsl,pins = <
356 MX6UL_PAD_NAND_DATA06__GPIO4_IO08 0x10b0 /* WL_REG_ON */
357 MX6UL_PAD_NAND_DATA04__GPIO4_IO06 0x10b0 /* WL_HOST_WAKE */
358 >;
359 };
360
334 pinctrl_enet2: enet2grp { 361 pinctrl_enet2: enet2grp {
335 fsl,pins = < 362 fsl,pins = <
336 MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO 0x1b0b0 363 MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO 0x1b0b0
@@ -513,4 +540,10 @@
513 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 540 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
514 >; 541 >;
515 }; 542 };
543
544 pinctrl_wdog: wdoggrp {
545 fsl,pins = <
546 MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
547 >;
548 };
516}; 549};
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 33b95d78831a..c5c05fdccc78 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -411,6 +411,8 @@
411 #gpio-cells = <2>; 411 #gpio-cells = <2>;
412 interrupt-controller; 412 interrupt-controller;
413 #interrupt-cells = <2>; 413 #interrupt-cells = <2>;
414 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
415 <&iomuxc 16 33 16>;
414 }; 416 };
415 417
416 gpio2: gpio@020a0000 { 418 gpio2: gpio@020a0000 {
@@ -422,6 +424,7 @@
422 #gpio-cells = <2>; 424 #gpio-cells = <2>;
423 interrupt-controller; 425 interrupt-controller;
424 #interrupt-cells = <2>; 426 #interrupt-cells = <2>;
427 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
425 }; 428 };
426 429
427 gpio3: gpio@020a4000 { 430 gpio3: gpio@020a4000 {
@@ -433,6 +436,7 @@
433 #gpio-cells = <2>; 436 #gpio-cells = <2>;
434 interrupt-controller; 437 interrupt-controller;
435 #interrupt-cells = <2>; 438 #interrupt-cells = <2>;
439 gpio-ranges = <&iomuxc 0 65 29>;
436 }; 440 };
437 441
438 gpio4: gpio@020a8000 { 442 gpio4: gpio@020a8000 {
@@ -444,6 +448,7 @@
444 #gpio-cells = <2>; 448 #gpio-cells = <2>;
445 interrupt-controller; 449 interrupt-controller;
446 #interrupt-cells = <2>; 450 #interrupt-cells = <2>;
451 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
447 }; 452 };
448 453
449 gpio5: gpio@020ac000 { 454 gpio5: gpio@020ac000 {
@@ -455,6 +460,7 @@
455 #gpio-cells = <2>; 460 #gpio-cells = <2>;
456 interrupt-controller; 461 interrupt-controller;
457 #interrupt-cells = <2>; 462 #interrupt-cells = <2>;
463 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
458 }; 464 };
459 465
460 fec2: ethernet@020b4000 { 466 fec2: ethernet@020b4000 {
@@ -644,7 +650,8 @@
644 }; 650 };
645 651
646 gpr: iomuxc-gpr@020e4000 { 652 gpr: iomuxc-gpr@020e4000 {
647 compatible = "fsl,imx6ul-iomuxc-gpr", "syscon"; 653 compatible = "fsl,imx6ul-iomuxc-gpr",
654 "fsl,imx6q-iomuxc-gpr", "syscon";
648 reg = <0x020e4000 0x4000>; 655 reg = <0x020e4000 0x4000>;
649 }; 656 };
650 657
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 1545661df583..373ee19196a6 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -138,10 +138,6 @@
138}; 138};
139 139
140&usdhc1 { 140&usdhc1 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
143 no-1-8-v;
144 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
145 keep-power-in-suspend; 141 keep-power-in-suspend;
146 wakeup-source; 142 wakeup-source;
147 status = "okay"; 143 status = "okay";
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 0a9d3a822fc0..a9cc65725f19 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -46,12 +46,18 @@
46 pwms = <&pwm1 0 5000000>; 46 pwms = <&pwm1 0 5000000>;
47 }; 47 };
48 48
49 reg_3p3v: regulator-3p3v { 49 reg_module_3v3: regulator-module-3v3 {
50 compatible = "regulator-fixed"; 50 compatible = "regulator-fixed";
51 regulator-name = "3P3V"; 51 regulator-name = "+V3.3";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 };
55
56 reg_module_3v3_avdd: regulator-module-3v3-avdd {
57 compatible = "regulator-fixed";
58 regulator-name = "+V3.3_AVDD_AUDIO";
52 regulator-min-microvolt = <3300000>; 59 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>; 60 regulator-max-microvolt = <3300000>;
54 regulator-always-on;
55 }; 61 };
56 62
57 reg_vref_1v8: regulator-vref-1v8 { 63 reg_vref_1v8: regulator-vref-1v8 {
@@ -60,6 +66,22 @@
60 regulator-min-microvolt = <1800000>; 66 regulator-min-microvolt = <1800000>;
61 regulator-max-microvolt = <1800000>; 67 regulator-max-microvolt = <1800000>;
62 }; 68 };
69
70 sound {
71 compatible = "simple-audio-card";
72 simple-audio-card,name = "imx7-sgtl5000";
73 simple-audio-card,format = "i2s";
74 simple-audio-card,bitclock-master = <&dailink_master>;
75 simple-audio-card,frame-master = <&dailink_master>;
76 simple-audio-card,cpu {
77 sound-dai = <&sai1>;
78 };
79
80 dailink_master: simple-audio-card,codec {
81 sound-dai = <&codec>;
82 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
83 };
84 };
63}; 85};
64 86
65&adc1 { 87&adc1 {
@@ -97,6 +119,18 @@
97 pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>; 119 pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>;
98 status = "okay"; 120 status = "okay";
99 121
122 codec: sgtl5000@0a {
123 compatible = "fsl,sgtl5000";
124 #sound-dai-cells = <0>;
125 reg = <0x0a>;
126 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_sai1_mclk>;
129 VDDA-supply = <&reg_module_3v3_avdd>;
130 VDDIO-supply = <&reg_module_3v3>;
131 VDDD-supply = <&reg_DCDC3>;
132 };
133
100 ad7879@2c { 134 ad7879@2c {
101 compatible = "adi,ad7879-1"; 135 compatible = "adi,ad7879-1";
102 reg = <0x2c>; 136 reg = <0x2c>;
@@ -217,6 +251,12 @@
217 vin-supply = <&reg_DCDC3>; 251 vin-supply = <&reg_DCDC3>;
218}; 252};
219 253
254&sai1 {
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_sai1>;
257 status = "okay";
258};
259
220&snvs_pwrkey { 260&snvs_pwrkey {
221 status = "disabled"; 261 status = "disabled";
222}; 262};
@@ -251,6 +291,14 @@
251 dr_mode = "host"; 291 dr_mode = "host";
252}; 292};
253 293
294&usdhc1 {
295 pinctrl-names = "default";
296 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
297 no-1-8-v;
298 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
299 disable-wp;
300};
301
254&iomuxc { 302&iomuxc {
255 pinctrl-names = "default"; 303 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>; 304 pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>;
@@ -528,13 +576,18 @@
528 576
529 pinctrl_sai1: sai1-grp { 577 pinctrl_sai1: sai1-grp {
530 fsl,pins = < 578 fsl,pins = <
531 MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f
532 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f 579 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
533 MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f 580 MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
534 MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 581 MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
535 MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f 582 MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f
536 >; 583 >;
537 }; 584 };
585
586 pinctrl_sai1_mclk: sai1grp_mclk {
587 fsl,pins = <
588 MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f
589 >;
590 };
538}; 591};
539 592
540&iomuxc_lpsr { 593&iomuxc_lpsr {
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 51c13cbdffb7..f6dee41a05d9 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -45,30 +45,42 @@
45 45
46/ { 46/ {
47 cpus { 47 cpus {
48 cpu0: cpu@0 {
49 operating-points = <
50 /* KHz uV */
51 996000 1075000
52 792000 975000
53 >;
54 clock-frequency = <996000000>;
55 };
56
48 cpu1: cpu@1 { 57 cpu1: cpu@1 {
49 compatible = "arm,cortex-a7"; 58 compatible = "arm,cortex-a7";
50 device_type = "cpu"; 59 device_type = "cpu";
51 reg = <1>; 60 reg = <1>;
61 clock-frequency = <996000000>;
52 }; 62 };
53 }; 63 };
54 64
55 etm@3007d000 { 65 soc {
56 compatible = "arm,coresight-etm3x", "arm,primecell"; 66 etm@3007d000 {
57 reg = <0x3007d000 0x1000>; 67 compatible = "arm,coresight-etm3x", "arm,primecell";
68 reg = <0x3007d000 0x1000>;
58 69
59 /* 70 /*
60 * System will hang if added nosmp in kernel command line 71 * System will hang if added nosmp in kernel command line
61 * without arm,primecell-periphid because amba bus try to 72 * without arm,primecell-periphid because amba bus try to
62 * read id and core1 power off at this time. 73 * read id and core1 power off at this time.
63 */ 74 */
64 arm,primecell-periphid = <0xbb956>; 75 arm,primecell-periphid = <0xbb956>;
65 cpu = <&cpu1>; 76 cpu = <&cpu1>;
66 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 77 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
67 clock-names = "apb_pclk"; 78 clock-names = "apb_pclk";
68 79
69 port { 80 port {
70 etm1_out_port: endpoint { 81 etm1_out_port: endpoint {
71 remote-endpoint = <&ca_funnel_in_port1>; 82 remote-endpoint = <&ca_funnel_in_port1>;
83 };
72 }; 84 };
73 }; 85 };
74 }; 86 };
diff --git a/arch/arm/boot/dts/imx7s-warp.dts b/arch/arm/boot/dts/imx7s-warp.dts
new file mode 100644
index 000000000000..0345267f3390
--- /dev/null
+++ b/arch/arm/boot/dts/imx7s-warp.dts
@@ -0,0 +1,446 @@
1/*
2 * Copyright (C) 2016 NXP Semiconductors.
3 * Author: Fabio Estevam <fabio.estevam@nxp.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45
46#include <dt-bindings/input/input.h>
47#include "imx7s.dtsi"
48
49/ {
50 model = "Warp i.MX7 Board";
51 compatible = "warp,imx7s-warp", "fsl,imx7s";
52
53 memory {
54 reg = <0x80000000 0x20000000>;
55 };
56
57 gpio-keys {
58 compatible = "gpio-keys";
59 pinctrl-0 = <&pinctrl_gpio>;
60 autorepeat;
61
62 back {
63 label = "Back";
64 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
65 linux,code = <KEY_BACK>;
66 wakeup-source;
67 };
68 };
69
70 reg_brcm: regulator-brcm {
71 compatible = "regulator-fixed";
72 enable-active-high;
73 gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&pinctrl_brcm_reg>;
76 regulator-name = "brcm_reg";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
79 startup-delay-us = <200000>;
80 };
81
82 reg_bt: regulator-bt {
83 compatible = "regulator-fixed";
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_bt_reg>;
86 enable-active-high;
87 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
88 regulator-name = "bt_reg";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
91 regulator-always-on;
92 };
93
94 sound {
95 compatible = "simple-audio-card";
96 simple-audio-card,name = "imx7-sgtl5000";
97 simple-audio-card,format = "i2s";
98 simple-audio-card,bitclock-master = <&dailink_master>;
99 simple-audio-card,frame-master = <&dailink_master>;
100 simple-audio-card,cpu {
101 sound-dai = <&sai1>;
102 };
103
104 dailink_master: simple-audio-card,codec {
105 sound-dai = <&codec>;
106 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
107 };
108 };
109};
110
111&clks {
112 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
113 assigned-clock-rates = <884736000>;
114};
115
116&cpu0 {
117 arm-supply = <&sw1a_reg>;
118};
119
120&i2c1 {
121 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_i2c1>;
123 status = "okay";
124
125 pmic: pfuze3000@08 {
126 compatible = "fsl,pfuze3000";
127 reg = <0x08>;
128
129 regulators {
130 sw1a_reg: sw1a {
131 regulator-min-microvolt = <700000>;
132 regulator-max-microvolt = <1475000>;
133 regulator-boot-on;
134 regulator-always-on;
135 regulator-ramp-delay = <6250>;
136 };
137
138 /* use sw1c_reg to align with pfuze100/pfuze200 */
139 sw1c_reg: sw1b {
140 regulator-min-microvolt = <700000>;
141 regulator-max-microvolt = <1475000>;
142 regulator-boot-on;
143 regulator-always-on;
144 regulator-ramp-delay = <6250>;
145 };
146
147 sw2_reg: sw2 {
148 regulator-min-microvolt = <1500000>;
149 regulator-max-microvolt = <1850000>;
150 regulator-boot-on;
151 regulator-always-on;
152 };
153
154 sw3a_reg: sw3 {
155 regulator-min-microvolt = <900000>;
156 regulator-max-microvolt = <1650000>;
157 regulator-boot-on;
158 regulator-always-on;
159 };
160
161 swbst_reg: swbst {
162 regulator-min-microvolt = <5000000>;
163 regulator-max-microvolt = <5150000>;
164 };
165
166 snvs_reg: vsnvs {
167 regulator-min-microvolt = <1000000>;
168 regulator-max-microvolt = <3000000>;
169 regulator-boot-on;
170 regulator-always-on;
171 };
172
173 vref_reg: vrefddr {
174 regulator-boot-on;
175 regulator-always-on;
176 };
177
178 vgen1_reg: vldo1 {
179 regulator-min-microvolt = <1800000>;
180 regulator-max-microvolt = <3300000>;
181 regulator-always-on;
182 };
183
184 vgen2_reg: vldo2 {
185 regulator-min-microvolt = <800000>;
186 regulator-max-microvolt = <1550000>;
187 };
188
189 vgen3_reg: vccsd {
190 regulator-min-microvolt = <2850000>;
191 regulator-max-microvolt = <3300000>;
192 regulator-always-on;
193 };
194
195 vgen4_reg: v33 {
196 regulator-min-microvolt = <2850000>;
197 regulator-max-microvolt = <3300000>;
198 regulator-always-on;
199 };
200
201 vgen5_reg: vldo3 {
202 regulator-min-microvolt = <1800000>;
203 regulator-max-microvolt = <3300000>;
204 regulator-always-on;
205 };
206
207 vgen6_reg: vldo4 {
208 regulator-min-microvolt = <1800000>;
209 regulator-max-microvolt = <3300000>;
210 regulator-always-on;
211 };
212 };
213 };
214};
215
216&i2c2 {
217 clock-frequency = <100000>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_i2c2>;
220 status = "okay";
221};
222
223&i2c4 {
224 clock-frequency = <100000>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_i2c4>;
227 status = "okay";
228
229 codec: sgtl5000@0a {
230 #sound-dai-cells = <0>;
231 reg = <0x0a>;
232 compatible = "fsl,sgtl5000";
233 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_sai1_mclk>;
236 VDDA-supply = <&vgen4_reg>;
237 VDDIO-supply = <&vgen4_reg>;
238 VDDD-supply = <&vgen2_reg>;
239 };
240
241 mpl3115@60 {
242 compatible = "fsl,mpl3115";
243 reg = <0x60>;
244 };
245};
246
247&sai1 {
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_sai1>;
250 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
251 <&clks IMX7D_SAI1_ROOT_CLK>;
252 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
253 assigned-clock-rates = <0>, <36864000>;
254 status = "okay";
255};
256
257&uart1 {
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_uart1>;
260 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
261 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
262 status = "okay";
263};
264
265&uart3 {
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_uart3>;
268 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
269 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
270 uart-has-rtscts;
271 status = "okay";
272};
273
274&usbotg1 {
275 dr_mode = "peripheral";
276 status = "okay";
277};
278
279&usdhc1 {
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_usdhc1>;
282 bus-width = <4>;
283 keep-power-in-suspend;
284 no-1-8-v;
285 non-removable;
286 vmmc-supply = <&reg_brcm>;
287 status = "okay";
288};
289
290&usdhc3 {
291 pinctrl-names = "default", "state_100mhz", "state_200mhz";
292 pinctrl-0 = <&pinctrl_usdhc3>;
293 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
294 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
295 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
296 assigned-clock-rates = <400000000>;
297 bus-width = <8>;
298 fsl,tuning-step = <2>;
299 non-removable;
300 status = "okay";
301};
302
303&wdog1 {
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_wdog>;
306 fsl,ext-reset-output;
307 status = "okay";
308};
309
310&iomuxc {
311 pinctrl_brcm_reg: brcmreggrp {
312 fsl,pins = <
313 MX7D_PAD_SD2_WP__GPIO5_IO10 0x14 /* WL_REG_ON */
314 >;
315 };
316
317 pinctrl_bt_reg: btreggrp {
318 fsl,pins = <
319 MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* BT_REG_ON */
320 >;
321 };
322
323 pinctrl_gpio: gpiogrp {
324 fsl,pins = <
325 MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x14
326 >;
327 };
328
329 pinctrl_i2c1: i2c1grp {
330 fsl,pins = <
331 MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
332 MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
333 >;
334 };
335
336 pinctrl_i2c2: i2c2grp {
337 fsl,pins = <
338 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
339 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
340 >;
341 };
342
343 pinctrl_i2c4: i2c4grp {
344 fsl,pins = <
345 MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f
346 MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f
347 >;
348 };
349
350 pinctrl_sai1: sai1grp {
351 fsl,pins = <
352 MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1f
353 MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f
354 MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
355 MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30
356 >;
357 };
358
359 pinctrl_sai1_mclk: sai1mclkgrp {
360 fsl,pins = <
361 MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f
362 >;
363 };
364
365 pinctrl_uart1: uart1grp {
366 fsl,pins = <
367 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
368 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
369 >;
370 };
371
372 pinctrl_uart3: uart3grp {
373 fsl,pins = <
374 MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x79
375 MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x79
376 MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x79
377 MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x79
378 >;
379 };
380
381 pinctrl_usdhc1: usdhc1grp {
382 fsl,pins = <
383 MX7D_PAD_SD1_CMD__SD1_CMD 0x59
384 MX7D_PAD_SD1_CLK__SD1_CLK 0x19
385 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
386 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
387 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
388 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
389 MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* WL_HOST_WAKE */
390 >;
391 };
392
393 pinctrl_usdhc3: usdhc3grp {
394 fsl,pins = <
395 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
396 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
397 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
398 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
399 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
400 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
401 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
402 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
403 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
404 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
405 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x19
406 >;
407 };
408
409 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
410 fsl,pins = <
411 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
412 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
413 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
414 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
415 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
416 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
417 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
418 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
419 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
420 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
421 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x1a
422 >;
423 };
424
425 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
426 fsl,pins = <
427 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
428 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
429 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
430 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
431 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
432 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
433 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
434 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
435 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
436 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
437 MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x1b
438 >;
439 };
440
441 pinctrl_wdog: wdoggrp {
442 fsl,pins = <
443 MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
444 >;
445 };
446};
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 1e90bdbe3a6e..0d7d5ac6257b 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -85,26 +85,12 @@
85 compatible = "arm,cortex-a7"; 85 compatible = "arm,cortex-a7";
86 device_type = "cpu"; 86 device_type = "cpu";
87 reg = <0>; 87 reg = <0>;
88 operating-points = < 88 clock-frequency = <792000000>;
89 /* KHz uV */
90 996000 1075000
91 792000 975000
92 >;
93 clock-latency = <61036>; /* two CLK32 periods */ 89 clock-latency = <61036>; /* two CLK32 periods */
94 clocks = <&clks IMX7D_CLK_ARM>; 90 clocks = <&clks IMX7D_CLK_ARM>;
95 }; 91 };
96 }; 92 };
97 93
98 intc: interrupt-controller@31001000 {
99 compatible = "arm,cortex-a7-gic";
100 #interrupt-cells = <3>;
101 interrupt-controller;
102 reg = <0x31001000 0x1000>,
103 <0x31002000 0x1000>,
104 <0x31004000 0x2000>,
105 <0x31006000 0x2000>;
106 };
107
108 ckil: clock-cki { 94 ckil: clock-cki {
109 compatible = "fixed-clock"; 95 compatible = "fixed-clock";
110 #clock-cells = <0>; 96 #clock-cells = <0>;
@@ -119,195 +105,205 @@
119 clock-output-names = "osc"; 105 clock-output-names = "osc";
120 }; 106 };
121 107
122 timer { 108 soc {
123 compatible = "arm,armv7-timer"; 109 #address-cells = <1>;
124 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 110 #size-cells = <1>;
125 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 111 compatible = "simple-bus";
126 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
127 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
128 interrupt-parent = <&intc>; 112 interrupt-parent = <&intc>;
129 }; 113 ranges;
114
115 funnel@30041000 {
116 compatible = "arm,coresight-funnel", "arm,primecell";
117 reg = <0x30041000 0x1000>;
118 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
119 clock-names = "apb_pclk";
130 120
131 etr@30086000 { 121 ca_funnel_ports: ports {
132 compatible = "arm,coresight-tmc", "arm,primecell"; 122 #address-cells = <1>;
133 reg = <0x30086000 0x1000>; 123 #size-cells = <0>;
134 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
135 clock-names = "apb_pclk";
136 124
137 port { 125 /* funnel input ports */
138 etr_in_port: endpoint { 126 port@0 {
139 slave-mode; 127 reg = <0>;
140 remote-endpoint = <&replicator_out_port1>; 128 ca_funnel_in_port0: endpoint {
129 slave-mode;
130 remote-endpoint = <&etm0_out_port>;
131 };
132 };
133
134 /* funnel output port */
135 port@2 {
136 reg = <0>;
137 ca_funnel_out_port0: endpoint {
138 remote-endpoint = <&hugo_funnel_in_port0>;
139 };
140 };
141
142 /* the other input ports are not connect to anything */
141 }; 143 };
142 }; 144 };
143 };
144 145
145 tpiu@30087000 { 146 etm@3007c000 {
146 compatible = "arm,coresight-tpiu", "arm,primecell"; 147 compatible = "arm,coresight-etm3x", "arm,primecell";
147 reg = <0x30087000 0x1000>; 148 reg = <0x3007c000 0x1000>;
148 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 149 cpu = <&cpu0>;
149 clock-names = "apb_pclk"; 150 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
151 clock-names = "apb_pclk";
150 152
151 port { 153 port {
152 tpiu_in_port: endpoint { 154 etm0_out_port: endpoint {
153 slave-mode; 155 remote-endpoint = <&ca_funnel_in_port0>;
154 remote-endpoint = <&replicator_out_port1>; 156 };
155 }; 157 };
156 }; 158 };
157 };
158 159
159 replicator { 160 funnel@30083000 {
160 /* 161 compatible = "arm,coresight-funnel", "arm,primecell";
161 * non-configurable replicators don't show up on the 162 reg = <0x30083000 0x1000>;
162 * AMBA bus. As such no need to add "arm,primecell" 163 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
163 */ 164 clock-names = "apb_pclk";
164 compatible = "arm,coresight-replicator";
165 165
166 ports { 166 ports {
167 #address-cells = <1>; 167 #address-cells = <1>;
168 #size-cells = <0>; 168 #size-cells = <0>;
169 169
170 /* replicator output ports */ 170 /* funnel input ports */
171 port@0 { 171 port@0 {
172 reg = <0>; 172 reg = <0>;
173 replicator_out_port0: endpoint { 173 hugo_funnel_in_port0: endpoint {
174 remote-endpoint = <&tpiu_in_port>; 174 slave-mode;
175 remote-endpoint = <&ca_funnel_out_port0>;
176 };
175 }; 177 };
176 };
177 178
178 port@1 { 179 port@1 {
179 reg = <1>; 180 reg = <1>;
180 replicator_out_port1: endpoint { 181 hugo_funnel_in_port1: endpoint {
181 remote-endpoint = <&etr_in_port>; 182 slave-mode; /* M4 input */
183 };
182 }; 184 };
183 };
184 185
185 /* replicator input port */ 186 port@2 {
186 port@2 { 187 reg = <0>;
187 reg = <0>; 188 hugo_funnel_out_port0: endpoint {
188 replicator_in_port0: endpoint { 189 remote-endpoint = <&etf_in_port>;
189 slave-mode; 190 };
190 remote-endpoint = <&etf_out_port>;
191 }; 191 };
192
193 /* the other input ports are not connect to anything */
192 }; 194 };
193 }; 195 };
194 };
195 196
196 etf@30084000 { 197 etf@30084000 {
197 compatible = "arm,coresight-tmc", "arm,primecell"; 198 compatible = "arm,coresight-tmc", "arm,primecell";
198 reg = <0x30084000 0x1000>; 199 reg = <0x30084000 0x1000>;
199 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 200 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
200 clock-names = "apb_pclk"; 201 clock-names = "apb_pclk";
201 202
202 ports { 203 ports {
203 #address-cells = <1>; 204 #address-cells = <1>;
204 #size-cells = <0>; 205 #size-cells = <0>;
205 206
206 port@0 { 207 port@0 {
207 reg = <0>; 208 reg = <0>;
208 etf_in_port: endpoint { 209 etf_in_port: endpoint {
209 slave-mode; 210 slave-mode;
210 remote-endpoint = <&hugo_funnel_out_port0>; 211 remote-endpoint = <&hugo_funnel_out_port0>;
212 };
211 }; 213 };
212 };
213 214
214 port@1 { 215 port@1 {
215 reg = <0>; 216 reg = <0>;
216 etf_out_port: endpoint { 217 etf_out_port: endpoint {
217 remote-endpoint = <&replicator_in_port0>; 218 remote-endpoint = <&replicator_in_port0>;
219 };
218 }; 220 };
219 }; 221 };
220 }; 222 };
221 };
222
223 funnel@30083000 {
224 compatible = "arm,coresight-funnel", "arm,primecell";
225 reg = <0x30083000 0x1000>;
226 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
227 clock-names = "apb_pclk";
228 223
229 ports { 224 etr@30086000 {
230 #address-cells = <1>; 225 compatible = "arm,coresight-tmc", "arm,primecell";
231 #size-cells = <0>; 226 reg = <0x30086000 0x1000>;
227 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
228 clock-names = "apb_pclk";
232 229
233 /* funnel input ports */ 230 port {
234 port@0 { 231 etr_in_port: endpoint {
235 reg = <0>;
236 hugo_funnel_in_port0: endpoint {
237 slave-mode; 232 slave-mode;
238 remote-endpoint = <&ca_funnel_out_port0>; 233 remote-endpoint = <&replicator_out_port1>;
239 }; 234 };
240 }; 235 };
236 };
241 237
242 port@1 { 238 tpiu@30087000 {
243 reg = <1>; 239 compatible = "arm,coresight-tpiu", "arm,primecell";
244 hugo_funnel_in_port1: endpoint { 240 reg = <0x30087000 0x1000>;
245 slave-mode; /* M4 input */ 241 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
246 }; 242 clock-names = "apb_pclk";
247 };
248 243
249 port@2 { 244 port {
250 reg = <0>; 245 tpiu_in_port: endpoint {
251 hugo_funnel_out_port0: endpoint { 246 slave-mode;
252 remote-endpoint = <&etf_in_port>; 247 remote-endpoint = <&replicator_out_port1>;
253 }; 248 };
254 }; 249 };
255
256 /* the other input ports are not connect to anything */
257 }; 250 };
258 };
259 251
260 funnel@30041000 { 252 replicator {
261 compatible = "arm,coresight-funnel", "arm,primecell"; 253 /*
262 reg = <0x30041000 0x1000>; 254 * non-configurable replicators don't show up on the
263 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 255 * AMBA bus. As such no need to add "arm,primecell"
264 clock-names = "apb_pclk"; 256 */
257 compatible = "arm,coresight-replicator";
265 258
266 ca_funnel_ports: ports { 259 ports {
267 #address-cells = <1>; 260 #address-cells = <1>;
268 #size-cells = <0>; 261 #size-cells = <0>;
269 262
270 /* funnel input ports */ 263 /* replicator output ports */
271 port@0 { 264 port@0 {
272 reg = <0>; 265 reg = <0>;
273 ca_funnel_in_port0: endpoint { 266 replicator_out_port0: endpoint {
274 slave-mode; 267 remote-endpoint = <&tpiu_in_port>;
275 remote-endpoint = <&etm0_out_port>; 268 };
276 }; 269 };
277 };
278 270
279 /* funnel output port */ 271 port@1 {
280 port@2 { 272 reg = <1>;
281 reg = <0>; 273 replicator_out_port1: endpoint {
282 ca_funnel_out_port0: endpoint { 274 remote-endpoint = <&etr_in_port>;
283 remote-endpoint = <&hugo_funnel_in_port0>; 275 };
284 }; 276 };
285 };
286 277
287 /* the other input ports are not connect to anything */ 278 /* replicator input port */
279 port@2 {
280 reg = <0>;
281 replicator_in_port0: endpoint {
282 slave-mode;
283 remote-endpoint = <&etf_out_port>;
284 };
285 };
286 };
288 }; 287 };
289 };
290 288
291 etm@3007c000 { 289 intc: interrupt-controller@31001000 {
292 compatible = "arm,coresight-etm3x", "arm,primecell"; 290 compatible = "arm,cortex-a7-gic";
293 reg = <0x3007c000 0x1000>; 291 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
294 cpu = <&cpu0>; 292 #interrupt-cells = <3>;
295 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; 293 interrupt-controller;
296 clock-names = "apb_pclk"; 294 reg = <0x31001000 0x1000>,
297 295 <0x31002000 0x2000>,
298 port { 296 <0x31004000 0x2000>,
299 etm0_out_port: endpoint { 297 <0x31006000 0x2000>;
300 remote-endpoint = <&ca_funnel_in_port0>;
301 };
302 }; 298 };
303 };
304 299
305 soc { 300 timer {
306 #address-cells = <1>; 301 compatible = "arm,armv7-timer";
307 #size-cells = <1>; 302 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
308 compatible = "simple-bus"; 303 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
309 interrupt-parent = <&intc>; 304 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
310 ranges; 305 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
306 };
311 307
312 aips1: aips-bus@30000000 { 308 aips1: aips-bus@30000000 {
313 compatible = "fsl,aips-bus", "simple-bus"; 309 compatible = "fsl,aips-bus", "simple-bus";
@@ -325,6 +321,7 @@
325 #gpio-cells = <2>; 321 #gpio-cells = <2>;
326 interrupt-controller; 322 interrupt-controller;
327 #interrupt-cells = <2>; 323 #interrupt-cells = <2>;
324 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
328 }; 325 };
329 326
330 gpio2: gpio@30210000 { 327 gpio2: gpio@30210000 {
@@ -336,6 +333,7 @@
336 #gpio-cells = <2>; 333 #gpio-cells = <2>;
337 interrupt-controller; 334 interrupt-controller;
338 #interrupt-cells = <2>; 335 #interrupt-cells = <2>;
336 gpio-ranges = <&iomuxc 0 13 32>;
339 }; 337 };
340 338
341 gpio3: gpio@30220000 { 339 gpio3: gpio@30220000 {
@@ -347,6 +345,7 @@
347 #gpio-cells = <2>; 345 #gpio-cells = <2>;
348 interrupt-controller; 346 interrupt-controller;
349 #interrupt-cells = <2>; 347 #interrupt-cells = <2>;
348 gpio-ranges = <&iomuxc 0 45 29>;
350 }; 349 };
351 350
352 gpio4: gpio@30230000 { 351 gpio4: gpio@30230000 {
@@ -358,6 +357,7 @@
358 #gpio-cells = <2>; 357 #gpio-cells = <2>;
359 interrupt-controller; 358 interrupt-controller;
360 #interrupt-cells = <2>; 359 #interrupt-cells = <2>;
360 gpio-ranges = <&iomuxc 0 74 24>;
361 }; 361 };
362 362
363 gpio5: gpio@30240000 { 363 gpio5: gpio@30240000 {
@@ -369,6 +369,7 @@
369 #gpio-cells = <2>; 369 #gpio-cells = <2>;
370 interrupt-controller; 370 interrupt-controller;
371 #interrupt-cells = <2>; 371 #interrupt-cells = <2>;
372 gpio-ranges = <&iomuxc 0 98 18>;
372 }; 373 };
373 374
374 gpio6: gpio@30250000 { 375 gpio6: gpio@30250000 {
@@ -380,6 +381,7 @@
380 #gpio-cells = <2>; 381 #gpio-cells = <2>;
381 interrupt-controller; 382 interrupt-controller;
382 #interrupt-cells = <2>; 383 #interrupt-cells = <2>;
384 gpio-ranges = <&iomuxc 0 116 23>;
383 }; 385 };
384 386
385 gpio7: gpio@30260000 { 387 gpio7: gpio@30260000 {
@@ -391,6 +393,7 @@
391 #gpio-cells = <2>; 393 #gpio-cells = <2>;
392 interrupt-controller; 394 interrupt-controller;
393 #interrupt-cells = <2>; 395 #interrupt-cells = <2>;
396 gpio-ranges = <&iomuxc 0 139 16>;
394 }; 397 };
395 398
396 wdog1: wdog@30280000 { 399 wdog1: wdog@30280000 {
@@ -723,6 +726,51 @@
723 status = "disabled"; 726 status = "disabled";
724 }; 727 };
725 728
729 sai1: sai@308a0000 {
730 #sound-dai-cells = <0>;
731 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
732 reg = <0x308a0000 0x10000>;
733 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
734 clocks = <&clks IMX7D_SAI1_IPG_CLK>,
735 <&clks IMX7D_SAI1_ROOT_CLK>,
736 <&clks IMX7D_CLK_DUMMY>,
737 <&clks IMX7D_CLK_DUMMY>;
738 clock-names = "bus", "mclk1", "mclk2", "mclk3";
739 dma-names = "rx", "tx";
740 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
741 status = "disabled";
742 };
743
744 sai2: sai@308b0000 {
745 #sound-dai-cells = <0>;
746 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
747 reg = <0x308b0000 0x10000>;
748 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
749 clocks = <&clks IMX7D_SAI2_IPG_CLK>,
750 <&clks IMX7D_SAI2_ROOT_CLK>,
751 <&clks IMX7D_CLK_DUMMY>,
752 <&clks IMX7D_CLK_DUMMY>;
753 clock-names = "bus", "mclk1", "mclk2", "mclk3";
754 dma-names = "rx", "tx";
755 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
756 status = "disabled";
757 };
758
759 sai3: sai@308c0000 {
760 #sound-dai-cells = <0>;
761 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
762 reg = <0x308c0000 0x10000>;
763 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
764 clocks = <&clks IMX7D_SAI3_IPG_CLK>,
765 <&clks IMX7D_SAI3_ROOT_CLK>,
766 <&clks IMX7D_CLK_DUMMY>,
767 <&clks IMX7D_CLK_DUMMY>;
768 clock-names = "bus", "mclk1", "mclk2", "mclk3";
769 dma-names = "rx", "tx";
770 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
771 status = "disabled";
772 };
773
726 flexcan1: can@30a00000 { 774 flexcan1: can@30a00000 {
727 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan"; 775 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
728 reg = <0x30a00000 0x10000>; 776 reg = <0x30a00000 0x10000>;
@@ -911,6 +959,17 @@
911 status = "disabled"; 959 status = "disabled";
912 }; 960 };
913 961
962 sdma: sdma@30bd0000 {
963 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
964 reg = <0x30bd0000 0x10000>;
965 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
966 clocks = <&clks IMX7D_SDMA_CORE_CLK>,
967 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
968 clock-names = "ipg", "ahb";
969 #dma-cells = <3>;
970 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
971 };
972
914 fec1: ethernet@30be0000 { 973 fec1: ethernet@30be0000 {
915 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec"; 974 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
916 reg = <0x30be0000 0x10000>; 975 reg = <0x30be0000 0x10000>;
diff --git a/arch/arm/boot/dts/keystone-k2e-evm.dts b/arch/arm/boot/dts/keystone-k2e-evm.dts
index 4c32ebc1425a..ae1ebe7ee021 100644
--- a/arch/arm/boot/dts/keystone-k2e-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2e-evm.dts
@@ -47,18 +47,26 @@
47 status = "okay"; 47 status = "okay";
48}; 48};
49 49
50&usb { 50&keystone_usb0 {
51 status = "okay"; 51 status = "okay";
52}; 52};
53 53
54&usb0 {
55 dr_mode = "host";
56};
57
54&usb1_phy { 58&usb1_phy {
55 status = "okay"; 59 status = "okay";
56}; 60};
57 61
58&usb1 { 62&keystone_usb1 {
59 status = "okay"; 63 status = "okay";
60}; 64};
61 65
66&usb1 {
67 dr_mode = "peripheral";
68};
69
62&i2c0 { 70&i2c0 {
63 dtt@50 { 71 dtt@50 {
64 compatible = "at,24c1024"; 72 compatible = "at,24c1024";
diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 9a51b8c88581..497c417db5b6 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -61,7 +61,7 @@
61 status = "disabled"; 61 status = "disabled";
62 }; 62 };
63 63
64 usb1: usb@25000000 { 64 keystone_usb1: usb@25000000 {
65 compatible = "ti,keystone-dwc3"; 65 compatible = "ti,keystone-dwc3";
66 #address-cells = <1>; 66 #address-cells = <1>;
67 #size-cells = <1>; 67 #size-cells = <1>;
@@ -74,7 +74,7 @@
74 dma-ranges; 74 dma-ranges;
75 status = "disabled"; 75 status = "disabled";
76 76
77 dwc3@25010000 { 77 usb1: dwc3@25010000 {
78 compatible = "synopsys,dwc3"; 78 compatible = "synopsys,dwc3";
79 reg = <0x25010000 0x70000>; 79 reg = <0x25010000 0x70000>;
80 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; 80 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index 3372615b885c..2919c5190653 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -83,6 +83,11 @@
83 pinctrl-single,function-mask = <0x001b0007>; 83 pinctrl-single,function-mask = <0x001b0007>;
84 }; 84 };
85 85
86 devctrl: device-state-control@02620000 {
87 compatible = "ti,keystone-devctrl", "syscon";
88 reg = <0x02620000 0x1000>;
89 };
90
86 uart0: serial@02530c00 { 91 uart0: serial@02530c00 {
87 compatible = "ns16550a"; 92 compatible = "ns16550a";
88 current-speed = <115200>; 93 current-speed = <115200>;
@@ -93,5 +98,32 @@
93 clock-frequency = <200000000>; 98 clock-frequency = <200000000>;
94 status = "disabled"; 99 status = "disabled";
95 }; 100 };
101
102 kirq0: keystone_irq@026202a0 {
103 compatible = "ti,keystone-irq";
104 interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
105 interrupt-controller;
106 #interrupt-cells = <1>;
107 ti,syscon-dev = <&devctrl 0x2a0>;
108 };
109
110 dspgpio0: keystone_dsp_gpio@02620240 {
111 compatible = "ti,keystone-dsp-gpio";
112 gpio-controller;
113 #gpio-cells = <2>;
114 gpio,syscon-dev = <&devctrl 0x240>;
115 };
116
117 msgmgr: msgmgr@02a00000 {
118 compatible = "ti,k2g-message-manager";
119 #mbox-cells = <2>;
120 reg-names = "queue_proxy_region",
121 "queue_state_debug_region";
122 reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
123 interrupt-names = "rx_005",
124 "rx_057";
125 interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
126 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
127 };
96 }; 128 };
97}; 129};
diff --git a/arch/arm/boot/dts/keystone-k2hk-evm.dts b/arch/arm/boot/dts/keystone-k2hk-evm.dts
index b38b3441818b..2156ff92d08f 100644
--- a/arch/arm/boot/dts/keystone-k2hk-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2hk-evm.dts
@@ -83,10 +83,14 @@
83 status = "okay"; 83 status = "okay";
84}; 84};
85 85
86&usb { 86&keystone_usb0 {
87 status = "okay"; 87 status = "okay";
88}; 88};
89 89
90&usb0 {
91 dr_mode = "host";
92};
93
90&aemif { 94&aemif {
91 cs0 { 95 cs0 {
92 #address-cells = <2>; 96 #address-cells = <2>;
diff --git a/arch/arm/boot/dts/keystone-k2l-evm.dts b/arch/arm/boot/dts/keystone-k2l-evm.dts
index 7f9c2e94d605..056b42f99d7a 100644
--- a/arch/arm/boot/dts/keystone-k2l-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2l-evm.dts
@@ -32,10 +32,14 @@
32 status = "okay"; 32 status = "okay";
33}; 33};
34 34
35&usb { 35&keystone_usb0 {
36 status = "okay"; 36 status = "okay";
37}; 37};
38 38
39&usb0 {
40 dr_mode = "host";
41};
42
39&i2c0 { 43&i2c0 {
40 dtt@50 { 44 dtt@50 {
41 compatible = "at,24c1024"; 45 compatible = "at,24c1024";
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index e23f46d15c80..02708ba2d4f4 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -188,7 +188,7 @@
188 status = "disabled"; 188 status = "disabled";
189 }; 189 };
190 190
191 usb: usb@2680000 { 191 keystone_usb0: usb@2680000 {
192 compatible = "ti,keystone-dwc3"; 192 compatible = "ti,keystone-dwc3";
193 #address-cells = <1>; 193 #address-cells = <1>;
194 #size-cells = <1>; 194 #size-cells = <1>;
@@ -201,7 +201,7 @@
201 dma-ranges; 201 dma-ranges;
202 status = "disabled"; 202 status = "disabled";
203 203
204 dwc3@2690000 { 204 usb0: dwc3@2690000 {
205 compatible = "synopsys,dwc3"; 205 compatible = "synopsys,dwc3";
206 reg = <0x2690000 0x70000>; 206 reg = <0x2690000 0x70000>;
207 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 207 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index 0db0e3edc88f..94e49f32d5f9 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -41,7 +41,7 @@
41 }; 41 };
42 42
43 pinctrl: pin-controller@10000 { 43 pinctrl: pin-controller@10000 {
44 pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>; 44 pinctrl-0 = <&pmx_dip_switches>;
45 pinctrl-names = "default"; 45 pinctrl-names = "default";
46 46
47 pmx_uart0: pmx-uart0 { 47 pmx_uart0: pmx-uart0 {
@@ -174,3 +174,10 @@
174 phy-handle = <&ethphy0>; 174 phy-handle = <&ethphy0>;
175 }; 175 };
176}; 176};
177
178&gpio0 {
179 status = "okay";
180
181 pinctrl-0 = <&pmx_gpio_header>;
182 pinctrl-names = "default";
183};
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 1c2c74655416..731ec37aed5b 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -13,6 +13,11 @@
13 }; 13 };
14 }; 14 };
15 15
16 memory@0 {
17 device_type = "memory";
18 reg = <0 0>;
19 };
20
16 leds { 21 leds {
17 compatible = "gpio-leds"; 22 compatible = "gpio-leds";
18 user0 { 23 user0 {
diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index fdb736c82045..7cae9c5e27db 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -20,6 +20,9 @@
20#define LPC_GPIO(port, pin) (port * 32 + pin) 20#define LPC_GPIO(port, pin) (port * 32 + pin)
21 21
22/ { 22/ {
23 #address-cells = <1>;
24 #size-cells = <1>;
25
23 cpus { 26 cpus {
24 #address-cells = <1>; 27 #address-cells = <1>;
25 #size-cells = <0>; 28 #size-cells = <0>;
@@ -186,6 +189,10 @@
186 clock-names = "stmmaceth"; 189 clock-names = "stmmaceth";
187 resets = <&rgu 22>; 190 resets = <&rgu 22>;
188 reset-names = "stmmaceth"; 191 reset-names = "stmmaceth";
192 rx-fifo-depth = <256>;
193 tx-fifo-depth = <256>;
194 snps,pbl = <4>; /* 32 (8x mode) */
195 snps,force_thresh_dma_mode;
189 status = "disabled"; 196 status = "disabled";
190 }; 197 };
191 198
diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
index 5cfadb06c8df..7c16d639a1b4 100644
--- a/arch/arm/boot/dts/lpc4337-ciaa.dts
+++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
@@ -30,7 +30,7 @@
30 stdout-path = &uart2; 30 stdout-path = &uart2;
31 }; 31 };
32 32
33 memory { 33 memory@28000000 {
34 device_type = "memory"; 34 device_type = "memory";
35 reg = <0x28000000 0x0800000>; /* 8 MB */ 35 reg = <0x28000000 0x0800000>; /* 8 MB */
36 }; 36 };
diff --git a/arch/arm/boot/dts/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/lpc4350-hitex-eval.dts
index 6c9048d4d03c..874c75d44013 100644
--- a/arch/arm/boot/dts/lpc4350-hitex-eval.dts
+++ b/arch/arm/boot/dts/lpc4350-hitex-eval.dts
@@ -33,7 +33,7 @@
33 stdout-path = &uart0; 33 stdout-path = &uart0;
34 }; 34 };
35 35
36 memory { 36 memory@28000000 {
37 device_type = "memory"; 37 device_type = "memory";
38 reg = <0x28000000 0x800000>; /* 8 MB */ 38 reg = <0x28000000 0x800000>; /* 8 MB */
39 }; 39 };
@@ -424,7 +424,7 @@
424 424
425 /* NXP SE97BTP with temperature sensor + eeprom */ 425 /* NXP SE97BTP with temperature sensor + eeprom */
426 sensor@18 { 426 sensor@18 {
427 compatible = "nxp,jc42"; 427 compatible = "nxp,se97", "jedec,jc-42.4-temp";
428 reg = <0x18>; 428 reg = <0x18>;
429 }; 429 };
430 430
diff --git a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
index 1919be4dab2b..9b5fad622522 100644
--- a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
+++ b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
@@ -33,7 +33,7 @@
33 stdout-path = &uart0; 33 stdout-path = &uart0;
34 }; 34 };
35 35
36 memory { 36 memory@28000000 {
37 device_type = "memory"; 37 device_type = "memory";
38 reg = <0x28000000 0x2000000>; /* 32 MB */ 38 reg = <0x28000000 0x2000000>; /* 32 MB */
39 }; 39 };
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index 75ecaed32ae5..a8b148ad1dd2 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -108,12 +108,23 @@
108 108
109 panel: panel { 109 panel: panel {
110 compatible = "nec,nl4827hc19-05b"; 110 compatible = "nec,nl4827hc19-05b";
111
112 port {
113 panel_in: endpoint {
114 remote-endpoint = <&dcu_out>;
115 };
116 };
111 }; 117 };
112}; 118};
113 119
114&dcu { 120&dcu {
115 fsl,panel = <&panel>;
116 status = "okay"; 121 status = "okay";
122
123 port {
124 dcu_out: endpoint {
125 remote-endpoint = <&panel_in>;
126 };
127 };
117}; 128};
118 129
119&dspi1 { 130&dspi1 {
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index fc4080de4b7b..41fd53671859 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -162,6 +162,27 @@
162 reg = <0xc1108000 0x4>, <0xc1104000 0x460>; 162 reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
163 }; 163 };
164 164
165 pwm_ab: pwm@8550 {
166 compatible = "amlogic,meson8b-pwm";
167 reg = <0xc1108550 0x10>;
168 #pwm-cells = <3>;
169 status = "disabled";
170 };
171
172 pwm_cd: pwm@8650 {
173 compatible = "amlogic,meson8b-pwm";
174 reg = <0xc1108650 0x10>;
175 #pwm-cells = <3>;
176 status = "disabled";
177 };
178
179 pwm_ef: pwm@86c0 {
180 compatible = "amlogic,meson8b-pwm";
181 reg = <0xc11086c0 0x10>;
182 #pwm-cells = <3>;
183 status = "disabled";
184 };
185
165 pinctrl_cbus: pinctrl@c1109880 { 186 pinctrl_cbus: pinctrl@c1109880 {
166 compatible = "amlogic,meson8b-cbus-pinctrl"; 187 compatible = "amlogic,meson8b-cbus-pinctrl";
167 reg = <0xc1109880 0x10>; 188 reg = <0xc1109880 0x10>;
diff --git a/arch/arm/boot/dts/mps2.dtsi b/arch/arm/boot/dts/mps2.dtsi
index e3fed8d34558..efb8a03cb970 100644
--- a/arch/arm/boot/dts/mps2.dtsi
+++ b/arch/arm/boot/dts/mps2.dtsi
@@ -42,6 +42,7 @@
42 * OTHER DEALINGS IN THE SOFTWARE. 42 * OTHER DEALINGS IN THE SOFTWARE.
43 */ 43 */
44 44
45#include "skeleton.dtsi"
45#include "armv7-m.dtsi" 46#include "armv7-m.dtsi"
46 47
47/ { 48/ {
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 578fa2a54dce..4f793a025a72 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -12,11 +12,11 @@
12#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/pinctrl/omap.h> 13#include <dt-bindings/pinctrl/omap.h>
14 14
15#include "skeleton.dtsi"
16
17/ { 15/ {
18 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; 16 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
19 interrupt-parent = <&intc>; 17 interrupt-parent = <&intc>;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 20
21 aliases { 21 aliases {
22 serial0 = &uart1; 22 serial0 = &uart1;
diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts
index 34cdecb4fdda..9265c0b9c3f3 100644
--- a/arch/arm/boot/dts/omap2420-h4.dts
+++ b/arch/arm/boot/dts/omap2420-h4.dts
@@ -13,7 +13,7 @@
13 model = "TI OMAP2420 H4 board"; 13 model = "TI OMAP2420 H4 board";
14 compatible = "ti,omap2420-h4", "ti,omap2420", "ti,omap2"; 14 compatible = "ti,omap2420-h4", "ti,omap2420", "ti,omap2";
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x4000000>; /* 64 MB */ 18 reg = <0x80000000 0x4000000>; /* 64 MB */
19 }; 19 };
diff --git a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
index db95aadcca70..7e5ffc583c90 100644
--- a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
+++ b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
@@ -1,7 +1,7 @@
1#include "omap2420.dtsi" 1#include "omap2420.dtsi"
2 2
3/ { 3/ {
4 memory { 4 memory@80000000 {
5 device_type = "memory"; 5 device_type = "memory";
6 reg = <0x80000000 0x8000000>; /* 128 MB */ 6 reg = <0x80000000 0x8000000>; /* 128 MB */
7 }; 7 };
diff --git a/arch/arm/boot/dts/omap2430-sdp.dts b/arch/arm/boot/dts/omap2430-sdp.dts
index 6b36ede58488..4f7d9d7c00c7 100644
--- a/arch/arm/boot/dts/omap2430-sdp.dts
+++ b/arch/arm/boot/dts/omap2430-sdp.dts
@@ -13,7 +13,7 @@
13 model = "TI OMAP2430 SDP"; 13 model = "TI OMAP2430 SDP";
14 compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2"; 14 compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2";
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x8000000>; /* 128 MB */ 18 reg = <0x80000000 0x8000000>; /* 128 MB */
19 }; 19 };
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 8ffde06281ad..85e297ed0ea1 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -19,7 +19,7 @@
19 }; 19 };
20 }; 20 };
21 21
22 memory { 22 memory@80000000 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB */ 24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 }; 25 };
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index a19d907d4850..4be85ce59dd1 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -19,7 +19,7 @@
19 }; 19 };
20 }; 20 };
21 21
22 memory { 22 memory@80000000 {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */ 24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 }; 25 };
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
index 6a0df13fa0f3..57b9a028a49a 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -4,7 +4,7 @@
4 4
5/ { 5/ {
6 6
7 memory { 7 memory@80000000 {
8 device_type = "memory"; 8 device_type = "memory";
9 reg = <0x80000000 0x10000000>; /* 256 MB */ 9 reg = <0x80000000 0x10000000>; /* 256 MB */
10 }; 10 };
diff --git a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
index 586010179752..f330c69cc683 100644
--- a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
+++ b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
@@ -10,7 +10,7 @@
10 10
11#include "omap34xx.dtsi" 11#include "omap34xx.dtsi"
12/ { 12/ {
13 memory { 13 memory@80000000 {
14 device_type = "memory"; 14 device_type = "memory";
15 reg = <0x80000000 0x10000000>; /* 256 MB */ 15 reg = <0x80000000 0x10000000>; /* 256 MB */
16 }; 16 };
diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
index ed449827c3d3..4f9a76544602 100644
--- a/arch/arm/boot/dts/omap3-evm-37xx.dts
+++ b/arch/arm/boot/dts/omap3-evm-37xx.dts
@@ -15,7 +15,7 @@
15 model = "TI OMAP37XX EVM (TMDSEVM3730)"; 15 model = "TI OMAP37XX EVM (TMDSEVM3730)";
16 compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3"; 16 compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
17 17
18 memory { 18 memory@80000000 {
19 device_type = "memory"; 19 device_type = "memory";
20 reg = <0x80000000 0x10000000>; /* 256 MB */ 20 reg = <0x80000000 0x10000000>; /* 256 MB */
21 }; 21 };
diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts
index e10dcd0fa539..99b2bfcd1059 100644
--- a/arch/arm/boot/dts/omap3-evm.dts
+++ b/arch/arm/boot/dts/omap3-evm.dts
@@ -14,7 +14,7 @@
14 model = "TI OMAP35XX EVM (TMDSEVM3530)"; 14 model = "TI OMAP35XX EVM (TMDSEVM3530)";
15 compatible = "ti,omap3-evm", "ti,omap3"; 15 compatible = "ti,omap3-evm", "ti,omap3";
16 16
17 memory { 17 memory@80000000 {
18 device_type = "memory"; 18 device_type = "memory";
19 reg = <0x80000000 0x10000000>; /* 256 MB */ 19 reg = <0x80000000 0x10000000>; /* 256 MB */
20 }; 20 };
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index c09a0574af90..b3a8b1f24499 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -21,7 +21,7 @@
21 }; 21 };
22 }; 22 };
23 23
24 memory { 24 memory@80000000 {
25 device_type = "memory"; 25 device_type = "memory";
26 reg = <0x80000000 0x20000000>; /* 512 MB */ 26 reg = <0x80000000 0x20000000>; /* 512 MB */
27 }; 27 };
@@ -102,7 +102,7 @@
102 102
103 backlight { 103 backlight {
104 compatible = "pwm-backlight"; 104 compatible = "pwm-backlight";
105 pwms = <&pwm11 0 2000000 0>; 105 pwms = <&pwm11 0 12000000 0>;
106 pwm-names = "backlight"; 106 pwm-names = "backlight";
107 brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>; 107 brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>;
108 default-brightness-level = <9>; /* => 90 */ 108 default-brightness-level = <9>; /* => 90 */
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index f4f2ce46d681..54c4c07bbe4a 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -13,7 +13,7 @@
13#include "omap36xx.dtsi" 13#include "omap36xx.dtsi"
14 14
15/ { 15/ {
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x20000000>; /* 512 MB */ 18 reg = <0x80000000 0x20000000>; /* 512 MB */
19 }; 19 };
diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index 2f353dadfa40..e28fe13cb007 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -15,7 +15,7 @@
15 model = "TI OMAP3430 LDP (Zoom1 Labrador)"; 15 model = "TI OMAP3430 LDP (Zoom1 Labrador)";
16 compatible = "ti,omap3-ldp", "ti,omap3"; 16 compatible = "ti,omap3-ldp", "ti,omap3";
17 17
18 memory { 18 memory@80000000 {
19 device_type = "memory"; 19 device_type = "memory";
20 reg = <0x80000000 0x8000000>; /* 128 MB */ 20 reg = <0x80000000 0x8000000>; /* 128 MB */
21 }; 21 };
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index eff816e0bc0a..fa611a5e4850 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -17,7 +17,7 @@
17 bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0"; 17 bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
18 }; 18 };
19 19
20 memory { 20 memory@80000000 {
21 device_type = "memory"; 21 device_type = "memory";
22 reg = <0x80000000 0x8000000>; /* 128 MB */ 22 reg = <0x80000000 0x8000000>; /* 128 MB */
23 }; 23 };
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 2a6078a8422c..87ca50b53002 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -54,7 +54,7 @@
54 }; 54 };
55 }; 55 };
56 56
57 memory { 57 memory@80000000 {
58 device_type = "memory"; 58 device_type = "memory";
59 reg = <0x80000000 0x10000000>; /* 256 MB */ 59 reg = <0x80000000 0x10000000>; /* 256 MB */
60 }; 60 };
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index 927b17fc4ed8..5d8c4b4a4205 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -24,12 +24,12 @@
24 }; 24 };
25 }; 25 };
26 26
27 memory { 27 memory@80000000 {
28 device_type = "memory"; 28 device_type = "memory";
29 reg = <0x80000000 0x40000000>; /* 1 GB */ 29 reg = <0x80000000 0x40000000>; /* 1 GB */
30 }; 30 };
31 31
32 vemmc: fixedregulator@0 { 32 vemmc: fixedregulator0 {
33 compatible = "regulator-fixed"; 33 compatible = "regulator-fixed";
34 regulator-name = "VEMMC"; 34 regulator-name = "VEMMC";
35 regulator-min-microvolt = <2900000>; 35 regulator-min-microvolt = <2900000>;
@@ -39,7 +39,7 @@
39 enable-active-high; 39 enable-active-high;
40 }; 40 };
41 41
42 vwlan_fixed: fixedregulator@2 { 42 vwlan_fixed: fixedregulator2 {
43 compatible = "regulator-fixed"; 43 compatible = "regulator-fixed";
44 regulator-name = "VWLAN"; 44 regulator-name = "VWLAN";
45 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */ 45 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */
diff --git a/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi b/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi
index 3b3a75997f81..99a7eee6e61f 100644
--- a/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-alto35-common.dtsi
@@ -44,7 +44,7 @@
44 #size-cells = <0>; 44 #size-cells = <0>;
45 pinctrl-names = "default"; 45 pinctrl-names = "default";
46 pinctrl-0 = <&button_pins>; 46 pinctrl-0 = <&button_pins>;
47 button0@10 { 47 button0 {
48 label = "button0"; 48 label = "button0";
49 linux,code = <BTN_0>; 49 linux,code = <BTN_0>;
50 gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio_10 */ 50 gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio_10 */
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
index 3e946cac55f3..401fae838fe9 100644
--- a/arch/arm/boot/dts/omap3-overo-base.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
@@ -11,6 +11,12 @@
11 */ 11 */
12 12
13/ { 13/ {
14
15 memory@0 {
16 device_type = "memory";
17 reg = <0 0>;
18 };
19
14 pwmleds { 20 pwmleds {
15 compatible = "pwm-leds"; 21 compatible = "pwm-leds";
16 22
diff --git a/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi b/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi
index 4f4c6efbd518..56dbd113430e 100644
--- a/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-chestnut43-common.dtsi
@@ -37,13 +37,13 @@
37 pinctrl-0 = <&button_pins>; 37 pinctrl-0 = <&button_pins>;
38 #address-cells = <1>; 38 #address-cells = <1>;
39 #size-cells = <0>; 39 #size-cells = <0>;
40 button0@23 { 40 button0 {
41 label = "button0"; 41 label = "button0";
42 linux,code = <BTN_0>; 42 linux,code = <BTN_0>;
43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */ 43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */
44 wakeup-source; 44 wakeup-source;
45 }; 45 };
46 button1@14 { 46 button1 {
47 label = "button1"; 47 label = "button1";
48 linux,code = <BTN_1>; 48 linux,code = <BTN_1>;
49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */ 49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */
diff --git a/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
index ca86da68220c..854117dc0b77 100644
--- a/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
@@ -119,7 +119,7 @@
119 pinctrl-names = "default"; 119 pinctrl-names = "default";
120 pinctrl-0 = <&mcspi1_pins>; 120 pinctrl-0 = <&mcspi1_pins>;
121 121
122 lcd0: display { 122 lcd0: display@1 {
123 compatible = "lgphilips,lb035q02"; 123 compatible = "lgphilips,lb035q02";
124 label = "lcd35"; 124 label = "lcd35";
125 125
diff --git a/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi b/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi
index 250cc7fe5d5e..286f5baddf07 100644
--- a/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-gallop43-common.dtsi
@@ -37,13 +37,13 @@
37 pinctrl-0 = <&button_pins>; 37 pinctrl-0 = <&button_pins>;
38 #address-cells = <1>; 38 #address-cells = <1>;
39 #size-cells = <0>; 39 #size-cells = <0>;
40 button0@23 { 40 button0 {
41 label = "button0"; 41 label = "button0";
42 linux,code = <BTN_0>; 42 linux,code = <BTN_0>;
43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */ 43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */
44 wakeup-source; 44 wakeup-source;
45 }; 45 };
46 button1@14 { 46 button1 {
47 label = "button1"; 47 label = "button1";
48 linux,code = <BTN_1>; 48 linux,code = <BTN_1>;
49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */ 49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */
diff --git a/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi b/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi
index 8df7ec35d17d..a8020fb42464 100644
--- a/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-palo35-common.dtsi
@@ -37,13 +37,13 @@
37 pinctrl-0 = <&button_pins>; 37 pinctrl-0 = <&button_pins>;
38 #address-cells = <1>; 38 #address-cells = <1>;
39 #size-cells = <0>; 39 #size-cells = <0>;
40 button0@23 { 40 button0 {
41 label = "button0"; 41 label = "button0";
42 linux,code = <BTN_0>; 42 linux,code = <BTN_0>;
43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */ 43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */
44 wakeup-source; 44 wakeup-source;
45 }; 45 };
46 button1@14 { 46 button1 {
47 label = "button1"; 47 label = "button1";
48 linux,code = <BTN_1>; 48 linux,code = <BTN_1>;
49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */ 49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */
diff --git a/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi b/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi
index 0ea2c451c809..11965737e2c9 100644
--- a/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-palo43-common.dtsi
@@ -37,13 +37,13 @@
37 pinctrl-0 = <&button_pins>; 37 pinctrl-0 = <&button_pins>;
38 #address-cells = <1>; 38 #address-cells = <1>;
39 #size-cells = <0>; 39 #size-cells = <0>;
40 button0@23 { 40 button0 {
41 label = "button0"; 41 label = "button0";
42 linux,code = <BTN_0>; 42 linux,code = <BTN_0>;
43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */ 43 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; /* gpio_23 */
44 wakeup-source; 44 wakeup-source;
45 }; 45 };
46 button1@14 { 46 button1 {
47 label = "button1"; 47 label = "button1";
48 linux,code = <BTN_1>; 48 linux,code = <BTN_1>;
49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */ 49 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* gpio_14 */
diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi
index dbc4dc721cc2..53e007abdc71 100644
--- a/arch/arm/boot/dts/omap3-pandora-common.dtsi
+++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi
@@ -18,7 +18,7 @@
18 }; 18 };
19 }; 19 };
20 20
21 memory { 21 memory@80000000 {
22 device_type = "memory"; 22 device_type = "memory";
23 reg = <0x80000000 0x20000000>; /* 512 MB */ 23 reg = <0x80000000 0x20000000>; /* 512 MB */
24 }; 24 };
@@ -45,28 +45,28 @@
45 pinctrl-names = "default"; 45 pinctrl-names = "default";
46 pinctrl-0 = <&led_pins>; 46 pinctrl-0 = <&led_pins>;
47 47
48 led@1 { 48 led1 {
49 label = "pandora::sd1"; 49 label = "pandora::sd1";
50 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* GPIO_128 */ 50 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* GPIO_128 */
51 linux,default-trigger = "mmc0"; 51 linux,default-trigger = "mmc0";
52 default-state = "off"; 52 default-state = "off";
53 }; 53 };
54 54
55 led@2 { 55 led2 {
56 label = "pandora::sd2"; 56 label = "pandora::sd2";
57 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* GPIO_129 */ 57 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* GPIO_129 */
58 linux,default-trigger = "mmc1"; 58 linux,default-trigger = "mmc1";
59 default-state = "off"; 59 default-state = "off";
60 }; 60 };
61 61
62 led@3 { 62 led3 {
63 label = "pandora::bluetooth"; 63 label = "pandora::bluetooth";
64 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; /* GPIO_158 */ 64 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; /* GPIO_158 */
65 linux,default-trigger = "heartbeat"; 65 linux,default-trigger = "heartbeat";
66 default-state = "off"; 66 default-state = "off";
67 }; 67 };
68 68
69 led@4 { 69 led4 {
70 label = "pandora::wifi"; 70 label = "pandora::wifi";
71 gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>; /* GPIO_159 */ 71 gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>; /* GPIO_159 */
72 linux,default-trigger = "mmc2"; 72 linux,default-trigger = "mmc2";
diff --git a/arch/arm/boot/dts/omap3-sniper.dts b/arch/arm/boot/dts/omap3-sniper.dts
index 78a1184cb312..bc4498e77bc9 100644
--- a/arch/arm/boot/dts/omap3-sniper.dts
+++ b/arch/arm/boot/dts/omap3-sniper.dts
@@ -20,7 +20,7 @@
20 }; 20 };
21 }; 21 };
22 22
23 memory { 23 memory@80000000 {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x80000000 0x20000000>; /* 512 MB */ 25 reg = <0x80000000 0x20000000>; /* 512 MB */
26 }; 26 };
diff --git a/arch/arm/boot/dts/omap3-tao3530.dtsi b/arch/arm/boot/dts/omap3-tao3530.dtsi
index 644d3c8ea66a..dc80886b5329 100644
--- a/arch/arm/boot/dts/omap3-tao3530.dtsi
+++ b/arch/arm/boot/dts/omap3-tao3530.dtsi
@@ -26,7 +26,7 @@
26 }; 26 };
27 }; 27 };
28 28
29 memory { 29 memory@80000000 {
30 device_type = "memory"; 30 device_type = "memory";
31 reg = <0x80000000 0x10000000>; /* 256 MB */ 31 reg = <0x80000000 0x10000000>; /* 256 MB */
32 }; 32 };
diff --git a/arch/arm/boot/dts/omap3-zoom3.dts b/arch/arm/boot/dts/omap3-zoom3.dts
index c29b41dc7b95..45e2ce0803de 100644
--- a/arch/arm/boot/dts/omap3-zoom3.dts
+++ b/arch/arm/boot/dts/omap3-zoom3.dts
@@ -20,7 +20,7 @@
20 }; 20 };
21 }; 21 };
22 22
23 memory { 23 memory@80000000 {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x80000000 0x20000000>; /* 512 MB */ 25 reg = <0x80000000 0x20000000>; /* 512 MB */
26 }; 26 };
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 4c3c471d2a83..353d818ce5a6 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -12,11 +12,11 @@
12#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/pinctrl/omap.h> 13#include <dt-bindings/pinctrl/omap.h>
14 14
15#include "skeleton.dtsi"
16
17/ { 15/ {
18 compatible = "ti,omap3430", "ti,omap3"; 16 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>; 17 interrupt-parent = <&intc>;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 20
21 aliases { 21 aliases {
22 i2c0 = &i2c1; 22 i2c0 = &i2c1;
@@ -78,7 +78,7 @@
78 * the moment, just use a fake OCP bus entry to represent the whole bus 78 * the moment, just use a fake OCP bus entry to represent the whole bus
79 * hierarchy. 79 * hierarchy.
80 */ 80 */
81 ocp { 81 ocp@68000000 {
82 compatible = "ti,omap3-l3-smx", "simple-bus"; 82 compatible = "ti,omap3-l3-smx", "simple-bus";
83 reg = <0x68000000 0x10000>; 83 reg = <0x68000000 0x10000>;
84 interrupts = <9 10>; 84 interrupts = <9 10>;
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index a0dc8d854142..abd6921143be 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -13,7 +13,7 @@
13 model = "TI OMAP3430 SDP"; 13 model = "TI OMAP3430 SDP";
14 compatible = "ti,omap3430-sdp", "ti,omap3"; 14 compatible = "ti,omap3430-sdp", "ti,omap3";
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */ 18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 }; 19 };
diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index e44656258225..e41c52d3b113 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -28,7 +28,7 @@
28 }; 28 };
29 }; 29 };
30 30
31 ocp { 31 ocp@68000000 {
32 omap3_pmx_core2: pinmux@480025d8 { 32 omap3_pmx_core2: pinmux@480025d8 {
33 compatible = "ti,omap3-padconf", "pinctrl-single"; 33 compatible = "ti,omap3-padconf", "pinctrl-single";
34 reg = <0x480025d8 0x24>; 34 reg = <0x480025d8 0x24>;
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index 8b7979153008..718fa88407cd 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -30,7 +30,7 @@
30 }; 30 };
31 }; 31 };
32 32
33 ocp { 33 ocp@68000000 {
34 uart4: serial@49042000 { 34 uart4: serial@49042000 {
35 compatible = "ti,omap3-uart"; 35 compatible = "ti,omap3-uart";
36 reg = <0x49042000 0x400>; 36 reg = <0x49042000 0x400>;
diff --git a/arch/arm/boot/dts/omap4-duovero-parlor.dts b/arch/arm/boot/dts/omap4-duovero-parlor.dts
index 6b39808b8313..1b825128a7b9 100644
--- a/arch/arm/boot/dts/omap4-duovero-parlor.dts
+++ b/arch/arm/boot/dts/omap4-duovero-parlor.dts
@@ -32,7 +32,7 @@
32 compatible = "gpio-keys"; 32 compatible = "gpio-keys";
33 #address-cells = <1>; 33 #address-cells = <1>;
34 #size-cells = <0>; 34 #size-cells = <0>;
35 button0@121 { 35 button0 {
36 label = "button0"; 36 label = "button0";
37 linux,code = <BTN_0>; 37 linux,code = <BTN_0>;
38 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; /* gpio_121 */ 38 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; /* gpio_121 */
diff --git a/arch/arm/boot/dts/omap4-duovero.dtsi b/arch/arm/boot/dts/omap4-duovero.dtsi
index a90b582e4c3f..ec0bd9779e1a 100644
--- a/arch/arm/boot/dts/omap4-duovero.dtsi
+++ b/arch/arm/boot/dts/omap4-duovero.dtsi
@@ -12,7 +12,7 @@
12 model = "Gumstix Duovero"; 12 model = "Gumstix Duovero";
13 compatible = "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; 13 compatible = "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
14 14
15 memory { 15 memory@80000000 {
16 device_type = "memory"; 16 device_type = "memory";
17 reg = <0x80000000 0x40000000>; /* 1 GB */ 17 reg = <0x80000000 0x40000000>; /* 1 GB */
18 }; 18 };
diff --git a/arch/arm/boot/dts/omap4-kc1.dts b/arch/arm/boot/dts/omap4-kc1.dts
index 2251bd54e4e6..e3763ac75719 100644
--- a/arch/arm/boot/dts/omap4-kc1.dts
+++ b/arch/arm/boot/dts/omap4-kc1.dts
@@ -13,7 +13,7 @@
13 model = "Amazon Kindle Fire (first generation)"; 13 model = "Amazon Kindle Fire (first generation)";
14 compatible = "amazon,omap4-kc1", "ti,omap4430", "ti,omap4"; 14 compatible = "amazon,omap4-kc1", "ti,omap4430", "ti,omap4";
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x20000000>; /* 512 MB */ 18 reg = <0x80000000 0x20000000>; /* 512 MB */
19 }; 19 };
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index f8f13952cfeb..1673689e6705 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -8,7 +8,7 @@
8#include "elpida_ecb240abacn.dtsi" 8#include "elpida_ecb240abacn.dtsi"
9 9
10/ { 10/ {
11 memory { 11 memory@80000000 {
12 device_type = "memory"; 12 device_type = "memory";
13 reg = <0x80000000 0x40000000>; /* 1 GB */ 13 reg = <0x80000000 0x40000000>; /* 1 GB */
14 }; 14 };
@@ -446,6 +446,8 @@
446 pinctrl-names = "default"; 446 pinctrl-names = "default";
447 pinctrl-0 = <&wl12xx_pins>; 447 pinctrl-0 = <&wl12xx_pins>;
448 vmmc-supply = <&wl12xx_vmmc>; 448 vmmc-supply = <&wl12xx_vmmc>;
449 interrupts-extended = <&wakeupgen GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH
450 &omap4_pmx_core 0x10e>;
449 non-removable; 451 non-removable;
450 bus-width = <4>; 452 bus-width = <4>;
451 cap-power-off-card; 453 cap-power-off-card;
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 10d73a784050..d728ec963111 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -14,7 +14,7 @@
14 model = "TI OMAP4 SDP board"; 14 model = "TI OMAP4 SDP board";
15 compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4"; 15 compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";
16 16
17 memory { 17 memory@80000000 {
18 device_type = "memory"; 18 device_type = "memory";
19 reg = <0x80000000 0x40000000>; /* 1 GB */ 19 reg = <0x80000000 0x40000000>; /* 1 GB */
20 }; 20 };
diff --git a/arch/arm/boot/dts/omap4-var-som-om44.dtsi b/arch/arm/boot/dts/omap4-var-som-om44.dtsi
index 873cfc87260c..758b6eb7ae43 100644
--- a/arch/arm/boot/dts/omap4-var-som-om44.dtsi
+++ b/arch/arm/boot/dts/omap4-var-som-om44.dtsi
@@ -12,7 +12,7 @@
12 model = "Variscite VAR-SOM-OM44"; 12 model = "Variscite VAR-SOM-OM44";
13 compatible = "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; 13 compatible = "variscite,var-som-om44", "ti,omap4460", "ti,omap4";
14 14
15 memory { 15 memory@80000000 {
16 device_type = "memory"; 16 device_type = "memory";
17 reg = <0x80000000 0x40000000>; /* 1 GB */ 17 reg = <0x80000000 0x40000000>; /* 1 GB */
18 }; 18 };
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 3fdc51cd0fad..0ced079b7ae3 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -10,11 +10,11 @@
10#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/pinctrl/omap.h> 11#include <dt-bindings/pinctrl/omap.h>
12 12
13#include "skeleton.dtsi"
14
15/ { 13/ {
16 compatible = "ti,omap4430", "ti,omap4"; 14 compatible = "ti,omap4430", "ti,omap4";
17 interrupt-parent = <&wakeupgen>; 15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
18 18
19 aliases { 19 aliases {
20 i2c0 = &i2c1; 20 i2c0 = &i2c1;
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index 5196113202a2..6365635fea5c 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -77,16 +77,6 @@
77 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */ 77 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
78 }; 78 };
79 79
80 leds {
81 compatible = "gpio-leds";
82 led@1 {
83 label = "omap5:blue:usr1";
84 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
85 linux,default-trigger = "heartbeat";
86 default-state = "off";
87 };
88 };
89
90 tpd12s015: encoder { 80 tpd12s015: encoder {
91 compatible = "ti,tpd12s015"; 81 compatible = "ti,tpd12s015";
92 82
@@ -332,7 +322,7 @@
332 322
333 wlcore_irq_pin: pinmux_wlcore_irq_pin { 323 wlcore_irq_pin: pinmux_wlcore_irq_pin {
334 pinctrl-single,pins = < 324 pinctrl-single,pins = <
335 OMAP5_IOPAD(0x40, PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */ 325 OMAP5_IOPAD(0x40, PIN_INPUT | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
336 >; 326 >;
337 }; 327 };
338}; 328};
@@ -355,15 +345,17 @@
355 non-removable; 345 non-removable;
356 cap-power-off-card; 346 cap-power-off-card;
357 pinctrl-names = "default"; 347 pinctrl-names = "default";
358 pinctrl-0 = <&mmc3_pins &wlcore_irq_pin>; 348 pinctrl-0 = <&mmc3_pins>;
359 interrupts-extended = <&gic GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 349 interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
360 &omap5_pmx_core 0x168>; 350 &omap5_pmx_core 0x16a>;
361 351
362 #address-cells = <1>; 352 #address-cells = <1>;
363 #size-cells = <0>; 353 #size-cells = <0>;
364 wlcore: wlcore@2 { 354 wlcore: wlcore@2 {
365 compatible = "ti,wl1271"; 355 compatible = "ti,wl1271";
366 reg = <2>; 356 reg = <2>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&wlcore_irq_pin>;
367 interrupt-parent = <&gpio1>; 359 interrupt-parent = <&gpio1>;
368 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */ 360 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */
369 ref-clock-frequency = <26000000>; 361 ref-clock-frequency = <26000000>;
@@ -391,14 +383,23 @@
391 interrupt-controller; 383 interrupt-controller;
392 #interrupt-cells = <2>; 384 #interrupt-cells = <2>;
393 ti,system-power-controller; 385 ti,system-power-controller;
386 ti,mux-pad1 = <0xa1>;
387 ti,mux-pad2 = <0x1b>;
394 pinctrl-names = "default"; 388 pinctrl-names = "default";
395 pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>; 389 pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
396 390
391 palmas_gpio: gpio {
392 compatible = "ti,palmas-gpio";
393 gpio-controller;
394 #gpio-cells = <2>;
395 };
396
397 extcon_usb3: palmas_usb { 397 extcon_usb3: palmas_usb {
398 compatible = "ti,palmas-usb-vid"; 398 compatible = "ti,palmas-usb-vid";
399 ti,enable-vbus-detection; 399 ti,enable-vbus-detection;
400 ti,enable-id-detection; 400 ti,enable-id-detection;
401 ti,wakeup; 401 ti,wakeup;
402 id-gpios = <&palmas_gpio 0 GPIO_ACTIVE_HIGH>;
402 }; 403 };
403 404
404 clk32kgaudio: palmas_clk32k@1 { 405 clk32kgaudio: palmas_clk32k@1 {
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts
index a9765605d53b..b153f604932a 100644
--- a/arch/arm/boot/dts/omap5-cm-t54.dts
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -11,9 +11,9 @@
11 model = "CompuLab CM-T54"; 11 model = "CompuLab CM-T54";
12 compatible = "compulab,omap5-cm-t54", "ti,omap5"; 12 compatible = "compulab,omap5-cm-t54", "ti,omap5";
13 13
14 memory { 14 memory@80000000 {
15 device_type = "memory"; 15 device_type = "memory";
16 reg = <0x80000000 0x7F000000>; /* 2048 MB */ 16 reg = <0 0x80000000 0 0x7f000000>; /* 2048 MB */
17 }; 17 };
18 18
19 aliases { 19 aliases {
@@ -72,7 +72,7 @@
72 72
73 leds { 73 leds {
74 compatible = "gpio-leds"; 74 compatible = "gpio-leds";
75 led@1 { 75 led1 {
76 label = "Heartbeat"; 76 label = "Heartbeat";
77 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 ACT_LED */ 77 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 ACT_LED */
78 linux,default-trigger = "heartbeat"; 78 linux,default-trigger = "heartbeat";
diff --git a/arch/arm/boot/dts/omap5-igep0050.dts b/arch/arm/boot/dts/omap5-igep0050.dts
index f75ce02fb398..8fc19218057e 100644
--- a/arch/arm/boot/dts/omap5-igep0050.dts
+++ b/arch/arm/boot/dts/omap5-igep0050.dts
@@ -7,15 +7,47 @@
7 */ 7 */
8/dts-v1/; 8/dts-v1/;
9 9
10#include <dt-bindings/input/input.h>
10#include "omap5-board-common.dtsi" 11#include "omap5-board-common.dtsi"
11 12
12/ { 13/ {
13 model = "IGEPv5"; 14 model = "IGEPv5";
14 compatible = "isee,omap5-igep0050", "ti,omap5"; 15 compatible = "isee,omap5-igep0050", "ti,omap5";
15 16
16 memory { 17 memory@80000000 {
17 device_type = "memory"; 18 device_type = "memory";
18 reg = <0x80000000 0x7f000000>; /* 2032 MB */ 19 reg = <0x0 0x80000000 0 0x7f000000>; /* 2032 MB */
20 };
21
22 gpio_keys {
23 compatible = "gpio-keys";
24 pinctrl-0 = <&power_button_pin>;
25 pinctrl-names = "default";
26
27 power-button {
28 label = "Power Button";
29 linux,code = <KEY_POWER>;
30 gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
31 };
32 };
33
34 leds {
35 compatible = "gpio-leds";
36 led@1 {
37 label = "board:green:usr0";
38 gpios = <&tca6416 1 0>;
39 default-state = "off";
40 };
41 led@2 {
42 label = "board:red:usr1";
43 gpios = <&tca6416 2 0>;
44 default-state = "off";
45 };
46 led@3 {
47 label = "board:blue:usr1";
48 gpios = <&tca6416 3 0>;
49 default-state = "off";
50 };
19 }; 51 };
20}; 52};
21 53
@@ -58,6 +90,12 @@
58 OMAP5_IOPAD(0x0fa, PIN_INPUT | MUX_MODE0) /* i2c4_sda */ 90 OMAP5_IOPAD(0x0fa, PIN_INPUT | MUX_MODE0) /* i2c4_sda */
59 >; 91 >;
60 }; 92 };
93
94 power_button_pin: pinctrl_power_button_pin {
95 pinctrl-single,pins = <
96 OMAP5_IOPAD(0x086, PIN_INPUT | MUX_MODE6) /* gpio4_118 */
97 >;
98 };
61}; 99};
62 100
63&tpd12s015 { 101&tpd12s015 {
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index a51e60518eb6..53d31a87b44b 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -13,9 +13,19 @@
13 model = "TI OMAP5 uEVM board"; 13 model = "TI OMAP5 uEVM board";
14 compatible = "ti,omap5-uevm", "ti,omap5"; 14 compatible = "ti,omap5-uevm", "ti,omap5";
15 15
16 memory { 16 memory@80000000 {
17 device_type = "memory"; 17 device_type = "memory";
18 reg = <0x80000000 0x7F000000>; /* 2032 MB */ 18 reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */
19 };
20
21 leds {
22 compatible = "gpio-leds";
23 led1 {
24 label = "omap5:blue:usr1";
25 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
26 linux,default-trigger = "heartbeat";
27 default-state = "off";
28 };
19 }; 29 };
20}; 30};
21 31
@@ -61,3 +71,7 @@
61 OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ 71 OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
62 >; 72 >;
63}; 73};
74
75&wlcore {
76 compatible = "ti,wl1837";
77};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 84c10195e79b..25262118ec3d 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -11,11 +11,9 @@
11#include <dt-bindings/interrupt-controller/arm-gic.h> 11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/pinctrl/omap.h> 12#include <dt-bindings/pinctrl/omap.h>
13 13
14#include "skeleton.dtsi"
15
16/ { 14/ {
17 #address-cells = <1>; 15 #address-cells = <2>;
18 #size-cells = <1>; 16 #size-cells = <2>;
19 17
20 compatible = "ti,omap5"; 18 compatible = "ti,omap5";
21 interrupt-parent = <&wakeupgen>; 19 interrupt-parent = <&wakeupgen>;
@@ -92,10 +90,10 @@
92 compatible = "arm,cortex-a15-gic"; 90 compatible = "arm,cortex-a15-gic";
93 interrupt-controller; 91 interrupt-controller;
94 #interrupt-cells = <3>; 92 #interrupt-cells = <3>;
95 reg = <0x48211000 0x1000>, 93 reg = <0 0x48211000 0 0x1000>,
96 <0x48212000 0x1000>, 94 <0 0x48212000 0 0x1000>,
97 <0x48214000 0x2000>, 95 <0 0x48214000 0 0x2000>,
98 <0x48216000 0x2000>; 96 <0 0x48216000 0 0x2000>;
99 interrupt-parent = <&gic>; 97 interrupt-parent = <&gic>;
100 }; 98 };
101 99
@@ -103,7 +101,7 @@
103 compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu"; 101 compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
104 interrupt-controller; 102 interrupt-controller;
105 #interrupt-cells = <3>; 103 #interrupt-cells = <3>;
106 reg = <0x48281000 0x1000>; 104 reg = <0 0x48281000 0 0x1000>;
107 interrupt-parent = <&gic>; 105 interrupt-parent = <&gic>;
108 }; 106 };
109 107
@@ -131,11 +129,11 @@
131 compatible = "ti,omap5-l3-noc", "simple-bus"; 129 compatible = "ti,omap5-l3-noc", "simple-bus";
132 #address-cells = <1>; 130 #address-cells = <1>;
133 #size-cells = <1>; 131 #size-cells = <1>;
134 ranges; 132 ranges = <0 0 0 0xc0000000>;
135 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; 133 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
136 reg = <0x44000000 0x2000>, 134 reg = <0 0x44000000 0 0x2000>,
137 <0x44800000 0x3000>, 135 <0 0x44800000 0 0x3000>,
138 <0x45000000 0x4000>; 136 <0 0x45000000 0 0x4000>;
139 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 137 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
140 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 138 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
141 139
@@ -865,7 +863,7 @@
865 #size-cells = <1>; 863 #size-cells = <1>;
866 utmi-mode = <2>; 864 utmi-mode = <2>;
867 ranges; 865 ranges;
868 dwc3@4a030000 { 866 dwc3: dwc3@4a030000 {
869 compatible = "snps,dwc3"; 867 compatible = "snps,dwc3";
870 reg = <0x4a030000 0x10000>; 868 reg = <0x4a030000 0x10000>;
871 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 869 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/orion5x-mv88f5181.dtsi b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi
new file mode 100644
index 000000000000..f667012b26ca
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi
@@ -0,0 +1,49 @@
1/*
2 * Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#include "orion5x.dtsi"
10
11/ {
12 compatible = "marvell,orion5x-88f5181", "marvell,orion5x";
13
14 soc {
15 compatible = "marvell,orion5x-88f5181-mbus", "simple-bus";
16
17 internal-regs {
18 pinctrl: pinctrl@10000 {
19 compatible = "marvell,88f5181-pinctrl";
20 reg = <0x10000 0x8>, <0x10050 0x4>;
21 };
22
23 core_clk: core-clocks@10030 {
24 compatible = "marvell,mv88f5181-core-clock";
25 reg = <0x10010 0x4>;
26 #clock-cells = <1>;
27 };
28
29 mbusc: mbus-controller@20000 {
30 compatible = "marvell,mbus-controller";
31 reg = <0x20000 0x100>, <0x1500 0x20>;
32 };
33 };
34 };
35};
36
37&pinctrl {
38 pmx_ge: pmx-ge {
39 marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11",
40 "mpp12", "mpp13", "mpp14", "mpp15",
41 "mpp16", "mpp17", "mpp18", "mpp19";
42 marvell,function = "ge";
43 };
44};
45
46&eth {
47 pinctrl-0 = <&pmx_ge>;
48 pinctrl-names = "default";
49};
diff --git a/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
new file mode 100644
index 000000000000..9f6ae4e1de06
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
@@ -0,0 +1,251 @@
1/*
2 * Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include "orion5x-mv88f5181.dtsi"
14
15/ {
16 model = "Netgear WNR854-t";
17 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
18 "marvell,orion5x";
19 aliases {
20 serial0 = &uart0;
21 };
22
23 memory {
24 reg = <0x00000000 0x2000000>; /* 32 MB */
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30
31 soc {
32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
33 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
34 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
35 };
36
37 gpio-keys {
38 compatible = "gpio-keys";
39 pinctrl-0 = <&pmx_reset_button>;
40 pinctrl-names = "default";
41
42 reset {
43 label = "Reset Button";
44 linux,code = <KEY_RESTART>;
45 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
46 };
47 };
48
49 gpio-leds {
50 compatible = "gpio-leds";
51 pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
52 pinctrl-names = "default";
53
54 led@0 {
55 label = "wnr854t:green:power";
56 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
57 };
58
59 led@1 {
60 label = "wnr854t:blink:power";
61 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
62 };
63
64 led@2 {
65 label = "wnr854t:green:wan";
66 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
67 };
68 };
69};
70
71&devbus_bootcs {
72 status = "okay";
73
74 devbus,keep-config;
75
76 flash@0 {
77 compatible = "cfi-flash";
78 reg = <0 0x800000>;
79 bank-width = <2>;
80
81 partitions {
82 compatible = "fixed-partitions";
83 #address-cells = <1>;
84 #size-cells = <1>;
85
86 partition@0 {
87 label = "kernel";
88 reg = <0x0 0x100000>;
89 };
90
91 partition@100000 {
92 label = "rootfs";
93 reg = <0x100000 0x660000>;
94 };
95
96 partition@760000 {
97 label = "uboot_env";
98 reg = <0x760000 0x20000>;
99 };
100
101 partition@780000 {
102 label = "uboot";
103 reg = <0x780000 0x80000>;
104 read-only;
105 };
106 };
107 };
108};
109
110&mdio {
111 status = "okay";
112
113 switch: switch@0 {
114 compatible = "marvell,mv88e6085";
115 #address-cells = <1>;
116 #size-cells = <0>;
117 reg = <0>;
118 dsa,member = <0 0>;
119
120 ports {
121 #address-cells = <1>;
122 #size-cells = <0>;
123
124 port@0 {
125 reg = <0>;
126 label = "lan3";
127 phy-handle = <&lan3phy>;
128 };
129
130 port@1 {
131 reg = <1>;
132 label = "lan4";
133 phy-handle = <&lan4phy>;
134 };
135
136 port@2 {
137 reg = <2>;
138 label = "wan";
139 phy-handle = <&wanphy>;
140 };
141
142 port@3 {
143 reg = <3>;
144 label = "cpu";
145 ethernet = <&ethport>;
146 };
147
148 port@5 {
149 reg = <5>;
150 label = "lan1";
151 phy-handle = <&lan1phy>;
152 };
153
154 port@7 {
155 reg = <7>;
156 label = "lan2";
157 phy-handle = <&lan2phy>;
158 };
159 };
160
161 mdio {
162 #address-cells = <1>;
163 #size-cells = <0>;
164
165 lan3phy: ethernet-phy@0 {
166 /* Marvell 88E1121R (port 1) */
167 compatible = "ethernet-phy-id0141.0cb0",
168 "ethernet-phy-ieee802.3-c22";
169 reg = <0>;
170 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
171 };
172
173 lan4phy: ethernet-phy@1 {
174 /* Marvell 88E1121R (port 2) */
175 compatible = "ethernet-phy-id0141.0cb0",
176 "ethernet-phy-ieee802.3-c22";
177 reg = <1>;
178 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
179 };
180
181 wanphy: ethernet-phy@2 {
182 /* Marvell 88E1121R (port 1) */
183 compatible = "ethernet-phy-id0141.0cb0",
184 "ethernet-phy-ieee802.3-c22";
185 reg = <2>;
186 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
187 };
188
189 lan1phy: ethernet-phy@5 {
190 /* Marvell 88E1112 */
191 compatible = "ethernet-phy-id0141.0cb0",
192 "ethernet-phy-ieee802.3-c22";
193 reg = <5>;
194 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
195 };
196
197 lan2phy: ethernet-phy@7 {
198 /* Marvell 88E1112 */
199 compatible = "ethernet-phy-id0141.0cb0",
200 "ethernet-phy-ieee802.3-c22";
201 reg = <7>;
202 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
203 };
204 };
205 };
206};
207
208&eth {
209 status = "okay";
210
211 ethernet-port@0 {
212 /* Hardwired to DSA switch */
213 speed = <1000>;
214 duplex = <1>;
215 };
216};
217
218&pinctrl {
219 pinctrl-0 = <&pmx_pci_gpios>;
220 pinctrl-names = "default";
221
222 pmx_power_led: pmx-power-led {
223 marvell,pins = "mpp0";
224 marvell,function = "gpio";
225 };
226
227 pmx_reset_button: pmx-reset-button {
228 marvell,pins = "mpp1";
229 marvell,function = "gpio";
230 };
231
232 pmx_power_led_blink: pmx-power-led-blink {
233 marvell,pins = "mpp2";
234 marvell,function = "gpio";
235 };
236
237 pmx_wan_led: pmx-wan-led {
238 marvell,pins = "mpp3";
239 marvell,function = "gpio";
240 };
241
242 pmx_pci_gpios: pmx-pci-gpios {
243 marvell,pins = "mpp4";
244 marvell,function = "gpio";
245 };
246};
247
248&uart0 {
249 /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
250 status = "okay";
251};
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index e1b6d2a2ac49..fbccfbbab223 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -144,9 +144,10 @@
144 144
145 wdt: wdt@20300 { 145 wdt: wdt@20300 {
146 compatible = "marvell,orion-wdt"; 146 compatible = "marvell,orion-wdt";
147 reg = <0x20300 0x28>; 147 reg = <0x20300 0x28>, <0x20108 0x4>;
148 interrupt-parent = <&bridge_intc>; 148 interrupt-parent = <&bridge_intc>;
149 interrupts = <3>; 149 interrupts = <3>;
150 clocks = <&core_clk 0>;
150 status = "okay"; 151 status = "okay";
151 }; 152 };
152 153
diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
index 0abc93e5bb00..6c0038398ef2 100644
--- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
@@ -239,6 +239,45 @@
239 }; 239 };
240 }; 240 };
241 }; 241 };
242
243 led@48 {
244 /*
245 * The keypad LED @0x48 is routed to
246 * the sensor board where it is
247 * connected to an infrared LED
248 * SFH4650 (60mW, @850nm) next to the
249 * ambient light and proximity sensor
250 * Capella Microsystems CM3605.
251 */
252 compatible = "qcom,pm8058-keypad-led";
253 reg = <0x48>;
254 label = "pm8058:infrared:proximitysensor";
255 default-state = "off";
256 };
257 led@131 {
258 compatible = "qcom,pm8058-led";
259 reg = <0x131>;
260 label = "pm8058:red";
261 default-state = "off";
262 };
263 led@132 {
264 /*
265 * This is actually green too on my
266 * board, but documented as yellow.
267 */
268 compatible = "qcom,pm8058-led";
269 reg = <0x132>;
270 label = "pm8058:yellow";
271 default-state = "off";
272 linux,default-trigger = "mmc0";
273 };
274 led@133 {
275 compatible = "qcom,pm8058-led";
276 reg = <0x133>;
277 label = "pm8058:green";
278 default-state = "on";
279 linux,default-trigger = "heartbeat";
280 };
242 }; 281 };
243 }; 282 };
244 283
diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts
index 7b05f072bfc2..b72e09506448 100644
--- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts
@@ -253,6 +253,7 @@
253 vddcx-supply = <&pm8921_s3>; 253 vddcx-supply = <&pm8921_s3>;
254 v3p3-supply = <&pm8921_l3>; 254 v3p3-supply = <&pm8921_l3>;
255 v1p8-supply = <&pm8921_l4>; 255 v1p8-supply = <&pm8921_l4>;
256 dr_mode = "otg";
256 }; 257 };
257 258
258 gadget@12500000 { 259 gadget@12500000 {
@@ -272,5 +273,19 @@
272 vqmmc-supply = <&pm8921_s4>; 273 vqmmc-supply = <&pm8921_s4>;
273 }; 274 };
274 }; 275 };
276
277 imem@2a03f000 {
278 compatible = "syscon", "simple-mfd";
279 reg = <0x2a03f000 0x1000>;
280
281 reboot-mode {
282 compatible = "syscon-reboot-mode";
283 offset = <0x65c>;
284
285 mode-normal = <0x77665501>;
286 mode-bootloader = <0x77665500>;
287 mode-recovery = <0x77665502>;
288 };
289 };
275 }; 290 };
276}; 291};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 74a9b6c394f5..1dbe697b2e90 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -5,6 +5,7 @@
5#include <dt-bindings/reset/qcom,gcc-msm8960.h> 5#include <dt-bindings/reset/qcom,gcc-msm8960.h>
6#include <dt-bindings/clock/qcom,mmcc-msm8960.h> 6#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
7#include <dt-bindings/soc/qcom,gsbi.h> 7#include <dt-bindings/soc/qcom,gsbi.h>
8#include <dt-bindings/interrupt-controller/irq.h>
8#include <dt-bindings/interrupt-controller/arm-gic.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h>
9/ { 10/ {
10 model = "Qualcomm APQ8064"; 11 model = "Qualcomm APQ8064";
@@ -86,6 +87,92 @@
86 }; 87 };
87 }; 88 };
88 89
90 thermal-zones {
91 cpu-thermal0 {
92 polling-delay-passive = <250>;
93 polling-delay = <1000>;
94
95 thermal-sensors = <&gcc 7>;
96 coefficients = <1199 0>;
97
98 trips {
99 cpu_alert0: trip0 {
100 temperature = <75000>;
101 hysteresis = <2000>;
102 type = "passive";
103 };
104 cpu_crit0: trip1 {
105 temperature = <110000>;
106 hysteresis = <2000>;
107 type = "critical";
108 };
109 };
110 };
111
112 cpu-thermal1 {
113 polling-delay-passive = <250>;
114 polling-delay = <1000>;
115
116 thermal-sensors = <&gcc 8>;
117 coefficients = <1132 0>;
118
119 trips {
120 cpu_alert1: trip0 {
121 temperature = <75000>;
122 hysteresis = <2000>;
123 type = "passive";
124 };
125 cpu_crit1: trip1 {
126 temperature = <110000>;
127 hysteresis = <2000>;
128 type = "critical";
129 };
130 };
131 };
132
133 cpu-thermal2 {
134 polling-delay-passive = <250>;
135 polling-delay = <1000>;
136
137 thermal-sensors = <&gcc 9>;
138 coefficients = <1199 0>;
139
140 trips {
141 cpu_alert2: trip0 {
142 temperature = <75000>;
143 hysteresis = <2000>;
144 type = "passive";
145 };
146 cpu_crit2: trip1 {
147 temperature = <110000>;
148 hysteresis = <2000>;
149 type = "critical";
150 };
151 };
152 };
153
154 cpu-thermal3 {
155 polling-delay-passive = <250>;
156 polling-delay = <1000>;
157
158 thermal-sensors = <&gcc 10>;
159 coefficients = <1132 0>;
160
161 trips {
162 cpu_alert3: trip0 {
163 temperature = <75000>;
164 hysteresis = <2000>;
165 type = "passive";
166 };
167 cpu_crit3: trip1 {
168 temperature = <110000>;
169 hysteresis = <2000>;
170 type = "critical";
171 };
172 };
173 };
174 };
175
89 cpu-pmu { 176 cpu-pmu {
90 compatible = "qcom,krait-pmu"; 177 compatible = "qcom,krait-pmu";
91 interrupts = <1 10 0x304>; 178 interrupts = <1 10 0x304>;
@@ -559,22 +646,50 @@
559 compatible = "qcom,pm8921-gpio", 646 compatible = "qcom,pm8921-gpio",
560 "qcom,ssbi-gpio"; 647 "qcom,ssbi-gpio";
561 reg = <0x150>; 648 reg = <0x150>;
562 interrupts = <192 1>, <193 1>, <194 1>, 649 interrupts = <192 IRQ_TYPE_NONE>,
563 <195 1>, <196 1>, <197 1>, 650 <193 IRQ_TYPE_NONE>,
564 <198 1>, <199 1>, <200 1>, 651 <194 IRQ_TYPE_NONE>,
565 <201 1>, <202 1>, <203 1>, 652 <195 IRQ_TYPE_NONE>,
566 <204 1>, <205 1>, <206 1>, 653 <196 IRQ_TYPE_NONE>,
567 <207 1>, <208 1>, <209 1>, 654 <197 IRQ_TYPE_NONE>,
568 <210 1>, <211 1>, <212 1>, 655 <198 IRQ_TYPE_NONE>,
569 <213 1>, <214 1>, <215 1>, 656 <199 IRQ_TYPE_NONE>,
570 <216 1>, <217 1>, <218 1>, 657 <200 IRQ_TYPE_NONE>,
571 <219 1>, <220 1>, <221 1>, 658 <201 IRQ_TYPE_NONE>,
572 <222 1>, <223 1>, <224 1>, 659 <202 IRQ_TYPE_NONE>,
573 <225 1>, <226 1>, <227 1>, 660 <203 IRQ_TYPE_NONE>,
574 <228 1>, <229 1>, <230 1>, 661 <204 IRQ_TYPE_NONE>,
575 <231 1>, <232 1>, <233 1>, 662 <205 IRQ_TYPE_NONE>,
576 <234 1>, <235 1>; 663 <206 IRQ_TYPE_NONE>,
577 664 <207 IRQ_TYPE_NONE>,
665 <208 IRQ_TYPE_NONE>,
666 <209 IRQ_TYPE_NONE>,
667 <210 IRQ_TYPE_NONE>,
668 <211 IRQ_TYPE_NONE>,
669 <212 IRQ_TYPE_NONE>,
670 <213 IRQ_TYPE_NONE>,
671 <214 IRQ_TYPE_NONE>,
672 <215 IRQ_TYPE_NONE>,
673 <216 IRQ_TYPE_NONE>,
674 <217 IRQ_TYPE_NONE>,
675 <218 IRQ_TYPE_NONE>,
676 <219 IRQ_TYPE_NONE>,
677 <220 IRQ_TYPE_NONE>,
678 <221 IRQ_TYPE_NONE>,
679 <222 IRQ_TYPE_NONE>,
680 <223 IRQ_TYPE_NONE>,
681 <224 IRQ_TYPE_NONE>,
682 <225 IRQ_TYPE_NONE>,
683 <226 IRQ_TYPE_NONE>,
684 <227 IRQ_TYPE_NONE>,
685 <228 IRQ_TYPE_NONE>,
686 <229 IRQ_TYPE_NONE>,
687 <230 IRQ_TYPE_NONE>,
688 <231 IRQ_TYPE_NONE>,
689 <232 IRQ_TYPE_NONE>,
690 <233 IRQ_TYPE_NONE>,
691 <234 IRQ_TYPE_NONE>,
692 <235 IRQ_TYPE_NONE>;
578 gpio-controller; 693 gpio-controller;
579 #gpio-cells = <2>; 694 #gpio-cells = <2>;
580 695
@@ -587,9 +702,18 @@
587 gpio-controller; 702 gpio-controller;
588 #gpio-cells = <2>; 703 #gpio-cells = <2>;
589 interrupts = 704 interrupts =
590 <128 1>, <129 1>, <130 1>, <131 1>, 705 <128 IRQ_TYPE_NONE>,
591 <132 1>, <133 1>, <134 1>, <135 1>, 706 <129 IRQ_TYPE_NONE>,
592 <136 1>, <137 1>, <138 1>, <139 1>; 707 <130 IRQ_TYPE_NONE>,
708 <131 IRQ_TYPE_NONE>,
709 <132 IRQ_TYPE_NONE>,
710 <133 IRQ_TYPE_NONE>,
711 <134 IRQ_TYPE_NONE>,
712 <135 IRQ_TYPE_NONE>,
713 <136 IRQ_TYPE_NONE>,
714 <137 IRQ_TYPE_NONE>,
715 <138 IRQ_TYPE_NONE>,
716 <139 IRQ_TYPE_NONE>;
593 }; 717 };
594 718
595 rtc@11d { 719 rtc@11d {
@@ -611,11 +735,28 @@
611 }; 735 };
612 }; 736 };
613 737
738 qfprom: qfprom@700000 {
739 compatible = "qcom,qfprom";
740 reg = <0x00700000 0x1000>;
741 #address-cells = <1>;
742 #size-cells = <1>;
743 ranges;
744 tsens_calib: calib {
745 reg = <0x404 0x10>;
746 };
747 tsens_backup: backup_calib {
748 reg = <0x414 0x10>;
749 };
750 };
751
614 gcc: clock-controller@900000 { 752 gcc: clock-controller@900000 {
615 compatible = "qcom,gcc-apq8064"; 753 compatible = "qcom,gcc-apq8064";
616 reg = <0x00900000 0x4000>; 754 reg = <0x00900000 0x4000>;
755 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
756 nvmem-cell-names = "calib", "calib_backup";
617 #clock-cells = <1>; 757 #clock-cells = <1>;
618 #reset-cells = <1>; 758 #reset-cells = <1>;
759 #thermal-sensor-cells = <1>;
619 }; 760 };
620 761
621 lcc: clock-controller@28000000 { 762 lcc: clock-controller@28000000 {
@@ -712,7 +853,6 @@
712 reg = <0x12500000 0x400>; 853 reg = <0x12500000 0x400>;
713 interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>; 854 interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
714 status = "disabled"; 855 status = "disabled";
715 dr_mode = "host";
716 856
717 clocks = <&gcc USB_HS1_XCVR_CLK>, 857 clocks = <&gcc USB_HS1_XCVR_CLK>,
718 <&gcc USB_HS1_H_CLK>; 858 <&gcc USB_HS1_H_CLK>;
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 7c2df062a025..39eb7a4ed16a 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -94,6 +94,88 @@
94 }; 94 };
95 }; 95 };
96 96
97 thermal-zones {
98 cpu-thermal0 {
99 polling-delay-passive = <250>;
100 polling-delay = <1000>;
101
102 thermal-sensors = <&tsens 5>;
103
104 trips {
105 cpu_alert0: trip0 {
106 temperature = <75000>;
107 hysteresis = <2000>;
108 type = "passive";
109 };
110 cpu_crit0: trip1 {
111 temperature = <110000>;
112 hysteresis = <2000>;
113 type = "critical";
114 };
115 };
116 };
117
118 cpu-thermal1 {
119 polling-delay-passive = <250>;
120 polling-delay = <1000>;
121
122 thermal-sensors = <&tsens 6>;
123
124 trips {
125 cpu_alert1: trip0 {
126 temperature = <75000>;
127 hysteresis = <2000>;
128 type = "passive";
129 };
130 cpu_crit1: trip1 {
131 temperature = <110000>;
132 hysteresis = <2000>;
133 type = "critical";
134 };
135 };
136 };
137
138 cpu-thermal2 {
139 polling-delay-passive = <250>;
140 polling-delay = <1000>;
141
142 thermal-sensors = <&tsens 7>;
143
144 trips {
145 cpu_alert2: trip0 {
146 temperature = <75000>;
147 hysteresis = <2000>;
148 type = "passive";
149 };
150 cpu_crit2: trip1 {
151 temperature = <110000>;
152 hysteresis = <2000>;
153 type = "critical";
154 };
155 };
156 };
157
158 cpu-thermal3 {
159 polling-delay-passive = <250>;
160 polling-delay = <1000>;
161
162 thermal-sensors = <&tsens 8>;
163
164 trips {
165 cpu_alert3: trip0 {
166 temperature = <75000>;
167 hysteresis = <2000>;
168 type = "passive";
169 };
170 cpu_crit3: trip1 {
171 temperature = <110000>;
172 hysteresis = <2000>;
173 type = "critical";
174 };
175 };
176 };
177 };
178
97 cpu-pmu { 179 cpu-pmu {
98 compatible = "qcom,krait-pmu"; 180 compatible = "qcom,krait-pmu";
99 interrupts = <1 7 0xf04>; 181 interrupts = <1 7 0xf04>;
@@ -150,6 +232,27 @@
150 reg = <0xf9011000 0x1000>; 232 reg = <0xf9011000 0x1000>;
151 }; 233 };
152 234
235 qfprom: qfprom@fc4bc000 {
236 #address-cells = <1>;
237 #size-cells = <1>;
238 compatible = "qcom,qfprom";
239 reg = <0xfc4bc000 0x1000>;
240 tsens_calib: calib@d0 {
241 reg = <0xd0 0x18>;
242 };
243 tsens_backup: backup@440 {
244 reg = <0x440 0x10>;
245 };
246 };
247
248 tsens: thermal-sensor@fc4a8000 {
249 compatible = "qcom,msm8974-tsens";
250 reg = <0xfc4a8000 0x2000>;
251 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
252 nvmem-cell-names = "calib", "calib_backup";
253 #thermal-sensor-cells = <1>;
254 };
255
153 timer@f9020000 { 256 timer@f9020000 {
154 #address-cells = <1>; 257 #address-cells = <1>;
155 #size-cells = <1>; 258 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
index d501382493e3..348503d1a1c1 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -95,6 +95,7 @@
95 }; 95 };
96 96
97 sata@29000000 { 97 sata@29000000 {
98 ports-implemented = <0x1>;
98 status = "ok"; 99 status = "ok";
99 }; 100 };
100 }; 101 };
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index acbe71febe13..8c65e0d82559 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -2,6 +2,7 @@
2 2
3/include/ "skeleton.dtsi" 3/include/ "skeleton.dtsi"
4 4
5#include <dt-bindings/interrupt-controller/irq.h>
5#include <dt-bindings/interrupt-controller/arm-gic.h> 6#include <dt-bindings/interrupt-controller/arm-gic.h>
6#include <dt-bindings/clock/qcom,gcc-msm8660.h> 7#include <dt-bindings/clock/qcom,gcc-msm8660.h>
7#include <dt-bindings/soc/qcom,gsbi.h> 8#include <dt-bindings/soc/qcom,gsbi.h>
@@ -159,21 +160,50 @@
159 "qcom,ssbi-gpio"; 160 "qcom,ssbi-gpio";
160 reg = <0x150>; 161 reg = <0x150>;
161 interrupt-parent = <&pmicintc>; 162 interrupt-parent = <&pmicintc>;
162 interrupts = <192 1>, <193 1>, <194 1>, 163 interrupts = <192 IRQ_TYPE_NONE>,
163 <195 1>, <196 1>, <197 1>, 164 <193 IRQ_TYPE_NONE>,
164 <198 1>, <199 1>, <200 1>, 165 <194 IRQ_TYPE_NONE>,
165 <201 1>, <202 1>, <203 1>, 166 <195 IRQ_TYPE_NONE>,
166 <204 1>, <205 1>, <206 1>, 167 <196 IRQ_TYPE_NONE>,
167 <207 1>, <208 1>, <209 1>, 168 <197 IRQ_TYPE_NONE>,
168 <210 1>, <211 1>, <212 1>, 169 <198 IRQ_TYPE_NONE>,
169 <213 1>, <214 1>, <215 1>, 170 <199 IRQ_TYPE_NONE>,
170 <216 1>, <217 1>, <218 1>, 171 <200 IRQ_TYPE_NONE>,
171 <219 1>, <220 1>, <221 1>, 172 <201 IRQ_TYPE_NONE>,
172 <222 1>, <223 1>, <224 1>, 173 <202 IRQ_TYPE_NONE>,
173 <225 1>, <226 1>, <227 1>, 174 <203 IRQ_TYPE_NONE>,
174 <228 1>, <229 1>, <230 1>, 175 <204 IRQ_TYPE_NONE>,
175 <231 1>, <232 1>, <233 1>, 176 <205 IRQ_TYPE_NONE>,
176 <234 1>, <235 1>; 177 <206 IRQ_TYPE_NONE>,
178 <207 IRQ_TYPE_NONE>,
179 <208 IRQ_TYPE_NONE>,
180 <209 IRQ_TYPE_NONE>,
181 <210 IRQ_TYPE_NONE>,
182 <211 IRQ_TYPE_NONE>,
183 <212 IRQ_TYPE_NONE>,
184 <213 IRQ_TYPE_NONE>,
185 <214 IRQ_TYPE_NONE>,
186 <215 IRQ_TYPE_NONE>,
187 <216 IRQ_TYPE_NONE>,
188 <217 IRQ_TYPE_NONE>,
189 <218 IRQ_TYPE_NONE>,
190 <219 IRQ_TYPE_NONE>,
191 <220 IRQ_TYPE_NONE>,
192 <221 IRQ_TYPE_NONE>,
193 <222 IRQ_TYPE_NONE>,
194 <223 IRQ_TYPE_NONE>,
195 <224 IRQ_TYPE_NONE>,
196 <225 IRQ_TYPE_NONE>,
197 <226 IRQ_TYPE_NONE>,
198 <227 IRQ_TYPE_NONE>,
199 <228 IRQ_TYPE_NONE>,
200 <229 IRQ_TYPE_NONE>,
201 <230 IRQ_TYPE_NONE>,
202 <231 IRQ_TYPE_NONE>,
203 <232 IRQ_TYPE_NONE>,
204 <233 IRQ_TYPE_NONE>,
205 <234 IRQ_TYPE_NONE>,
206 <235 IRQ_TYPE_NONE>;
177 gpio-controller; 207 gpio-controller;
178 #gpio-cells = <2>; 208 #gpio-cells = <2>;
179 209
@@ -187,9 +217,18 @@
187 #gpio-cells = <2>; 217 #gpio-cells = <2>;
188 interrupt-parent = <&pmicintc>; 218 interrupt-parent = <&pmicintc>;
189 interrupts = 219 interrupts =
190 <128 1>, <129 1>, <130 1>, <131 1>, 220 <128 IRQ_TYPE_NONE>,
191 <132 1>, <133 1>, <134 1>, <135 1>, 221 <129 IRQ_TYPE_NONE>,
192 <136 1>, <137 1>, <138 1>, <139 1>; 222 <130 IRQ_TYPE_NONE>,
223 <131 IRQ_TYPE_NONE>,
224 <132 IRQ_TYPE_NONE>,
225 <133 IRQ_TYPE_NONE>,
226 <134 IRQ_TYPE_NONE>,
227 <135 IRQ_TYPE_NONE>,
228 <136 IRQ_TYPE_NONE>,
229 <137 IRQ_TYPE_NONE>,
230 <138 IRQ_TYPE_NONE>,
231 <139 IRQ_TYPE_NONE>;
193 }; 232 };
194 233
195 pwrkey@1c { 234 pwrkey@1c {
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
new file mode 100644
index 000000000000..c0fb4a698c56
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -0,0 +1,262 @@
1#include "qcom-msm8974.dtsi"
2#include "qcom-pm8841.dtsi"
3#include "qcom-pm8941.dtsi"
4#include <dt-bindings/gpio/gpio.h>
5#include <dt-bindings/input/input.h>
6#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7
8/ {
9 model = "LGE MSM 8974 HAMMERHEAD";
10 compatible = "lge,hammerhead", "qcom,msm8974";
11
12 aliases {
13 serial0 = &blsp1_uart1;
14 };
15
16 chosen {
17 stdout-path = "serial0:115200n8";
18 };
19
20 smd {
21 rpm {
22 rpm_requests {
23 pm8841-regulators {
24 s1 {
25 regulator-min-microvolt = <675000>;
26 regulator-max-microvolt = <1050000>;
27 };
28
29 s2 {
30 regulator-min-microvolt = <500000>;
31 regulator-max-microvolt = <1050000>;
32 };
33
34 s3 {
35 regulator-min-microvolt = <1050000>;
36 regulator-max-microvolt = <1050000>;
37 };
38
39 s4 {
40 regulator-min-microvolt = <815000>;
41 regulator-max-microvolt = <900000>;
42 };
43 };
44
45 pm8941-regulators {
46 vdd_l1_l3-supply = <&pm8941_s1>;
47 vdd_l2_lvs1_2_3-supply = <&pm8941_s3>;
48 vdd_l4_l11-supply = <&pm8941_s1>;
49 vdd_l5_l7-supply = <&pm8941_s2>;
50 vdd_l6_l12_l14_l15-supply = <&pm8941_s2>;
51 vdd_l8_l16_l18_l19-supply = <&vreg_vph_pwr>;
52 vdd_l9_l10_l17_l22-supply = <&vreg_boost>;
53 vdd_l13_l20_l23_l24-supply = <&vreg_boost>;
54 vdd_l21-supply = <&vreg_boost>;
55
56 s1 {
57 regulator-min-microvolt = <1300000>;
58 regulator-max-microvolt = <1300000>;
59
60 regulator-always-on;
61 regulator-boot-on;
62 };
63
64 s2 {
65 regulator-min-microvolt = <2150000>;
66 regulator-max-microvolt = <2150000>;
67
68 regulator-boot-on;
69 };
70
71 s3 {
72 regulator-min-microvolt = <1800000>;
73 regulator-max-microvolt = <1800000>;
74
75 regulator-always-on;
76 regulator-boot-on;
77 };
78
79 l1 {
80 regulator-min-microvolt = <1225000>;
81 regulator-max-microvolt = <1225000>;
82
83 regulator-always-on;
84 regulator-boot-on;
85 };
86
87 l2 {
88 regulator-min-microvolt = <1200000>;
89 regulator-max-microvolt = <1200000>;
90 };
91
92 l3 {
93 regulator-min-microvolt = <1225000>;
94 regulator-max-microvolt = <1225000>;
95 };
96
97 l4 {
98 regulator-min-microvolt = <1225000>;
99 regulator-max-microvolt = <1225000>;
100 };
101
102 l5 {
103 regulator-min-microvolt = <1800000>;
104 regulator-max-microvolt = <1800000>;
105 };
106
107 l6 {
108 regulator-min-microvolt = <1800000>;
109 regulator-max-microvolt = <1800000>;
110
111 regulator-boot-on;
112 };
113
114 l7 {
115 regulator-min-microvolt = <1800000>;
116 regulator-max-microvolt = <1800000>;
117
118 regulator-boot-on;
119 };
120
121 l8 {
122 regulator-min-microvolt = <1800000>;
123 regulator-max-microvolt = <1800000>;
124 };
125
126 l9 {
127 regulator-min-microvolt = <1800000>;
128 regulator-max-microvolt = <2950000>;
129 };
130
131 l10 {
132 regulator-min-microvolt = <1800000>;
133 regulator-max-microvolt = <2950000>;
134 };
135
136 l11 {
137 regulator-min-microvolt = <1300000>;
138 regulator-max-microvolt = <1300000>;
139 };
140
141 l12 {
142 regulator-min-microvolt = <1800000>;
143 regulator-max-microvolt = <1800000>;
144
145 regulator-always-on;
146 regulator-boot-on;
147 };
148
149 l13 {
150 regulator-min-microvolt = <1800000>;
151 regulator-max-microvolt = <2950000>;
152
153 regulator-boot-on;
154 };
155
156 l14 {
157 regulator-min-microvolt = <1800000>;
158 regulator-max-microvolt = <1800000>;
159 };
160
161 l15 {
162 regulator-min-microvolt = <2050000>;
163 regulator-max-microvolt = <2050000>;
164 };
165
166 l16 {
167 regulator-min-microvolt = <2700000>;
168 regulator-max-microvolt = <2700000>;
169 };
170
171 l17 {
172 regulator-min-microvolt = <2850000>;
173 regulator-max-microvolt = <2850000>;
174 };
175
176 l18 {
177 regulator-min-microvolt = <2850000>;
178 regulator-max-microvolt = <2850000>;
179 };
180
181 l19 {
182 regulator-min-microvolt = <3000000>;
183 regulator-max-microvolt = <3300000>;
184 };
185
186 l20 {
187 regulator-min-microvolt = <2950000>;
188 regulator-max-microvolt = <2950000>;
189
190 regulator-boot-on;
191 };
192
193 l21 {
194 regulator-min-microvolt = <2950000>;
195 regulator-max-microvolt = <2950000>;
196
197 regulator-boot-on;
198 };
199
200 l22 {
201 regulator-min-microvolt = <3000000>;
202 regulator-max-microvolt = <3300000>;
203 };
204
205 l23 {
206 regulator-min-microvolt = <3000000>;
207 regulator-max-microvolt = <3000000>;
208 };
209
210 l24 {
211 regulator-min-microvolt = <3075000>;
212 regulator-max-microvolt = <3075000>;
213
214 regulator-boot-on;
215 };
216 };
217 };
218 };
219 };
220};
221
222&soc {
223 serial@f991d000 {
224 status = "ok";
225 };
226
227 gpio-keys {
228 compatible = "gpio-keys";
229 input-name = "gpio-keys";
230
231 pinctrl-names = "default";
232 pinctrl-0 = <&gpio_keys_pin_a>;
233
234 volume-up {
235 label = "volume_up";
236 gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
237 linux,input-type = <1>;
238 linux,code = <KEY_VOLUMEUP>;
239 };
240
241 volume-down {
242 label = "volume_down";
243 gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>;
244 linux,input-type = <1>;
245 linux,code = <KEY_VOLUMEDOWN>;
246 };
247 };
248};
249
250&spmi_bus {
251 pm8941@0 {
252 gpios@c000 {
253 gpio_keys_pin_a: gpio-keys-active {
254 pins = "gpio2", "gpio3";
255 function = "normal";
256
257 bias-pull-up;
258 power-source = <PM8941_GPIO_S3>;
259 };
260 };
261 };
262};
diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
index 3fb4dada6b0d..e7c1577d56f4 100644
--- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
@@ -257,23 +257,6 @@
257 }; 257 };
258 }; 258 };
259 }; 259 };
260
261 vreg_boost: vreg-boost {
262 compatible = "regulator-fixed";
263
264 regulator-name = "vreg-boost";
265 regulator-min-microvolt = <3150000>;
266 regulator-max-microvolt = <3150000>;
267
268 regulator-always-on;
269 regulator-boot-on;
270
271 gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>;
272 enable-active-high;
273
274 pinctrl-names = "default";
275 pinctrl-0 = <&boost_bypass_n_pin>;
276 };
277}; 260};
278 261
279&soc { 262&soc {
@@ -311,6 +294,45 @@
311 pinctrl-0 = <&blsp1_uart2_pin_a>; 294 pinctrl-0 = <&blsp1_uart2_pin_a>;
312 }; 295 };
313 296
297 i2c@f9924000 {
298 status = "ok";
299
300 clock-frequency = <355000>;
301 qcom,src-freq = <50000000>;
302
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c2_pins>;
305
306 synaptics@2c {
307 compatible = "syna,rmi4-i2c";
308 reg = <0x2c>;
309
310 interrupts-extended = <&msmgpio 61 IRQ_TYPE_EDGE_FALLING>;
311
312 #address-cells = <1>;
313 #size-cells = <0>;
314
315 vdd-supply = <&pm8941_l22>;
316 vio-supply = <&pm8941_lvs3>;
317
318 pinctrl-names = "default";
319 pinctrl-0 = <&ts_int_pin>;
320
321 syna,startup-delay-ms = <10>;
322
323 rmi4-f01@1 {
324 reg = <0x1>;
325 syna,nosleep-mode = <1>;
326 };
327
328 rmi4-f11@11 {
329 reg = <0x11>;
330 touchscreen-inverted-x;
331 syna,sensor-type = <1>;
332 };
333 };
334 };
335
314 pinctrl@fd510000 { 336 pinctrl@fd510000 {
315 blsp1_uart2_pin_a: blsp1-uart2-pin-active { 337 blsp1_uart2_pin_a: blsp1-uart2-pin-active {
316 rx { 338 rx {
@@ -330,6 +352,16 @@
330 }; 352 };
331 }; 353 };
332 354
355 i2c2_pins: i2c2 {
356 mux {
357 pins = "gpio6", "gpio7";
358 function = "blsp_i2c2";
359
360 drive-strength = <2>;
361 bias-disable;
362 };
363 };
364
333 sdhc1_pin_a: sdhc1-pin-active { 365 sdhc1_pin_a: sdhc1-pin-active {
334 clk { 366 clk {
335 pins = "sdc1_clk"; 367 pins = "sdc1_clk";
@@ -366,6 +398,16 @@
366 }; 398 };
367 }; 399 };
368 400
401 ts_int_pin: touch-int {
402 pin {
403 pins = "gpio61";
404 function = "gpio";
405
406 drive-strength = <2>;
407 bias-disable;
408 input-enable;
409 };
410 };
369 }; 411 };
370 412
371 dma-controller@f9944000 { 413 dma-controller@f9944000 {
@@ -387,11 +429,6 @@
387 }; 429 };
388 430
389 gpios@c000 { 431 gpios@c000 {
390 boost_bypass_n_pin: boost-bypass {
391 pins = "gpio21";
392 function = "normal";
393 };
394
395 gpio_keys_pin_a: gpio-keys-active { 432 gpio_keys_pin_a: gpio-keys-active {
396 pins = "gpio2", "gpio3", "gpio4", "gpio5"; 433 pins = "gpio2", "gpio3", "gpio4", "gpio5";
397 function = "normal"; 434 function = "normal";
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 561d4d136762..d2109475bdfd 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -2,6 +2,7 @@
2 2
3#include <dt-bindings/interrupt-controller/arm-gic.h> 3#include <dt-bindings/interrupt-controller/arm-gic.h>
4#include <dt-bindings/clock/qcom,gcc-msm8974.h> 4#include <dt-bindings/clock/qcom,gcc-msm8974.h>
5#include <dt-bindings/gpio/gpio.h>
5#include "skeleton.dtsi" 6#include "skeleton.dtsi"
6 7
7/ { 8/ {
@@ -131,6 +132,88 @@
131 }; 132 };
132 }; 133 };
133 134
135 thermal-zones {
136 cpu-thermal0 {
137 polling-delay-passive = <250>;
138 polling-delay = <1000>;
139
140 thermal-sensors = <&tsens 5>;
141
142 trips {
143 cpu_alert0: trip0 {
144 temperature = <75000>;
145 hysteresis = <2000>;
146 type = "passive";
147 };
148 cpu_crit0: trip1 {
149 temperature = <110000>;
150 hysteresis = <2000>;
151 type = "critical";
152 };
153 };
154 };
155
156 cpu-thermal1 {
157 polling-delay-passive = <250>;
158 polling-delay = <1000>;
159
160 thermal-sensors = <&tsens 6>;
161
162 trips {
163 cpu_alert1: trip0 {
164 temperature = <75000>;
165 hysteresis = <2000>;
166 type = "passive";
167 };
168 cpu_crit1: trip1 {
169 temperature = <110000>;
170 hysteresis = <2000>;
171 type = "critical";
172 };
173 };
174 };
175
176 cpu-thermal2 {
177 polling-delay-passive = <250>;
178 polling-delay = <1000>;
179
180 thermal-sensors = <&tsens 7>;
181
182 trips {
183 cpu_alert2: trip0 {
184 temperature = <75000>;
185 hysteresis = <2000>;
186 type = "passive";
187 };
188 cpu_crit2: trip1 {
189 temperature = <110000>;
190 hysteresis = <2000>;
191 type = "critical";
192 };
193 };
194 };
195
196 cpu-thermal3 {
197 polling-delay-passive = <250>;
198 polling-delay = <1000>;
199
200 thermal-sensors = <&tsens 8>;
201
202 trips {
203 cpu_alert3: trip0 {
204 temperature = <75000>;
205 hysteresis = <2000>;
206 type = "passive";
207 };
208 cpu_crit3: trip1 {
209 temperature = <110000>;
210 hysteresis = <2000>;
211 type = "critical";
212 };
213 };
214 };
215 };
216
134 cpu-pmu { 217 cpu-pmu {
135 compatible = "qcom,krait-pmu"; 218 compatible = "qcom,krait-pmu";
136 interrupts = <1 7 0xf04>; 219 interrupts = <1 7 0xf04>;
@@ -287,6 +370,27 @@
287 reg = <0xf9011000 0x1000>; 370 reg = <0xf9011000 0x1000>;
288 }; 371 };
289 372
373 qfprom: qfprom@fc4bc000 {
374 #address-cells = <1>;
375 #size-cells = <1>;
376 compatible = "qcom,qfprom";
377 reg = <0xfc4bc000 0x1000>;
378 tsens_calib: calib@d0 {
379 reg = <0xd0 0x18>;
380 };
381 tsens_backup: backup@440 {
382 reg = <0x440 0x10>;
383 };
384 };
385
386 tsens: thermal-sensor@fc4a8000 {
387 compatible = "qcom,msm8974-tsens";
388 reg = <0xfc4a8000 0x2000>;
389 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
390 nvmem-cell-names = "calib", "calib_backup";
391 #thermal-sensor-cells = <1>;
392 };
393
290 timer@f9020000 { 394 timer@f9020000 {
291 #address-cells = <1>; 395 #address-cells = <1>;
292 #size-cells = <1>; 396 #size-cells = <1>;
@@ -430,6 +534,15 @@
430 reg = <0xfc428000 0x4000>; 534 reg = <0xfc428000 0x4000>;
431 }; 535 };
432 536
537 blsp1_uart1: serial@f991d000 {
538 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
539 reg = <0xf991d000 0x1000>;
540 interrupts = <0 107 0x0>;
541 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
542 clock-names = "core", "iface";
543 status = "disabled";
544 };
545
433 blsp1_uart2: serial@f991e000 { 546 blsp1_uart2: serial@f991e000 {
434 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; 547 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
435 reg = <0xf991e000 0x1000>; 548 reg = <0xf991e000 0x1000>;
@@ -615,4 +728,30 @@
615 }; 728 };
616 }; 729 };
617 }; 730 };
731
732 vreg_boost: vreg-boost {
733 compatible = "regulator-fixed";
734
735 regulator-name = "vreg-boost";
736 regulator-min-microvolt = <3150000>;
737 regulator-max-microvolt = <3150000>;
738
739 regulator-always-on;
740 regulator-boot-on;
741
742 gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>;
743 enable-active-high;
744
745 pinctrl-names = "default";
746 pinctrl-0 = <&boost_bypass_n_pin>;
747 };
748 vreg_vph_pwr: vreg-vph-pwr {
749 compatible = "regulator-fixed";
750 regulator-name = "vph-pwr";
751
752 regulator-min-microvolt = <3600000>;
753 regulator-max-microvolt = <3600000>;
754
755 regulator-always-on;
756 };
618}; 757};
diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi
index d95edb6f6265..f8eb5e31c920 100644
--- a/arch/arm/boot/dts/qcom-pm8941.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8941.dtsi
@@ -88,6 +88,11 @@
88 <0 0xe1 0 IRQ_TYPE_NONE>, 88 <0 0xe1 0 IRQ_TYPE_NONE>,
89 <0 0xe2 0 IRQ_TYPE_NONE>, 89 <0 0xe2 0 IRQ_TYPE_NONE>,
90 <0 0xe3 0 IRQ_TYPE_NONE>; 90 <0 0xe3 0 IRQ_TYPE_NONE>;
91
92 boost_bypass_n_pin: boost-bypass {
93 pins = "gpio21";
94 function = "normal";
95 };
91 }; 96 };
92 97
93 pm8941_mpps: mpps@a000 { 98 pm8941_mpps: mpps@a000 {
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
new file mode 100644
index 000000000000..e5dea5bb4032
--- /dev/null
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -0,0 +1,61 @@
1/*
2 * Device Tree Source for the RZ/A1H RSK board
3 *
4 * Copyright (C) 2016 Renesas Electronics
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r7s72100.dtsi"
13
14/ {
15 model = "RSKRZA1";
16 compatible = "renesas,rskrza1", "renesas,r7s72100";
17
18 aliases {
19 serial0 = &scif2;
20 };
21
22 chosen {
23 bootargs = "ignore_loglevel";
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory@8000000 {
28 device_type = "memory";
29 reg = <0x08000000 0x02000000>;
30 };
31
32 lbsc {
33 #address-cells = <1>;
34 #size-cells = <1>;
35 };
36};
37
38&extal_clk {
39 clock-frequency = <13330000>;
40};
41
42&usb_x1_clk {
43 clock-frequency = <48000000>;
44};
45
46&mtu2 {
47 status = "okay";
48};
49
50&ether {
51 status = "okay";
52 renesas,no-ether-link;
53 phy-handle = <&phy0>;
54 phy0: ethernet-phy@0 {
55 reg = <0>;
56 };
57};
58
59&scif2 {
60 status = "okay";
61};
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index e8e2a5d71976..fb9ef9ca120e 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -108,6 +108,15 @@
108 clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7"; 108 clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
109 }; 109 };
110 110
111 mstp7_clks: mstp7_clks@fcfe0430 {
112 #clock-cells = <1>;
113 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
114 reg = <0xfcfe0430 4>;
115 clocks = <&p0_clk>;
116 clock-indices = <R7S72100_CLK_ETHER>;
117 clock-output-names = "ether";
118 };
119
111 mstp9_clks: mstp9_clks@fcfe0438 { 120 mstp9_clks: mstp9_clks@fcfe0438 {
112 #clock-cells = <1>; 121 #clock-cells = <1>;
113 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; 122 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -419,4 +428,17 @@
419 power-domains = <&cpg_clocks>; 428 power-domains = <&cpg_clocks>;
420 status = "disabled"; 429 status = "disabled";
421 }; 430 };
431
432 ether: ethernet@e8203000 {
433 compatible = "renesas,ether-r7s72100";
434 reg = <0xe8203000 0x800>,
435 <0xe8204800 0x200>;
436 interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&mstp7_clks R7S72100_CLK_ETHER>;
438 power-domains = <&cpg_clocks>;
439 phy-mode = "mii";
440 #address-cells = <1>;
441 #size-cells = <0>;
442 status = "disabled";
443 };
422}; 444};
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d18558f21102..351fcc2f87df 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -944,11 +944,6 @@
944 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 944 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>; 945 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
946 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 946 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
947
948 renesas,has-sru;
949 renesas,#rpf = <5>;
950 renesas,#uds = <1>;
951 renesas,#wpf = <4>;
952 }; 947 };
953 948
954 vsp1@fe928000 { 949 vsp1@fe928000 {
@@ -957,12 +952,6 @@
957 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 952 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
958 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; 953 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
959 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 954 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
960
961 renesas,has-lut;
962 renesas,has-sru;
963 renesas,#rpf = <5>;
964 renesas,#uds = <3>;
965 renesas,#wpf = <4>;
966 }; 955 };
967 956
968 vsp1@fe930000 { 957 vsp1@fe930000 {
@@ -971,12 +960,6 @@
971 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 960 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
972 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>; 961 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
973 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 962 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
974
975 renesas,has-lif;
976 renesas,has-lut;
977 renesas,#rpf = <4>;
978 renesas,#uds = <1>;
979 renesas,#wpf = <4>;
980 }; 963 };
981 964
982 vsp1@fe938000 { 965 vsp1@fe938000 {
@@ -985,12 +968,6 @@
985 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 968 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
986 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>; 969 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
987 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 970 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
988
989 renesas,has-lif;
990 renesas,has-lut;
991 renesas,#rpf = <4>;
992 renesas,#uds = <1>;
993 renesas,#wpf = <4>;
994 }; 971 };
995 972
996 du: display@feb00000 { 973 du: display@feb00000 {
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 8f0086bbd96b..162b55c665a3 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -983,12 +983,6 @@
983 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 983 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
984 clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>; 984 clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>;
985 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 985 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
986
987 renesas,has-lut;
988 renesas,has-sru;
989 renesas,#rpf = <5>;
990 renesas,#uds = <3>;
991 renesas,#wpf = <4>;
992 }; 986 };
993 987
994 vsp1@fe930000 { 988 vsp1@fe930000 {
@@ -997,12 +991,6 @@
997 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 991 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
998 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>; 992 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>;
999 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 993 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1000
1001 renesas,has-lif;
1002 renesas,has-lut;
1003 renesas,#rpf = <4>;
1004 renesas,#uds = <1>;
1005 renesas,#wpf = <4>;
1006 }; 994 };
1007 995
1008 vsp1@fe938000 { 996 vsp1@fe938000 {
@@ -1011,12 +999,6 @@
1011 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 999 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1012 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>; 1000 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>;
1013 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1001 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1014
1015 renesas,has-lif;
1016 renesas,has-lut;
1017 renesas,#rpf = <4>;
1018 renesas,#uds = <1>;
1019 renesas,#wpf = <4>;
1020 }; 1002 };
1021 1003
1022 du: display@feb00000 { 1004 du: display@feb00000 {
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts
index e7b40f0e7da6..f3ea43b7b724 100644
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -11,6 +11,8 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "r8a7792.dtsi" 13#include "r8a7792.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
14 16
15/ { 17/ {
16 model = "Blanche"; 18 model = "Blanche";
@@ -50,6 +52,139 @@
50 reg-io-width = <4>; 52 reg-io-width = <4>;
51 vddvario-supply = <&d3_3v>; 53 vddvario-supply = <&d3_3v>;
52 vdd33a-supply = <&d3_3v>; 54 vdd33a-supply = <&d3_3v>;
55
56 pinctrl-0 = <&lan89218_pins>;
57 pinctrl-names = "default";
58 };
59
60 vga-encoder {
61 compatible = "adi,adv7123";
62
63 ports {
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 port@0 {
68 reg = <0>;
69 adv7123_in: endpoint {
70 remote-endpoint = <&du_out_rgb1>;
71 };
72 };
73 port@1 {
74 reg = <1>;
75 adv7123_out: endpoint {
76 remote-endpoint = <&vga_in>;
77 };
78 };
79 };
80 };
81
82 hdmi-out {
83 compatible = "hdmi-connector";
84 type = "a";
85
86 port {
87 hdmi_con: endpoint {
88 remote-endpoint = <&adv7511_out>;
89 };
90 };
91 };
92
93 vga {
94 compatible = "vga-connector";
95
96 port {
97 vga_in: endpoint {
98 remote-endpoint = <&adv7123_out>;
99 };
100 };
101 };
102
103 x1_clk: x1 {
104 compatible = "fixed-clock";
105 #clock-cells = <0>;
106 clock-frequency = <74250000>;
107 };
108
109 x2_clk: x2 {
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
112 clock-frequency = <65000000>;
113 };
114
115 keyboard {
116 compatible = "gpio-keys";
117
118 key-1 {
119 linux,code = <KEY_1>;
120 label = "SW2-1";
121 wakeup-source;
122 debounce-interval = <20>;
123 gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
124 };
125 key-2 {
126 linux,code = <KEY_2>;
127 label = "SW2-2";
128 wakeup-source;
129 debounce-interval = <20>;
130 gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
131 };
132 key-3 {
133 linux,code = <KEY_3>;
134 label = "SW2-3";
135 wakeup-source;
136 debounce-interval = <20>;
137 gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
138 };
139 key-4 {
140 linux,code = <KEY_4>;
141 label = "SW2-4";
142 wakeup-source;
143 debounce-interval = <20>;
144 gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
145 };
146 key-a {
147 linux,code = <KEY_A>;
148 label = "SW24";
149 wakeup-source;
150 debounce-interval = <20>;
151 gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
152 };
153 key-b {
154 linux,code = <KEY_B>;
155 label = "SW25";
156 wakeup-source;
157 debounce-interval = <20>;
158 gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
159 };
160 };
161
162 leds {
163 compatible = "gpio-leds";
164
165 led17 {
166 gpios = <&gpio10 10 GPIO_ACTIVE_HIGH>;
167 };
168 led18 {
169 gpios = <&gpio10 11 GPIO_ACTIVE_HIGH>;
170 };
171 led19 {
172 gpios = <&gpio10 12 GPIO_ACTIVE_HIGH>;
173 };
174 led20 {
175 gpios = <&gpio10 23 GPIO_ACTIVE_HIGH>;
176 };
177 };
178
179 vcc_sdhi0: regulator-vcc-sdhi0 {
180 compatible = "regulator-fixed";
181
182 regulator-name = "SDHI0 Vcc";
183 regulator-min-microvolt = <3300000>;
184 regulator-max-microvolt = <3300000>;
185
186 gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
187 enable-active-high;
53 }; 188 };
54}; 189};
55 190
@@ -57,10 +192,139 @@
57 clock-frequency = <20000000>; 192 clock-frequency = <20000000>;
58}; 193};
59 194
195&can_clk {
196 clock-frequency = <48000000>;
197};
198
199&pfc {
200 scif0_pins: scif0 {
201 groups = "scif0_data";
202 function = "scif0";
203 };
204
205 scif3_pins: scif3 {
206 groups = "scif3_data";
207 function = "scif3";
208 };
209
210 lan89218_pins: lan89218 {
211 intc {
212 groups = "intc_irq0";
213 function = "intc";
214 };
215 lbsc {
216 groups = "lbsc_ex_cs0";
217 function = "lbsc";
218 };
219 };
220
221 can0_pins: can0 {
222 groups = "can0_data", "can_clk";
223 function = "can0";
224 };
225
226 sdhi0_pins: sdhi0 {
227 groups = "sdhi0_data4", "sdhi0_ctrl";
228 function = "sdhi0";
229 };
230
231 du0_pins: du0 {
232 groups = "du0_rgb888", "du0_sync", "du0_disp";
233 function = "du0";
234 };
235
236 du1_pins: du1 {
237 groups = "du1_rgb666", "du1_sync", "du1_disp";
238 function = "du1";
239 };
240};
241
60&scif0 { 242&scif0 {
243 pinctrl-0 = <&scif0_pins>;
244 pinctrl-names = "default";
245
61 status = "okay"; 246 status = "okay";
62}; 247};
63 248
64&scif3 { 249&scif3 {
250 pinctrl-0 = <&scif3_pins>;
251 pinctrl-names = "default";
252
65 status = "okay"; 253 status = "okay";
66}; 254};
255
256&can0 {
257 pinctrl-0 = <&can0_pins>;
258 pinctrl-names = "default";
259
260 status = "okay";
261};
262
263&sdhi0 {
264 pinctrl-0 = <&sdhi0_pins>;
265 pinctrl-names = "default";
266
267 vmmc-supply = <&vcc_sdhi0>;
268 cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
269 status = "okay";
270};
271
272&i2c1 {
273 status = "okay";
274 clock-frequency = <400000>;
275
276 hdmi@39 {
277 compatible = "adi,adv7511w";
278 reg = <0x39>;
279 interrupt-parent = <&irqc>;
280 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
281
282 adi,input-depth = <8>;
283 adi,input-colorspace = "rgb";
284 adi,input-clock = "1x";
285 adi,input-style = <1>;
286 adi,input-justification = "evenly";
287
288 ports {
289 #address-cells = <1>;
290 #size-cells = <0>;
291
292 port@0 {
293 reg = <0>;
294 adv7511_in: endpoint {
295 remote-endpoint = <&du_out_rgb0>;
296 };
297 };
298
299 port@1 {
300 reg = <1>;
301 adv7511_out: endpoint {
302 remote-endpoint = <&hdmi_con>;
303 };
304 };
305 };
306 };
307};
308
309&du {
310 pinctrl-0 = <&du0_pins &du1_pins>;
311 pinctrl-names = "default";
312
313 clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
314 <&x1_clk>, <&x2_clk>;
315 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
316 status = "okay";
317
318 ports {
319 port@0 {
320 endpoint {
321 remote-endpoint = <&adv7511_in>;
322 };
323 };
324 port@1 {
325 endpoint {
326 remote-endpoint = <&adv7123_in>;
327 };
328 };
329 };
330};
diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts b/arch/arm/boot/dts/r8a7792-wheat.dts
new file mode 100644
index 000000000000..6dbb94114a93
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -0,0 +1,199 @@
1/*
2 * Device Tree Source for the Wheat board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corporation
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13#include "r8a7792.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16
17/ {
18 model = "Wheat";
19 compatible = "renesas,wheat", "renesas,r8a7792";
20
21 aliases {
22 serial0 = &scif0;
23 };
24
25 chosen {
26 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
27 stdout-path = "serial0:115200n8";
28 };
29
30 memory@40000000 {
31 device_type = "memory";
32 reg = <0 0x40000000 0 0x40000000>;
33 };
34
35 d3_3v: regulator-3v3 {
36 compatible = "regulator-fixed";
37 regulator-name = "D3.3V";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-boot-on;
41 regulator-always-on;
42 };
43
44 ethernet@18000000 {
45 compatible = "smsc,lan89218", "smsc,lan9115";
46 reg = <0 0x18000000 0 0x100>;
47 phy-mode = "mii";
48 interrupt-parent = <&irqc>;
49 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
50 smsc,irq-push-pull;
51 smsc,save-mac-address;
52 reg-io-width = <4>;
53 vddvario-supply = <&d3_3v>;
54 vdd33a-supply = <&d3_3v>;
55
56 pinctrl-0 = <&lan89218_pins>;
57 pinctrl-names = "default";
58 };
59
60 keyboard {
61 compatible = "gpio-keys";
62
63 key-a {
64 linux,code = <KEY_A>;
65 label = "SW2";
66 wakeup-source;
67 debounce-interval = <20>;
68 gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
69 };
70 key-b {
71 linux,code = <KEY_B>;
72 label = "SW3";
73 wakeup-source;
74 debounce-interval = <20>;
75 gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
76 };
77 };
78
79 vcc_sdhi0: regulator-vcc-sdhi0 {
80 compatible = "regulator-fixed";
81
82 regulator-name = "SDHI0 Vcc";
83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <3300000>;
85
86 gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
87 enable-active-high;
88 };
89};
90
91&extal_clk {
92 clock-frequency = <20000000>;
93};
94
95&pfc {
96 scif0_pins: scif0 {
97 groups = "scif0_data";
98 function = "scif0";
99 };
100
101 lan89218_pins: lan89218 {
102 intc {
103 groups = "intc_irq0";
104 function = "intc";
105 };
106 lbsc {
107 groups = "lbsc_ex_cs0";
108 function = "lbsc";
109 };
110 };
111
112 can0_pins: can0 {
113 groups = "can0_data";
114 function = "can0";
115 };
116
117 can1_pins: can1 {
118 groups = "can1_data";
119 function = "can1";
120 };
121
122 sdhi0_pins: sdhi0 {
123 groups = "sdhi0_data4", "sdhi0_ctrl";
124 function = "sdhi0";
125 };
126
127 qspi_pins: qspi {
128 groups = "qspi_ctrl", "qspi_data4";
129 function = "qspi";
130 };
131};
132
133&scif0 {
134 pinctrl-0 = <&scif0_pins>;
135 pinctrl-names = "default";
136
137 status = "okay";
138};
139
140&can0 {
141 pinctrl-0 = <&can0_pins>;
142 pinctrl-names = "default";
143
144 status = "okay";
145};
146
147&can1 {
148 pinctrl-0 = <&can1_pins>;
149 pinctrl-names = "default";
150
151 status = "okay";
152};
153
154&sdhi0 {
155 pinctrl-0 = <&sdhi0_pins>;
156 pinctrl-names = "default";
157
158 vmmc-supply = <&vcc_sdhi0>;
159 cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
160 status = "okay";
161};
162
163&qspi {
164 pinctrl-0 = <&qspi_pins>;
165 pinctrl-names = "default";
166 status = "okay";
167
168 flash@0 {
169 compatible = "spansion,s25fl512s", "jedec,spi-nor";
170 reg = <0>;
171 spi-max-frequency = <30000000>;
172 spi-tx-bus-width = <4>;
173 spi-rx-bus-width = <4>;
174 spi-cpol;
175 spi-cpha;
176 m25p,fast-read;
177
178 partitions {
179 compatible = "fixed-partitions";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 partition@0 {
184 label = "loader";
185 reg = <0x00000000 0x00040000>;
186 read-only;
187 };
188 partition@40000 {
189 label = "user";
190 reg = <0x00040000 0x00400000>;
191 read-only;
192 };
193 partition@440000 {
194 label = "flash";
195 reg = <0x00440000 0x03bc0000>;
196 };
197 };
198 };
199};
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 3fd61d7ab906..713141d38b3e 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -18,6 +18,22 @@
18 #address-cells = <2>; 18 #address-cells = <2>;
19 #size-cells = <2>; 19 #size-cells = <2>;
20 20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 i2c3 = &i2c3;
26 i2c4 = &i2c4;
27 i2c5 = &i2c5;
28 spi0 = &qspi;
29 vin0 = &vin0;
30 vin1 = &vin1;
31 vin2 = &vin2;
32 vin3 = &vin3;
33 vin4 = &vin4;
34 vin5 = &vin5;
35 };
36
21 cpus { 37 cpus {
22 #address-cells = <1>; 38 #address-cells = <1>;
23 #size-cells = <0>; 39 #size-cells = <0>;
@@ -108,6 +124,179 @@
108 #power-domain-cells = <1>; 124 #power-domain-cells = <1>;
109 }; 125 };
110 126
127 pfc: pin-controller@e6060000 {
128 compatible = "renesas,pfc-r8a7792";
129 reg = <0 0xe6060000 0 0x144>;
130 };
131
132 gpio0: gpio@e6050000 {
133 compatible = "renesas,gpio-r8a7792",
134 "renesas,gpio-rcar";
135 reg = <0 0xe6050000 0 0x50>;
136 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
137 #gpio-cells = <2>;
138 gpio-controller;
139 gpio-ranges = <&pfc 0 0 29>;
140 #interrupt-cells = <2>;
141 interrupt-controller;
142 clocks = <&mstp9_clks R8A7792_CLK_GPIO0>;
143 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
144 };
145
146 gpio1: gpio@e6051000 {
147 compatible = "renesas,gpio-r8a7792",
148 "renesas,gpio-rcar";
149 reg = <0 0xe6051000 0 0x50>;
150 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
151 #gpio-cells = <2>;
152 gpio-controller;
153 gpio-ranges = <&pfc 0 32 23>;
154 #interrupt-cells = <2>;
155 interrupt-controller;
156 clocks = <&mstp9_clks R8A7792_CLK_GPIO1>;
157 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
158 };
159
160 gpio2: gpio@e6052000 {
161 compatible = "renesas,gpio-r8a7792",
162 "renesas,gpio-rcar";
163 reg = <0 0xe6052000 0 0x50>;
164 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
165 #gpio-cells = <2>;
166 gpio-controller;
167 gpio-ranges = <&pfc 0 64 32>;
168 #interrupt-cells = <2>;
169 interrupt-controller;
170 clocks = <&mstp9_clks R8A7792_CLK_GPIO2>;
171 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
172 };
173
174 gpio3: gpio@e6053000 {
175 compatible = "renesas,gpio-r8a7792",
176 "renesas,gpio-rcar";
177 reg = <0 0xe6053000 0 0x50>;
178 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
179 #gpio-cells = <2>;
180 gpio-controller;
181 gpio-ranges = <&pfc 0 96 28>;
182 #interrupt-cells = <2>;
183 interrupt-controller;
184 clocks = <&mstp9_clks R8A7792_CLK_GPIO3>;
185 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
186 };
187
188 gpio4: gpio@e6054000 {
189 compatible = "renesas,gpio-r8a7792",
190 "renesas,gpio-rcar";
191 reg = <0 0xe6054000 0 0x50>;
192 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
193 #gpio-cells = <2>;
194 gpio-controller;
195 gpio-ranges = <&pfc 0 128 17>;
196 #interrupt-cells = <2>;
197 interrupt-controller;
198 clocks = <&mstp9_clks R8A7792_CLK_GPIO4>;
199 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
200 };
201
202 gpio5: gpio@e6055000 {
203 compatible = "renesas,gpio-r8a7792",
204 "renesas,gpio-rcar";
205 reg = <0 0xe6055000 0 0x50>;
206 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
207 #gpio-cells = <2>;
208 gpio-controller;
209 gpio-ranges = <&pfc 0 160 17>;
210 #interrupt-cells = <2>;
211 interrupt-controller;
212 clocks = <&mstp9_clks R8A7792_CLK_GPIO5>;
213 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
214 };
215
216 gpio6: gpio@e6055100 {
217 compatible = "renesas,gpio-r8a7792",
218 "renesas,gpio-rcar";
219 reg = <0 0xe6055100 0 0x50>;
220 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
221 #gpio-cells = <2>;
222 gpio-controller;
223 gpio-ranges = <&pfc 0 192 17>;
224 #interrupt-cells = <2>;
225 interrupt-controller;
226 clocks = <&mstp9_clks R8A7792_CLK_GPIO6>;
227 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
228 };
229
230 gpio7: gpio@e6055200 {
231 compatible = "renesas,gpio-r8a7792",
232 "renesas,gpio-rcar";
233 reg = <0 0xe6055200 0 0x50>;
234 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>;
236 gpio-controller;
237 gpio-ranges = <&pfc 0 224 17>;
238 #interrupt-cells = <2>;
239 interrupt-controller;
240 clocks = <&mstp9_clks R8A7792_CLK_GPIO7>;
241 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
242 };
243
244 gpio8: gpio@e6055300 {
245 compatible = "renesas,gpio-r8a7792",
246 "renesas,gpio-rcar";
247 reg = <0 0xe6055300 0 0x50>;
248 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
249 #gpio-cells = <2>;
250 gpio-controller;
251 gpio-ranges = <&pfc 0 256 17>;
252 #interrupt-cells = <2>;
253 interrupt-controller;
254 clocks = <&mstp9_clks R8A7792_CLK_GPIO8>;
255 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
256 };
257
258 gpio9: gpio@e6055400 {
259 compatible = "renesas,gpio-r8a7792",
260 "renesas,gpio-rcar";
261 reg = <0 0xe6055400 0 0x50>;
262 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
263 #gpio-cells = <2>;
264 gpio-controller;
265 gpio-ranges = <&pfc 0 288 17>;
266 #interrupt-cells = <2>;
267 interrupt-controller;
268 clocks = <&mstp9_clks R8A7792_CLK_GPIO9>;
269 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
270 };
271
272 gpio10: gpio@e6055500 {
273 compatible = "renesas,gpio-r8a7792",
274 "renesas,gpio-rcar";
275 reg = <0 0xe6055500 0 0x50>;
276 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
277 #gpio-cells = <2>;
278 gpio-controller;
279 gpio-ranges = <&pfc 0 320 32>;
280 #interrupt-cells = <2>;
281 interrupt-controller;
282 clocks = <&mstp9_clks R8A7792_CLK_GPIO10>;
283 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
284 };
285
286 gpio11: gpio@e6055600 {
287 compatible = "renesas,gpio-r8a7792",
288 "renesas,gpio-rcar";
289 reg = <0 0xe6055600 0 0x50>;
290 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
291 #gpio-cells = <2>;
292 gpio-controller;
293 gpio-ranges = <&pfc 0 352 30>;
294 #interrupt-cells = <2>;
295 interrupt-controller;
296 clocks = <&mstp9_clks R8A7792_CLK_GPIO11>;
297 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
298 };
299
111 dmac0: dma-controller@e6700000 { 300 dmac0: dma-controller@e6700000 {
112 compatible = "renesas,dmac-r8a7792", 301 compatible = "renesas,dmac-r8a7792",
113 "renesas,rcar-dmac"; 302 "renesas,rcar-dmac";
@@ -262,6 +451,18 @@
262 status = "disabled"; 451 status = "disabled";
263 }; 452 };
264 453
454 sdhi0: sd@ee100000 {
455 compatible = "renesas,sdhi-r8a7792";
456 reg = <0 0xee100000 0 0x328>;
457 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
458 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
459 <&dmac1 0xcd>, <&dmac1 0xce>;
460 dma-names = "tx", "rx", "tx", "rx";
461 clocks = <&mstp3_clks R8A7792_CLK_SDHI0>;
462 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
463 status = "disabled";
464 };
465
265 jpu: jpeg-codec@fe980000 { 466 jpu: jpeg-codec@fe980000 {
266 compatible = "renesas,jpu-r8a7792", 467 compatible = "renesas,jpu-r8a7792",
267 "renesas,rcar-gen2-jpu"; 468 "renesas,rcar-gen2-jpu";
@@ -271,6 +472,242 @@
271 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 472 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
272 }; 473 };
273 474
475 avb: ethernet@e6800000 {
476 compatible = "renesas,etheravb-r8a7792",
477 "renesas,etheravb-rcar-gen2";
478 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
479 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
480 clocks = <&mstp8_clks R8A7792_CLK_ETHERAVB>;
481 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
482 #address-cells = <1>;
483 #size-cells = <0>;
484 status = "disabled";
485 };
486
487 /* I2C doesn't need pinmux */
488 i2c0: i2c@e6508000 {
489 compatible = "renesas,i2c-r8a7792";
490 reg = <0 0xe6508000 0 0x40>;
491 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
492 clocks = <&mstp9_clks R8A7792_CLK_I2C0>;
493 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
494 i2c-scl-internal-delay-ns = <6>;
495 #address-cells = <1>;
496 #size-cells = <0>;
497 status = "disabled";
498 };
499
500 i2c1: i2c@e6518000 {
501 compatible = "renesas,i2c-r8a7792";
502 reg = <0 0xe6518000 0 0x40>;
503 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&mstp9_clks R8A7792_CLK_I2C1>;
505 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
506 i2c-scl-internal-delay-ns = <6>;
507 #address-cells = <1>;
508 #size-cells = <0>;
509 status = "disabled";
510 };
511
512 i2c2: i2c@e6530000 {
513 compatible = "renesas,i2c-r8a7792";
514 reg = <0 0xe6530000 0 0x40>;
515 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
516 clocks = <&mstp9_clks R8A7792_CLK_I2C2>;
517 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
518 i2c-scl-internal-delay-ns = <6>;
519 #address-cells = <1>;
520 #size-cells = <0>;
521 status = "disabled";
522 };
523
524 i2c3: i2c@e6540000 {
525 compatible = "renesas,i2c-r8a7792";
526 reg = <0 0xe6540000 0 0x40>;
527 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
528 clocks = <&mstp9_clks R8A7792_CLK_I2C3>;
529 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
530 i2c-scl-internal-delay-ns = <6>;
531 #address-cells = <1>;
532 #size-cells = <0>;
533 status = "disabled";
534 };
535
536 i2c4: i2c@e6520000 {
537 compatible = "renesas,i2c-r8a7792";
538 reg = <0 0xe6520000 0 0x40>;
539 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
540 clocks = <&mstp9_clks R8A7792_CLK_I2C4>;
541 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
542 i2c-scl-internal-delay-ns = <6>;
543 #address-cells = <1>;
544 #size-cells = <0>;
545 status = "disabled";
546 };
547
548 i2c5: i2c@e6528000 {
549 compatible = "renesas,i2c-r8a7792";
550 reg = <0 0xe6528000 0 0x40>;
551 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&mstp9_clks R8A7792_CLK_I2C5>;
553 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
554 i2c-scl-internal-delay-ns = <110>;
555 #address-cells = <1>;
556 #size-cells = <0>;
557 status = "disabled";
558 };
559
560 qspi: spi@e6b10000 {
561 compatible = "renesas,qspi-r8a7792", "renesas,qspi";
562 reg = <0 0xe6b10000 0 0x2c>;
563 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
564 clocks = <&mstp9_clks R8A7792_CLK_QSPI_MOD>;
565 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
566 <&dmac1 0x17>, <&dmac1 0x18>;
567 dma-names = "tx", "rx", "tx", "rx";
568 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
569 num-cs = <1>;
570 #address-cells = <1>;
571 #size-cells = <0>;
572 status = "disabled";
573 };
574
575 du: display@feb00000 {
576 compatible = "renesas,du-r8a7792";
577 reg = <0 0xfeb00000 0 0x40000>;
578 reg-names = "du";
579 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
580 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&mstp7_clks R8A7792_CLK_DU0>,
582 <&mstp7_clks R8A7792_CLK_DU1>;
583 clock-names = "du.0", "du.1";
584 status = "disabled";
585
586 ports {
587 #address-cells = <1>;
588 #size-cells = <0>;
589
590 port@0 {
591 reg = <0>;
592 du_out_rgb0: endpoint {
593 };
594 };
595 port@1 {
596 reg = <1>;
597 du_out_rgb1: endpoint {
598 };
599 };
600 };
601 };
602
603 can0: can@e6e80000 {
604 compatible = "renesas,can-r8a7792",
605 "renesas,rcar-gen2-can";
606 reg = <0 0xe6e80000 0 0x1000>;
607 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
608 clocks = <&mstp9_clks R8A7792_CLK_CAN0>,
609 <&rcan_clk>, <&can_clk>;
610 clock-names = "clkp1", "clkp2", "can_clk";
611 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
612 status = "disabled";
613 };
614
615 can1: can@e6e88000 {
616 compatible = "renesas,can-r8a7792",
617 "renesas,rcar-gen2-can";
618 reg = <0 0xe6e88000 0 0x1000>;
619 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
620 clocks = <&mstp9_clks R8A7792_CLK_CAN1>,
621 <&rcan_clk>, <&can_clk>;
622 clock-names = "clkp1", "clkp2", "can_clk";
623 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
624 status = "disabled";
625 };
626
627 vin0: video@e6ef0000 {
628 compatible = "renesas,vin-r8a7792",
629 "renesas,rcar-gen2-vin";
630 reg = <0 0xe6ef0000 0 0x1000>;
631 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
632 clocks = <&mstp8_clks R8A7792_CLK_VIN0>;
633 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
634 status = "disabled";
635 };
636
637 vin1: video@e6ef1000 {
638 compatible = "renesas,vin-r8a7792",
639 "renesas,rcar-gen2-vin";
640 reg = <0 0xe6ef1000 0 0x1000>;
641 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
642 clocks = <&mstp8_clks R8A7792_CLK_VIN1>;
643 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
644 status = "disabled";
645 };
646
647 vin2: video@e6ef2000 {
648 compatible = "renesas,vin-r8a7792",
649 "renesas,rcar-gen2-vin";
650 reg = <0 0xe6ef2000 0 0x1000>;
651 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
652 clocks = <&mstp8_clks R8A7792_CLK_VIN2>;
653 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
654 status = "disabled";
655 };
656
657 vin3: video@e6ef3000 {
658 compatible = "renesas,vin-r8a7792",
659 "renesas,rcar-gen2-vin";
660 reg = <0 0xe6ef3000 0 0x1000>;
661 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
662 clocks = <&mstp8_clks R8A7792_CLK_VIN3>;
663 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
664 status = "disabled";
665 };
666
667 vin4: video@e6ef4000 {
668 compatible = "renesas,vin-r8a7792",
669 "renesas,rcar-gen2-vin";
670 reg = <0 0xe6ef4000 0 0x1000>;
671 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
672 clocks = <&mstp8_clks R8A7792_CLK_VIN4>;
673 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
674 status = "disabled";
675 };
676
677 vin5: video@e6ef5000 {
678 compatible = "renesas,vin-r8a7792",
679 "renesas,rcar-gen2-vin";
680 reg = <0 0xe6ef5000 0 0x1000>;
681 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
682 clocks = <&mstp8_clks R8A7792_CLK_VIN5>;
683 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
684 status = "disabled";
685 };
686
687 vsp1@fe928000 {
688 compatible = "renesas,vsp1";
689 reg = <0 0xfe928000 0 0x8000>;
690 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&mstp1_clks R8A7792_CLK_VSP1_SY>;
692 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
693 };
694
695 vsp1@fe930000 {
696 compatible = "renesas,vsp1";
697 reg = <0 0xfe930000 0 0x8000>;
698 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
699 clocks = <&mstp1_clks R8A7792_CLK_VSP1DU0>;
700 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
701 };
702
703 vsp1@fe938000 {
704 compatible = "renesas,vsp1";
705 reg = <0 0xfe938000 0 0x8000>;
706 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
707 clocks = <&mstp1_clks R8A7792_CLK_VSP1DU1>;
708 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
709 };
710
274 /* Special CPG clocks */ 711 /* Special CPG clocks */
275 cpg_clocks: cpg_clocks@e6150000 { 712 cpg_clocks: cpg_clocks@e6150000 {
276 compatible = "renesas,r8a7792-cpg-clocks", 713 compatible = "renesas,r8a7792-cpg-clocks",
@@ -291,6 +728,13 @@
291 clock-div = <2>; 728 clock-div = <2>;
292 clock-mult = <1>; 729 clock-mult = <1>;
293 }; 730 };
731 zx_clk: zx {
732 compatible = "fixed-factor-clock";
733 clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
734 #clock-cells = <0>;
735 clock-div = <3>;
736 clock-mult = <1>;
737 };
294 zs_clk: zs { 738 zs_clk: zs {
295 compatible = "fixed-factor-clock"; 739 compatible = "fixed-factor-clock";
296 clocks = <&cpg_clocks R8A7792_CLK_PLL1>; 740 clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
@@ -298,6 +742,13 @@
298 clock-div = <6>; 742 clock-div = <6>;
299 clock-mult = <1>; 743 clock-mult = <1>;
300 }; 744 };
745 hp_clk: hp {
746 compatible = "fixed-factor-clock";
747 clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
748 #clock-cells = <0>;
749 clock-div = <12>;
750 clock-mult = <1>;
751 };
301 p_clk: p { 752 p_clk: p {
302 compatible = "fixed-factor-clock"; 753 compatible = "fixed-factor-clock";
303 clocks = <&cpg_clocks R8A7792_CLK_PLL1>; 754 clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
@@ -319,16 +770,42 @@
319 clock-div = <8>; 770 clock-div = <8>;
320 clock-mult = <1>; 771 clock-mult = <1>;
321 }; 772 };
773 sd_clk: sd {
774 compatible = "fixed-factor-clock";
775 clocks = <&pll1_div2_clk>;
776 #clock-cells = <0>;
777 clock-div = <8>;
778 clock-mult = <1>;
779 };
780 rcan_clk: rcan {
781 compatible = "fixed-factor-clock";
782 clocks = <&pll1_div2_clk>;
783 #clock-cells = <0>;
784 clock-div = <49>;
785 clock-mult = <1>;
786 };
787 zg_clk: zg {
788 compatible = "fixed-factor-clock";
789 clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
790 #clock-cells = <0>;
791 clock-div = <5>;
792 clock-mult = <1>;
793 };
322 794
323 /* Gate clocks */ 795 /* Gate clocks */
324 mstp1_clks: mstp1_clks@e6150134 { 796 mstp1_clks: mstp1_clks@e6150134 {
325 compatible = "renesas,r8a7792-mstp-clocks", 797 compatible = "renesas,r8a7792-mstp-clocks",
326 "renesas,cpg-mstp-clocks"; 798 "renesas,cpg-mstp-clocks";
327 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; 799 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
328 clocks = <&m2_clk>; 800 clocks = <&m2_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
329 #clock-cells = <1>; 801 #clock-cells = <1>;
330 clock-indices = <R8A7792_CLK_JPU>; 802 clock-indices = <
331 clock-output-names = "jpu"; 803 R8A7792_CLK_JPU
804 R8A7792_CLK_VSP1DU1 R8A7792_CLK_VSP1DU0
805 R8A7792_CLK_VSP1_SY
806 >;
807 clock-output-names = "jpu", "vsp1du1", "vsp1du0",
808 "vsp1-sy";
332 }; 809 };
333 mstp2_clks: mstp2_clks@e6150138 { 810 mstp2_clks: mstp2_clks@e6150138 {
334 compatible = "renesas,r8a7792-mstp-clocks", 811 compatible = "renesas,r8a7792-mstp-clocks",
@@ -341,6 +818,15 @@
341 >; 818 >;
342 clock-output-names = "sys-dmac1", "sys-dmac0"; 819 clock-output-names = "sys-dmac1", "sys-dmac0";
343 }; 820 };
821 mstp3_clks: mstp3_clks@e615013c {
822 compatible = "renesas,r8a7792-mstp-clocks",
823 "renesas,cpg-mstp-clocks";
824 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
825 clocks = <&sd_clk>;
826 #clock-cells = <1>;
827 renesas,clock-indices = <R8A7792_CLK_SDHI0>;
828 clock-output-names = "sdhi0";
829 };
344 mstp4_clks: mstp4_clks@e6150140 { 830 mstp4_clks: mstp4_clks@e6150140 {
345 compatible = "renesas,r8a7792-mstp-clocks", 831 compatible = "renesas,r8a7792-mstp-clocks",
346 "renesas,cpg-mstp-clocks"; 832 "renesas,cpg-mstp-clocks";
@@ -355,15 +841,65 @@
355 "renesas,cpg-mstp-clocks"; 841 "renesas,cpg-mstp-clocks";
356 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; 842 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
357 clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, 843 clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>,
358 <&p_clk>, <&p_clk>; 844 <&p_clk>, <&p_clk>, <&zx_clk>, <&zx_clk>;
359 #clock-cells = <1>; 845 #clock-cells = <1>;
360 clock-indices = < 846 clock-indices = <
361 R8A7792_CLK_HSCIF1 R8A7792_CLK_HSCIF0 847 R8A7792_CLK_HSCIF1 R8A7792_CLK_HSCIF0
362 R8A7792_CLK_SCIF3 R8A7792_CLK_SCIF2 848 R8A7792_CLK_SCIF3 R8A7792_CLK_SCIF2
363 R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0 849 R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0
850 R8A7792_CLK_DU1 R8A7792_CLK_DU0
364 >; 851 >;
365 clock-output-names = "hscif1", "hscif0", "scif3", 852 clock-output-names = "hscif1", "hscif0", "scif3",
366 "scif2", "scif1", "scif0"; 853 "scif2", "scif1", "scif0",
854 "du1", "du0";
855 };
856 mstp8_clks: mstp8_clks@e6150990 {
857 compatible = "renesas,r8a7792-mstp-clocks",
858 "renesas,cpg-mstp-clocks";
859 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
860 clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
861 <&zg_clk>, <&zg_clk>, <&hp_clk>;
862 #clock-cells = <1>;
863 clock-indices = <
864 R8A7792_CLK_VIN5 R8A7792_CLK_VIN4
865 R8A7792_CLK_VIN3 R8A7792_CLK_VIN2
866 R8A7792_CLK_VIN1 R8A7792_CLK_VIN0
867 R8A7792_CLK_ETHERAVB
868 >;
869 clock-output-names = "vin5", "vin4", "vin3", "vin2",
870 "vin1", "vin0", "etheravb";
871 };
872 mstp9_clks: mstp9_clks@e6150994 {
873 compatible = "renesas,r8a7792-mstp-clocks",
874 "renesas,cpg-mstp-clocks";
875 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
876 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
877 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
878 <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>,
879 <&cpg_clocks R8A7792_CLK_QSPI>,
880 <&cp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>,
881 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
882 #clock-cells = <1>;
883 clock-indices = <
884 R8A7792_CLK_GPIO7 R8A7792_CLK_GPIO6
885 R8A7792_CLK_GPIO5 R8A7792_CLK_GPIO4
886 R8A7792_CLK_GPIO3 R8A7792_CLK_GPIO2
887 R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0
888 R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10
889 R8A7792_CLK_CAN1 R8A7792_CLK_CAN0
890 R8A7792_CLK_QSPI_MOD
891 R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8
892 R8A7792_CLK_I2C5 R8A7792_CLK_I2C4
893 R8A7792_CLK_I2C3 R8A7792_CLK_I2C2
894 R8A7792_CLK_I2C1 R8A7792_CLK_I2C0
895 >;
896 clock-output-names =
897 "gpio7", "gpio6", "gpio5", "gpio4",
898 "gpio3", "gpio2", "gpio1", "gpio0",
899 "gpio11", "gpio10", "can1", "can0",
900 "qspi_mod", "gpio9", "gpio8",
901 "i2c5", "i2c4", "i2c3", "i2c2",
902 "i2c1", "i2c0";
367 }; 903 };
368 }; 904 };
369 905
@@ -382,4 +918,12 @@
382 /* This value must be overridden by the board. */ 918 /* This value must be overridden by the board. */
383 clock-frequency = <0>; 919 clock-frequency = <0>;
384 }; 920 };
921
922 /* External CAN clock */
923 can_clk: can {
924 compatible = "fixed-clock";
925 #clock-cells = <0>;
926 /* This value must be overridden by the board. */
927 clock-frequency = <0>;
928 };
385}; 929};
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index 1ad37d431a2a..8d1b35afaf82 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -10,6 +10,7 @@
10 10
11/dts-v1/; 11/dts-v1/;
12#include "r8a7794.dtsi" 12#include "r8a7794.dtsi"
13#include <dt-bindings/gpio/gpio.h>
13 14
14/ { 15/ {
15 model = "Alt"; 16 model = "Alt";
@@ -29,6 +30,63 @@
29 reg = <0 0x40000000 0 0x40000000>; 30 reg = <0 0x40000000 0 0x40000000>;
30 }; 31 };
31 32
33 d3_3v: regulator-d3-3v {
34 compatible = "regulator-fixed";
35 regulator-name = "D3.3V";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 regulator-boot-on;
39 regulator-always-on;
40 };
41
42 vcc_sdhi0: regulator-vcc-sdhi0 {
43 compatible = "regulator-fixed";
44
45 regulator-name = "SDHI0 Vcc";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
48
49 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
50 enable-active-high;
51 };
52
53 vccq_sdhi0: regulator-vccq-sdhi0 {
54 compatible = "regulator-gpio";
55
56 regulator-name = "SDHI0 VccQ";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <3300000>;
59
60 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
61 gpios-states = <1>;
62 states = <3300000 1
63 1800000 0>;
64 };
65
66 vcc_sdhi1: regulator-vcc-sdhi1 {
67 compatible = "regulator-fixed";
68
69 regulator-name = "SDHI1 Vcc";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72
73 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
74 enable-active-high;
75 };
76
77 vccq_sdhi1: regulator-vccq-sdhi1 {
78 compatible = "regulator-gpio";
79
80 regulator-name = "SDHI1 VccQ";
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <3300000>;
83
84 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
85 gpios-states = <1>;
86 states = <3300000 1
87 1800000 0>;
88 };
89
32 lbsc { 90 lbsc {
33 #address-cells = <1>; 91 #address-cells = <1>;
34 #size-cells = <1>; 92 #size-cells = <1>;
@@ -140,6 +198,21 @@
140 groups = "vin0_data8", "vin0_clk"; 198 groups = "vin0_data8", "vin0_clk";
141 function = "vin0"; 199 function = "vin0";
142 }; 200 };
201
202 mmcif0_pins: mmcif0 {
203 groups = "mmc_data8", "mmc_ctrl";
204 function = "mmc";
205 };
206
207 sdhi0_pins: sd0 {
208 groups = "sdhi0_data4", "sdhi0_ctrl";
209 function = "sdhi0";
210 };
211
212 sdhi1_pins: sd1 {
213 groups = "sdhi1_data4", "sdhi1_ctrl";
214 function = "sdhi1";
215 };
143}; 216};
144 217
145&cmt0 { 218&cmt0 {
@@ -169,6 +242,39 @@
169 }; 242 };
170}; 243};
171 244
245&mmcif0 {
246 pinctrl-0 = <&mmcif0_pins>;
247 pinctrl-names = "default";
248
249 vmmc-supply = <&d3_3v>;
250 vqmmc-supply = <&d3_3v>;
251 bus-width = <8>;
252 non-removable;
253 status = "okay";
254};
255
256&sdhi0 {
257 pinctrl-0 = <&sdhi0_pins>;
258 pinctrl-names = "default";
259
260 vmmc-supply = <&vcc_sdhi0>;
261 vqmmc-supply = <&vccq_sdhi0>;
262 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
263 wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
264 status = "okay";
265};
266
267&sdhi1 {
268 pinctrl-0 = <&sdhi1_pins>;
269 pinctrl-names = "default";
270
271 vmmc-supply = <&vcc_sdhi1>;
272 vqmmc-supply = <&vccq_sdhi1>;
273 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
274 wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
275 status = "okay";
276};
277
172&i2c1 { 278&i2c1 {
173 pinctrl-0 = <&i2c1_pins>; 279 pinctrl-0 = <&i2c1_pins>;
174 pinctrl-names = "default"; 280 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index cf24f45fff22..cf880ac06f4b 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -10,6 +10,17 @@
10 * kind, whether express or implied. 10 * kind, whether express or implied.
11 */ 11 */
12 12
13/*
14 * SSI-AK4643
15 *
16 * SW1: 2-1: AK4643
17 * 2-3: ADV7511
18 *
19 * This command is required before playback/capture:
20 *
21 * amixer set "LINEOUT Mixer DACL" on
22 */
23
13/dts-v1/; 24/dts-v1/;
14#include "r8a7794.dtsi" 25#include "r8a7794.dtsi"
15#include <dt-bindings/gpio/gpio.h> 26#include <dt-bindings/gpio/gpio.h>
@@ -119,6 +130,29 @@
119 #clock-cells = <0>; 130 #clock-cells = <0>;
120 clock-frequency = <74250000>; 131 clock-frequency = <74250000>;
121 }; 132 };
133
134 x9_clk: audio_clock {
135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <12288000>;
138 };
139
140 sound {
141 compatible = "simple-audio-card";
142
143 simple-audio-card,format = "left_j";
144 simple-audio-card,bitclock-master = <&soundcodec>;
145 simple-audio-card,frame-master = <&soundcodec>;
146
147 simple-audio-card,cpu {
148 sound-dai = <&rcar_sound>;
149 };
150
151 soundcodec: simple-audio-card,codec {
152 sound-dai = <&ak4643>;
153 clocks = <&x9_clk>;
154 };
155 };
122}; 156};
123 157
124&extal_clk { 158&extal_clk {
@@ -193,6 +227,16 @@
193 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out"; 227 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
194 function = "du1"; 228 function = "du1";
195 }; 229 };
230
231 ssi_pins: sound {
232 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
233 function = "ssi";
234 };
235
236 audio_clk_pins: audio_clk {
237 groups = "audio_clkc";
238 function = "audio_clk";
239 };
196}; 240};
197 241
198&scif2 { 242&scif2 {
@@ -230,6 +274,12 @@
230 status = "okay"; 274 status = "okay";
231 clock-frequency = <400000>; 275 clock-frequency = <400000>;
232 276
277 ak4643: codec@12 {
278 compatible = "asahi-kasei,ak4643";
279 #sound-dai-cells = <0>;
280 reg = <0x12>;
281 };
282
233 composite-in@20 { 283 composite-in@20 {
234 compatible = "adi,adv7180"; 284 compatible = "adi,adv7180";
235 reg = <0x20>; 285 reg = <0x20>;
@@ -392,3 +442,23 @@
392 }; 442 };
393 }; 443 };
394}; 444};
445
446&rcar_sound {
447 pinctrl-0 = <&ssi_pins &audio_clk_pins>;
448 pinctrl-names = "default";
449 status = "okay";
450
451 /* Single DAI */
452 #sound-dai-cells = <0>;
453
454 rcar_sound,dai {
455 dai0 {
456 playback = <&ssi0>;
457 capture = <&ssi1>;
458 };
459 };
460};
461
462&ssi1 {
463 shared-pin;
464};
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 685f986cf962..9365580a194f 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -296,6 +296,34 @@
296 dma-channels = <15>; 296 dma-channels = <15>;
297 }; 297 };
298 298
299 audma0: dma-controller@ec700000 {
300 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
301 reg = <0 0xec700000 0 0x10000>;
302 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
304 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
312 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
313 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
316 interrupt-names = "error",
317 "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
318 "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
319 "ch12";
320 clocks = <&mstp5_clks R8A7794_CLK_AUDIO_DMAC0>;
321 clock-names = "fck";
322 power-domains = <&cpg_clocks>;
323 #dma-cells = <1>;
324 dma-channels = <13>;
325 };
326
299 scifa0: serial@e6c40000 { 327 scifa0: serial@e6c40000 {
300 compatible = "renesas,scifa-r8a7794", 328 compatible = "renesas,scifa-r8a7794",
301 "renesas,rcar-gen2-scifa", "renesas,scifa"; 329 "renesas,rcar-gen2-scifa", "renesas,scifa";
@@ -697,7 +725,7 @@
697 725
698 sdhi0: sd@ee100000 { 726 sdhi0: sd@ee100000 {
699 compatible = "renesas,sdhi-r8a7794"; 727 compatible = "renesas,sdhi-r8a7794";
700 reg = <0 0xee100000 0 0x200>; 728 reg = <0 0xee100000 0 0x328>;
701 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 729 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&mstp3_clks R8A7794_CLK_SDHI0>; 730 clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
703 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 731 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
@@ -866,6 +894,22 @@
866 }; 894 };
867 }; 895 };
868 896
897 vsp1@fe928000 {
898 compatible = "renesas,vsp1";
899 reg = <0 0xfe928000 0 0x8000>;
900 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
901 clocks = <&mstp1_clks R8A7794_CLK_VSP1_S>;
902 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
903 };
904
905 vsp1@fe930000 {
906 compatible = "renesas,vsp1";
907 reg = <0 0xfe930000 0 0x8000>;
908 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
909 clocks = <&mstp1_clks R8A7794_CLK_VSP1_DU0>;
910 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
911 };
912
869 du: display@feb00000 { 913 du: display@feb00000 {
870 compatible = "renesas,du-r8a7794"; 914 compatible = "renesas,du-r8a7794";
871 reg = <0 0xfeb00000 0 0x40000>; 915 reg = <0 0xfeb00000 0 0x40000>;
@@ -952,6 +996,27 @@
952 clock-frequency = <0>; 996 clock-frequency = <0>;
953 }; 997 };
954 998
999 /*
1000 * The external audio clocks are configured as 0 Hz fixed
1001 * frequency clocks by default. Boards that provide audio
1002 * clocks should override them.
1003 */
1004 audio_clka: audio_clka {
1005 compatible = "fixed-clock";
1006 #clock-cells = <0>;
1007 clock-frequency = <0>;
1008 };
1009 audio_clkb: audio_clkb {
1010 compatible = "fixed-clock";
1011 #clock-cells = <0>;
1012 clock-frequency = <0>;
1013 };
1014 audio_clkc: audio_clkc {
1015 compatible = "fixed-clock";
1016 #clock-cells = <0>;
1017 clock-frequency = <0>;
1018 };
1019
955 /* Special CPG clocks */ 1020 /* Special CPG clocks */
956 cpg_clocks: cpg_clocks@e6150000 { 1021 cpg_clocks: cpg_clocks@e6150000 {
957 compatible = "renesas,r8a7794-cpg-clocks", 1022 compatible = "renesas,r8a7794-cpg-clocks",
@@ -1183,6 +1248,15 @@
1183 clock-indices = <R8A7794_CLK_IRQC>; 1248 clock-indices = <R8A7794_CLK_IRQC>;
1184 clock-output-names = "irqc"; 1249 clock-output-names = "irqc";
1185 }; 1250 };
1251 mstp5_clks: mstp5_clks@e6150144 {
1252 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1253 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1254 clocks = <&hp_clk>, <&p_clk>;
1255 #clock-cells = <1>;
1256 clock-indices = <R8A7794_CLK_AUDIO_DMAC0
1257 R8A7794_CLK_PWM>;
1258 clock-output-names = "audmac0", "pwm";
1259 };
1186 mstp7_clks: mstp7_clks@e615014c { 1260 mstp7_clks: mstp7_clks@e615014c {
1187 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 1261 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1188 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; 1262 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
@@ -1237,6 +1311,58 @@
1237 "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod", 1311 "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod",
1238 "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; 1312 "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
1239 }; 1313 };
1314 mstp10_clks: mstp10_clks@e6150998 {
1315 compatible = "renesas,r8a7794-mstp-clocks",
1316 "renesas,cpg-mstp-clocks";
1317 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1318 clocks = <&p_clk>,
1319 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1320 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1321 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1322 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1323 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1324 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1325 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1326 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1327 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1328 <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1329 <&p_clk>,
1330 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1331 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1332 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1333 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1334 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1335 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1336 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1337 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1338 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
1339 <&mstp10_clks R8A7794_CLK_SCU_ALL>;
1340 #clock-cells = <1>;
1341 clock-indices = <R8A7794_CLK_SSI_ALL
1342 R8A7794_CLK_SSI9 R8A7794_CLK_SSI8
1343 R8A7794_CLK_SSI7 R8A7794_CLK_SSI6
1344 R8A7794_CLK_SSI5 R8A7794_CLK_SSI4
1345 R8A7794_CLK_SSI3 R8A7794_CLK_SSI2
1346 R8A7794_CLK_SSI1 R8A7794_CLK_SSI0
1347 R8A7794_CLK_SCU_ALL
1348 R8A7794_CLK_SCU_DVC1
1349 R8A7794_CLK_SCU_DVC0
1350 R8A7794_CLK_SCU_CTU1_MIX1
1351 R8A7794_CLK_SCU_CTU0_MIX0
1352 R8A7794_CLK_SCU_SRC6
1353 R8A7794_CLK_SCU_SRC5
1354 R8A7794_CLK_SCU_SRC4
1355 R8A7794_CLK_SCU_SRC3
1356 R8A7794_CLK_SCU_SRC2
1357 R8A7794_CLK_SCU_SRC1>;
1358 clock-output-names = "ssi-all", "ssi9", "ssi8", "ssi7",
1359 "ssi6", "ssi5", "ssi4", "ssi3",
1360 "ssi2", "ssi1", "ssi0",
1361 "scu-all", "scu-dvc1", "scu-dvc0",
1362 "scu-ctu1-mix1", "scu-ctu0-mix0",
1363 "scu-src6", "scu-src5", "scu-src4",
1364 "scu-src3", "scu-src2", "scu-src1";
1365 };
1240 mstp11_clks: mstp11_clks@e615099c { 1366 mstp11_clks: mstp11_clks@e615099c {
1241 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 1367 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
1242 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; 1368 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
@@ -1306,4 +1432,185 @@
1306 #iommu-cells = <1>; 1432 #iommu-cells = <1>;
1307 status = "disabled"; 1433 status = "disabled";
1308 }; 1434 };
1435
1436 rcar_sound: sound@ec500000 {
1437 /*
1438 * #sound-dai-cells is required
1439 *
1440 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1441 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1442 */
1443 compatible = "renesas,rcar_sound-r8a7794",
1444 "renesas,rcar_sound-gen2";
1445 reg = <0 0xec500000 0 0x1000>, /* SCU */
1446 <0 0xec5a0000 0 0x100>, /* ADG */
1447 <0 0xec540000 0 0x1000>, /* SSIU */
1448 <0 0xec541000 0 0x280>, /* SSI */
1449 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
1450 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1451
1452 clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
1453 <&mstp10_clks R8A7794_CLK_SSI9>,
1454 <&mstp10_clks R8A7794_CLK_SSI8>,
1455 <&mstp10_clks R8A7794_CLK_SSI7>,
1456 <&mstp10_clks R8A7794_CLK_SSI6>,
1457 <&mstp10_clks R8A7794_CLK_SSI5>,
1458 <&mstp10_clks R8A7794_CLK_SSI4>,
1459 <&mstp10_clks R8A7794_CLK_SSI3>,
1460 <&mstp10_clks R8A7794_CLK_SSI2>,
1461 <&mstp10_clks R8A7794_CLK_SSI1>,
1462 <&mstp10_clks R8A7794_CLK_SSI0>,
1463 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
1464 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
1465 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
1466 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
1467 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
1468 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
1469 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
1470 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
1471 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
1472 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
1473 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
1474 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
1475 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1476 <&m2_clk>;
1477 clock-names = "ssi-all",
1478 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1479 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1480 "src.6", "src.5", "src.4", "src.3", "src.2",
1481 "src.1",
1482 "ctu.0", "ctu.1",
1483 "mix.0", "mix.1",
1484 "dvc.0", "dvc.1",
1485 "clk_a", "clk_b", "clk_c", "clk_i";
1486 power-domains = <&cpg_clocks>;
1487
1488 status = "disabled";
1489
1490 rcar_sound,dvc {
1491 dvc0: dvc@0 {
1492 dmas = <&audma0 0xbc>;
1493 dma-names = "tx";
1494 };
1495 dvc1: dvc@1 {
1496 dmas = <&audma0 0xbe>;
1497 dma-names = "tx";
1498 };
1499 };
1500
1501 rcar_sound,mix {
1502 mix0: mix@0 { };
1503 mix1: mix@1 { };
1504 };
1505
1506 rcar_sound,ctu {
1507 ctu00: ctu@0 { };
1508 ctu01: ctu@1 { };
1509 ctu02: ctu@2 { };
1510 ctu03: ctu@3 { };
1511 ctu10: ctu@4 { };
1512 ctu11: ctu@5 { };
1513 ctu12: ctu@6 { };
1514 ctu13: ctu@7 { };
1515 };
1516
1517 rcar_sound,src {
1518 src@0 {
1519 status = "disabled";
1520 };
1521 src1: src@1 {
1522 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1523 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1524 dma-names = "rx", "tx";
1525 };
1526 src2: src@2 {
1527 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1528 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1529 dma-names = "rx", "tx";
1530 };
1531 src3: src@3 {
1532 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1533 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1534 dma-names = "rx", "tx";
1535 };
1536 src4: src@4 {
1537 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1538 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1539 dma-names = "rx", "tx";
1540 };
1541 src5: src@5 {
1542 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1543 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1544 dma-names = "rx", "tx";
1545 };
1546 src6: src@6 {
1547 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1548 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1549 dma-names = "rx", "tx";
1550 };
1551 };
1552
1553 rcar_sound,ssi {
1554 ssi0: ssi@0 {
1555 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1556 dmas = <&audma0 0x01>, <&audma0 0x02>,
1557 <&audma0 0x15>, <&audma0 0x16>;
1558 dma-names = "rx", "tx", "rxu", "txu";
1559 };
1560 ssi1: ssi@1 {
1561 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1562 dmas = <&audma0 0x03>, <&audma0 0x04>,
1563 <&audma0 0x49>, <&audma0 0x4a>;
1564 dma-names = "rx", "tx", "rxu", "txu";
1565 };
1566 ssi2: ssi@2 {
1567 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1568 dmas = <&audma0 0x05>, <&audma0 0x06>,
1569 <&audma0 0x63>, <&audma0 0x64>;
1570 dma-names = "rx", "tx", "rxu", "txu";
1571 };
1572 ssi3: ssi@3 {
1573 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1574 dmas = <&audma0 0x07>, <&audma0 0x08>,
1575 <&audma0 0x6f>, <&audma0 0x70>;
1576 dma-names = "rx", "tx", "rxu", "txu";
1577 };
1578 ssi4: ssi@4 {
1579 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1580 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1581 <&audma0 0x71>, <&audma0 0x72>;
1582 dma-names = "rx", "tx", "rxu", "txu";
1583 };
1584 ssi5: ssi@5 {
1585 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1587 <&audma0 0x73>, <&audma0 0x74>;
1588 dma-names = "rx", "tx", "rxu", "txu";
1589 };
1590 ssi6: ssi@6 {
1591 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1592 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1593 <&audma0 0x75>, <&audma0 0x76>;
1594 dma-names = "rx", "tx", "rxu", "txu";
1595 };
1596 ssi7: ssi@7 {
1597 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1598 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1599 <&audma0 0x79>, <&audma0 0x7a>;
1600 dma-names = "rx", "tx", "rxu", "txu";
1601 };
1602 ssi8: ssi@8 {
1603 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1604 dmas = <&audma0 0x11>, <&audma0 0x12>,
1605 <&audma0 0x7b>, <&audma0 0x7c>;
1606 dma-names = "rx", "tx", "rxu", "txu";
1607 };
1608 ssi9: ssi@9 {
1609 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1610 dmas = <&audma0 0x13>, <&audma0 0x14>,
1611 <&audma0 0x7d>, <&audma0 0x7e>;
1612 dma-names = "rx", "tx", "rxu", "txu";
1613 };
1614 };
1615 };
1309}; 1616};
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 843d2be2e4e9..a935523a1eb8 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -43,6 +43,7 @@
43#include <dt-bindings/interrupt-controller/arm-gic.h> 43#include <dt-bindings/interrupt-controller/arm-gic.h>
44#include <dt-bindings/pinctrl/rockchip.h> 44#include <dt-bindings/pinctrl/rockchip.h>
45#include <dt-bindings/clock/rk3036-cru.h> 45#include <dt-bindings/clock/rk3036-cru.h>
46#include <dt-bindings/soc/rockchip,boot-mode.h>
46#include "skeleton.dtsi" 47#include "skeleton.dtsi"
47 48
48/ { 49/ {
@@ -313,8 +314,17 @@
313 }; 314 };
314 315
315 grf: syscon@20008000 { 316 grf: syscon@20008000 {
316 compatible = "rockchip,rk3036-grf", "syscon"; 317 compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd";
317 reg = <0x20008000 0x1000>; 318 reg = <0x20008000 0x1000>;
319
320 reboot-mode {
321 compatible = "syscon-reboot-mode";
322 offset = <0x1d8>;
323 mode-normal = <BOOT_NORMAL>;
324 mode-recovery = <BOOT_RECOVERY>;
325 mode-bootloader = <BOOT_FASTBOOT>;
326 mode-loader = <BOOT_BL_DOWNLOAD>;
327 };
318 }; 328 };
319 329
320 acodec: acodec-ana@20030000 { 330 acodec: acodec-ana@20030000 {
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
index 452ca2441e84..041dd5d2d18c 100644
--- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
@@ -206,6 +206,10 @@
206 }; 206 };
207}; 207};
208 208
209&panel {
210 power-supply = <&vcc_lcd>;
211};
212
209&pinctrl { 213&pinctrl {
210 lcd { 214 lcd {
211 lcd_en: lcd-en { 215 lcd_en: lcd-en {
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts
index 736b08b0bfdd..44ebc6e59b3a 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts
@@ -233,3 +233,7 @@
233 }; 233 };
234 }; 234 };
235}; 235};
236
237&panel {
238 power-supply = <&vcc_lcd>;
239};
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index 963365d12208..d59208b5eb6c 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -48,7 +48,7 @@
48 reg = <0x0 0x80000000>; 48 reg = <0x0 0x80000000>;
49 }; 49 };
50 50
51 backlight { 51 backlight: backlight {
52 compatible = "pwm-backlight"; 52 compatible = "pwm-backlight";
53 brightness-levels = < 53 brightness-levels = <
54 0 1 2 3 4 5 6 7 54 0 1 2 3 4 5 6 7
@@ -97,6 +97,21 @@
97 #clock-cells = <0>; 97 #clock-cells = <0>;
98 }; 98 };
99 99
100 panel: panel {
101 compatible ="lg,lp079qx1-sp0v", "simple-panel";
102 backlight = <&backlight>;
103 enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
104 pinctrl-0 = <&lcd_cs>;
105
106 ports {
107 panel_in: port {
108 panel_in_edp: endpoint {
109 remote-endpoint = <&edp_out_panel>;
110 };
111 };
112 };
113 };
114
100 gpio-keys { 115 gpio-keys {
101 compatible = "gpio-keys"; 116 compatible = "gpio-keys";
102 autorepeat; 117 autorepeat;
@@ -170,6 +185,28 @@
170 cpu0-supply = <&vdd_cpu>; 185 cpu0-supply = <&vdd_cpu>;
171}; 186};
172 187
188&edp {
189 force-hpd;
190 status = "okay";
191
192 ports {
193 edp_out: port@1 {
194 reg = <1>;
195 #address-cells = <1>;
196 #size-cells = <0>;
197
198 edp_out_panel: endpoint {
199 reg = <0>;
200 remote-endpoint = <&panel_in_edp>;
201 };
202 };
203 };
204};
205
206&edp_phy {
207 status = "okay";
208};
209
173&emmc { 210&emmc {
174 bus-width = <8>; 211 bus-width = <8>;
175 cap-mmc-highspeed; 212 cap-mmc-highspeed;
@@ -280,6 +317,12 @@
280 }; 317 };
281 }; 318 };
282 319
320 lcd {
321 lcd_cs: lcd-cs {
322 rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
323 };
324 };
325
283 pmic { 326 pmic {
284 pmic_int: pmic-int { 327 pmic_int: pmic-int {
285 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; 328 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
diff --git a/arch/arm/boot/dts/rk3288-fennec.dts b/arch/arm/boot/dts/rk3288-fennec.dts
new file mode 100644
index 000000000000..2e3c34135ed8
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-fennec.dts
@@ -0,0 +1,382 @@
1/*
2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
5 * whole.
6 *
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41/dts-v1/;
42
43#include "rk3288.dtsi"
44
45/ {
46 model = "Rockchip RK3288 Fennec Board";
47 compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
48
49 memory {
50 reg = <0x0 0x80000000>;
51 device_type = "memory";
52 };
53
54 ext_gmac: external-gmac-clock {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <125000000>;
58 clock-output-names = "ext_gmac";
59 };
60
61 vcc_sys: vsys-regulator {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc_sys";
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
66 regulator-always-on;
67 regulator-boot-on;
68 };
69};
70
71&cpu0 {
72 cpu0-supply = <&vdd_cpu>;
73};
74
75&emmc {
76 bus-width = <8>;
77 cap-mmc-highspeed;
78 disable-wp;
79 non-removable;
80 num-slots = <1>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
83 status = "okay";
84};
85
86&gmac {
87 assigned-clocks = <&cru SCLK_MAC>;
88 assigned-clock-parents = <&ext_gmac>;
89 clock_in_out = "input";
90 pinctrl-names = "default";
91 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
92 phy-supply = <&vcc_lan>;
93 phy-mode = "rgmii";
94 snps,reset-active-low;
95 snps,reset-delays-us = <0 10000 1000000>;
96 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
97 tx_delay = <0x30>;
98 rx_delay = <0x10>;
99 status = "okay";
100};
101
102&hdmi {
103 status = "okay";
104};
105
106&i2c0 {
107 status = "okay";
108 clock-frequency = <400000>;
109
110 rk808: pmic@1b {
111 compatible = "rockchip,rk808";
112 reg = <0x1b>;
113 interrupt-parent = <&gpio0>;
114 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
115 #clock-cells = <1>;
116 clock-output-names = "xin32k", "rk808-clkout2";
117 pinctrl-names = "default";
118 pinctrl-0 = <&pmic_int &global_pwroff>;
119 rockchip,system-power-controller;
120 wakeup-source;
121
122 vcc1-supply = <&vcc_sys>;
123 vcc2-supply = <&vcc_sys>;
124 vcc3-supply = <&vcc_sys>;
125 vcc4-supply = <&vcc_sys>;
126 vcc6-supply = <&vcc_sys>;
127 vcc7-supply = <&vcc_sys>;
128 vcc8-supply = <&vcc_io>;
129 vcc9-supply = <&vcc_io>;
130 vcc10-supply = <&vcc_io>;
131 vcc11-supply = <&vcc_io>;
132 vcc12-supply = <&vcc_io>;
133 vddio-supply = <&vcc_io>;
134
135 regulators {
136 vdd_cpu: DCDC_REG1 {
137 regulator-always-on;
138 regulator-boot-on;
139 regulator-min-microvolt = <750000>;
140 regulator-max-microvolt = <1350000>;
141 regulator-name = "vdd_arm";
142 regulator-state-mem {
143 regulator-off-in-suspend;
144 };
145 };
146
147 vdd_gpu: DCDC_REG2 {
148 regulator-always-on;
149 regulator-boot-on;
150 regulator-min-microvolt = <850000>;
151 regulator-max-microvolt = <1250000>;
152 regulator-name = "vdd_gpu";
153 regulator-state-mem {
154 regulator-on-in-suspend;
155 regulator-suspend-microvolt = <1000000>;
156 };
157 };
158
159 vcc_ddr: DCDC_REG3 {
160 regulator-always-on;
161 regulator-boot-on;
162 regulator-name = "vcc_ddr";
163 regulator-state-mem {
164 regulator-on-in-suspend;
165 };
166 };
167
168 vcc_io: DCDC_REG4 {
169 regulator-always-on;
170 regulator-boot-on;
171 regulator-min-microvolt = <3300000>;
172 regulator-max-microvolt = <3300000>;
173 regulator-name = "vcc_io";
174 regulator-state-mem {
175 regulator-on-in-suspend;
176 regulator-suspend-microvolt = <3300000>;
177 };
178 };
179
180 vccio_pmu: LDO_REG1 {
181 regulator-always-on;
182 regulator-boot-on;
183 regulator-min-microvolt = <3300000>;
184 regulator-max-microvolt = <3300000>;
185 regulator-name = "vccio_pmu";
186 regulator-state-mem {
187 regulator-on-in-suspend;
188 regulator-suspend-microvolt = <3300000>;
189 };
190 };
191
192 vcca_33: LDO_REG2 {
193 regulator-always-on;
194 regulator-boot-on;
195 regulator-min-microvolt = <3300000>;
196 regulator-max-microvolt = <3300000>;
197 regulator-name = "vcca_33";
198 regulator-state-mem {
199 regulator-off-in-suspend;
200 };
201 };
202
203 vdd_10: LDO_REG3 {
204 regulator-always-on;
205 regulator-boot-on;
206 regulator-min-microvolt = <1000000>;
207 regulator-max-microvolt = <1000000>;
208 regulator-name = "vdd_10";
209 regulator-state-mem {
210 regulator-on-in-suspend;
211 regulator-suspend-microvolt = <1000000>;
212 };
213 };
214
215 vcc_wl: LDO_REG4 {
216 regulator-always-on;
217 regulator-boot-on;
218 regulator-min-microvolt = <1800000>;
219 regulator-max-microvolt = <1800000>;
220 regulator-name = "vcc_wl";
221 regulator-state-mem {
222 regulator-on-in-suspend;
223 regulator-suspend-microvolt = <1800000>;
224 };
225 };
226
227 vccio_sd: LDO_REG5 {
228 regulator-always-on;
229 regulator-boot-on;
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <3300000>;
232 regulator-name = "vccio_sd";
233 regulator-state-mem {
234 regulator-on-in-suspend;
235 regulator-suspend-microvolt = <3300000>;
236 };
237 };
238
239 vdd10_lcd: LDO_REG6 {
240 regulator-always-on;
241 regulator-boot-on;
242 regulator-min-microvolt = <1000000>;
243 regulator-max-microvolt = <1000000>;
244 regulator-name = "vdd10_lcd";
245 regulator-state-mem {
246 regulator-on-in-suspend;
247 regulator-suspend-microvolt = <1000000>;
248 };
249 };
250
251 vcc_18: LDO_REG7 {
252 regulator-always-on;
253 regulator-boot-on;
254 regulator-min-microvolt = <1800000>;
255 regulator-max-microvolt = <1800000>;
256 regulator-name = "vcc_18";
257 regulator-state-mem {
258 regulator-on-in-suspend;
259 regulator-suspend-microvolt = <1800000>;
260 };
261 };
262
263 vcc18_lcd: LDO_REG8 {
264 regulator-always-on;
265 regulator-boot-on;
266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvolt = <1800000>;
268 regulator-name = "vcc18_lcd";
269 regulator-state-mem {
270 regulator-on-in-suspend;
271 regulator-suspend-microvolt = <1800000>;
272 };
273 };
274
275 vcc_sd: SWITCH_REG1 {
276 regulator-always-on;
277 regulator-boot-on;
278 regulator-name = "vcc_sd";
279 regulator-state-mem {
280 regulator-on-in-suspend;
281 };
282 };
283
284 vcc_lan: SWITCH_REG2 {
285 regulator-always-on;
286 regulator-boot-on;
287 regulator-name = "vcc_lan";
288 regulator-state-mem {
289 regulator-on-in-suspend;
290 };
291 };
292 };
293 };
294};
295
296&pinctrl {
297 pcfg_output_high: pcfg-output-high {
298 output-high;
299 };
300
301 pcfg_output_low: pcfg-output-low {
302 output-low;
303 };
304
305 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
306 drive-strength = <8>;
307 };
308
309 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
310 bias-pull-up;
311 drive-strength = <8>;
312 };
313
314 gmac {
315 phy_int: phy-int {
316 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
317 };
318
319 phy_pmeb: phy-pmeb {
320 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
321 };
322
323 phy_rst: phy-rst {
324 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
325 };
326 };
327
328 pmic {
329 pmic_int: pmic-int {
330 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
331 };
332 };
333
334 usbphy {
335 host_drv: host-drv {
336 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
337 };
338 };
339};
340
341&uart2 {
342 status = "okay";
343};
344
345&usbphy {
346 pinctrl-names = "default";
347 pinctrl-0 = <&host_drv>;
348 vbus_drv-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
349 status = "okay";
350};
351
352&usb_host0_ehci {
353 status = "okay";
354};
355
356&usb_host1 {
357 status = "okay";
358};
359
360&usb_otg {
361 status = "okay";
362};
363
364&usb_hsic {
365 status = "okay";
366};
367
368&vopb {
369 status = "okay";
370};
371
372&vopb_mmu {
373 status = "okay";
374};
375
376&vopl {
377 status = "okay";
378};
379
380&vopl_mmu {
381 status = "okay";
382};
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
new file mode 100644
index 000000000000..ec418c99de95
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
@@ -0,0 +1,310 @@
1/*
2 * Device tree file for Firefly Rockchip RK3288 Core board
3 * Copyright (c) 2016 Randy Li <ayaka@soulik.info>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44#include <dt-bindings/input/input.h>
45#include "rk3288.dtsi"
46
47/ {
48 memory {
49 device_type = "memory";
50 reg = <0 0x80000000>;
51 };
52
53 ext_gmac: external-gmac-clock {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <125000000>;
57 clock-output-names = "ext_gmac";
58 };
59
60
61 vcc_flash: flash-regulator {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc_flash";
64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <1800000>;
66 vin-supply = <&vcc_io>;
67 };
68};
69
70&cpu0 {
71 cpu0-supply = <&vdd_cpu>;
72};
73
74&emmc {
75 bus-width = <8>;
76 cap-mmc-highspeed;
77 disable-wp;
78 mmc-ddr-1_8v;
79 mmc-hs200-1_8v;
80 non-removable;
81 num-slots = <1>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
84 vmmc-supply = <&vcc_io>;
85 vqmmc-supply = <&vcc_flash>;
86 status = "okay";
87};
88
89&gmac {
90 assigned-clocks = <&cru SCLK_MAC>;
91 assigned-clock-parents = <&ext_gmac>;
92 clock_in_out = "input";
93 pinctrl-names = "default";
94 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
95 phy-supply = <&vcc_lan>;
96 phy-mode = "rgmii";
97 snps,reset-active-low;
98 snps,reset-delays-us = <0 10000 1000000>;
99 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
100 tx_delay = <0x30>;
101 rx_delay = <0x10>;
102 status = "ok";
103};
104
105&i2c0 {
106 clock-frequency = <400000>;
107 status = "okay";
108
109 vdd_cpu: syr827@40 {
110 compatible = "silergy,syr827";
111 fcs,suspend-voltage-selector = <1>;
112 reg = <0x40>;
113 regulator-name = "vdd_cpu";
114 regulator-min-microvolt = <850000>;
115 regulator-max-microvolt = <1350000>;
116 regulator-always-on;
117 regulator-boot-on;
118 regulator-enable-ramp-delay = <300>;
119 regulator-ramp-delay = <8000>;
120 vin-supply = <&vcc_sys>;
121 };
122
123 vdd_gpu: syr828@41 {
124 compatible = "silergy,syr828";
125 fcs,suspend-voltage-selector = <1>;
126 reg = <0x41>;
127 regulator-name = "vdd_gpu";
128 regulator-min-microvolt = <850000>;
129 regulator-max-microvolt = <1350000>;
130 regulator-always-on;
131 vin-supply = <&vcc_sys>;
132 };
133
134 act8846: act8846@5a {
135 compatible = "active-semi,act8846";
136 reg = <0x5a>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
139 system-power-controller;
140
141 vp1-supply = <&vcc_sys>;
142 vp2-supply = <&vcc_sys>;
143 vp3-supply = <&vcc_sys>;
144 vp4-supply = <&vcc_sys>;
145 inl1-supply = <&vcc_sys>;
146 inl2-supply = <&vcc_sys>;
147 inl3-supply = <&vcc_20>;
148
149 regulators {
150 vcc_ddr: REG1 {
151 regulator-name = "vcc_ddr";
152 regulator-min-microvolt = <1200000>;
153 regulator-max-microvolt = <1200000>;
154 regulator-always-on;
155 };
156
157 vcc_io: REG2 {
158 regulator-name = "vcc_io";
159 regulator-min-microvolt = <3300000>;
160 regulator-max-microvolt = <3300000>;
161 regulator-always-on;
162 };
163
164 vdd_log: REG3 {
165 regulator-name = "vdd_log";
166 regulator-min-microvolt = <1100000>;
167 regulator-max-microvolt = <1100000>;
168 regulator-always-on;
169 };
170
171 vcc_20: REG4 {
172 regulator-name = "vcc_20";
173 regulator-min-microvolt = <2000000>;
174 regulator-max-microvolt = <2000000>;
175 regulator-always-on;
176 };
177
178 vccio_sd: REG5 {
179 regulator-name = "vccio_sd";
180 regulator-min-microvolt = <3300000>;
181 regulator-max-microvolt = <3300000>;
182 };
183
184 vdd10_lcd: REG6 {
185 regulator-name = "vdd10_lcd";
186 regulator-min-microvolt = <1000000>;
187 regulator-max-microvolt = <1000000>;
188 };
189
190 vcca_18: REG7 {
191 regulator-name = "vcca_18";
192 regulator-min-microvolt = <1800000>;
193 regulator-max-microvolt = <1800000>;
194 regulator-always-on;
195 };
196
197 vcca_33: REG8 {
198 regulator-name = "vcca_33";
199 regulator-min-microvolt = <3300000>;
200 regulator-max-microvolt = <3300000>;
201 regulator-always-on;
202 };
203
204 vcc_lan: REG9 {
205 regulator-name = "vcca_lan";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 };
209
210 vdd_10: REG10 {
211 regulator-name = "vdd_10";
212 regulator-min-microvolt = <1000000>;
213 regulator-max-microvolt = <1000000>;
214 regulator-always-on;
215 };
216
217 vccio_wl: vcc_18: REG11 {
218 regulator-name = "vcc_18";
219 regulator-min-microvolt = <1800000>;
220 regulator-max-microvolt = <1800000>;
221 };
222
223 vcc18_lcd: REG12 {
224 regulator-name = "vcc18_lcd";
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <1800000>;
227 };
228 };
229 };
230};
231
232&io_domains {
233 status = "okay";
234
235 audio-supply = <&vccio_wl>;
236 bb-supply = <&vcc_io>;
237 dvp-supply = <&dovdd_1v8>;
238 flash0-supply = <&vcc_flash>;
239 flash1-supply = <&vcc_lan>;
240 gpio30-supply = <&vcc_io>;
241 gpio1830-supply = <&vcc_io>;
242 lcdc-supply = <&vcc_io>;
243 sdcard-supply = <&vccio_sd>;
244 wifi-supply = <&vccio_wl>;
245};
246
247&pinctrl {
248 pcfg_output_high: pcfg-output-high {
249 output-high;
250 };
251
252 pcfg_output_low: pcfg-output-low {
253 output-low;
254 };
255
256 pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
257 bias-pull-up;
258 drive-strength = <12>;
259 };
260
261 act8846 {
262 pwr_hold: pwr-hold {
263 rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
264 };
265
266 pmic_vsel: pmic-vsel {
267 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
268 };
269 };
270
271 gmac {
272 phy_int: phy-int {
273 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
274 };
275
276 phy_pmeb: phy-pmeb {
277 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
278 };
279
280 phy_rst: phy-rst {
281 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
282 };
283 };
284};
285
286&tsadc {
287 rockchip,hw-tshut-mode = <0>;
288 rockchip,hw-tshut-polarity = <0>;
289 status = "okay";
290};
291
292&vopb {
293 status = "okay";
294};
295
296&vopb_mmu {
297 status = "okay";
298};
299
300&vopl {
301 status = "okay";
302};
303
304&vopl_mmu {
305 status = "okay";
306};
307
308&wdt {
309 status = "okay";
310};
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts
new file mode 100644
index 000000000000..751bee81128e
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts
@@ -0,0 +1,403 @@
1/*
2 * Device tree file for Firefly Rockchip RK3288 Core board
3 * Copyright (c) 2016 Randy Li <ayaka@soulik.info>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include "rk3288-firefly-reload-core.dtsi"
46
47/ {
48 model = "Firefly-RK3288-reload";
49 compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
50
51 gpio-keys {
52 compatible = "gpio-keys";
53
54 power {
55 wakeup-source;
56 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
57 label = "GPIO Power";
58 linux,code = <KEY_POWER>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&pwr_key>;
61 };
62 };
63
64 ir-receiver {
65 compatible = "gpio-ir-receiver";
66 gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
67 };
68
69 leds {
70 compatible = "gpio-leds";
71
72 power {
73 gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
74 label = "firefly:blue:power";
75 pinctrl-names = "default";
76 pinctrl-0 = <&power_led>;
77 panic-indicator;
78 };
79
80 work {
81 gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
82 label = "firefly:blue:user";
83 linux,default-trigger = "rc-feedback";
84 pinctrl-names = "default";
85 pinctrl-0 = <&work_led>;
86 };
87 };
88
89 sdio_pwrseq: sdio-pwrseq {
90 compatible = "mmc-pwrseq-simple";
91 clocks = <&hym8563>;
92 clock-names = "ext_clock";
93 pinctrl-names = "default";
94 pinctrl-0 = <&wifi_enable>;
95 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
96 };
97
98 sound {
99 compatible = "simple-audio-card";
100 simple-audio-card,name = "SPDIF";
101 simple-audio-card,dai-link@1 { /* S/PDIF - S/PDIF */
102 cpu { sound-dai = <&spdif>; };
103 codec { sound-dai = <&spdif_out>; };
104 };
105 };
106
107 spdif_out: spdif-out {
108 compatible = "linux,spdif-dit";
109 #sound-dai-cells = <0>;
110 };
111
112 vcc_host_5v: usb-host-regulator {
113 compatible = "regulator-fixed";
114 enable-active-high;
115 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&host_vbus_drv>;
118 regulator-name = "vcc_host_5v";
119 regulator-min-microvolt = <5000000>;
120 regulator-max-microvolt = <5000000>;
121 regulator-always-on;
122 vin-supply = <&vcc_5v>;
123 };
124
125 vcc_5v: vcc_sys: vsys-regulator {
126 compatible = "regulator-fixed";
127 regulator-name = "vcc_5v";
128 regulator-min-microvolt = <5000000>;
129 regulator-max-microvolt = <5000000>;
130 regulator-always-on;
131 regulator-boot-on;
132 };
133
134 vcc_sd: sdmmc-regulator {
135 compatible = "regulator-fixed";
136 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&sdmmc_pwr>;
139 regulator-name = "vcc_sd";
140 regulator-min-microvolt = <3300000>;
141 regulator-max-microvolt = <3300000>;
142 startup-delay-us = <100000>;
143 vin-supply = <&vcc_io>;
144 };
145
146 vcc_otg_5v: usb-otg-regulator {
147 compatible = "regulator-fixed";
148 enable-active-high;
149 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&otg_vbus_drv>;
152 regulator-name = "vcc_otg_5v";
153 regulator-min-microvolt = <5000000>;
154 regulator-max-microvolt = <5000000>;
155 regulator-always-on;
156 vin-supply = <&vcc_5v>;
157 };
158
159 dovdd_1v8: dovdd-1v8-regulator {
160 compatible = "regulator-fixed";
161 enable-active-high;
162 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
163 pinctrl-names = "default";
164 pinctrl-0 = <&dvp_pwr>;
165 regulator-name = "dovdd_1v8";
166 regulator-min-microvolt = <1800000>;
167 regulator-max-microvolt = <1800000>;
168 vin-supply = <&vcc_io>;
169 };
170
171 vcc28_dvp: vcc28-dvp-regulator {
172 compatible = "regulator-fixed";
173 enable-active-high;
174 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&dvp_pwr>;
177 regulator-name = "vcc28_dvp";
178 regulator-min-microvolt = <2800000>;
179 regulator-max-microvolt = <2800000>;
180 vin-supply = <&vcc_io>;
181 };
182
183 af_28: af_28-regulator {
184 compatible = "regulator-fixed";
185 enable-active-high;
186 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&dvp_pwr>;
189 regulator-name = "af_28";
190 regulator-min-microvolt = <2800000>;
191 regulator-max-microvolt = <2800000>;
192 vin-supply = <&vcc_io>;
193 };
194
195 dvdd_1v2: af_28-regulator {
196 compatible = "regulator-fixed";
197 enable-active-high;
198 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&cif_pwr>;
201 regulator-name = "dvdd_1v2";
202 regulator-min-microvolt = <1200000>;
203 regulator-max-microvolt = <1200000>;
204 vin-supply = <&vcc_io>;
205 };
206
207 vbat_wl: wifi-regulator {
208 compatible = "regulator-fixed";
209 regulator-name = "vbat_wl";
210 regulator-min-microvolt = <3300000>;
211 regulator-max-microvolt = <3300000>;
212 vin-supply = <&vcc_io>;
213 };
214};
215
216&i2c0 {
217 hym8563: hym8563@51 {
218 compatible = "haoyu,hym8563";
219 reg = <0x51>;
220 #clock-cells = <0>;
221 clock-frequency = <32768>;
222 clock-output-names = "xin32k";
223 interrupt-parent = <&gpio7>;
224 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&rtc_int>;
227 };
228};
229
230&i2c2 {
231 status = "okay";
232
233 codec: es8328@10 {
234 compatible = "everest,es8328";
235 DVDD-supply = <&vcca_33>;
236 AVDD-supply = <&vcca_33>;
237 PVDD-supply = <&vcca_33>;
238 HPVDD-supply = <&vcca_33>;
239 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
240 clock-names = "i2s_hclk", "i2s_clk";
241 reg = <0x10>;
242 };
243};
244
245&i2s {
246 status = "okay";
247};
248
249&sdmmc {
250 bus-width = <4>;
251 cap-mmc-highspeed;
252 cap-sd-highspeed;
253 card-detect-delay = <200>;
254 disable-wp;
255 num-slots = <1>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
258 vmmc-supply = <&vcc_sd>;
259 vqmmc-supply = <&vccio_sd>;
260 status = "okay";
261};
262
263&sdio0 {
264 bus-width = <4>;
265 cap-sd-highspeed;
266 cap-sdio-irq;
267 disable-wp;
268 mmc-pwrseq = <&sdio_pwrseq>;
269 non-removable;
270 num-slots = <1>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
273 sd-uhs-sdr12;
274 sd-uhs-sdr25;
275 sd-uhs-sdr50;
276 sd-uhs-ddr50;
277 vmmc-supply = <&vbat_wl>;
278 vqmmc-supply = <&vccio_wl>;
279 status = "okay";
280};
281
282&spdif {
283 status = "okay";
284};
285
286&uart0 {
287 pinctrl-names = "default";
288 pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
289 status = "okay";
290};
291
292&uart1 {
293 status = "okay";
294};
295
296&uart2 {
297 status = "okay";
298};
299
300&uart3 {
301 status = "okay";
302};
303
304&usbphy {
305 status = "okay";
306};
307
308&usb_host1 {
309 pinctrl-names = "default";
310 pinctrl-0 = <&usbhub_rst>;
311 status = "okay";
312};
313
314&usb_otg {
315 status = "okay";
316};
317
318&pinctrl {
319 ir {
320 ir_int: ir-int {
321 rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
322 };
323 };
324
325 dvp {
326 dvp_pwr: dvp-pwr {
327 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
328 };
329
330 cif_pwr: cif-pwr {
331 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_none>;
332 };
333 };
334
335 hym8563 {
336 rtc_int: rtc-int {
337 rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
338 };
339 };
340
341 keys {
342 pwr_key: pwr-key {
343 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
344 };
345 };
346
347 leds {
348 power_led: power-led {
349 rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
350 };
351
352 work_led: work-led {
353 rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
354 };
355 };
356
357 sdmmc {
358 /*
359 * Default drive strength isn't enough to achieve even
360 * high-speed mode on firefly board so bump up to 12ma.
361 */
362 sdmmc_bus4: sdmmc-bus4 {
363 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
364 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
365 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
366 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
367 };
368
369 sdmmc_clk: sdmmc-clk {
370 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
371 };
372
373 sdmmc_cmd: sdmmc-cmd {
374 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
375 };
376
377 sdmmc_pwr: sdmmc-pwr {
378 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
379 };
380 };
381
382 sdio {
383 wifi_enable: wifi-enable {
384 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
385 };
386 };
387
388 usb_host {
389 host_vbus_drv: host-vbus-drv {
390 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
391 };
392
393 usbhub_rst: usbhub-rst {
394 rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
395 };
396 };
397
398 usb_otg {
399 otg_vbus_drv: otg-vbus-drv {
400 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
401 };
402 };
403};
diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts
index dda8d259bb6d..56dd377d5658 100644
--- a/arch/arm/boot/dts/rk3288-popmetal.dts
+++ b/arch/arm/boot/dts/rk3288-popmetal.dts
@@ -387,12 +387,16 @@
387 interrupts = <1 IRQ_TYPE_EDGE_RISING>; 387 interrupts = <1 IRQ_TYPE_EDGE_RISING>;
388 pinctrl-names = "default"; 388 pinctrl-names = "default";
389 pinctrl-0 = <&comp_int>; 389 pinctrl-0 = <&comp_int>;
390 vdd-supply = <&vcc_io>;
391 vid-supply = <&vcc_io>;
390 }; 392 };
391 393
392 l3g4200d: l3g4200d@68 { 394 l3g4200d: l3g4200d@69 {
393 compatible = "st,l3g4200d-gyro"; 395 compatible = "st,l3g4200d-gyro";
394 st,drdy-int-pin = <2>; 396 st,drdy-int-pin = <2>;
395 reg = <0x6b>; 397 reg = <0x69>;
398 vdd-supply = <&vcc_io>;
399 vddio-supply = <&vcc_io>;
396 }; 400 };
397 401
398 mma8452: mma8452@1d { 402 mma8452: mma8452@1d {
@@ -525,3 +529,7 @@
525&usbphy { 529&usbphy {
526 status = "okay"; 530 status = "okay";
527}; 531};
532
533&usb_otg {
534 status = "okay";
535};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 91c4b3c7a8d5..17ec2e2d7a60 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -45,6 +45,7 @@
45#include <dt-bindings/clock/rk3288-cru.h> 45#include <dt-bindings/clock/rk3288-cru.h>
46#include <dt-bindings/thermal/thermal.h> 46#include <dt-bindings/thermal/thermal.h>
47#include <dt-bindings/power/rk3288-power.h> 47#include <dt-bindings/power/rk3288-power.h>
48#include <dt-bindings/soc/rockchip,boot-mode.h>
48#include "skeleton.dtsi" 49#include "skeleton.dtsi"
49 50
50/ { 51/ {
@@ -793,6 +794,15 @@
793 clocks = <&cru ACLK_GPU>; 794 clocks = <&cru ACLK_GPU>;
794 }; 795 };
795 }; 796 };
797
798 reboot-mode {
799 compatible = "syscon-reboot-mode";
800 offset = <0x94>;
801 mode-normal = <BOOT_NORMAL>;
802 mode-recovery = <BOOT_RECOVERY>;
803 mode-bootloader = <BOOT_FASTBOOT>;
804 mode-loader = <BOOT_BL_DOWNLOAD>;
805 };
796 }; 806 };
797 807
798 sgrf: syscon@ff740000 { 808 sgrf: syscon@ff740000 {
@@ -834,6 +844,37 @@
834 compatible = "rockchip,rk3288-io-voltage-domain"; 844 compatible = "rockchip,rk3288-io-voltage-domain";
835 status = "disabled"; 845 status = "disabled";
836 }; 846 };
847
848 usbphy: usbphy {
849 compatible = "rockchip,rk3288-usb-phy";
850 #address-cells = <1>;
851 #size-cells = <0>;
852 status = "disabled";
853
854 usbphy0: usb-phy@320 {
855 #phy-cells = <0>;
856 reg = <0x320>;
857 clocks = <&cru SCLK_OTGPHY0>;
858 clock-names = "phyclk";
859 #clock-cells = <0>;
860 };
861
862 usbphy1: usb-phy@334 {
863 #phy-cells = <0>;
864 reg = <0x334>;
865 clocks = <&cru SCLK_OTGPHY1>;
866 clock-names = "phyclk";
867 #clock-cells = <0>;
868 };
869
870 usbphy2: usb-phy@348 {
871 #phy-cells = <0>;
872 reg = <0x348>;
873 clocks = <&cru SCLK_OTGPHY2>;
874 clock-names = "phyclk";
875 #clock-cells = <0>;
876 };
877 };
837 }; 878 };
838 879
839 wdt: watchdog@ff800000 { 880 wdt: watchdog@ff800000 {
@@ -1087,38 +1128,6 @@
1087 }; 1128 };
1088 }; 1129 };
1089 1130
1090 usbphy: phy {
1091 compatible = "rockchip,rk3288-usb-phy";
1092 rockchip,grf = <&grf>;
1093 #address-cells = <1>;
1094 #size-cells = <0>;
1095 status = "disabled";
1096
1097 usbphy0: usb-phy@320 {
1098 #phy-cells = <0>;
1099 reg = <0x320>;
1100 clocks = <&cru SCLK_OTGPHY0>;
1101 clock-names = "phyclk";
1102 #clock-cells = <0>;
1103 };
1104
1105 usbphy1: usb-phy@334 {
1106 #phy-cells = <0>;
1107 reg = <0x334>;
1108 clocks = <&cru SCLK_OTGPHY1>;
1109 clock-names = "phyclk";
1110 #clock-cells = <0>;
1111 };
1112
1113 usbphy2: usb-phy@348 {
1114 #phy-cells = <0>;
1115 reg = <0x348>;
1116 clocks = <&cru SCLK_OTGPHY2>;
1117 clock-names = "phyclk";
1118 #clock-cells = <0>;
1119 };
1120 };
1121
1122 pinctrl: pinctrl { 1131 pinctrl: pinctrl {
1123 compatible = "rockchip,rk3288-pinctrl"; 1132 compatible = "rockchip,rk3288-pinctrl";
1124 rockchip,grf = <&grf>; 1133 rockchip,grf = <&grf>;
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index e2cd683b4e4b..e15beb3c671e 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -43,6 +43,7 @@
43 43
44#include <dt-bindings/interrupt-controller/irq.h> 44#include <dt-bindings/interrupt-controller/irq.h>
45#include <dt-bindings/interrupt-controller/arm-gic.h> 45#include <dt-bindings/interrupt-controller/arm-gic.h>
46#include <dt-bindings/soc/rockchip,boot-mode.h>
46#include "skeleton.dtsi" 47#include "skeleton.dtsi"
47 48
48/ { 49/ {
@@ -246,8 +247,17 @@
246 }; 247 };
247 248
248 pmu: pmu@20004000 { 249 pmu: pmu@20004000 {
249 compatible = "rockchip,rk3066-pmu", "syscon"; 250 compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd";
250 reg = <0x20004000 0x100>; 251 reg = <0x20004000 0x100>;
252
253 reboot-mode {
254 compatible = "syscon-reboot-mode";
255 offset = <0x40>;
256 mode-normal = <BOOT_NORMAL>;
257 mode-recovery = <BOOT_RECOVERY>;
258 mode-bootloader = <BOOT_FASTBOOT>;
259 mode-loader = <BOOT_BL_DOWNLOAD>;
260 };
251 }; 261 };
252 262
253 grf: grf@20008000 { 263 grf: grf@20008000 {
diff --git a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi
index 527e3193817f..6274359fb323 100644
--- a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi
@@ -8,6 +8,8 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <dt-bindings/pinctrl/samsung.h>
12
11&pinctrl_0 { 13&pinctrl_0 {
12 /* 14 /*
13 * Pin banks 15 * Pin banks
@@ -83,91 +85,91 @@
83 85
84 uart0_data: uart0-data { 86 uart0_data: uart0-data {
85 samsung,pins = "gph-0", "gph-1"; 87 samsung,pins = "gph-0", "gph-1";
86 samsung,pin-function = <2>; 88 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
87 }; 89 };
88 90
89 uart0_fctl: uart0-fctl { 91 uart0_fctl: uart0-fctl {
90 samsung,pins = "gph-8", "gph-9"; 92 samsung,pins = "gph-8", "gph-9";
91 samsung,pin-function = <2>; 93 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
92 }; 94 };
93 95
94 uart1_data: uart1-data { 96 uart1_data: uart1-data {
95 samsung,pins = "gph-2", "gph-3"; 97 samsung,pins = "gph-2", "gph-3";
96 samsung,pin-function = <2>; 98 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
97 }; 99 };
98 100
99 uart1_fctl: uart1-fctl { 101 uart1_fctl: uart1-fctl {
100 samsung,pins = "gph-10", "gph-11"; 102 samsung,pins = "gph-10", "gph-11";
101 samsung,pin-function = <2>; 103 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
102 }; 104 };
103 105
104 uart2_data: uart2-data { 106 uart2_data: uart2-data {
105 samsung,pins = "gph-4", "gph-5"; 107 samsung,pins = "gph-4", "gph-5";
106 samsung,pin-function = <2>; 108 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
107 }; 109 };
108 110
109 uart2_fctl: uart2-fctl { 111 uart2_fctl: uart2-fctl {
110 samsung,pins = "gph-6", "gph-7"; 112 samsung,pins = "gph-6", "gph-7";
111 samsung,pin-function = <2>; 113 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
112 }; 114 };
113 115
114 uart3_data: uart3-data { 116 uart3_data: uart3-data {
115 samsung,pins = "gph-6", "gph-7"; 117 samsung,pins = "gph-6", "gph-7";
116 samsung,pin-function = <2>; 118 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
117 }; 119 };
118 120
119 extuart_clk: extuart-clk { 121 extuart_clk: extuart-clk {
120 samsung,pins = "gph-12"; 122 samsung,pins = "gph-12";
121 samsung,pin-function = <2>; 123 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
122 }; 124 };
123 125
124 i2c0_bus: i2c0-bus { 126 i2c0_bus: i2c0-bus {
125 samsung,pins = "gpe-14", "gpe-15"; 127 samsung,pins = "gpe-14", "gpe-15";
126 samsung,pin-function = <2>; 128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
127 }; 129 };
128 130
129 spi0_bus: spi0-bus { 131 spi0_bus: spi0-bus {
130 samsung,pins = "gpe-11", "gpe-12", "gpe-13"; 132 samsung,pins = "gpe-11", "gpe-12", "gpe-13";
131 samsung,pin-function = <2>; 133 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
132 }; 134 };
133 135
134 sd0_clk: sd0-clk { 136 sd0_clk: sd0-clk {
135 samsung,pins = "gpe-5"; 137 samsung,pins = "gpe-5";
136 samsung,pin-function = <2>; 138 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
137 }; 139 };
138 140
139 sd0_cmd: sd0-cmd { 141 sd0_cmd: sd0-cmd {
140 samsung,pins = "gpe-6"; 142 samsung,pins = "gpe-6";
141 samsung,pin-function = <2>; 143 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
142 }; 144 };
143 145
144 sd0_bus1: sd0-bus1 { 146 sd0_bus1: sd0-bus1 {
145 samsung,pins = "gpe-7"; 147 samsung,pins = "gpe-7";
146 samsung,pin-function = <2>; 148 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
147 }; 149 };
148 150
149 sd0_bus4: sd0-bus4 { 151 sd0_bus4: sd0-bus4 {
150 samsung,pins = "gpe-8", "gpe-9", "gpe-10"; 152 samsung,pins = "gpe-8", "gpe-9", "gpe-10";
151 samsung,pin-function = <2>; 153 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
152 }; 154 };
153 155
154 sd1_cmd: sd1-cmd { 156 sd1_cmd: sd1-cmd {
155 samsung,pins = "gpl-8"; 157 samsung,pins = "gpl-8";
156 samsung,pin-function = <2>; 158 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
157 }; 159 };
158 160
159 sd1_clk: sd1-clk { 161 sd1_clk: sd1-clk {
160 samsung,pins = "gpl-9"; 162 samsung,pins = "gpl-9";
161 samsung,pin-function = <2>; 163 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
162 }; 164 };
163 165
164 sd1_bus1: sd1-bus1 { 166 sd1_bus1: sd1-bus1 {
165 samsung,pins = "gpl-0"; 167 samsung,pins = "gpl-0";
166 samsung,pin-function = <2>; 168 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
167 }; 169 };
168 170
169 sd1_bus4: sd1-bus4 { 171 sd1_bus4: sd1-bus4 {
170 samsung,pins = "gpl-1", "gpl-2", "gpl-3"; 172 samsung,pins = "gpl-1", "gpl-2", "gpl-3";
171 samsung,pin-function = <2>; 173 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
172 }; 174 };
173}; 175};
diff --git a/arch/arm/boot/dts/s3c6410-mini6410.dts b/arch/arm/boot/dts/s3c6410-mini6410.dts
index a25debb50401..f4afda3594f8 100644
--- a/arch/arm/boot/dts/s3c6410-mini6410.dts
+++ b/arch/arm/boot/dts/s3c6410-mini6410.dts
@@ -201,13 +201,13 @@
201&pinctrl0 { 201&pinctrl0 {
202 gpio_leds: gpio-leds { 202 gpio_leds: gpio-leds {
203 samsung,pins = "gpk-4", "gpk-5", "gpk-6", "gpk-7"; 203 samsung,pins = "gpk-4", "gpk-5", "gpk-6", "gpk-7";
204 samsung,pin-pud = <PIN_PULL_NONE>; 204 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
205 }; 205 };
206 206
207 gpio_keys: gpio-keys { 207 gpio_keys: gpio-keys {
208 samsung,pins = "gpn-0", "gpn-1", "gpn-2", "gpn-3", 208 samsung,pins = "gpn-0", "gpn-1", "gpn-2", "gpn-3",
209 "gpn-4", "gpn-5", "gpl-11", "gpl-12"; 209 "gpn-4", "gpn-5", "gpl-11", "gpl-12";
210 samsung,pin-pud = <PIN_PULL_NONE>; 210 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
211 }; 211 };
212}; 212};
213 213
diff --git a/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi b/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
index b1197d8b04de..4e8e802b4ee1 100644
--- a/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
+++ b/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
@@ -12,9 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14 14
15#define PIN_PULL_NONE 0 15#include <dt-bindings/pinctrl/samsung.h>
16#define PIN_PULL_DOWN 1
17#define PIN_PULL_UP 2
18 16
19&pinctrl0 { 17&pinctrl0 {
20 /* 18 /*
@@ -138,514 +136,514 @@
138 136
139 uart0_data: uart0-data { 137 uart0_data: uart0-data {
140 samsung,pins = "gpa-0", "gpa-1"; 138 samsung,pins = "gpa-0", "gpa-1";
141 samsung,pin-function = <2>; 139 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
142 samsung,pin-pud = <PIN_PULL_NONE>; 140 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
143 }; 141 };
144 142
145 uart0_fctl: uart0-fctl { 143 uart0_fctl: uart0-fctl {
146 samsung,pins = "gpa-2", "gpa-3"; 144 samsung,pins = "gpa-2", "gpa-3";
147 samsung,pin-function = <2>; 145 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
148 samsung,pin-pud = <PIN_PULL_NONE>; 146 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
149 }; 147 };
150 148
151 uart1_data: uart1-data { 149 uart1_data: uart1-data {
152 samsung,pins = "gpa-4", "gpa-5"; 150 samsung,pins = "gpa-4", "gpa-5";
153 samsung,pin-function = <2>; 151 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
154 samsung,pin-pud = <PIN_PULL_NONE>; 152 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
155 }; 153 };
156 154
157 uart1_fctl: uart1-fctl { 155 uart1_fctl: uart1-fctl {
158 samsung,pins = "gpa-6", "gpa-7"; 156 samsung,pins = "gpa-6", "gpa-7";
159 samsung,pin-function = <2>; 157 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
160 samsung,pin-pud = <PIN_PULL_NONE>; 158 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
161 }; 159 };
162 160
163 uart2_data: uart2-data { 161 uart2_data: uart2-data {
164 samsung,pins = "gpb-0", "gpb-1"; 162 samsung,pins = "gpb-0", "gpb-1";
165 samsung,pin-function = <2>; 163 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
166 samsung,pin-pud = <PIN_PULL_NONE>; 164 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
167 }; 165 };
168 166
169 uart3_data: uart3-data { 167 uart3_data: uart3-data {
170 samsung,pins = "gpb-2", "gpb-3"; 168 samsung,pins = "gpb-2", "gpb-3";
171 samsung,pin-function = <2>; 169 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
172 samsung,pin-pud = <PIN_PULL_NONE>; 170 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
173 }; 171 };
174 172
175 ext_dma_0: ext-dma-0 { 173 ext_dma_0: ext-dma-0 {
176 samsung,pins = "gpb-0", "gpb-1"; 174 samsung,pins = "gpb-0", "gpb-1";
177 samsung,pin-function = <3>; 175 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
178 samsung,pin-pud = <PIN_PULL_NONE>; 176 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
179 }; 177 };
180 178
181 ext_dma_1: ext-dma-1 { 179 ext_dma_1: ext-dma-1 {
182 samsung,pins = "gpb-2", "gpb-3"; 180 samsung,pins = "gpb-2", "gpb-3";
183 samsung,pin-function = <4>; 181 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
184 samsung,pin-pud = <PIN_PULL_NONE>; 182 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
185 }; 183 };
186 184
187 irda_data_0: irda-data-0 { 185 irda_data_0: irda-data-0 {
188 samsung,pins = "gpb-0", "gpb-1"; 186 samsung,pins = "gpb-0", "gpb-1";
189 samsung,pin-function = <4>; 187 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
190 samsung,pin-pud = <PIN_PULL_NONE>; 188 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
191 }; 189 };
192 190
193 irda_data_1: irda-data-1 { 191 irda_data_1: irda-data-1 {
194 samsung,pins = "gpb-2", "gpb-3"; 192 samsung,pins = "gpb-2", "gpb-3";
195 samsung,pin-function = <3>; 193 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
196 samsung,pin-pud = <PIN_PULL_NONE>; 194 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
197 }; 195 };
198 196
199 irda_sdbw: irda-sdbw { 197 irda_sdbw: irda-sdbw {
200 samsung,pins = "gpb-4"; 198 samsung,pins = "gpb-4";
201 samsung,pin-function = <2>; 199 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
202 samsung,pin-pud = <PIN_PULL_NONE>; 200 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
203 }; 201 };
204 202
205 i2c0_bus: i2c0-bus { 203 i2c0_bus: i2c0-bus {
206 samsung,pins = "gpb-5", "gpb-6"; 204 samsung,pins = "gpb-5", "gpb-6";
207 samsung,pin-function = <2>; 205 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
208 samsung,pin-pud = <PIN_PULL_UP>; 206 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
209 }; 207 };
210 208
211 i2c1_bus: i2c1-bus { 209 i2c1_bus: i2c1-bus {
212 /* S3C6410-only */ 210 /* S3C6410-only */
213 samsung,pins = "gpb-2", "gpb-3"; 211 samsung,pins = "gpb-2", "gpb-3";
214 samsung,pin-function = <6>; 212 samsung,pin-function = <EXYNOS_PIN_FUNC_6>;
215 samsung,pin-pud = <PIN_PULL_UP>; 213 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
216 }; 214 };
217 215
218 spi0_bus: spi0-bus { 216 spi0_bus: spi0-bus {
219 samsung,pins = "gpc-0", "gpc-1", "gpc-2"; 217 samsung,pins = "gpc-0", "gpc-1", "gpc-2";
220 samsung,pin-function = <2>; 218 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
221 samsung,pin-pud = <PIN_PULL_UP>; 219 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
222 }; 220 };
223 221
224 spi0_cs: spi0-cs { 222 spi0_cs: spi0-cs {
225 samsung,pins = "gpc-3"; 223 samsung,pins = "gpc-3";
226 samsung,pin-function = <2>; 224 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
227 samsung,pin-pud = <PIN_PULL_NONE>; 225 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
228 }; 226 };
229 227
230 spi1_bus: spi1-bus { 228 spi1_bus: spi1-bus {
231 samsung,pins = "gpc-4", "gpc-5", "gpc-6"; 229 samsung,pins = "gpc-4", "gpc-5", "gpc-6";
232 samsung,pin-function = <2>; 230 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
233 samsung,pin-pud = <PIN_PULL_UP>; 231 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
234 }; 232 };
235 233
236 spi1_cs: spi1-cs { 234 spi1_cs: spi1-cs {
237 samsung,pins = "gpc-7"; 235 samsung,pins = "gpc-7";
238 samsung,pin-function = <2>; 236 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
239 samsung,pin-pud = <PIN_PULL_NONE>; 237 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
240 }; 238 };
241 239
242 sd0_cmd: sd0-cmd { 240 sd0_cmd: sd0-cmd {
243 samsung,pins = "gpg-1"; 241 samsung,pins = "gpg-1";
244 samsung,pin-function = <2>; 242 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
245 samsung,pin-pud = <PIN_PULL_NONE>; 243 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
246 }; 244 };
247 245
248 sd0_clk: sd0-clk { 246 sd0_clk: sd0-clk {
249 samsung,pins = "gpg-0"; 247 samsung,pins = "gpg-0";
250 samsung,pin-function = <2>; 248 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
251 samsung,pin-pud = <PIN_PULL_NONE>; 249 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
252 }; 250 };
253 251
254 sd0_bus1: sd0-bus1 { 252 sd0_bus1: sd0-bus1 {
255 samsung,pins = "gpg-2"; 253 samsung,pins = "gpg-2";
256 samsung,pin-function = <2>; 254 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
257 samsung,pin-pud = <PIN_PULL_NONE>; 255 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
258 }; 256 };
259 257
260 sd0_bus4: sd0-bus4 { 258 sd0_bus4: sd0-bus4 {
261 samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5"; 259 samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5";
262 samsung,pin-function = <2>; 260 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
263 samsung,pin-pud = <PIN_PULL_NONE>; 261 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
264 }; 262 };
265 263
266 sd0_cd: sd0-cd { 264 sd0_cd: sd0-cd {
267 samsung,pins = "gpg-6"; 265 samsung,pins = "gpg-6";
268 samsung,pin-function = <2>; 266 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
269 samsung,pin-pud = <PIN_PULL_UP>; 267 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
270 }; 268 };
271 269
272 sd1_cmd: sd1-cmd { 270 sd1_cmd: sd1-cmd {
273 samsung,pins = "gph-1"; 271 samsung,pins = "gph-1";
274 samsung,pin-function = <2>; 272 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
275 samsung,pin-pud = <PIN_PULL_NONE>; 273 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
276 }; 274 };
277 275
278 sd1_clk: sd1-clk { 276 sd1_clk: sd1-clk {
279 samsung,pins = "gph-0"; 277 samsung,pins = "gph-0";
280 samsung,pin-function = <2>; 278 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
281 samsung,pin-pud = <PIN_PULL_NONE>; 279 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
282 }; 280 };
283 281
284 sd1_bus1: sd1-bus1 { 282 sd1_bus1: sd1-bus1 {
285 samsung,pins = "gph-2"; 283 samsung,pins = "gph-2";
286 samsung,pin-function = <2>; 284 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
287 samsung,pin-pud = <PIN_PULL_NONE>; 285 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
288 }; 286 };
289 287
290 sd1_bus4: sd1-bus4 { 288 sd1_bus4: sd1-bus4 {
291 samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5"; 289 samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5";
292 samsung,pin-function = <2>; 290 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
293 samsung,pin-pud = <PIN_PULL_NONE>; 291 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
294 }; 292 };
295 293
296 sd1_bus8: sd1-bus8 { 294 sd1_bus8: sd1-bus8 {
297 samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5", 295 samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5",
298 "gph-6", "gph-7", "gph-8", "gph-9"; 296 "gph-6", "gph-7", "gph-8", "gph-9";
299 samsung,pin-function = <2>; 297 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
300 samsung,pin-pud = <PIN_PULL_NONE>; 298 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
301 }; 299 };
302 300
303 sd1_cd: sd1-cd { 301 sd1_cd: sd1-cd {
304 samsung,pins = "gpg-6"; 302 samsung,pins = "gpg-6";
305 samsung,pin-function = <3>; 303 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
306 samsung,pin-pud = <PIN_PULL_UP>; 304 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
307 }; 305 };
308 306
309 sd2_cmd: sd2-cmd { 307 sd2_cmd: sd2-cmd {
310 samsung,pins = "gpc-4"; 308 samsung,pins = "gpc-4";
311 samsung,pin-function = <3>; 309 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
312 samsung,pin-pud = <PIN_PULL_NONE>; 310 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
313 }; 311 };
314 312
315 sd2_clk: sd2-clk { 313 sd2_clk: sd2-clk {
316 samsung,pins = "gpc-5"; 314 samsung,pins = "gpc-5";
317 samsung,pin-function = <3>; 315 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
318 samsung,pin-pud = <PIN_PULL_NONE>; 316 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
319 }; 317 };
320 318
321 sd2_bus1: sd2-bus1 { 319 sd2_bus1: sd2-bus1 {
322 samsung,pins = "gph-6"; 320 samsung,pins = "gph-6";
323 samsung,pin-function = <3>; 321 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
324 samsung,pin-pud = <PIN_PULL_NONE>; 322 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
325 }; 323 };
326 324
327 sd2_bus4: sd2-bus4 { 325 sd2_bus4: sd2-bus4 {
328 samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9"; 326 samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9";
329 samsung,pin-function = <3>; 327 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
330 samsung,pin-pud = <PIN_PULL_NONE>; 328 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
331 }; 329 };
332 330
333 i2s0_bus: i2s0-bus { 331 i2s0_bus: i2s0-bus {
334 samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; 332 samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
335 samsung,pin-function = <3>; 333 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
336 samsung,pin-pud = <PIN_PULL_NONE>; 334 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
337 }; 335 };
338 336
339 i2s0_cdclk: i2s0-cdclk { 337 i2s0_cdclk: i2s0-cdclk {
340 samsung,pins = "gpd-1"; 338 samsung,pins = "gpd-1";
341 samsung,pin-function = <3>; 339 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
342 samsung,pin-pud = <PIN_PULL_NONE>; 340 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
343 }; 341 };
344 342
345 i2s1_bus: i2s1-bus { 343 i2s1_bus: i2s1-bus {
346 samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; 344 samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
347 samsung,pin-function = <3>; 345 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
348 samsung,pin-pud = <PIN_PULL_NONE>; 346 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
349 }; 347 };
350 348
351 i2s1_cdclk: i2s1-cdclk { 349 i2s1_cdclk: i2s1-cdclk {
352 samsung,pins = "gpe-1"; 350 samsung,pins = "gpe-1";
353 samsung,pin-function = <3>; 351 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
354 samsung,pin-pud = <PIN_PULL_NONE>; 352 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
355 }; 353 };
356 354
357 i2s2_bus: i2s2-bus { 355 i2s2_bus: i2s2-bus {
358 /* S3C6410-only */ 356 /* S3C6410-only */
359 samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6", 357 samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6",
360 "gph-8", "gph-9"; 358 "gph-8", "gph-9";
361 samsung,pin-function = <5>; 359 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
362 samsung,pin-pud = <PIN_PULL_NONE>; 360 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
363 }; 361 };
364 362
365 i2s2_cdclk: i2s2-cdclk { 363 i2s2_cdclk: i2s2-cdclk {
366 /* S3C6410-only */ 364 /* S3C6410-only */
367 samsung,pins = "gph-7"; 365 samsung,pins = "gph-7";
368 samsung,pin-function = <5>; 366 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
369 samsung,pin-pud = <PIN_PULL_NONE>; 367 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
370 }; 368 };
371 369
372 pcm0_bus: pcm0-bus { 370 pcm0_bus: pcm0-bus {
373 samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; 371 samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
374 samsung,pin-function = <2>; 372 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
375 samsung,pin-pud = <PIN_PULL_NONE>; 373 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
376 }; 374 };
377 375
378 pcm0_extclk: pcm0-extclk { 376 pcm0_extclk: pcm0-extclk {
379 samsung,pins = "gpd-1"; 377 samsung,pins = "gpd-1";
380 samsung,pin-function = <2>; 378 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
381 samsung,pin-pud = <PIN_PULL_NONE>; 379 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
382 }; 380 };
383 381
384 pcm1_bus: pcm1-bus { 382 pcm1_bus: pcm1-bus {
385 samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; 383 samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
386 samsung,pin-function = <2>; 384 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
387 samsung,pin-pud = <PIN_PULL_NONE>; 385 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
388 }; 386 };
389 387
390 pcm1_extclk: pcm1-extclk { 388 pcm1_extclk: pcm1-extclk {
391 samsung,pins = "gpe-1"; 389 samsung,pins = "gpe-1";
392 samsung,pin-function = <2>; 390 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
393 samsung,pin-pud = <PIN_PULL_NONE>; 391 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
394 }; 392 };
395 393
396 ac97_bus_0: ac97-bus-0 { 394 ac97_bus_0: ac97-bus-0 {
397 samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4"; 395 samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4";
398 samsung,pin-function = <4>; 396 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
399 samsung,pin-pud = <PIN_PULL_NONE>; 397 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
400 }; 398 };
401 399
402 ac97_bus_1: ac97-bus-1 { 400 ac97_bus_1: ac97-bus-1 {
403 samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4"; 401 samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4";
404 samsung,pin-function = <4>; 402 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
405 samsung,pin-pud = <PIN_PULL_NONE>; 403 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
406 }; 404 };
407 405
408 cam_port: cam-port { 406 cam_port: cam-port {
409 samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4", 407 samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4",
410 "gpf-5", "gpf-6", "gpf-7", "gpf-8", 408 "gpf-5", "gpf-6", "gpf-7", "gpf-8",
411 "gpf-9", "gpf-10", "gpf-11", "gpf-12"; 409 "gpf-9", "gpf-10", "gpf-11", "gpf-12";
412 samsung,pin-function = <2>; 410 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
413 samsung,pin-pud = <PIN_PULL_NONE>; 411 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
414 }; 412 };
415 413
416 cam_rst: cam-rst { 414 cam_rst: cam-rst {
417 samsung,pins = "gpf-3"; 415 samsung,pins = "gpf-3";
418 samsung,pin-function = <2>; 416 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
419 samsung,pin-pud = <PIN_PULL_NONE>; 417 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
420 }; 418 };
421 419
422 cam_field: cam-field { 420 cam_field: cam-field {
423 /* S3C6410-only */ 421 /* S3C6410-only */
424 samsung,pins = "gpb-4"; 422 samsung,pins = "gpb-4";
425 samsung,pin-function = <3>; 423 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
426 samsung,pin-pud = <PIN_PULL_NONE>; 424 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
427 }; 425 };
428 426
429 pwm_extclk: pwm-extclk { 427 pwm_extclk: pwm-extclk {
430 samsung,pins = "gpf-13"; 428 samsung,pins = "gpf-13";
431 samsung,pin-function = <2>; 429 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
432 samsung,pin-pud = <PIN_PULL_NONE>; 430 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
433 }; 431 };
434 432
435 pwm0_out: pwm0-out { 433 pwm0_out: pwm0-out {
436 samsung,pins = "gpf-14"; 434 samsung,pins = "gpf-14";
437 samsung,pin-function = <2>; 435 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
438 samsung,pin-pud = <PIN_PULL_NONE>; 436 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
439 }; 437 };
440 438
441 pwm1_out: pwm1-out { 439 pwm1_out: pwm1-out {
442 samsung,pins = "gpf-15"; 440 samsung,pins = "gpf-15";
443 samsung,pin-function = <2>; 441 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
444 samsung,pin-pud = <PIN_PULL_NONE>; 442 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
445 }; 443 };
446 444
447 clkout0: clkout-0 { 445 clkout0: clkout-0 {
448 samsung,pins = "gpf-14"; 446 samsung,pins = "gpf-14";
449 samsung,pin-function = <3>; 447 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
450 samsung,pin-pud = <PIN_PULL_NONE>; 448 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
451 }; 449 };
452 450
453 keypad_col0_0: keypad-col0-0 { 451 keypad_col0_0: keypad-col0-0 {
454 samsung,pins = "gph-0"; 452 samsung,pins = "gph-0";
455 samsung,pin-function = <4>; 453 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
456 samsung,pin-pud = <PIN_PULL_NONE>; 454 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
457 }; 455 };
458 456
459 keypad_col1_0: keypad-col1-0 { 457 keypad_col1_0: keypad-col1-0 {
460 samsung,pins = "gph-1"; 458 samsung,pins = "gph-1";
461 samsung,pin-function = <4>; 459 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
462 samsung,pin-pud = <PIN_PULL_NONE>; 460 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
463 }; 461 };
464 462
465 keypad_col2_0: keypad-col2-0 { 463 keypad_col2_0: keypad-col2-0 {
466 samsung,pins = "gph-2"; 464 samsung,pins = "gph-2";
467 samsung,pin-function = <4>; 465 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
468 samsung,pin-pud = <PIN_PULL_NONE>; 466 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
469 }; 467 };
470 468
471 keypad_col3_0: keypad-col3-0 { 469 keypad_col3_0: keypad-col3-0 {
472 samsung,pins = "gph-3"; 470 samsung,pins = "gph-3";
473 samsung,pin-function = <4>; 471 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
474 samsung,pin-pud = <PIN_PULL_NONE>; 472 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
475 }; 473 };
476 474
477 keypad_col4_0: keypad-col4-0 { 475 keypad_col4_0: keypad-col4-0 {
478 samsung,pins = "gph-4"; 476 samsung,pins = "gph-4";
479 samsung,pin-function = <4>; 477 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
480 samsung,pin-pud = <PIN_PULL_NONE>; 478 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
481 }; 479 };
482 480
483 keypad_col5_0: keypad-col5-0 { 481 keypad_col5_0: keypad-col5-0 {
484 samsung,pins = "gph-5"; 482 samsung,pins = "gph-5";
485 samsung,pin-function = <4>; 483 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
486 samsung,pin-pud = <PIN_PULL_NONE>; 484 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
487 }; 485 };
488 486
489 keypad_col6_0: keypad-col6-0 { 487 keypad_col6_0: keypad-col6-0 {
490 samsung,pins = "gph-6"; 488 samsung,pins = "gph-6";
491 samsung,pin-function = <4>; 489 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
492 samsung,pin-pud = <PIN_PULL_NONE>; 490 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
493 }; 491 };
494 492
495 keypad_col7_0: keypad-col7-0 { 493 keypad_col7_0: keypad-col7-0 {
496 samsung,pins = "gph-7"; 494 samsung,pins = "gph-7";
497 samsung,pin-function = <4>; 495 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
498 samsung,pin-pud = <PIN_PULL_NONE>; 496 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
499 }; 497 };
500 498
501 keypad_col0_1: keypad-col0-1 { 499 keypad_col0_1: keypad-col0-1 {
502 samsung,pins = "gpl-0"; 500 samsung,pins = "gpl-0";
503 samsung,pin-function = <3>; 501 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
504 samsung,pin-pud = <PIN_PULL_NONE>; 502 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
505 }; 503 };
506 504
507 keypad_col1_1: keypad-col1-1 { 505 keypad_col1_1: keypad-col1-1 {
508 samsung,pins = "gpl-1"; 506 samsung,pins = "gpl-1";
509 samsung,pin-function = <3>; 507 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
510 samsung,pin-pud = <PIN_PULL_NONE>; 508 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
511 }; 509 };
512 510
513 keypad_col2_1: keypad-col2-1 { 511 keypad_col2_1: keypad-col2-1 {
514 samsung,pins = "gpl-2"; 512 samsung,pins = "gpl-2";
515 samsung,pin-function = <3>; 513 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
516 samsung,pin-pud = <PIN_PULL_NONE>; 514 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
517 }; 515 };
518 516
519 keypad_col3_1: keypad-col3-1 { 517 keypad_col3_1: keypad-col3-1 {
520 samsung,pins = "gpl-3"; 518 samsung,pins = "gpl-3";
521 samsung,pin-function = <3>; 519 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
522 samsung,pin-pud = <PIN_PULL_NONE>; 520 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
523 }; 521 };
524 522
525 keypad_col4_1: keypad-col4-1 { 523 keypad_col4_1: keypad-col4-1 {
526 samsung,pins = "gpl-4"; 524 samsung,pins = "gpl-4";
527 samsung,pin-function = <3>; 525 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
528 samsung,pin-pud = <PIN_PULL_NONE>; 526 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
529 }; 527 };
530 528
531 keypad_col5_1: keypad-col5-1 { 529 keypad_col5_1: keypad-col5-1 {
532 samsung,pins = "gpl-5"; 530 samsung,pins = "gpl-5";
533 samsung,pin-function = <3>; 531 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
534 samsung,pin-pud = <PIN_PULL_NONE>; 532 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
535 }; 533 };
536 534
537 keypad_col6_1: keypad-col6-1 { 535 keypad_col6_1: keypad-col6-1 {
538 samsung,pins = "gpl-6"; 536 samsung,pins = "gpl-6";
539 samsung,pin-function = <3>; 537 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
540 samsung,pin-pud = <PIN_PULL_NONE>; 538 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
541 }; 539 };
542 540
543 keypad_col7_1: keypad-col7-1 { 541 keypad_col7_1: keypad-col7-1 {
544 samsung,pins = "gpl-7"; 542 samsung,pins = "gpl-7";
545 samsung,pin-function = <3>; 543 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
546 samsung,pin-pud = <PIN_PULL_NONE>; 544 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
547 }; 545 };
548 546
549 keypad_row0_0: keypad-row0-0 { 547 keypad_row0_0: keypad-row0-0 {
550 samsung,pins = "gpk-8"; 548 samsung,pins = "gpk-8";
551 samsung,pin-function = <3>; 549 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
552 samsung,pin-pud = <PIN_PULL_NONE>; 550 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
553 }; 551 };
554 552
555 keypad_row1_0: keypad-row1-0 { 553 keypad_row1_0: keypad-row1-0 {
556 samsung,pins = "gpk-9"; 554 samsung,pins = "gpk-9";
557 samsung,pin-function = <3>; 555 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
558 samsung,pin-pud = <PIN_PULL_NONE>; 556 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
559 }; 557 };
560 558
561 keypad_row2_0: keypad-row2-0 { 559 keypad_row2_0: keypad-row2-0 {
562 samsung,pins = "gpk-10"; 560 samsung,pins = "gpk-10";
563 samsung,pin-function = <3>; 561 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
564 samsung,pin-pud = <PIN_PULL_NONE>; 562 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
565 }; 563 };
566 564
567 keypad_row3_0: keypad-row3-0 { 565 keypad_row3_0: keypad-row3-0 {
568 samsung,pins = "gpk-11"; 566 samsung,pins = "gpk-11";
569 samsung,pin-function = <3>; 567 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
570 samsung,pin-pud = <PIN_PULL_NONE>; 568 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
571 }; 569 };
572 570
573 keypad_row4_0: keypad-row4-0 { 571 keypad_row4_0: keypad-row4-0 {
574 samsung,pins = "gpk-12"; 572 samsung,pins = "gpk-12";
575 samsung,pin-function = <3>; 573 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
576 samsung,pin-pud = <PIN_PULL_NONE>; 574 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
577 }; 575 };
578 576
579 keypad_row5_0: keypad-row5-0 { 577 keypad_row5_0: keypad-row5-0 {
580 samsung,pins = "gpk-13"; 578 samsung,pins = "gpk-13";
581 samsung,pin-function = <3>; 579 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
582 samsung,pin-pud = <PIN_PULL_NONE>; 580 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
583 }; 581 };
584 582
585 keypad_row6_0: keypad-row6-0 { 583 keypad_row6_0: keypad-row6-0 {
586 samsung,pins = "gpk-14"; 584 samsung,pins = "gpk-14";
587 samsung,pin-function = <3>; 585 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
588 samsung,pin-pud = <PIN_PULL_NONE>; 586 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
589 }; 587 };
590 588
591 keypad_row7_0: keypad-row7-0 { 589 keypad_row7_0: keypad-row7-0 {
592 samsung,pins = "gpk-15"; 590 samsung,pins = "gpk-15";
593 samsung,pin-function = <3>; 591 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
594 samsung,pin-pud = <PIN_PULL_NONE>; 592 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
595 }; 593 };
596 594
597 keypad_row0_1: keypad-row0-1 { 595 keypad_row0_1: keypad-row0-1 {
598 samsung,pins = "gpn-0"; 596 samsung,pins = "gpn-0";
599 samsung,pin-function = <3>; 597 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
600 samsung,pin-pud = <PIN_PULL_NONE>; 598 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
601 }; 599 };
602 600
603 keypad_row1_1: keypad-row1-1 { 601 keypad_row1_1: keypad-row1-1 {
604 samsung,pins = "gpn-1"; 602 samsung,pins = "gpn-1";
605 samsung,pin-function = <3>; 603 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
606 samsung,pin-pud = <PIN_PULL_NONE>; 604 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
607 }; 605 };
608 606
609 keypad_row2_1: keypad-row2-1 { 607 keypad_row2_1: keypad-row2-1 {
610 samsung,pins = "gpn-2"; 608 samsung,pins = "gpn-2";
611 samsung,pin-function = <3>; 609 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
612 samsung,pin-pud = <PIN_PULL_NONE>; 610 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
613 }; 611 };
614 612
615 keypad_row3_1: keypad-row3-1 { 613 keypad_row3_1: keypad-row3-1 {
616 samsung,pins = "gpn-3"; 614 samsung,pins = "gpn-3";
617 samsung,pin-function = <3>; 615 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
618 samsung,pin-pud = <PIN_PULL_NONE>; 616 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
619 }; 617 };
620 618
621 keypad_row4_1: keypad-row4-1 { 619 keypad_row4_1: keypad-row4-1 {
622 samsung,pins = "gpn-4"; 620 samsung,pins = "gpn-4";
623 samsung,pin-function = <3>; 621 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
624 samsung,pin-pud = <PIN_PULL_NONE>; 622 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
625 }; 623 };
626 624
627 keypad_row5_1: keypad-row5-1 { 625 keypad_row5_1: keypad-row5-1 {
628 samsung,pins = "gpn-5"; 626 samsung,pins = "gpn-5";
629 samsung,pin-function = <3>; 627 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
630 samsung,pin-pud = <PIN_PULL_NONE>; 628 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
631 }; 629 };
632 630
633 keypad_row6_1: keypad-row6-1 { 631 keypad_row6_1: keypad-row6-1 {
634 samsung,pins = "gpn-6"; 632 samsung,pins = "gpn-6";
635 samsung,pin-function = <3>; 633 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
636 samsung,pin-pud = <PIN_PULL_NONE>; 634 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
637 }; 635 };
638 636
639 keypad_row7_1: keypad-row7-1 { 637 keypad_row7_1: keypad-row7-1 {
640 samsung,pins = "gpn-7"; 638 samsung,pins = "gpn-7";
641 samsung,pin-function = <3>; 639 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
642 samsung,pin-pud = <PIN_PULL_NONE>; 640 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
643 }; 641 };
644 642
645 lcd_ctrl: lcd-ctrl { 643 lcd_ctrl: lcd-ctrl {
646 samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11"; 644 samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11";
647 samsung,pin-function = <2>; 645 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
648 samsung,pin-pud = <PIN_PULL_NONE>; 646 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
649 }; 647 };
650 648
651 lcd_data16: lcd-data-width16 { 649 lcd_data16: lcd-data-width16 {
@@ -653,8 +651,8 @@
653 "gpi-7", "gpi-10", "gpi-11", "gpi-12", 651 "gpi-7", "gpi-10", "gpi-11", "gpi-12",
654 "gpi-13", "gpi-14", "gpi-15", "gpj-3", 652 "gpi-13", "gpi-14", "gpi-15", "gpj-3",
655 "gpj-4", "gpj-5", "gpj-6", "gpj-7"; 653 "gpj-4", "gpj-5", "gpj-6", "gpj-7";
656 samsung,pin-function = <2>; 654 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
657 samsung,pin-pud = <PIN_PULL_NONE>; 655 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
658 }; 656 };
659 657
660 lcd_data18: lcd-data-width18 { 658 lcd_data18: lcd-data-width18 {
@@ -663,8 +661,8 @@
663 "gpi-12", "gpi-13", "gpi-14", "gpi-15", 661 "gpi-12", "gpi-13", "gpi-14", "gpi-15",
664 "gpj-2", "gpj-3", "gpj-4", "gpj-5", 662 "gpj-2", "gpj-3", "gpj-4", "gpj-5",
665 "gpj-6", "gpj-7"; 663 "gpj-6", "gpj-7";
666 samsung,pin-function = <2>; 664 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
667 samsung,pin-pud = <PIN_PULL_NONE>; 665 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
668 }; 666 };
669 667
670 lcd_data24: lcd-data-width24 { 668 lcd_data24: lcd-data-width24 {
@@ -674,14 +672,14 @@
674 "gpi-12", "gpi-13", "gpi-14", "gpi-15", 672 "gpi-12", "gpi-13", "gpi-14", "gpi-15",
675 "gpj-0", "gpj-1", "gpj-2", "gpj-3", 673 "gpj-0", "gpj-1", "gpj-2", "gpj-3",
676 "gpj-4", "gpj-5", "gpj-6", "gpj-7"; 674 "gpj-4", "gpj-5", "gpj-6", "gpj-7";
677 samsung,pin-function = <2>; 675 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
678 samsung,pin-pud = <PIN_PULL_NONE>; 676 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
679 }; 677 };
680 678
681 hsi_bus: hsi-bus { 679 hsi_bus: hsi-bus {
682 samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3", 680 samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3",
683 "gpk-4", "gpk-5", "gpk-6", "gpk-7"; 681 "gpk-4", "gpk-5", "gpk-6", "gpk-7";
684 samsung,pin-function = <3>; 682 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
685 samsung,pin-pud = <PIN_PULL_NONE>; 683 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
686 }; 684 };
687}; 685};
diff --git a/arch/arm/boot/dts/s5pv210-aquila.dts b/arch/arm/boot/dts/s5pv210-aquila.dts
index da24ab570b0e..40139923eef0 100644
--- a/arch/arm/boot/dts/s5pv210-aquila.dts
+++ b/arch/arm/boot/dts/s5pv210-aquila.dts
@@ -29,7 +29,7 @@
29 bootargs = "console=ttySAC2,115200n8 root=/dev/mmcblk1p5 rw rootwait ignore_loglevel earlyprintk"; 29 bootargs = "console=ttySAC2,115200n8 root=/dev/mmcblk1p5 rw rootwait ignore_loglevel earlyprintk";
30 }; 30 };
31 31
32 memory { 32 memory@30000000 {
33 device_type = "memory"; 33 device_type = "memory";
34 reg = <0x30000000 0x05000000 34 reg = <0x30000000 0x05000000
35 0x40000000 0x18000000>; 35 0x40000000 0x18000000>;
@@ -387,7 +387,7 @@
387&pinctrl0 { 387&pinctrl0 {
388 t_flash_detect: t-flash-detect { 388 t_flash_detect: t-flash-detect {
389 samsung,pins = "gph3-4"; 389 samsung,pins = "gph3-4";
390 samsung,pin-function = <0>; 390 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
391 samsung,pin-pud = <0>; 391 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
392 }; 392 };
393}; 393};
diff --git a/arch/arm/boot/dts/s5pv210-goni.dts b/arch/arm/boot/dts/s5pv210-goni.dts
index 0a33d402138e..c56f51ee7897 100644
--- a/arch/arm/boot/dts/s5pv210-goni.dts
+++ b/arch/arm/boot/dts/s5pv210-goni.dts
@@ -29,7 +29,7 @@
29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p5 rw rootwait ignore_loglevel earlyprintk"; 29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p5 rw rootwait ignore_loglevel earlyprintk";
30 }; 30 };
31 31
32 memory { 32 memory@30000000 {
33 device_type = "memory"; 33 device_type = "memory";
34 reg = <0x30000000 0x05000000 34 reg = <0x30000000 0x05000000
35 0x40000000 0x10000000 35 0x40000000 0x10000000
diff --git a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
index 8c714088e3c6..9a3e851e2e22 100644
--- a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
@@ -19,6 +19,8 @@
19 * published by the Free Software Foundation. 19 * published by the Free Software Foundation.
20 */ 20 */
21 21
22#include <dt-bindings/pinctrl/samsung.h>
23
22&pinctrl0 { 24&pinctrl0 {
23 gpa0: gpa0 { 25 gpa0: gpa0 {
24 gpio-controller; 26 gpio-controller;
@@ -270,559 +272,559 @@
270 272
271 uart0_data: uart0-data { 273 uart0_data: uart0-data {
272 samsung,pins = "gpa0-0", "gpa0-1"; 274 samsung,pins = "gpa0-0", "gpa0-1";
273 samsung,pin-function = <2>; 275 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
274 samsung,pin-pud = <0>; 276 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
275 samsung,pin-drv = <0>; 277 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
276 }; 278 };
277 279
278 uart0_fctl: uart0-fctl { 280 uart0_fctl: uart0-fctl {
279 samsung,pins = "gpa0-2", "gpa0-3"; 281 samsung,pins = "gpa0-2", "gpa0-3";
280 samsung,pin-function = <2>; 282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
281 samsung,pin-pud = <0>; 283 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
282 samsung,pin-drv = <0>; 284 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
283 }; 285 };
284 286
285 uart1_data: uart1-data { 287 uart1_data: uart1-data {
286 samsung,pins = "gpa0-4", "gpa0-5"; 288 samsung,pins = "gpa0-4", "gpa0-5";
287 samsung,pin-function = <2>; 289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
288 samsung,pin-pud = <0>; 290 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
289 samsung,pin-drv = <0>; 291 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
290 }; 292 };
291 293
292 uart1_fctl: uart1-fctl { 294 uart1_fctl: uart1-fctl {
293 samsung,pins = "gpa0-6", "gpa0-7"; 295 samsung,pins = "gpa0-6", "gpa0-7";
294 samsung,pin-function = <2>; 296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
295 samsung,pin-pud = <0>; 297 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
296 samsung,pin-drv = <0>; 298 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
297 }; 299 };
298 300
299 uart2_data: uart2-data { 301 uart2_data: uart2-data {
300 samsung,pins = "gpa1-0", "gpa1-1"; 302 samsung,pins = "gpa1-0", "gpa1-1";
301 samsung,pin-function = <2>; 303 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
302 samsung,pin-pud = <0>; 304 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
303 samsung,pin-drv = <0>; 305 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
304 }; 306 };
305 307
306 uart2_fctl: uart2-fctl { 308 uart2_fctl: uart2-fctl {
307 samsung,pins = "gpa1-2", "gpa1-3"; 309 samsung,pins = "gpa1-2", "gpa1-3";
308 samsung,pin-function = <3>; 310 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
309 samsung,pin-pud = <0>; 311 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
310 samsung,pin-drv = <0>; 312 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
311 }; 313 };
312 314
313 uart3_data: uart3-data { 315 uart3_data: uart3-data {
314 samsung,pins = "gpa1-2", "gpa1-3"; 316 samsung,pins = "gpa1-2", "gpa1-3";
315 samsung,pin-function = <2>; 317 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
316 samsung,pin-pud = <0>; 318 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
317 samsung,pin-drv = <0>; 319 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
318 }; 320 };
319 321
320 uart_audio: uart-audio { 322 uart_audio: uart-audio {
321 samsung,pins = "gpa1-2", "gpa1-3"; 323 samsung,pins = "gpa1-2", "gpa1-3";
322 samsung,pin-function = <4>; 324 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
323 samsung,pin-pud = <0>; 325 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
324 samsung,pin-drv = <0>; 326 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
325 }; 327 };
326 328
327 spi0_bus: spi0-bus { 329 spi0_bus: spi0-bus {
328 samsung,pins = "gpb-0", "gpb-2", "gpb-3"; 330 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
329 samsung,pin-function = <2>; 331 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
330 samsung,pin-pud = <2>; 332 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
331 samsung,pin-drv = <0>; 333 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
332 }; 334 };
333 335
334 spi1_bus: spi1-bus { 336 spi1_bus: spi1-bus {
335 samsung,pins = "gpb-4", "gpb-6", "gpb-7"; 337 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
336 samsung,pin-function = <2>; 338 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
337 samsung,pin-pud = <2>; 339 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
338 samsung,pin-drv = <0>; 340 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
339 }; 341 };
340 342
341 i2s0_bus: i2s0-bus { 343 i2s0_bus: i2s0-bus {
342 samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3", 344 samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3",
343 "gpi-4", "gpi-5", "gpi-6"; 345 "gpi-4", "gpi-5", "gpi-6";
344 samsung,pin-function = <2>; 346 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
345 samsung,pin-pud = <0>; 347 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
346 samsung,pin-drv = <0>; 348 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
347 }; 349 };
348 350
349 i2s1_bus: i2s1-bus { 351 i2s1_bus: i2s1-bus {
350 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 352 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
351 "gpc0-4"; 353 "gpc0-4";
352 samsung,pin-function = <2>; 354 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
353 samsung,pin-pud = <0>; 355 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
354 samsung,pin-drv = <0>; 356 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
355 }; 357 };
356 358
357 i2s2_bus: i2s2-bus { 359 i2s2_bus: i2s2-bus {
358 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 360 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
359 "gpc1-4"; 361 "gpc1-4";
360 samsung,pin-function = <4>; 362 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
361 samsung,pin-pud = <0>; 363 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
362 samsung,pin-drv = <0>; 364 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
363 }; 365 };
364 366
365 pcm1_bus: pcm1-bus { 367 pcm1_bus: pcm1-bus {
366 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 368 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
367 "gpc0-4"; 369 "gpc0-4";
368 samsung,pin-function = <3>; 370 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
369 samsung,pin-pud = <0>; 371 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
370 samsung,pin-drv = <0>; 372 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
371 }; 373 };
372 374
373 ac97_bus: ac97-bus { 375 ac97_bus: ac97-bus {
374 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", 376 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
375 "gpc0-4"; 377 "gpc0-4";
376 samsung,pin-function = <4>; 378 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
377 samsung,pin-pud = <0>; 379 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
378 samsung,pin-drv = <0>; 380 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
379 }; 381 };
380 382
381 i2s2_bus: i2s2-bus { 383 i2s2_bus: i2s2-bus {
382 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 384 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
383 "gpc1-4"; 385 "gpc1-4";
384 samsung,pin-function = <2>; 386 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
385 samsung,pin-pud = <0>; 387 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
386 samsung,pin-drv = <0>; 388 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
387 }; 389 };
388 390
389 pcm2_bus: pcm2-bus { 391 pcm2_bus: pcm2-bus {
390 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", 392 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
391 "gpc1-4"; 393 "gpc1-4";
392 samsung,pin-function = <3>; 394 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
393 samsung,pin-pud = <0>; 395 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
394 samsung,pin-drv = <0>; 396 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
395 }; 397 };
396 398
397 spdif_bus: spdif-bus { 399 spdif_bus: spdif-bus {
398 samsung,pins = "gpc1-0", "gpc1-1"; 400 samsung,pins = "gpc1-0", "gpc1-1";
399 samsung,pin-function = <4>; 401 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
400 samsung,pin-pud = <0>; 402 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
401 samsung,pin-drv = <0>; 403 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
402 }; 404 };
403 405
404 spi2_bus: spi2-bus { 406 spi2_bus: spi2-bus {
405 samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; 407 samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4";
406 samsung,pin-function = <5>; 408 samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
407 samsung,pin-pud = <2>; 409 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
408 samsung,pin-drv = <0>; 410 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
409 }; 411 };
410 412
411 i2c0_bus: i2c0-bus { 413 i2c0_bus: i2c0-bus {
412 samsung,pins = "gpd1-0", "gpd1-1"; 414 samsung,pins = "gpd1-0", "gpd1-1";
413 samsung,pin-function = <2>; 415 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
414 samsung,pin-pud = <2>; 416 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
415 samsung,pin-drv = <0>; 417 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
416 }; 418 };
417 419
418 i2c1_bus: i2c1-bus { 420 i2c1_bus: i2c1-bus {
419 samsung,pins = "gpd1-2", "gpd1-3"; 421 samsung,pins = "gpd1-2", "gpd1-3";
420 samsung,pin-function = <2>; 422 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
421 samsung,pin-pud = <2>; 423 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
422 samsung,pin-drv = <0>; 424 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
423 }; 425 };
424 426
425 i2c2_bus: i2c2-bus { 427 i2c2_bus: i2c2-bus {
426 samsung,pins = "gpd1-4", "gpd1-5"; 428 samsung,pins = "gpd1-4", "gpd1-5";
427 samsung,pin-function = <2>; 429 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
428 samsung,pin-pud = <2>; 430 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
429 samsung,pin-drv = <0>; 431 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
430 }; 432 };
431 433
432 pwm0_out: pwm0-out { 434 pwm0_out: pwm0-out {
433 samsung,pins = "gpd0-0"; 435 samsung,pins = "gpd0-0";
434 samsung,pin-function = <2>; 436 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
435 samsung,pin-pud = <0>; 437 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
436 samsung,pin-drv = <0>; 438 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
437 }; 439 };
438 440
439 pwm1_out: pwm1-out { 441 pwm1_out: pwm1-out {
440 samsung,pins = "gpd0-1"; 442 samsung,pins = "gpd0-1";
441 samsung,pin-function = <2>; 443 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
442 samsung,pin-pud = <0>; 444 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
443 samsung,pin-drv = <0>; 445 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
444 }; 446 };
445 447
446 pwm2_out: pwm2-out { 448 pwm2_out: pwm2-out {
447 samsung,pins = "gpd0-2"; 449 samsung,pins = "gpd0-2";
448 samsung,pin-function = <2>; 450 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
449 samsung,pin-pud = <0>; 451 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
450 samsung,pin-drv = <0>; 452 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
451 }; 453 };
452 454
453 pwm3_out: pwm3-out { 455 pwm3_out: pwm3-out {
454 samsung,pins = "gpd0-3"; 456 samsung,pins = "gpd0-3";
455 samsung,pin-function = <2>; 457 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
456 samsung,pin-pud = <0>; 458 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
457 samsung,pin-drv = <0>; 459 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
458 }; 460 };
459 461
460 keypad_row0: keypad-row-0 { 462 keypad_row0: keypad-row-0 {
461 samsung,pins = "gph3-0"; 463 samsung,pins = "gph3-0";
462 samsung,pin-function = <3>; 464 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
463 samsung,pin-pud = <0>; 465 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
464 samsung,pin-drv = <0>; 466 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
465 }; 467 };
466 468
467 keypad_row1: keypad-row-1 { 469 keypad_row1: keypad-row-1 {
468 samsung,pins = "gph3-1"; 470 samsung,pins = "gph3-1";
469 samsung,pin-function = <3>; 471 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
470 samsung,pin-pud = <0>; 472 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
471 samsung,pin-drv = <0>; 473 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
472 }; 474 };
473 475
474 keypad_row2: keypad-row-2 { 476 keypad_row2: keypad-row-2 {
475 samsung,pins = "gph3-2"; 477 samsung,pins = "gph3-2";
476 samsung,pin-function = <3>; 478 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
477 samsung,pin-pud = <0>; 479 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
478 samsung,pin-drv = <0>; 480 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
479 }; 481 };
480 482
481 keypad_row3: keypad-row-3 { 483 keypad_row3: keypad-row-3 {
482 samsung,pins = "gph3-3"; 484 samsung,pins = "gph3-3";
483 samsung,pin-function = <3>; 485 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
484 samsung,pin-pud = <0>; 486 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
485 samsung,pin-drv = <0>; 487 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
486 }; 488 };
487 489
488 keypad_row4: keypad-row-4 { 490 keypad_row4: keypad-row-4 {
489 samsung,pins = "gph3-4"; 491 samsung,pins = "gph3-4";
490 samsung,pin-function = <3>; 492 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
491 samsung,pin-pud = <0>; 493 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
492 samsung,pin-drv = <0>; 494 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
493 }; 495 };
494 496
495 keypad_row5: keypad-row-5 { 497 keypad_row5: keypad-row-5 {
496 samsung,pins = "gph3-5"; 498 samsung,pins = "gph3-5";
497 samsung,pin-function = <3>; 499 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
498 samsung,pin-pud = <0>; 500 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
499 samsung,pin-drv = <0>; 501 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
500 }; 502 };
501 503
502 keypad_row6: keypad-row-6 { 504 keypad_row6: keypad-row-6 {
503 samsung,pins = "gph3-6"; 505 samsung,pins = "gph3-6";
504 samsung,pin-function = <3>; 506 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
505 samsung,pin-pud = <0>; 507 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
506 samsung,pin-drv = <0>; 508 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
507 }; 509 };
508 510
509 keypad_row7: keypad-row-7 { 511 keypad_row7: keypad-row-7 {
510 samsung,pins = "gph3-7"; 512 samsung,pins = "gph3-7";
511 samsung,pin-function = <3>; 513 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
512 samsung,pin-pud = <0>; 514 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
513 samsung,pin-drv = <0>; 515 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
514 }; 516 };
515 517
516 keypad_col0: keypad-col-0 { 518 keypad_col0: keypad-col-0 {
517 samsung,pins = "gph2-0"; 519 samsung,pins = "gph2-0";
518 samsung,pin-function = <3>; 520 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
519 samsung,pin-pud = <0>; 521 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
520 samsung,pin-drv = <0>; 522 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
521 }; 523 };
522 524
523 keypad_col1: keypad-col-1 { 525 keypad_col1: keypad-col-1 {
524 samsung,pins = "gph2-1"; 526 samsung,pins = "gph2-1";
525 samsung,pin-function = <3>; 527 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
526 samsung,pin-pud = <0>; 528 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
527 samsung,pin-drv = <0>; 529 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
528 }; 530 };
529 531
530 keypad_col2: keypad-col-2 { 532 keypad_col2: keypad-col-2 {
531 samsung,pins = "gph2-2"; 533 samsung,pins = "gph2-2";
532 samsung,pin-function = <3>; 534 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
533 samsung,pin-pud = <0>; 535 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
534 samsung,pin-drv = <0>; 536 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
535 }; 537 };
536 538
537 keypad_col3: keypad-col-3 { 539 keypad_col3: keypad-col-3 {
538 samsung,pins = "gph2-3"; 540 samsung,pins = "gph2-3";
539 samsung,pin-function = <3>; 541 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
540 samsung,pin-pud = <0>; 542 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
541 samsung,pin-drv = <0>; 543 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
542 }; 544 };
543 545
544 keypad_col4: keypad-col-4 { 546 keypad_col4: keypad-col-4 {
545 samsung,pins = "gph2-4"; 547 samsung,pins = "gph2-4";
546 samsung,pin-function = <3>; 548 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
547 samsung,pin-pud = <0>; 549 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
548 samsung,pin-drv = <0>; 550 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
549 }; 551 };
550 552
551 keypad_col5: keypad-col-5 { 553 keypad_col5: keypad-col-5 {
552 samsung,pins = "gph2-5"; 554 samsung,pins = "gph2-5";
553 samsung,pin-function = <3>; 555 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
554 samsung,pin-pud = <0>; 556 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
555 samsung,pin-drv = <0>; 557 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
556 }; 558 };
557 559
558 keypad_col6: keypad-col-6 { 560 keypad_col6: keypad-col-6 {
559 samsung,pins = "gph2-6"; 561 samsung,pins = "gph2-6";
560 samsung,pin-function = <3>; 562 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
561 samsung,pin-pud = <0>; 563 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
562 samsung,pin-drv = <0>; 564 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
563 }; 565 };
564 566
565 keypad_col7: keypad-col-7 { 567 keypad_col7: keypad-col-7 {
566 samsung,pins = "gph2-7"; 568 samsung,pins = "gph2-7";
567 samsung,pin-function = <3>; 569 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
568 samsung,pin-pud = <0>; 570 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
569 samsung,pin-drv = <0>; 571 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
570 }; 572 };
571 573
572 sd0_clk: sd0-clk { 574 sd0_clk: sd0-clk {
573 samsung,pins = "gpg0-0"; 575 samsung,pins = "gpg0-0";
574 samsung,pin-function = <2>; 576 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
575 samsung,pin-pud = <0>; 577 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
576 samsung,pin-drv = <3>; 578 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
577 }; 579 };
578 580
579 sd0_cmd: sd0-cmd { 581 sd0_cmd: sd0-cmd {
580 samsung,pins = "gpg0-1"; 582 samsung,pins = "gpg0-1";
581 samsung,pin-function = <2>; 583 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
582 samsung,pin-pud = <0>; 584 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
583 samsung,pin-drv = <3>; 585 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
584 }; 586 };
585 587
586 sd0_cd: sd0-cd { 588 sd0_cd: sd0-cd {
587 samsung,pins = "gpg0-2"; 589 samsung,pins = "gpg0-2";
588 samsung,pin-function = <2>; 590 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
589 samsung,pin-pud = <2>; 591 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
590 samsung,pin-drv = <3>; 592 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
591 }; 593 };
592 594
593 sd0_bus1: sd0-bus-width1 { 595 sd0_bus1: sd0-bus-width1 {
594 samsung,pins = "gpg0-3"; 596 samsung,pins = "gpg0-3";
595 samsung,pin-function = <2>; 597 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
596 samsung,pin-pud = <2>; 598 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
597 samsung,pin-drv = <3>; 599 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
598 }; 600 };
599 601
600 sd0_bus4: sd0-bus-width4 { 602 sd0_bus4: sd0-bus-width4 {
601 samsung,pins = "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6"; 603 samsung,pins = "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6";
602 samsung,pin-function = <2>; 604 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
603 samsung,pin-pud = <2>; 605 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
604 samsung,pin-drv = <3>; 606 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
605 }; 607 };
606 608
607 sd0_bus8: sd0-bus-width8 { 609 sd0_bus8: sd0-bus-width8 {
608 samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; 610 samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6";
609 samsung,pin-function = <3>; 611 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
610 samsung,pin-pud = <2>; 612 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
611 samsung,pin-drv = <3>; 613 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
612 }; 614 };
613 615
614 sd1_clk: sd1-clk { 616 sd1_clk: sd1-clk {
615 samsung,pins = "gpg1-0"; 617 samsung,pins = "gpg1-0";
616 samsung,pin-function = <2>; 618 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
617 samsung,pin-pud = <0>; 619 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
618 samsung,pin-drv = <3>; 620 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
619 }; 621 };
620 622
621 sd1_cmd: sd1-cmd { 623 sd1_cmd: sd1-cmd {
622 samsung,pins = "gpg1-1"; 624 samsung,pins = "gpg1-1";
623 samsung,pin-function = <2>; 625 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
624 samsung,pin-pud = <0>; 626 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
625 samsung,pin-drv = <3>; 627 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
626 }; 628 };
627 629
628 sd1_cd: sd1-cd { 630 sd1_cd: sd1-cd {
629 samsung,pins = "gpg1-2"; 631 samsung,pins = "gpg1-2";
630 samsung,pin-function = <2>; 632 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
631 samsung,pin-pud = <2>; 633 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
632 samsung,pin-drv = <3>; 634 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
633 }; 635 };
634 636
635 sd1_bus1: sd1-bus-width1 { 637 sd1_bus1: sd1-bus-width1 {
636 samsung,pins = "gpg1-3"; 638 samsung,pins = "gpg1-3";
637 samsung,pin-function = <2>; 639 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
638 samsung,pin-pud = <2>; 640 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
639 samsung,pin-drv = <3>; 641 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
640 }; 642 };
641 643
642 sd1_bus4: sd1-bus-width4 { 644 sd1_bus4: sd1-bus-width4 {
643 samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; 645 samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6";
644 samsung,pin-function = <2>; 646 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
645 samsung,pin-pud = <2>; 647 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
646 samsung,pin-drv = <3>; 648 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
647 }; 649 };
648 650
649 sd2_clk: sd2-clk { 651 sd2_clk: sd2-clk {
650 samsung,pins = "gpg2-0"; 652 samsung,pins = "gpg2-0";
651 samsung,pin-function = <2>; 653 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
652 samsung,pin-pud = <0>; 654 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
653 samsung,pin-drv = <3>; 655 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
654 }; 656 };
655 657
656 sd2_cmd: sd2-cmd { 658 sd2_cmd: sd2-cmd {
657 samsung,pins = "gpg2-1"; 659 samsung,pins = "gpg2-1";
658 samsung,pin-function = <2>; 660 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
659 samsung,pin-pud = <0>; 661 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
660 samsung,pin-drv = <3>; 662 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
661 }; 663 };
662 664
663 sd2_cd: sd2-cd { 665 sd2_cd: sd2-cd {
664 samsung,pins = "gpg2-2"; 666 samsung,pins = "gpg2-2";
665 samsung,pin-function = <2>; 667 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
666 samsung,pin-pud = <2>; 668 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
667 samsung,pin-drv = <3>; 669 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
668 }; 670 };
669 671
670 sd2_bus1: sd2-bus-width1 { 672 sd2_bus1: sd2-bus-width1 {
671 samsung,pins = "gpg2-3"; 673 samsung,pins = "gpg2-3";
672 samsung,pin-function = <2>; 674 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
673 samsung,pin-pud = <2>; 675 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
674 samsung,pin-drv = <3>; 676 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
675 }; 677 };
676 678
677 sd2_bus4: sd2-bus-width4 { 679 sd2_bus4: sd2-bus-width4 {
678 samsung,pins = "gpg2-3", "gpg2-4", "gpg2-5", "gpg2-6"; 680 samsung,pins = "gpg2-3", "gpg2-4", "gpg2-5", "gpg2-6";
679 samsung,pin-function = <2>; 681 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
680 samsung,pin-pud = <2>; 682 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
681 samsung,pin-drv = <3>; 683 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
682 }; 684 };
683 685
684 sd2_bus8: sd2-bus-width8 { 686 sd2_bus8: sd2-bus-width8 {
685 samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; 687 samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6";
686 samsung,pin-function = <3>; 688 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
687 samsung,pin-pud = <2>; 689 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
688 samsung,pin-drv = <3>; 690 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
689 }; 691 };
690 692
691 sd3_clk: sd3-clk { 693 sd3_clk: sd3-clk {
692 samsung,pins = "gpg3-0"; 694 samsung,pins = "gpg3-0";
693 samsung,pin-function = <2>; 695 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
694 samsung,pin-pud = <0>; 696 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
695 samsung,pin-drv = <3>; 697 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
696 }; 698 };
697 699
698 sd3_cmd: sd3-cmd { 700 sd3_cmd: sd3-cmd {
699 samsung,pins = "gpg3-1"; 701 samsung,pins = "gpg3-1";
700 samsung,pin-function = <2>; 702 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
701 samsung,pin-pud = <0>; 703 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
702 samsung,pin-drv = <3>; 704 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
703 }; 705 };
704 706
705 sd3_cd: sd3-cd { 707 sd3_cd: sd3-cd {
706 samsung,pins = "gpg3-2"; 708 samsung,pins = "gpg3-2";
707 samsung,pin-function = <2>; 709 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
708 samsung,pin-pud = <2>; 710 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
709 samsung,pin-drv = <3>; 711 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
710 }; 712 };
711 713
712 sd3_bus1: sd3-bus-width1 { 714 sd3_bus1: sd3-bus-width1 {
713 samsung,pins = "gpg3-3"; 715 samsung,pins = "gpg3-3";
714 samsung,pin-function = <2>; 716 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
715 samsung,pin-pud = <2>; 717 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
716 samsung,pin-drv = <3>; 718 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
717 }; 719 };
718 720
719 sd3_bus4: sd3-bus-width4 { 721 sd3_bus4: sd3-bus-width4 {
720 samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; 722 samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6";
721 samsung,pin-function = <2>; 723 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
722 samsung,pin-pud = <2>; 724 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
723 samsung,pin-drv = <3>; 725 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
724 }; 726 };
725 727
726 eint0: ext-int0 { 728 eint0: ext-int0 {
727 samsung,pins = "gph0-0"; 729 samsung,pins = "gph0-0";
728 samsung,pin-function = <0xf>; 730 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
729 samsung,pin-pud = <0>; 731 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
730 samsung,pin-drv = <0>; 732 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
731 }; 733 };
732 734
733 eint8: ext-int8 { 735 eint8: ext-int8 {
734 samsung,pins = "gph1-0"; 736 samsung,pins = "gph1-0";
735 samsung,pin-function = <0xf>; 737 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
736 samsung,pin-pud = <0>; 738 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
737 samsung,pin-drv = <0>; 739 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
738 }; 740 };
739 741
740 eint15: ext-int15 { 742 eint15: ext-int15 {
741 samsung,pins = "gph1-7"; 743 samsung,pins = "gph1-7";
742 samsung,pin-function = <0xf>; 744 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
743 samsung,pin-pud = <0>; 745 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
744 samsung,pin-drv = <0>; 746 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
745 }; 747 };
746 748
747 eint16: ext-int16 { 749 eint16: ext-int16 {
748 samsung,pins = "gph2-0"; 750 samsung,pins = "gph2-0";
749 samsung,pin-function = <0xf>; 751 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
750 samsung,pin-pud = <0>; 752 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
751 samsung,pin-drv = <0>; 753 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
752 }; 754 };
753 755
754 eint31: ext-int31 { 756 eint31: ext-int31 {
755 samsung,pins = "gph3-7"; 757 samsung,pins = "gph3-7";
756 samsung,pin-function = <0xf>; 758 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
757 samsung,pin-pud = <0>; 759 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
758 samsung,pin-drv = <0>; 760 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
759 }; 761 };
760 762
761 cam_port_a_io: cam-port-a-io { 763 cam_port_a_io: cam-port-a-io {
762 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", 764 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
763 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", 765 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
764 "gpe1-0", "gpe1-1", "gpe1-2", "gpe1-4"; 766 "gpe1-0", "gpe1-1", "gpe1-2", "gpe1-4";
765 samsung,pin-function = <2>; 767 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
766 samsung,pin-pud = <0>; 768 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
767 samsung,pin-drv = <0>; 769 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
768 }; 770 };
769 771
770 cam_port_a_clk_active: cam-port-a-clk-active { 772 cam_port_a_clk_active: cam-port-a-clk-active {
771 samsung,pins = "gpe1-3"; 773 samsung,pins = "gpe1-3";
772 samsung,pin-function = <2>; 774 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
773 samsung,pin-pud = <0>; 775 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
774 samsung,pin-drv = <3>; 776 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
775 }; 777 };
776 778
777 cam_port_a_clk_idle: cam-port-a-clk-idle { 779 cam_port_a_clk_idle: cam-port-a-clk-idle {
778 samsung,pins = "gpe1-3"; 780 samsung,pins = "gpe1-3";
779 samsung,pin-function = <0>; 781 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
780 samsung,pin-pud = <1>; 782 samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>;
781 samsung,pin-drv = <0>; 783 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
782 }; 784 };
783 785
784 cam_port_b_io: cam-port-b-io { 786 cam_port_b_io: cam-port-b-io {
785 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", 787 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
786 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", 788 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
787 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; 789 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
788 samsung,pin-function = <3>; 790 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
789 samsung,pin-pud = <0>; 791 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
790 samsung,pin-drv = <0>; 792 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
791 }; 793 };
792 794
793 cam_port_b_clk_active: cam-port-b-clk-active { 795 cam_port_b_clk_active: cam-port-b-clk-active {
794 samsung,pins = "gpj1-3"; 796 samsung,pins = "gpj1-3";
795 samsung,pin-function = <3>; 797 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
796 samsung,pin-pud = <0>; 798 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
797 samsung,pin-drv = <3>; 799 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
798 }; 800 };
799 801
800 cam_port_b_clk_idle: cam-port-b-clk-idle { 802 cam_port_b_clk_idle: cam-port-b-clk-idle {
801 samsung,pins = "gpj1-3"; 803 samsung,pins = "gpj1-3";
802 samsung,pin-function = <0>; 804 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
803 samsung,pin-pud = <1>; 805 samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>;
804 samsung,pin-drv = <0>; 806 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
805 }; 807 };
806 808
807 lcd_ctrl: lcd-ctrl { 809 lcd_ctrl: lcd-ctrl {
808 samsung,pins = "gpd0-0", "gpd0-1"; 810 samsung,pins = "gpd0-0", "gpd0-1";
809 samsung,pin-function = <3>; 811 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
810 samsung,pin-pud = <0>; 812 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
811 samsung,pin-drv = <0>; 813 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
812 }; 814 };
813 815
814 lcd_sync: lcd-sync { 816 lcd_sync: lcd-sync {
815 samsung,pins = "gpf0-0", "gpf0-1"; 817 samsung,pins = "gpf0-0", "gpf0-1";
816 samsung,pin-function = <2>; 818 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
817 samsung,pin-pud = <0>; 819 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
818 samsung,pin-drv = <0>; 820 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
819 }; 821 };
820 822
821 lcd_clk: lcd-clk { 823 lcd_clk: lcd-clk {
822 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; 824 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
823 samsung,pin-function = <2>; 825 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
824 samsung,pin-pud = <0>; 826 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
825 samsung,pin-drv = <0>; 827 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
826 }; 828 };
827 829
828 lcd_data24: lcd-data-width24 { 830 lcd_data24: lcd-data-width24 {
@@ -832,8 +834,8 @@
832 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", 834 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
833 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", 835 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
834 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; 836 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
835 samsung,pin-function = <2>; 837 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
836 samsung,pin-pud = <0>; 838 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
837 samsung,pin-drv = <0>; 839 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
838 }; 840 };
839}; 841};
diff --git a/arch/arm/boot/dts/s5pv210-smdkc110.dts b/arch/arm/boot/dts/s5pv210-smdkc110.dts
index 1eedab7ffe94..5d14da911aa5 100644
--- a/arch/arm/boot/dts/s5pv210-smdkc110.dts
+++ b/arch/arm/boot/dts/s5pv210-smdkc110.dts
@@ -29,7 +29,7 @@
29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk"; 29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk";
30 }; 30 };
31 31
32 memory { 32 memory@20000000 {
33 device_type = "memory"; 33 device_type = "memory";
34 reg = <0x20000000 0x20000000>; 34 reg = <0x20000000 0x20000000>;
35 }; 35 };
diff --git a/arch/arm/boot/dts/s5pv210-smdkv210.dts b/arch/arm/boot/dts/s5pv210-smdkv210.dts
index 9eb6aff3e38f..75398318ed57 100644
--- a/arch/arm/boot/dts/s5pv210-smdkv210.dts
+++ b/arch/arm/boot/dts/s5pv210-smdkv210.dts
@@ -29,7 +29,7 @@
29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk"; 29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk";
30 }; 30 };
31 31
32 memory { 32 memory@20000000 {
33 device_type = "memory"; 33 device_type = "memory";
34 reg = <0x20000000 0x40000000>; 34 reg = <0x20000000 0x40000000>;
35 }; 35 };
diff --git a/arch/arm/boot/dts/s5pv210-torbreck.dts b/arch/arm/boot/dts/s5pv210-torbreck.dts
index 622599fd2cfa..7cb50bcee888 100644
--- a/arch/arm/boot/dts/s5pv210-torbreck.dts
+++ b/arch/arm/boot/dts/s5pv210-torbreck.dts
@@ -29,7 +29,7 @@
29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk"; 29 bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk";
30 }; 30 };
31 31
32 memory { 32 memory@20000000 {
33 device_type = "memory"; 33 device_type = "memory";
34 reg = <0x20000000 0x20000000>; 34 reg = <0x20000000 0x20000000>;
35 }; 35 };
diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
index ffc36bd24d2f..a853918be43f 100644
--- a/arch/arm/boot/dts/s5pv210.dtsi
+++ b/arch/arm/boot/dts/s5pv210.dtsi
@@ -19,11 +19,13 @@
19 * published by the Free Software Foundation. 19 * published by the Free Software Foundation.
20*/ 20*/
21 21
22#include "skeleton.dtsi"
23#include <dt-bindings/clock/s5pv210.h> 22#include <dt-bindings/clock/s5pv210.h>
24#include <dt-bindings/clock/s5pv210-audss.h> 23#include <dt-bindings/clock/s5pv210-audss.h>
25 24
26/ { 25/ {
26 #address-cells = <1>;
27 #size-cells = <1>;
28
27 aliases { 29 aliases {
28 csis0 = &csis0; 30 csis0 = &csis0;
29 fimc0 = &fimc0; 31 fimc0 = &fimc0;
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 353d0e5ec83b..7173ec9059a1 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -77,6 +77,35 @@
77 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>; 77 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
78 }; 78 };
79 79
80 etb {
81 compatible = "arm,coresight-etb10", "arm,primecell";
82 reg = <0x740000 0x1000>;
83
84 clocks = <&mck>;
85 clock-names = "apb_pclk";
86
87 port {
88 etb_in: endpoint {
89 slave-mode;
90 remote-endpoint = <&etm_out>;
91 };
92 };
93 };
94
95 etm {
96 compatible = "arm,coresight-etm3x", "arm,primecell";
97 reg = <0x73C000 0x1000>;
98
99 clocks = <&mck>;
100 clock-names = "apb_pclk";
101
102 port {
103 etm_out: endpoint {
104 remote-endpoint = <&etb_in>;
105 };
106 };
107 };
108
80 memory { 109 memory {
81 reg = <0x20000000 0x20000000>; 110 reg = <0x20000000 0x20000000>;
82 }; 111 };
diff --git a/arch/arm/boot/dts/skeleton.dtsi b/arch/arm/boot/dts/skeleton.dtsi
index b41d241de2cd..28b81d60b407 100644
--- a/arch/arm/boot/dts/skeleton.dtsi
+++ b/arch/arm/boot/dts/skeleton.dtsi
@@ -1,4 +1,8 @@
1/* 1/*
2 * This file is deprecated, and will be removed once existing users have been
3 * updated. New dts{,i} files should *not* include skeleton.dtsi, and should
4 * instead explicitly provide the below nodes only as required.
5 *
2 * Skeleton device tree; the bare minimum needed to boot; just include and 6 * Skeleton device tree; the bare minimum needed to boot; just include and
3 * add a compatible value. The bootloader will typically populate the memory 7 * add a compatible value. The bootloader will typically populate the memory
4 * node. 8 * node.
diff --git a/arch/arm/boot/dts/ste-nomadik-nhk15.dts b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
index d35aa88791ad..1ec46a794a4d 100644
--- a/arch/arm/boot/dts/ste-nomadik-nhk15.dts
+++ b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
@@ -140,6 +140,10 @@
140 0x03020067 // Up 140 0x03020067 // Up
141 0x0303006c>; // Down 141 0x0303006c>; // Down
142 }; 142 };
143 stmpe0_pwm: stmpe_pwm {
144 compatible = "st,stmpe-pwm";
145 #pwm-cells = <2>;
146 };
143 }; 147 };
144 stmpe1: stmpe2401@44 { 148 stmpe1: stmpe2401@44 {
145 compatible = "st,stmpe2401"; 149 compatible = "st,stmpe2401";
@@ -172,6 +176,50 @@
172 }; 176 };
173 177
174 amba { 178 amba {
179 clcd@10120000 {
180 status = "okay";
181 pinctrl-names = "default";
182 pinctrl-0 = <&clcd_24bit_mux>;
183 port {
184 nomadik_clcd_pads: endpoint {
185 remote-endpoint = <&nomadik_clcd_panel>;
186 arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
187 };
188 };
189
190 /*
191 * WVGA connector 21
192 * WVGA (800x480): 4.3" TPG110 TDO43MTEA2 24-bit RGB
193 * with TPO touch screen.
194 */
195 panel {
196 compatible = "tpo,tpg110", "panel-dpi";
197 grestb-gpios = <&stmpe_gpio44 5 GPIO_ACTIVE_LOW>;
198 scen-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
199 scl-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
200 sda-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
201 backlight = <&bl>;
202
203 port {
204 nomadik_clcd_panel: endpoint {
205 remote-endpoint = <&nomadik_clcd_pads>;
206 };
207 };
208
209 panel-timing {
210 clock-frequency = <33200000>;
211 hactive = <800>;
212 hback-porch = <216>;
213 hfront-porch = <40>;
214 hsync-len = <1>;
215 vactive = <480>;
216 vback-porch = <35>;
217 vfront-porch = <10>;
218 vsync-len = <1>;
219 };
220 };
221 };
222
175 /* Activate RX/TX and CTS/RTS on UART 0 */ 223 /* Activate RX/TX and CTS/RTS on UART 0 */
176 uart0: uart@101fd000 { 224 uart0: uart@101fd000 {
177 pinctrl-names = "default"; 225 pinctrl-names = "default";
@@ -183,4 +231,24 @@
183 wp-gpios = <&stmpe_gpio44 18 GPIO_ACTIVE_HIGH>; 231 wp-gpios = <&stmpe_gpio44 18 GPIO_ACTIVE_HIGH>;
184 }; 232 };
185 }; 233 };
234
235 bl: backlight {
236 compatible = "pwm-backlight";
237 pwms = <&stmpe0_pwm 0 500000>;
238 pwm-names = "backlight";
239 brightness-levels = <
240 0 1 2 3 4 5 6 7 8 9
241 10 11 12 13 14 15 16 17 18 19
242 20 21 22 23 24 25 26 27 28 29
243 30 31 32 33 34 35 36 37 38 39
244 40 41 42 43 44 45 46 47 48 49
245 50 51 52 53 54 55 56 57 58 59
246 60 61 62 63 64 65 66 67 68 69
247 70 71 72 73 74 75 76 77 78 79
248 80 81 82 83 84 85 86 87 88 89
249 90 91 92 93 94 95 96 97 98 99
250 100
251 >;
252 default-brightness-level = <100>;
253 };
186}; 254};
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index d2d532a9d783..adb1c0998b81 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -166,6 +166,24 @@
166 }; 166 };
167 }; 167 };
168 }; 168 };
169 clcd {
170 /*
171 * This should be activated to use the additional
172 * 8 lines for bits 16 thru 23 from the CLCD block.
173 */
174 clcd_24bit_mux: clcd_mux {
175 clcd_24bit_mux {
176 function = "clcd";
177 groups = "clcd_16_23_b_1";
178 };
179 };
180 };
181 };
182
183 /* Power Management Unit */
184 pmu: pmu@101e9000 {
185 compatible = "stericsson,nomadik-pmu", "syscon";
186 reg = <0x101e0000 0x1000>;
169 }; 187 };
170 188
171 src: src@101e0000 { 189 src: src@101e0000 {
@@ -726,6 +744,16 @@
726 #size-cells = <1>; 744 #size-cells = <1>;
727 ranges; 745 ranges;
728 746
747 clcd@10120000 {
748 compatible = "arm,pl110", "arm,primecell";
749 reg = <0x10120000 0x1000>;
750 interrupt-names = "combined";
751 interrupts = <14>;
752 clocks = <&clcdclk>, <&hclkclcd>;
753 clock-names = "clcdclk", "apb_pclk";
754 status = "disabled";
755 };
756
729 vica: intc@10140000 { 757 vica: intc@10140000 {
730 compatible = "arm,versatile-vic"; 758 compatible = "arm,versatile-vic";
731 interrupt-controller; 759 interrupt-controller;
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index ad45f5e8fac7..13029c03d7c6 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -42,7 +42,7 @@
42 42
43 clockgen_a9_pll: clockgen-a9-pll { 43 clockgen_a9_pll: clockgen-a9-pll {
44 #clock-cells = <1>; 44 #clock-cells = <1>;
45 compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32"; 45 compatible = "st,stih407-clkgen-plla9";
46 46
47 clocks = <&clk_sysin>; 47 clocks = <&clk_sysin>;
48 48
@@ -55,7 +55,7 @@
55 */ 55 */
56 clk_m_a9: clk-m-a9@92b0000 { 56 clk_m_a9: clk-m-a9@92b0000 {
57 #clock-cells = <0>; 57 #clock-cells = <0>;
58 compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux"; 58 compatible = "st,stih407-clkgen-a9-mux";
59 reg = <0x92b0000 0x10000>; 59 reg = <0x92b0000 0x10000>;
60 60
61 clocks = <&clockgen_a9_pll 0>, 61 clocks = <&clockgen_a9_pll 0>,
@@ -96,7 +96,7 @@
96 96
97 clk_s_a0_pll: clk-s-a0-pll { 97 clk_s_a0_pll: clk-s-a0-pll {
98 #clock-cells = <1>; 98 #clock-cells = <1>;
99 compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32"; 99 compatible = "st,clkgen-pll0";
100 100
101 clocks = <&clk_sysin>; 101 clocks = <&clk_sysin>;
102 102
@@ -117,7 +117,7 @@
117 117
118 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { 118 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
119 #clock-cells = <1>; 119 #clock-cells = <1>;
120 compatible = "st,stih407-quadfs660-C", "st,quadfs"; 120 compatible = "st,quadfs-pll";
121 reg = <0x9103000 0x1000>; 121 reg = <0x9103000 0x1000>;
122 122
123 clocks = <&clk_sysin>; 123 clocks = <&clk_sysin>;
@@ -134,7 +134,7 @@
134 134
135 clk_s_c0_pll0: clk-s-c0-pll0 { 135 clk_s_c0_pll0: clk-s-c0-pll0 {
136 #clock-cells = <1>; 136 #clock-cells = <1>;
137 compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32"; 137 compatible = "st,clkgen-pll0";
138 138
139 clocks = <&clk_sysin>; 139 clocks = <&clk_sysin>;
140 140
@@ -143,7 +143,7 @@
143 143
144 clk_s_c0_pll1: clk-s-c0-pll1 { 144 clk_s_c0_pll1: clk-s-c0-pll1 {
145 #clock-cells = <1>; 145 #clock-cells = <1>;
146 compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32"; 146 compatible = "st,clkgen-pll1";
147 147
148 clocks = <&clk_sysin>; 148 clocks = <&clk_sysin>;
149 149
@@ -199,7 +199,7 @@
199 199
200 clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { 200 clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
201 #clock-cells = <1>; 201 #clock-cells = <1>;
202 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 202 compatible = "st,quadfs";
203 reg = <0x9104000 0x1000>; 203 reg = <0x9104000 0x1000>;
204 204
205 clocks = <&clk_sysin>; 205 clocks = <&clk_sysin>;
@@ -216,7 +216,7 @@
216 216
217 clk_s_d0_flexgen: clk-s-d0-flexgen { 217 clk_s_d0_flexgen: clk-s-d0-flexgen {
218 #clock-cells = <1>; 218 #clock-cells = <1>;
219 compatible = "st,flexgen"; 219 compatible = "st,flexgen-audio", "st,flexgen";
220 220
221 clocks = <&clk_s_d0_quadfs 0>, 221 clocks = <&clk_s_d0_quadfs 0>,
222 <&clk_s_d0_quadfs 1>, 222 <&clk_s_d0_quadfs 1>,
@@ -233,7 +233,7 @@
233 233
234 clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { 234 clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
235 #clock-cells = <1>; 235 #clock-cells = <1>;
236 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 236 compatible = "st,quadfs";
237 reg = <0x9106000 0x1000>; 237 reg = <0x9106000 0x1000>;
238 238
239 clocks = <&clk_sysin>; 239 clocks = <&clk_sysin>;
@@ -256,7 +256,7 @@
256 256
257 clk_s_d2_flexgen: clk-s-d2-flexgen { 257 clk_s_d2_flexgen: clk-s-d2-flexgen {
258 #clock-cells = <1>; 258 #clock-cells = <1>;
259 compatible = "st,flexgen"; 259 compatible = "st,flexgen-video", "st,flexgen";
260 260
261 clocks = <&clk_s_d2_quadfs 0>, 261 clocks = <&clk_s_d2_quadfs 0>,
262 <&clk_s_d2_quadfs 1>, 262 <&clk_s_d2_quadfs 1>,
@@ -287,7 +287,7 @@
287 287
288 clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { 288 clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
289 #clock-cells = <1>; 289 #clock-cells = <1>;
290 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 290 compatible = "st,quadfs";
291 reg = <0x9107000 0x1000>; 291 reg = <0x9107000 0x1000>;
292 292
293 clocks = <&clk_sysin>; 293 clocks = <&clk_sysin>;
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 8b063ab10c19..5430747c6b73 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -554,7 +554,6 @@
554 clocks = <&clk_s_c0_flexgen CLK_MMC_0>, 554 clocks = <&clk_s_c0_flexgen CLK_MMC_0>,
555 <&clk_s_c0_flexgen CLK_RX_ICN_HVA>; 555 <&clk_s_c0_flexgen CLK_RX_ICN_HVA>;
556 bus-width = <8>; 556 bus-width = <8>;
557 non-removable;
558 }; 557 };
559 558
560 mmc1: sdhci@09080000 { 559 mmc1: sdhci@09080000 {
@@ -610,6 +609,8 @@
610 clock-names = "ahci_clk"; 609 clock-names = "ahci_clk";
611 clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; 610 clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
612 611
612 ports-implemented = <0x1>;
613
613 status = "disabled"; 614 status = "disabled";
614 }; 615 };
615 616
@@ -633,6 +634,8 @@
633 clock-names = "ahci_clk"; 634 clock-names = "ahci_clk";
634 clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; 635 clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
635 636
637 ports-implemented = <0x1>;
638
636 status = "disabled"; 639 status = "disabled";
637 }; 640 };
638 641
@@ -669,6 +672,7 @@
669 compatible = "st,sti-pwm"; 672 compatible = "st,sti-pwm";
670 #pwm-cells = <2>; 673 #pwm-cells = <2>;
671 reg = <0x9810000 0x68>; 674 reg = <0x9810000 0x68>;
675 interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>;
672 pinctrl-names = "default"; 676 pinctrl-names = "default";
673 pinctrl-0 = <&pinctrl_pwm0_chan0_default>; 677 pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
674 clock-names = "pwm"; 678 clock-names = "pwm";
@@ -823,5 +827,172 @@
823 clock-frequency = <600000000>; 827 clock-frequency = <600000000>;
824 st,syscfg = <&syscfg_core 0x224>; 828 st,syscfg = <&syscfg_core 0x224>;
825 }; 829 };
830
831 /* fdma audio */
832 fdma0: dma-controller@8e20000 {
833 compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
834 reg = <0x8e20000 0x8000>,
835 <0x8e30000 0x3000>,
836 <0x8e37000 0x1000>,
837 <0x8e38000 0x8000>;
838 reg-names = "slimcore", "dmem", "peripherals", "imem";
839 clocks = <&clk_s_c0_flexgen CLK_FDMA>,
840 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
841 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
842 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
843 interrupts = <GIC_SPI 5 IRQ_TYPE_NONE>;
844 dma-channels = <16>;
845 #dma-cells = <3>;
846 };
847
848 /* fdma app */
849 fdma1: dma-controller@8e40000 {
850 compatible = "st,stih407-fdma-mpe31-12", "st,slim-rproc";
851 reg = <0x8e40000 0x8000>,
852 <0x8e50000 0x3000>,
853 <0x8e57000 0x1000>,
854 <0x8e58000 0x8000>;
855 reg-names = "slimcore", "dmem", "peripherals", "imem";
856 clocks = <&clk_s_c0_flexgen CLK_FDMA>,
857 <&clk_s_c0_flexgen CLK_TX_ICN_DMU>,
858 <&clk_s_c0_flexgen CLK_TX_ICN_DMU>,
859 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
860
861 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>;
862 dma-channels = <16>;
863 #dma-cells = <3>;
864 };
865
866 /* fdma free running */
867 fdma2: dma-controller@8e60000 {
868 compatible = "st,stih407-fdma-mpe31-13", "st,slim-rproc";
869 reg = <0x8e60000 0x8000>,
870 <0x8e70000 0x3000>,
871 <0x8e77000 0x1000>,
872 <0x8e78000 0x8000>;
873 reg-names = "slimcore", "dmem", "peripherals", "imem";
874 interrupts = <GIC_SPI 9 IRQ_TYPE_NONE>;
875 dma-channels = <16>;
876 #dma-cells = <3>;
877 clocks = <&clk_s_c0_flexgen CLK_FDMA>,
878 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
879 <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
880 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
881 };
882
883 sti_sasg_codec: sti-sasg-codec {
884 compatible = "st,stih407-sas-codec";
885 #sound-dai-cells = <1>;
886 status = "disabled";
887 st,syscfg = <&syscfg_core>;
888 };
889
890 sti_uni_player0: sti-uni-player@8d80000 {
891 compatible = "st,sti-uni-player";
892 #sound-dai-cells = <0>;
893 st,syscfg = <&syscfg_core>;
894 clocks = <&clk_s_d0_flexgen CLK_PCM_0>;
895 assigned-clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_flexgen CLK_PCM_0>;
896 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>;
897 assigned-clock-rates = <50000000>;
898 reg = <0x8d80000 0x158>;
899 interrupts = <GIC_SPI 84 IRQ_TYPE_NONE>;
900 dmas = <&fdma0 2 0 1>;
901 dai-name = "Uni Player #0 (HDMI)";
902 dma-names = "tx";
903 st,uniperiph-id = <0>;
904 st,version = <5>;
905 st,mode = "HDMI";
906
907 status = "disabled";
908 };
909
910 sti_uni_player1: sti-uni-player@8d81000 {
911 compatible = "st,sti-uni-player";
912 #sound-dai-cells = <0>;
913 st,syscfg = <&syscfg_core>;
914 clocks = <&clk_s_d0_flexgen CLK_PCM_1>;
915 assigned-clocks = <&clk_s_d0_quadfs 1>, <&clk_s_d0_flexgen CLK_PCM_1>;
916 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>;
917 assigned-clock-rates = <50000000>;
918 reg = <0x8d81000 0x158>;
919 interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
920 dmas = <&fdma0 3 0 1>;
921 dai-name = "Uni Player #1 (PIO)";
922 dma-names = "tx";
923 st,uniperiph-id = <1>;
924 st,version = <5>;
925 st,mode = "PCM";
926
927 status = "disabled";
928 };
929
930 sti_uni_player2: sti-uni-player@8d82000 {
931 compatible = "st,sti-uni-player";
932 #sound-dai-cells = <0>;
933 st,syscfg = <&syscfg_core>;
934 clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
935 assigned-clocks = <&clk_s_d0_quadfs 2>, <&clk_s_d0_flexgen CLK_PCM_2>;
936 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>;
937 assigned-clock-rates = <50000000>;
938 reg = <0x8d82000 0x158>;
939 interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
940 dmas = <&fdma0 4 0 1>;
941 dai-name = "Uni Player #1 (DAC)";
942 dma-names = "tx";
943 st,uniperiph-id = <2>;
944 st,version = <5>;
945 st,mode = "PCM";
946
947 status = "disabled";
948 };
949
950 sti_uni_player3: sti-uni-player@8d85000 {
951 compatible = "st,sti-uni-player";
952 #sound-dai-cells = <0>;
953 st,syscfg = <&syscfg_core>;
954 clocks = <&clk_s_d0_flexgen CLK_SPDIFF>;
955 assigned-clocks = <&clk_s_d0_quadfs 3>, <&clk_s_d0_flexgen CLK_SPDIFF>;
956 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>;
957 assigned-clock-rates = <50000000>;
958 reg = <0x8d85000 0x158>;
959 interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
960 dmas = <&fdma0 7 0 1>;
961 dma-names = "tx";
962 dai-name = "Uni Player #1 (PIO)";
963 st,uniperiph-id = <3>;
964 st,version = <5>;
965 st,mode = "SPDIF";
966
967 status = "disabled";
968 };
969
970 sti_uni_reader0: sti-uni-reader@8d83000 {
971 compatible = "st,sti-uni-reader";
972 #sound-dai-cells = <0>;
973 st,syscfg = <&syscfg_core>;
974 reg = <0x8d83000 0x158>;
975 interrupts = <GIC_SPI 87 IRQ_TYPE_NONE>;
976 dmas = <&fdma0 5 0 1>;
977 dma-names = "rx";
978 dai-name = "Uni Reader #0 (PCM IN)";
979 st,version = <3>;
980
981 status = "disabled";
982 };
983
984 sti_uni_reader1: sti-uni-reader@8d84000 {
985 compatible = "st,sti-uni-reader";
986 #sound-dai-cells = <0>;
987 st,syscfg = <&syscfg_core>;
988 reg = <0x8d84000 0x158>;
989 interrupts = <GIC_SPI 88 IRQ_TYPE_NONE>;
990 dmas = <&fdma0 6 0 1>;
991 dma-names = "rx";
992 dai-name = "Uni Reader #1 (HDMI RX)";
993 st,version = <3>;
994
995 status = "disabled";
996 };
826 }; 997 };
827}; 998};
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index a538ae52d32b..c325cc059ae4 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -58,7 +58,7 @@
58 58
59 pio0: gpio@09610000 { 59 pio0: gpio@09610000 {
60 gpio-controller; 60 gpio-controller;
61 #gpio-cells = <1>; 61 #gpio-cells = <2>;
62 interrupt-controller; 62 interrupt-controller;
63 #interrupt-cells = <2>; 63 #interrupt-cells = <2>;
64 reg = <0x0 0x100>; 64 reg = <0x0 0x100>;
@@ -66,7 +66,7 @@
66 }; 66 };
67 pio1: gpio@09611000 { 67 pio1: gpio@09611000 {
68 gpio-controller; 68 gpio-controller;
69 #gpio-cells = <1>; 69 #gpio-cells = <2>;
70 interrupt-controller; 70 interrupt-controller;
71 #interrupt-cells = <2>; 71 #interrupt-cells = <2>;
72 reg = <0x1000 0x100>; 72 reg = <0x1000 0x100>;
@@ -74,7 +74,7 @@
74 }; 74 };
75 pio2: gpio@09612000 { 75 pio2: gpio@09612000 {
76 gpio-controller; 76 gpio-controller;
77 #gpio-cells = <1>; 77 #gpio-cells = <2>;
78 interrupt-controller; 78 interrupt-controller;
79 #interrupt-cells = <2>; 79 #interrupt-cells = <2>;
80 reg = <0x2000 0x100>; 80 reg = <0x2000 0x100>;
@@ -82,7 +82,7 @@
82 }; 82 };
83 pio3: gpio@09613000 { 83 pio3: gpio@09613000 {
84 gpio-controller; 84 gpio-controller;
85 #gpio-cells = <1>; 85 #gpio-cells = <2>;
86 interrupt-controller; 86 interrupt-controller;
87 #interrupt-cells = <2>; 87 #interrupt-cells = <2>;
88 reg = <0x3000 0x100>; 88 reg = <0x3000 0x100>;
@@ -90,7 +90,7 @@
90 }; 90 };
91 pio4: gpio@09614000 { 91 pio4: gpio@09614000 {
92 gpio-controller; 92 gpio-controller;
93 #gpio-cells = <1>; 93 #gpio-cells = <2>;
94 interrupt-controller; 94 interrupt-controller;
95 #interrupt-cells = <2>; 95 #interrupt-cells = <2>;
96 reg = <0x4000 0x100>; 96 reg = <0x4000 0x100>;
@@ -99,7 +99,7 @@
99 99
100 pio5: gpio@09615000 { 100 pio5: gpio@09615000 {
101 gpio-controller; 101 gpio-controller;
102 #gpio-cells = <1>; 102 #gpio-cells = <2>;
103 interrupt-controller; 103 interrupt-controller;
104 #interrupt-cells = <2>; 104 #interrupt-cells = <2>;
105 reg = <0x5000 0x100>; 105 reg = <0x5000 0x100>;
@@ -230,6 +230,13 @@
230 }; 230 };
231 }; 231 };
232 232
233 pinctrl_rgmii1_mdio_1: rgmii1-mdio-1 {
234 st,pins {
235 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
236 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
237 };
238 };
239
233 pinctrl_mii1: mii1 { 240 pinctrl_mii1: mii1 {
234 st,pins { 241 st,pins {
235 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; 242 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
@@ -289,10 +296,12 @@
289 pinctrl_pwm1_chan0_default: pwm1-0-default { 296 pinctrl_pwm1_chan0_default: pwm1-0-default {
290 st,pins { 297 st,pins {
291 pwm-out = <&pio3 0 ALT1 OUT>; 298 pwm-out = <&pio3 0 ALT1 OUT>;
299 pwm-capturein = <&pio3 2 ALT1 IN>;
292 }; 300 };
293 }; 301 };
294 pinctrl_pwm1_chan1_default: pwm1-1-default { 302 pinctrl_pwm1_chan1_default: pwm1-1-default {
295 st,pins { 303 st,pins {
304 pwm-capturein = <&pio4 3 ALT1 IN>;
296 pwm-out = <&pio4 4 ALT1 OUT>; 305 pwm-out = <&pio4 4 ALT1 OUT>;
297 }; 306 };
298 }; 307 };
@@ -373,7 +382,7 @@
373 382
374 pio10: pio@09200000 { 383 pio10: pio@09200000 {
375 gpio-controller; 384 gpio-controller;
376 #gpio-cells = <1>; 385 #gpio-cells = <2>;
377 interrupt-controller; 386 interrupt-controller;
378 #interrupt-cells = <2>; 387 #interrupt-cells = <2>;
379 reg = <0x0 0x100>; 388 reg = <0x0 0x100>;
@@ -381,7 +390,7 @@
381 }; 390 };
382 pio11: pio@09201000 { 391 pio11: pio@09201000 {
383 gpio-controller; 392 gpio-controller;
384 #gpio-cells = <1>; 393 #gpio-cells = <2>;
385 interrupt-controller; 394 interrupt-controller;
386 #interrupt-cells = <2>; 395 #interrupt-cells = <2>;
387 reg = <0x1000 0x100>; 396 reg = <0x1000 0x100>;
@@ -389,7 +398,7 @@
389 }; 398 };
390 pio12: pio@09202000 { 399 pio12: pio@09202000 {
391 gpio-controller; 400 gpio-controller;
392 #gpio-cells = <1>; 401 #gpio-cells = <2>;
393 interrupt-controller; 402 interrupt-controller;
394 #interrupt-cells = <2>; 403 #interrupt-cells = <2>;
395 reg = <0x2000 0x100>; 404 reg = <0x2000 0x100>;
@@ -397,7 +406,7 @@
397 }; 406 };
398 pio13: pio@09203000 { 407 pio13: pio@09203000 {
399 gpio-controller; 408 gpio-controller;
400 #gpio-cells = <1>; 409 #gpio-cells = <2>;
401 interrupt-controller; 410 interrupt-controller;
402 #interrupt-cells = <2>; 411 #interrupt-cells = <2>;
403 reg = <0x3000 0x100>; 412 reg = <0x3000 0x100>;
@@ -405,7 +414,7 @@
405 }; 414 };
406 pio14: pio@09204000 { 415 pio14: pio@09204000 {
407 gpio-controller; 416 gpio-controller;
408 #gpio-cells = <1>; 417 #gpio-cells = <2>;
409 interrupt-controller; 418 interrupt-controller;
410 #interrupt-cells = <2>; 419 #interrupt-cells = <2>;
411 reg = <0x4000 0x100>; 420 reg = <0x4000 0x100>;
@@ -413,7 +422,7 @@
413 }; 422 };
414 pio15: pio@09205000 { 423 pio15: pio@09205000 {
415 gpio-controller; 424 gpio-controller;
416 #gpio-cells = <1>; 425 #gpio-cells = <2>;
417 interrupt-controller; 426 interrupt-controller;
418 #interrupt-cells = <2>; 427 #interrupt-cells = <2>;
419 reg = <0x5000 0x100>; 428 reg = <0x5000 0x100>;
@@ -421,7 +430,7 @@
421 }; 430 };
422 pio16: pio@09206000 { 431 pio16: pio@09206000 {
423 gpio-controller; 432 gpio-controller;
424 #gpio-cells = <1>; 433 #gpio-cells = <2>;
425 interrupt-controller; 434 interrupt-controller;
426 #interrupt-cells = <2>; 435 #interrupt-cells = <2>;
427 reg = <0x6000 0x100>; 436 reg = <0x6000 0x100>;
@@ -429,7 +438,7 @@
429 }; 438 };
430 pio17: pio@09207000 { 439 pio17: pio@09207000 {
431 gpio-controller; 440 gpio-controller;
432 #gpio-cells = <1>; 441 #gpio-cells = <2>;
433 interrupt-controller; 442 interrupt-controller;
434 #interrupt-cells = <2>; 443 #interrupt-cells = <2>;
435 reg = <0x7000 0x100>; 444 reg = <0x7000 0x100>;
@@ -437,7 +446,7 @@
437 }; 446 };
438 pio18: pio@09208000 { 447 pio18: pio@09208000 {
439 gpio-controller; 448 gpio-controller;
440 #gpio-cells = <1>; 449 #gpio-cells = <2>;
441 interrupt-controller; 450 interrupt-controller;
442 #interrupt-cells = <2>; 451 #interrupt-cells = <2>;
443 reg = <0x8000 0x100>; 452 reg = <0x8000 0x100>;
@@ -445,7 +454,7 @@
445 }; 454 };
446 pio19: pio@09209000 { 455 pio19: pio@09209000 {
447 gpio-controller; 456 gpio-controller;
448 #gpio-cells = <1>; 457 #gpio-cells = <2>;
449 interrupt-controller; 458 interrupt-controller;
450 #interrupt-cells = <2>; 459 #interrupt-cells = <2>;
451 reg = <0x9000 0x100>; 460 reg = <0x9000 0x100>;
@@ -523,6 +532,13 @@
523 scl = <&pio15 5 ALT2 BIDIR>; 532 scl = <&pio15 5 ALT2 BIDIR>;
524 }; 533 };
525 }; 534 };
535
536 pinctrl_i2c2_alt2_1: i2c2-alt2-1 {
537 st,pins {
538 sda = <&pio12 6 ALT2 BIDIR>;
539 scl = <&pio12 5 ALT2 BIDIR>;
540 };
541 };
526 }; 542 };
527 543
528 i2c3 { 544 i2c3 {
@@ -916,6 +932,15 @@
916 interrupt-names = "irqmux"; 932 interrupt-names = "irqmux";
917 ranges = <0 0x09210000 0x10000>; 933 ranges = <0 0x09210000 0x10000>;
918 934
935 pio20: pio@09210000 {
936 gpio-controller;
937 #gpio-cells = <2>;
938 interrupt-controller;
939 #interrupt-cells = <2>;
940 reg = <0x0 0x100>;
941 st,bank-name = "PIO20";
942 };
943
919 tsin4 { 944 tsin4 {
920 pinctrl_tsin4_serial_alt1: tsin4_serial_alt1 { 945 pinctrl_tsin4_serial_alt1: tsin4_serial_alt1 {
921 st,pins { 946 st,pins {
@@ -927,15 +952,6 @@
927 }; 952 };
928 }; 953 };
929 }; 954 };
930
931 pio20: pio@09210000 {
932 gpio-controller;
933 #gpio-cells = <1>;
934 interrupt-controller;
935 #interrupt-cells = <2>;
936 reg = <0x0 0x100>;
937 st,bank-name = "PIO20";
938 };
939 }; 955 };
940 956
941 pin-controller-rear { 957 pin-controller-rear {
@@ -951,7 +967,7 @@
951 967
952 pio30: gpio@09220000 { 968 pio30: gpio@09220000 {
953 gpio-controller; 969 gpio-controller;
954 #gpio-cells = <1>; 970 #gpio-cells = <2>;
955 interrupt-controller; 971 interrupt-controller;
956 #interrupt-cells = <2>; 972 #interrupt-cells = <2>;
957 reg = <0x0 0x100>; 973 reg = <0x0 0x100>;
@@ -959,7 +975,7 @@
959 }; 975 };
960 pio31: gpio@09221000 { 976 pio31: gpio@09221000 {
961 gpio-controller; 977 gpio-controller;
962 #gpio-cells = <1>; 978 #gpio-cells = <2>;
963 interrupt-controller; 979 interrupt-controller;
964 #interrupt-cells = <2>; 980 #interrupt-cells = <2>;
965 reg = <0x1000 0x100>; 981 reg = <0x1000 0x100>;
@@ -967,7 +983,7 @@
967 }; 983 };
968 pio32: gpio@09222000 { 984 pio32: gpio@09222000 {
969 gpio-controller; 985 gpio-controller;
970 #gpio-cells = <1>; 986 #gpio-cells = <2>;
971 interrupt-controller; 987 interrupt-controller;
972 #interrupt-cells = <2>; 988 #interrupt-cells = <2>;
973 reg = <0x2000 0x100>; 989 reg = <0x2000 0x100>;
@@ -975,7 +991,7 @@
975 }; 991 };
976 pio33: gpio@09223000 { 992 pio33: gpio@09223000 {
977 gpio-controller; 993 gpio-controller;
978 #gpio-cells = <1>; 994 #gpio-cells = <2>;
979 interrupt-controller; 995 interrupt-controller;
980 #interrupt-cells = <2>; 996 #interrupt-cells = <2>;
981 reg = <0x3000 0x100>; 997 reg = <0x3000 0x100>;
@@ -983,7 +999,7 @@
983 }; 999 };
984 pio34: gpio@09224000 { 1000 pio34: gpio@09224000 {
985 gpio-controller; 1001 gpio-controller;
986 #gpio-cells = <1>; 1002 #gpio-cells = <2>;
987 interrupt-controller; 1003 interrupt-controller;
988 #interrupt-cells = <2>; 1004 #interrupt-cells = <2>;
989 reg = <0x4000 0x100>; 1005 reg = <0x4000 0x100>;
@@ -991,7 +1007,7 @@
991 }; 1007 };
992 pio35: gpio@09225000 { 1008 pio35: gpio@09225000 {
993 gpio-controller; 1009 gpio-controller;
994 #gpio-cells = <1>; 1010 #gpio-cells = <2>;
995 interrupt-controller; 1011 interrupt-controller;
996 #interrupt-cells = <2>; 1012 #interrupt-cells = <2>;
997 reg = <0x5000 0x100>; 1013 reg = <0x5000 0x100>;
@@ -1030,6 +1046,7 @@
1030 pwm0 { 1046 pwm0 {
1031 pinctrl_pwm0_chan0_default: pwm0-0-default { 1047 pinctrl_pwm0_chan0_default: pwm0-0-default {
1032 st,pins { 1048 st,pins {
1049 pwm-capturein = <&pio31 0 ALT1 IN>;
1033 pwm-out = <&pio31 1 ALT1 OUT>; 1050 pwm-out = <&pio31 1 ALT1 OUT>;
1034 }; 1051 };
1035 }; 1052 };
@@ -1067,6 +1084,61 @@
1067 }; 1084 };
1068 }; 1085 };
1069 1086
1087 i2s_out {
1088 pinctrl_i2s_8ch_out: i2s_8ch_out{
1089 st,pins {
1090 mclk = <&pio33 5 ALT1 OUT>;
1091 lrclk = <&pio33 7 ALT1 OUT>;
1092 sclk = <&pio33 6 ALT1 OUT>;
1093 data0 = <&pio33 4 ALT1 OUT>;
1094 data1 = <&pio34 0 ALT1 OUT>;
1095 data2 = <&pio34 1 ALT1 OUT>;
1096 data3 = <&pio34 2 ALT1 OUT>;
1097 };
1098 };
1099
1100 pinctrl_i2s_2ch_out: i2s_2ch_out{
1101 st,pins {
1102 mclk = <&pio33 5 ALT1 OUT>;
1103 lrclk = <&pio33 7 ALT1 OUT>;
1104 sclk = <&pio33 6 ALT1 OUT>;
1105 data0 = <&pio33 4 ALT1 OUT>;
1106 };
1107 };
1108 };
1109
1110 i2s_in {
1111 pinctrl_i2s_8ch_in: i2s_8ch_in{
1112 st,pins {
1113 mclk = <&pio32 5 ALT1 IN>;
1114 lrclk = <&pio32 7 ALT1 IN>;
1115 sclk = <&pio32 6 ALT1 IN>;
1116 data0 = <&pio32 4 ALT1 IN>;
1117 data1 = <&pio33 0 ALT1 IN>;
1118 data2 = <&pio33 1 ALT1 IN>;
1119 data3 = <&pio33 2 ALT1 IN>;
1120 data4 = <&pio33 3 ALT1 IN>;
1121 };
1122 };
1123
1124 pinctrl_i2s_2ch_in: i2s_2ch_in{
1125 st,pins {
1126 mclk = <&pio32 5 ALT1 IN>;
1127 lrclk = <&pio32 7 ALT1 IN>;
1128 sclk = <&pio32 6 ALT1 IN>;
1129 data0 = <&pio32 4 ALT1 IN>;
1130 };
1131 };
1132 };
1133
1134 spdif_out {
1135 pinctrl_spdif_out: spdif_out{
1136 st,pins {
1137 spdif_out = <&pio34 7 ALT1 OUT>;
1138 };
1139 };
1140 };
1141
1070 serial3 { 1142 serial3 {
1071 pinctrl_serial3: serial3-0 { 1143 pinctrl_serial3: serial3-0 {
1072 st,pins { 1144 st,pins {
@@ -1090,7 +1162,7 @@
1090 1162
1091 pio40: gpio@09230000 { 1163 pio40: gpio@09230000 {
1092 gpio-controller; 1164 gpio-controller;
1093 #gpio-cells = <1>; 1165 #gpio-cells = <2>;
1094 interrupt-controller; 1166 interrupt-controller;
1095 #interrupt-cells = <2>; 1167 #interrupt-cells = <2>;
1096 reg = <0 0x100>; 1168 reg = <0 0x100>;
@@ -1098,7 +1170,7 @@
1098 }; 1170 };
1099 pio41: gpio@09231000 { 1171 pio41: gpio@09231000 {
1100 gpio-controller; 1172 gpio-controller;
1101 #gpio-cells = <1>; 1173 #gpio-cells = <2>;
1102 interrupt-controller; 1174 interrupt-controller;
1103 #interrupt-cells = <2>; 1175 #interrupt-cells = <2>;
1104 reg = <0x1000 0x100>; 1176 reg = <0x1000 0x100>;
@@ -1106,7 +1178,7 @@
1106 }; 1178 };
1107 pio42: gpio@09232000 { 1179 pio42: gpio@09232000 {
1108 gpio-controller; 1180 gpio-controller;
1109 #gpio-cells = <1>; 1181 #gpio-cells = <2>;
1110 interrupt-controller; 1182 interrupt-controller;
1111 #interrupt-cells = <2>; 1183 #interrupt-cells = <2>;
1112 reg = <0x2000 0x100>; 1184 reg = <0x2000 0x100>;
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index d60f0d8add26..291ffacbd2e0 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -16,7 +16,10 @@
16 #size-cells = <1>; 16 #size-cells = <1>;
17 17
18 assigned-clocks = <&clk_s_d2_quadfs 0>, 18 assigned-clocks = <&clk_s_d2_quadfs 0>,
19 <&clk_s_d2_quadfs 0>, 19 <&clk_s_d2_quadfs 1>,
20 <&clk_s_c0_pll1 0>,
21 <&clk_s_c0_flexgen CLK_COMPO_DVP>,
22 <&clk_s_c0_flexgen CLK_MAIN_DISP>,
20 <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, 23 <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
21 <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, 24 <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
22 <&clk_s_d2_flexgen CLK_PIX_GDP1>, 25 <&clk_s_d2_flexgen CLK_PIX_GDP1>,
@@ -26,14 +29,21 @@
26 29
27 assigned-clock-parents = <0>, 30 assigned-clock-parents = <0>,
28 <0>, 31 <0>,
32 <0>,
33 <&clk_s_c0_pll1 0>,
34 <&clk_s_c0_pll1 0>,
29 <&clk_s_d2_quadfs 0>, 35 <&clk_s_d2_quadfs 0>,
30 <&clk_s_d2_quadfs 0>, 36 <&clk_s_d2_quadfs 1>,
31 <&clk_s_d2_quadfs 0>, 37 <&clk_s_d2_quadfs 0>,
32 <&clk_s_d2_quadfs 0>, 38 <&clk_s_d2_quadfs 0>,
33 <&clk_s_d2_quadfs 0>, 39 <&clk_s_d2_quadfs 0>,
34 <&clk_s_d2_quadfs 0>; 40 <&clk_s_d2_quadfs 0>;
35 41
36 assigned-clock-rates = <297000000>, <297000000>; 42 assigned-clock-rates = <297000000>,
43 <108000000>,
44 <0>,
45 <400000000>,
46 <400000000>;
37 47
38 ranges; 48 ranges;
39 49
diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
new file mode 100644
index 000000000000..ef2ff2f518f6
--- /dev/null
+++ b/arch/arm/boot/dts/stih410-b2260.dts
@@ -0,0 +1,194 @@
1/*
2 * Copyright (C) 2016 STMicroelectronics (R&D) Limited.
3 * Author: Patrice Chotard <patrice.chotard@st.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9/dts-v1/;
10#include "stih410.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12
13/ {
14 model = "STiH410 B2260";
15 compatible = "st,stih410-b2260", "st,stih410";
16
17 chosen {
18 bootargs = "console=ttyAS1,115200 clk_ignore_unused";
19 linux,stdout-path = &uart1;
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x40000000 0x40000000>;
25 };
26
27 aliases {
28 ttyAS1 = &uart1;
29 ethernet0 = &ethernet0;
30 };
31
32 soc {
33
34 leds {
35 compatible = "gpio-leds";
36 user_green_1 {
37 label = "User_green_1";
38 gpios = <&pio1 3 GPIO_ACTIVE_LOW>;
39 linux,default-trigger = "heartbeat";
40 default-state = "off";
41 };
42
43 user_green_2 {
44 label = "User_green_2";
45 gpios = <&pio4 1 GPIO_ACTIVE_LOW>;
46 default-state = "off";
47 };
48
49 user_green_3 {
50 label = "User_green_3";
51 gpios = <&pio2 1 GPIO_ACTIVE_LOW>;
52 default-state = "off";
53 };
54
55 user_green_4 {
56 label = "User_green_4";
57 gpios = <&pio2 5 GPIO_ACTIVE_LOW>;
58 default-state = "off";
59 };
60 };
61
62 /* Low speed expansion connector */
63 uart0: serial@9830000 {
64 label = "LS-UART0";
65 status = "okay";
66 };
67
68 /* Low speed expansion connector */
69 uart1: serial@9831000 {
70 label = "LS-UART1";
71 status = "okay";
72 };
73
74 /* Low speed expansion connector */
75 spi0: spi@9844000 {
76 label = "LS-SPI0";
77 cs-gpio = <&pio30 3 0>;
78 status = "okay";
79 };
80
81 /* Low speed expansion connector */
82 i2c0: i2c@9840000 {
83 label = "LS-I2C0";
84 status = "okay";
85 };
86
87 /* Low speed expansion connector */
88 i2c1: i2c@9841000 {
89 label = "LS-I2C1";
90 status = "okay";
91 };
92
93 /* high speed expansion connector */
94 i2c2: i2c@9842000 {
95 label = "HS-I2C2";
96 pinctrl-0 = <&pinctrl_i2c2_alt2_1>;
97 status = "okay";
98 };
99
100 /* high speed expansion connector */
101 i2c3: i2c@9843000 {
102 label = "HS-I2C3";
103 pinctrl-0 = <&pinctrl_i2c3_alt3_0>;
104 status = "okay";
105 };
106
107 mmc0: sdhci@09060000 {
108 pinctrl-0 = <&pinctrl_sd0>;
109 bus-width = <4>;
110 status = "okay";
111 };
112
113 /* high speed expansion connector */
114 mmc1: sdhci@09080000 {
115 status = "okay";
116 };
117
118 pwm0: pwm@9810000 {
119 status = "okay";
120 };
121
122 pwm1: pwm@9510000 {
123 status = "okay";
124 };
125
126 usb2_picophy1: phy2 {
127 status = "okay";
128 };
129
130 usb2_picophy2: phy3 {
131 status = "okay";
132 };
133
134 ohci0: usb@9a03c00 {
135 status = "okay";
136 };
137
138 ehci0: usb@9a03e00 {
139 status = "okay";
140 };
141
142 ohci1: usb@9a83c00 {
143 status = "okay";
144 };
145
146 ehci1: usb@9a83e00 {
147 status = "okay";
148 };
149
150 st_dwc3: dwc3@8f94000 {
151 status = "okay";
152 };
153
154 ethernet0: dwmac@9630000 {
155 phy-mode = "rgmii";
156 pinctrl-0 = <&pinctrl_rgmii1 &pinctrl_rgmii1_mdio_1>;
157
158 snps,phy-bus-name = "stmmac";
159 snps,phy-bus-id = <0>;
160 snps,phy-addr = <0>;
161 snps,reset-gpio = <&pio0 7 0>;
162 snps,reset-active-low;
163 snps,reset-delays-us = <0 10000 1000000>;
164
165 status = "okay";
166 };
167
168 /* SSC11 to HDMI */
169 hdmiddc: i2c@9541000 {
170 /* HDMI V1.3a supports Standard mode only */
171 clock-frequency = <100000>;
172 st,i2c-min-scl-pulse-width-us = <0>;
173 st,i2c-min-sda-pulse-width-us = <5>;
174 status = "okay";
175 };
176
177 sti-display-subsystem {
178 sti_hdmi: sti-hdmi@8d04000 {
179 status = "okay";
180 };
181 };
182
183 miphy28lp_phy: miphy28lp@9b22000 {
184
185 phy_port1: port@9b2a000 {
186 st,osc-force-ext;
187 };
188 };
189
190 sata1: sata@9b28000 {
191 status = "okay";
192 };
193 };
194};
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index fd5049682181..8598effd6c01 100644
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -44,7 +44,7 @@
44 44
45 clockgen_a9_pll: clockgen-a9-pll { 45 clockgen_a9_pll: clockgen-a9-pll {
46 #clock-cells = <1>; 46 #clock-cells = <1>;
47 compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32"; 47 compatible = "st,stih407-clkgen-plla9";
48 48
49 clocks = <&clk_sysin>; 49 clocks = <&clk_sysin>;
50 50
@@ -98,7 +98,7 @@
98 98
99 clk_s_a0_pll: clk-s-a0-pll { 99 clk_s_a0_pll: clk-s-a0-pll {
100 #clock-cells = <1>; 100 #clock-cells = <1>;
101 compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32"; 101 compatible = "st,clkgen-pll0";
102 102
103 clocks = <&clk_sysin>; 103 clocks = <&clk_sysin>;
104 104
@@ -122,7 +122,7 @@
122 122
123 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { 123 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
124 #clock-cells = <1>; 124 #clock-cells = <1>;
125 compatible = "st,stih407-quadfs660-C", "st,quadfs"; 125 compatible = "st,quadfs-pll";
126 reg = <0x9103000 0x1000>; 126 reg = <0x9103000 0x1000>;
127 127
128 clocks = <&clk_sysin>; 128 clocks = <&clk_sysin>;
@@ -140,7 +140,7 @@
140 140
141 clk_s_c0_pll0: clk-s-c0-pll0 { 141 clk_s_c0_pll0: clk-s-c0-pll0 {
142 #clock-cells = <1>; 142 #clock-cells = <1>;
143 compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32"; 143 compatible = "st,clkgen-pll0";
144 144
145 clocks = <&clk_sysin>; 145 clocks = <&clk_sysin>;
146 146
@@ -150,7 +150,7 @@
150 150
151 clk_s_c0_pll1: clk-s-c0-pll1 { 151 clk_s_c0_pll1: clk-s-c0-pll1 {
152 #clock-cells = <1>; 152 #clock-cells = <1>;
153 compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32"; 153 compatible = "st,clkgen-pll1";
154 154
155 clocks = <&clk_sysin>; 155 clocks = <&clk_sysin>;
156 156
@@ -218,7 +218,7 @@
218 218
219 clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { 219 clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
220 #clock-cells = <1>; 220 #clock-cells = <1>;
221 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 221 compatible = "st,quadfs";
222 reg = <0x9104000 0x1000>; 222 reg = <0x9104000 0x1000>;
223 223
224 clocks = <&clk_sysin>; 224 clocks = <&clk_sysin>;
@@ -235,7 +235,7 @@
235 235
236 clk_s_d0_flexgen: clk-s-d0-flexgen { 236 clk_s_d0_flexgen: clk-s-d0-flexgen {
237 #clock-cells = <1>; 237 #clock-cells = <1>;
238 compatible = "st,flexgen"; 238 compatible = "st,flexgen-audio", "st,flexgen";
239 239
240 clocks = <&clk_s_d0_quadfs 0>, 240 clocks = <&clk_s_d0_quadfs 0>,
241 <&clk_s_d0_quadfs 1>, 241 <&clk_s_d0_quadfs 1>,
@@ -254,7 +254,7 @@
254 254
255 clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { 255 clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
256 #clock-cells = <1>; 256 #clock-cells = <1>;
257 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 257 compatible = "st,quadfs";
258 reg = <0x9106000 0x1000>; 258 reg = <0x9106000 0x1000>;
259 259
260 clocks = <&clk_sysin>; 260 clocks = <&clk_sysin>;
@@ -277,7 +277,7 @@
277 277
278 clk_s_d2_flexgen: clk-s-d2-flexgen { 278 clk_s_d2_flexgen: clk-s-d2-flexgen {
279 #clock-cells = <1>; 279 #clock-cells = <1>;
280 compatible = "st,flexgen"; 280 compatible = "st,flexgen-video", "st,flexgen";
281 281
282 clocks = <&clk_s_d2_quadfs 0>, 282 clocks = <&clk_s_d2_quadfs 0>,
283 <&clk_s_d2_quadfs 1>, 283 <&clk_s_d2_quadfs 1>,
@@ -308,7 +308,7 @@
308 308
309 clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { 309 clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
310 #clock-cells = <1>; 310 #clock-cells = <1>;
311 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 311 compatible = "st,quadfs";
312 reg = <0x9107000 0x1000>; 312 reg = <0x9107000 0x1000>;
313 313
314 clocks = <&clk_sysin>; 314 clocks = <&clk_sysin>;
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index 40318869c733..a3ef7341c051 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -107,7 +107,10 @@
107 #size-cells = <1>; 107 #size-cells = <1>;
108 108
109 assigned-clocks = <&clk_s_d2_quadfs 0>, 109 assigned-clocks = <&clk_s_d2_quadfs 0>,
110 <&clk_s_d2_quadfs 0>, 110 <&clk_s_d2_quadfs 1>,
111 <&clk_s_c0_pll1 0>,
112 <&clk_s_c0_flexgen CLK_COMPO_DVP>,
113 <&clk_s_c0_flexgen CLK_MAIN_DISP>,
111 <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, 114 <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
112 <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, 115 <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
113 <&clk_s_d2_flexgen CLK_PIX_GDP1>, 116 <&clk_s_d2_flexgen CLK_PIX_GDP1>,
@@ -117,14 +120,21 @@
117 120
118 assigned-clock-parents = <0>, 121 assigned-clock-parents = <0>,
119 <0>, 122 <0>,
123 <0>,
124 <&clk_s_c0_pll1 0>,
125 <&clk_s_c0_pll1 0>,
120 <&clk_s_d2_quadfs 0>, 126 <&clk_s_d2_quadfs 0>,
121 <&clk_s_d2_quadfs 0>, 127 <&clk_s_d2_quadfs 1>,
122 <&clk_s_d2_quadfs 0>, 128 <&clk_s_d2_quadfs 0>,
123 <&clk_s_d2_quadfs 0>, 129 <&clk_s_d2_quadfs 0>,
124 <&clk_s_d2_quadfs 0>, 130 <&clk_s_d2_quadfs 0>,
125 <&clk_s_d2_quadfs 0>; 131 <&clk_s_d2_quadfs 0>;
126 132
127 assigned-clock-rates = <297000000>, <297000000>; 133 assigned-clock-rates = <297000000>,
134 <108000000>,
135 <0>,
136 <400000000>,
137 <400000000>;
128 138
129 ranges; 139 ranges;
130 140
@@ -231,5 +241,23 @@
231 clock-names = "bdisp"; 241 clock-names = "bdisp";
232 clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>; 242 clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>;
233 }; 243 };
244
245 hva@8c85000 {
246 compatible = "st,st-hva";
247 reg = <0x8c85000 0x400>, <0x6000000 0x40000>;
248 reg-names = "hva_registers", "hva_esram";
249 interrupts = <GIC_SPI 58 IRQ_TYPE_NONE>,
250 <GIC_SPI 59 IRQ_TYPE_NONE>;
251 clock-names = "clk_hva";
252 clocks = <&clk_s_c0_flexgen CLK_HVA>;
253 };
254
255 thermal@91a0000 {
256 compatible = "st,stih407-thermal";
257 reg = <0x91a0000 0x28>;
258 clock-names = "thermal";
259 clocks = <&clk_sysin>;
260 interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
261 };
234 }; 262 };
235}; 263};
diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi
index 3791ad95dbaf..bd028ce98b61 100644
--- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
@@ -54,7 +54,7 @@
54 54
55 pio0: gpio@fe610000 { 55 pio0: gpio@fe610000 {
56 gpio-controller; 56 gpio-controller;
57 #gpio-cells = <1>; 57 #gpio-cells = <2>;
58 interrupt-controller; 58 interrupt-controller;
59 #interrupt-cells = <2>; 59 #interrupt-cells = <2>;
60 reg = <0 0x100>; 60 reg = <0 0x100>;
@@ -62,7 +62,7 @@
62 }; 62 };
63 pio1: gpio@fe611000 { 63 pio1: gpio@fe611000 {
64 gpio-controller; 64 gpio-controller;
65 #gpio-cells = <1>; 65 #gpio-cells = <2>;
66 interrupt-controller; 66 interrupt-controller;
67 #interrupt-cells = <2>; 67 #interrupt-cells = <2>;
68 reg = <0x1000 0x100>; 68 reg = <0x1000 0x100>;
@@ -70,7 +70,7 @@
70 }; 70 };
71 pio2: gpio@fe612000 { 71 pio2: gpio@fe612000 {
72 gpio-controller; 72 gpio-controller;
73 #gpio-cells = <1>; 73 #gpio-cells = <2>;
74 interrupt-controller; 74 interrupt-controller;
75 #interrupt-cells = <2>; 75 #interrupt-cells = <2>;
76 reg = <0x2000 0x100>; 76 reg = <0x2000 0x100>;
@@ -78,7 +78,7 @@
78 }; 78 };
79 pio3: gpio@fe613000 { 79 pio3: gpio@fe613000 {
80 gpio-controller; 80 gpio-controller;
81 #gpio-cells = <1>; 81 #gpio-cells = <2>;
82 interrupt-controller; 82 interrupt-controller;
83 #interrupt-cells = <2>; 83 #interrupt-cells = <2>;
84 reg = <0x3000 0x100>; 84 reg = <0x3000 0x100>;
@@ -86,7 +86,7 @@
86 }; 86 };
87 pio4: gpio@fe614000 { 87 pio4: gpio@fe614000 {
88 gpio-controller; 88 gpio-controller;
89 #gpio-cells = <1>; 89 #gpio-cells = <2>;
90 interrupt-controller; 90 interrupt-controller;
91 #interrupt-cells = <2>; 91 #interrupt-cells = <2>;
92 reg = <0x4000 0x100>; 92 reg = <0x4000 0x100>;
@@ -208,7 +208,7 @@
208 208
209 pio5: gpio@fee00000 { 209 pio5: gpio@fee00000 {
210 gpio-controller; 210 gpio-controller;
211 #gpio-cells = <1>; 211 #gpio-cells = <2>;
212 interrupt-controller; 212 interrupt-controller;
213 #interrupt-cells = <2>; 213 #interrupt-cells = <2>;
214 reg = <0 0x100>; 214 reg = <0 0x100>;
@@ -216,7 +216,7 @@
216 }; 216 };
217 pio6: gpio@fee01000 { 217 pio6: gpio@fee01000 {
218 gpio-controller; 218 gpio-controller;
219 #gpio-cells = <1>; 219 #gpio-cells = <2>;
220 interrupt-controller; 220 interrupt-controller;
221 #interrupt-cells = <2>; 221 #interrupt-cells = <2>;
222 reg = <0x1000 0x100>; 222 reg = <0x1000 0x100>;
@@ -224,7 +224,7 @@
224 }; 224 };
225 pio7: gpio@fee02000 { 225 pio7: gpio@fee02000 {
226 gpio-controller; 226 gpio-controller;
227 #gpio-cells = <1>; 227 #gpio-cells = <2>;
228 interrupt-controller; 228 interrupt-controller;
229 #interrupt-cells = <2>; 229 #interrupt-cells = <2>;
230 reg = <0x2000 0x100>; 230 reg = <0x2000 0x100>;
@@ -232,7 +232,7 @@
232 }; 232 };
233 pio8: gpio@fee03000 { 233 pio8: gpio@fee03000 {
234 gpio-controller; 234 gpio-controller;
235 #gpio-cells = <1>; 235 #gpio-cells = <2>;
236 interrupt-controller; 236 interrupt-controller;
237 #interrupt-cells = <2>; 237 #interrupt-cells = <2>;
238 reg = <0x3000 0x100>; 238 reg = <0x3000 0x100>;
@@ -240,7 +240,7 @@
240 }; 240 };
241 pio9: gpio@fee04000 { 241 pio9: gpio@fee04000 {
242 gpio-controller; 242 gpio-controller;
243 #gpio-cells = <1>; 243 #gpio-cells = <2>;
244 interrupt-controller; 244 interrupt-controller;
245 #interrupt-cells = <2>; 245 #interrupt-cells = <2>;
246 reg = <0x4000 0x100>; 246 reg = <0x4000 0x100>;
@@ -248,7 +248,7 @@
248 }; 248 };
249 pio10: gpio@fee05000 { 249 pio10: gpio@fee05000 {
250 gpio-controller; 250 gpio-controller;
251 #gpio-cells = <1>; 251 #gpio-cells = <2>;
252 interrupt-controller; 252 interrupt-controller;
253 #interrupt-cells = <2>; 253 #interrupt-cells = <2>;
254 reg = <0x5000 0x100>; 254 reg = <0x5000 0x100>;
@@ -256,7 +256,7 @@
256 }; 256 };
257 pio11: gpio@fee06000 { 257 pio11: gpio@fee06000 {
258 gpio-controller; 258 gpio-controller;
259 #gpio-cells = <1>; 259 #gpio-cells = <2>;
260 interrupt-controller; 260 interrupt-controller;
261 #interrupt-cells = <2>; 261 #interrupt-cells = <2>;
262 reg = <0x6000 0x100>; 262 reg = <0x6000 0x100>;
@@ -264,7 +264,7 @@
264 }; 264 };
265 pio12: gpio@fee07000 { 265 pio12: gpio@fee07000 {
266 gpio-controller; 266 gpio-controller;
267 #gpio-cells = <1>; 267 #gpio-cells = <2>;
268 interrupt-controller; 268 interrupt-controller;
269 #interrupt-cells = <2>; 269 #interrupt-cells = <2>;
270 reg = <0x7000 0x100>; 270 reg = <0x7000 0x100>;
@@ -303,7 +303,7 @@
303 303
304 pio13: gpio@fe820000 { 304 pio13: gpio@fe820000 {
305 gpio-controller; 305 gpio-controller;
306 #gpio-cells = <1>; 306 #gpio-cells = <2>;
307 interrupt-controller; 307 interrupt-controller;
308 #interrupt-cells = <2>; 308 #interrupt-cells = <2>;
309 reg = <0 0x100>; 309 reg = <0 0x100>;
@@ -311,7 +311,7 @@
311 }; 311 };
312 pio14: gpio@fe821000 { 312 pio14: gpio@fe821000 {
313 gpio-controller; 313 gpio-controller;
314 #gpio-cells = <1>; 314 #gpio-cells = <2>;
315 interrupt-controller; 315 interrupt-controller;
316 #interrupt-cells = <2>; 316 #interrupt-cells = <2>;
317 reg = <0x1000 0x100>; 317 reg = <0x1000 0x100>;
@@ -319,7 +319,7 @@
319 }; 319 };
320 pio15: gpio@fe822000 { 320 pio15: gpio@fe822000 {
321 gpio-controller; 321 gpio-controller;
322 #gpio-cells = <1>; 322 #gpio-cells = <2>;
323 interrupt-controller; 323 interrupt-controller;
324 #interrupt-cells = <2>; 324 #interrupt-cells = <2>;
325 reg = <0x2000 0x100>; 325 reg = <0x2000 0x100>;
@@ -327,7 +327,7 @@
327 }; 327 };
328 pio16: gpio@fe823000 { 328 pio16: gpio@fe823000 {
329 gpio-controller; 329 gpio-controller;
330 #gpio-cells = <1>; 330 #gpio-cells = <2>;
331 interrupt-controller; 331 interrupt-controller;
332 #interrupt-cells = <2>; 332 #interrupt-cells = <2>;
333 reg = <0x3000 0x100>; 333 reg = <0x3000 0x100>;
@@ -335,7 +335,7 @@
335 }; 335 };
336 pio17: gpio@fe824000 { 336 pio17: gpio@fe824000 {
337 gpio-controller; 337 gpio-controller;
338 #gpio-cells = <1>; 338 #gpio-cells = <2>;
339 interrupt-controller; 339 interrupt-controller;
340 #interrupt-cells = <2>; 340 #interrupt-cells = <2>;
341 reg = <0x4000 0x100>; 341 reg = <0x4000 0x100>;
@@ -343,7 +343,7 @@
343 }; 343 };
344 pio18: gpio@fe825000 { 344 pio18: gpio@fe825000 {
345 gpio-controller; 345 gpio-controller;
346 #gpio-cells = <1>; 346 #gpio-cells = <2>;
347 interrupt-controller; 347 interrupt-controller;
348 #interrupt-cells = <2>; 348 #interrupt-cells = <2>;
349 reg = <0x5000 0x100>; 349 reg = <0x5000 0x100>;
@@ -465,7 +465,7 @@
465 465
466 pio100: gpio@fd6b0000 { 466 pio100: gpio@fd6b0000 {
467 gpio-controller; 467 gpio-controller;
468 #gpio-cells = <1>; 468 #gpio-cells = <2>;
469 interrupt-controller; 469 interrupt-controller;
470 #interrupt-cells = <2>; 470 #interrupt-cells = <2>;
471 reg = <0 0x100>; 471 reg = <0 0x100>;
@@ -473,7 +473,7 @@
473 }; 473 };
474 pio101: gpio@fd6b1000 { 474 pio101: gpio@fd6b1000 {
475 gpio-controller; 475 gpio-controller;
476 #gpio-cells = <1>; 476 #gpio-cells = <2>;
477 interrupt-controller; 477 interrupt-controller;
478 #interrupt-cells = <2>; 478 #interrupt-cells = <2>;
479 reg = <0x1000 0x100>; 479 reg = <0x1000 0x100>;
@@ -481,7 +481,7 @@
481 }; 481 };
482 pio102: gpio@fd6b2000 { 482 pio102: gpio@fd6b2000 {
483 gpio-controller; 483 gpio-controller;
484 #gpio-cells = <1>; 484 #gpio-cells = <2>;
485 interrupt-controller; 485 interrupt-controller;
486 #interrupt-cells = <2>; 486 #interrupt-cells = <2>;
487 reg = <0x2000 0x100>; 487 reg = <0x2000 0x100>;
@@ -502,7 +502,7 @@
502 502
503 pio103: gpio@fd330000 { 503 pio103: gpio@fd330000 {
504 gpio-controller; 504 gpio-controller;
505 #gpio-cells = <1>; 505 #gpio-cells = <2>;
506 interrupt-controller; 506 interrupt-controller;
507 #interrupt-cells = <2>; 507 #interrupt-cells = <2>;
508 reg = <0 0x100>; 508 reg = <0 0x100>;
@@ -510,7 +510,7 @@
510 }; 510 };
511 pio104: gpio@fd331000 { 511 pio104: gpio@fd331000 {
512 gpio-controller; 512 gpio-controller;
513 #gpio-cells = <1>; 513 #gpio-cells = <2>;
514 interrupt-controller; 514 interrupt-controller;
515 #interrupt-cells = <2>; 515 #interrupt-cells = <2>;
516 reg = <0x1000 0x100>; 516 reg = <0x1000 0x100>;
@@ -518,7 +518,7 @@
518 }; 518 };
519 pio105: gpio@fd332000 { 519 pio105: gpio@fd332000 {
520 gpio-controller; 520 gpio-controller;
521 #gpio-cells = <1>; 521 #gpio-cells = <2>;
522 interrupt-controller; 522 interrupt-controller;
523 #interrupt-cells = <2>; 523 #interrupt-cells = <2>;
524 reg = <0x2000 0x100>; 524 reg = <0x2000 0x100>;
@@ -526,7 +526,7 @@
526 }; 526 };
527 pio106: gpio@fd333000 { 527 pio106: gpio@fd333000 {
528 gpio-controller; 528 gpio-controller;
529 #gpio-cells = <1>; 529 #gpio-cells = <2>;
530 interrupt-controller; 530 interrupt-controller;
531 #interrupt-cells = <2>; 531 #interrupt-cells = <2>;
532 reg = <0x3000 0x100>; 532 reg = <0x3000 0x100>;
@@ -534,7 +534,7 @@
534 }; 534 };
535 pio107: gpio@fd334000 { 535 pio107: gpio@fd334000 {
536 gpio-controller; 536 gpio-controller;
537 #gpio-cells = <1>; 537 #gpio-cells = <2>;
538 interrupt-controller; 538 interrupt-controller;
539 #interrupt-cells = <2>; 539 #interrupt-cells = <2>;
540 reg = <0x4000 0x100>; 540 reg = <0x4000 0x100>;
diff --git a/arch/arm/boot/dts/stih416-b2020e.dts b/arch/arm/boot/dts/stih416-b2020e.dts
index f1ceee192a0e..de320cd067de 100644
--- a/arch/arm/boot/dts/stih416-b2020e.dts
+++ b/arch/arm/boot/dts/stih416-b2020e.dts
@@ -9,6 +9,7 @@
9/dts-v1/; 9/dts-v1/;
10#include "stih416.dtsi" 10#include "stih416.dtsi"
11#include "stih41x-b2020.dtsi" 11#include "stih41x-b2020.dtsi"
12#include <dt-bindings/gpio/gpio.h>
12/ { 13/ {
13 model = "STiH416 B2020 REV-E"; 14 model = "STiH416 B2020 REV-E";
14 compatible = "st,stih416-b2020", "st,stih416"; 15 compatible = "st,stih416-b2020", "st,stih416";
@@ -17,13 +18,12 @@
17 leds { 18 leds {
18 compatible = "gpio-leds"; 19 compatible = "gpio-leds";
19 red { 20 red {
20 #gpio-cells = <1>;
21 label = "Front Panel LED"; 21 label = "Front Panel LED";
22 gpios = <&pio4 1>; 22 gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
23 linux,default-trigger = "heartbeat"; 23 linux,default-trigger = "heartbeat";
24 }; 24 };
25 green { 25 green {
26 gpios = <&pio1 3>; 26 gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
27 default-state = "off"; 27 default-state = "off";
28 }; 28 };
29 }; 29 };
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index 051fc16f3706..9c97f7e651a0 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -58,7 +58,7 @@
58 58
59 pio0: gpio@fe610000 { 59 pio0: gpio@fe610000 {
60 gpio-controller; 60 gpio-controller;
61 #gpio-cells = <1>; 61 #gpio-cells = <2>;
62 interrupt-controller; 62 interrupt-controller;
63 #interrupt-cells = <2>; 63 #interrupt-cells = <2>;
64 reg = <0 0x100>; 64 reg = <0 0x100>;
@@ -66,7 +66,7 @@
66 }; 66 };
67 pio1: gpio@fe611000 { 67 pio1: gpio@fe611000 {
68 gpio-controller; 68 gpio-controller;
69 #gpio-cells = <1>; 69 #gpio-cells = <2>;
70 interrupt-controller; 70 interrupt-controller;
71 #interrupt-cells = <2>; 71 #interrupt-cells = <2>;
72 reg = <0x1000 0x100>; 72 reg = <0x1000 0x100>;
@@ -74,7 +74,7 @@
74 }; 74 };
75 pio2: gpio@fe612000 { 75 pio2: gpio@fe612000 {
76 gpio-controller; 76 gpio-controller;
77 #gpio-cells = <1>; 77 #gpio-cells = <2>;
78 interrupt-controller; 78 interrupt-controller;
79 #interrupt-cells = <2>; 79 #interrupt-cells = <2>;
80 reg = <0x2000 0x100>; 80 reg = <0x2000 0x100>;
@@ -82,7 +82,7 @@
82 }; 82 };
83 pio3: gpio@fe613000 { 83 pio3: gpio@fe613000 {
84 gpio-controller; 84 gpio-controller;
85 #gpio-cells = <1>; 85 #gpio-cells = <2>;
86 interrupt-controller; 86 interrupt-controller;
87 #interrupt-cells = <2>; 87 #interrupt-cells = <2>;
88 reg = <0x3000 0x100>; 88 reg = <0x3000 0x100>;
@@ -90,7 +90,7 @@
90 }; 90 };
91 pio4: gpio@fe614000 { 91 pio4: gpio@fe614000 {
92 gpio-controller; 92 gpio-controller;
93 #gpio-cells = <1>; 93 #gpio-cells = <2>;
94 interrupt-controller; 94 interrupt-controller;
95 #interrupt-cells = <2>; 95 #interrupt-cells = <2>;
96 reg = <0x4000 0x100>; 96 reg = <0x4000 0x100>;
@@ -98,7 +98,7 @@
98 }; 98 };
99 pio40: gpio@fe615000 { 99 pio40: gpio@fe615000 {
100 gpio-controller; 100 gpio-controller;
101 #gpio-cells = <1>; 101 #gpio-cells = <2>;
102 interrupt-controller; 102 interrupt-controller;
103 #interrupt-cells = <2>; 103 #interrupt-cells = <2>;
104 reg = <0x5000 0x100>; 104 reg = <0x5000 0x100>;
@@ -221,11 +221,14 @@
221 pinctrl_pwm1_chan0_default: pwm1-0-default { 221 pinctrl_pwm1_chan0_default: pwm1-0-default {
222 st,pins { 222 st,pins {
223 pwm-out = <&pio3 0 ALT1 OUT>; 223 pwm-out = <&pio3 0 ALT1 OUT>;
224 pwm-capturein = <&pio3 2 ALT1 IN>;
225
224 }; 226 };
225 }; 227 };
226 pinctrl_pwm1_chan1_default: pwm1-1-default { 228 pinctrl_pwm1_chan1_default: pwm1-1-default {
227 st,pins { 229 st,pins {
228 pwm-out = <&pio4 4 ALT1 OUT>; 230 pwm-out = <&pio4 4 ALT1 OUT>;
231 pwm-capturein = <&pio4 3 ALT1 IN>;
229 }; 232 };
230 }; 233 };
231 pinctrl_pwm1_chan2_default: pwm1-2-default { 234 pinctrl_pwm1_chan2_default: pwm1-2-default {
@@ -254,7 +257,7 @@
254 257
255 pio5: gpio@fee00000 { 258 pio5: gpio@fee00000 {
256 gpio-controller; 259 gpio-controller;
257 #gpio-cells = <1>; 260 #gpio-cells = <2>;
258 interrupt-controller; 261 interrupt-controller;
259 #interrupt-cells = <2>; 262 #interrupt-cells = <2>;
260 reg = <0 0x100>; 263 reg = <0 0x100>;
@@ -262,7 +265,7 @@
262 }; 265 };
263 pio6: gpio@fee01000 { 266 pio6: gpio@fee01000 {
264 gpio-controller; 267 gpio-controller;
265 #gpio-cells = <1>; 268 #gpio-cells = <2>;
266 interrupt-controller; 269 interrupt-controller;
267 #interrupt-cells = <2>; 270 #interrupt-cells = <2>;
268 reg = <0x1000 0x100>; 271 reg = <0x1000 0x100>;
@@ -270,7 +273,7 @@
270 }; 273 };
271 pio7: gpio@fee02000 { 274 pio7: gpio@fee02000 {
272 gpio-controller; 275 gpio-controller;
273 #gpio-cells = <1>; 276 #gpio-cells = <2>;
274 interrupt-controller; 277 interrupt-controller;
275 #interrupt-cells = <2>; 278 #interrupt-cells = <2>;
276 reg = <0x2000 0x100>; 279 reg = <0x2000 0x100>;
@@ -278,7 +281,7 @@
278 }; 281 };
279 pio8: gpio@fee03000 { 282 pio8: gpio@fee03000 {
280 gpio-controller; 283 gpio-controller;
281 #gpio-cells = <1>; 284 #gpio-cells = <2>;
282 interrupt-controller; 285 interrupt-controller;
283 #interrupt-cells = <2>; 286 #interrupt-cells = <2>;
284 reg = <0x3000 0x100>; 287 reg = <0x3000 0x100>;
@@ -286,7 +289,7 @@
286 }; 289 };
287 pio9: gpio@fee04000 { 290 pio9: gpio@fee04000 {
288 gpio-controller; 291 gpio-controller;
289 #gpio-cells = <1>; 292 #gpio-cells = <2>;
290 interrupt-controller; 293 interrupt-controller;
291 #interrupt-cells = <2>; 294 #interrupt-cells = <2>;
292 reg = <0x4000 0x100>; 295 reg = <0x4000 0x100>;
@@ -294,7 +297,7 @@
294 }; 297 };
295 pio10: gpio@fee05000 { 298 pio10: gpio@fee05000 {
296 gpio-controller; 299 gpio-controller;
297 #gpio-cells = <1>; 300 #gpio-cells = <2>;
298 interrupt-controller; 301 interrupt-controller;
299 #interrupt-cells = <2>; 302 #interrupt-cells = <2>;
300 reg = <0x5000 0x100>; 303 reg = <0x5000 0x100>;
@@ -302,7 +305,7 @@
302 }; 305 };
303 pio11: gpio@fee06000 { 306 pio11: gpio@fee06000 {
304 gpio-controller; 307 gpio-controller;
305 #gpio-cells = <1>; 308 #gpio-cells = <2>;
306 interrupt-controller; 309 interrupt-controller;
307 #interrupt-cells = <2>; 310 #interrupt-cells = <2>;
308 reg = <0x6000 0x100>; 311 reg = <0x6000 0x100>;
@@ -310,7 +313,7 @@
310 }; 313 };
311 pio12: gpio@fee07000 { 314 pio12: gpio@fee07000 {
312 gpio-controller; 315 gpio-controller;
313 #gpio-cells = <1>; 316 #gpio-cells = <2>;
314 interrupt-controller; 317 interrupt-controller;
315 #interrupt-cells = <2>; 318 #interrupt-cells = <2>;
316 reg = <0x7000 0x100>; 319 reg = <0x7000 0x100>;
@@ -318,7 +321,7 @@
318 }; 321 };
319 pio30: gpio@fee08000 { 322 pio30: gpio@fee08000 {
320 gpio-controller; 323 gpio-controller;
321 #gpio-cells = <1>; 324 #gpio-cells = <2>;
322 interrupt-controller; 325 interrupt-controller;
323 #interrupt-cells = <2>; 326 #interrupt-cells = <2>;
324 reg = <0x8000 0x100>; 327 reg = <0x8000 0x100>;
@@ -326,7 +329,7 @@
326 }; 329 };
327 pio31: gpio@fee09000 { 330 pio31: gpio@fee09000 {
328 gpio-controller; 331 gpio-controller;
329 #gpio-cells = <1>; 332 #gpio-cells = <2>;
330 interrupt-controller; 333 interrupt-controller;
331 #interrupt-cells = <2>; 334 #interrupt-cells = <2>;
332 reg = <0x9000 0x100>; 335 reg = <0x9000 0x100>;
@@ -337,6 +340,7 @@
337 pinctrl_pwm0_chan0_default: pwm0-0-default { 340 pinctrl_pwm0_chan0_default: pwm0-0-default {
338 st,pins { 341 st,pins {
339 pwm-out = <&pio9 7 ALT2 OUT>; 342 pwm-out = <&pio9 7 ALT2 OUT>;
343 pwm-capturein = <&pio9 6 ALT2 IN>;
340 }; 344 };
341 }; 345 };
342 }; 346 };
@@ -404,7 +408,7 @@
404 408
405 pio13: gpio@fe820000 { 409 pio13: gpio@fe820000 {
406 gpio-controller; 410 gpio-controller;
407 #gpio-cells = <1>; 411 #gpio-cells = <2>;
408 interrupt-controller; 412 interrupt-controller;
409 #interrupt-cells = <2>; 413 #interrupt-cells = <2>;
410 reg = <0 0x100>; 414 reg = <0 0x100>;
@@ -412,7 +416,7 @@
412 }; 416 };
413 pio14: gpio@fe821000 { 417 pio14: gpio@fe821000 {
414 gpio-controller; 418 gpio-controller;
415 #gpio-cells = <1>; 419 #gpio-cells = <2>;
416 interrupt-controller; 420 interrupt-controller;
417 #interrupt-cells = <2>; 421 #interrupt-cells = <2>;
418 reg = <0x1000 0x100>; 422 reg = <0x1000 0x100>;
@@ -420,7 +424,7 @@
420 }; 424 };
421 pio15: gpio@fe822000 { 425 pio15: gpio@fe822000 {
422 gpio-controller; 426 gpio-controller;
423 #gpio-cells = <1>; 427 #gpio-cells = <2>;
424 interrupt-controller; 428 interrupt-controller;
425 #interrupt-cells = <2>; 429 #interrupt-cells = <2>;
426 reg = <0x2000 0x100>; 430 reg = <0x2000 0x100>;
@@ -428,7 +432,7 @@
428 }; 432 };
429 pio16: gpio@fe823000 { 433 pio16: gpio@fe823000 {
430 gpio-controller; 434 gpio-controller;
431 #gpio-cells = <1>; 435 #gpio-cells = <2>;
432 interrupt-controller; 436 interrupt-controller;
433 #interrupt-cells = <2>; 437 #interrupt-cells = <2>;
434 reg = <0x3000 0x100>; 438 reg = <0x3000 0x100>;
@@ -436,7 +440,7 @@
436 }; 440 };
437 pio17: gpio@fe824000 { 441 pio17: gpio@fe824000 {
438 gpio-controller; 442 gpio-controller;
439 #gpio-cells = <1>; 443 #gpio-cells = <2>;
440 interrupt-controller; 444 interrupt-controller;
441 #interrupt-cells = <2>; 445 #interrupt-cells = <2>;
442 reg = <0x4000 0x100>; 446 reg = <0x4000 0x100>;
@@ -444,7 +448,7 @@
444 }; 448 };
445 pio18: gpio@fe825000 { 449 pio18: gpio@fe825000 {
446 gpio-controller; 450 gpio-controller;
447 #gpio-cells = <1>; 451 #gpio-cells = <2>;
448 interrupt-controller; 452 interrupt-controller;
449 #interrupt-cells = <2>; 453 #interrupt-cells = <2>;
450 reg = <0x5000 0x100>; 454 reg = <0x5000 0x100>;
@@ -576,6 +580,7 @@
576 pinctrl_pwm0_chan1_default: pwm0-1-default { 580 pinctrl_pwm0_chan1_default: pwm0-1-default {
577 st,pins { 581 st,pins {
578 pwm-out = <&pio13 2 ALT2 OUT>; 582 pwm-out = <&pio13 2 ALT2 OUT>;
583 pwm-capturein = <&pio13 1 ALT2 IN>;
579 }; 584 };
580 }; 585 };
581 pinctrl_pwm0_chan2_default: pwm0-2-default { 586 pinctrl_pwm0_chan2_default: pwm0-2-default {
@@ -605,7 +610,7 @@
605 610
606 pio100: gpio@fd6b0000 { 611 pio100: gpio@fd6b0000 {
607 gpio-controller; 612 gpio-controller;
608 #gpio-cells = <1>; 613 #gpio-cells = <2>;
609 interrupt-controller; 614 interrupt-controller;
610 #interrupt-cells = <2>; 615 #interrupt-cells = <2>;
611 reg = <0 0x100>; 616 reg = <0 0x100>;
@@ -613,7 +618,7 @@
613 }; 618 };
614 pio101: gpio@fd6b1000 { 619 pio101: gpio@fd6b1000 {
615 gpio-controller; 620 gpio-controller;
616 #gpio-cells = <1>; 621 #gpio-cells = <2>;
617 interrupt-controller; 622 interrupt-controller;
618 #interrupt-cells = <2>; 623 #interrupt-cells = <2>;
619 reg = <0x1000 0x100>; 624 reg = <0x1000 0x100>;
@@ -621,7 +626,7 @@
621 }; 626 };
622 pio102: gpio@fd6b2000 { 627 pio102: gpio@fd6b2000 {
623 gpio-controller; 628 gpio-controller;
624 #gpio-cells = <1>; 629 #gpio-cells = <2>;
625 interrupt-controller; 630 interrupt-controller;
626 #interrupt-cells = <2>; 631 #interrupt-cells = <2>;
627 reg = <0x2000 0x100>; 632 reg = <0x2000 0x100>;
@@ -642,7 +647,7 @@
642 647
643 pio103: gpio@fd330000 { 648 pio103: gpio@fd330000 {
644 gpio-controller; 649 gpio-controller;
645 #gpio-cells = <1>; 650 #gpio-cells = <2>;
646 interrupt-controller; 651 interrupt-controller;
647 #interrupt-cells = <2>; 652 #interrupt-cells = <2>;
648 reg = <0 0x100>; 653 reg = <0 0x100>;
@@ -650,7 +655,7 @@
650 }; 655 };
651 pio104: gpio@fd331000 { 656 pio104: gpio@fd331000 {
652 gpio-controller; 657 gpio-controller;
653 #gpio-cells = <1>; 658 #gpio-cells = <2>;
654 interrupt-controller; 659 interrupt-controller;
655 #interrupt-cells = <2>; 660 #interrupt-cells = <2>;
656 reg = <0x1000 0x100>; 661 reg = <0x1000 0x100>;
@@ -658,7 +663,7 @@
658 }; 663 };
659 pio105: gpio@fd332000 { 664 pio105: gpio@fd332000 {
660 gpio-controller; 665 gpio-controller;
661 #gpio-cells = <1>; 666 #gpio-cells = <2>;
662 interrupt-controller; 667 interrupt-controller;
663 #interrupt-cells = <2>; 668 #interrupt-cells = <2>;
664 reg = <0x2000 0x100>; 669 reg = <0x2000 0x100>;
@@ -666,7 +671,7 @@
666 }; 671 };
667 pio106: gpio@fd333000 { 672 pio106: gpio@fd333000 {
668 gpio-controller; 673 gpio-controller;
669 #gpio-cells = <1>; 674 #gpio-cells = <2>;
670 interrupt-controller; 675 interrupt-controller;
671 #interrupt-cells = <2>; 676 #interrupt-cells = <2>;
672 reg = <0x3000 0x100>; 677 reg = <0x3000 0x100>;
@@ -675,7 +680,7 @@
675 680
676 pio107: gpio@fd334000 { 681 pio107: gpio@fd334000 {
677 gpio-controller; 682 gpio-controller;
678 #gpio-cells = <1>; 683 #gpio-cells = <2>;
679 interrupt-controller; 684 interrupt-controller;
680 #interrupt-cells = <2>; 685 #interrupt-cells = <2>;
681 reg = <0x4000 0x100>; 686 reg = <0x4000 0x100>;
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 9e3170ccd18c..fe1f9cf770e4 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -474,6 +474,7 @@
474 status = "disabled"; 474 status = "disabled";
475 #pwm-cells = <2>; 475 #pwm-cells = <2>;
476 reg = <0xfed10000 0x68>; 476 reg = <0xfed10000 0x68>;
477 interrupts = <GIC_SPI 200 IRQ_TYPE_NONE>;
477 478
478 pinctrl-names = "default"; 479 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_pwm0_chan0_default 480 pinctrl-0 = <&pinctrl_pwm0_chan0_default
@@ -481,9 +482,11 @@
481 &pinctrl_pwm0_chan2_default 482 &pinctrl_pwm0_chan2_default
482 &pinctrl_pwm0_chan3_default>; 483 &pinctrl_pwm0_chan3_default>;
483 484
484 clock-names = "pwm"; 485 clock-names = "pwm", "capture";
485 clocks = <&clk_sysin>; 486 clocks = <&clk_sysin>, <&clk_s_a0_ls CLK_ICN_REG>;
487
486 st,pwm-num-chan = <4>; 488 st,pwm-num-chan = <4>;
489 st,capture-num-chan = <2>;
487 }; 490 };
488 491
489 /* SBC PWM Module */ 492 /* SBC PWM Module */
@@ -492,6 +495,7 @@
492 status = "disabled"; 495 status = "disabled";
493 #pwm-cells = <2>; 496 #pwm-cells = <2>;
494 reg = <0xfe510000 0x68>; 497 reg = <0xfe510000 0x68>;
498 interrupts = <GIC_SPI 202 IRQ_TYPE_NONE>;
495 499
496 pinctrl-names = "default"; 500 pinctrl-names = "default";
497 pinctrl-0 = <&pinctrl_pwm1_chan0_default 501 pinctrl-0 = <&pinctrl_pwm1_chan0_default
diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts
index 772d2bb07e5f..438e54c585b1 100644
--- a/arch/arm/boot/dts/stih418-b2199.dts
+++ b/arch/arm/boot/dts/stih418-b2199.dts
@@ -8,6 +8,7 @@
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "stih418.dtsi" 10#include "stih418.dtsi"
11#include <dt-bindings/gpio/gpio.h>
11/ { 12/ {
12 model = "STiH418 B2199"; 13 model = "STiH418 B2199";
13 compatible = "st,stih418-b2199", "st,stih418"; 14 compatible = "st,stih418-b2199", "st,stih418";
@@ -35,14 +36,12 @@
35 leds { 36 leds {
36 compatible = "gpio-leds"; 37 compatible = "gpio-leds";
37 red { 38 red {
38 #gpio-cells = <2>;
39 label = "Front Panel LED"; 39 label = "Front Panel LED";
40 gpios = <&pio4 1 0>; 40 gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
41 linux,default-trigger = "heartbeat"; 41 linux,default-trigger = "heartbeat";
42 }; 42 };
43 green { 43 green {
44 #gpio-cells = <2>; 44 gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
45 gpios = <&pio1 3 0>;
46 default-state = "off"; 45 default-state = "off";
47 }; 46 };
48 }; 47 };
@@ -86,6 +85,7 @@
86 sd-uhs-sdr50; 85 sd-uhs-sdr50;
87 sd-uhs-sdr104; 86 sd-uhs-sdr104;
88 sd-uhs-ddr50; 87 sd-uhs-ddr50;
88 non-removable;
89 }; 89 };
90 90
91 miphy28lp_phy: miphy28lp@9b22000 { 91 miphy28lp_phy: miphy28lp@9b22000 {
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index ae6d9978ea19..ee6614b79f7d 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -44,7 +44,7 @@
44 44
45 clockgen_a9_pll: clockgen-a9-pll { 45 clockgen_a9_pll: clockgen-a9-pll {
46 #clock-cells = <1>; 46 #clock-cells = <1>;
47 compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32"; 47 compatible = "st,stih418-clkgen-plla9";
48 48
49 clocks = <&clk_sysin>; 49 clocks = <&clk_sysin>;
50 50
@@ -98,7 +98,7 @@
98 98
99 clk_s_a0_pll: clk-s-a0-pll { 99 clk_s_a0_pll: clk-s-a0-pll {
100 #clock-cells = <1>; 100 #clock-cells = <1>;
101 compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32"; 101 compatible = "st,clkgen-pll0";
102 102
103 clocks = <&clk_sysin>; 103 clocks = <&clk_sysin>;
104 104
@@ -120,7 +120,7 @@
120 120
121 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { 121 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
122 #clock-cells = <1>; 122 #clock-cells = <1>;
123 compatible = "st,stih407-quadfs660-C", "st,quadfs"; 123 compatible = "st,quadfs-pll";
124 reg = <0x9103000 0x1000>; 124 reg = <0x9103000 0x1000>;
125 125
126 clocks = <&clk_sysin>; 126 clocks = <&clk_sysin>;
@@ -137,7 +137,7 @@
137 137
138 clk_s_c0_pll0: clk-s-c0-pll0 { 138 clk_s_c0_pll0: clk-s-c0-pll0 {
139 #clock-cells = <1>; 139 #clock-cells = <1>;
140 compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32"; 140 compatible = "st,clkgen-pll0";
141 141
142 clocks = <&clk_sysin>; 142 clocks = <&clk_sysin>;
143 143
@@ -146,7 +146,7 @@
146 146
147 clk_s_c0_pll1: clk-s-c0-pll1 { 147 clk_s_c0_pll1: clk-s-c0-pll1 {
148 #clock-cells = <1>; 148 #clock-cells = <1>;
149 compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32"; 149 compatible = "st,clkgen-pll1";
150 150
151 clocks = <&clk_sysin>; 151 clocks = <&clk_sysin>;
152 152
@@ -212,7 +212,7 @@
212 212
213 clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { 213 clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
214 #clock-cells = <1>; 214 #clock-cells = <1>;
215 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 215 compatible = "st,quadfs";
216 reg = <0x9104000 0x1000>; 216 reg = <0x9104000 0x1000>;
217 217
218 clocks = <&clk_sysin>; 218 clocks = <&clk_sysin>;
@@ -229,7 +229,7 @@
229 229
230 clk_s_d0_flexgen: clk-s-d0-flexgen { 230 clk_s_d0_flexgen: clk-s-d0-flexgen {
231 #clock-cells = <1>; 231 #clock-cells = <1>;
232 compatible = "st,flexgen"; 232 compatible = "st,flexgen-audio", "st,flexgen";
233 233
234 clocks = <&clk_s_d0_quadfs 0>, 234 clocks = <&clk_s_d0_quadfs 0>,
235 <&clk_s_d0_quadfs 1>, 235 <&clk_s_d0_quadfs 1>,
@@ -248,7 +248,7 @@
248 248
249 clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { 249 clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
250 #clock-cells = <1>; 250 #clock-cells = <1>;
251 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 251 compatible = "st,quadfs";
252 reg = <0x9106000 0x1000>; 252 reg = <0x9106000 0x1000>;
253 253
254 clocks = <&clk_sysin>; 254 clocks = <&clk_sysin>;
@@ -271,7 +271,7 @@
271 271
272 clk_s_d2_flexgen: clk-s-d2-flexgen { 272 clk_s_d2_flexgen: clk-s-d2-flexgen {
273 #clock-cells = <1>; 273 #clock-cells = <1>;
274 compatible = "st,flexgen"; 274 compatible = "st,flexgen-video", "st,flexgen";
275 275
276 clocks = <&clk_s_d2_quadfs 0>, 276 clocks = <&clk_s_d2_quadfs 0>,
277 <&clk_s_d2_quadfs 1>, 277 <&clk_s_d2_quadfs 1>,
@@ -309,7 +309,7 @@
309 309
310 clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { 310 clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
311 #clock-cells = <1>; 311 #clock-cells = <1>;
312 compatible = "st,stih407-quadfs660-D", "st,quadfs"; 312 compatible = "st,quadfs";
313 reg = <0x9107000 0x1000>; 313 reg = <0x9107000 0x1000>;
314 314
315 clocks = <&clk_sysin>; 315 clocks = <&clk_sysin>;
diff --git a/arch/arm/boot/dts/stih41x-b2000.dtsi b/arch/arm/boot/dts/stih41x-b2000.dtsi
index 5f91f455f05b..9bfa0674b452 100644
--- a/arch/arm/boot/dts/stih41x-b2000.dtsi
+++ b/arch/arm/boot/dts/stih41x-b2000.dtsi
@@ -7,6 +7,8 @@
7 * publishhed by the Free Software Foundation. 7 * publishhed by the Free Software Foundation.
8 */ 8 */
9#include <dt-bindings/input/input.h> 9#include <dt-bindings/input/input.h>
10#include <dt-bindings/gpio/gpio.h>
11
10/ { 12/ {
11 13
12 memory{ 14 memory{
@@ -33,9 +35,8 @@
33 leds { 35 leds {
34 compatible = "gpio-leds"; 36 compatible = "gpio-leds";
35 fp_led { 37 fp_led {
36 #gpio-cells = <1>;
37 label = "Front Panel LED"; 38 label = "Front Panel LED";
38 gpios = <&pio105 7>; 39 gpios = <&pio105 7 GPIO_ACTIVE_HIGH>;
39 linux,default-trigger = "heartbeat"; 40 linux,default-trigger = "heartbeat";
40 }; 41 };
41 }; 42 };
diff --git a/arch/arm/boot/dts/stih41x-b2020.dtsi b/arch/arm/boot/dts/stih41x-b2020.dtsi
index 487d7d87dbef..322e0e95176c 100644
--- a/arch/arm/boot/dts/stih41x-b2020.dtsi
+++ b/arch/arm/boot/dts/stih41x-b2020.dtsi
@@ -7,6 +7,7 @@
7 * publishhed by the Free Software Foundation. 7 * publishhed by the Free Software Foundation.
8 */ 8 */
9#include "stih41x-b2020x.dtsi" 9#include "stih41x-b2020x.dtsi"
10#include <dt-bindings/gpio/gpio.h>
10/ { 11/ {
11 memory{ 12 memory{
12 device_type = "memory"; 13 device_type = "memory";
@@ -30,13 +31,12 @@
30 leds { 31 leds {
31 compatible = "gpio-leds"; 32 compatible = "gpio-leds";
32 red { 33 red {
33 #gpio-cells = <1>;
34 label = "Front Panel LED"; 34 label = "Front Panel LED";
35 gpios = <&pio4 1>; 35 gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
36 linux,default-trigger = "heartbeat"; 36 linux,default-trigger = "heartbeat";
37 }; 37 };
38 green { 38 green {
39 gpios = <&pio4 7>; 39 gpios = <&pio4 7 GPIO_ACTIVE_HIGH>;
40 default-state = "off"; 40 default-state = "off";
41 }; 41 };
42 }; 42 };
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 133375bc8aa5..ed2b7a99ecff 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -18,14 +18,12 @@
18 leds { 18 leds {
19 compatible = "gpio-leds"; 19 compatible = "gpio-leds";
20 red { 20 red {
21 #gpio-cells = <2>;
22 label = "Front Panel LED"; 21 label = "Front Panel LED";
23 gpios = <&pio4 1 0>; 22 gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
24 linux,default-trigger = "heartbeat"; 23 linux,default-trigger = "heartbeat";
25 }; 24 };
26 green { 25 green {
27 #gpio-cells = <2>; 26 gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
28 gpios = <&pio1 3 0>;
29 default-state = "off"; 27 default-state = "off";
30 }; 28 };
31 }; 29 };
@@ -65,6 +63,7 @@
65 }; 63 };
66 64
67 mmc0: sdhci@09060000 { 65 mmc0: sdhci@09060000 {
66 non-removable;
68 status = "okay"; 67 status = "okay";
69 }; 68 };
70 69
@@ -135,5 +134,50 @@
135 dvb-card = <STV0367_TDA18212_NIMA_1>; 134 dvb-card = <STV0367_TDA18212_NIMA_1>;
136 }; 135 };
137 }; 136 };
137
138 sti_uni_player2: sti-uni-player@8d82000 {
139 status = "okay";
140 };
141
142 sti_uni_player3: sti-uni-player@8d85000 {
143 status = "okay";
144 };
145
146 sti_sasg_codec: sti-sasg-codec {
147 status = "okay";
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_spdif_out>;
150 };
151
152 sound {
153 compatible = "simple-audio-card";
154 simple-audio-card,name = "sti audio card";
155 status = "okay";
156
157 simple-audio-card,dai-link@0 {
158 /* DAC */
159 format = "i2s";
160 mclk-fs = <256>;
161 cpu {
162 sound-dai = <&sti_uni_player2>;
163 };
164
165 codec {
166 sound-dai = <&sti_sasg_codec 1>;
167 };
168 };
169 simple-audio-card,dai-link@1 {
170 /* SPDIF */
171 format = "left_j";
172 mclk-fs = <128>;
173 cpu {
174 sound-dai = <&sti_uni_player3>;
175 };
176
177 codec {
178 sound-dai = <&sti_sasg_codec 0>;
179 };
180 };
181 };
138 }; 182 };
139}; 183};
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 2e0741b3de60..336ee4fb587d 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -45,6 +45,7 @@
45 * OTHER DEALINGS IN THE SOFTWARE. 45 * OTHER DEALINGS IN THE SOFTWARE.
46 */ 46 */
47 47
48#include "skeleton.dtsi"
48#include "armv7-m.dtsi" 49#include "armv7-m.dtsi"
49#include <dt-bindings/pinctrl/stm32f429-pinfunc.h> 50#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
50 51
diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
index f3cb297fd1db..5f98582232d6 100644
--- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
+++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
@@ -121,10 +121,6 @@
121 status = "okay"; 121 status = "okay";
122}; 122};
123 123
124&ohci1 {
125 status = "okay";
126};
127
128&otg_sram { 124&otg_sram {
129 status = "okay"; 125 status = "okay";
130}; 126};
diff --git a/arch/arm/boot/dts/sun5i-a13-empire-electronix-m712.dts b/arch/arm/boot/dts/sun5i-a13-empire-electronix-m712.dts
new file mode 100644
index 000000000000..b1e2afd9de52
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-empire-electronix-m712.dts
@@ -0,0 +1,51 @@
1/*
2 * Copyright 2016 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun5i-a13.dtsi"
45#include "sun5i-reference-design-tablet.dtsi"
46#include <dt-bindings/interrupt-controller/irq.h>
47
48/ {
49 model = "Empire Electronix M712 tablet";
50 compatible = "empire-electronix,m712", "allwinner,sun5i-a13";
51};
diff --git a/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts b/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts
index 1b11ec95ae53..439ae3b537df 100644
--- a/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts
+++ b/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts
@@ -42,171 +42,9 @@
42 42
43/dts-v1/; 43/dts-v1/;
44#include "sun5i-a13.dtsi" 44#include "sun5i-a13.dtsi"
45#include "sunxi-common-regulators.dtsi" 45#include "sun5i-reference-design-tablet.dtsi"
46#include <dt-bindings/gpio/gpio.h>
47#include <dt-bindings/input/input.h>
48#include <dt-bindings/interrupt-controller/irq.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50 46
51/ { 47/ {
52 model = "INet-98V Rev 02"; 48 model = "INet-98V Rev 02";
53 compatible = "primux,inet98v-rev2", "allwinner,sun5i-a13"; 49 compatible = "primux,inet98v-rev2", "allwinner,sun5i-a13";
54
55 aliases {
56 serial0 = &uart1;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63};
64
65&cpu0 {
66 cpu-supply = <&reg_dcdc2>;
67};
68
69&ehci0 {
70 status = "okay";
71};
72
73&i2c0 {
74 pinctrl-names = "default";
75 pinctrl-0 = <&i2c0_pins_a>;
76 status = "okay";
77
78 axp209: pmic@34 {
79 reg = <0x34>;
80 interrupts = <0>;
81 };
82};
83
84#include "axp209.dtsi"
85
86&i2c1 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&i2c1_pins_a>;
89 status = "okay";
90
91 pcf8563: rtc@51 {
92 compatible = "nxp,pcf8563";
93 reg = <0x51>;
94 };
95};
96
97&lradc {
98 vref-supply = <&reg_ldo2>;
99 status = "okay";
100
101 button@200 {
102 label = "Volume Up";
103 linux,code = <KEY_VOLUMEUP>;
104 channel = <0>;
105 voltage = <200000>;
106 };
107
108 button@400 {
109 label = "Volume Down";
110 linux,code = <KEY_VOLUMEDOWN>;
111 channel = <0>;
112 voltage = <400000>;
113 };
114};
115
116&mmc0 {
117 pinctrl-names = "default";
118 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet98fv2>;
119 vmmc-supply = <&reg_vcc3v3>;
120 bus-width = <4>;
121 cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
122 cd-inverted;
123 status = "okay";
124};
125
126&otg_sram {
127 status = "okay";
128};
129
130&pio {
131 mmc0_cd_pin_inet98fv2: mmc0_cd_pin@0 {
132 allwinner,pins = "PG0";
133 allwinner,function = "gpio_in";
134 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
135 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
136 };
137
138 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
139 allwinner,pins = "PG1";
140 allwinner,function = "gpio_in";
141 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
142 allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
143 };
144
145 usb0_id_detect_pin: usb0_id_detect_pin@0 {
146 allwinner,pins = "PG2";
147 allwinner,function = "gpio_in";
148 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
149 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
150 };
151};
152
153&reg_dcdc2 {
154 regulator-always-on;
155 regulator-min-microvolt = <1000000>;
156 regulator-max-microvolt = <1400000>;
157 regulator-name = "vdd-cpu";
158};
159
160&reg_dcdc3 {
161 regulator-always-on;
162 regulator-min-microvolt = <1250000>;
163 regulator-max-microvolt = <1250000>;
164 regulator-name = "vdd-int-pll";
165};
166
167&reg_ldo1 {
168 regulator-name = "vdd-rtc";
169};
170
171&reg_ldo2 {
172 regulator-always-on;
173 regulator-min-microvolt = <3000000>;
174 regulator-max-microvolt = <3000000>;
175 regulator-name = "avcc";
176};
177
178&reg_ldo3 {
179 regulator-min-microvolt = <3300000>;
180 regulator-max-microvolt = <3300000>;
181 regulator-name = "vcc-wifi";
182};
183
184&reg_usb0_vbus {
185 gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
186 status = "okay";
187};
188
189&uart1 {
190 pinctrl-names = "default";
191 pinctrl-0 = <&uart1_pins_b>;
192 status = "okay";
193};
194
195&usb_otg {
196 dr_mode = "otg";
197 status = "okay";
198};
199
200&usb0_vbus_pin_a {
201 allwinner,pins = "PG12";
202};
203
204&usbphy {
205 pinctrl-names = "default";
206 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
207 usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
208 usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
209 usb0_vbus-supply = <&reg_usb0_vbus>;
210 usb1_vbus-supply = <&reg_ldo3>;
211 status = "okay";
212}; 50};
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
index f694482bdeb6..b68a12374b35 100644
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -64,6 +64,16 @@
64 chosen { 64 chosen {
65 stdout-path = "serial0:115200n8"; 65 stdout-path = "serial0:115200n8";
66 }; 66 };
67
68 leds {
69 compatible = "gpio-leds";
70
71 status {
72 label = "chip:white:status";
73 gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
74 default-state = "on";
75 };
76 };
67}; 77};
68 78
69&be0 { 79&be0 {
diff --git a/arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts b/arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts
index e182eec6d878..882a4d89fa22 100644
--- a/arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-colorfly-e708-q1.dts
@@ -42,32 +42,11 @@
42 42
43/dts-v1/; 43/dts-v1/;
44#include "sun6i-a31s.dtsi" 44#include "sun6i-a31s.dtsi"
45#include "sunxi-common-regulators.dtsi" 45#include "sun6i-reference-design-tablet.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/input/input.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50 46
51/ { 47/ {
52 model = "Colorfly E708 Q1 tablet"; 48 model = "Colorfly E708 Q1 tablet";
53 compatible = "colorfly,e708-q1", "allwinner,sun6i-a31s"; 49 compatible = "colorfly,e708-q1", "allwinner,sun6i-a31s";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62};
63
64&cpu0 {
65 cpu-supply = <&reg_dcdc3>;
66};
67
68&ehci0 {
69 /* rtl8188etv wifi is connected here */
70 status = "okay";
71}; 50};
72 51
73&lradc { 52&lradc {
@@ -82,103 +61,6 @@
82 }; 61 };
83}; 62};
84 63
85&mmc0 {
86 pinctrl-names = "default";
87 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>;
88 vmmc-supply = <&reg_dcdc1>;
89 bus-width = <4>;
90 cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
91 cd-inverted;
92 status = "okay";
93};
94
95&pio {
96 mma8452_int_e708_q1: mma8452_int_pin@0 {
97 allwinner,pins = "PA9";
98 allwinner,function = "gpio_in";
99 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
100 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
101 };
102
103 mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 {
104 allwinner,pins = "PA8";
105 allwinner,function = "gpio_in";
106 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
107 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
108 };
109};
110
111&p2wi {
112 status = "okay";
113
114 axp22x: pmic@68 {
115 compatible = "x-powers,axp221";
116 reg = <0x68>;
117 interrupt-parent = <&nmi_intc>;
118 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
119 };
120};
121
122#include "axp22x.dtsi"
123
124&reg_aldo3 {
125 regulator-always-on;
126 regulator-min-microvolt = <2700000>;
127 regulator-max-microvolt = <3300000>;
128 regulator-name = "avcc";
129};
130
131&reg_dc1sw {
132 regulator-name = "vcc-lcd";
133};
134
135&reg_dc5ldo {
136 regulator-always-on;
137 regulator-min-microvolt = <700000>;
138 regulator-max-microvolt = <1320000>;
139 regulator-name = "vdd-cpus"; /* This is an educated guess */
140};
141
142&reg_dcdc1 {
143 regulator-always-on;
144 regulator-min-microvolt = <3000000>;
145 regulator-max-microvolt = <3000000>;
146 regulator-name = "vcc-3v0";
147};
148
149&reg_dcdc2 {
150 regulator-min-microvolt = <700000>;
151 regulator-max-microvolt = <1320000>;
152 regulator-name = "vdd-gpu";
153};
154
155&reg_dcdc3 {
156 regulator-always-on;
157 regulator-min-microvolt = <700000>;
158 regulator-max-microvolt = <1320000>;
159 regulator-name = "vdd-cpu";
160};
161
162&reg_dcdc4 {
163 regulator-always-on;
164 regulator-min-microvolt = <700000>;
165 regulator-max-microvolt = <1320000>;
166 regulator-name = "vdd-sys-dll";
167};
168
169&reg_dcdc5 {
170 regulator-always-on;
171 regulator-min-microvolt = <1500000>;
172 regulator-max-microvolt = <1500000>;
173 regulator-name = "vcc-dram";
174};
175
176&reg_dldo1 {
177 regulator-min-microvolt = <3300000>;
178 regulator-max-microvolt = <3300000>;
179 regulator-name = "vcc-wifi";
180};
181
182&reg_dldo2 { 64&reg_dldo2 {
183 regulator-min-microvolt = <1800000>; 65 regulator-min-microvolt = <1800000>;
184 regulator-max-microvolt = <1800000>; 66 regulator-max-microvolt = <1800000>;
@@ -186,23 +68,5 @@
186}; 68};
187 69
188&simplefb_lcd { 70&simplefb_lcd {
189 vcc-lcd-supply = <&reg_dc1sw>;
190 vcc-pg-supply = <&reg_dldo2>; 71 vcc-pg-supply = <&reg_dldo2>;
191}; 72};
192
193/*
194 * FIXME for now we only support host mode and rely on u-boot to have
195 * turned on Vbus which is controlled by the axp221 pmic on the board.
196 *
197 * Once we have axp221 power-supply and vbus-usb support we should switch
198 * to fully supporting otg.
199 */
200&usb_otg {
201 dr_mode = "host";
202 status = "okay";
203};
204
205&usbphy {
206 usb1_vbus-supply = <&reg_dldo1>;
207 status = "okay";
208};
diff --git a/arch/arm/boot/dts/sun6i-a31s-inet-q972.dts b/arch/arm/boot/dts/sun6i-a31s-inet-q972.dts
new file mode 100644
index 000000000000..e584e6b186a7
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s-inet-q972.dts
@@ -0,0 +1,100 @@
1/*
2 * Copyright 2016 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun6i-a31s.dtsi"
45#include "sun6i-reference-design-tablet.dtsi"
46
47/ {
48 model = "iNet Q972 tablet";
49 compatible = "inet-tek,inet-q972", "allwinner,sun6i-a31s";
50};
51
52&ehci1 {
53 status = "okay";
54};
55
56&i2c1 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&i2c1_pins_a>;
59 status = "okay";
60
61 ft5406ee8: touchscreen@38 {
62 compatible = "edt,edt-ft5406";
63 reg = <0x38>;
64 interrupt-parent = <&pio>;
65 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>; /* PA3 */
66 touchscreen-size-x = <768>;
67 touchscreen-size-y = <1024>;
68 touchscreen-swapped-x-y;
69 };
70};
71
72&lradc {
73 vref-supply = <&reg_aldo3>;
74 status = "okay";
75
76 button@200 {
77 label = "Volume Down";
78 linux,code = <KEY_VOLUMEDOWN>;
79 channel = <0>;
80 voltage = <200000>;
81 };
82
83 button@900 {
84 label = "Volume Up";
85 linux,code = <KEY_VOLUMEUP>;
86 channel = <0>;
87 voltage = <900000>;
88 };
89
90 button@1200 {
91 label = "Back";
92 linux,code = <KEY_BACK>;
93 channel = <0>;
94 voltage = <1200000>;
95 };
96};
97
98&ohci1 {
99 status = "okay";
100};
diff --git a/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
new file mode 100644
index 000000000000..0c434304e040
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
@@ -0,0 +1,193 @@
1/*
2 * Copyright 2016 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include "sunxi-common-regulators.dtsi"
44
45#include <dt-bindings/gpio/gpio.h>
46#include <dt-bindings/input/input.h>
47#include <dt-bindings/pinctrl/sun4i-a10.h>
48
49/ {
50 aliases {
51 serial0 = &uart0;
52 };
53
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
57};
58
59&cpu0 {
60 cpu-supply = <&reg_dcdc3>;
61};
62
63&ehci0 {
64 /* Wifi is connected here */
65 status = "okay";
66};
67
68&mmc0 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>;
71 vmmc-supply = <&reg_dcdc1>;
72 bus-width = <4>;
73 cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
74 cd-inverted;
75 status = "okay";
76};
77
78&pio {
79 mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 {
80 allwinner,pins = "PA8";
81 allwinner,function = "gpio_in";
82 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
83 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
84 };
85
86 usb0_id_detect_pin: usb0_id_detect_pin@0 {
87 allwinner,pins = "PA15";
88 allwinner,function = "gpio_in";
89 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
90 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
91 };
92};
93
94&p2wi {
95 status = "okay";
96
97 axp22x: pmic@68 {
98 compatible = "x-powers,axp221";
99 reg = <0x68>;
100 interrupt-parent = <&nmi_intc>;
101 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
102 drivevbus-supply = <&reg_vcc5v0>;
103 x-powers,drive-vbus-en;
104 };
105};
106
107#include "axp22x.dtsi"
108
109&reg_aldo3 {
110 regulator-always-on;
111 regulator-min-microvolt = <2700000>;
112 regulator-max-microvolt = <3300000>;
113 regulator-name = "avcc";
114};
115
116&reg_dc1sw {
117 regulator-name = "vcc-lcd";
118};
119
120&reg_dc5ldo {
121 regulator-always-on;
122 regulator-min-microvolt = <700000>;
123 regulator-max-microvolt = <1320000>;
124 regulator-name = "vdd-cpus"; /* This is an educated guess */
125};
126
127&reg_dcdc1 {
128 regulator-always-on;
129 regulator-min-microvolt = <3000000>;
130 regulator-max-microvolt = <3000000>;
131 regulator-name = "vcc-3v0";
132};
133
134&reg_dcdc2 {
135 regulator-min-microvolt = <700000>;
136 regulator-max-microvolt = <1320000>;
137 regulator-name = "vdd-gpu";
138};
139
140&reg_dcdc3 {
141 regulator-always-on;
142 regulator-min-microvolt = <700000>;
143 regulator-max-microvolt = <1320000>;
144 regulator-name = "vdd-cpu";
145};
146
147&reg_dcdc4 {
148 regulator-always-on;
149 regulator-min-microvolt = <700000>;
150 regulator-max-microvolt = <1320000>;
151 regulator-name = "vdd-sys-dll";
152};
153
154&reg_dcdc5 {
155 regulator-always-on;
156 regulator-min-microvolt = <1500000>;
157 regulator-max-microvolt = <1500000>;
158 regulator-name = "vcc-dram";
159};
160
161&reg_dldo1 {
162 regulator-min-microvolt = <3300000>;
163 regulator-max-microvolt = <3300000>;
164 regulator-name = "vcc-wifi";
165};
166
167&reg_drivevbus {
168 regulator-name = "usb0-vbus";
169 status = "okay";
170};
171
172&simplefb_lcd {
173 vcc-lcd-supply = <&reg_dc1sw>;
174};
175
176&usb_otg {
177 dr_mode = "otg";
178 status = "okay";
179};
180
181&usb_power_supply {
182 status = "okay";
183};
184
185&usbphy {
186 pinctrl-names = "default";
187 pinctrl-0 = <&usb0_id_detect_pin>;
188 usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
189 usb0_vbus_power-supply = <&usb_power_supply>;
190 usb0_vbus-supply = <&reg_drivevbus>;
191 usb1_vbus-supply = <&reg_dldo1>;
192 status = "okay";
193};
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index e3b196e08ccf..826877b14bff 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -239,6 +239,14 @@
239 "mmc2_sample"; 239 "mmc2_sample";
240 }; 240 };
241 241
242 nand_clk: clk@01c20080 {
243 #clock-cells = <0>;
244 compatible = "allwinner,sun4i-a10-mod0-clk";
245 reg = <0x01c20080 0x4>;
246 clocks = <&osc24M>, <&pll6 1>;
247 clock-output-names = "nand";
248 };
249
242 usb_clk: clk@01c200cc { 250 usb_clk: clk@01c200cc {
243 #clock-cells = <1>; 251 #clock-cells = <1>;
244 #reset-cells = <1>; 252 #reset-cells = <1>;
@@ -322,6 +330,19 @@
322 #size-cells = <0>; 330 #size-cells = <0>;
323 }; 331 };
324 332
333 nfc: nand@01c03000 {
334 compatible = "allwinner,sun4i-a10-nand";
335 reg = <0x01c03000 0x1000>;
336 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&ahb1_gates 13>, <&nand_clk>;
338 clock-names = "ahb", "mod";
339 resets = <&ahb1_rst 13>;
340 reset-names = "ahb";
341 status = "disabled";
342 #address-cells = <1>;
343 #size-cells = <0>;
344 };
345
325 ehci0: usb@01c1a000 { 346 ehci0: usb@01c1a000 {
326 compatible = "allwinner,sun8i-a23-ehci", "generic-ehci"; 347 compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
327 reg = <0x01c1a000 0x100>; 348 reg = <0x01c1a000 0x100>;
diff --git a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts
index b2ce284a65a2..f27ebbbeac09 100644
--- a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts
+++ b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts
@@ -42,70 +42,18 @@
42 42
43/dts-v1/; 43/dts-v1/;
44#include "sun8i-a23.dtsi" 44#include "sun8i-a23.dtsi"
45#include "sunxi-common-regulators.dtsi" 45#include "sun8i-reference-design-tablet.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/input/input.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50#include <dt-bindings/pwm/pwm.h>
51 46
52/ { 47/ {
53 model = "Allwinner GT90H Dual Core Tablet (v4)"; 48 model = "Allwinner GT90H Dual Core Tablet (v4)";
54 compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a23"; 49 compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a23";
55
56 aliases {
57 serial0 = &r_uart;
58 };
59
60 backlight: backlight {
61 compatible = "pwm-backlight";
62 pinctrl-names = "default";
63 pinctrl-0 = <&bl_en_pin_gt90h>;
64 pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
65 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
66 default-brightness-level = <8>;
67 enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
68 };
69
70 chosen {
71 stdout-path = "serial0:115200n8";
72 };
73}; 50};
74 51
75&ehci0 { 52&ehci0 {
76 status = "okay"; 53 status = "okay";
77}; 54};
78 55
79&i2c0 {
80 pinctrl-names = "default";
81 pinctrl-0 = <&i2c0_pins_a>;
82 status = "okay";
83};
84
85&i2c1 {
86 pinctrl-names = "default";
87 pinctrl-0 = <&i2c1_pins_a>;
88 status = "okay";
89};
90
91&lradc { 56&lradc {
92 vref-supply = <&reg_vcc3v0>;
93 status = "okay";
94
95 button@200 {
96 label = "Volume Up";
97 linux,code = <KEY_VOLUMEUP>;
98 channel = <0>;
99 voltage = <200000>;
100 };
101
102 button@400 {
103 label = "Volume Down";
104 linux,code = <KEY_VOLUMEDOWN>;
105 channel = <0>;
106 voltage = <400000>;
107 };
108
109 button@600 { 57 button@600 {
110 label = "Back"; 58 label = "Back";
111 linux,code = <KEY_BACK>; 59 linux,code = <KEY_BACK>;
@@ -114,144 +62,6 @@
114 }; 62 };
115}; 63};
116 64
117&mmc0 {
118 pinctrl-names = "default";
119 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gt90h>;
120 vmmc-supply = <&reg_aldo1>;
121 bus-width = <4>;
122 cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
123 cd-inverted;
124 status = "okay";
125};
126
127&pio {
128 bl_en_pin_gt90h: bl_en_pin@0 {
129 allwinner,pins = "PH6";
130 allwinner,function = "gpio_in";
131 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
132 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
133 };
134
135 mmc0_cd_pin_gt90h: mmc0_cd_pin@0 {
136 allwinner,pins = "PB4";
137 allwinner,function = "gpio_in";
138 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
139 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
140 };
141};
142
143&pwm {
144 pinctrl-names = "default";
145 pinctrl-0 = <&pwm0_pins>;
146 status = "okay";
147};
148
149&r_rsb {
150 status = "okay";
151
152 axp22x: pmic@3a3 {
153 compatible = "x-powers,axp223";
154 reg = <0x3a3>;
155 interrupt-parent = <&nmi_intc>;
156 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
157 eldoin-supply = <&reg_dcdc1>;
158 };
159};
160
161&r_uart {
162 pinctrl-names = "default";
163 pinctrl-0 = <&r_uart_pins_a>;
164 status = "okay";
165};
166
167#include "axp22x.dtsi"
168
169&reg_aldo1 {
170 regulator-always-on;
171 regulator-min-microvolt = <3000000>;
172 regulator-max-microvolt = <3000000>;
173 regulator-name = "vcc-io";
174};
175
176&reg_aldo2 {
177 regulator-always-on;
178 regulator-min-microvolt = <2350000>;
179 regulator-max-microvolt = <2650000>;
180 regulator-name = "vdd-dll";
181};
182
183&reg_aldo3 {
184 regulator-always-on;
185 regulator-min-microvolt = <2700000>;
186 regulator-max-microvolt = <3300000>;
187 regulator-name = "vcc-pll-avcc";
188};
189
190&reg_dc1sw {
191 regulator-name = "vcc-lcd";
192};
193
194&reg_dc5ldo {
195 regulator-always-on;
196 regulator-min-microvolt = <900000>;
197 regulator-max-microvolt = <1400000>;
198 regulator-name = "vdd-cpus";
199};
200
201&reg_dcdc1 {
202 regulator-always-on;
203 regulator-min-microvolt = <3000000>;
204 regulator-max-microvolt = <3000000>;
205 regulator-name = "vcc-3v0";
206};
207
208&reg_dcdc2 {
209 regulator-always-on;
210 regulator-min-microvolt = <900000>;
211 regulator-max-microvolt = <1400000>;
212 regulator-name = "vdd-sys";
213};
214
215&reg_dcdc3 {
216 regulator-always-on;
217 regulator-min-microvolt = <900000>;
218 regulator-max-microvolt = <1400000>;
219 regulator-name = "vdd-cpu";
220};
221
222&reg_dcdc5 {
223 regulator-always-on;
224 regulator-min-microvolt = <1500000>;
225 regulator-max-microvolt = <1500000>;
226 regulator-name = "vcc-dram";
227};
228
229&reg_dldo1 {
230 regulator-min-microvolt = <3300000>;
231 regulator-max-microvolt = <3300000>;
232 regulator-name = "vcc-wifi";
233};
234
235&reg_rtc_ldo {
236 regulator-name = "vcc-rtc";
237};
238
239&simplefb_lcd {
240 vcc-lcd-supply = <&reg_dc1sw>;
241};
242
243/*
244 * FIXME for now we only support host mode and rely on u-boot to have
245 * turned on Vbus which is controlled by the axp223 pmic on the board.
246 *
247 * Once we have axp223 support we should switch to fully supporting otg.
248 */
249&usb_otg {
250 dr_mode = "host";
251 status = "okay";
252};
253
254&usbphy { 65&usbphy {
255 usb1_vbus-supply = <&reg_dldo1>; 66 usb1_vbus-supply = <&reg_dldo1>;
256 status = "okay";
257}; 67};
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index e3004428e7a7..4789aac89955 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -47,4 +47,46 @@
47/ { 47/ {
48 model = "Polaroid MID2407PXE03 tablet"; 48 model = "Polaroid MID2407PXE03 tablet";
49 compatible = "polaroid,mid2407pxe03", "allwinner,sun8i-a23"; 49 compatible = "polaroid,mid2407pxe03", "allwinner,sun8i-a23";
50
51 aliases {
52 ethernet0 = &esp8089;
53 };
54
55 wifi_pwrseq: wifi_pwrseq {
56 compatible = "mmc-pwrseq-simple";
57 pinctrl-names = "default";
58 pinctrl-0 = <&wifi_pwrseq_pin_mid2407>;
59 reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
60 /* The esp8089 needs 200 ms after driving wifi-en high */
61 post-power-on-delay-ms = <200>;
62 };
63};
64
65&mmc1 {
66 pinctrl-names = "default";
67 pinctrl-0 = <&mmc1_pins_a>;
68 vmmc-supply = <&reg_dldo1>;
69 mmc-pwrseq = <&wifi_pwrseq>;
70 bus-width = <4>;
71 non-removable;
72 status = "okay";
73
74 esp8089: sdio_wifi@1 {
75 compatible = "esp,esp8089";
76 reg = <1>;
77 esp,crystal-26M-en = <2>;
78 };
79};
80
81&mmc1_pins_a {
82 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
83};
84
85&r_pio {
86 wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 {
87 allwinner,pins = "PL6";
88 allwinner,function = "gpio_out";
89 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
90 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
91 };
50}; 92};
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index 6d06e24d446b..c9213caf7424 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -47,4 +47,46 @@
47/ { 47/ {
48 model = "Polaroid MID2809PXE04 tablet"; 48 model = "Polaroid MID2809PXE04 tablet";
49 compatible = "polaroid,mid2809pxe04", "allwinner,sun8i-a23"; 49 compatible = "polaroid,mid2809pxe04", "allwinner,sun8i-a23";
50
51 aliases {
52 ethernet0 = &esp8089;
53 };
54
55 wifi_pwrseq: wifi_pwrseq {
56 compatible = "mmc-pwrseq-simple";
57 pinctrl-names = "default";
58 pinctrl-0 = <&wifi_pwrseq_pin_mid2809>;
59 reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
60 /* The esp8089 needs 200 ms after driving wifi-en high */
61 post-power-on-delay-ms = <200>;
62 };
63};
64
65&mmc1 {
66 pinctrl-names = "default";
67 pinctrl-0 = <&mmc1_pins_a>;
68 vmmc-supply = <&reg_dldo1>;
69 mmc-pwrseq = <&wifi_pwrseq>;
70 bus-width = <4>;
71 non-removable;
72 status = "okay";
73
74 esp8089: sdio_wifi@1 {
75 compatible = "esp,esp8089";
76 reg = <1>;
77 esp,crystal-26M-en = <2>;
78 };
79};
80
81&mmc1_pins_a {
82 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
83};
84
85&r_pio {
86 wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 {
87 allwinner,pins = "PL6";
88 allwinner,function = "gpio_out";
89 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
90 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
91 };
50}; 92};
diff --git a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts
index 65660324005c..de6269dcac3a 100644
--- a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts
+++ b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts
@@ -47,6 +47,11 @@
47/ { 47/ {
48 model = "Allwinner GA10H Quad Core Tablet (v1.1)"; 48 model = "Allwinner GA10H Quad Core Tablet (v1.1)";
49 compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33"; 49 compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33";
50
51 aliases {
52 /* Make u-boot set mac-address for rtl8703as (no eeprom) */
53 ethernet0 = &rtl8703as;
54 };
50}; 55};
51 56
52&ehci0 { 57&ehci0 {
@@ -62,6 +67,19 @@
62 }; 67 };
63}; 68};
64 69
70&mmc1 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&mmc1_pins_a>;
73 vmmc-supply = <&reg_dldo1>;
74 bus-width = <4>;
75 non-removable;
76 status = "okay";
77
78 rtl8703as: sdio_wifi@1 {
79 reg = <1>;
80 };
81};
82
65&ohci0 { 83&ohci0 {
66 status = "okay"; 84 status = "okay";
67}; 85};
diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
new file mode 100644
index 000000000000..0f52cd9dfa41
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
@@ -0,0 +1,88 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 * Copyright 2016 Icenowy Zheng <icenowy@aosc.xyz>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include "sun8i-a33.dtsi"
46#include "sun8i-reference-design-tablet.dtsi"
47
48/ {
49 model = "INet-D978 Rev 02";
50 compatible = "primux,inet-d978-rev2", "allwinner,sun8i-a33";
51
52 leds {
53 compatible = "gpio-leds";
54 pinctrl-names = "default";
55 pinctrl-0 = <&led_pin_d978>;
56
57 home {
58 label = "d978:blue:home";
59 gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
60 };
61 };
62};
63
64&mmc1_pins_a {
65 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
66};
67
68&mmc1 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&mmc1_pins_a>;
71 vmmc-supply = <&reg_dldo1>;
72 bus-width = <4>;
73 non-removable;
74 status = "okay";
75
76 rtl8723bs: sdio_wifi@1 {
77 reg = <1>;
78 };
79};
80
81&r_pio {
82 led_pin_d978: led_pin_d978@0 {
83 allwinner,pins = "PL5";
84 allwinner,function = "gpio_out";
85 allwinner,drive = <SUN4I_PINCTRL_20_MA>;
86 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
87 };
88};
diff --git a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
new file mode 100644
index 000000000000..9ea637e82b2d
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
@@ -0,0 +1,226 @@
1/*
2 * Copyright 2016 - Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
3 * Olimex LTD. <support@olimex.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include "sun8i-a33.dtsi"
46#include "sunxi-common-regulators.dtsi"
47
48#include <dt-bindings/gpio/gpio.h>
49#include <dt-bindings/input/input.h>
50
51/ {
52 model = "Olimex A33-OLinuXino";
53 compatible = "olimex,a33-olinuxino","allwinner,sun8i-a33";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63 leds {
64 compatible = "gpio-leds";
65 pinctrl-names = "default";
66 pinctrl-0 = <&led_pin_olinuxino>;
67
68 green {
69 label = "a33-olinuxino:green:usr";
70 gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>;
71 };
72 };
73};
74
75&ehci0 {
76 status = "okay";
77};
78
79&mmc0 {
80 pinctrl-names = "default";
81 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>;
82 vmmc-supply = <&reg_dcdc1>;
83 bus-width = <4>;
84 cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
85 cd-inverted;
86 status = "okay";
87};
88
89&ohci0 {
90 status = "okay";
91};
92
93&pio {
94 led_pin_olinuxino: led_pins@0 {
95 allwinner,pins = "PB7";
96 allwinner,function = "gpio_out";
97 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
98 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
99 };
100
101 mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
102 allwinner,pins = "PB4";
103 allwinner,function = "gpio_in";
104 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
105 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
106 };
107
108 usb0_id_detect_pin: usb0_id_detect_pin@0 {
109 allwinner,pins = "PB3";
110 allwinner,function = "gpio_in";
111 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
112 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
113 };
114};
115
116&r_rsb {
117 status = "okay";
118
119 axp22x: pmic@3a3 {
120 compatible = "x-powers,axp223";
121 reg = <0x3a3>;
122 interrupt-parent = <&nmi_intc>;
123 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
124 eldoin-supply = <&reg_dcdc1>;
125 x-powers,drive-vbus-en;
126 };
127};
128
129#include "axp22x.dtsi"
130
131&reg_aldo1 {
132 regulator-always-on;
133 regulator-min-microvolt = <3300000>;
134 regulator-max-microvolt = <3300000>;
135 regulator-name = "vcc-io";
136};
137
138&reg_aldo2 {
139 regulator-always-on;
140 regulator-min-microvolt = <2350000>;
141 regulator-max-microvolt = <2650000>;
142 regulator-name = "vdd-dll";
143};
144
145&reg_aldo3 {
146 regulator-always-on;
147 regulator-min-microvolt = <3300000>;
148 regulator-max-microvolt = <3300000>;
149 regulator-name = "vcc-avcc";
150};
151
152&reg_dc1sw {
153 regulator-name = "vcc-lcd";
154};
155
156&reg_dc5ldo {
157 regulator-always-on;
158 regulator-min-microvolt = <900000>;
159 regulator-max-microvolt = <1400000>;
160 regulator-name = "vdd-cpus";
161};
162
163&reg_dcdc1 {
164 regulator-always-on;
165 regulator-min-microvolt = <3300000>;
166 regulator-max-microvolt = <3300000>;
167 regulator-name = "vcc-3v3";
168};
169
170&reg_dcdc2 {
171 regulator-always-on;
172 regulator-min-microvolt = <900000>;
173 regulator-max-microvolt = <1400000>;
174 regulator-name = "vdd-sys";
175};
176
177&reg_dcdc3 {
178 regulator-always-on;
179 regulator-min-microvolt = <900000>;
180 regulator-max-microvolt = <1400000>;
181 regulator-name = "vdd-cpu";
182};
183
184&reg_dcdc5 {
185 regulator-always-on;
186 regulator-min-microvolt = <1500000>;
187 regulator-max-microvolt = <1500000>;
188 regulator-name = "vcc-dram";
189};
190
191&reg_drivevbus {
192 regulator-name = "usb0-vbus";
193 status = "okay";
194};
195
196&reg_rtc_ldo {
197 regulator-name = "vcc-rtc";
198};
199
200&simplefb_lcd {
201 vcc-lcd-supply = <&reg_dc1sw>;
202};
203
204&uart0 {
205 pinctrl-names = "default";
206 pinctrl-0 = <&uart0_pins_b>;
207 status = "okay";
208};
209
210&usb_otg {
211 dr_mode = "otg";
212 status = "okay";
213};
214
215&usb_power_supply {
216 status = "okay";
217};
218
219&usbphy {
220 pinctrl-names = "default";
221 pinctrl-0 = <&usb0_id_detect_pin>;
222 usb0_id_det-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
223 usb0_vbus_power-supply = <&usb_power_supply>;
224 usb0_vbus-supply = <&reg_drivevbus>;
225 status = "okay";
226};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
new file mode 100644
index 000000000000..3d64cafc1e90
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -0,0 +1,125 @@
1/*
2 * Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-h3.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/pinctrl/sun4i-a10.h>
49
50/ {
51 model = "FriendlyARM NanoPi NEO";
52 compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
53
54 aliases {
55 serial0 = &uart0;
56 };
57
58 chosen {
59 stdout-path = "serial0:115200n8";
60 };
61
62 leds {
63 compatible = "gpio-leds";
64 pinctrl-names = "default";
65 pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
66
67 pwr {
68 label = "nanopi:green:pwr";
69 gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
70 default-state = "on";
71 };
72
73 status {
74 label = "nanopi:blue:status";
75 gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
76 };
77 };
78};
79
80&ehci3 {
81 status = "okay";
82};
83
84&mmc0 {
85 pinctrl-names = "default";
86 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
87 vmmc-supply = <&reg_vcc3v3>;
88 bus-width = <4>;
89 cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
90 cd-inverted;
91 status = "okay";
92};
93
94&ohci3 {
95 status = "okay";
96};
97
98&pio {
99 leds_opc: led-pins {
100 allwinner,pins = "PA10";
101 allwinner,function = "gpio_out";
102 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
103 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
104 };
105};
106
107&r_pio {
108 leds_r_opc: led-pins {
109 allwinner,pins = "PL10";
110 allwinner,function = "gpio_out";
111 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
112 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
113 };
114};
115
116&uart0 {
117 pinctrl-names = "default";
118 pinctrl-0 = <&uart0_pins_a>;
119 status = "okay";
120};
121
122&usbphy {
123 /* USB VBUS is always on */
124 status = "okay";
125};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f93f5d1695c4..f89fe00ddec5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,8 @@
54 54
55 aliases { 55 aliases {
56 serial0 = &uart0; 56 serial0 = &uart0;
57 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
58 ethernet1 = &rtl8189;
57 }; 59 };
58 60
59 chosen { 61 chosen {
@@ -131,6 +133,14 @@
131 bus-width = <4>; 133 bus-width = <4>;
132 non-removable; 134 non-removable;
133 status = "okay"; 135 status = "okay";
136
137 /*
138 * Explicitly define the sdio device, so that we can add an ethernet
139 * alias for it (which e.g. makes u-boot set a mac-address).
140 */
141 rtl8189: sdio_wifi@1 {
142 reg = <1>;
143 };
134}; 144};
135 145
136&pio { 146&pio {
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
new file mode 100644
index 000000000000..1550fee1ec68
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -0,0 +1,178 @@
1/*
2 * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-h3.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/input/input.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "Xunlong Orange Pi Lite";
53 compatible = "xunlong,orangepi-lite", "allwinner,sun8i-h3";
54
55 aliases {
56 /* The H3 emac is not used so the wifi is ethernet0 */
57 ethernet0 = &rtl8189ftv;
58 serial0 = &uart0;
59 };
60
61 chosen {
62 stdout-path = "serial0:115200n8";
63 };
64
65 leds {
66 compatible = "gpio-leds";
67 pinctrl-names = "default";
68 pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
69
70 pwr_led {
71 label = "orangepi:green:pwr";
72 gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
73 default-state = "on";
74 };
75
76 status_led {
77 label = "orangepi:red:status";
78 gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>;
79 };
80 };
81
82 r_gpio_keys {
83 compatible = "gpio-keys";
84 pinctrl-names = "default";
85 pinctrl-0 = <&sw_r_opc>;
86
87 sw4 {
88 label = "sw4";
89 linux,code = <BTN_0>;
90 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
91 };
92 };
93};
94
95&ehci1 {
96 status = "okay";
97};
98
99&ehci2 {
100 status = "okay";
101};
102
103&ir {
104 pinctrl-names = "default";
105 pinctrl-0 = <&ir_pins_a>;
106 status = "okay";
107};
108
109&mmc0 {
110 pinctrl-names = "default";
111 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
112 vmmc-supply = <&reg_vcc3v3>;
113 bus-width = <4>;
114 cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
115 cd-inverted;
116 status = "okay";
117};
118
119&mmc1 {
120 pinctrl-names = "default";
121 pinctrl-0 = <&mmc1_pins_a>;
122 vmmc-supply = <&reg_vcc3v3>;
123 bus-width = <4>;
124 non-removable;
125 status = "okay";
126
127 /*
128 * Explicitly define the sdio device, so that we can add an ethernet
129 * alias for it (which e.g. makes u-boot set a mac-address).
130 */
131 rtl8189ftv: sdio_wifi@1 {
132 reg = <1>;
133 };
134};
135
136&ohci1 {
137 status = "okay";
138};
139
140&ohci2 {
141 status = "okay";
142};
143
144&pio {
145 leds_opc: led_pins@0 {
146 allwinner,pins = "PA15";
147 allwinner,function = "gpio_out";
148 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
149 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
150 };
151};
152
153&r_pio {
154 leds_r_opc: led_pins@0 {
155 allwinner,pins = "PL10";
156 allwinner,function = "gpio_out";
157 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
158 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
159 };
160
161 sw_r_opc: key_pins@0 {
162 allwinner,pins = "PL3";
163 allwinner,function = "gpio_in";
164 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
165 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
166 };
167};
168
169&uart0 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&uart0_pins_a>;
172 status = "okay";
173};
174
175&usbphy {
176 /* USB VBUS is always on */
177 status = "okay";
178};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
new file mode 100644
index 000000000000..851fd2c2cc8c
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -0,0 +1,88 @@
1/*
2 * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/* The Orange Pi PC Plus is an extended version of the regular PC */
44#include "sun8i-h3-orangepi-pc.dts"
45
46/ {
47 model = "Xunlong Orange Pi PC Plus";
48 compatible = "xunlong,orangepi-pc-plus", "allwinner,sun8i-h3";
49
50 aliases {
51 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
52 ethernet1 = &rtl8189ftv;
53 };
54};
55
56&mmc1 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&mmc1_pins_a>;
59 vmmc-supply = <&reg_vcc3v3>;
60 bus-width = <4>;
61 non-removable;
62 status = "okay";
63
64 /*
65 * Explicitly define the sdio device, so that we can add an ethernet
66 * alias for it (which e.g. makes u-boot set a mac-address).
67 */
68 rtl8189ftv: sdio_wifi@1 {
69 reg = <1>;
70 };
71};
72
73&mmc2 {
74 pinctrl-names = "default";
75 pinctrl-0 = <&mmc2_8bit_pins>;
76 vmmc-supply = <&reg_vcc3v3>;
77 bus-width = <8>;
78 non-removable;
79 cap-mmc-hw-reset;
80 status = "okay";
81};
82
83&mmc2_8bit_pins {
84 /* Increase drive strength for DDR modes */
85 allwinner,drive = <SUN4I_PINCTRL_40_MA>;
86 /* eMMC is missing pull-ups */
87 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
88};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index b0cb41787e09..bb585918cf54 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -44,7 +44,7 @@
44#include "sun8i-h3-orangepi-2.dts" 44#include "sun8i-h3-orangepi-2.dts"
45 45
46/ { 46/ {
47 model = "Xunlong Orange Pi Plus"; 47 model = "Xunlong Orange Pi Plus / Plus 2";
48 compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; 48 compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
49 49
50 reg_usb3_vbus: usb3-vbus { 50 reg_usb3_vbus: usb3-vbus {
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
new file mode 100644
index 000000000000..5851a47a3089
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * The Orange Pi Plus 2E is an extended version of the Orange Pi PC Plus,
45 * with 2G RAM and an external gbit ethernet phy.
46 */
47
48#include "sun8i-h3-orangepi-pc-plus.dts"
49
50/ {
51 model = "Xunlong Orange Pi Plus 2E";
52 compatible = "xunlong,orangepi-plus2e", "allwinner,sun8i-h3";
53};
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 8a95e3613488..9ea313d9fa3a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -389,6 +389,14 @@
389 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 389 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
390 }; 390 };
391 391
392 pwm: pwm@01c21400 {
393 compatible = "allwinner,sun8i-h3-pwm";
394 reg = <0x01c21400 0x8>;
395 clocks = <&osc24M>;
396 #pwm-cells = <3>;
397 status = "disabled";
398 };
399
392 uart0: serial@01c28000 { 400 uart0: serial@01c28000 {
393 compatible = "snps,dw-apb-uart"; 401 compatible = "snps,dw-apb-uart";
394 reg = <0x01c28000 0x400>; 402 reg = <0x01c28000 0x400>;
diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi
index 60fa9585022b..29f837a47771 100644
--- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -42,10 +42,59 @@
42#include "sunxi-reference-design-tablet.dtsi" 42#include "sunxi-reference-design-tablet.dtsi"
43#include "sun8i-reference-design-tablet.dtsi" 43#include "sun8i-reference-design-tablet.dtsi"
44 44
45/ {
46 aliases {
47 serial0 = &r_uart;
48 /* Make u-boot set mac-address for wifi without an eeprom */
49 ethernet0 = &sdio_wifi;
50 };
51
52 wifi_pwrseq: wifi_pwrseq {
53 compatible = "mmc-pwrseq-simple";
54 /*
55 * Q8 boards use various PL# pins as wifi-en. On other boards
56 * these may be connected to a wifi module output pin. To avoid
57 * short-circuits we configure these as inputs with pull-ups via
58 * pinctrl, instead of listing them as active-low reset-gpios.
59 */
60 pinctrl-names = "default";
61 pinctrl-0 = <&wifi_pwrseq_pin_q8>;
62 /* The esp8089 needs 200 ms after driving wifi-en high */
63 post-power-on-delay-ms = <200>;
64 };
65};
66
45&ehci0 { 67&ehci0 {
46 status = "okay"; 68 status = "okay";
47}; 69};
48 70
71&mmc1 {
72 pinctrl-names = "default";
73 pinctrl-0 = <&mmc1_pins_a>;
74 vmmc-supply = <&reg_dldo1>;
75 mmc-pwrseq = <&wifi_pwrseq>;
76 bus-width = <4>;
77 non-removable;
78 status = "okay";
79
80 sdio_wifi: sdio_wifi@1 {
81 reg = <1>;
82 };
83};
84
85&mmc1_pins_a {
86 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
87};
88
89&r_pio {
90 wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 {
91 allwinner,pins = "PL6", "PL7", "PL11";
92 allwinner,function = "gpio_in";
93 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
94 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
95 };
96};
97
49&usbphy { 98&usbphy {
50 usb1_vbus-supply = <&reg_dldo1>; 99 usb1_vbus-supply = <&reg_dldo1>;
51}; 100};
diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
index 9d9036140511..08cd00143635 100644
--- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
@@ -63,6 +63,25 @@
63 }; 63 };
64}; 64};
65 65
66&i2c0 {
67 /*
68 * The gsl1680 is rated at 400KHz and it will not work reliable at
69 * 100KHz, this has been confirmed on multiple different q8 tablets.
70 * The gsl1680 is the only device on this bus.
71 */
72 clock-frequency = <400000>;
73
74 touchscreen: touchscreen@0 {
75 interrupt-parent = <&pio>;
76 interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */
77 pinctrl-names = "default";
78 pinctrl-0 = <&ts_power_pin>;
79 power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
80 /* Tablet dts must provide reg and compatible */
81 status = "disabled";
82 };
83};
84
66&mmc0 { 85&mmc0 {
67 pinctrl-names = "default"; 86 pinctrl-names = "default";
68 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 87 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
@@ -88,6 +107,13 @@
88 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; 107 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
89 }; 108 };
90 109
110 ts_power_pin: ts_power_pin@0 {
111 allwinner,pins = "PH1";
112 allwinner,function = "gpio_out";
113 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
114 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
115 };
116
91 usb0_id_detect_pin: usb0_id_detect_pin@0 { 117 usb0_id_detect_pin: usb0_id_detect_pin@0 {
92 allwinner,pins = "PH8"; 118 allwinner,pins = "PH8";
93 allwinner,function = "gpio_in"; 119 allwinner,function = "gpio_in";
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 1526b41c70f1..04b014603659 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -103,6 +103,11 @@
103 allwinner,drive = <SUN4I_PINCTRL_40_MA>; 103 allwinner,drive = <SUN4I_PINCTRL_40_MA>;
104}; 104};
105 105
106&osc32k {
107 /* osc32k input is from AC100 */
108 clocks = <&ac100_rtc 0>;
109};
110
106&pio { 111&pio {
107 led_pins_cubieboard4: led-pins@0 { 112 led_pins_cubieboard4: led-pins@0 {
108 allwinner,pins = "PH6", "PH17"; 113 allwinner,pins = "PH6", "PH17";
@@ -250,6 +255,30 @@
250 }; 255 };
251 }; 256 };
252 }; 257 };
258
259 ac100: codec@e89 {
260 compatible = "x-powers,ac100";
261 reg = <0xe89>;
262
263 ac100_codec: codec {
264 compatible = "x-powers,ac100-codec";
265 interrupt-parent = <&r_pio>;
266 interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
267 #clock-cells = <0>;
268 clock-output-names = "4M_adda";
269 };
270
271 ac100_rtc: rtc {
272 compatible = "x-powers,ac100-rtc";
273 interrupt-parent = <&nmi_intc>;
274 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
275 clocks = <&ac100_codec>;
276 #clock-cells = <1>;
277 clock-output-names = "cko1_rtc",
278 "cko2_rtc",
279 "cko3_rtc";
280 };
281 };
253}; 282};
254 283
255#include "axp809.dtsi" 284#include "axp809.dtsi"
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 7fd22e888602..fd874ded890e 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -152,6 +152,11 @@
152 status = "okay"; 152 status = "okay";
153}; 153};
154 154
155&osc32k {
156 /* osc32k input is from AC100 */
157 clocks = <&ac100_rtc 0>;
158};
159
155&pio { 160&pio {
156 led_pins_optimus: led-pins@0 { 161 led_pins_optimus: led-pins@0 {
157 allwinner,pins = "PH0", "PH1"; 162 allwinner,pins = "PH0", "PH1";
@@ -322,6 +327,30 @@
322 }; 327 };
323 }; 328 };
324 }; 329 };
330
331 ac100: codec@e89 {
332 compatible = "x-powers,ac100";
333 reg = <0xe89>;
334
335 ac100_codec: codec {
336 compatible = "x-powers,ac100-codec";
337 interrupt-parent = <&r_pio>;
338 interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
339 #clock-cells = <0>;
340 clock-output-names = "4M_adda";
341 };
342
343 ac100_rtc: rtc {
344 compatible = "x-powers,ac100-rtc";
345 interrupt-parent = <&nmi_intc>;
346 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
347 clocks = <&ac100_codec>;
348 #clock-cells = <1>;
349 clock-output-names = "cko1_rtc",
350 "cko2_rtc",
351 "cko3_rtc";
352 };
353 };
325}; 354};
326 355
327#include "axp809.dtsi" 356#include "axp809.dtsi"
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index f68b3242b33a..3c5214cbe4e6 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -148,15 +148,14 @@
148 148
149 /* 149 /*
150 * The 32k clock is from an external source, normally the 150 * The 32k clock is from an external source, normally the
151 * AC100 codec/RTC chip. This clock is by default enabled 151 * AC100 codec/RTC chip. This serves as a placeholder for
152 * and clocked at 32768 Hz, from the oscillator connected 152 * board dts files to specify the source.
153 * to the AC100. It is configurable, but no such driver or
154 * bindings exist yet.
155 */ 153 */
156 osc32k: osc32k_clk { 154 osc32k: osc32k_clk {
157 #clock-cells = <0>; 155 #clock-cells = <0>;
158 compatible = "fixed-clock"; 156 compatible = "fixed-factor-clock";
159 clock-frequency = <32768>; 157 clock-div = <1>;
158 clock-mult = <1>;
160 clock-output-names = "osc32k"; 159 clock-output-names = "osc32k";
161 }; 160 };
162 161
@@ -899,8 +898,7 @@
899 resets = <&apbs_rst 0>; 898 resets = <&apbs_rst 0>;
900 gpio-controller; 899 gpio-controller;
901 interrupt-controller; 900 interrupt-controller;
902 #address-cells = <1>; 901 #interrupt-cells = <3>;
903 #size-cells = <0>;
904 #gpio-cells = <3>; 902 #gpio-cells = <3>;
905 903
906 r_ir_pins: r_ir { 904 r_ir_pins: r_ir {
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index cb9393a53422..8932ea3afd5f 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -672,7 +672,7 @@
672 }; 672 };
673 673
674 usb@7d000000 { 674 usb@7d000000 {
675 compatible = "nvidia,tegra30-ehci", "usb-ehci"; 675 compatible = "nvidia,tegra114-ehci", "nvidia,tegra30-ehci", "usb-ehci";
676 reg = <0x7d000000 0x4000>; 676 reg = <0x7d000000 0x4000>;
677 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 677 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
678 phy_type = "utmi"; 678 phy_type = "utmi";
@@ -684,7 +684,7 @@
684 }; 684 };
685 685
686 phy1: usb-phy@7d000000 { 686 phy1: usb-phy@7d000000 {
687 compatible = "nvidia,tegra30-usb-phy"; 687 compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy";
688 reg = <0x7d000000 0x4000 0x7d000000 0x4000>; 688 reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
689 phy_type = "utmi"; 689 phy_type = "utmi";
690 clocks = <&tegra_car TEGRA114_CLK_USBD>, 690 clocks = <&tegra_car TEGRA114_CLK_USBD>,
@@ -708,7 +708,7 @@
708 }; 708 };
709 709
710 usb@7d008000 { 710 usb@7d008000 {
711 compatible = "nvidia,tegra30-ehci", "usb-ehci"; 711 compatible = "nvidia,tegra114-ehci", "nvidia,tegra30-ehci", "usb-ehci";
712 reg = <0x7d008000 0x4000>; 712 reg = <0x7d008000 0x4000>;
713 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 713 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
714 phy_type = "utmi"; 714 phy_type = "utmi";
@@ -720,7 +720,7 @@
720 }; 720 };
721 721
722 phy3: usb-phy@7d008000 { 722 phy3: usb-phy@7d008000 {
723 compatible = "nvidia,tegra30-usb-phy"; 723 compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy";
724 reg = <0x7d008000 0x4000 0x7d000000 0x4000>; 724 reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
725 phy_type = "utmi"; 725 phy_type = "utmi";
726 clocks = <&tegra_car TEGRA114_CLK_USB3>, 726 clocks = <&tegra_car TEGRA114_CLK_USB3>,
diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi b/arch/arm/boot/dts/uniphier-common32.dtsi
index 03f60ec340b5..8c8a85176b64 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source commonly used by UniPhier ARM SoCs 2 * Device Tree Source commonly used by UniPhier ARM SoCs
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,6 +46,11 @@
45/include/ "skeleton.dtsi" 46/include/ "skeleton.dtsi"
46 47
47/ { 48/ {
49 psci {
50 compatible = "arm,psci-0.2";
51 method = "smc";
52 };
53
48 clocks { 54 clocks {
49 refclk: ref { 55 refclk: ref {
50 #clock-cells = <0>; 56 #clock-cells = <0>;
@@ -66,7 +72,7 @@
66 interrupts = <0 33 4>; 72 interrupts = <0 33 4>;
67 pinctrl-names = "default"; 73 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_uart0>; 74 pinctrl-0 = <&pinctrl_uart0>;
69 clocks = <&uart_clk>; 75 clocks = <&peri_clk 0>;
70 }; 76 };
71 77
72 serial1: serial@54006900 { 78 serial1: serial@54006900 {
@@ -76,7 +82,7 @@
76 interrupts = <0 35 4>; 82 interrupts = <0 35 4>;
77 pinctrl-names = "default"; 83 pinctrl-names = "default";
78 pinctrl-0 = <&pinctrl_uart1>; 84 pinctrl-0 = <&pinctrl_uart1>;
79 clocks = <&uart_clk>; 85 clocks = <&peri_clk 1>;
80 }; 86 };
81 87
82 serial2: serial@54006a00 { 88 serial2: serial@54006a00 {
@@ -86,7 +92,7 @@
86 interrupts = <0 37 4>; 92 interrupts = <0 37 4>;
87 pinctrl-names = "default"; 93 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_uart2>; 94 pinctrl-0 = <&pinctrl_uart2>;
89 clocks = <&uart_clk>; 95 clocks = <&peri_clk 2>;
90 }; 96 };
91 97
92 serial3: serial@54006b00 { 98 serial3: serial@54006b00 {
@@ -96,7 +102,7 @@
96 interrupts = <0 177 4>; 102 interrupts = <0 177 4>;
97 pinctrl-names = "default"; 103 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_uart3>; 104 pinctrl-0 = <&pinctrl_uart3>;
99 clocks = <&uart_clk>; 105 clocks = <&peri_clk 3>;
100 }; 106 };
101 107
102 system_bus: system-bus@58c00000 { 108 system_bus: system-bus@58c00000 {
@@ -114,6 +120,34 @@
114 reg = <0x59801000 0x400>; 120 reg = <0x59801000 0x400>;
115 }; 121 };
116 122
123 mioctrl@59810000 {
124 compatible = "socionext,uniphier-mioctrl",
125 "simple-mfd", "syscon";
126 reg = <0x59810000 0x800>;
127
128 mio_clk: clock {
129 #clock-cells = <1>;
130 };
131
132 mio_rst: reset {
133 #reset-cells = <1>;
134 };
135 };
136
137 perictrl@59820000 {
138 compatible = "socionext,uniphier-perictrl",
139 "simple-mfd", "syscon";
140 reg = <0x59820000 0x200>;
141
142 peri_clk: clock {
143 #clock-cells = <1>;
144 };
145
146 peri_rst: reset {
147 #reset-cells = <1>;
148 };
149 };
150
117 timer@60000200 { 151 timer@60000200 {
118 compatible = "arm,cortex-a9-global-timer"; 152 compatible = "arm,cortex-a9-global-timer";
119 reg = <0x60000200 0x20>; 153 reg = <0x60000200 0x20>;
@@ -137,11 +171,26 @@
137 }; 171 };
138 172
139 soc-glue@5f800000 { 173 soc-glue@5f800000 {
140 compatible = "simple-mfd", "syscon"; 174 compatible = "socionext,uniphier-soc-glue",
175 "simple-mfd", "syscon";
141 reg = <0x5f800000 0x2000>; 176 reg = <0x5f800000 0x2000>;
142 177
143 pinctrl: pinctrl { 178 pinctrl: pinctrl {
144 /* specify compatible in each SoC DTSI */ 179 /* specify compatible in each SoC DTSI */
180 };
181 };
182
183 sysctrl@61840000 {
184 compatible = "socionext,uniphier-sysctrl",
185 "simple-mfd", "syscon";
186 reg = <0x61840000 0x4000>;
187
188 sys_clk: clock {
189 #clock-cells = <1>;
190 };
191
192 sys_rst: reset {
193 #reset-cells = <1>;
145 }; 194 };
146 }; 195 };
147 }; 196 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ld4-ref.dts
index ec94b7a661f2..110031bc0e7e 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ld4-ref.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-LD4 Reference Board 2 * Device Tree Source for UniPhier LD4 Reference Board
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,13 +44,13 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-ph1-ld4.dtsi" 47/include/ "uniphier-ld4.dtsi"
47/include/ "uniphier-ref-daughter.dtsi" 48/include/ "uniphier-ref-daughter.dtsi"
48/include/ "uniphier-support-card.dtsi" 49/include/ "uniphier-support-card.dtsi"
49 50
50/ { 51/ {
51 model = "UniPhier PH1-LD4 Reference Board"; 52 model = "UniPhier LD4 Reference Board";
52 compatible = "socionext,ph1-ld4-ref", "socionext,ph1-ld4"; 53 compatible = "socionext,uniphier-ld4-ref", "socionext,uniphier-ld4";
53 54
54 memory { 55 memory {
55 device_type = "memory"; 56 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi
index debad7ffef05..95f342c9d9c1 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ld4.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-LD4 SoC 2 * Device Tree Source for UniPhier LD4 SoC
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,7 +46,7 @@
45/include/ "uniphier-common32.dtsi" 46/include/ "uniphier-common32.dtsi"
46 47
47/ { 48/ {
48 compatible = "socionext,ph1-ld4"; 49 compatible = "socionext,uniphier-ld4";
49 50
50 cpus { 51 cpus {
51 #address-cells = <1>; 52 #address-cells = <1>;
@@ -55,6 +56,7 @@
55 device_type = "cpu"; 56 device_type = "cpu";
56 compatible = "arm,cortex-a9"; 57 compatible = "arm,cortex-a9";
57 reg = <0>; 58 reg = <0>;
59 enable-method = "psci";
58 next-level-cache = <&l2>; 60 next-level-cache = <&l2>;
59 }; 61 };
60 }; 62 };
@@ -65,18 +67,6 @@
65 compatible = "fixed-clock"; 67 compatible = "fixed-clock";
66 clock-frequency = <50000000>; 68 clock-frequency = <50000000>;
67 }; 69 };
68
69 uart_clk: uart_clk {
70 #clock-cells = <0>;
71 compatible = "fixed-clock";
72 clock-frequency = <36864000>;
73 };
74
75 iobus_clk: iobus_clk {
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <100000000>;
79 };
80 }; 70 };
81}; 71};
82 72
@@ -101,7 +91,7 @@
101 interrupts = <0 41 1>; 91 interrupts = <0 41 1>;
102 pinctrl-names = "default"; 92 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_i2c0>; 93 pinctrl-0 = <&pinctrl_i2c0>;
104 clocks = <&iobus_clk>; 94 clocks = <&peri_clk 4>;
105 clock-frequency = <100000>; 95 clock-frequency = <100000>;
106 }; 96 };
107 97
@@ -114,7 +104,7 @@
114 interrupts = <0 42 1>; 104 interrupts = <0 42 1>;
115 pinctrl-names = "default"; 105 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_i2c1>; 106 pinctrl-0 = <&pinctrl_i2c1>;
117 clocks = <&iobus_clk>; 107 clocks = <&peri_clk 5>;
118 clock-frequency = <100000>; 108 clock-frequency = <100000>;
119 }; 109 };
120 110
@@ -127,7 +117,7 @@
127 interrupts = <0 43 1>; 117 interrupts = <0 43 1>;
128 pinctrl-names = "default"; 118 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_i2c2>; 119 pinctrl-0 = <&pinctrl_i2c2>;
130 clocks = <&iobus_clk>; 120 clocks = <&peri_clk 6>;
131 clock-frequency = <400000>; 121 clock-frequency = <400000>;
132 }; 122 };
133 123
@@ -140,7 +130,7 @@
140 interrupts = <0 44 1>; 130 interrupts = <0 44 1>;
141 pinctrl-names = "default"; 131 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_i2c3>; 132 pinctrl-0 = <&pinctrl_i2c3>;
143 clocks = <&iobus_clk>; 133 clocks = <&peri_clk 7>;
144 clock-frequency = <100000>; 134 clock-frequency = <100000>;
145 }; 135 };
146 136
@@ -151,6 +141,8 @@
151 interrupts = <0 80 4>; 141 interrupts = <0 80 4>;
152 pinctrl-names = "default"; 142 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_usb0>; 143 pinctrl-0 = <&pinctrl_usb0>;
144 clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
145 resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>;
154 }; 146 };
155 147
156 usb1: usb@5a810100 { 148 usb1: usb@5a810100 {
@@ -160,6 +152,8 @@
160 interrupts = <0 81 4>; 152 interrupts = <0 81 4>;
161 pinctrl-names = "default"; 153 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_usb1>; 154 pinctrl-0 = <&pinctrl_usb1>;
155 clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
156 resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>;
163 }; 157 };
164 158
165 usb2: usb@5a820100 { 159 usb2: usb@5a820100 {
@@ -169,6 +163,8 @@
169 interrupts = <0 82 4>; 163 interrupts = <0 82 4>;
170 pinctrl-names = "default"; 164 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_usb2>; 165 pinctrl-0 = <&pinctrl_usb2>;
166 clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
167 resets = <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>, <&sys_rst 8>;
172 }; 168 };
173 169
174}; 170};
@@ -181,6 +177,31 @@
181 interrupts = <0 29 4>; 177 interrupts = <0 29 4>;
182}; 178};
183 179
180&mio_clk {
181 compatible = "socionext,uniphier-ld4-mio-clock";
182};
183
184&mio_rst {
185 compatible = "socionext,uniphier-ld4-mio-reset";
186 resets = <&sys_rst 7>;
187};
188
189&peri_clk {
190 compatible = "socionext,uniphier-ld4-peri-clock";
191};
192
193&peri_rst {
194 compatible = "socionext,uniphier-ld4-peri-reset";
195};
196
184&pinctrl { 197&pinctrl {
185 compatible = "socionext,uniphier-ld4-pinctrl"; 198 compatible = "socionext,uniphier-ld4-pinctrl";
186}; 199};
200
201&sys_clk {
202 compatible = "socionext,uniphier-ld4-clock";
203};
204
205&sys_rst {
206 compatible = "socionext,uniphier-ld4-reset";
207};
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
index b8134c6e094b..c05d631dcf02 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-LD6b Reference Board 2 * Device Tree Source for UniPhier LD6b Reference Board
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,13 +44,13 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-ph1-ld6b.dtsi" 47/include/ "uniphier-ld6b.dtsi"
47/include/ "uniphier-ref-daughter.dtsi" 48/include/ "uniphier-ref-daughter.dtsi"
48/include/ "uniphier-support-card.dtsi" 49/include/ "uniphier-support-card.dtsi"
49 50
50/ { 51/ {
51 model = "UniPhier PH1-LD6b Reference Board"; 52 model = "UniPhier LD6b Reference Board";
52 compatible = "socionext,ph1-ld6b-ref", "socionext,ph1-ld6b"; 53 compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b";
53 54
54 memory { 55 memory {
55 device_type = "memory"; 56 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi b/arch/arm/boot/dts/uniphier-ld6b.dtsi
index 19c107c66bae..905c77d499eb 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi
+++ b/arch/arm/boot/dts/uniphier-ld6b.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-LD6b SoC 2 * Device Tree Source for UniPhier LD6b SoC
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,14 +44,14 @@
43 */ 44 */
44 45
45/* 46/*
46 * PH1-LD6b consists of two silicon dies: D-chip and A-chip. 47 * LD6b consists of two silicon dies: D-chip and A-chip.
47 * The D-chip (digital chip) is the same as the ProXstream2 die. 48 * The D-chip (digital chip) is the same as the PXs2 die.
48 * Reuse the ProXstream2 device tree with some properties overridden. 49 * Reuse the PXs2 device tree with some properties overridden.
49 */ 50 */
50/include/ "uniphier-proxstream2.dtsi" 51/include/ "uniphier-pxs2.dtsi"
51 52
52/ { 53/ {
53 compatible = "socionext,ph1-ld6b"; 54 compatible = "socionext,uniphier-ld6b";
54}; 55};
55 56
56/* UART3 unavailable: the pads are not wired to the package balls */ 57/* UART3 unavailable: the pads are not wired to the package balls */
@@ -59,7 +60,7 @@
59}; 60};
60 61
61/* 62/*
62 * PH1-LD6b and ProXstream2 have completely different packages, 63 * LD6b and PXs2 have completely different packages,
63 * which makes the pinctrl driver unshareable. 64 * which makes the pinctrl driver unshareable.
64 */ 65 */
65&pinctrl { 66&pinctrl {
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts b/arch/arm/boot/dts/uniphier-pro4-ace.dts
index d34358632bec..0ab0a40c041e 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-Pro4 Ace Board 2 * Device Tree Source for UniPhier Pro4 Ace Board
3 * 3 *
4 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,11 +44,11 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-ph1-pro4.dtsi" 47/include/ "uniphier-pro4.dtsi"
47 48
48/ { 49/ {
49 model = "UniPhier PH1-Pro4 Ace Board"; 50 model = "UniPhier Pro4 Ace Board";
50 compatible = "socionext,ph1-pro4-ace", "socionext,ph1-pro4"; 51 compatible = "socionext,uniphier-pro4-ace", "socionext,uniphier-pro4";
51 52
52 memory { 53 memory {
53 device_type = "memory"; 54 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts
index 95f631a3de35..9e92e60d25ce 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-Pro4 Reference Board 2 * Device Tree Source for UniPhier Pro4 Reference Board
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,13 +44,13 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-ph1-pro4.dtsi" 47/include/ "uniphier-pro4.dtsi"
47/include/ "uniphier-ref-daughter.dtsi" 48/include/ "uniphier-ref-daughter.dtsi"
48/include/ "uniphier-support-card.dtsi" 49/include/ "uniphier-support-card.dtsi"
49 50
50/ { 51/ {
51 model = "UniPhier PH1-Pro4 Reference Board"; 52 model = "UniPhier Pro4 Reference Board";
52 compatible = "socionext,ph1-pro4-ref", "socionext,ph1-pro4"; 53 compatible = "socionext,uniphier-pro4-ref", "socionext,uniphier-pro4";
53 54
54 memory { 55 memory {
55 device_type = "memory"; 56 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
index 7c3a1fcc9f3c..dc4ea8832ce2 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-Pro4 Sanji Board 2 * Device Tree Source for UniPhier Pro4 Sanji Board
3 * 3 *
4 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,11 +44,11 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-ph1-pro4.dtsi" 47/include/ "uniphier-pro4.dtsi"
47 48
48/ { 49/ {
49 model = "UniPhier PH1-Pro4 Sanji Board"; 50 model = "UniPhier Pro4 Sanji Board";
50 compatible = "socionext,ph1-pro4-sanji", "socionext,ph1-pro4"; 51 compatible = "socionext,uniphier-pro4-sanji", "socionext,uniphier-pro4";
51 52
52 memory { 53 memory {
53 device_type = "memory"; 54 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 7b9da0852005..ba700267ad66 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-Pro4 SoC 2 * Device Tree Source for UniPhier Pro4 SoC
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,17 +46,17 @@
45/include/ "uniphier-common32.dtsi" 46/include/ "uniphier-common32.dtsi"
46 47
47/ { 48/ {
48 compatible = "socionext,ph1-pro4"; 49 compatible = "socionext,uniphier-pro4";
49 50
50 cpus { 51 cpus {
51 #address-cells = <1>; 52 #address-cells = <1>;
52 #size-cells = <0>; 53 #size-cells = <0>;
53 enable-method = "socionext,uniphier-smp";
54 54
55 cpu@0 { 55 cpu@0 {
56 device_type = "cpu"; 56 device_type = "cpu";
57 compatible = "arm,cortex-a9"; 57 compatible = "arm,cortex-a9";
58 reg = <0>; 58 reg = <0>;
59 enable-method = "psci";
59 next-level-cache = <&l2>; 60 next-level-cache = <&l2>;
60 }; 61 };
61 62
@@ -63,6 +64,7 @@
63 device_type = "cpu"; 64 device_type = "cpu";
64 compatible = "arm,cortex-a9"; 65 compatible = "arm,cortex-a9";
65 reg = <1>; 66 reg = <1>;
67 enable-method = "psci";
66 next-level-cache = <&l2>; 68 next-level-cache = <&l2>;
67 }; 69 };
68 }; 70 };
@@ -73,18 +75,6 @@
73 compatible = "fixed-clock"; 75 compatible = "fixed-clock";
74 clock-frequency = <50000000>; 76 clock-frequency = <50000000>;
75 }; 77 };
76
77 uart_clk: uart_clk {
78 #clock-cells = <0>;
79 compatible = "fixed-clock";
80 clock-frequency = <73728000>;
81 };
82
83 i2c_clk: i2c_clk {
84 #clock-cells = <0>;
85 compatible = "fixed-clock";
86 clock-frequency = <50000000>;
87 };
88 }; 78 };
89}; 79};
90 80
@@ -109,7 +99,7 @@
109 interrupts = <0 41 4>; 99 interrupts = <0 41 4>;
110 pinctrl-names = "default"; 100 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_i2c0>; 101 pinctrl-0 = <&pinctrl_i2c0>;
112 clocks = <&i2c_clk>; 102 clocks = <&peri_clk 4>;
113 clock-frequency = <100000>; 103 clock-frequency = <100000>;
114 }; 104 };
115 105
@@ -122,7 +112,7 @@
122 interrupts = <0 42 4>; 112 interrupts = <0 42 4>;
123 pinctrl-names = "default"; 113 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_i2c1>; 114 pinctrl-0 = <&pinctrl_i2c1>;
125 clocks = <&i2c_clk>; 115 clocks = <&peri_clk 5>;
126 clock-frequency = <100000>; 116 clock-frequency = <100000>;
127 }; 117 };
128 118
@@ -135,7 +125,7 @@
135 interrupts = <0 43 4>; 125 interrupts = <0 43 4>;
136 pinctrl-names = "default"; 126 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_i2c2>; 127 pinctrl-0 = <&pinctrl_i2c2>;
138 clocks = <&i2c_clk>; 128 clocks = <&peri_clk 6>;
139 clock-frequency = <100000>; 129 clock-frequency = <100000>;
140 }; 130 };
141 131
@@ -148,7 +138,7 @@
148 interrupts = <0 44 4>; 138 interrupts = <0 44 4>;
149 pinctrl-names = "default"; 139 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_i2c3>; 140 pinctrl-0 = <&pinctrl_i2c3>;
151 clocks = <&i2c_clk>; 141 clocks = <&peri_clk 7>;
152 clock-frequency = <100000>; 142 clock-frequency = <100000>;
153 }; 143 };
154 144
@@ -161,7 +151,7 @@
161 #address-cells = <1>; 151 #address-cells = <1>;
162 #size-cells = <0>; 152 #size-cells = <0>;
163 interrupts = <0 25 4>; 153 interrupts = <0 25 4>;
164 clocks = <&i2c_clk>; 154 clocks = <&peri_clk 9>;
165 clock-frequency = <400000>; 155 clock-frequency = <400000>;
166 }; 156 };
167 157
@@ -172,7 +162,7 @@
172 #address-cells = <1>; 162 #address-cells = <1>;
173 #size-cells = <0>; 163 #size-cells = <0>;
174 interrupts = <0 26 4>; 164 interrupts = <0 26 4>;
175 clocks = <&i2c_clk>; 165 clocks = <&peri_clk 10>;
176 clock-frequency = <400000>; 166 clock-frequency = <400000>;
177 }; 167 };
178 168
@@ -183,6 +173,8 @@
183 interrupts = <0 80 4>; 173 interrupts = <0 80 4>;
184 pinctrl-names = "default"; 174 pinctrl-names = "default";
185 pinctrl-0 = <&pinctrl_usb2>; 175 pinctrl-0 = <&pinctrl_usb2>;
176 clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
177 resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>;
186 }; 178 };
187 179
188 usb3: usb@5a810100 { 180 usb3: usb@5a810100 {
@@ -192,6 +184,8 @@
192 interrupts = <0 81 4>; 184 interrupts = <0 81 4>;
193 pinctrl-names = "default"; 185 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_usb3>; 186 pinctrl-0 = <&pinctrl_usb3>;
187 clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
188 resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>;
195 }; 189 };
196}; 190};
197 191
@@ -199,6 +193,31 @@
199 clock-frequency = <25000000>; 193 clock-frequency = <25000000>;
200}; 194};
201 195
196&mio_clk {
197 compatible = "socionext,uniphier-pro4-mio-clock";
198};
199
200&mio_rst {
201 compatible = "socionext,uniphier-pro4-mio-reset";
202 resets = <&sys_rst 7>;
203};
204
205&peri_clk {
206 compatible = "socionext,uniphier-pro4-peri-clock";
207};
208
209&peri_rst {
210 compatible = "socionext,uniphier-pro4-peri-reset";
211};
212
202&pinctrl { 213&pinctrl {
203 compatible = "socionext,uniphier-pro4-pinctrl"; 214 compatible = "socionext,uniphier-pro4-pinctrl";
204}; 215};
216
217&sys_clk {
218 compatible = "socionext,uniphier-pro4-clock";
219};
220
221&sys_rst {
222 compatible = "socionext,uniphier-pro4-reset";
223};
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index 7e4aa2fde719..2c49c3614bda 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-Pro5 SoC 2 * Device Tree Source for UniPhier Pro5 SoC
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,17 +46,17 @@
45/include/ "uniphier-common32.dtsi" 46/include/ "uniphier-common32.dtsi"
46 47
47/ { 48/ {
48 compatible = "socionext,ph1-pro5"; 49 compatible = "socionext,uniphier-pro5";
49 50
50 cpus { 51 cpus {
51 #address-cells = <1>; 52 #address-cells = <1>;
52 #size-cells = <0>; 53 #size-cells = <0>;
53 enable-method = "socionext,uniphier-smp";
54 54
55 cpu@0 { 55 cpu@0 {
56 device_type = "cpu"; 56 device_type = "cpu";
57 compatible = "arm,cortex-a9"; 57 compatible = "arm,cortex-a9";
58 reg = <0>; 58 reg = <0>;
59 enable-method = "psci";
59 next-level-cache = <&l2>; 60 next-level-cache = <&l2>;
60 }; 61 };
61 62
@@ -63,6 +64,7 @@
63 device_type = "cpu"; 64 device_type = "cpu";
64 compatible = "arm,cortex-a9"; 65 compatible = "arm,cortex-a9";
65 reg = <1>; 66 reg = <1>;
67 enable-method = "psci";
66 next-level-cache = <&l2>; 68 next-level-cache = <&l2>;
67 }; 69 };
68 }; 70 };
@@ -73,18 +75,6 @@
73 compatible = "fixed-clock"; 75 compatible = "fixed-clock";
74 clock-frequency = <50000000>; 76 clock-frequency = <50000000>;
75 }; 77 };
76
77 uart_clk: uart_clk {
78 #clock-cells = <0>;
79 compatible = "fixed-clock";
80 clock-frequency = <73728000>;
81 };
82
83 i2c_clk: i2c_clk {
84 #clock-cells = <0>;
85 compatible = "fixed-clock";
86 clock-frequency = <50000000>;
87 };
88 }; 78 };
89}; 79};
90 80
@@ -121,7 +111,7 @@
121 interrupts = <0 41 4>; 111 interrupts = <0 41 4>;
122 pinctrl-names = "default"; 112 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_i2c0>; 113 pinctrl-0 = <&pinctrl_i2c0>;
124 clocks = <&i2c_clk>; 114 clocks = <&peri_clk 4>;
125 clock-frequency = <100000>; 115 clock-frequency = <100000>;
126 }; 116 };
127 117
@@ -134,7 +124,7 @@
134 interrupts = <0 42 4>; 124 interrupts = <0 42 4>;
135 pinctrl-names = "default"; 125 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_i2c1>; 126 pinctrl-0 = <&pinctrl_i2c1>;
137 clocks = <&i2c_clk>; 127 clocks = <&peri_clk 5>;
138 clock-frequency = <100000>; 128 clock-frequency = <100000>;
139 }; 129 };
140 130
@@ -147,7 +137,7 @@
147 interrupts = <0 43 4>; 137 interrupts = <0 43 4>;
148 pinctrl-names = "default"; 138 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_i2c2>; 139 pinctrl-0 = <&pinctrl_i2c2>;
150 clocks = <&i2c_clk>; 140 clocks = <&peri_clk 6>;
151 clock-frequency = <100000>; 141 clock-frequency = <100000>;
152 }; 142 };
153 143
@@ -160,7 +150,7 @@
160 interrupts = <0 44 4>; 150 interrupts = <0 44 4>;
161 pinctrl-names = "default"; 151 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_i2c3>; 152 pinctrl-0 = <&pinctrl_i2c3>;
163 clocks = <&i2c_clk>; 153 clocks = <&peri_clk 7>;
164 clock-frequency = <100000>; 154 clock-frequency = <100000>;
165 }; 155 };
166 156
@@ -173,7 +163,7 @@
173 #address-cells = <1>; 163 #address-cells = <1>;
174 #size-cells = <0>; 164 #size-cells = <0>;
175 interrupts = <0 25 4>; 165 interrupts = <0 25 4>;
176 clocks = <&i2c_clk>; 166 clocks = <&peri_clk 9>;
177 clock-frequency = <400000>; 167 clock-frequency = <400000>;
178 }; 168 };
179 169
@@ -184,7 +174,7 @@
184 #address-cells = <1>; 174 #address-cells = <1>;
185 #size-cells = <0>; 175 #size-cells = <0>;
186 interrupts = <0 26 4>; 176 interrupts = <0 26 4>;
187 clocks = <&i2c_clk>; 177 clocks = <&peri_clk 10>;
188 clock-frequency = <400000>; 178 clock-frequency = <400000>;
189 }; 179 };
190}; 180};
@@ -193,6 +183,30 @@
193 clock-frequency = <20000000>; 183 clock-frequency = <20000000>;
194}; 184};
195 185
186&mio_clk {
187 compatible = "socionext,uniphier-pro5-mio-clock";
188};
189
190&mio_rst {
191 compatible = "socionext,uniphier-pro5-mio-reset";
192};
193
194&peri_clk {
195 compatible = "socionext,uniphier-pro5-peri-clock";
196};
197
198&peri_rst {
199 compatible = "socionext,uniphier-pro5-peri-reset";
200};
201
196&pinctrl { 202&pinctrl {
197 compatible = "socionext,uniphier-pro5-pinctrl"; 203 compatible = "socionext,uniphier-pro5-pinctrl";
198}; 204};
205
206&sys_clk {
207 compatible = "socionext,uniphier-pro5-clock";
208};
209
210&sys_rst {
211 compatible = "socionext,uniphier-pro5-reset";
212};
diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
index 98d895b7af1d..373818ace086 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier ProXstream2 Gentil Board 2 * Device Tree Source for UniPhier PXs2 Gentil Board
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,11 +44,12 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-proxstream2.dtsi" 47/include/ "uniphier-pxs2.dtsi"
47 48
48/ { 49/ {
49 model = "UniPhier ProXstream2 Gentil Board"; 50 model = "UniPhier PXs2 Gentil Board";
50 compatible = "socionext,proxstream2-gentil", "socionext,proxstream2"; 51 compatible = "socionext,uniphier-pxs2-gentil",
52 "socionext,uniphier-pxs2";
51 53
52 memory { 54 memory {
53 device_type = "memory"; 55 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-proxstream2-vodka.dts b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
index 1fb8bd7bb686..51a3eacddfc6 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-vodka.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier ProXstream2 Vodka Board 2 * Device Tree Source for UniPhier PXs2 Vodka Board
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,11 +44,11 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-proxstream2.dtsi" 47/include/ "uniphier-pxs2.dtsi"
47 48
48/ { 49/ {
49 model = "UniPhier ProXstream2 Vodka Board"; 50 model = "UniPhier PXs2 Vodka Board";
50 compatible = "socionext,proxstream2-vodka", "socionext,proxstream2"; 51 compatible = "socionext,uniphier-pxs2-vodka", "socionext,uniphier-pxs2";
51 52
52 memory { 53 memory {
53 device_type = "memory"; 54 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-proxstream2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index d00d6f5c2668..8789cd518933 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier ProXstream2 SoC 2 * Device Tree Source for UniPhier PXs2 SoC
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,17 +46,17 @@
45/include/ "uniphier-common32.dtsi" 46/include/ "uniphier-common32.dtsi"
46 47
47/ { 48/ {
48 compatible = "socionext,proxstream2"; 49 compatible = "socionext,uniphier-pxs2";
49 50
50 cpus { 51 cpus {
51 #address-cells = <1>; 52 #address-cells = <1>;
52 #size-cells = <0>; 53 #size-cells = <0>;
53 enable-method = "socionext,uniphier-smp";
54 54
55 cpu@0 { 55 cpu@0 {
56 device_type = "cpu"; 56 device_type = "cpu";
57 compatible = "arm,cortex-a9"; 57 compatible = "arm,cortex-a9";
58 reg = <0>; 58 reg = <0>;
59 enable-method = "psci";
59 next-level-cache = <&l2>; 60 next-level-cache = <&l2>;
60 }; 61 };
61 62
@@ -63,6 +64,7 @@
63 device_type = "cpu"; 64 device_type = "cpu";
64 compatible = "arm,cortex-a9"; 65 compatible = "arm,cortex-a9";
65 reg = <1>; 66 reg = <1>;
67 enable-method = "psci";
66 next-level-cache = <&l2>; 68 next-level-cache = <&l2>;
67 }; 69 };
68 70
@@ -70,6 +72,7 @@
70 device_type = "cpu"; 72 device_type = "cpu";
71 compatible = "arm,cortex-a9"; 73 compatible = "arm,cortex-a9";
72 reg = <2>; 74 reg = <2>;
75 enable-method = "psci";
73 next-level-cache = <&l2>; 76 next-level-cache = <&l2>;
74 }; 77 };
75 78
@@ -77,6 +80,7 @@
77 device_type = "cpu"; 80 device_type = "cpu";
78 compatible = "arm,cortex-a9"; 81 compatible = "arm,cortex-a9";
79 reg = <3>; 82 reg = <3>;
83 enable-method = "psci";
80 next-level-cache = <&l2>; 84 next-level-cache = <&l2>;
81 }; 85 };
82 }; 86 };
@@ -87,18 +91,6 @@
87 compatible = "fixed-clock"; 91 compatible = "fixed-clock";
88 clock-frequency = <50000000>; 92 clock-frequency = <50000000>;
89 }; 93 };
90
91 uart_clk: uart_clk {
92 #clock-cells = <0>;
93 compatible = "fixed-clock";
94 clock-frequency = <88900000>;
95 };
96
97 i2c_clk: i2c_clk {
98 #clock-cells = <0>;
99 compatible = "fixed-clock";
100 clock-frequency = <50000000>;
101 };
102 }; 94 };
103}; 95};
104 96
@@ -123,7 +115,7 @@
123 interrupts = <0 41 4>; 115 interrupts = <0 41 4>;
124 pinctrl-names = "default"; 116 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_i2c0>; 117 pinctrl-0 = <&pinctrl_i2c0>;
126 clocks = <&i2c_clk>; 118 clocks = <&peri_clk 4>;
127 clock-frequency = <100000>; 119 clock-frequency = <100000>;
128 }; 120 };
129 121
@@ -136,7 +128,7 @@
136 interrupts = <0 42 4>; 128 interrupts = <0 42 4>;
137 pinctrl-names = "default"; 129 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_i2c1>; 130 pinctrl-0 = <&pinctrl_i2c1>;
139 clocks = <&i2c_clk>; 131 clocks = <&peri_clk 5>;
140 clock-frequency = <100000>; 132 clock-frequency = <100000>;
141 }; 133 };
142 134
@@ -149,7 +141,7 @@
149 pinctrl-names = "default"; 141 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_i2c2>; 142 pinctrl-0 = <&pinctrl_i2c2>;
151 interrupts = <0 43 4>; 143 interrupts = <0 43 4>;
152 clocks = <&i2c_clk>; 144 clocks = <&peri_clk 6>;
153 clock-frequency = <100000>; 145 clock-frequency = <100000>;
154 }; 146 };
155 147
@@ -162,7 +154,7 @@
162 interrupts = <0 44 4>; 154 interrupts = <0 44 4>;
163 pinctrl-names = "default"; 155 pinctrl-names = "default";
164 pinctrl-0 = <&pinctrl_i2c3>; 156 pinctrl-0 = <&pinctrl_i2c3>;
165 clocks = <&i2c_clk>; 157 clocks = <&peri_clk 7>;
166 clock-frequency = <100000>; 158 clock-frequency = <100000>;
167 }; 159 };
168 160
@@ -173,7 +165,7 @@
173 #address-cells = <1>; 165 #address-cells = <1>;
174 #size-cells = <0>; 166 #size-cells = <0>;
175 interrupts = <0 45 4>; 167 interrupts = <0 45 4>;
176 clocks = <&i2c_clk>; 168 clocks = <&peri_clk 8>;
177 clock-frequency = <400000>; 169 clock-frequency = <400000>;
178 }; 170 };
179 171
@@ -184,7 +176,7 @@
184 #address-cells = <1>; 176 #address-cells = <1>;
185 #size-cells = <0>; 177 #size-cells = <0>;
186 interrupts = <0 25 4>; 178 interrupts = <0 25 4>;
187 clocks = <&i2c_clk>; 179 clocks = <&peri_clk 9>;
188 clock-frequency = <400000>; 180 clock-frequency = <400000>;
189 }; 181 };
190 182
@@ -195,7 +187,7 @@
195 #address-cells = <1>; 187 #address-cells = <1>;
196 #size-cells = <0>; 188 #size-cells = <0>;
197 interrupts = <0 26 4>; 189 interrupts = <0 26 4>;
198 clocks = <&i2c_clk>; 190 clocks = <&peri_clk 10>;
199 clock-frequency = <400000>; 191 clock-frequency = <400000>;
200 }; 192 };
201}; 193};
@@ -204,6 +196,30 @@
204 clock-frequency = <25000000>; 196 clock-frequency = <25000000>;
205}; 197};
206 198
199&mio_clk {
200 compatible = "socionext,uniphier-pxs2-mio-clock";
201};
202
203&mio_rst {
204 compatible = "socionext,uniphier-pxs2-mio-reset";
205};
206
207&peri_clk {
208 compatible = "socionext,uniphier-pxs2-peri-clock";
209};
210
211&peri_rst {
212 compatible = "socionext,uniphier-pxs2-peri-reset";
213};
214
207&pinctrl { 215&pinctrl {
208 compatible = "socionext,uniphier-pxs2-pinctrl"; 216 compatible = "socionext,uniphier-pxs2-pinctrl";
209}; 217};
218
219&sys_clk {
220 compatible = "socionext,uniphier-pxs2-clock";
221};
222
223&sys_rst {
224 compatible = "socionext,uniphier-pxs2-reset";
225};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/boot/dts/uniphier-sld3-ref.dts
index acb420492b36..ac792ae07ae0 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-sld3-ref.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-sLD3 Reference Board 2 * Device Tree Source for UniPhier sLD3 Reference Board
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,13 +44,13 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-ph1-sld3.dtsi" 47/include/ "uniphier-sld3.dtsi"
47/include/ "uniphier-ref-daughter.dtsi" 48/include/ "uniphier-ref-daughter.dtsi"
48/include/ "uniphier-support-card.dtsi" 49/include/ "uniphier-support-card.dtsi"
49 50
50/ { 51/ {
51 model = "UniPhier PH1-sLD3 Reference Board"; 52 model = "UniPhier sLD3 Reference Board";
52 compatible = "socionext,ph1-sld3-ref", "socionext,ph1-sld3"; 53 compatible = "socionext,uniphier-sld3-ref", "socionext,uniphier-sld3";
53 54
54 memory { 55 memory {
55 device_type = "memory"; 56 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-sld3.dtsi
index 03292f443305..5fa96c939b5c 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-sld3.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-sLD3 SoC 2 * Device Tree Source for UniPhier sLD3 SoC
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,17 +46,17 @@
45/include/ "skeleton.dtsi" 46/include/ "skeleton.dtsi"
46 47
47/ { 48/ {
48 compatible = "socionext,ph1-sld3"; 49 compatible = "socionext,uniphier-sld3";
49 50
50 cpus { 51 cpus {
51 #address-cells = <1>; 52 #address-cells = <1>;
52 #size-cells = <0>; 53 #size-cells = <0>;
53 enable-method = "socionext,uniphier-smp";
54 54
55 cpu@0 { 55 cpu@0 {
56 device_type = "cpu"; 56 device_type = "cpu";
57 compatible = "arm,cortex-a9"; 57 compatible = "arm,cortex-a9";
58 reg = <0>; 58 reg = <0>;
59 enable-method = "psci";
59 next-level-cache = <&l2>; 60 next-level-cache = <&l2>;
60 }; 61 };
61 62
@@ -63,10 +64,16 @@
63 device_type = "cpu"; 64 device_type = "cpu";
64 compatible = "arm,cortex-a9"; 65 compatible = "arm,cortex-a9";
65 reg = <1>; 66 reg = <1>;
67 enable-method = "psci";
66 next-level-cache = <&l2>; 68 next-level-cache = <&l2>;
67 }; 69 };
68 }; 70 };
69 71
72 psci {
73 compatible = "arm,psci-0.2";
74 method = "smc";
75 };
76
70 clocks { 77 clocks {
71 refclk: ref { 78 refclk: ref {
72 #clock-cells = <0>; 79 #clock-cells = <0>;
@@ -79,18 +86,6 @@
79 compatible = "fixed-clock"; 86 compatible = "fixed-clock";
80 clock-frequency = <50000000>; 87 clock-frequency = <50000000>;
81 }; 88 };
82
83 uart_clk: uart_clk {
84 #clock-cells = <0>;
85 compatible = "fixed-clock";
86 clock-frequency = <36864000>;
87 };
88
89 iobus_clk: iobus_clk {
90 #clock-cells = <0>;
91 compatible = "fixed-clock";
92 clock-frequency = <100000000>;
93 };
94 }; 89 };
95 90
96 soc { 91 soc {
@@ -139,7 +134,7 @@
139 status = "disabled"; 134 status = "disabled";
140 reg = <0x54006800 0x40>; 135 reg = <0x54006800 0x40>;
141 interrupts = <0 33 4>; 136 interrupts = <0 33 4>;
142 clocks = <&uart_clk>; 137 clocks = <&sys_clk 0>;
143 fifo-size = <64>; 138 fifo-size = <64>;
144 }; 139 };
145 140
@@ -148,7 +143,7 @@
148 status = "disabled"; 143 status = "disabled";
149 reg = <0x54006900 0x40>; 144 reg = <0x54006900 0x40>;
150 interrupts = <0 35 4>; 145 interrupts = <0 35 4>;
151 clocks = <&uart_clk>; 146 clocks = <&sys_clk 0>;
152 fifo-size = <64>; 147 fifo-size = <64>;
153 }; 148 };
154 149
@@ -157,7 +152,7 @@
157 status = "disabled"; 152 status = "disabled";
158 reg = <0x54006a00 0x40>; 153 reg = <0x54006a00 0x40>;
159 interrupts = <0 37 4>; 154 interrupts = <0 37 4>;
160 clocks = <&uart_clk>; 155 clocks = <&sys_clk 0>;
161 fifo-size = <64>; 156 fifo-size = <64>;
162 }; 157 };
163 158
@@ -168,7 +163,7 @@
168 #address-cells = <1>; 163 #address-cells = <1>;
169 #size-cells = <0>; 164 #size-cells = <0>;
170 interrupts = <0 41 1>; 165 interrupts = <0 41 1>;
171 clocks = <&iobus_clk>; 166 clocks = <&sys_clk 1>;
172 clock-frequency = <100000>; 167 clock-frequency = <100000>;
173 }; 168 };
174 169
@@ -179,7 +174,7 @@
179 #address-cells = <1>; 174 #address-cells = <1>;
180 #size-cells = <0>; 175 #size-cells = <0>;
181 interrupts = <0 42 1>; 176 interrupts = <0 42 1>;
182 clocks = <&iobus_clk>; 177 clocks = <&sys_clk 1>;
183 clock-frequency = <100000>; 178 clock-frequency = <100000>;
184 }; 179 };
185 180
@@ -190,7 +185,7 @@
190 #address-cells = <1>; 185 #address-cells = <1>;
191 #size-cells = <0>; 186 #size-cells = <0>;
192 interrupts = <0 43 1>; 187 interrupts = <0 43 1>;
193 clocks = <&iobus_clk>; 188 clocks = <&sys_clk 1>;
194 clock-frequency = <100000>; 189 clock-frequency = <100000>;
195 }; 190 };
196 191
@@ -201,7 +196,7 @@
201 #address-cells = <1>; 196 #address-cells = <1>;
202 #size-cells = <0>; 197 #size-cells = <0>;
203 interrupts = <0 44 1>; 198 interrupts = <0 44 1>;
204 clocks = <&iobus_clk>; 199 clocks = <&sys_clk 1>;
205 clock-frequency = <100000>; 200 clock-frequency = <100000>;
206 }; 201 };
207 202
@@ -212,7 +207,7 @@
212 #address-cells = <1>; 207 #address-cells = <1>;
213 #size-cells = <0>; 208 #size-cells = <0>;
214 interrupts = <0 45 1>; 209 interrupts = <0 45 1>;
215 clocks = <&iobus_clk>; 210 clocks = <&sys_clk 1>;
216 clock-frequency = <400000>; 211 clock-frequency = <400000>;
217 }; 212 };
218 213
@@ -229,6 +224,22 @@
229 reg = <0x59801000 0x400>; 224 reg = <0x59801000 0x400>;
230 }; 225 };
231 226
227 mioctrl@59810000 {
228 compatible = "socionext,uniphier-mioctrl",
229 "simple-mfd", "syscon";
230 reg = <0x59810000 0x800>;
231
232 mio_clk: clock {
233 compatible = "socionext,uniphier-sld3-mio-clock";
234 #clock-cells = <1>;
235 };
236
237 mio_rst: reset {
238 compatible = "socionext,uniphier-sld3-mio-reset";
239 #reset-cells = <1>;
240 };
241 };
242
232 usb0: usb@5a800100 { 243 usb0: usb@5a800100 {
233 compatible = "socionext,uniphier-ehci", "generic-ehci"; 244 compatible = "socionext,uniphier-ehci", "generic-ehci";
234 status = "disabled"; 245 status = "disabled";
@@ -256,5 +267,21 @@
256 reg = <0x5a830100 0x100>; 267 reg = <0x5a830100 0x100>;
257 interrupts = <0 83 4>; 268 interrupts = <0 83 4>;
258 }; 269 };
270
271 sysctrl@f1840000 {
272 compatible = "socionext,uniphier-sysctrl",
273 "simple-mfd", "syscon";
274 reg = <0xf1840000 0x4000>;
275
276 sys_clk: clock {
277 compatible = "socionext,uniphier-sld3-clock";
278 #clock-cells = <1>;
279 };
280
281 sys_rst: reset {
282 compatible = "socionext,uniphier-sld3-reset";
283 #reset-cells = <1>;
284 };
285 };
259 }; 286 };
260}; 287};
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/boot/dts/uniphier-sld8-ref.dts
index d594f40e7f76..a8291f988066 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-sld8-ref.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-sLD8 Reference Board 2 * Device Tree Source for UniPhier sLD8 Reference Board
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,13 +44,13 @@
43 */ 44 */
44 45
45/dts-v1/; 46/dts-v1/;
46/include/ "uniphier-ph1-sld8.dtsi" 47/include/ "uniphier-sld8.dtsi"
47/include/ "uniphier-ref-daughter.dtsi" 48/include/ "uniphier-ref-daughter.dtsi"
48/include/ "uniphier-support-card.dtsi" 49/include/ "uniphier-support-card.dtsi"
49 50
50/ { 51/ {
51 model = "UniPhier PH1-sLD8 Reference Board"; 52 model = "UniPhier sLD8 Reference Board";
52 compatible = "socionext,ph1-sld8-ref", "socionext,ph1-sld8"; 53 compatible = "socionext,uniphier-sld8-ref", "socionext,uniphier-sld8";
53 54
54 memory { 55 memory {
55 device_type = "memory"; 56 device_type = "memory";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi
index 467f9d8e9873..d8cf0e7e11ea 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-sld8.dtsi
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree Source for UniPhier PH1-sLD8 SoC 2 * Device Tree Source for UniPhier sLD8 SoC
3 * 3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -45,7 +46,7 @@
45/include/ "uniphier-common32.dtsi" 46/include/ "uniphier-common32.dtsi"
46 47
47/ { 48/ {
48 compatible = "socionext,ph1-sld8"; 49 compatible = "socionext,uniphier-sld8";
49 50
50 cpus { 51 cpus {
51 #address-cells = <1>; 52 #address-cells = <1>;
@@ -55,6 +56,7 @@
55 device_type = "cpu"; 56 device_type = "cpu";
56 compatible = "arm,cortex-a9"; 57 compatible = "arm,cortex-a9";
57 reg = <0>; 58 reg = <0>;
59 enable-method = "psci";
58 next-level-cache = <&l2>; 60 next-level-cache = <&l2>;
59 }; 61 };
60 }; 62 };
@@ -65,18 +67,6 @@
65 compatible = "fixed-clock"; 67 compatible = "fixed-clock";
66 clock-frequency = <50000000>; 68 clock-frequency = <50000000>;
67 }; 69 };
68
69 uart_clk: uart_clk {
70 #clock-cells = <0>;
71 compatible = "fixed-clock";
72 clock-frequency = <80000000>;
73 };
74
75 iobus_clk: iobus_clk {
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <100000000>;
79 };
80 }; 70 };
81}; 71};
82 72
@@ -101,7 +91,7 @@
101 interrupts = <0 41 1>; 91 interrupts = <0 41 1>;
102 pinctrl-names = "default"; 92 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_i2c0>; 93 pinctrl-0 = <&pinctrl_i2c0>;
104 clocks = <&iobus_clk>; 94 clocks = <&peri_clk 4>;
105 clock-frequency = <100000>; 95 clock-frequency = <100000>;
106 }; 96 };
107 97
@@ -114,7 +104,7 @@
114 interrupts = <0 42 1>; 104 interrupts = <0 42 1>;
115 pinctrl-names = "default"; 105 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_i2c1>; 106 pinctrl-0 = <&pinctrl_i2c1>;
117 clocks = <&iobus_clk>; 107 clocks = <&peri_clk 5>;
118 clock-frequency = <100000>; 108 clock-frequency = <100000>;
119 }; 109 };
120 110
@@ -127,7 +117,7 @@
127 interrupts = <0 43 1>; 117 interrupts = <0 43 1>;
128 pinctrl-names = "default"; 118 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_i2c2>; 119 pinctrl-0 = <&pinctrl_i2c2>;
130 clocks = <&iobus_clk>; 120 clocks = <&peri_clk 6>;
131 clock-frequency = <400000>; 121 clock-frequency = <400000>;
132 }; 122 };
133 123
@@ -140,7 +130,7 @@
140 interrupts = <0 44 1>; 130 interrupts = <0 44 1>;
141 pinctrl-names = "default"; 131 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_i2c3>; 132 pinctrl-0 = <&pinctrl_i2c3>;
143 clocks = <&iobus_clk>; 133 clocks = <&peri_clk 7>;
144 clock-frequency = <100000>; 134 clock-frequency = <100000>;
145 }; 135 };
146 136
@@ -151,6 +141,8 @@
151 interrupts = <0 80 4>; 141 interrupts = <0 80 4>;
152 pinctrl-names = "default"; 142 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_usb0>; 143 pinctrl-0 = <&pinctrl_usb0>;
144 clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
145 resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>;
154 }; 146 };
155 147
156 usb1: usb@5a810100 { 148 usb1: usb@5a810100 {
@@ -160,6 +152,8 @@
160 interrupts = <0 81 4>; 152 interrupts = <0 81 4>;
161 pinctrl-names = "default"; 153 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_usb1>; 154 pinctrl-0 = <&pinctrl_usb1>;
155 clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
156 resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>;
163 }; 157 };
164 158
165 usb2: usb@5a820100 { 159 usb2: usb@5a820100 {
@@ -169,6 +163,8 @@
169 interrupts = <0 82 4>; 163 interrupts = <0 82 4>;
170 pinctrl-names = "default"; 164 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_usb2>; 165 pinctrl-0 = <&pinctrl_usb2>;
166 clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
167 resets = <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>, <&sys_rst 8>;
172 }; 168 };
173}; 169};
174 170
@@ -180,6 +176,31 @@
180 interrupts = <0 29 4>; 176 interrupts = <0 29 4>;
181}; 177};
182 178
179&mio_clk {
180 compatible = "socionext,uniphier-sld8-mio-clock";
181};
182
183&mio_rst {
184 compatible = "socionext,uniphier-sld8-mio-reset";
185 resets = <&sys_rst 7>;
186};
187
188&peri_clk {
189 compatible = "socionext,uniphier-sld8-peri-clock";
190};
191
192&peri_rst {
193 compatible = "socionext,uniphier-sld8-peri-reset";
194};
195
183&pinctrl { 196&pinctrl {
184 compatible = "socionext,uniphier-sld8-pinctrl"; 197 compatible = "socionext,uniphier-sld8-pinctrl";
185}; 198};
199
200&sys_clk {
201 compatible = "socionext,uniphier-sld8-clock";
202};
203
204&sys_rst {
205 compatible = "socionext,uniphier-sld8-reset";
206};
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
index a8a8e434fb27..1e0b823f7e8f 100644
--- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
@@ -53,6 +53,12 @@
53 panel: panel { 53 panel: panel {
54 compatible = "edt,et057090dhu"; 54 compatible = "edt,et057090dhu";
55 backlight = <&bl>; 55 backlight = <&bl>;
56
57 port {
58 panel_in: endpoint {
59 remote-endpoint = <&dcu_out>;
60 };
61 };
56 }; 62 };
57 63
58 reg_3v3: regulator-3v3 { 64 reg_3v3: regulator-3v3 {
@@ -91,8 +97,13 @@
91&dcu0 { 97&dcu0 {
92 pinctrl-names = "default"; 98 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_dcu0_1>; 99 pinctrl-0 = <&pinctrl_dcu0_1>;
94 fsl,panel = <&panel>;
95 status = "okay"; 100 status = "okay";
101
102 port {
103 dcu_out: endpoint {
104 remote-endpoint = <&panel_in>;
105 };
106 };
96}; 107};
97 108
98&dspi1 { 109&dspi1 {
diff --git a/arch/arm/boot/dts/vf610m4.dtsi b/arch/arm/boot/dts/vf610m4.dtsi
index 9ffe2eb68ed4..9f2c731839f2 100644
--- a/arch/arm/boot/dts/vf610m4.dtsi
+++ b/arch/arm/boot/dts/vf610m4.dtsi
@@ -42,6 +42,7 @@
42 * OTHER DEALINGS IN THE SOFTWARE. 42 * OTHER DEALINGS IN THE SOFTWARE.
43 */ 43 */
44 44
45#include "skeleton.dtsi"
45#include "armv7-m.dtsi" 46#include "armv7-m.dtsi"
46#include "vfxxx.dtsi" 47#include "vfxxx.dtsi"
47 48
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 35c0d65fe7f1..c9f7e9274aa8 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -50,6 +50,7 @@ static void __init da850_init_machine(void)
50 50
51static const char *const da850_boards_compat[] __initconst = { 51static const char *const da850_boards_compat[] __initconst = {
52 "enbw,cmc", 52 "enbw,cmc",
53 "ti,da850-lcdk",
53 "ti,da850-evm", 54 "ti,da850-evm",
54 "ti,da850", 55 "ti,da850",
55 NULL, 56 NULL,
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index b7e9801fdaa4..3ae45b8d7b0a 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -7,6 +7,7 @@ menuconfig ARCH_NOMADIK
7 select CLKSRC_NOMADIK_MTU_SCHED_CLOCK 7 select CLKSRC_NOMADIK_MTU_SCHED_CLOCK
8 select CPU_ARM926T 8 select CPU_ARM926T
9 select GPIOLIB 9 select GPIOLIB
10 select MFD_SYSCON
10 select MIGHT_HAVE_CACHE_L2X0 11 select MIGHT_HAVE_CACHE_L2X0
11 select PINCTRL 12 select PINCTRL
12 select PINCTRL_NOMADIK 13 select PINCTRL_NOMADIK
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-19 07:16:52 -0400