diff options
Diffstat (limited to 'arch/arm/boot/dts/da850.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/da850.dtsi | 80 |
1 files changed, 51 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 25f0f8e6dde5..f79e1b91c680 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi | |||
| @@ -41,20 +41,40 @@ | |||
| 41 | pinctrl-single,function-mask = <0xf>; | 41 | pinctrl-single,function-mask = <0xf>; |
| 42 | status = "disabled"; | 42 | status = "disabled"; |
| 43 | 43 | ||
| 44 | nand_cs3_pins: pinmux_nand_pins { | 44 | serial0_rtscts_pins: pinmux_serial0_rtscts_pins { |
| 45 | pinctrl-single,bits = < | 45 | pinctrl-single,bits = < |
| 46 | /* EMA_OE, EMA_WE */ | 46 | /* UART0_RTS UART0_CTS */ |
| 47 | 0x1c 0x00110000 0x00ff0000 | 47 | 0x0c 0x22000000 0xff000000 |
| 48 | /* EMA_CS[4],EMA_CS[3]*/ | 48 | >; |
| 49 | 0x1c 0x00000110 0x00000ff0 | 49 | }; |
| 50 | /* | 50 | serial0_rxtx_pins: pinmux_serial0_rxtx_pins { |
| 51 | * EMA_D[0], EMA_D[1], EMA_D[2], | 51 | pinctrl-single,bits = < |
| 52 | * EMA_D[3], EMA_D[4], EMA_D[5], | 52 | /* UART0_TXD UART0_RXD */ |
| 53 | * EMA_D[6], EMA_D[7] | 53 | 0x0c 0x00220000 0x00ff0000 |
| 54 | */ | 54 | >; |
| 55 | 0x24 0x11111111 0xffffffff | 55 | }; |
| 56 | /* EMA_A[1], EMA_A[2] */ | 56 | serial1_rtscts_pins: pinmux_serial1_rtscts_pins { |
| 57 | 0x30 0x01100000 0x0ff00000 | 57 | pinctrl-single,bits = < |
| 58 | /* UART1_CTS UART1_RTS */ | ||
| 59 | 0x00 0x00440000 0x00ff0000 | ||
| 60 | >; | ||
| 61 | }; | ||
| 62 | serial1_rxtx_pins: pinmux_serial1_rxtx_pins { | ||
| 63 | pinctrl-single,bits = < | ||
| 64 | /* UART1_TXD UART1_RXD */ | ||
| 65 | 0x10 0x22000000 0xff000000 | ||
| 66 | >; | ||
| 67 | }; | ||
| 68 | serial2_rtscts_pins: pinmux_serial2_rtscts_pins { | ||
| 69 | pinctrl-single,bits = < | ||
| 70 | /* UART2_CTS UART2_RTS */ | ||
| 71 | 0x00 0x44000000 0xff000000 | ||
| 72 | >; | ||
| 73 | }; | ||
| 74 | serial2_rxtx_pins: pinmux_serial2_rxtx_pins { | ||
| 75 | pinctrl-single,bits = < | ||
| 76 | /* UART2_TXD UART2_RXD */ | ||
| 77 | 0x10 0x00220000 0x00ff0000 | ||
| 58 | >; | 78 | >; |
| 59 | }; | 79 | }; |
| 60 | i2c0_pins: pinmux_i2c0_pins { | 80 | i2c0_pins: pinmux_i2c0_pins { |
| @@ -274,31 +294,36 @@ | |||
| 274 | status = "disabled"; | 294 | status = "disabled"; |
| 275 | }; | 295 | }; |
| 276 | ehrpwm0: pwm@300000 { | 296 | ehrpwm0: pwm@300000 { |
| 277 | compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; | 297 | compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", |
| 298 | "ti,am33xx-ehrpwm"; | ||
| 278 | #pwm-cells = <3>; | 299 | #pwm-cells = <3>; |
| 279 | reg = <0x300000 0x2000>; | 300 | reg = <0x300000 0x2000>; |
| 280 | status = "disabled"; | 301 | status = "disabled"; |
| 281 | }; | 302 | }; |
| 282 | ehrpwm1: pwm@302000 { | 303 | ehrpwm1: pwm@302000 { |
| 283 | compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; | 304 | compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", |
| 305 | "ti,am33xx-ehrpwm"; | ||
| 284 | #pwm-cells = <3>; | 306 | #pwm-cells = <3>; |
| 285 | reg = <0x302000 0x2000>; | 307 | reg = <0x302000 0x2000>; |
| 286 | status = "disabled"; | 308 | status = "disabled"; |
| 287 | }; | 309 | }; |
| 288 | ecap0: ecap@306000 { | 310 | ecap0: ecap@306000 { |
| 289 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; | 311 | compatible = "ti,da850-ecap", "ti,am3352-ecap", |
| 312 | "ti,am33xx-ecap"; | ||
| 290 | #pwm-cells = <3>; | 313 | #pwm-cells = <3>; |
| 291 | reg = <0x306000 0x80>; | 314 | reg = <0x306000 0x80>; |
| 292 | status = "disabled"; | 315 | status = "disabled"; |
| 293 | }; | 316 | }; |
| 294 | ecap1: ecap@307000 { | 317 | ecap1: ecap@307000 { |
| 295 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; | 318 | compatible = "ti,da850-ecap", "ti,am3352-ecap", |
| 319 | "ti,am33xx-ecap"; | ||
| 296 | #pwm-cells = <3>; | 320 | #pwm-cells = <3>; |
| 297 | reg = <0x307000 0x80>; | 321 | reg = <0x307000 0x80>; |
| 298 | status = "disabled"; | 322 | status = "disabled"; |
| 299 | }; | 323 | }; |
| 300 | ecap2: ecap@308000 { | 324 | ecap2: ecap@308000 { |
| 301 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; | 325 | compatible = "ti,da850-ecap", "ti,am3352-ecap", |
| 326 | "ti,am33xx-ecap"; | ||
| 302 | #pwm-cells = <3>; | 327 | #pwm-cells = <3>; |
| 303 | reg = <0x308000 0x80>; | 328 | reg = <0x308000 0x80>; |
| 304 | status = "disabled"; | 329 | status = "disabled"; |
| @@ -375,17 +400,14 @@ | |||
| 375 | dma-names = "tx", "rx"; | 400 | dma-names = "tx", "rx"; |
| 376 | }; | 401 | }; |
| 377 | }; | 402 | }; |
| 378 | nand_cs3@62000000 { | 403 | aemif: aemif@68000000 { |
| 379 | compatible = "ti,davinci-nand"; | 404 | compatible = "ti,da850-aemif"; |
| 380 | reg = <0x62000000 0x807ff | 405 | #address-cells = <2>; |
| 381 | 0x68000000 0x8000>; | 406 | #size-cells = <1>; |
| 382 | ti,davinci-chipselect = <1>; | 407 | |
| 383 | ti,davinci-mask-ale = <0>; | 408 | reg = <0x68000000 0x00008000>; |
| 384 | ti,davinci-mask-cle = <0>; | 409 | ranges = <0 0 0x60000000 0x08000000 |
| 385 | ti,davinci-mask-chipsel = <0>; | 410 | 1 0 0x68000000 0x00008000>; |
| 386 | ti,davinci-ecc-mode = "hw"; | ||
| 387 | ti,davinci-ecc-bits = <4>; | ||
| 388 | ti,davinci-nand-use-bbt; | ||
| 389 | status = "disabled"; | 411 | status = "disabled"; |
| 390 | }; | 412 | }; |
| 391 | }; | 413 | }; |