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authorOlof Johansson <olof@lixom.net>2013-12-22 14:42:30 -0500
committerOlof Johansson <olof@lixom.net>2013-12-22 14:42:30 -0500
commit958c025a2a1de40b8edb615b2d99a962c6c84019 (patch)
treebaa92dfc0d0a89635943d47d63f3adfa3fa377ca /arch/arm/boot
parentddf20397eb1672bdbdc1d96d06f2f683ac76094f (diff)
parentca594844e4a53f778811c06feef60bdf36bc5fec (diff)
Merge branch 'at91/dt' into next/drivers
Merging at91/dt as a prereq for the at91/drivers code. * at91/dt: (43 commits) ARM: at91/at91rm9200ek.dts: rearrange nodes in address ascending order ARM: at91: dt: at91rm9200ek: add emac and nor flash support ARM: at91: add uart aliases to sama5d3 dtsi ARM: at91: add i2c2 pinctrl speficifation to sama5d3 DT ARM: at91: Animeo IP: fix mtd partition table ARM: at91: at91sam9g45: add i2c pinctrl ARM: at91: at91sam9g45: set default mmc pinctrl-names ARM: at91: sama5d3: enable qt1070 as a wakeup source ARM: at91: add support for Cosino board series by HCE Engineering ARM: at91/dt/sama5d3: add DMA information to SHA/AES/TDES nodes ARM: at91/dt/trivial: before sama5d3, Atmel MPU were using at91 prefix ARM: at91/dt/trivial: use macro for AES irq type ARM: at91: sam9263ek: add dt lcd support ARM: at91: at9sam9m10g45ek: add dt lcd support ARM: at91: sam9263: add fb dt support ARM: at91: sam9g45: add fb dt support ARM: at91/dt: binding: add missing compatibility string in SDRAM/DDR documentation ARM: at91/dt: binding: add precision to AIC documentation ARM: at91/dt: add atmel,pullup-gpio to at91rm9200ek usb1 definition ARM: at91/dt: add ethernet phy to at91rm9200ek board ...
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/animeo_ip.dts31
-rw-r--r--arch/arm/boot/dts/at91-cosino.dtsi122
-rw-r--r--arch/arm/boot/dts/at91-cosino_mega2560.dts84
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi4
-rw-r--r--arch/arm/boot/dts/at91rm9200ek.dts57
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi37
-rw-r--r--arch/arm/boot/dts/at91sam9263ek.dts30
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi67
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts29
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi405
-rw-r--r--arch/arm/boot/dts/sama5d3_can.dtsi20
-rw-r--r--arch/arm/boot/dts/sama5d3_emac.dtsi11
-rw-r--r--arch/arm/boot/dts/sama5d3_gmac.dtsi11
-rw-r--r--arch/arm/boot/dts/sama5d3_lcd.dtsi17
-rw-r--r--arch/arm/boot/dts/sama5d3_mci2.dtsi12
-rw-r--r--arch/arm/boot/dts/sama5d3_tcb1.dtsi12
-rw-r--r--arch/arm/boot/dts/sama5d3_uart.dtsi26
-rw-r--r--arch/arm/boot/dts/sama5d3xcm.dtsi17
-rw-r--r--arch/arm/boot/dts/sama5d3xdm.dtsi1
20 files changed, 942 insertions, 52 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d57c1a65b24f..772a30e06e48 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
30dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb 30dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
31# sam9x5 31# sam9x5
32dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb 32dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb
33dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb
33dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb 34dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
34dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb 35dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
35dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb 36dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 3a1de9eb5111..3c4f6d983cbd 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -90,34 +90,19 @@
90 nand-on-flash-bbt; 90 nand-on-flash-bbt;
91 status = "okay"; 91 status = "okay";
92 92
93 at91bootstrap@0 { 93 barebox@0 {
94 label = "at91bootstrap";
95 reg = <0x0 0x8000>;
96 };
97
98 barebox@8000 {
99 label = "barebox"; 94 label = "barebox";
100 reg = <0x8000 0x40000>; 95 reg = <0x0 0x58000>;
101 };
102
103 bareboxenv@48000 {
104 label = "bareboxenv";
105 reg = <0x48000 0x8000>;
106 };
107
108 user_block@0x50000 {
109 label = "user_block";
110 reg = <0x50000 0xb0000>;
111 }; 96 };
112 97
113 kernel@100000 { 98 u_boot_env@58000 {
114 label = "kernel"; 99 label = "u_boot_env";
115 reg = <0x100000 0x1b0000>; 100 reg = <0x58000 0x8000>;
116 }; 101 };
117 102
118 root@2b0000 { 103 ubi@60000 {
119 label = "root"; 104 label = "ubi";
120 reg = <0x2b0000 0x1D50000>; 105 reg = <0x60000 0x1FA0000>;
121 }; 106 };
122 }; 107 };
123 108
diff --git a/arch/arm/boot/dts/at91-cosino.dtsi b/arch/arm/boot/dts/at91-cosino.dtsi
new file mode 100644
index 000000000000..2093c4d7cd6a
--- /dev/null
+++ b/arch/arm/boot/dts/at91-cosino.dtsi
@@ -0,0 +1,122 @@
1/*
2 * at91-cosino.dtsi - Device Tree file for Cosino core module
3 *
4 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
5 * HCE Engineering
6 *
7 * Derived from at91sam9x5ek.dtsi by:
8 * Copyright (C) 2012 Atmel,
9 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
10 *
11 * Licensed under GPLv2 or later.
12 */
13
14#include "at91sam9g35.dtsi"
15
16/ {
17 model = "HCE Cosino core module";
18 compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
19
20 chosen {
21 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
22 };
23
24 memory {
25 reg = <0x20000000 0x8000000>;
26 };
27
28 clocks {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
33 main_clock: clock@0 {
34 compatible = "atmel,osc", "fixed-clock";
35 clock-frequency = <12000000>;
36 };
37 };
38
39 ahb {
40 apb {
41 mmc0: mmc@f0008000 {
42 pinctrl-0 = <
43 &pinctrl_board_mmc0
44 &pinctrl_mmc0_slot0_clk_cmd_dat0
45 &pinctrl_mmc0_slot0_dat1_3>;
46 status = "okay";
47 slot@0 {
48 reg = <0>;
49 bus-width = <4>;
50 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
51 };
52 };
53
54 dbgu: serial@fffff200 {
55 status = "okay";
56 };
57
58 usart0: serial@f801c000 {
59 status = "okay";
60 };
61
62 i2c0: i2c@f8010000 {
63 status = "okay";
64 };
65
66 adc0: adc@f804c000 {
67 atmel,adc-clock-rate = <1000000>;
68 atmel,adc-ts-wires = <4>;
69 atmel,adc-ts-pressure-threshold = <10000>;
70 status = "okay";
71 };
72
73 pinctrl@fffff400 {
74 mmc0 {
75 pinctrl_board_mmc0: mmc0-board {
76 atmel,pins =
77 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
78 };
79 };
80 };
81
82 watchdog@fffffe40 {
83 status = "okay";
84 };
85 };
86
87 nand0: nand@40000000 {
88 nand-bus-width = <8>;
89 nand-ecc-mode = "hw";
90 atmel,has-pmecc; /* Enable PMECC */
91 atmel,pmecc-cap = <4>;
92 atmel,pmecc-sector-size = <512>;
93 nand-on-flash-bbt;
94 status = "okay";
95
96 at91bootstrap@0 {
97 label = "at91bootstrap";
98 reg = <0x0 0x40000>;
99 };
100
101 uboot@40000 {
102 label = "u-boot";
103 reg = <0x40000 0x80000>;
104 };
105
106 ubootenv@c0000 {
107 label = "U-Boot Env";
108 reg = <0xc0000 0x140000>;
109 };
110
111 kernel@200000 {
112 label = "kernel";
113 reg = <0x200000 0x600000>;
114 };
115
116 rootfs@800000 {
117 label = "rootfs";
118 reg = <0x800000 0x0f800000>;
119 };
120 };
121 };
122};
diff --git a/arch/arm/boot/dts/at91-cosino_mega2560.dts b/arch/arm/boot/dts/at91-cosino_mega2560.dts
new file mode 100644
index 000000000000..f9415dd11f17
--- /dev/null
+++ b/arch/arm/boot/dts/at91-cosino_mega2560.dts
@@ -0,0 +1,84 @@
1/*
2 * at91-cosino_mega2560.dts - Device Tree file for Cosino board with
3 * Mega 2560 extension
4 *
5 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
6 * HCE Engineering
7 *
8 * Derived from at91sam9g35ek.dts by:
9 * Copyright (C) 2012 Atmel,
10 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
11 *
12 * Licensed under GPLv2 or later.
13 */
14
15/dts-v1/;
16#include "at91-cosino.dtsi"
17
18/ {
19 model = "HCE Cosino Mega 2560";
20 compatible = "hce,cosino_mega2560", "atmel,at91sam9x5", "atmel,at91sam9";
21
22 ahb {
23 apb {
24 macb0: ethernet@f802c000 {
25 phy-mode = "rmii";
26 status = "okay";
27 };
28
29 adc0: adc@f804c000 {
30 atmel,adc-clock-rate = <1000000>;
31 atmel,adc-ts-wires = <4>;
32 atmel,adc-ts-pressure-threshold = <10000>;
33 status = "okay";
34 };
35
36
37 tsadcc: tsadcc@f804c000 {
38 status = "okay";
39 };
40
41 rtc@fffffeb0 {
42 status = "okay";
43 };
44
45 usart1: serial@f8020000 {
46 status = "okay";
47 };
48
49 usart2: serial@f8024000 {
50 status = "okay";
51 };
52
53 usb2: gadget@f803c000 {
54 atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
55 status = "okay";
56 };
57
58 mmc1: mmc@f000c000 {
59 pinctrl-0 = <
60 &pinctrl_mmc1_slot0_clk_cmd_dat0
61 &pinctrl_mmc1_slot0_dat1_3>;
62 status = "okay";
63 slot@0 {
64 reg = <0>;
65 bus-width = <4>;
66 non-removable;
67 };
68 };
69 };
70
71 usb0: ohci@00600000 {
72 status = "okay";
73 num-ports = <3>;
74 atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
75 &pioD 19 GPIO_ACTIVE_LOW
76 &pioD 20 GPIO_ACTIVE_LOW
77 >;
78 };
79
80 usb1: ehci@00700000 {
81 status = "okay";
82 };
83 };
84};
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index f77065506f1e..c61b16fba79b 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -191,12 +191,12 @@
191 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */ 191 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
192 }; 192 };
193 193
194 pinctrl_uart0_rts: uart0_rts-0 { 194 pinctrl_uart0_cts: uart0_cts-0 {
195 atmel,pins = 195 atmel,pins =
196 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */ 196 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
197 }; 197 };
198 198
199 pinctrl_uart0_cts: uart0_cts-0 { 199 pinctrl_uart0_rts: uart0_rts-0 {
200 atmel,pins = 200 atmel,pins =
201 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ 201 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
202 }; 202 };
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index d2d72c3b44c4..df6b0aa0e4dd 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -29,10 +29,22 @@
29 29
30 ahb { 30 ahb {
31 apb { 31 apb {
32 dbgu: serial@fffff200 { 32 usb1: gadget@fffb0000 {
33 atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
34 atmel,pullup-gpio = <&pioD 5 GPIO_ACTIVE_HIGH>;
33 status = "okay"; 35 status = "okay";
34 }; 36 };
35 37
38 macb0: ethernet@fffbc000 {
39 phy-mode = "rmii";
40 status = "okay";
41
42 phy0: ethernet-phy {
43 interrupt-parent = <&pioC>;
44 interrupts = <4 IRQ_TYPE_EDGE_BOTH>;
45 };
46 };
47
36 usart1: serial@fffc4000 { 48 usart1: serial@fffc4000 {
37 pinctrl-0 = 49 pinctrl-0 =
38 <&pinctrl_uart1 50 <&pinctrl_uart1
@@ -44,16 +56,6 @@
44 status = "okay"; 56 status = "okay";
45 }; 57 };
46 58
47 macb0: ethernet@fffbc000 {
48 phy-mode = "rmii";
49 status = "okay";
50 };
51
52 usb1: gadget@fffb0000 {
53 atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
54 status = "okay";
55 };
56
57 spi0: spi@fffe0000 { 59 spi0: spi@fffe0000 {
58 status = "okay"; 60 status = "okay";
59 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>; 61 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
@@ -63,12 +65,45 @@
63 reg = <0>; 65 reg = <0>;
64 }; 66 };
65 }; 67 };
68
69 dbgu: serial@fffff200 {
70 status = "okay";
71 };
66 }; 72 };
67 73
68 usb0: ohci@00300000 { 74 usb0: ohci@00300000 {
69 num-ports = <2>; 75 num-ports = <2>;
70 status = "okay"; 76 status = "okay";
71 }; 77 };
78
79 nor_flash@10000000 {
80 compatible = "cfi-flash";
81 reg = <0x10000000 0x800000>;
82 linux,mtd-name = "physmap-flash.0";
83 bank-width = <2>;
84 #address-cells = <1>;
85 #size-cells = <1>;
86
87 barebox@0 {
88 label = "barebox";
89 reg = <0x00000 0x40000>;
90 };
91
92 bareboxenv@40000 {
93 label = "bareboxenv";
94 reg = <0x40000 0x10000>;
95 };
96
97 kernel@50000 {
98 label = "kernel";
99 reg = <0x50000 0x300000>;
100 };
101
102 root@350000 {
103 label = "root";
104 reg = <0x350000 0x4B0000>;
105 };
106 };
72 }; 107 };
73 108
74 leds { 109 leds {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index d5bd65f74602..22e255ab6963 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -366,6 +366,34 @@
366 }; 366 };
367 }; 367 };
368 368
369 fb {
370 pinctrl_fb: fb-0 {
371 atmel,pins =
372 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
373 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
374 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
375 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
376 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
377 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
378 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
379 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
380 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
381 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
382 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
383 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
384 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
385 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
386 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
387 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
388 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
389 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
390 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
391 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
392 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
393 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
394 };
395 };
396
369 pioA: gpio@fffff200 { 397 pioA: gpio@fffff200 {
370 compatible = "atmel,at91rm9200-gpio"; 398 compatible = "atmel,at91rm9200-gpio";
371 reg = <0xfffff200 0x200>; 399 reg = <0xfffff200 0x200>;
@@ -549,6 +577,15 @@
549 }; 577 };
550 }; 578 };
551 579
580 fb0: fb@0x00700000 {
581 compatible = "atmel,at91sam9263-lcdc";
582 reg = <0x00700000 0x1000>;
583 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
584 pinctrl-names = "default";
585 pinctrl-0 = <&pinctrl_fb>;
586 status = "disabled";
587 };
588
552 nand0: nand@40000000 { 589 nand0: nand@40000000 {
553 compatible = "atmel,at91rm9200-nand"; 590 compatible = "atmel,at91rm9200-nand";
554 #address-cells = <1>; 591 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 70f835b55c0b..15009c9f2293 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -95,6 +95,36 @@
95 }; 95 };
96 }; 96 };
97 97
98 fb0: fb@0x00700000 {
99 display = <&display0>;
100 status = "okay";
101
102 display0: display {
103 bits-per-pixel = <16>;
104 atmel,lcdcon-backlight;
105 atmel,dmacon = <0x1>;
106 atmel,lcdcon2 = <0x80008002>;
107 atmel,guard-time = <1>;
108
109 display-timings {
110 native-mode = <&timing0>;
111 timing0: timing0 {
112 clock-frequency = <4965000>;
113 hactive = <240>;
114 vactive = <320>;
115 hback-porch = <1>;
116 hfront-porch = <33>;
117 vback-porch = <1>;
118 vfront-porch = <0>;
119 hsync-len = <5>;
120 vsync-len = <1>;
121 hsync-active = <1>;
122 vsync-active = <1>;
123 };
124 };
125 };
126 };
127
98 nand0: nand@40000000 { 128 nand0: nand@40000000 {
99 nand-bus-width = <8>; 129 nand-bus-width = <8>;
100 nand-ecc-mode = "soft"; 130 nand-ecc-mode = "soft";
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index c3e514837074..d7af9ecb85d2 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -143,6 +143,22 @@
143 }; 143 };
144 }; 144 };
145 145
146 i2c0 {
147 pinctrl_i2c0: i2c0-0 {
148 atmel,pins =
149 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
150 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
151 };
152 };
153
154 i2c1 {
155 pinctrl_i2c1: i2c1-0 {
156 atmel,pins =
157 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
158 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
159 };
160 };
161
146 usart0 { 162 usart0 {
147 pinctrl_usart0: usart0-0 { 163 pinctrl_usart0: usart0-0 {
148 atmel,pins = 164 atmel,pins =
@@ -425,6 +441,42 @@
425 }; 441 };
426 }; 442 };
427 443
444 fb {
445 pinctrl_fb: fb-0 {
446 atmel,pins =
447 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
448 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
449 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
450 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
451 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
452 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
453 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
454 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
455 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
456 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
457 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
458 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
459 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
460 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
461 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
462 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
463 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
464 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
465 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
466 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
467 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
468 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
469 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
470 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
471 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
472 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
473 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
474 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
475 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
476 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
477 };
478 };
479
428 pioA: gpio@fffff200 { 480 pioA: gpio@fffff200 {
429 compatible = "atmel,at91rm9200-gpio"; 481 compatible = "atmel,at91rm9200-gpio";
430 reg = <0xfffff200 0x200>; 482 reg = <0xfffff200 0x200>;
@@ -542,6 +594,8 @@
542 compatible = "atmel,at91sam9g10-i2c"; 594 compatible = "atmel,at91sam9g10-i2c";
543 reg = <0xfff84000 0x100>; 595 reg = <0xfff84000 0x100>;
544 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 596 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_i2c0>;
545 #address-cells = <1>; 599 #address-cells = <1>;
546 #size-cells = <0>; 600 #size-cells = <0>;
547 status = "disabled"; 601 status = "disabled";
@@ -551,6 +605,8 @@
551 compatible = "atmel,at91sam9g10-i2c"; 605 compatible = "atmel,at91sam9g10-i2c";
552 reg = <0xfff88000 0x100>; 606 reg = <0xfff88000 0x100>;
553 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 607 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_i2c1>;
554 #address-cells = <1>; 610 #address-cells = <1>;
555 #size-cells = <0>; 611 #size-cells = <0>;
556 status = "disabled"; 612 status = "disabled";
@@ -618,6 +674,7 @@
618 compatible = "atmel,hsmci"; 674 compatible = "atmel,hsmci";
619 reg = <0xfff80000 0x600>; 675 reg = <0xfff80000 0x600>;
620 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 676 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
677 pinctrl-names = "default";
621 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 678 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
622 dma-names = "rxtx"; 679 dma-names = "rxtx";
623 #address-cells = <1>; 680 #address-cells = <1>;
@@ -629,6 +686,7 @@
629 compatible = "atmel,hsmci"; 686 compatible = "atmel,hsmci";
630 reg = <0xfffd0000 0x600>; 687 reg = <0xfffd0000 0x600>;
631 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; 688 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
689 pinctrl-names = "default";
632 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; 690 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
633 dma-names = "rxtx"; 691 dma-names = "rxtx";
634 #address-cells = <1>; 692 #address-cells = <1>;
@@ -727,6 +785,15 @@
727 }; 785 };
728 }; 786 };
729 787
788 fb0: fb@0x00500000 {
789 compatible = "atmel,at91sam9g45-lcdc";
790 reg = <0x00500000 0x1000>;
791 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_fb>;
794 status = "disabled";
795 };
796
730 nand0: nand@40000000 { 797 nand0: nand@40000000 {
731 compatible = "atmel,at91rm9200-nand"; 798 compatible = "atmel,at91rm9200-nand";
732 #address-cells = <1>; 799 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index a4b00e5c61c0..7b76dbde8c41 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -123,6 +123,35 @@
123 }; 123 };
124 }; 124 };
125 125
126 fb0: fb@0x00500000 {
127 display = <&display0>;
128 status = "okay";
129
130 display0: display {
131 bits-per-pixel = <32>;
132 atmel,lcdcon-backlight;
133 atmel,dmacon = <0x1>;
134 atmel,lcdcon2 = <0x80008002>;
135 atmel,guard-time = <9>;
136 atmel,lcd-wiring-mode = "RGB";
137
138 display-timings {
139 native-mode = <&timing0>;
140 timing0: timing0 {
141 clock-frequency = <9000000>;
142 hactive = <480>;
143 vactive = <272>;
144 hback-porch = <1>;
145 hfront-porch = <1>;
146 vback-porch = <40>;
147 vfront-porch = <1>;
148 hsync-len = <45>;
149 vsync-len = <1>;
150 };
151 };
152 };
153 };
154
126 nand0: nand@40000000 { 155 nand0: nand@40000000 {
127 nand-bus-width = <8>; 156 nand-bus-width = <8>;
128 nand-ecc-mode = "soft"; 157 nand-ecc-mode = "soft";
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 5cdaba4cea86..070c5c3a2291 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -13,6 +13,7 @@
13#include <dt-bindings/pinctrl/at91.h> 13#include <dt-bindings/pinctrl/at91.h>
14#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/clk/at91.h>
16 17
17/ { 18/ {
18 model = "Atmel SAMA5D3 family SoC"; 19 model = "Atmel SAMA5D3 family SoC";
@@ -56,6 +57,14 @@
56 reg = <0x20000000 0x8000000>; 57 reg = <0x20000000 0x8000000>;
57 }; 58 };
58 59
60 clocks {
61 adc_op_clk: adc_op_clk{
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <20000000>;
65 };
66 };
67
59 ahb { 68 ahb {
60 compatible = "simple-bus"; 69 compatible = "simple-bus";
61 #address-cells = <1>; 70 #address-cells = <1>;
@@ -79,6 +88,8 @@
79 status = "disabled"; 88 status = "disabled";
80 #address-cells = <1>; 89 #address-cells = <1>;
81 #size-cells = <0>; 90 #size-cells = <0>;
91 clocks = <&mci0_clk>;
92 clock-names = "mci_clk";
82 }; 93 };
83 94
84 spi0: spi@f0004000 { 95 spi0: spi@f0004000 {
@@ -92,6 +103,8 @@
92 dma-names = "tx", "rx"; 103 dma-names = "tx", "rx";
93 pinctrl-names = "default"; 104 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_spi0>; 105 pinctrl-0 = <&pinctrl_spi0>;
106 clocks = <&spi0_clk>;
107 clock-names = "spi_clk";
95 status = "disabled"; 108 status = "disabled";
96 }; 109 };
97 110
@@ -101,6 +114,8 @@
101 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; 114 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
102 pinctrl-names = "default"; 115 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 116 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
117 clocks = <&ssc0_clk>;
118 clock-names = "pclk";
104 status = "disabled"; 119 status = "disabled";
105 }; 120 };
106 121
@@ -108,6 +123,8 @@
108 compatible = "atmel,at91sam9x5-tcb"; 123 compatible = "atmel,at91sam9x5-tcb";
109 reg = <0xf0010000 0x100>; 124 reg = <0xf0010000 0x100>;
110 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 125 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
126 clocks = <&tcb0_clk>;
127 clock-names = "t0_clk";
111 }; 128 };
112 129
113 i2c0: i2c@f0014000 { 130 i2c0: i2c@f0014000 {
@@ -121,6 +138,7 @@
121 pinctrl-0 = <&pinctrl_i2c0>; 138 pinctrl-0 = <&pinctrl_i2c0>;
122 #address-cells = <1>; 139 #address-cells = <1>;
123 #size-cells = <0>; 140 #size-cells = <0>;
141 clocks = <&twi0_clk>;
124 status = "disabled"; 142 status = "disabled";
125 }; 143 };
126 144
@@ -135,6 +153,7 @@
135 pinctrl-0 = <&pinctrl_i2c1>; 153 pinctrl-0 = <&pinctrl_i2c1>;
136 #address-cells = <1>; 154 #address-cells = <1>;
137 #size-cells = <0>; 155 #size-cells = <0>;
156 clocks = <&twi1_clk>;
138 status = "disabled"; 157 status = "disabled";
139 }; 158 };
140 159
@@ -144,6 +163,8 @@
144 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 163 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
145 pinctrl-names = "default"; 164 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_usart0>; 165 pinctrl-0 = <&pinctrl_usart0>;
166 clocks = <&usart0_clk>;
167 clock-names = "usart";
147 status = "disabled"; 168 status = "disabled";
148 }; 169 };
149 170
@@ -153,6 +174,8 @@
153 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; 174 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
154 pinctrl-names = "default"; 175 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_usart1>; 176 pinctrl-0 = <&pinctrl_usart1>;
177 clocks = <&usart1_clk>;
178 clock-names = "usart";
156 status = "disabled"; 179 status = "disabled";
157 }; 180 };
158 181
@@ -174,6 +197,8 @@
174 status = "disabled"; 197 status = "disabled";
175 #address-cells = <1>; 198 #address-cells = <1>;
176 #size-cells = <0>; 199 #size-cells = <0>;
200 clocks = <&mci1_clk>;
201 clock-names = "mci_clk";
177 }; 202 };
178 203
179 spi1: spi@f8008000 { 204 spi1: spi@f8008000 {
@@ -187,6 +212,8 @@
187 dma-names = "tx", "rx"; 212 dma-names = "tx", "rx";
188 pinctrl-names = "default"; 213 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_spi1>; 214 pinctrl-0 = <&pinctrl_spi1>;
215 clocks = <&spi1_clk>;
216 clock-names = "spi_clk";
190 status = "disabled"; 217 status = "disabled";
191 }; 218 };
192 219
@@ -196,6 +223,8 @@
196 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; 223 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
197 pinctrl-names = "default"; 224 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 225 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
226 clocks = <&ssc1_clk>;
227 clock-names = "pclk";
199 status = "disabled"; 228 status = "disabled";
200 }; 229 };
201 230
@@ -219,6 +248,9 @@
219 &pinctrl_adc0_ad10 248 &pinctrl_adc0_ad10
220 &pinctrl_adc0_ad11 249 &pinctrl_adc0_ad11
221 >; 250 >;
251 clocks = <&adc_clk>,
252 <&adc_op_clk>;
253 clock-names = "adc_clk", "adc_op_clk";
222 atmel,adc-channel-base = <0x50>; 254 atmel,adc-channel-base = <0x50>;
223 atmel,adc-channels-used = <0xfff>; 255 atmel,adc-channels-used = <0xfff>;
224 atmel,adc-drdy-mask = <0x1000000>; 256 atmel,adc-drdy-mask = <0x1000000>;
@@ -272,8 +304,11 @@
272 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, 304 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
273 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; 305 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
274 dma-names = "tx", "rx"; 306 dma-names = "tx", "rx";
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_i2c2>;
275 #address-cells = <1>; 309 #address-cells = <1>;
276 #size-cells = <0>; 310 #size-cells = <0>;
311 clocks = <&twi2_clk>;
277 status = "disabled"; 312 status = "disabled";
278 }; 313 };
279 314
@@ -283,6 +318,8 @@
283 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 318 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
284 pinctrl-names = "default"; 319 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_usart2>; 320 pinctrl-0 = <&pinctrl_usart2>;
321 clocks = <&usart2_clk>;
322 clock-names = "usart";
286 status = "disabled"; 323 status = "disabled";
287 }; 324 };
288 325
@@ -292,25 +329,35 @@
292 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 329 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
293 pinctrl-names = "default"; 330 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_usart3>; 331 pinctrl-0 = <&pinctrl_usart3>;
332 clocks = <&usart3_clk>;
333 clock-names = "usart";
295 status = "disabled"; 334 status = "disabled";
296 }; 335 };
297 336
298 sha@f8034000 { 337 sha@f8034000 {
299 compatible = "atmel,sam9g46-sha"; 338 compatible = "atmel,at91sam9g46-sha";
300 reg = <0xf8034000 0x100>; 339 reg = <0xf8034000 0x100>;
301 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 340 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
341 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
342 dma-names = "tx";
302 }; 343 };
303 344
304 aes@f8038000 { 345 aes@f8038000 {
305 compatible = "atmel,sam9g46-aes"; 346 compatible = "atmel,at91sam9g46-aes";
306 reg = <0xf8038000 0x100>; 347 reg = <0xf8038000 0x100>;
307 interrupts = <43 4 0>; 348 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
349 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
350 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
351 dma-names = "tx", "rx";
308 }; 352 };
309 353
310 tdes@f803c000 { 354 tdes@f803c000 {
311 compatible = "atmel,sam9g46-tdes"; 355 compatible = "atmel,at91sam9g46-tdes";
312 reg = <0xf803c000 0x100>; 356 reg = <0xf803c000 0x100>;
313 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; 357 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
358 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
359 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
360 dma-names = "tx", "rx";
314 }; 361 };
315 362
316 dma0: dma-controller@ffffe600 { 363 dma0: dma-controller@ffffe600 {
@@ -318,6 +365,8 @@
318 reg = <0xffffe600 0x200>; 365 reg = <0xffffe600 0x200>;
319 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; 366 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
320 #dma-cells = <2>; 367 #dma-cells = <2>;
368 clocks = <&dma0_clk>;
369 clock-names = "dma_clk";
321 }; 370 };
322 371
323 dma1: dma-controller@ffffe800 { 372 dma1: dma-controller@ffffe800 {
@@ -325,6 +374,8 @@
325 reg = <0xffffe800 0x200>; 374 reg = <0xffffe800 0x200>;
326 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; 375 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
327 #dma-cells = <2>; 376 #dma-cells = <2>;
377 clocks = <&dma1_clk>;
378 clock-names = "dma_clk";
328 }; 379 };
329 380
330 ramc0: ramc@ffffea00 { 381 ramc0: ramc@ffffea00 {
@@ -338,6 +389,8 @@
338 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 389 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
339 pinctrl-names = "default"; 390 pinctrl-names = "default";
340 pinctrl-0 = <&pinctrl_dbgu>; 391 pinctrl-0 = <&pinctrl_dbgu>;
392 clocks = <&dbgu_clk>;
393 clock-names = "usart";
341 status = "disabled"; 394 status = "disabled";
342 }; 395 };
343 396
@@ -443,6 +496,14 @@
443 }; 496 };
444 }; 497 };
445 498
499 i2c2 {
500 pinctrl_i2c2: i2c2-0 {
501 atmel,pins =
502 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
503 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
504 };
505 };
506
446 isi { 507 isi {
447 pinctrl_isi: isi-0 { 508 pinctrl_isi: isi-0 {
448 atmel,pins = 509 atmel,pins =
@@ -626,6 +687,7 @@
626 gpio-controller; 687 gpio-controller;
627 interrupt-controller; 688 interrupt-controller;
628 #interrupt-cells = <2>; 689 #interrupt-cells = <2>;
690 clocks = <&pioA_clk>;
629 }; 691 };
630 692
631 pioB: gpio@fffff400 { 693 pioB: gpio@fffff400 {
@@ -636,6 +698,7 @@
636 gpio-controller; 698 gpio-controller;
637 interrupt-controller; 699 interrupt-controller;
638 #interrupt-cells = <2>; 700 #interrupt-cells = <2>;
701 clocks = <&pioB_clk>;
639 }; 702 };
640 703
641 pioC: gpio@fffff600 { 704 pioC: gpio@fffff600 {
@@ -646,6 +709,7 @@
646 gpio-controller; 709 gpio-controller;
647 interrupt-controller; 710 interrupt-controller;
648 #interrupt-cells = <2>; 711 #interrupt-cells = <2>;
712 clocks = <&pioC_clk>;
649 }; 713 };
650 714
651 pioD: gpio@fffff800 { 715 pioD: gpio@fffff800 {
@@ -656,6 +720,7 @@
656 gpio-controller; 720 gpio-controller;
657 interrupt-controller; 721 interrupt-controller;
658 #interrupt-cells = <2>; 722 #interrupt-cells = <2>;
723 clocks = <&pioD_clk>;
659 }; 724 };
660 725
661 pioE: gpio@fffffa00 { 726 pioE: gpio@fffffa00 {
@@ -666,12 +731,334 @@
666 gpio-controller; 731 gpio-controller;
667 interrupt-controller; 732 interrupt-controller;
668 #interrupt-cells = <2>; 733 #interrupt-cells = <2>;
734 clocks = <&pioE_clk>;
669 }; 735 };
670 }; 736 };
671 737
672 pmc: pmc@fffffc00 { 738 pmc: pmc@fffffc00 {
673 compatible = "atmel,at91rm9200-pmc"; 739 compatible = "atmel,sama5d3-pmc";
674 reg = <0xfffffc00 0x120>; 740 reg = <0xfffffc00 0x120>;
741 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
742 interrupt-controller;
743 #address-cells = <1>;
744 #size-cells = <0>;
745 #interrupt-cells = <1>;
746
747 clk32k: slck {
748 compatible = "fixed-clock";
749 #clock-cells = <0>;
750 clock-frequency = <32768>;
751 };
752
753 main: mainck {
754 compatible = "atmel,at91rm9200-clk-main";
755 #clock-cells = <0>;
756 interrupt-parent = <&pmc>;
757 interrupts = <AT91_PMC_MOSCS>;
758 clocks = <&clk32k>;
759 };
760
761 plla: pllack {
762 compatible = "atmel,sama5d3-clk-pll";
763 #clock-cells = <0>;
764 interrupt-parent = <&pmc>;
765 interrupts = <AT91_PMC_LOCKA>;
766 clocks = <&main>;
767 reg = <0>;
768 atmel,clk-input-range = <8000000 50000000>;
769 #atmel,pll-clk-output-range-cells = <4>;
770 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
771 };
772
773 plladiv: plladivck {
774 compatible = "atmel,at91sam9x5-clk-plldiv";
775 #clock-cells = <0>;
776 clocks = <&plla>;
777 };
778
779 utmi: utmick {
780 compatible = "atmel,at91sam9x5-clk-utmi";
781 #clock-cells = <0>;
782 interrupt-parent = <&pmc>;
783 interrupts = <AT91_PMC_LOCKU>;
784 clocks = <&main>;
785 };
786
787 mck: masterck {
788 compatible = "atmel,at91sam9x5-clk-master";
789 #clock-cells = <0>;
790 interrupt-parent = <&pmc>;
791 interrupts = <AT91_PMC_MCKRDY>;
792 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
793 atmel,clk-output-range = <0 166000000>;
794 atmel,clk-divisors = <1 2 4 3>;
795 };
796
797 usb: usbck {
798 compatible = "atmel,at91sam9x5-clk-usb";
799 #clock-cells = <0>;
800 clocks = <&plladiv>, <&utmi>;
801 };
802
803 prog: progck {
804 compatible = "atmel,at91sam9x5-clk-programmable";
805 #address-cells = <1>;
806 #size-cells = <0>;
807 interrupt-parent = <&pmc>;
808 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
809
810 prog0: prog0 {
811 #clock-cells = <0>;
812 reg = <0>;
813 interrupts = <AT91_PMC_PCKRDY(0)>;
814 };
815
816 prog1: prog1 {
817 #clock-cells = <0>;
818 reg = <1>;
819 interrupts = <AT91_PMC_PCKRDY(1)>;
820 };
821
822 prog2: prog2 {
823 #clock-cells = <0>;
824 reg = <2>;
825 interrupts = <AT91_PMC_PCKRDY(2)>;
826 };
827 };
828
829 smd: smdclk {
830 compatible = "atmel,at91sam9x5-clk-smd";
831 #clock-cells = <0>;
832 clocks = <&plladiv>, <&utmi>;
833 };
834
835 systemck {
836 compatible = "atmel,at91rm9200-clk-system";
837 #address-cells = <1>;
838 #size-cells = <0>;
839
840 ddrck: ddrck {
841 #clock-cells = <0>;
842 reg = <2>;
843 clocks = <&mck>;
844 };
845
846 smdck: smdck {
847 #clock-cells = <0>;
848 reg = <4>;
849 clocks = <&smd>;
850 };
851
852 uhpck: uhpck {
853 #clock-cells = <0>;
854 reg = <6>;
855 clocks = <&usb>;
856 };
857
858 udpck: udpck {
859 #clock-cells = <0>;
860 reg = <7>;
861 clocks = <&usb>;
862 };
863
864 pck0: pck0 {
865 #clock-cells = <0>;
866 reg = <8>;
867 clocks = <&prog0>;
868 };
869
870 pck1: pck1 {
871 #clock-cells = <0>;
872 reg = <9>;
873 clocks = <&prog1>;
874 };
875
876 pck2: pck2 {
877 #clock-cells = <0>;
878 reg = <10>;
879 clocks = <&prog2>;
880 };
881 };
882
883 periphck {
884 compatible = "atmel,at91sam9x5-clk-peripheral";
885 #address-cells = <1>;
886 #size-cells = <0>;
887 clocks = <&mck>;
888
889 dbgu_clk: dbgu_clk {
890 #clock-cells = <0>;
891 reg = <2>;
892 };
893
894 pioA_clk: pioA_clk {
895 #clock-cells = <0>;
896 reg = <6>;
897 };
898
899 pioB_clk: pioB_clk {
900 #clock-cells = <0>;
901 reg = <7>;
902 };
903
904 pioC_clk: pioC_clk {
905 #clock-cells = <0>;
906 reg = <8>;
907 };
908
909 pioD_clk: pioD_clk {
910 #clock-cells = <0>;
911 reg = <9>;
912 };
913
914 pioE_clk: pioE_clk {
915 #clock-cells = <0>;
916 reg = <10>;
917 };
918
919 usart0_clk: usart0_clk {
920 #clock-cells = <0>;
921 reg = <12>;
922 atmel,clk-output-range = <0 66000000>;
923 };
924
925 usart1_clk: usart1_clk {
926 #clock-cells = <0>;
927 reg = <13>;
928 atmel,clk-output-range = <0 66000000>;
929 };
930
931 usart2_clk: usart2_clk {
932 #clock-cells = <0>;
933 reg = <14>;
934 atmel,clk-output-range = <0 66000000>;
935 };
936
937 usart3_clk: usart3_clk {
938 #clock-cells = <0>;
939 reg = <15>;
940 atmel,clk-output-range = <0 66000000>;
941 };
942
943 twi0_clk: twi0_clk {
944 reg = <18>;
945 #clock-cells = <0>;
946 atmel,clk-output-range = <0 16625000>;
947 };
948
949 twi1_clk: twi1_clk {
950 #clock-cells = <0>;
951 reg = <19>;
952 atmel,clk-output-range = <0 16625000>;
953 };
954
955 twi2_clk: twi2_clk {
956 #clock-cells = <0>;
957 reg = <20>;
958 atmel,clk-output-range = <0 16625000>;
959 };
960
961 mci0_clk: mci0_clk {
962 #clock-cells = <0>;
963 reg = <21>;
964 };
965
966 mci1_clk: mci1_clk {
967 #clock-cells = <0>;
968 reg = <22>;
969 };
970
971 spi0_clk: spi0_clk {
972 #clock-cells = <0>;
973 reg = <24>;
974 atmel,clk-output-range = <0 133000000>;
975 };
976
977 spi1_clk: spi1_clk {
978 #clock-cells = <0>;
979 reg = <25>;
980 atmel,clk-output-range = <0 133000000>;
981 };
982
983 tcb0_clk: tcb0_clk {
984 #clock-cells = <0>;
985 reg = <26>;
986 atmel,clk-output-range = <0 133000000>;
987 };
988
989 pwm_clk: pwm_clk {
990 #clock-cells = <0>;
991 reg = <28>;
992 };
993
994 adc_clk: adc_clk {
995 #clock-cells = <0>;
996 reg = <29>;
997 atmel,clk-output-range = <0 66000000>;
998 };
999
1000 dma0_clk: dma0_clk {
1001 #clock-cells = <0>;
1002 reg = <30>;
1003 };
1004
1005 dma1_clk: dma1_clk {
1006 #clock-cells = <0>;
1007 reg = <31>;
1008 };
1009
1010 uhphs_clk: uhphs_clk {
1011 #clock-cells = <0>;
1012 reg = <32>;
1013 };
1014
1015 udphs_clk: udphs_clk {
1016 #clock-cells = <0>;
1017 reg = <33>;
1018 };
1019
1020 isi_clk: isi_clk {
1021 #clock-cells = <0>;
1022 reg = <37>;
1023 };
1024
1025 ssc0_clk: ssc0_clk {
1026 #clock-cells = <0>;
1027 reg = <38>;
1028 atmel,clk-output-range = <0 66000000>;
1029 };
1030
1031 ssc1_clk: ssc1_clk {
1032 #clock-cells = <0>;
1033 reg = <39>;
1034 atmel,clk-output-range = <0 66000000>;
1035 };
1036
1037 sha_clk: sha_clk {
1038 #clock-cells = <0>;
1039 reg = <42>;
1040 };
1041
1042 aes_clk: aes_clk {
1043 #clock-cells = <0>;
1044 reg = <43>;
1045 };
1046
1047 tdes_clk: tdes_clk {
1048 #clock-cells = <0>;
1049 reg = <44>;
1050 };
1051
1052 trng_clk: trng_clk {
1053 #clock-cells = <0>;
1054 reg = <45>;
1055 };
1056
1057 fuse_clk: fuse_clk {
1058 #clock-cells = <0>;
1059 reg = <48>;
1060 };
1061 };
675 }; 1062 };
676 1063
677 rstc@fffffe00 { 1064 rstc@fffffe00 {
@@ -683,6 +1070,7 @@
683 compatible = "atmel,at91sam9260-pit"; 1070 compatible = "atmel,at91sam9260-pit";
684 reg = <0xfffffe30 0xf>; 1071 reg = <0xfffffe30 0xf>;
685 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 1072 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1073 clocks = <&mck>;
686 }; 1074 };
687 1075
688 watchdog@fffffe40 { 1076 watchdog@fffffe40 {
@@ -705,6 +1093,8 @@
705 reg = <0x00500000 0x100000 1093 reg = <0x00500000 0x100000
706 0xf8030000 0x4000>; 1094 0xf8030000 0x4000>;
707 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; 1095 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1096 clocks = <&udphs_clk>, <&utmi>;
1097 clock-names = "pclk", "hclk";
708 status = "disabled"; 1098 status = "disabled";
709 1099
710 ep0 { 1100 ep0 {
@@ -817,6 +1207,9 @@
817 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1207 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
818 reg = <0x00600000 0x100000>; 1208 reg = <0x00600000 0x100000>;
819 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1209 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1210 clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
1211 <&uhpck>;
1212 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
820 status = "disabled"; 1213 status = "disabled";
821 }; 1214 };
822 1215
@@ -824,6 +1217,8 @@
824 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1217 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
825 reg = <0x00700000 0x100000>; 1218 reg = <0x00700000 0x100000>;
826 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1219 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1220 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1221 clock-names = "usb_clk", "ehci_clk", "uhpck";
827 status = "disabled"; 1222 status = "disabled";
828 }; 1223 };
829 1224
diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi
index 8ed3260cef66..a0775851cce5 100644
--- a/arch/arm/boot/dts/sama5d3_can.dtsi
+++ b/arch/arm/boot/dts/sama5d3_can.dtsi
@@ -32,12 +32,30 @@
32 32
33 }; 33 };
34 34
35 pmc: pmc@fffffc00 {
36 periphck {
37 can0_clk: can0_clk {
38 #clock-cells = <0>;
39 reg = <40>;
40 atmel,clk-output-range = <0 66000000>;
41 };
42
43 can1_clk: can0_clk {
44 #clock-cells = <0>;
45 reg = <41>;
46 atmel,clk-output-range = <0 66000000>;
47 };
48 };
49 };
50
35 can0: can@f000c000 { 51 can0: can@f000c000 {
36 compatible = "atmel,at91sam9x5-can"; 52 compatible = "atmel,at91sam9x5-can";
37 reg = <0xf000c000 0x300>; 53 reg = <0xf000c000 0x300>;
38 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; 54 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
39 pinctrl-names = "default"; 55 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_can0_rx_tx>; 56 pinctrl-0 = <&pinctrl_can0_rx_tx>;
57 clocks = <&can0_clk>;
58 clock-names = "can_clk";
41 status = "disabled"; 59 status = "disabled";
42 }; 60 };
43 61
@@ -47,6 +65,8 @@
47 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; 65 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
48 pinctrl-names = "default"; 66 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_can1_rx_tx>; 67 pinctrl-0 = <&pinctrl_can1_rx_tx>;
68 clocks = <&can1_clk>;
69 clock-names = "can_clk";
50 status = "disabled"; 70 status = "disabled";
51 }; 71 };
52 }; 72 };
diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi
index 4d4f351f1f9f..fe2af9276312 100644
--- a/arch/arm/boot/dts/sama5d3_emac.dtsi
+++ b/arch/arm/boot/dts/sama5d3_emac.dtsi
@@ -31,12 +31,23 @@
31 }; 31 };
32 }; 32 };
33 33
34 pmc: pmc@fffffc00 {
35 periphck {
36 macb1_clk: macb1_clk {
37 #clock-cells = <0>;
38 reg = <35>;
39 };
40 };
41 };
42
34 macb1: ethernet@f802c000 { 43 macb1: ethernet@f802c000 {
35 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 44 compatible = "cdns,at32ap7000-macb", "cdns,macb";
36 reg = <0xf802c000 0x100>; 45 reg = <0xf802c000 0x100>;
37 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; 46 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
38 pinctrl-names = "default"; 47 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_macb1_rmii>; 48 pinctrl-0 = <&pinctrl_macb1_rmii>;
49 clocks = <&macb1_clk>, <&macb1_clk>;
50 clock-names = "hclk", "pclk";
40 status = "disabled"; 51 status = "disabled";
41 }; 52 };
42 }; 53 };
diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi
index 0ba8be30ccd8..a6cb0508762f 100644
--- a/arch/arm/boot/dts/sama5d3_gmac.dtsi
+++ b/arch/arm/boot/dts/sama5d3_gmac.dtsi
@@ -64,12 +64,23 @@
64 }; 64 };
65 }; 65 };
66 66
67 pmc: pmc@fffffc00 {
68 periphck {
69 macb0_clk: macb0_clk {
70 #clock-cells = <0>;
71 reg = <34>;
72 };
73 };
74 };
75
67 macb0: ethernet@f0028000 { 76 macb0: ethernet@f0028000 {
68 compatible = "cdns,pc302-gem", "cdns,gem"; 77 compatible = "cdns,pc302-gem", "cdns,gem";
69 reg = <0xf0028000 0x100>; 78 reg = <0xf0028000 0x100>;
70 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; 79 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
71 pinctrl-names = "default"; 80 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; 81 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
82 clocks = <&macb0_clk>, <&macb0_clk>;
83 clock-names = "hclk", "pclk";
73 status = "disabled"; 84 status = "disabled";
74 }; 85 };
75 }; 86 };
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
index 01f52a79f8ba..85d302701565 100644
--- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -50,6 +50,23 @@
50 }; 50 };
51 }; 51 };
52 }; 52 };
53
54 pmc: pmc@fffffc00 {
55 periphck {
56 lcdc_clk: lcdc_clk {
57 #clock-cells = <0>;
58 reg = <36>;
59 };
60 };
61
62 systemck {
63 lcdck: lcdck {
64 #clock-cells = <0>;
65 reg = <3>;
66 clocks = <&mck>;
67 };
68 };
69 };
53 }; 70 };
54 }; 71 };
55}; 72};
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
index 38e88e39e551..b029fe7ef17a 100644
--- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -9,6 +9,7 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h>
12 13
13/ { 14/ {
14 ahb { 15 ahb {
@@ -30,6 +31,15 @@
30 }; 31 };
31 }; 32 };
32 33
34 pmc: pmc@fffffc00 {
35 periphck {
36 mci2_clk: mci2_clk {
37 #clock-cells = <0>;
38 reg = <23>;
39 };
40 };
41 };
42
33 mmc2: mmc@f8004000 { 43 mmc2: mmc@f8004000 {
34 compatible = "atmel,hsmci"; 44 compatible = "atmel,hsmci";
35 reg = <0xf8004000 0x600>; 45 reg = <0xf8004000 0x600>;
@@ -38,6 +48,8 @@
38 dma-names = "rxtx"; 48 dma-names = "rxtx";
39 pinctrl-names = "default"; 49 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; 50 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
51 clocks = <&mci2_clk>;
52 clock-names = "mci_clk";
41 status = "disabled"; 53 status = "disabled";
42 #address-cells = <1>; 54 #address-cells = <1>;
43 #size-cells = <0>; 55 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
index 5264bb4a6998..382b04431f66 100644
--- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -9,6 +9,7 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h>
12 13
13/ { 14/ {
14 aliases { 15 aliases {
@@ -17,10 +18,21 @@
17 18
18 ahb { 19 ahb {
19 apb { 20 apb {
21 pmc: pmc@fffffc00 {
22 periphck {
23 tcb1_clk: tcb1_clk {
24 #clock-cells = <0>;
25 reg = <27>;
26 };
27 };
28 };
29
20 tcb1: timer@f8014000 { 30 tcb1: timer@f8014000 {
21 compatible = "atmel,at91sam9x5-tcb"; 31 compatible = "atmel,at91sam9x5-tcb";
22 reg = <0xf8014000 0x100>; 32 reg = <0xf8014000 0x100>;
23 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; 33 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
34 clocks = <&tcb1_clk>;
35 clock-names = "t0_clk";
24 }; 36 };
25 }; 37 };
26 }; 38 };
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index 98fcb2d57446..a9fa75e41652 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -9,8 +9,14 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h>
12 13
13/ { 14/ {
15 aliases {
16 serial5 = &uart0;
17 serial6 = &uart1;
18 };
19
14 ahb { 20 ahb {
15 apb { 21 apb {
16 pinctrl@fffff200 { 22 pinctrl@fffff200 {
@@ -31,12 +37,30 @@
31 }; 37 };
32 }; 38 };
33 39
40 pmc: pmc@fffffc00 {
41 periphck {
42 uart0_clk: uart0_clk {
43 #clock-cells = <0>;
44 reg = <16>;
45 atmel,clk-output-range = <0 66000000>;
46 };
47
48 uart1_clk: uart1_clk {
49 #clock-cells = <0>;
50 reg = <17>;
51 atmel,clk-output-range = <0 66000000>;
52 };
53 };
54 };
55
34 uart0: serial@f0024000 { 56 uart0: serial@f0024000 {
35 compatible = "atmel,at91sam9260-usart"; 57 compatible = "atmel,at91sam9260-usart";
36 reg = <0xf0024000 0x200>; 58 reg = <0xf0024000 0x200>;
37 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 59 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
38 pinctrl-names = "default"; 60 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_uart0>; 61 pinctrl-0 = <&pinctrl_uart0>;
62 clocks = <&uart0_clk>;
63 clock-names = "usart";
40 status = "disabled"; 64 status = "disabled";
41 }; 65 };
42 66
@@ -46,6 +70,8 @@
46 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 70 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
47 pinctrl-names = "default"; 71 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_uart1>; 72 pinctrl-0 = <&pinctrl_uart1>;
73 clocks = <&uart1_clk>;
74 clock-names = "usart";
49 status = "disabled"; 75 status = "disabled";
50 }; 76 };
51 }; 77 };
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index 726a0f35100c..f55ed072c8e6 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -18,17 +18,6 @@
18 reg = <0x20000000 0x20000000>; 18 reg = <0x20000000 0x20000000>;
19 }; 19 };
20 20
21 clocks {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
25
26 main_clock: clock@0 {
27 compatible = "atmel,osc", "fixed-clock";
28 clock-frequency = <12000000>;
29 };
30 };
31
32 ahb { 21 ahb {
33 apb { 22 apb {
34 spi0: spi@f0004000 { 23 spi0: spi@f0004000 {
@@ -38,6 +27,12 @@
38 macb0: ethernet@f0028000 { 27 macb0: ethernet@f0028000 {
39 phy-mode = "rgmii"; 28 phy-mode = "rgmii";
40 }; 29 };
30
31 pmc: pmc@fffffc00 {
32 main: mainck {
33 clock-frequency = <12000000>;
34 };
35 };
41 }; 36 };
42 37
43 nand0: nand@60000000 { 38 nand0: nand@60000000 {
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi b/arch/arm/boot/dts/sama5d3xdm.dtsi
index 1c296d6b2f2a..f9bdde542ced 100644
--- a/arch/arm/boot/dts/sama5d3xdm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xdm.dtsi
@@ -18,6 +18,7 @@
18 interrupts = <31 0x0>; 18 interrupts = <31 0x0>;
19 pinctrl-names = "default"; 19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_qt1070_irq>; 20 pinctrl-0 = <&pinctrl_qt1070_irq>;
21 wakeup-source;
21 }; 22 };
22 }; 23 };
23 24
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 15:12:24 -0500