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authorOlof Johansson <olof@lixom.net>2013-04-28 15:03:33 -0400
committerOlof Johansson <olof@lixom.net>2013-04-28 15:03:33 -0400
commit6cae0fafe33254c52f19dbf90854cbf22b82fc96 (patch)
treed8303da2c0885cffecd269643dac6c9917e4d46e /arch/arm/boot
parent4fac6f0e654aeb8ffc9f06285933c7268747bc0d (diff)
parent58a7bbf75442ea439a4d3b7993ad87023e406063 (diff)
Merge branch 'exynos/dt' into late/dt
* exynos/dt: (125 commits) ARM: dts: add PDMA0 changes for exynos5440 ARM: dts: Add cpufreq controller node for Exynos5440 SoC ARM: dts: Fix gmac clock ids due to changes in Exynos5440 ARM: dts: add device tree file for SD5v1 board ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440 ARM: dts: add PMU support in exynos5440 ARM: dts: Add node for GMAC for exynos5440 ARM: dts: list the interrupts generated by pin-controller on Exynos5440 ARM: dts: Add FIMD DT binding Documentation ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dts ARM: dts: Add FIMD node to exynos4 ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series ARM: dts: Add display timing node to exynos5250-smdk5250.dts ARM: dts: Add FIMD node to exynos5 ARM: dts: Add virtual GIC DT bindings for exynos5440 ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindings ARM: dts: add usb 2.0 clock references to exynos5250 device tree ARM: dts: Add architected timer nodes for exynos5250 ARM: dts: Declare the gic as a15 compatible for exynos5250 ARM: dts: Add HDMI HPD and regulator node for Arndale board ...
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/Makefile4
-rw-r--r--arch/arm/boot/dts/cros5250-common.dtsi189
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi85
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts22
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts75
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts12
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi37
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi22
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidx.dts109
-rw-r--r--arch/arm/boot/dts/exynos4412-origen.dts451
-rw-r--r--arch/arm/boot/dts/exynos4412-smdk4412.dts33
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi26
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi13
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts452
-rw-r--r--arch/arm/boot/dts/exynos5250-pinctrl.dtsi783
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts69
-rw-r--r--arch/arm/boot/dts/exynos5250-snow.dts33
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi483
-rw-r--r--arch/arm/boot/dts/exynos5440-sd5v1.dts39
-rw-r--r--arch/arm/boot/dts/exynos5440-ssdk5440.dts25
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi115
21 files changed, 2686 insertions, 391 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9c6255884cbb..11fef62e237b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -42,7 +42,11 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
42dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ 42dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
43 exynos4210-smdkv310.dtb \ 43 exynos4210-smdkv310.dtb \
44 exynos4210-trats.dtb \ 44 exynos4210-trats.dtb \
45 exynos4412-odroidx.dtb \
45 exynos4412-smdk4412.dtb \ 46 exynos4412-smdk4412.dtb \
47 exynos4412-origen.dtb \
48 exynos5250-arndale.dtb \
49 exynos5440-sd5v1.dtb \
46 exynos5250-smdk5250.dtb \ 50 exynos5250-smdk5250.dtb \
47 exynos5250-snow.dtb \ 51 exynos5250-snow.dtb \
48 exynos5440-ssdk5440.dtb 52 exynos5440-ssdk5440.dtb
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
index 46c098017036..8a5b3a6cdc58 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -19,31 +19,168 @@
19 chosen { 19 chosen {
20 }; 20 };
21 21
22 pinctrl@11400000 {
23 /*
24 * Disabled pullups since external part has its own pullups and
25 * double-pulling gets us out of spec in some cases.
26 */
27 i2c2_bus: i2c2-bus {
28 samsung,pin-pud = <0>;
29 };
30 };
31
22 i2c@12C60000 { 32 i2c@12C60000 {
23 samsung,i2c-sda-delay = <100>; 33 samsung,i2c-sda-delay = <100>;
24 samsung,i2c-max-bus-freq = <378000>; 34 samsung,i2c-max-bus-freq = <378000>;
25 gpios = <&gpb3 0 2 3 0>, 35
26 <&gpb3 1 2 3 0>; 36 max77686@09 {
37 compatible = "maxim,max77686";
38 reg = <0x09>;
39
40 voltage-regulators {
41 ldo1_reg: LDO1 {
42 regulator-name = "P1.0V_LDO_OUT1";
43 regulator-min-microvolt = <1000000>;
44 regulator-max-microvolt = <1000000>;
45 regulator-always-on;
46 };
47
48 ldo2_reg: LDO2 {
49 regulator-name = "P1.8V_LDO_OUT2";
50 regulator-min-microvolt = <1800000>;
51 regulator-max-microvolt = <1800000>;
52 regulator-always-on;
53 };
54
55 ldo3_reg: LDO3 {
56 regulator-name = "P1.8V_LDO_OUT3";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <1800000>;
59 regulator-always-on;
60 };
61
62 ldo7_reg: LDO7 {
63 regulator-name = "P1.1V_LDO_OUT7";
64 regulator-min-microvolt = <1100000>;
65 regulator-max-microvolt = <1100000>;
66 regulator-always-on;
67 };
68
69 ldo8_reg: LDO8 {
70 regulator-name = "P1.0V_LDO_OUT8";
71 regulator-min-microvolt = <1000000>;
72 regulator-max-microvolt = <1000000>;
73 regulator-always-on;
74 };
75
76 ldo10_reg: LDO10 {
77 regulator-name = "P1.8V_LDO_OUT10";
78 regulator-min-microvolt = <1800000>;
79 regulator-max-microvolt = <1800000>;
80 regulator-always-on;
81 };
82
83 ldo12_reg: LDO12 {
84 regulator-name = "P3.0V_LDO_OUT12";
85 regulator-min-microvolt = <3000000>;
86 regulator-max-microvolt = <3000000>;
87 regulator-always-on;
88 };
89
90 ldo14_reg: LDO14 {
91 regulator-name = "P1.8V_LDO_OUT14";
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 regulator-always-on;
95 };
96
97 ldo15_reg: LDO15 {
98 regulator-name = "P1.0V_LDO_OUT15";
99 regulator-min-microvolt = <1000000>;
100 regulator-max-microvolt = <1000000>;
101 regulator-always-on;
102 };
103
104 ldo16_reg: LDO16 {
105 regulator-name = "P1.8V_LDO_OUT16";
106 regulator-min-microvolt = <1800000>;
107 regulator-max-microvolt = <1800000>;
108 regulator-always-on;
109 };
110
111 buck1_reg: BUCK1 {
112 regulator-name = "vdd_mif";
113 regulator-min-microvolt = <950000>;
114 regulator-max-microvolt = <1300000>;
115 regulator-always-on;
116 regulator-boot-on;
117 };
118
119 buck2_reg: BUCK2 {
120 regulator-name = "vdd_arm";
121 regulator-min-microvolt = <850000>;
122 regulator-max-microvolt = <1350000>;
123 regulator-always-on;
124 regulator-boot-on;
125 };
126
127 buck3_reg: BUCK3 {
128 regulator-name = "vdd_int";
129 regulator-min-microvolt = <900000>;
130 regulator-max-microvolt = <1200000>;
131 regulator-always-on;
132 regulator-boot-on;
133 };
134
135 buck4_reg: BUCK4 {
136 regulator-name = "vdd_g3d";
137 regulator-min-microvolt = <850000>;
138 regulator-max-microvolt = <1300000>;
139 regulator-always-on;
140 regulator-boot-on;
141 };
142
143 buck5_reg: BUCK5 {
144 regulator-name = "P1.8V_BUCK_OUT5";
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1800000>;
147 regulator-always-on;
148 regulator-boot-on;
149 };
150
151 buck6_reg: BUCK6 {
152 regulator-name = "P1.35V_BUCK_OUT6";
153 regulator-min-microvolt = <1350000>;
154 regulator-max-microvolt = <1350000>;
155 regulator-always-on;
156 };
157
158 buck7_reg: BUCK7 {
159 regulator-name = "P2.0V_BUCK_OUT7";
160 regulator-min-microvolt = <2000000>;
161 regulator-max-microvolt = <2000000>;
162 regulator-always-on;
163 };
164
165 buck8_reg: BUCK8 {
166 regulator-name = "P2.85V_BUCK_OUT8";
167 regulator-min-microvolt = <2850000>;
168 regulator-max-microvolt = <2850000>;
169 regulator-always-on;
170 };
171 };
172 };
27 }; 173 };
28 174
29 i2c@12C70000 { 175 i2c@12C70000 {
30 samsung,i2c-sda-delay = <100>; 176 samsung,i2c-sda-delay = <100>;
31 samsung,i2c-max-bus-freq = <378000>; 177 samsung,i2c-max-bus-freq = <378000>;
32 gpios = <&gpb3 2 2 3 0>,
33 <&gpb3 3 2 3 0>;
34 }; 178 };
35 179
36 i2c@12C80000 { 180 i2c@12C80000 {
37 samsung,i2c-sda-delay = <100>; 181 samsung,i2c-sda-delay = <100>;
38 samsung,i2c-max-bus-freq = <66000>; 182 samsung,i2c-max-bus-freq = <66000>;
39 183
40 /*
41 * Disabled pullups since external part has its own pullups and
42 * double-pulling gets us out of spec in some cases.
43 */
44 gpios = <&gpa0 6 3 0 0>,
45 <&gpa0 7 3 0 0>;
46
47 hdmiddc@50 { 184 hdmiddc@50 {
48 compatible = "samsung,exynos5-hdmiddc"; 185 compatible = "samsung,exynos5-hdmiddc";
49 reg = <0x50>; 186 reg = <0x50>;
@@ -53,8 +190,6 @@
53 i2c@12C90000 { 190 i2c@12C90000 {
54 samsung,i2c-sda-delay = <100>; 191 samsung,i2c-sda-delay = <100>;
55 samsung,i2c-max-bus-freq = <66000>; 192 samsung,i2c-max-bus-freq = <66000>;
56 gpios = <&gpa1 2 3 3 0>,
57 <&gpa1 3 3 3 0>;
58 }; 193 };
59 194
60 i2c@12CA0000 { 195 i2c@12CA0000 {
@@ -64,8 +199,6 @@
64 i2c@12CB0000 { 199 i2c@12CB0000 {
65 samsung,i2c-sda-delay = <100>; 200 samsung,i2c-sda-delay = <100>;
66 samsung,i2c-max-bus-freq = <66000>; 201 samsung,i2c-max-bus-freq = <66000>;
67 gpios = <&gpa2 2 3 3 0>,
68 <&gpa2 3 3 3 0>;
69 }; 202 };
70 203
71 i2c@12CC0000 { 204 i2c@12CC0000 {
@@ -75,8 +208,6 @@
75 i2c@12CD0000 { 208 i2c@12CD0000 {
76 samsung,i2c-sda-delay = <100>; 209 samsung,i2c-sda-delay = <100>;
77 samsung,i2c-max-bus-freq = <66000>; 210 samsung,i2c-max-bus-freq = <66000>;
78 gpios = <&gpb2 2 3 3 0>,
79 <&gpb2 3 3 3 0>;
80 }; 211 };
81 212
82 i2c@12CE0000 { 213 i2c@12CE0000 {
@@ -98,15 +229,12 @@
98 samsung,dw-mshc-ciu-div = <3>; 229 samsung,dw-mshc-ciu-div = <3>;
99 samsung,dw-mshc-sdr-timing = <2 3>; 230 samsung,dw-mshc-sdr-timing = <2 3>;
100 samsung,dw-mshc-ddr-timing = <1 2>; 231 samsung,dw-mshc-ddr-timing = <1 2>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
101 234
102 slot@0 { 235 slot@0 {
103 reg = <0>; 236 reg = <0>;
104 bus-width = <8>; 237 bus-width = <8>;
105 gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
106 <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
107 <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
108 <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
109 <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
110 }; 238 };
111 }; 239 };
112 240
@@ -122,15 +250,13 @@
122 samsung,dw-mshc-ciu-div = <3>; 250 samsung,dw-mshc-ciu-div = <3>;
123 samsung,dw-mshc-sdr-timing = <2 3>; 251 samsung,dw-mshc-sdr-timing = <2 3>;
124 samsung,dw-mshc-ddr-timing = <1 2>; 252 samsung,dw-mshc-ddr-timing = <1 2>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
125 255
126 slot@0 { 256 slot@0 {
127 reg = <0>; 257 reg = <0>;
128 bus-width = <4>; 258 bus-width = <4>;
129 samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>; 259 wp-gpios = <&gpc2 1 0>;
130 wp-gpios = <&gpc2 1 0 0 3>;
131 gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
132 <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
133 <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
134 }; 260 };
135 }; 261 };
136 262
@@ -143,11 +269,11 @@
143 samsung,dw-mshc-ciu-div = <3>; 269 samsung,dw-mshc-ciu-div = <3>;
144 samsung,dw-mshc-sdr-timing = <2 3>; 270 samsung,dw-mshc-sdr-timing = <2 3>;
145 samsung,dw-mshc-ddr-timing = <1 2>; 271 samsung,dw-mshc-ddr-timing = <1 2>;
272 /* See board-specific dts files for pin setup */
146 273
147 slot@0 { 274 slot@0 {
148 reg = <0>; 275 reg = <0>;
149 bus-width = <4>; 276 bus-width = <4>;
150 /* See board-specific dts files for GPIOs */
151 }; 277 };
152 }; 278 };
153 279
@@ -156,9 +282,6 @@
156 }; 282 };
157 283
158 spi_1: spi@12d30000 { 284 spi_1: spi@12d30000 {
159 gpios = <&gpa2 4 2 3 0>,
160 <&gpa2 6 2 3 0>,
161 <&gpa2 7 2 3 0>;
162 samsung,spi-src-clk = <0>; 285 samsung,spi-src-clk = <0>;
163 num-cs = <1>; 286 num-cs = <1>;
164 }; 287 };
@@ -168,7 +291,7 @@
168 }; 291 };
169 292
170 hdmi { 293 hdmi {
171 hpd-gpio = <&gpx3 7 0xf 1 3>; 294 hpd-gpio = <&gpx3 7 0>;
172 }; 295 };
173 296
174 gpio-keys { 297 gpio-keys {
@@ -176,7 +299,7 @@
176 299
177 power { 300 power {
178 label = "Power"; 301 label = "Power";
179 gpios = <&gpx1 3 0 0x10000 0>; 302 gpios = <&gpx1 3 1>;
180 linux,code = <116>; /* KEY_POWER */ 303 linux,code = <116>; /* KEY_POWER */
181 gpio-key,wakeup; 304 gpio-key,wakeup;
182 }; 305 };
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 1a62bcf18aa3..b8771c5cb2a3 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -82,10 +82,17 @@
82 reg = <0x10440000 0x1000>; 82 reg = <0x10440000 0x1000>;
83 }; 83 };
84 84
85 sys_reg: sysreg {
86 compatible = "samsung,exynos4-sysreg", "syscon";
87 reg = <0x10010000 0x400>;
88 };
89
85 watchdog@10060000 { 90 watchdog@10060000 {
86 compatible = "samsung,s3c2410-wdt"; 91 compatible = "samsung,s3c2410-wdt";
87 reg = <0x10060000 0x100>; 92 reg = <0x10060000 0x100>;
88 interrupts = <0 43 0>; 93 interrupts = <0 43 0>;
94 clocks = <&clock 345>;
95 clock-names = "watchdog";
89 status = "disabled"; 96 status = "disabled";
90 }; 97 };
91 98
@@ -93,6 +100,8 @@
93 compatible = "samsung,s3c6410-rtc"; 100 compatible = "samsung,s3c6410-rtc";
94 reg = <0x10070000 0x100>; 101 reg = <0x10070000 0x100>;
95 interrupts = <0 44 0>, <0 45 0>; 102 interrupts = <0 44 0>, <0 45 0>;
103 clocks = <&clock 346>;
104 clock-names = "rtc";
96 status = "disabled"; 105 status = "disabled";
97 }; 106 };
98 107
@@ -100,6 +109,8 @@
100 compatible = "samsung,s5pv210-keypad"; 109 compatible = "samsung,s5pv210-keypad";
101 reg = <0x100A0000 0x100>; 110 reg = <0x100A0000 0x100>;
102 interrupts = <0 109 0>; 111 interrupts = <0 109 0>;
112 clocks = <&clock 347>;
113 clock-names = "keypad";
103 status = "disabled"; 114 status = "disabled";
104 }; 115 };
105 116
@@ -107,6 +118,8 @@
107 compatible = "samsung,exynos4210-sdhci"; 118 compatible = "samsung,exynos4210-sdhci";
108 reg = <0x12510000 0x100>; 119 reg = <0x12510000 0x100>;
109 interrupts = <0 73 0>; 120 interrupts = <0 73 0>;
121 clocks = <&clock 297>, <&clock 145>;
122 clock-names = "hsmmc", "mmc_busclk.2";
110 status = "disabled"; 123 status = "disabled";
111 }; 124 };
112 125
@@ -114,6 +127,8 @@
114 compatible = "samsung,exynos4210-sdhci"; 127 compatible = "samsung,exynos4210-sdhci";
115 reg = <0x12520000 0x100>; 128 reg = <0x12520000 0x100>;
116 interrupts = <0 74 0>; 129 interrupts = <0 74 0>;
130 clocks = <&clock 298>, <&clock 146>;
131 clock-names = "hsmmc", "mmc_busclk.2";
117 status = "disabled"; 132 status = "disabled";
118 }; 133 };
119 134
@@ -121,6 +136,8 @@
121 compatible = "samsung,exynos4210-sdhci"; 136 compatible = "samsung,exynos4210-sdhci";
122 reg = <0x12530000 0x100>; 137 reg = <0x12530000 0x100>;
123 interrupts = <0 75 0>; 138 interrupts = <0 75 0>;
139 clocks = <&clock 299>, <&clock 147>;
140 clock-names = "hsmmc", "mmc_busclk.2";
124 status = "disabled"; 141 status = "disabled";
125 }; 142 };
126 143
@@ -128,6 +145,16 @@
128 compatible = "samsung,exynos4210-sdhci"; 145 compatible = "samsung,exynos4210-sdhci";
129 reg = <0x12540000 0x100>; 146 reg = <0x12540000 0x100>;
130 interrupts = <0 76 0>; 147 interrupts = <0 76 0>;
148 clocks = <&clock 300>, <&clock 148>;
149 clock-names = "hsmmc", "mmc_busclk.2";
150 status = "disabled";
151 };
152
153 mfc: codec@13400000 {
154 compatible = "samsung,mfc-v5";
155 reg = <0x13400000 0x10000>;
156 interrupts = <0 94 0>;
157 samsung,power-domain = <&pd_mfc>;
131 status = "disabled"; 158 status = "disabled";
132 }; 159 };
133 160
@@ -135,6 +162,8 @@
135 compatible = "samsung,exynos4210-uart"; 162 compatible = "samsung,exynos4210-uart";
136 reg = <0x13800000 0x100>; 163 reg = <0x13800000 0x100>;
137 interrupts = <0 52 0>; 164 interrupts = <0 52 0>;
165 clocks = <&clock 312>, <&clock 151>;
166 clock-names = "uart", "clk_uart_baud0";
138 status = "disabled"; 167 status = "disabled";
139 }; 168 };
140 169
@@ -142,6 +171,8 @@
142 compatible = "samsung,exynos4210-uart"; 171 compatible = "samsung,exynos4210-uart";
143 reg = <0x13810000 0x100>; 172 reg = <0x13810000 0x100>;
144 interrupts = <0 53 0>; 173 interrupts = <0 53 0>;
174 clocks = <&clock 313>, <&clock 152>;
175 clock-names = "uart", "clk_uart_baud0";
145 status = "disabled"; 176 status = "disabled";
146 }; 177 };
147 178
@@ -149,6 +180,8 @@
149 compatible = "samsung,exynos4210-uart"; 180 compatible = "samsung,exynos4210-uart";
150 reg = <0x13820000 0x100>; 181 reg = <0x13820000 0x100>;
151 interrupts = <0 54 0>; 182 interrupts = <0 54 0>;
183 clocks = <&clock 314>, <&clock 153>;
184 clock-names = "uart", "clk_uart_baud0";
152 status = "disabled"; 185 status = "disabled";
153 }; 186 };
154 187
@@ -156,6 +189,8 @@
156 compatible = "samsung,exynos4210-uart"; 189 compatible = "samsung,exynos4210-uart";
157 reg = <0x13830000 0x100>; 190 reg = <0x13830000 0x100>;
158 interrupts = <0 55 0>; 191 interrupts = <0 55 0>;
192 clocks = <&clock 315>, <&clock 154>;
193 clock-names = "uart", "clk_uart_baud0";
159 status = "disabled"; 194 status = "disabled";
160 }; 195 };
161 196
@@ -165,6 +200,10 @@
165 compatible = "samsung,s3c2440-i2c"; 200 compatible = "samsung,s3c2440-i2c";
166 reg = <0x13860000 0x100>; 201 reg = <0x13860000 0x100>;
167 interrupts = <0 58 0>; 202 interrupts = <0 58 0>;
203 clocks = <&clock 317>;
204 clock-names = "i2c";
205 pinctrl-names = "default";
206 pinctrl-0 = <&i2c0_bus>;
168 status = "disabled"; 207 status = "disabled";
169 }; 208 };
170 209
@@ -174,6 +213,10 @@
174 compatible = "samsung,s3c2440-i2c"; 213 compatible = "samsung,s3c2440-i2c";
175 reg = <0x13870000 0x100>; 214 reg = <0x13870000 0x100>;
176 interrupts = <0 59 0>; 215 interrupts = <0 59 0>;
216 clocks = <&clock 318>;
217 clock-names = "i2c";
218 pinctrl-names = "default";
219 pinctrl-0 = <&i2c1_bus>;
177 status = "disabled"; 220 status = "disabled";
178 }; 221 };
179 222
@@ -183,6 +226,8 @@
183 compatible = "samsung,s3c2440-i2c"; 226 compatible = "samsung,s3c2440-i2c";
184 reg = <0x13880000 0x100>; 227 reg = <0x13880000 0x100>;
185 interrupts = <0 60 0>; 228 interrupts = <0 60 0>;
229 clocks = <&clock 319>;
230 clock-names = "i2c";
186 status = "disabled"; 231 status = "disabled";
187 }; 232 };
188 233
@@ -192,6 +237,8 @@
192 compatible = "samsung,s3c2440-i2c"; 237 compatible = "samsung,s3c2440-i2c";
193 reg = <0x13890000 0x100>; 238 reg = <0x13890000 0x100>;
194 interrupts = <0 61 0>; 239 interrupts = <0 61 0>;
240 clocks = <&clock 320>;
241 clock-names = "i2c";
195 status = "disabled"; 242 status = "disabled";
196 }; 243 };
197 244
@@ -201,6 +248,8 @@
201 compatible = "samsung,s3c2440-i2c"; 248 compatible = "samsung,s3c2440-i2c";
202 reg = <0x138A0000 0x100>; 249 reg = <0x138A0000 0x100>;
203 interrupts = <0 62 0>; 250 interrupts = <0 62 0>;
251 clocks = <&clock 321>;
252 clock-names = "i2c";
204 status = "disabled"; 253 status = "disabled";
205 }; 254 };
206 255
@@ -210,6 +259,8 @@
210 compatible = "samsung,s3c2440-i2c"; 259 compatible = "samsung,s3c2440-i2c";
211 reg = <0x138B0000 0x100>; 260 reg = <0x138B0000 0x100>;
212 interrupts = <0 63 0>; 261 interrupts = <0 63 0>;
262 clocks = <&clock 322>;
263 clock-names = "i2c";
213 status = "disabled"; 264 status = "disabled";
214 }; 265 };
215 266
@@ -219,6 +270,8 @@
219 compatible = "samsung,s3c2440-i2c"; 270 compatible = "samsung,s3c2440-i2c";
220 reg = <0x138C0000 0x100>; 271 reg = <0x138C0000 0x100>;
221 interrupts = <0 64 0>; 272 interrupts = <0 64 0>;
273 clocks = <&clock 323>;
274 clock-names = "i2c";
222 status = "disabled"; 275 status = "disabled";
223 }; 276 };
224 277
@@ -228,6 +281,8 @@
228 compatible = "samsung,s3c2440-i2c"; 281 compatible = "samsung,s3c2440-i2c";
229 reg = <0x138D0000 0x100>; 282 reg = <0x138D0000 0x100>;
230 interrupts = <0 65 0>; 283 interrupts = <0 65 0>;
284 clocks = <&clock 324>;
285 clock-names = "i2c";
231 status = "disabled"; 286 status = "disabled";
232 }; 287 };
233 288
@@ -239,6 +294,10 @@
239 rx-dma-channel = <&pdma0 6>; /* preliminary */ 294 rx-dma-channel = <&pdma0 6>; /* preliminary */
240 #address-cells = <1>; 295 #address-cells = <1>;
241 #size-cells = <0>; 296 #size-cells = <0>;
297 clocks = <&clock 327>, <&clock 159>;
298 clock-names = "spi", "spi_busclk0";
299 pinctrl-names = "default";
300 pinctrl-0 = <&spi0_bus>;
242 status = "disabled"; 301 status = "disabled";
243 }; 302 };
244 303
@@ -250,6 +309,10 @@
250 rx-dma-channel = <&pdma1 6>; /* preliminary */ 309 rx-dma-channel = <&pdma1 6>; /* preliminary */
251 #address-cells = <1>; 310 #address-cells = <1>;
252 #size-cells = <0>; 311 #size-cells = <0>;
312 clocks = <&clock 328>, <&clock 160>;
313 clock-names = "spi", "spi_busclk0";
314 pinctrl-names = "default";
315 pinctrl-0 = <&spi1_bus>;
253 status = "disabled"; 316 status = "disabled";
254 }; 317 };
255 318
@@ -261,6 +324,10 @@
261 rx-dma-channel = <&pdma0 8>; /* preliminary */ 324 rx-dma-channel = <&pdma0 8>; /* preliminary */
262 #address-cells = <1>; 325 #address-cells = <1>;
263 #size-cells = <0>; 326 #size-cells = <0>;
327 clocks = <&clock 329>, <&clock 161>;
328 clock-names = "spi", "spi_busclk0";
329 pinctrl-names = "default";
330 pinctrl-0 = <&spi2_bus>;
264 status = "disabled"; 331 status = "disabled";
265 }; 332 };
266 333
@@ -275,6 +342,8 @@
275 compatible = "arm,pl330", "arm,primecell"; 342 compatible = "arm,pl330", "arm,primecell";
276 reg = <0x12680000 0x1000>; 343 reg = <0x12680000 0x1000>;
277 interrupts = <0 35 0>; 344 interrupts = <0 35 0>;
345 clocks = <&clock 292>;
346 clock-names = "apb_pclk";
278 #dma-cells = <1>; 347 #dma-cells = <1>;
279 #dma-channels = <8>; 348 #dma-channels = <8>;
280 #dma-requests = <32>; 349 #dma-requests = <32>;
@@ -284,6 +353,8 @@
284 compatible = "arm,pl330", "arm,primecell"; 353 compatible = "arm,pl330", "arm,primecell";
285 reg = <0x12690000 0x1000>; 354 reg = <0x12690000 0x1000>;
286 interrupts = <0 36 0>; 355 interrupts = <0 36 0>;
356 clocks = <&clock 293>;
357 clock-names = "apb_pclk";
287 #dma-cells = <1>; 358 #dma-cells = <1>;
288 #dma-channels = <8>; 359 #dma-channels = <8>;
289 #dma-requests = <32>; 360 #dma-requests = <32>;
@@ -293,9 +364,23 @@
293 compatible = "arm,pl330", "arm,primecell"; 364 compatible = "arm,pl330", "arm,primecell";
294 reg = <0x12850000 0x1000>; 365 reg = <0x12850000 0x1000>;
295 interrupts = <0 34 0>; 366 interrupts = <0 34 0>;
367 clocks = <&clock 279>;
368 clock-names = "apb_pclk";
296 #dma-cells = <1>; 369 #dma-cells = <1>;
297 #dma-channels = <8>; 370 #dma-channels = <8>;
298 #dma-requests = <1>; 371 #dma-requests = <1>;
299 }; 372 };
300 }; 373 };
374
375 fimd: fimd@11c00000 {
376 compatible = "samsung,exynos4210-fimd";
377 interrupt-parent = <&combiner>;
378 reg = <0x11c00000 0x20000>;
379 interrupt-names = "fifo", "vsync", "lcd_sys";
380 interrupts = <11 0>, <11 1>, <11 2>;
381 clocks = <&clock 140>, <&clock 283>;
382 clock-names = "sclk_fimd", "fimd";
383 samsung,power-domain = <&pd_lcd0>;
384 status = "disabled";
385 };
301}; 386};
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index f2710018e84e..524b90846df5 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -57,6 +57,16 @@
57 status = "okay"; 57 status = "okay";
58 }; 58 };
59 59
60 g2d@12800000 {
61 status = "okay";
62 };
63
64 codec@13400000 {
65 samsung,mfc-r = <0x43000000 0x800000>;
66 samsung,mfc-l = <0x51000000 0x800000>;
67 status = "okay";
68 };
69
60 serial@13800000 { 70 serial@13800000 {
61 status = "okay"; 71 status = "okay";
62 }; 72 };
@@ -121,4 +131,16 @@
121 linux,default-trigger = "heartbeat"; 131 linux,default-trigger = "heartbeat";
122 }; 132 };
123 }; 133 };
134
135 fixed-rate-clocks {
136 xxti {
137 compatible = "samsung,clock-xxti";
138 clock-frequency = <0>;
139 };
140
141 xusbxti {
142 compatible = "samsung,clock-xusbxti";
143 clock-frequency = <24000000>;
144 };
145 };
124}; 146};
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index f63490707f3a..91332b72acf5 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -30,16 +30,19 @@
30 }; 30 };
31 31
32 sdhci@12530000 { 32 sdhci@12530000 {
33 samsung,sdhci-bus-width = <4>; 33 bus-width = <4>;
34 linux,mmc_cap_4_bit_data; 34 pinctrl-names = "default";
35 samsung,sdhci-cd-internal; 35 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
36 gpio-cd = <&gpk2 2 2 3 3>; 36 status = "okay";
37 gpios = <&gpk2 0 2 0 3>, 37 };
38 <&gpk2 1 2 0 3>, 38
39 <&gpk2 3 2 3 3>, 39 g2d@12800000 {
40 <&gpk2 4 2 3 3>, 40 status = "okay";
41 <&gpk2 5 2 3 3>, 41 };
42 <&gpk2 6 2 3 3>; 42
43 codec@13400000 {
44 samsung,mfc-r = <0x43000000 0x800000>;
45 samsung,mfc-l = <0x51000000 0x800000>;
43 status = "okay"; 46 status = "okay";
44 }; 47 };
45 48
@@ -59,25 +62,32 @@
59 status = "okay"; 62 status = "okay";
60 }; 63 };
61 64
65 pinctrl@11000000 {
66 keypad_rows: keypad-rows {
67 samsung,pins = "gpx2-0", "gpx2-1";
68 samsung,pin-function = <3>;
69 samsung,pin-pud = <3>;
70 samsung,pin-drv = <0>;
71 };
72
73 keypad_cols: keypad-cols {
74 samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
75 "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
76 samsung,pin-function = <3>;
77 samsung,pin-pud = <0>;
78 samsung,pin-drv = <0>;
79 };
80 };
81
62 keypad@100A0000 { 82 keypad@100A0000 {
63 samsung,keypad-num-rows = <2>; 83 samsung,keypad-num-rows = <2>;
64 samsung,keypad-num-columns = <8>; 84 samsung,keypad-num-columns = <8>;
65 linux,keypad-no-autorepeat; 85 linux,keypad-no-autorepeat;
66 linux,keypad-wakeup; 86 linux,keypad-wakeup;
87 pinctrl-names = "default";
88 pinctrl-0 = <&keypad_rows &keypad_cols>;
67 status = "okay"; 89 status = "okay";
68 90
69 row-gpios = <&gpx2 0 3 3 0>,
70 <&gpx2 1 3 3 0>;
71
72 col-gpios = <&gpx1 0 3 0 0>,
73 <&gpx1 1 3 0 0>,
74 <&gpx1 2 3 0 0>,
75 <&gpx1 3 3 0 0>,
76 <&gpx1 4 3 0 0>,
77 <&gpx1 5 3 0 0>,
78 <&gpx1 6 3 0 0>,
79 <&gpx1 7 3 0 0>;
80
81 key_1 { 91 key_1 {
82 keypad,row = <0>; 92 keypad,row = <0>;
83 keypad,column = <3>; 93 keypad,column = <3>;
@@ -143,9 +153,7 @@
143 #address-cells = <1>; 153 #address-cells = <1>;
144 #size-cells = <0>; 154 #size-cells = <0>;
145 samsung,i2c-sda-delay = <100>; 155 samsung,i2c-sda-delay = <100>;
146 samsung,i2c-max-bus-freq = <20000>; 156 samsung,i2c-max-bus-freq = <100000>;
147 gpios = <&gpd1 0 2 3 0>,
148 <&gpd1 1 2 3 0>;
149 status = "okay"; 157 status = "okay";
150 158
151 eeprom@50 { 159 eeprom@50 {
@@ -160,9 +168,6 @@
160 }; 168 };
161 169
162 spi_2: spi@13940000 { 170 spi_2: spi@13940000 {
163 gpios = <&gpc1 1 5 3 0>,
164 <&gpc1 3 5 3 0>,
165 <&gpc1 4 5 3 0>;
166 status = "okay"; 171 status = "okay";
167 172
168 w25x80@0 { 173 w25x80@0 {
@@ -173,7 +178,7 @@
173 spi-max-frequency = <1000000>; 178 spi-max-frequency = <1000000>;
174 179
175 controller-data { 180 controller-data {
176 cs-gpio = <&gpc1 2 1 0 3>; 181 cs-gpio = <&gpc1 2 0>;
177 samsung,spi-feedback-delay = <0>; 182 samsung,spi-feedback-delay = <0>;
178 }; 183 };
179 184
@@ -189,4 +194,16 @@
189 }; 194 };
190 }; 195 };
191 }; 196 };
197
198 fixed-rate-clocks {
199 xxti {
200 compatible = "samsung,clock-xxti";
201 clock-frequency = <12000000>;
202 };
203
204 xusbxti {
205 compatible = "samsung,clock-xusbxti";
206 clock-frequency = <24000000>;
207 };
208 };
192}; 209};
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index c346b64dff55..9a14484c7bb1 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -289,4 +289,16 @@
289 }; 289 };
290 }; 290 };
291 }; 291 };
292
293 fixed-rate-clocks {
294 xxti {
295 compatible = "samsung,clock-xxti";
296 clock-frequency = <0>;
297 };
298
299 xusbxti {
300 compatible = "samsung,clock-xusbxti";
301 clock-frequency = <24000000>;
302 };
303 };
292}; 304};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 2feffc70814c..9e6f381fa835 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -47,6 +47,36 @@
47 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; 47 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
48 }; 48 };
49 49
50 mct@10050000 {
51 compatible = "samsung,exynos4210-mct";
52 reg = <0x10050000 0x800>;
53 interrupt-controller;
54 #interrups-cells = <2>;
55 interrupt-parent = <&mct_map>;
56 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
57 <4 0>, <5 0>;
58 clocks = <&clock 3>, <&clock 344>;
59 clock-names = "fin_pll", "mct";
60
61 mct_map: mct-map {
62 #interrupt-cells = <2>;
63 #address-cells = <0>;
64 #size-cells = <0>;
65 interrupt-map = <0x0 0 &gic 0 57 0>,
66 <0x1 0 &gic 0 69 0>,
67 <0x2 0 &combiner 12 6>,
68 <0x3 0 &combiner 12 7>,
69 <0x4 0 &gic 0 42 0>,
70 <0x5 0 &gic 0 48 0>;
71 };
72 };
73
74 clock: clock-controller@0x10030000 {
75 compatible = "samsung,exynos4210-clock";
76 reg = <0x10030000 0x20000>;
77 #clock-cells = <1>;
78 };
79
50 pinctrl_0: pinctrl@11400000 { 80 pinctrl_0: pinctrl@11400000 {
51 compatible = "samsung,exynos4210-pinctrl"; 81 compatible = "samsung,exynos4210-pinctrl";
52 reg = <0x11400000 0x1000>; 82 reg = <0x11400000 0x1000>;
@@ -76,4 +106,11 @@
76 reg = <0x100C0000 0x100>; 106 reg = <0x100C0000 0x100>;
77 interrupts = <2 4>; 107 interrupts = <2 4>;
78 }; 108 };
109
110 g2d@12800000 {
111 compatible = "samsung,s5pv210-g2d";
112 reg = <0x12800000 0x1000>;
113 interrupts = <0 89 0>;
114 status = "disabled";
115 };
79}; 116};
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index c6ae2005961f..36d4299789ef 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -25,4 +25,26 @@
25 gic:interrupt-controller@10490000 { 25 gic:interrupt-controller@10490000 {
26 cpu-offset = <0x8000>; 26 cpu-offset = <0x8000>;
27 }; 27 };
28
29 mct@10050000 {
30 compatible = "samsung,exynos4412-mct";
31 reg = <0x10050000 0x800>;
32 interrupt-controller;
33 #interrups-cells = <2>;
34 interrupt-parent = <&mct_map>;
35 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
36 <4 0>, <5 0>;
37
38 mct_map: mct-map {
39 #interrupt-cells = <2>;
40 #address-cells = <0>;
41 #size-cells = <0>;
42 interrupt-map = <0x0 0 &gic 0 57 0>,
43 <0x1 0 &combiner 12 5>,
44 <0x2 0 &combiner 12 6>,
45 <0x3 0 &combiner 12 7>,
46 <0x4 0 &gic 1 12 0>,
47 <0x5 0 &gic 1 12 0>;
48 };
49 };
28}; 50};
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
new file mode 100644
index 000000000000..15dc0a38b96d
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -0,0 +1,109 @@
1/*
2 * Hardkernel's Exynos4412 based ODROID-X board device tree source
3 *
4 * Copyright (c) 2012 Dongjin Kim <tobetter@gmail.com>
5 *
6 * Device tree source file for Hardkernel's ODROID-X board which is based on
7 * Samsung's Exynos4412 SoC.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14/dts-v1/;
15/include/ "exynos4412.dtsi"
16
17/ {
18 model = "Hardkernel ODROID-X board based on Exynos4412";
19 compatible = "hardkernel,odroid-x", "samsung,exynos4412";
20
21 memory {
22 reg = <0x40000000 0x40000000>;
23 };
24
25 leds {
26 compatible = "gpio-leds";
27 led1 {
28 label = "led1:heart";
29 gpios = <&gpc1 0 1>;
30 default-state = "on";
31 linux,default-trigger = "heartbeat";
32 };
33 led2 {
34 label = "led2:mmc0";
35 gpios = <&gpc1 2 1>;
36 default-state = "on";
37 linux,default-trigger = "mmc0";
38 };
39 };
40
41 mshc@12550000 {
42 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
43 pinctrl-names = "default";
44 status = "okay";
45
46 num-slots = <1>;
47 supports-highspeed;
48 broken-cd;
49 fifo-depth = <0x80>;
50 card-detect-delay = <200>;
51 samsung,dw-mshc-ciu-div = <3>;
52 samsung,dw-mshc-sdr-timing = <2 3>;
53 samsung,dw-mshc-ddr-timing = <1 2>;
54
55 slot@0 {
56 reg = <0>;
57 bus-width = <8>;
58 };
59 };
60
61 regulator_p3v3 {
62 compatible = "regulator-fixed";
63 regulator-name = "p3v3_en";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 gpio = <&gpa1 1 1>;
67 enable-active-high;
68 regulator-boot-on;
69 };
70
71 rtc@10070000 {
72 status = "okay";
73 };
74
75 sdhci@12530000 {
76 bus-width = <4>;
77 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
78 pinctrl-names = "default";
79 status = "okay";
80 };
81
82 serial@13800000 {
83 status = "okay";
84 };
85
86 serial@13810000 {
87 status = "okay";
88 };
89
90 serial@13820000 {
91 status = "okay";
92 };
93
94 serial@13830000 {
95 status = "okay";
96 };
97
98 fixed-rate-clocks {
99 xxti {
100 compatible = "samsung,clock-xxti";
101 clock-frequency = <0>;
102 };
103
104 xusbxti {
105 compatible = "samsung,clock-xusbxti";
106 clock-frequency = <24000000>;
107 };
108 };
109};
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
new file mode 100644
index 000000000000..b39bffccde86
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -0,0 +1,451 @@
1/*
2 * Insignal's Exynos4412 based Origen board device tree source
3 *
4 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Insignal's Origen board which is based on
8 * Samsung's Exynos4412 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/dts-v1/;
16/include/ "exynos4412.dtsi"
17
18/ {
19 model = "Insignal Origen evaluation board based on Exynos4412";
20 compatible = "insignal,origen4412", "samsung,exynos4412";
21
22 memory {
23 reg = <0x40000000 0x40000000>;
24 };
25
26 chosen {
27 bootargs ="console=ttySAC2,115200";
28 };
29
30 mmc_reg: voltage-regulator {
31 compatible = "regulator-fixed";
32 regulator-name = "VMEM_VDD_2.8V";
33 regulator-min-microvolt = <2800000>;
34 regulator-max-microvolt = <2800000>;
35 gpio = <&gpx1 1 0>;
36 enable-active-high;
37 };
38
39 sdhci@12530000 {
40 bus-width = <4>;
41 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
42 pinctrl-names = "default";
43 vmmc-supply = <&mmc_reg>;
44 status = "okay";
45 };
46
47 mshc@12550000 {
48 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
49 pinctrl-names = "default";
50 status = "okay";
51
52 num-slots = <1>;
53 supports-highspeed;
54 broken-cd;
55 fifo-depth = <0x80>;
56 card-detect-delay = <200>;
57 samsung,dw-mshc-ciu-div = <3>;
58 samsung,dw-mshc-sdr-timing = <2 3>;
59 samsung,dw-mshc-ddr-timing = <1 2>;
60
61 slot@0 {
62 reg = <0>;
63 bus-width = <8>;
64 };
65 };
66
67 codec@13400000 {
68 samsung,mfc-r = <0x43000000 0x800000>;
69 samsung,mfc-l = <0x51000000 0x800000>;
70 status = "okay";
71 };
72
73 fimd@11c00000 {
74 pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>;
75 pinctrl-names = "default";
76 status = "okay";
77 };
78
79 display-timings {
80 native-mode = <&timing0>;
81 timing0: timing {
82 clock-frequency = <50000>;
83 hactive = <1024>;
84 vactive = <600>;
85 hfront-porch = <64>;
86 hback-porch = <16>;
87 hsync-len = <48>;
88 vback-porch = <64>;
89 vfront-porch = <16>;
90 vsync-len = <3>;
91 };
92 };
93
94 serial@13800000 {
95 status = "okay";
96 };
97
98 serial@13810000 {
99 status = "okay";
100 };
101
102 serial@13820000 {
103 status = "okay";
104 };
105
106 serial@13830000 {
107 status = "okay";
108 };
109
110 i2c@13860000 {
111 #address-cells = <1>;
112 #size-cells = <0>;
113 samsung,i2c-sda-delay = <100>;
114 samsung,i2c-max-bus-freq = <20000>;
115 pinctrl-0 = <&i2c0_bus>;
116 pinctrl-names = "default";
117 status = "okay";
118
119 s5m8767_pmic@66 {
120 compatible = "samsung,s5m8767-pmic";
121 reg = <0x66>;
122
123 s5m8767,pmic-buck-default-dvs-idx = <3>;
124
125 s5m8767,pmic-buck-dvs-gpios = <&gpx2 3 0>,
126 <&gpx2 4 0>,
127 <&gpx2 5 0>;
128
129 s5m8767,pmic-buck-ds-gpios = <&gpm3 5 0>,
130 <&gpm3 6 0>,
131 <&gpm3 7 0>;
132
133 s5m8767,pmic-buck2-dvs-voltage = <1250000>, <1200000>,
134 <1200000>, <1200000>,
135 <1200000>, <1200000>,
136 <1200000>, <1200000>;
137
138 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
139 <1100000>, <1100000>,
140 <1100000>, <1100000>,
141 <1100000>, <1100000>;
142
143 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
144 <1200000>, <1200000>,
145 <1200000>, <1200000>,
146 <1200000>, <1200000>;
147
148 regulators {
149 ldo1_reg: LDO1 {
150 regulator-name = "VDD_ALIVE";
151 regulator-min-microvolt = <1100000>;
152 regulator-max-microvolt = <1100000>;
153 regulator-always-on;
154 regulator-boot-on;
155 op_mode = <1>; /* Normal Mode */
156 };
157
158 ldo2_reg: LDO2 {
159 regulator-name = "VDDQ_M12";
160 regulator-min-microvolt = <1200000>;
161 regulator-max-microvolt = <1200000>;
162 regulator-always-on;
163 op_mode = <1>; /* Normal Mode */
164 };
165
166 ldo3_reg: LDO3 {
167 regulator-name = "VDDIOAP_18";
168 regulator-min-microvolt = <1800000>;
169 regulator-max-microvolt = <1800000>;
170 regulator-always-on;
171 op_mode = <1>; /* Normal Mode */
172 };
173
174 ldo4_reg: LDO4 {
175 regulator-name = "VDDQ_PRE";
176 regulator-min-microvolt = <1800000>;
177 regulator-max-microvolt = <1800000>;
178 regulator-always-on;
179 op_mode = <1>; /* Normal Mode */
180 };
181
182 ldo5_reg: LDO5 {
183 regulator-name = "VDD18_2M";
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <1800000>;
186 regulator-always-on;
187 op_mode = <1>; /* Normal Mode */
188 };
189
190 ldo6_reg: LDO6 {
191 regulator-name = "VDD10_MPLL";
192 regulator-min-microvolt = <1000000>;
193 regulator-max-microvolt = <1000000>;
194 regulator-always-on;
195 op_mode = <1>; /* Normal Mode */
196 };
197
198 ldo7_reg: LDO7 {
199 regulator-name = "VDD10_XPLL";
200 regulator-min-microvolt = <1000000>;
201 regulator-max-microvolt = <1000000>;
202 regulator-always-on;
203 op_mode = <1>; /* Normal Mode */
204 };
205
206 ldo8_reg: LDO8 {
207 regulator-name = "VDD10_MIPI";
208 regulator-min-microvolt = <1000000>;
209 regulator-max-microvolt = <1000000>;
210 regulator-always-on;
211 op_mode = <1>; /* Normal Mode */
212 };
213
214 ldo9_reg: LDO9 {
215 regulator-name = "VDD33_LCD";
216 regulator-min-microvolt = <3300000>;
217 regulator-max-microvolt = <3300000>;
218 regulator-always-on;
219 op_mode = <1>; /* Normal Mode */
220 };
221
222 ldo10_reg: LDO10 {
223 regulator-name = "VDD18_MIPI";
224 regulator-min-microvolt = <1800000>;
225 regulator-max-microvolt = <1800000>;
226 regulator-always-on;
227 op_mode = <1>; /* Normal Mode */
228 };
229
230 ldo11_reg: LDO11 {
231 regulator-name = "VDD18_ABB1";
232 regulator-min-microvolt = <1800000>;
233 regulator-max-microvolt = <1800000>;
234 regulator-always-on;
235 op_mode = <1>; /* Normal Mode */
236 };
237
238 ldo12_reg: LDO12 {
239 regulator-name = "VDD33_UOTG";
240 regulator-min-microvolt = <3300000>;
241 regulator-max-microvolt = <3300000>;
242 regulator-always-on;
243 op_mode = <1>; /* Normal Mode */
244 };
245
246 ldo13_reg: LDO13 {
247 regulator-name = "VDDIOPERI_18";
248 regulator-min-microvolt = <1800000>;
249 regulator-max-microvolt = <1800000>;
250 regulator-always-on;
251 op_mode = <1>; /* Normal Mode */
252 };
253
254 ldo14_reg: LDO14 {
255 regulator-name = "VDD18_ABB02";
256 regulator-min-microvolt = <1800000>;
257 regulator-max-microvolt = <1800000>;
258 regulator-always-on;
259 op_mode = <1>; /* Normal Mode */
260 };
261
262 ldo15_reg: LDO15 {
263 regulator-name = "VDD10_USH";
264 regulator-min-microvolt = <1000000>;
265 regulator-max-microvolt = <1000000>;
266 regulator-always-on;
267 op_mode = <1>; /* Normal Mode */
268 };
269
270 ldo16_reg: LDO16 {
271 regulator-name = "VDD18_HSIC";
272 regulator-min-microvolt = <1800000>;
273 regulator-max-microvolt = <1800000>;
274 regulator-always-on;
275 op_mode = <1>; /* Normal Mode */
276 };
277
278 ldo17_reg: LDO17 {
279 regulator-name = "VDDIOAP_MMC012_28";
280 regulator-min-microvolt = <2800000>;
281 regulator-max-microvolt = <2800000>;
282 regulator-always-on;
283 op_mode = <1>; /* Normal Mode */
284 };
285
286 ldo18_reg: LDO18 {
287 regulator-name = "VDDIOPERI_28";
288 regulator-min-microvolt = <2800000>;
289 regulator-max-microvolt = <2800000>;
290 regulator-always-on;
291 op_mode = <1>; /* Normal Mode */
292 };
293
294 ldo19_reg: LDO19 {
295 regulator-name = "DVDD25";
296 regulator-min-microvolt = <2500000>;
297 regulator-max-microvolt = <2500000>;
298 regulator-always-on;
299 op_mode = <1>; /* Normal Mode */
300 };
301
302 ldo20_reg: LDO20 {
303 regulator-name = "VDD28_CAM";
304 regulator-min-microvolt = <2800000>;
305 regulator-max-microvolt = <2800000>;
306 regulator-always-on;
307 op_mode = <1>; /* Normal Mode */
308 };
309
310 ldo21_reg: LDO21 {
311 regulator-name = "VDD28_AF";
312 regulator-min-microvolt = <2800000>;
313 regulator-max-microvolt = <2800000>;
314 regulator-always-on;
315 op_mode = <1>; /* Normal Mode */
316 };
317
318 ldo22_reg: LDO22 {
319 regulator-name = "VDDA28_2M";
320 regulator-min-microvolt = <2800000>;
321 regulator-max-microvolt = <2800000>;
322 regulator-always-on;
323 op_mode = <1>; /* Normal Mode */
324 };
325
326 ldo23_reg: LDO23 {
327 regulator-name = "VDD28_TF";
328 regulator-min-microvolt = <2800000>;
329 regulator-max-microvolt = <2800000>;
330 regulator-always-on;
331 op_mode = <1>; /* Normal Mode */
332 };
333
334 ldo24_reg: LDO24 {
335 regulator-name = "VDD33_A31";
336 regulator-min-microvolt = <3300000>;
337 regulator-max-microvolt = <3300000>;
338 regulator-always-on;
339 op_mode = <1>; /* Normal Mode */
340 };
341
342 ldo25_reg: LDO25 {
343 regulator-name = "VDD18_CAM";
344 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <1800000>;
346 regulator-always-on;
347 op_mode = <1>; /* Normal Mode */
348 };
349
350 ldo26_reg: LDO26 {
351 regulator-name = "VDD18_A31";
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <1800000>;
354 regulator-always-on;
355 op_mode = <1>; /* Normal Mode */
356 };
357
358 ldo27_reg: LDO27 {
359 regulator-name = "GPS_1V8";
360 regulator-min-microvolt = <1800000>;
361 regulator-max-microvolt = <1800000>;
362 regulator-always-on;
363 op_mode = <1>; /* Normal Mode */
364 };
365
366 ldo28_reg: LDO28 {
367 regulator-name = "DVDD12";
368 regulator-min-microvolt = <1200000>;
369 regulator-max-microvolt = <1200000>;
370 regulator-always-on;
371 op_mode = <1>; /* Normal Mode */
372 };
373
374 buck1_reg: BUCK1 {
375 regulator-name = "vdd_mif";
376 regulator-min-microvolt = <950000>;
377 regulator-max-microvolt = <1100000>;
378 regulator-always-on;
379 regulator-boot-on;
380 op_mode = <1>; /* Normal Mode */
381 };
382
383 buck2_reg: BUCK2 {
384 regulator-name = "vdd_arm";
385 regulator-min-microvolt = <925000>;
386 regulator-max-microvolt = <1300000>;
387 regulator-always-on;
388 regulator-boot-on;
389 op_mode = <1>; /* Normal Mode */
390 };
391
392 buck3_reg: BUCK3 {
393 regulator-name = "vdd_int";
394 regulator-min-microvolt = <900000>;
395 regulator-max-microvolt = <1200000>;
396 regulator-always-on;
397 regulator-boot-on;
398 op_mode = <1>; /* Normal Mode */
399 };
400
401 buck4_reg: BUCK4 {
402 regulator-name = "vdd_g3d";
403 regulator-min-microvolt = <750000>;
404 regulator-max-microvolt = <1500000>;
405 regulator-always-on;
406 regulator-boot-on;
407 op_mode = <1>; /* Normal Mode */
408 };
409
410 buck5_reg: BUCK5 {
411 regulator-name = "vdd_m12";
412 regulator-min-microvolt = <750000>;
413 regulator-max-microvolt = <1500000>;
414 regulator-always-on;
415 regulator-boot-on;
416 op_mode = <1>; /* Normal Mode */
417 };
418
419 buck6_reg: BUCK6 {
420 regulator-name = "vdd12_5m";
421 regulator-min-microvolt = <750000>;
422 regulator-max-microvolt = <1500000>;
423 regulator-always-on;
424 regulator-boot-on;
425 op_mode = <1>; /* Normal Mode */
426 };
427
428 buck9_reg: BUCK9 {
429 regulator-name = "vddf28_emmc";
430 regulator-min-microvolt = <750000>;
431 regulator-max-microvolt = <3000000>;
432 regulator-always-on;
433 regulator-boot-on;
434 op_mode = <1>; /* Normal Mode */
435 };
436 };
437 };
438 };
439
440 fixed-rate-clocks {
441 xxti {
442 compatible = "samsung,clock-xxti";
443 clock-frequency = <0>;
444 };
445
446 xusbxti {
447 compatible = "samsung,clock-xusbxti";
448 clock-frequency = <24000000>;
449 };
450 };
451};
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index f05bf575cc45..dd564310d4a5 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -27,6 +27,27 @@
27 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; 27 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
28 }; 28 };
29 29
30 g2d@10800000 {
31 status = "okay";
32 };
33
34 g2d@10800000 {
35 status = "okay";
36 };
37
38 sdhci@12530000 {
39 bus-width = <4>;
40 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
41 pinctrl-names = "default";
42 status = "okay";
43 };
44
45 codec@13400000 {
46 samsung,mfc-r = <0x43000000 0x800000>;
47 samsung,mfc-l = <0x51000000 0x800000>;
48 status = "okay";
49 };
50
30 serial@13800000 { 51 serial@13800000 {
31 status = "okay"; 52 status = "okay";
32 }; 53 };
@@ -42,4 +63,16 @@
42 serial@13830000 { 63 serial@13830000 {
43 status = "okay"; 64 status = "okay";
44 }; 65 };
66
67 fixed-rate-clocks {
68 xxti {
69 compatible = "samsung,clock-xxti";
70 clock-frequency = <0>;
71 };
72
73 xusbxti {
74 compatible = "samsung,clock-xusbxti";
75 clock-frequency = <24000000>;
76 };
77 };
45}; 78};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index d7dfe312772a..d75c047e80a9 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -25,4 +25,30 @@
25 gic:interrupt-controller@10490000 { 25 gic:interrupt-controller@10490000 {
26 cpu-offset = <0x4000>; 26 cpu-offset = <0x4000>;
27 }; 27 };
28
29 mct@10050000 {
30 compatible = "samsung,exynos4412-mct";
31 reg = <0x10050000 0x800>;
32 interrupt-controller;
33 #interrups-cells = <2>;
34 interrupt-parent = <&mct_map>;
35 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
36 <4 0>, <5 0>, <6 0>, <7 0>;
37 clocks = <&clock 3>, <&clock 344>;
38 clock-names = "fin_pll", "mct";
39
40 mct_map: mct-map {
41 #interrupt-cells = <2>;
42 #address-cells = <0>;
43 #size-cells = <0>;
44 interrupt-map = <0x0 0 &gic 0 57 0>,
45 <0x1 0 &combiner 12 5>,
46 <0x2 0 &combiner 12 6>,
47 <0x3 0 &combiner 12 7>,
48 <0x4 0 &gic 1 12 0>,
49 <0x5 0 &gic 1 12 0>,
50 <0x6 0 &gic 1 12 0>,
51 <0x7 0 &gic 1 12 0>;
52 };
53 };
28}; 54};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 9a8780694909..e3380a7a285c 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -36,6 +36,12 @@
36 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>; 36 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
37 }; 37 };
38 38
39 clock: clock-controller@0x10030000 {
40 compatible = "samsung,exynos4412-clock";
41 reg = <0x10030000 0x20000>;
42 #clock-cells = <1>;
43 };
44
39 pinctrl_0: pinctrl@11400000 { 45 pinctrl_0: pinctrl@11400000 {
40 compatible = "samsung,exynos4x12-pinctrl"; 46 compatible = "samsung,exynos4x12-pinctrl";
41 reg = <0x11400000 0x1000>; 47 reg = <0x11400000 0x1000>;
@@ -66,4 +72,11 @@
66 reg = <0x106E0000 0x1000>; 72 reg = <0x106E0000 0x1000>;
67 interrupts = <0 72 0>; 73 interrupts = <0 72 0>;
68 }; 74 };
75
76 g2d@10800000 {
77 compatible = "samsung,exynos4212-g2d";
78 reg = <0x10800000 0x1000>;
79 interrupts = <0 89 0>;
80 status = "disabled";
81 };
69}; 82};
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
new file mode 100644
index 000000000000..02cfc76d002f
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -0,0 +1,452 @@
1/*
2 * Samsung's Exynos5250 based Arndale board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13/include/ "exynos5250.dtsi"
14
15/ {
16 model = "Insignal Arndale evaluation board based on EXYNOS5250";
17 compatible = "insignal,arndale", "samsung,exynos5250";
18
19 memory {
20 reg = <0x40000000 0x80000000>;
21 };
22
23 chosen {
24 bootargs = "console=ttySAC2,115200";
25 };
26
27 codec@11000000 {
28 samsung,mfc-r = <0x43000000 0x800000>;
29 samsung,mfc-l = <0x51000000 0x800000>;
30 };
31
32 i2c@12C60000 {
33 samsung,i2c-sda-delay = <100>;
34 samsung,i2c-max-bus-freq = <20000>;
35 samsung,i2c-slave-addr = <0x66>;
36
37 s5m8767_pmic@66 {
38 compatible = "samsung,s5m8767-pmic";
39 reg = <0x66>;
40
41 s5m8767,pmic-buck2-dvs-voltage = <1300000>;
42 s5m8767,pmic-buck3-dvs-voltage = <1100000>;
43 s5m8767,pmic-buck4-dvs-voltage = <1200000>;
44 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 0>,
45 <&gpd1 1 0>,
46 <&gpd1 2 0>;
47 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 0>,
48 <&gpx2 4 0>,
49 <&gpx2 5 0>;
50 regulators {
51 ldo1_reg: LDO1 {
52 regulator-name = "VDD_ALIVE_1.0V";
53 regulator-min-microvolt = <1100000>;
54 regulator-max-microvolt = <1100000>;
55 regulator-always-on;
56 regulator-boot-on;
57 op_mode = <1>;
58 };
59
60 ldo2_reg: LDO2 {
61 regulator-name = "VDD_28IO_DP_1.35V";
62 regulator-min-microvolt = <1200000>;
63 regulator-max-microvolt = <1200000>;
64 regulator-always-on;
65 regulator-boot-on;
66 op_mode = <1>;
67 };
68
69 ldo3_reg: LDO3 {
70 regulator-name = "VDD_COMMON1_1.8V";
71 regulator-min-microvolt = <1800000>;
72 regulator-max-microvolt = <1800000>;
73 regulator-always-on;
74 regulator-boot-on;
75 op_mode = <1>;
76 };
77
78 ldo4_reg: LDO4 {
79 regulator-name = "VDD_IOPERI_1.8V";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <1800000>;
82 op_mode = <1>;
83 };
84
85 ldo5_reg: LDO5 {
86 regulator-name = "VDD_EXT_1.8V";
87 regulator-min-microvolt = <1800000>;
88 regulator-max-microvolt = <1800000>;
89 regulator-always-on;
90 regulator-boot-on;
91 op_mode = <1>;
92 };
93
94 ldo6_reg: LDO6 {
95 regulator-name = "VDD_MPLL_1.1V";
96 regulator-min-microvolt = <1100000>;
97 regulator-max-microvolt = <1100000>;
98 regulator-always-on;
99 regulator-boot-on;
100 op_mode = <1>;
101 };
102
103 ldo7_reg: LDO7 {
104 regulator-name = "VDD_XPLL_1.1V";
105 regulator-min-microvolt = <1100000>;
106 regulator-max-microvolt = <1100000>;
107 regulator-always-on;
108 regulator-boot-on;
109 op_mode = <1>;
110 };
111
112 ldo8_reg: LDO8 {
113 regulator-name = "VDD_COMMON2_1.0V";
114 regulator-min-microvolt = <1000000>;
115 regulator-max-microvolt = <1000000>;
116 regulator-always-on;
117 regulator-boot-on;
118 op_mode = <1>;
119 };
120
121 ldo9_reg: LDO9 {
122 regulator-name = "VDD_33ON_3.0V";
123 regulator-min-microvolt = <3000000>;
124 regulator-max-microvolt = <3000000>;
125 op_mode = <1>;
126 };
127
128 ldo10_reg: LDO10 {
129 regulator-name = "VDD_COMMON3_1.8V";
130 regulator-min-microvolt = <1800000>;
131 regulator-max-microvolt = <1800000>;
132 regulator-always-on;
133 regulator-boot-on;
134 op_mode = <1>;
135 };
136
137 ldo11_reg: LDO11 {
138 regulator-name = "VDD_ABB2_1.8V";
139 regulator-min-microvolt = <1800000>;
140 regulator-max-microvolt = <1800000>;
141 regulator-always-on;
142 regulator-boot-on;
143 op_mode = <1>;
144 };
145
146 ldo12_reg: LDO12 {
147 regulator-name = "VDD_USB_3.0V";
148 regulator-min-microvolt = <3000000>;
149 regulator-max-microvolt = <3000000>;
150 regulator-always-on;
151 regulator-boot-on;
152 op_mode = <1>;
153 };
154
155 ldo13_reg: LDO13 {
156 regulator-name = "VDDQ_C2C_W_1.8V";
157 regulator-min-microvolt = <1800000>;
158 regulator-max-microvolt = <1800000>;
159 regulator-always-on;
160 regulator-boot-on;
161 op_mode = <1>;
162 };
163
164 ldo14_reg: LDO14 {
165 regulator-name = "VDD18_ABB0_3_1.8V";
166 regulator-min-microvolt = <1800000>;
167 regulator-max-microvolt = <1800000>;
168 regulator-always-on;
169 regulator-boot-on;
170 op_mode = <1>;
171 };
172
173 ldo15_reg: LDO15 {
174 regulator-name = "VDD10_COMMON4_1.0V";
175 regulator-min-microvolt = <1000000>;
176 regulator-max-microvolt = <1000000>;
177 regulator-always-on;
178 regulator-boot-on;
179 op_mode = <1>;
180 };
181
182 ldo16_reg: LDO16 {
183 regulator-name = "VDD18_HSIC_1.8V";
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <1800000>;
186 regulator-always-on;
187 regulator-boot-on;
188 op_mode = <1>;
189 };
190
191 ldo17_reg: LDO17 {
192 regulator-name = "VDDQ_MMC2_3_2.8V";
193 regulator-min-microvolt = <2800000>;
194 regulator-max-microvolt = <2800000>;
195 regulator-always-on;
196 regulator-boot-on;
197 op_mode = <1>;
198 };
199
200 ldo18_reg: LDO18 {
201 regulator-name = "VDD_33ON_2.8V";
202 regulator-min-microvolt = <2800000>;
203 regulator-max-microvolt = <2800000>;
204 op_mode = <1>;
205 };
206
207 ldo22_reg: LDO22 {
208 regulator-name = "EXT_33_OFF";
209 regulator-min-microvolt = <3300000>;
210 regulator-max-microvolt = <3300000>;
211 op_mode = <1>;
212 };
213
214 ldo23_reg: LDO23 {
215 regulator-name = "EXT_28_OFF";
216 regulator-min-microvolt = <2800000>;
217 regulator-max-microvolt = <2800000>;
218 op_mode = <1>;
219 };
220
221 ldo25_reg: LDO25 {
222 regulator-name = "PVDD_LDO25";
223 regulator-min-microvolt = <1200000>;
224 regulator-max-microvolt = <1200000>;
225 op_mode = <1>;
226 };
227
228 ldo26_reg: LDO26 {
229 regulator-name = "EXT_18_OFF";
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <1800000>;
232 op_mode = <1>;
233 };
234
235 buck1_reg: BUCK1 {
236 regulator-name = "vdd_mif";
237 regulator-min-microvolt = <950000>;
238 regulator-max-microvolt = <1200000>;
239 regulator-always-on;
240 regulator-boot-on;
241 op_mode = <1>;
242 };
243
244 buck2_reg: BUCK2 {
245 regulator-name = "vdd_arm";
246 regulator-min-microvolt = <925000>;
247 regulator-max-microvolt = <1300000>;
248 regulator-always-on;
249 regulator-boot-on;
250 op_mode = <1>;
251 };
252
253 buck3_reg: BUCK3 {
254 regulator-name = "vdd_int";
255 regulator-min-microvolt = <900000>;
256 regulator-max-microvolt = <1200000>;
257 regulator-always-on;
258 regulator-boot-on;
259 op_mode = <1>;
260 };
261
262 buck4_reg: BUCK4 {
263 regulator-name = "vdd_g3d";
264 regulator-min-microvolt = <1000000>;
265 regulator-max-microvolt = <1000000>;
266 regulator-boot-on;
267 op_mode = <1>;
268 };
269
270 buck5_reg: BUCK5 {
271 regulator-name = "VDD_MEM_1.35V";
272 regulator-min-microvolt = <750000>;
273 regulator-max-microvolt = <1355000>;
274 regulator-always-on;
275 regulator-boot-on;
276 op_mode = <1>;
277 };
278
279 buck9_reg: BUCK9 {
280 regulator-name = "VDD_33_OFF_EXT1";
281 regulator-min-microvolt = <750000>;
282 regulator-max-microvolt = <3000000>;
283 op_mode = <1>;
284 };
285 };
286 };
287 };
288
289 i2c@12C70000 {
290 status = "disabled";
291 };
292
293 i2c@12C80000 {
294 status = "disabled";
295 };
296
297 i2c@12C90000 {
298 status = "disabled";
299 };
300
301 i2c@12CA0000 {
302 status = "disabled";
303 };
304
305 i2c@12CB0000 {
306 status = "disabled";
307 };
308
309 i2c@12CC0000 {
310 status = "disabled";
311 };
312
313 i2c@12CD0000 {
314 status = "disabled";
315 };
316
317 i2c@121D0000 {
318 status = "disabled";
319 };
320
321 dwmmc_0: dwmmc0@12200000 {
322 num-slots = <1>;
323 supports-highspeed;
324 broken-cd;
325 fifo-depth = <0x80>;
326 card-detect-delay = <200>;
327 samsung,dw-mshc-ciu-div = <3>;
328 samsung,dw-mshc-sdr-timing = <2 3>;
329 samsung,dw-mshc-ddr-timing = <1 2>;
330 vmmc-supply = <&mmc_reg>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
333
334 slot@0 {
335 reg = <0>;
336 bus-width = <8>;
337 };
338 };
339
340 dwmmc_1: dwmmc1@12210000 {
341 status = "disabled";
342 };
343
344 dwmmc_2: dwmmc2@12220000 {
345 num-slots = <1>;
346 supports-highspeed;
347 fifo-depth = <0x80>;
348 card-detect-delay = <200>;
349 samsung,dw-mshc-ciu-div = <3>;
350 samsung,dw-mshc-sdr-timing = <2 3>;
351 samsung,dw-mshc-ddr-timing = <1 2>;
352 vmmc-supply = <&mmc_reg>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
355
356 slot@0 {
357 reg = <0>;
358 bus-width = <4>;
359 disable-wp;
360 };
361 };
362
363 dwmmc_3: dwmmc3@12230000 {
364 status = "disabled";
365 };
366
367 spi_0: spi@12d20000 {
368 status = "disabled";
369 };
370
371 spi_1: spi@12d30000 {
372 status = "disabled";
373 };
374
375 spi_2: spi@12d40000 {
376 status = "disabled";
377 };
378
379 gpio_keys {
380 compatible = "gpio-keys";
381
382 menu {
383 label = "SW-TACT2";
384 gpios = <&gpx1 4 1>;
385 linux,code = <139>;
386 gpio-key,wakeup;
387 };
388
389 home {
390 label = "SW-TACT3";
391 gpios = <&gpx1 5 1>;
392 linux,code = <102>;
393 gpio-key,wakeup;
394 };
395
396 up {
397 label = "SW-TACT4";
398 gpios = <&gpx1 6 1>;
399 linux,code = <103>;
400 gpio-key,wakeup;
401 };
402
403 down {
404 label = "SW-TACT5";
405 gpios = <&gpx1 7 1>;
406 linux,code = <108>;
407 gpio-key,wakeup;
408 };
409
410 back {
411 label = "SW-TACT6";
412 gpios = <&gpx2 0 1>;
413 linux,code = <158>;
414 gpio-key,wakeup;
415 };
416
417 wakeup {
418 label = "SW-TACT7";
419 gpios = <&gpx2 1 1>;
420 linux,code = <143>;
421 gpio-key,wakeup;
422 };
423 };
424
425 hdmi {
426 hpd-gpio = <&gpx3 7 2>;
427 vdd_osc-supply = <&ldo10_reg>;
428 vdd_pll-supply = <&ldo8_reg>;
429 vdd-supply = <&ldo8_reg>;
430 };
431
432 mmc_reg: voltage-regulator {
433 compatible = "regulator-fixed";
434 regulator-name = "VDD_33ON_2.8V";
435 regulator-min-microvolt = <2800000>;
436 regulator-max-microvolt = <2800000>;
437 gpio = <&gpx1 1 1>;
438 enable-active-high;
439 };
440
441 reg_hdmi_en: fixedregulator@0 {
442 compatible = "regulator-fixed";
443 regulator-name = "hdmi-en";
444 };
445
446 fixed-rate-clocks {
447 xxti {
448 compatible = "samsung,clock-xxti";
449 clock-frequency = <24000000>;
450 };
451 };
452};
diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
new file mode 100644
index 000000000000..d1650fb34c0a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
@@ -0,0 +1,783 @@
1/*
2 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
8 * tree nodes are listed in this file.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/ {
16 pinctrl@11400000 {
17 gpa0: gpa0 {
18 gpio-controller;
19 #gpio-cells = <2>;
20
21 interrupt-controller;
22 #interrupt-cells = <2>;
23 };
24
25 gpa1: gpa1 {
26 gpio-controller;
27 #gpio-cells = <2>;
28
29 interrupt-controller;
30 #interrupt-cells = <2>;
31 };
32
33 gpa2: gpa2 {
34 gpio-controller;
35 #gpio-cells = <2>;
36
37 interrupt-controller;
38 #interrupt-cells = <2>;
39 };
40
41 gpb0: gpb0 {
42 gpio-controller;
43 #gpio-cells = <2>;
44
45 interrupt-controller;
46 #interrupt-cells = <2>;
47 };
48
49 gpb1: gpb1 {
50 gpio-controller;
51 #gpio-cells = <2>;
52
53 interrupt-controller;
54 #interrupt-cells = <2>;
55 };
56
57 gpb2: gpb2 {
58 gpio-controller;
59 #gpio-cells = <2>;
60
61 interrupt-controller;
62 #interrupt-cells = <2>;
63 };
64
65 gpb3: gpb3 {
66 gpio-controller;
67 #gpio-cells = <2>;
68
69 interrupt-controller;
70 #interrupt-cells = <2>;
71 };
72
73 gpc0: gpc0 {
74 gpio-controller;
75 #gpio-cells = <2>;
76
77 interrupt-controller;
78 #interrupt-cells = <2>;
79 };
80
81 gpc1: gpc1 {
82 gpio-controller;
83 #gpio-cells = <2>;
84
85 interrupt-controller;
86 #interrupt-cells = <2>;
87 };
88
89 gpc2: gpc2 {
90 gpio-controller;
91 #gpio-cells = <2>;
92
93 interrupt-controller;
94 #interrupt-cells = <2>;
95 };
96
97 gpc3: gpc3 {
98 gpio-controller;
99 #gpio-cells = <2>;
100
101 interrupt-controller;
102 #interrupt-cells = <2>;
103 };
104
105 gpd0: gpd0 {
106 gpio-controller;
107 #gpio-cells = <2>;
108
109 interrupt-controller;
110 #interrupt-cells = <2>;
111 };
112
113 gpd1: gpd1 {
114 gpio-controller;
115 #gpio-cells = <2>;
116
117 interrupt-controller;
118 #interrupt-cells = <2>;
119 };
120
121 gpy0: gpy0 {
122 gpio-controller;
123 #gpio-cells = <2>;
124 };
125
126 gpy1: gpy1 {
127 gpio-controller;
128 #gpio-cells = <2>;
129 };
130
131 gpy2: gpy2 {
132 gpio-controller;
133 #gpio-cells = <2>;
134 };
135
136 gpy3: gpy3 {
137 gpio-controller;
138 #gpio-cells = <2>;
139 };
140
141 gpy4: gpy4 {
142 gpio-controller;
143 #gpio-cells = <2>;
144 };
145
146 gpy5: gpy5 {
147 gpio-controller;
148 #gpio-cells = <2>;
149 };
150
151 gpy6: gpy6 {
152 gpio-controller;
153 #gpio-cells = <2>;
154 };
155
156 gpc4: gpc4 {
157 gpio-controller;
158 #gpio-cells = <2>;
159
160 interrupt-controller;
161 #interrupt-cells = <2>;
162 };
163
164 gpx0: gpx0 {
165 gpio-controller;
166 #gpio-cells = <2>;
167
168 interrupt-controller;
169 interrupt-parent = <&combiner>;
170 #interrupt-cells = <2>;
171 interrupts = <23 0>, <24 0>, <25 0>, <25 1>,
172 <26 0>, <26 1>, <27 0>, <27 1>;
173 };
174
175 gpx1: gpx1 {
176 gpio-controller;
177 #gpio-cells = <2>;
178
179 interrupt-controller;
180 interrupt-parent = <&combiner>;
181 #interrupt-cells = <2>;
182 interrupts = <28 0>, <28 1>, <29 0>, <29 1>,
183 <30 0>, <30 1>, <31 0>, <31 1>;
184 };
185
186 gpx2: gpx2 {
187 gpio-controller;
188 #gpio-cells = <2>;
189
190 interrupt-controller;
191 #interrupt-cells = <2>;
192 };
193
194 gpx3: gpx3 {
195 gpio-controller;
196 #gpio-cells = <2>;
197
198 interrupt-controller;
199 #interrupt-cells = <2>;
200 };
201
202 uart0_data: uart0-data {
203 samsung,pins = "gpa0-0", "gpa0-1";
204 samsung,pin-function = <2>;
205 samsung,pin-pud = <0>;
206 samsung,pin-drv = <0>;
207 };
208
209 uart0_fctl: uart0-fctl {
210 samsung,pins = "gpa0-2", "gpa0-3";
211 samsung,pin-function = <2>;
212 samsung,pin-pud = <0>;
213 samaung,pin-drv = <0>;
214 };
215
216 i2c2_bus: i2c2-bus {
217 samsung,pins = "gpa0-6", "gpa0-7";
218 samsung,pin-function = <3>;
219 samsung,pin-pud = <3>;
220 samaung,pin-drv = <0>;
221 };
222
223 i2c2_hs_bus: i2c2-hs-bus {
224 samsung,pins = "gpa0-6", "gpa0-7";
225 samsung,pin-function = <4>;
226 samsung,pin-pud = <3>;
227 samaung,pin-drv = <0>;
228 };
229
230 uart2_data: uart2-data {
231 samsung,pins = "gpa1-0", "gpa1-1";
232 samsung,pin-function = <2>;
233 samsung,pin-pud = <0>;
234 samsung,pin-drv = <0>;
235 };
236
237 uart2_fctl: uart2-fctl {
238 samsung,pins = "gpa1-2", "gpa1-3";
239 samsung,pin-function = <2>;
240 samsung,pin-pud = <0>;
241 samaung,pin-drv = <0>;
242 };
243
244 i2c3_bus: i2c3-bus {
245 samsung,pins = "gpa1-2", "gpa1-3";
246 samsung,pin-function = <3>;
247 samsung,pin-pud = <3>;
248 samaung,pin-drv = <0>;
249 };
250
251 i2c3_hs_bus: i2c3-hs-bus {
252 samsung,pins = "gpa1-2", "gpa1-3";
253 samsung,pin-function = <4>;
254 samsung,pin-pud = <3>;
255 samaung,pin-drv = <0>;
256 };
257
258 uart3_data: uart3-data {
259 samsung,pins = "gpa1-4", "gpa1-4";
260 samsung,pin-function = <2>;
261 samsung,pin-pud = <0>;
262 samsung,pin-drv = <0>;
263 };
264
265 spi0_bus: spi0-bus {
266 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3";
267 samsung,pin-function = <2>;
268 samsung,pin-pud = <3>;
269 samsung,pin-drv = <0>;
270 };
271
272 i2c4_bus: i2c4-bus {
273 samsung,pins = "gpa2-0", "gpa2-1";
274 samsung,pin-function = <3>;
275 samsung,pin-pud = <3>;
276 samaung,pin-drv = <0>;
277 };
278
279 i2c5_bus: i2c5-bus {
280 samsung,pins = "gpa2-2", "gpa2-3";
281 samsung,pin-function = <3>;
282 samsung,pin-pud = <3>;
283 samaung,pin-drv = <0>;
284 };
285
286 spi1_bus: spi1-bus {
287 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7";
288 samsung,pin-function = <2>;
289 samsung,pin-pud = <3>;
290 samsung,pin-drv = <0>;
291 };
292
293 i2s1_bus: i2s1-bus {
294 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
295 "gpb0-4";
296 samsung,pin-function = <2>;
297 samsung,pin-pud = <0>;
298 samsung,pin-drv = <0>;
299 };
300
301 pcm1_bus: pcm1-bus {
302 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
303 "gpb0-4";
304 samsung,pin-function = <3>;
305 samsung,pin-pud = <0>;
306 samsung,pin-drv = <0>;
307 };
308
309 ac97_bus: ac97-bus {
310 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
311 "gpb0-4";
312 samsung,pin-function = <4>;
313 samsung,pin-pud = <0>;
314 samsung,pin-drv = <0>;
315 };
316
317 i2s2_bus: i2s2-bus {
318 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3",
319 "gpb1-4";
320 samsung,pin-function = <2>;
321 samsung,pin-pud = <0>;
322 samsung,pin-drv = <0>;
323 };
324
325 pcm2_bus: pcm2-bus {
326 samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3",
327 "gpb1-4";
328 samsung,pin-function = <3>;
329 samsung,pin-pud = <0>;
330 samsung,pin-drv = <0>;
331 };
332
333 spdif_bus: spdif-bus {
334 samsung,pins = "gpb1-0", "gpb1-1";
335 samsung,pin-function = <4>;
336 samsung,pin-pud = <0>;
337 samsung,pin-drv = <0>;
338 };
339
340 spi2_bus: spi2-bus {
341 samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4";
342 samsung,pin-function = <5>;
343 samsung,pin-pud = <3>;
344 samsung,pin-drv = <0>;
345 };
346
347 i2c6_bus: i2c6-bus {
348 samsung,pins = "gpb1-3", "gpb1-4";
349 samsung,pin-function = <4>;
350 samsung,pin-pud = <3>;
351 samsung,pin-drv = <0>;
352 };
353
354 i2c7_bus: i2c7-bus {
355 samsung,pins = "gpb2-2", "gpb2-3";
356 samsung,pin-function = <3>;
357 samsung,pin-pud = <3>;
358 samsung,pin-drv = <0>;
359 };
360
361 i2c0_bus: i2c0-bus {
362 samsung,pins = "gpb3-0", "gpb3-1";
363 samsung,pin-function = <2>;
364 samsung,pin-pud = <3>;
365 samsung,pin-drv = <0>;
366 };
367
368 i2c1_bus: i2c1-bus {
369 samsung,pins = "gpb3-2", "gpb3-3";
370 samsung,pin-function = <2>;
371 samsung,pin-pud = <3>;
372 samsung,pin-drv = <0>;
373 };
374
375 i2c0_hs_bus: i2c0-hs-bus {
376 samsung,pins = "gpb3-0", "gpb3-1";
377 samsung,pin-function = <4>;
378 samsung,pin-pud = <3>;
379 samaung,pin-drv = <0>;
380 };
381
382 i2c1_hs_bus: i2c1-hs-bus {
383 samsung,pins = "gpb3-2", "gpb3-3";
384 samsung,pin-function = <4>;
385 samsung,pin-pud = <3>;
386 samaung,pin-drv = <0>;
387 };
388
389 sd0_clk: sd0-clk {
390 samsung,pins = "gpc0-0";
391 samsung,pin-function = <2>;
392 samsung,pin-pud = <0>;
393 samsung,pin-drv = <3>;
394 };
395
396 sd0_cmd: sd0-cmd {
397 samsung,pins = "gpc0-1";
398 samsung,pin-function = <2>;
399 samsung,pin-pud = <0>;
400 samsung,pin-drv = <3>;
401 };
402
403 sd0_cd: sd0-cd {
404 samsung,pins = "gpc0-2";
405 samsung,pin-function = <2>;
406 samsung,pin-pud = <3>;
407 samsung,pin-drv = <3>;
408 };
409
410 sd0_bus1: sd0-bus-width1 {
411 samsung,pins = "gpc0-3";
412 samsung,pin-function = <2>;
413 samsung,pin-pud = <3>;
414 samsung,pin-drv = <3>;
415 };
416
417 sd0_bus4: sd0-bus-width4 {
418 samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6";
419 samsung,pin-function = <2>;
420 samsung,pin-pud = <3>;
421 samsung,pin-drv = <3>;
422 };
423
424 sd0_bus8: sd0-bus-width8 {
425 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3";
426 samsung,pin-function = <2>;
427 samsung,pin-pud = <3>;
428 samsung,pin-drv = <3>;
429 };
430
431 sd1_clk: sd1-clk {
432 samsung,pins = "gpc2-0";
433 samsung,pin-function = <2>;
434 samsung,pin-pud = <0>;
435 samsung,pin-drv = <3>;
436 };
437
438 sd1_cmd: sd1-cmd {
439 samsung,pins = "gpc2-1";
440 samsung,pin-function = <2>;
441 samsung,pin-pud = <0>;
442 samsung,pin-drv = <3>;
443 };
444
445 sd1_cd: sd1-cd {
446 samsung,pins = "gpc2-2";
447 samsung,pin-function = <2>;
448 samsung,pin-pud = <3>;
449 samsung,pin-drv = <3>;
450 };
451
452 sd1_bus1: sd1-bus-width1 {
453 samsung,pins = "gpc2-3";
454 samsung,pin-function = <2>;
455 samsung,pin-pud = <3>;
456 samsung,pin-drv = <3>;
457 };
458
459 sd1_bus4: sd1-bus-width4 {
460 samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6";
461 samsung,pin-function = <2>;
462 samsung,pin-pud = <3>;
463 samsung,pin-drv = <3>;
464 };
465
466 sd2_clk: sd2-clk {
467 samsung,pins = "gpc3-0";
468 samsung,pin-function = <2>;
469 samsung,pin-pud = <0>;
470 samsung,pin-drv = <3>;
471 };
472
473 sd2_cmd: sd2-cmd {
474 samsung,pins = "gpc3-1";
475 samsung,pin-function = <2>;
476 samsung,pin-pud = <0>;
477 samsung,pin-drv = <3>;
478 };
479
480 sd2_cd: sd2-cd {
481 samsung,pins = "gpc3-2";
482 samsung,pin-function = <2>;
483 samsung,pin-pud = <3>;
484 samsung,pin-drv = <3>;
485 };
486
487 sd2_bus1: sd2-bus-width1 {
488 samsung,pins = "gpc3-3";
489 samsung,pin-function = <2>;
490 samsung,pin-pud = <3>;
491 samsung,pin-drv = <3>;
492 };
493
494 sd2_bus4: sd2-bus-width4 {
495 samsung,pins = "gpc3-3", "gpc3-4", "gpc3-5", "gpc3-6";
496 samsung,pin-function = <2>;
497 samsung,pin-pud = <3>;
498 samsung,pin-drv = <3>;
499 };
500
501 sd2_bus8: sd2-bus-width8 {
502 samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6";
503 samsung,pin-function = <3>;
504 samsung,pin-pud = <3>;
505 samsung,pin-drv = <3>;
506 };
507
508 sd3_clk: sd3-clk {
509 samsung,pins = "gpc4-0";
510 samsung,pin-function = <2>;
511 samsung,pin-pud = <0>;
512 samsung,pin-drv = <3>;
513 };
514
515 sd3_cmd: sd3-cmd {
516 samsung,pins = "gpc4-1";
517 samsung,pin-function = <2>;
518 samsung,pin-pud = <0>;
519 samsung,pin-drv = <3>;
520 };
521
522 sd3_cd: sd3-cd {
523 samsung,pins = "gpc4-2";
524 samsung,pin-function = <2>;
525 samsung,pin-pud = <3>;
526 samsung,pin-drv = <3>;
527 };
528
529 sd3_bus1: sd3-bus-width1 {
530 samsung,pins = "gpc4-3";
531 samsung,pin-function = <2>;
532 samsung,pin-pud = <3>;
533 samsung,pin-drv = <3>;
534 };
535
536 sd3_bus4: sd3-bus-width4 {
537 samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6";
538 samsung,pin-function = <2>;
539 samsung,pin-pud = <3>;
540 samsung,pin-drv = <3>;
541 };
542
543 uart1_data: uart1-data {
544 samsung,pins = "gpd0-0", "gpd0-1";
545 samsung,pin-function = <2>;
546 samsung,pin-pud = <0>;
547 samsung,pin-drv = <0>;
548 };
549
550 uart1_fctl: uart1-fctl {
551 samsung,pins = "gpd0-2", "gpd0-3";
552 samsung,pin-function = <2>;
553 samsung,pin-pud = <0>;
554 samaung,pin-drv = <0>;
555 };
556 };
557
558 pinctrl@13400000 {
559 gpe0: gpe0 {
560 gpio-controller;
561 #gpio-cells = <2>;
562
563 interrupt-controller;
564 #interrupt-cells = <2>;
565 };
566
567 gpe1: gpe1 {
568 gpio-controller;
569 #gpio-cells = <2>;
570
571 interrupt-controller;
572 #interrupt-cells = <2>;
573 };
574
575 gpf0: gpf0 {
576 gpio-controller;
577 #gpio-cells = <2>;
578
579 interrupt-controller;
580 #interrupt-cells = <2>;
581 };
582
583 gpf1: gpf1 {
584 gpio-controller;
585 #gpio-cells = <2>;
586
587 interrupt-controller;
588 #interrupt-cells = <2>;
589 };
590
591 gpg0: gpg0 {
592 gpio-controller;
593 #gpio-cells = <2>;
594
595 interrupt-controller;
596 #interrupt-cells = <2>;
597 };
598
599 gpg1: gpg1 {
600 gpio-controller;
601 #gpio-cells = <2>;
602
603 interrupt-controller;
604 #interrupt-cells = <2>;
605 };
606
607 gpg2: gpg2 {
608 gpio-controller;
609 #gpio-cells = <2>;
610
611 interrupt-controller;
612 #interrupt-cells = <2>;
613 };
614
615 gph0: gph0 {
616 gpio-controller;
617 #gpio-cells = <2>;
618
619 interrupt-controller;
620 #interrupt-cells = <2>;
621 };
622
623 gph1: gph1 {
624 gpio-controller;
625 #gpio-cells = <2>;
626
627 interrupt-controller;
628 #interrupt-cells = <2>;
629 };
630
631 cam_gpio_a: cam-gpio-a {
632 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
633 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
634 "gpe1-0", "gpe1-1";
635 samsung,pin-function = <2>;
636 samsung,pin-pud = <0>;
637 samsung,pin-drv = <0>;
638 };
639
640 cam_gpio_b: cam-gpio-b {
641 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3",
642 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
643 samsung,pin-function = <3>;
644 samsung,pin-pud = <0>;
645 samaung,pin-drv = <0>;
646 };
647
648 cam_i2c2_bus: cam-i2c2-bus {
649 samsung,pins = "gpe0-6", "gpe1-0";
650 samsung,pin-function = <4>;
651 samsung,pin-pud = <3>;
652 samaung,pin-drv = <0>;
653 };
654
655 cam_spi1_bus: cam-spi1-bus {
656 samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3";
657 samsung,pin-function = <4>;
658 samsung,pin-pud = <0>;
659 samaung,pin-drv = <0>;
660 };
661
662 cam_i2c1_bus: cam-i2c1-bus {
663 samsung,pins = "gpf0-2", "gpf0-3";
664 samsung,pin-function = <2>;
665 samsung,pin-pud = <3>;
666 samaung,pin-drv = <0>;
667 };
668
669 cam_i2c0_bus: cam-i2c0-bus {
670 samsung,pins = "gpf0-0", "gpf0-1";
671 samsung,pin-function = <2>;
672 samsung,pin-pud = <3>;
673 samaung,pin-drv = <0>;
674 };
675
676 cam_spi0_bus: cam-spi0-bus {
677 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
678 samsung,pin-function = <2>;
679 samsung,pin-pud = <0>;
680 samaung,pin-drv = <0>;
681 };
682
683 cam_bayrgb_bus: cam-bayrgb-bus {
684 samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", "gpg0-3",
685 "gpg0-4", "gpg0-5", "gpg0-6", "gpg0-7",
686 "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3",
687 "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7",
688 "gpg2-0", "gpg2-1";
689 samsung,pin-function = <2>;
690 samsung,pin-pud = <0>;
691 samaung,pin-drv = <0>;
692 };
693
694 cam_port_a: cam-port-a {
695 samsung,pins = "gph0-0", "gph0-1", "gph0-2", "gph0-3",
696 "gph1-0", "gph1-1", "gph1-2", "gph1-3",
697 "gph1-4", "gph1-5", "gph1-6", "gph1-7";
698 samsung,pin-function = <2>;
699 samsung,pin-pud = <0>;
700 samaung,pin-drv = <0>;
701 };
702 };
703
704 pinctrl@10d10000 {
705 gpv0: gpv0 {
706 gpio-controller;
707 #gpio-cells = <2>;
708
709 interrupt-controller;
710 #interrupt-cells = <2>;
711 };
712
713 gpv1: gpv1 {
714 gpio-controller;
715 #gpio-cells = <2>;
716
717 interrupt-controller;
718 #interrupt-cells = <2>;
719 };
720
721 gpv2: gpv2 {
722 gpio-controller;
723 #gpio-cells = <2>;
724
725 interrupt-controller;
726 #interrupt-cells = <2>;
727 };
728
729 gpv3: gpv3 {
730 gpio-controller;
731 #gpio-cells = <2>;
732
733 interrupt-controller;
734 #interrupt-cells = <2>;
735 };
736
737 gpv4: gpv4 {
738 gpio-controller;
739 #gpio-cells = <2>;
740
741 interrupt-controller;
742 #interrupt-cells = <2>;
743 };
744
745 c2c_rxd: c2c-rxd {
746 samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3",
747 "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7",
748 "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3",
749 "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7";
750 samsung,pin-function = <2>;
751 samsung,pin-pud = <0>;
752 samaung,pin-drv = <0>;
753 };
754
755 c2c_txd: c2c-txd {
756 samsung,pins = "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3",
757 "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7",
758 "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
759 "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7";
760 samsung,pin-function = <2>;
761 samsung,pin-pud = <0>;
762 samaung,pin-drv = <0>;
763 };
764 };
765
766 pinctrl@03680000 {
767 gpz: gpz {
768 gpio-controller;
769 #gpio-cells = <2>;
770
771 interrupt-controller;
772 #interrupt-cells = <2>;
773 };
774
775 i2s0_bus: i2s0-bus {
776 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
777 "gpz-4", "gpz-5", "gpz-6";
778 samsung,pin-function = <2>;
779 samsung,pin-pud = <0>;
780 samsung,pin-drv = <0>;
781 };
782 };
783};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 1b8d4106d338..26d856ba50a1 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -30,8 +30,6 @@
30 i2c@12C60000 { 30 i2c@12C60000 {
31 samsung,i2c-sda-delay = <100>; 31 samsung,i2c-sda-delay = <100>;
32 samsung,i2c-max-bus-freq = <20000>; 32 samsung,i2c-max-bus-freq = <20000>;
33 gpios = <&gpb3 0 2 3 0>,
34 <&gpb3 1 2 3 0>;
35 33
36 eeprom@50 { 34 eeprom@50 {
37 compatible = "samsung,s524ad0xd1"; 35 compatible = "samsung,s524ad0xd1";
@@ -42,8 +40,6 @@
42 i2c@12C70000 { 40 i2c@12C70000 {
43 samsung,i2c-sda-delay = <100>; 41 samsung,i2c-sda-delay = <100>;
44 samsung,i2c-max-bus-freq = <20000>; 42 samsung,i2c-max-bus-freq = <20000>;
45 gpios = <&gpb3 2 2 3 0>,
46 <&gpb3 3 2 3 0>;
47 43
48 eeprom@51 { 44 eeprom@51 {
49 compatible = "samsung,s524ad0xd1"; 45 compatible = "samsung,s524ad0xd1";
@@ -74,8 +70,6 @@
74 i2c@12C80000 { 70 i2c@12C80000 {
75 samsung,i2c-sda-delay = <100>; 71 samsung,i2c-sda-delay = <100>;
76 samsung,i2c-max-bus-freq = <66000>; 72 samsung,i2c-max-bus-freq = <66000>;
77 gpios = <&gpa0 6 3 3 0>,
78 <&gpa0 7 3 3 0>;
79 73
80 hdmiddc@50 { 74 hdmiddc@50 {
81 compatible = "samsung,exynos5-hdmiddc"; 75 compatible = "samsung,exynos5-hdmiddc";
@@ -122,15 +116,12 @@
122 samsung,dw-mshc-ciu-div = <3>; 116 samsung,dw-mshc-ciu-div = <3>;
123 samsung,dw-mshc-sdr-timing = <2 3>; 117 samsung,dw-mshc-sdr-timing = <2 3>;
124 samsung,dw-mshc-ddr-timing = <1 2>; 118 samsung,dw-mshc-ddr-timing = <1 2>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
125 121
126 slot@0 { 122 slot@0 {
127 reg = <0>; 123 reg = <0>;
128 bus-width = <8>; 124 bus-width = <8>;
129 gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
130 <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
131 <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
132 <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
133 <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
134 }; 125 };
135 }; 126 };
136 127
@@ -146,17 +137,13 @@
146 samsung,dw-mshc-ciu-div = <3>; 137 samsung,dw-mshc-ciu-div = <3>;
147 samsung,dw-mshc-sdr-timing = <2 3>; 138 samsung,dw-mshc-sdr-timing = <2 3>;
148 samsung,dw-mshc-ddr-timing = <1 2>; 139 samsung,dw-mshc-ddr-timing = <1 2>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
149 142
150 slot@0 { 143 slot@0 {
151 reg = <0>; 144 reg = <0>;
152 bus-width = <4>; 145 bus-width = <4>;
153 samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
154 disable-wp; 146 disable-wp;
155 gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
156 <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
157 <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>,
158 <&gpc4 3 3 3 3>, <&gpc4 3 3 3 3>,
159 <&gpc4 5 3 3 3>, <&gpc4 6 3 3 3>;
160 }; 147 };
161 }; 148 };
162 149
@@ -169,10 +156,6 @@
169 }; 156 };
170 157
171 spi_1: spi@12d30000 { 158 spi_1: spi@12d30000 {
172 gpios = <&gpa2 4 2 3 0>,
173 <&gpa2 6 2 3 0>,
174 <&gpa2 7 2 3 0>;
175
176 w25q80bw@0 { 159 w25q80bw@0 {
177 #address-cells = <1>; 160 #address-cells = <1>;
178 #size-cells = <1>; 161 #size-cells = <1>;
@@ -181,7 +164,7 @@
181 spi-max-frequency = <1000000>; 164 spi-max-frequency = <1000000>;
182 165
183 controller-data { 166 controller-data {
184 cs-gpio = <&gpa2 5 1 0 3>; 167 cs-gpio = <&gpa2 5 0>;
185 samsung,spi-feedback-delay = <0>; 168 samsung,spi-feedback-delay = <0>;
186 }; 169 };
187 170
@@ -203,7 +186,7 @@
203 }; 186 };
204 187
205 hdmi { 188 hdmi {
206 hpd-gpio = <&gpx3 7 0xf 1 3>; 189 hpd-gpio = <&gpx3 7 0>;
207 }; 190 };
208 191
209 codec@11000000 { 192 codec@11000000 {
@@ -212,9 +195,7 @@
212 }; 195 };
213 196
214 i2s0: i2s@03830000 { 197 i2s0: i2s@03830000 {
215 gpios = <&gpz 0 2 0 0>, <&gpz 1 2 0 0>, <&gpz 2 2 0 0>, 198 status = "okay";
216 <&gpz 3 2 0 0>, <&gpz 4 2 0 0>, <&gpz 5 2 0 0>,
217 <&gpz 6 2 0 0>;
218 }; 199 };
219 200
220 i2s1: i2s@12D60000 { 201 i2s1: i2s@12D60000 {
@@ -231,4 +212,40 @@
231 samsung,i2s-controller = <&i2s0>; 212 samsung,i2s-controller = <&i2s0>;
232 samsung,audio-codec = <&wm8994>; 213 samsung,audio-codec = <&wm8994>;
233 }; 214 };
215
216 usb@12110000 {
217 samsung,vbus-gpio = <&gpx2 6 1 3 3>;
218 };
219
220 dp-controller {
221 samsung,color-space = <0>;
222 samsung,dynamic-range = <0>;
223 samsung,ycbcr-coeff = <0>;
224 samsung,color-depth = <1>;
225 samsung,link-rate = <0x0a>;
226 samsung,lane-count = <4>;
227 };
228
229 display-timings {
230 native-mode = <&timing0>;
231 timing0: timing@0 {
232 /* 1280x800 */
233 clock-frequency = <50000>;
234 hactive = <1280>;
235 vactive = <800>;
236 hfront-porch = <4>;
237 hback-porch = <4>;
238 hsync-len = <4>;
239 vback-porch = <4>;
240 vfront-porch = <4>;
241 vsync-len = <4>;
242 };
243 };
244
245 fixed-rate-clocks {
246 xxti {
247 compatible = "samsung,clock-xxti";
248 clock-frequency = <24000000>;
249 };
250 };
234}; 251};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index 17dd951c1cd2..581ffae27e13 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -16,12 +16,27 @@
16 model = "Google Snow"; 16 model = "Google Snow";
17 compatible = "google,snow", "samsung,exynos5250"; 17 compatible = "google,snow", "samsung,exynos5250";
18 18
19 pinctrl@11400000 {
20 sd3_clk: sd3-clk {
21 samsung,pin-drv = <0>;
22 };
23
24 sd3_cmd: sd3-cmd {
25 samsung,pin-pud = <3>;
26 samsung,pin-drv = <0>;
27 };
28
29 sd3_bus4: sd3-bus-width4 {
30 samsung,pin-drv = <0>;
31 };
32 };
33
19 gpio-keys { 34 gpio-keys {
20 compatible = "gpio-keys"; 35 compatible = "gpio-keys";
21 36
22 lid-switch { 37 lid-switch {
23 label = "Lid"; 38 label = "Lid";
24 gpios = <&gpx3 5 0 0x10000 0>; 39 gpios = <&gpx3 5 1>;
25 linux,input-type = <5>; /* EV_SW */ 40 linux,input-type = <5>; /* EV_SW */
26 linux,code = <0>; /* SW_LID */ 41 linux,code = <0>; /* SW_LID */
27 debounce-interval = <1>; 42 debounce-interval = <1>;
@@ -35,9 +50,19 @@
35 */ 50 */
36 dwmmc3@12230000 { 51 dwmmc3@12230000 {
37 slot@0 { 52 slot@0 {
38 gpios = <&gpc4 0 2 0 0>, <&gpc4 1 2 3 0>, 53 pinctrl-names = "default";
39 <&gpc4 3 2 3 0>, <&gpc4 4 2 3 0>, 54 pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
40 <&gpc4 5 2 3 0>, <&gpc4 6 2 3 0>; 55 };
56 };
57
58 usb@12110000 {
59 samsung,vbus-gpio = <&gpx1 1 1 3 3>;
60 };
61
62 fixed-rate-clocks {
63 xxti {
64 compatible = "samsung,clock-xxti";
65 clock-frequency = <24000000>;
41 }; 66 };
42 }; 67 };
43}; 68};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b1ac73e21c80..af66e6b7bc77 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -18,6 +18,7 @@
18*/ 18*/
19 19
20/include/ "skeleton.dtsi" 20/include/ "skeleton.dtsi"
21/include/ "exynos5250-pinctrl.dtsi"
21 22
22/ { 23/ {
23 compatible = "samsung,exynos5250"; 24 compatible = "samsung,exynos5250";
@@ -44,13 +45,45 @@
44 i2c6 = &i2c_6; 45 i2c6 = &i2c_6;
45 i2c7 = &i2c_7; 46 i2c7 = &i2c_7;
46 i2c8 = &i2c_8; 47 i2c8 = &i2c_8;
48 pinctrl0 = &pinctrl_0;
49 pinctrl1 = &pinctrl_1;
50 pinctrl2 = &pinctrl_2;
51 pinctrl3 = &pinctrl_3;
52 };
53
54 pd_gsc: gsc-power-domain@0x10044000 {
55 compatible = "samsung,exynos4210-pd";
56 reg = <0x10044000 0x20>;
57 };
58
59 pd_mfc: mfc-power-domain@0x10044040 {
60 compatible = "samsung,exynos4210-pd";
61 reg = <0x10044040 0x20>;
62 };
63
64 clock: clock-controller@0x10010000 {
65 compatible = "samsung,exynos5250-clock";
66 reg = <0x10010000 0x30000>;
67 #clock-cells = <1>;
47 }; 68 };
48 69
49 gic:interrupt-controller@10481000 { 70 gic:interrupt-controller@10481000 {
50 compatible = "arm,cortex-a9-gic"; 71 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
51 #interrupt-cells = <3>; 72 #interrupt-cells = <3>;
52 interrupt-controller; 73 interrupt-controller;
53 reg = <0x10481000 0x1000>, <0x10482000 0x2000>; 74 reg = <0x10481000 0x1000>,
75 <0x10482000 0x1000>,
76 <0x10484000 0x2000>,
77 <0x10486000 0x2000>;
78 interrupts = <1 9 0xf04>;
79 };
80
81 timer {
82 compatible = "arm,armv7-timer";
83 interrupts = <1 13 0xf08>,
84 <1 14 0xf08>,
85 <1 11 0xf08>,
86 <1 10 0xf08>;
54 }; 87 };
55 88
56 combiner:interrupt-controller@10440000 { 89 combiner:interrupt-controller@10440000 {
@@ -69,58 +102,129 @@
69 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 102 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
70 }; 103 };
71 104
105 mct@101C0000 {
106 compatible = "samsung,exynos4210-mct";
107 reg = <0x101C0000 0x800>;
108 interrupt-controller;
109 #interrups-cells = <2>;
110 interrupt-parent = <&mct_map>;
111 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
112 <4 0>, <5 0>;
113 clocks = <&clock 1>, <&clock 335>;
114 clock-names = "fin_pll", "mct";
115
116 mct_map: mct-map {
117 #interrupt-cells = <2>;
118 #address-cells = <0>;
119 #size-cells = <0>;
120 interrupt-map = <0x0 0 &combiner 23 3>,
121 <0x1 0 &combiner 23 4>,
122 <0x2 0 &combiner 25 2>,
123 <0x3 0 &combiner 25 3>,
124 <0x4 0 &gic 0 120 0>,
125 <0x5 0 &gic 0 121 0>;
126 };
127 };
128
129 pinctrl_0: pinctrl@11400000 {
130 compatible = "samsung,exynos5250-pinctrl";
131 reg = <0x11400000 0x1000>;
132 interrupts = <0 46 0>;
133
134 wakup_eint: wakeup-interrupt-controller {
135 compatible = "samsung,exynos4210-wakeup-eint";
136 interrupt-parent = <&gic>;
137 interrupts = <0 32 0>;
138 };
139 };
140
141 pinctrl_1: pinctrl@13400000 {
142 compatible = "samsung,exynos5250-pinctrl";
143 reg = <0x13400000 0x1000>;
144 interrupts = <0 45 0>;
145 };
146
147 pinctrl_2: pinctrl@10d10000 {
148 compatible = "samsung,exynos5250-pinctrl";
149 reg = <0x10d10000 0x1000>;
150 interrupts = <0 50 0>;
151 };
152
153 pinctrl_3: pinctrl@03680000 {
154 compatible = "samsung,exynos5250-pinctrl";
155 reg = <0x0368000 0x1000>;
156 interrupts = <0 47 0>;
157 };
158
72 watchdog { 159 watchdog {
73 compatible = "samsung,s3c2410-wdt"; 160 compatible = "samsung,s3c2410-wdt";
74 reg = <0x101D0000 0x100>; 161 reg = <0x101D0000 0x100>;
75 interrupts = <0 42 0>; 162 interrupts = <0 42 0>;
163 clocks = <&clock 336>;
164 clock-names = "watchdog";
76 }; 165 };
77 166
78 codec@11000000 { 167 codec@11000000 {
79 compatible = "samsung,mfc-v6"; 168 compatible = "samsung,mfc-v6";
80 reg = <0x11000000 0x10000>; 169 reg = <0x11000000 0x10000>;
81 interrupts = <0 96 0>; 170 interrupts = <0 96 0>;
171 samsung,power-domain = <&pd_mfc>;
82 }; 172 };
83 173
84 rtc { 174 rtc {
85 compatible = "samsung,s3c6410-rtc"; 175 compatible = "samsung,s3c6410-rtc";
86 reg = <0x101E0000 0x100>; 176 reg = <0x101E0000 0x100>;
87 interrupts = <0 43 0>, <0 44 0>; 177 interrupts = <0 43 0>, <0 44 0>;
178 clocks = <&clock 337>;
179 clock-names = "rtc";
88 }; 180 };
89 181
90 tmu@10060000 { 182 tmu@10060000 {
91 compatible = "samsung,exynos5250-tmu"; 183 compatible = "samsung,exynos5250-tmu";
92 reg = <0x10060000 0x100>; 184 reg = <0x10060000 0x100>;
93 interrupts = <0 65 0>; 185 interrupts = <0 65 0>;
186 clocks = <&clock 338>;
187 clock-names = "tmu_apbif";
94 }; 188 };
95 189
96 serial@12C00000 { 190 serial@12C00000 {
97 compatible = "samsung,exynos4210-uart"; 191 compatible = "samsung,exynos4210-uart";
98 reg = <0x12C00000 0x100>; 192 reg = <0x12C00000 0x100>;
99 interrupts = <0 51 0>; 193 interrupts = <0 51 0>;
194 clocks = <&clock 289>, <&clock 146>;
195 clock-names = "uart", "clk_uart_baud0";
100 }; 196 };
101 197
102 serial@12C10000 { 198 serial@12C10000 {
103 compatible = "samsung,exynos4210-uart"; 199 compatible = "samsung,exynos4210-uart";
104 reg = <0x12C10000 0x100>; 200 reg = <0x12C10000 0x100>;
105 interrupts = <0 52 0>; 201 interrupts = <0 52 0>;
202 clocks = <&clock 290>, <&clock 147>;
203 clock-names = "uart", "clk_uart_baud0";
106 }; 204 };
107 205
108 serial@12C20000 { 206 serial@12C20000 {
109 compatible = "samsung,exynos4210-uart"; 207 compatible = "samsung,exynos4210-uart";
110 reg = <0x12C20000 0x100>; 208 reg = <0x12C20000 0x100>;
111 interrupts = <0 53 0>; 209 interrupts = <0 53 0>;
210 clocks = <&clock 291>, <&clock 148>;
211 clock-names = "uart", "clk_uart_baud0";
112 }; 212 };
113 213
114 serial@12C30000 { 214 serial@12C30000 {
115 compatible = "samsung,exynos4210-uart"; 215 compatible = "samsung,exynos4210-uart";
116 reg = <0x12C30000 0x100>; 216 reg = <0x12C30000 0x100>;
117 interrupts = <0 54 0>; 217 interrupts = <0 54 0>;
218 clocks = <&clock 292>, <&clock 149>;
219 clock-names = "uart", "clk_uart_baud0";
118 }; 220 };
119 221
120 sata@122F0000 { 222 sata@122F0000 {
121 compatible = "samsung,exynos5-sata-ahci"; 223 compatible = "samsung,exynos5-sata-ahci";
122 reg = <0x122F0000 0x1ff>; 224 reg = <0x122F0000 0x1ff>;
123 interrupts = <0 115 0>; 225 interrupts = <0 115 0>;
226 clocks = <&clock 277>, <&clock 143>;
227 clock-names = "sata", "sclk_sata";
124 }; 228 };
125 229
126 sata-phy@12170000 { 230 sata-phy@12170000 {
@@ -134,6 +238,10 @@
134 interrupts = <0 56 0>; 238 interrupts = <0 56 0>;
135 #address-cells = <1>; 239 #address-cells = <1>;
136 #size-cells = <0>; 240 #size-cells = <0>;
241 clocks = <&clock 294>;
242 clock-names = "i2c";
243 pinctrl-names = "default";
244 pinctrl-0 = <&i2c0_bus>;
137 }; 245 };
138 246
139 i2c_1: i2c@12C70000 { 247 i2c_1: i2c@12C70000 {
@@ -142,6 +250,10 @@
142 interrupts = <0 57 0>; 250 interrupts = <0 57 0>;
143 #address-cells = <1>; 251 #address-cells = <1>;
144 #size-cells = <0>; 252 #size-cells = <0>;
253 clocks = <&clock 295>;
254 clock-names = "i2c";
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c1_bus>;
145 }; 257 };
146 258
147 i2c_2: i2c@12C80000 { 259 i2c_2: i2c@12C80000 {
@@ -150,6 +262,10 @@
150 interrupts = <0 58 0>; 262 interrupts = <0 58 0>;
151 #address-cells = <1>; 263 #address-cells = <1>;
152 #size-cells = <0>; 264 #size-cells = <0>;
265 clocks = <&clock 296>;
266 clock-names = "i2c";
267 pinctrl-names = "default";
268 pinctrl-0 = <&i2c2_bus>;
153 }; 269 };
154 270
155 i2c_3: i2c@12C90000 { 271 i2c_3: i2c@12C90000 {
@@ -158,6 +274,10 @@
158 interrupts = <0 59 0>; 274 interrupts = <0 59 0>;
159 #address-cells = <1>; 275 #address-cells = <1>;
160 #size-cells = <0>; 276 #size-cells = <0>;
277 clocks = <&clock 297>;
278 clock-names = "i2c";
279 pinctrl-names = "default";
280 pinctrl-0 = <&i2c3_bus>;
161 }; 281 };
162 282
163 i2c_4: i2c@12CA0000 { 283 i2c_4: i2c@12CA0000 {
@@ -166,6 +286,10 @@
166 interrupts = <0 60 0>; 286 interrupts = <0 60 0>;
167 #address-cells = <1>; 287 #address-cells = <1>;
168 #size-cells = <0>; 288 #size-cells = <0>;
289 clocks = <&clock 298>;
290 clock-names = "i2c";
291 pinctrl-names = "default";
292 pinctrl-0 = <&i2c4_bus>;
169 }; 293 };
170 294
171 i2c_5: i2c@12CB0000 { 295 i2c_5: i2c@12CB0000 {
@@ -174,6 +298,10 @@
174 interrupts = <0 61 0>; 298 interrupts = <0 61 0>;
175 #address-cells = <1>; 299 #address-cells = <1>;
176 #size-cells = <0>; 300 #size-cells = <0>;
301 clocks = <&clock 299>;
302 clock-names = "i2c";
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c5_bus>;
177 }; 305 };
178 306
179 i2c_6: i2c@12CC0000 { 307 i2c_6: i2c@12CC0000 {
@@ -182,6 +310,10 @@
182 interrupts = <0 62 0>; 310 interrupts = <0 62 0>;
183 #address-cells = <1>; 311 #address-cells = <1>;
184 #size-cells = <0>; 312 #size-cells = <0>;
313 clocks = <&clock 300>;
314 clock-names = "i2c";
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c6_bus>;
185 }; 317 };
186 318
187 i2c_7: i2c@12CD0000 { 319 i2c_7: i2c@12CD0000 {
@@ -190,6 +322,10 @@
190 interrupts = <0 63 0>; 322 interrupts = <0 63 0>;
191 #address-cells = <1>; 323 #address-cells = <1>;
192 #size-cells = <0>; 324 #size-cells = <0>;
325 clocks = <&clock 301>;
326 clock-names = "i2c";
327 pinctrl-names = "default";
328 pinctrl-0 = <&i2c7_bus>;
193 }; 329 };
194 330
195 i2c_8: i2c@12CE0000 { 331 i2c_8: i2c@12CE0000 {
@@ -198,6 +334,8 @@
198 interrupts = <0 64 0>; 334 interrupts = <0 64 0>;
199 #address-cells = <1>; 335 #address-cells = <1>;
200 #size-cells = <0>; 336 #size-cells = <0>;
337 clocks = <&clock 302>;
338 clock-names = "i2c";
201 }; 339 };
202 340
203 i2c@121D0000 { 341 i2c@121D0000 {
@@ -205,6 +343,8 @@
205 reg = <0x121D0000 0x100>; 343 reg = <0x121D0000 0x100>;
206 #address-cells = <1>; 344 #address-cells = <1>;
207 #size-cells = <0>; 345 #size-cells = <0>;
346 clocks = <&clock 288>;
347 clock-names = "i2c";
208 }; 348 };
209 349
210 spi_0: spi@12d20000 { 350 spi_0: spi@12d20000 {
@@ -216,6 +356,10 @@
216 dma-names = "tx", "rx"; 356 dma-names = "tx", "rx";
217 #address-cells = <1>; 357 #address-cells = <1>;
218 #size-cells = <0>; 358 #size-cells = <0>;
359 clocks = <&clock 304>, <&clock 154>;
360 clock-names = "spi", "spi_busclk0";
361 pinctrl-names = "default";
362 pinctrl-0 = <&spi0_bus>;
219 }; 363 };
220 364
221 spi_1: spi@12d30000 { 365 spi_1: spi@12d30000 {
@@ -227,6 +371,10 @@
227 dma-names = "tx", "rx"; 371 dma-names = "tx", "rx";
228 #address-cells = <1>; 372 #address-cells = <1>;
229 #size-cells = <0>; 373 #size-cells = <0>;
374 clocks = <&clock 305>, <&clock 155>;
375 clock-names = "spi", "spi_busclk0";
376 pinctrl-names = "default";
377 pinctrl-0 = <&spi1_bus>;
230 }; 378 };
231 379
232 spi_2: spi@12d40000 { 380 spi_2: spi@12d40000 {
@@ -238,6 +386,10 @@
238 dma-names = "tx", "rx"; 386 dma-names = "tx", "rx";
239 #address-cells = <1>; 387 #address-cells = <1>;
240 #size-cells = <0>; 388 #size-cells = <0>;
389 clocks = <&clock 306>, <&clock 156>;
390 clock-names = "spi", "spi_busclk0";
391 pinctrl-names = "default";
392 pinctrl-0 = <&spi2_bus>;
241 }; 393 };
242 394
243 dwmmc_0: dwmmc0@12200000 { 395 dwmmc_0: dwmmc0@12200000 {
@@ -246,6 +398,8 @@
246 interrupts = <0 75 0>; 398 interrupts = <0 75 0>;
247 #address-cells = <1>; 399 #address-cells = <1>;
248 #size-cells = <0>; 400 #size-cells = <0>;
401 clocks = <&clock 280>, <&clock 139>;
402 clock-names = "biu", "ciu";
249 }; 403 };
250 404
251 dwmmc_1: dwmmc1@12210000 { 405 dwmmc_1: dwmmc1@12210000 {
@@ -254,6 +408,8 @@
254 interrupts = <0 76 0>; 408 interrupts = <0 76 0>;
255 #address-cells = <1>; 409 #address-cells = <1>;
256 #size-cells = <0>; 410 #size-cells = <0>;
411 clocks = <&clock 281>, <&clock 140>;
412 clock-names = "biu", "ciu";
257 }; 413 };
258 414
259 dwmmc_2: dwmmc2@12220000 { 415 dwmmc_2: dwmmc2@12220000 {
@@ -262,6 +418,8 @@
262 interrupts = <0 77 0>; 418 interrupts = <0 77 0>;
263 #address-cells = <1>; 419 #address-cells = <1>;
264 #size-cells = <0>; 420 #size-cells = <0>;
421 clocks = <&clock 282>, <&clock 141>;
422 clock-names = "biu", "ciu";
265 }; 423 };
266 424
267 dwmmc_3: dwmmc3@12230000 { 425 dwmmc_3: dwmmc3@12230000 {
@@ -270,6 +428,8 @@
270 interrupts = <0 78 0>; 428 interrupts = <0 78 0>;
271 #address-cells = <1>; 429 #address-cells = <1>;
272 #size-cells = <0>; 430 #size-cells = <0>;
431 clocks = <&clock 283>, <&clock 142>;
432 clock-names = "biu", "ciu";
273 }; 433 };
274 434
275 i2s0: i2s@03830000 { 435 i2s0: i2s@03830000 {
@@ -283,6 +443,8 @@
283 samsung,supports-rstclr; 443 samsung,supports-rstclr;
284 samsung,supports-secdai; 444 samsung,supports-secdai;
285 samsung,idma-addr = <0x03000000>; 445 samsung,idma-addr = <0x03000000>;
446 pinctrl-names = "default";
447 pinctrl-0 = <&i2s0_bus>;
286 }; 448 };
287 449
288 i2s1: i2s@12D60000 { 450 i2s1: i2s@12D60000 {
@@ -291,6 +453,8 @@
291 dmas = <&pdma1 12 453 dmas = <&pdma1 12
292 &pdma1 11>; 454 &pdma1 11>;
293 dma-names = "tx", "rx"; 455 dma-names = "tx", "rx";
456 pinctrl-names = "default";
457 pinctrl-0 = <&i2s1_bus>;
294 }; 458 };
295 459
296 i2s2: i2s@12D70000 { 460 i2s2: i2s@12D70000 {
@@ -299,6 +463,26 @@
299 dmas = <&pdma0 12 463 dmas = <&pdma0 12
300 &pdma0 11>; 464 &pdma0 11>;
301 dma-names = "tx", "rx"; 465 dma-names = "tx", "rx";
466 pinctrl-names = "default";
467 pinctrl-0 = <&i2s2_bus>;
468 };
469
470 usb@12110000 {
471 compatible = "samsung,exynos4210-ehci";
472 reg = <0x12110000 0x100>;
473 interrupts = <0 71 0>;
474
475 clocks = <&clock 285>;
476 clock-names = "usbhost";
477 };
478
479 usb@12120000 {
480 compatible = "samsung,exynos4210-ohci";
481 reg = <0x12120000 0x100>;
482 interrupts = <0 71 0>;
483
484 clocks = <&clock 285>;
485 clock-names = "usbhost";
302 }; 486 };
303 487
304 amba { 488 amba {
@@ -312,6 +496,8 @@
312 compatible = "arm,pl330", "arm,primecell"; 496 compatible = "arm,pl330", "arm,primecell";
313 reg = <0x121A0000 0x1000>; 497 reg = <0x121A0000 0x1000>;
314 interrupts = <0 34 0>; 498 interrupts = <0 34 0>;
499 clocks = <&clock 275>;
500 clock-names = "apb_pclk";
315 #dma-cells = <1>; 501 #dma-cells = <1>;
316 #dma-channels = <8>; 502 #dma-channels = <8>;
317 #dma-requests = <32>; 503 #dma-requests = <32>;
@@ -321,6 +507,8 @@
321 compatible = "arm,pl330", "arm,primecell"; 507 compatible = "arm,pl330", "arm,primecell";
322 reg = <0x121B0000 0x1000>; 508 reg = <0x121B0000 0x1000>;
323 interrupts = <0 35 0>; 509 interrupts = <0 35 0>;
510 clocks = <&clock 276>;
511 clock-names = "apb_pclk";
324 #dma-cells = <1>; 512 #dma-cells = <1>;
325 #dma-channels = <8>; 513 #dma-channels = <8>;
326 #dma-requests = <32>; 514 #dma-requests = <32>;
@@ -330,6 +518,8 @@
330 compatible = "arm,pl330", "arm,primecell"; 518 compatible = "arm,pl330", "arm,primecell";
331 reg = <0x10800000 0x1000>; 519 reg = <0x10800000 0x1000>;
332 interrupts = <0 33 0>; 520 interrupts = <0 33 0>;
521 clocks = <&clock 271>;
522 clock-names = "apb_pclk";
333 #dma-cells = <1>; 523 #dma-cells = <1>;
334 #dma-channels = <8>; 524 #dma-channels = <8>;
335 #dma-requests = <1>; 525 #dma-requests = <1>;
@@ -339,287 +529,58 @@
339 compatible = "arm,pl330", "arm,primecell"; 529 compatible = "arm,pl330", "arm,primecell";
340 reg = <0x11C10000 0x1000>; 530 reg = <0x11C10000 0x1000>;
341 interrupts = <0 124 0>; 531 interrupts = <0 124 0>;
532 clocks = <&clock 271>;
533 clock-names = "apb_pclk";
342 #dma-cells = <1>; 534 #dma-cells = <1>;
343 #dma-channels = <8>; 535 #dma-channels = <8>;
344 #dma-requests = <1>; 536 #dma-requests = <1>;
345 }; 537 };
346 }; 538 };
347 539
348 gpio-controllers {
349 #address-cells = <1>;
350 #size-cells = <1>;
351 gpio-controller;
352 ranges;
353
354 gpa0: gpio-controller@11400000 {
355 compatible = "samsung,exynos4-gpio";
356 reg = <0x11400000 0x20>;
357 #gpio-cells = <4>;
358 };
359
360 gpa1: gpio-controller@11400020 {
361 compatible = "samsung,exynos4-gpio";
362 reg = <0x11400020 0x20>;
363 #gpio-cells = <4>;
364 };
365
366 gpa2: gpio-controller@11400040 {
367 compatible = "samsung,exynos4-gpio";
368 reg = <0x11400040 0x20>;
369 #gpio-cells = <4>;
370 };
371
372 gpb0: gpio-controller@11400060 {
373 compatible = "samsung,exynos4-gpio";
374 reg = <0x11400060 0x20>;
375 #gpio-cells = <4>;
376 };
377
378 gpb1: gpio-controller@11400080 {
379 compatible = "samsung,exynos4-gpio";
380 reg = <0x11400080 0x20>;
381 #gpio-cells = <4>;
382 };
383
384 gpb2: gpio-controller@114000A0 {
385 compatible = "samsung,exynos4-gpio";
386 reg = <0x114000A0 0x20>;
387 #gpio-cells = <4>;
388 };
389
390 gpb3: gpio-controller@114000C0 {
391 compatible = "samsung,exynos4-gpio";
392 reg = <0x114000C0 0x20>;
393 #gpio-cells = <4>;
394 };
395
396 gpc0: gpio-controller@114000E0 {
397 compatible = "samsung,exynos4-gpio";
398 reg = <0x114000E0 0x20>;
399 #gpio-cells = <4>;
400 };
401
402 gpc1: gpio-controller@11400100 {
403 compatible = "samsung,exynos4-gpio";
404 reg = <0x11400100 0x20>;
405 #gpio-cells = <4>;
406 };
407
408 gpc2: gpio-controller@11400120 {
409 compatible = "samsung,exynos4-gpio";
410 reg = <0x11400120 0x20>;
411 #gpio-cells = <4>;
412 };
413
414 gpc3: gpio-controller@11400140 {
415 compatible = "samsung,exynos4-gpio";
416 reg = <0x11400140 0x20>;
417 #gpio-cells = <4>;
418 };
419
420 gpc4: gpio-controller@114002E0 {
421 compatible = "samsung,exynos4-gpio";
422 reg = <0x114002E0 0x20>;
423 #gpio-cells = <4>;
424 };
425
426 gpd0: gpio-controller@11400160 {
427 compatible = "samsung,exynos4-gpio";
428 reg = <0x11400160 0x20>;
429 #gpio-cells = <4>;
430 };
431
432 gpd1: gpio-controller@11400180 {
433 compatible = "samsung,exynos4-gpio";
434 reg = <0x11400180 0x20>;
435 #gpio-cells = <4>;
436 };
437
438 gpy0: gpio-controller@114001A0 {
439 compatible = "samsung,exynos4-gpio";
440 reg = <0x114001A0 0x20>;
441 #gpio-cells = <4>;
442 };
443
444 gpy1: gpio-controller@114001C0 {
445 compatible = "samsung,exynos4-gpio";
446 reg = <0x114001C0 0x20>;
447 #gpio-cells = <4>;
448 };
449
450 gpy2: gpio-controller@114001E0 {
451 compatible = "samsung,exynos4-gpio";
452 reg = <0x114001E0 0x20>;
453 #gpio-cells = <4>;
454 };
455
456 gpy3: gpio-controller@11400200 {
457 compatible = "samsung,exynos4-gpio";
458 reg = <0x11400200 0x20>;
459 #gpio-cells = <4>;
460 };
461
462 gpy4: gpio-controller@11400220 {
463 compatible = "samsung,exynos4-gpio";
464 reg = <0x11400220 0x20>;
465 #gpio-cells = <4>;
466 };
467
468 gpy5: gpio-controller@11400240 {
469 compatible = "samsung,exynos4-gpio";
470 reg = <0x11400240 0x20>;
471 #gpio-cells = <4>;
472 };
473
474 gpy6: gpio-controller@11400260 {
475 compatible = "samsung,exynos4-gpio";
476 reg = <0x11400260 0x20>;
477 #gpio-cells = <4>;
478 };
479
480 gpx0: gpio-controller@11400C00 {
481 compatible = "samsung,exynos4-gpio";
482 reg = <0x11400C00 0x20>;
483 #gpio-cells = <4>;
484 };
485
486 gpx1: gpio-controller@11400C20 {
487 compatible = "samsung,exynos4-gpio";
488 reg = <0x11400C20 0x20>;
489 #gpio-cells = <4>;
490 };
491
492 gpx2: gpio-controller@11400C40 {
493 compatible = "samsung,exynos4-gpio";
494 reg = <0x11400C40 0x20>;
495 #gpio-cells = <4>;
496 };
497
498 gpx3: gpio-controller@11400C60 {
499 compatible = "samsung,exynos4-gpio";
500 reg = <0x11400C60 0x20>;
501 #gpio-cells = <4>;
502 };
503
504 gpe0: gpio-controller@13400000 {
505 compatible = "samsung,exynos4-gpio";
506 reg = <0x13400000 0x20>;
507 #gpio-cells = <4>;
508 };
509
510 gpe1: gpio-controller@13400020 {
511 compatible = "samsung,exynos4-gpio";
512 reg = <0x13400020 0x20>;
513 #gpio-cells = <4>;
514 };
515
516 gpf0: gpio-controller@13400040 {
517 compatible = "samsung,exynos4-gpio";
518 reg = <0x13400040 0x20>;
519 #gpio-cells = <4>;
520 };
521
522 gpf1: gpio-controller@13400060 {
523 compatible = "samsung,exynos4-gpio";
524 reg = <0x13400060 0x20>;
525 #gpio-cells = <4>;
526 };
527
528 gpg0: gpio-controller@13400080 {
529 compatible = "samsung,exynos4-gpio";
530 reg = <0x13400080 0x20>;
531 #gpio-cells = <4>;
532 };
533
534 gpg1: gpio-controller@134000A0 {
535 compatible = "samsung,exynos4-gpio";
536 reg = <0x134000A0 0x20>;
537 #gpio-cells = <4>;
538 };
539
540 gpg2: gpio-controller@134000C0 {
541 compatible = "samsung,exynos4-gpio";
542 reg = <0x134000C0 0x20>;
543 #gpio-cells = <4>;
544 };
545
546 gph0: gpio-controller@134000E0 {
547 compatible = "samsung,exynos4-gpio";
548 reg = <0x134000E0 0x20>;
549 #gpio-cells = <4>;
550 };
551
552 gph1: gpio-controller@13400100 {
553 compatible = "samsung,exynos4-gpio";
554 reg = <0x13400100 0x20>;
555 #gpio-cells = <4>;
556 };
557
558 gpv0: gpio-controller@10D10000 {
559 compatible = "samsung,exynos4-gpio";
560 reg = <0x10D10000 0x20>;
561 #gpio-cells = <4>;
562 };
563
564 gpv1: gpio-controller@10D10020 {
565 compatible = "samsung,exynos4-gpio";
566 reg = <0x10D10020 0x20>;
567 #gpio-cells = <4>;
568 };
569
570 gpv2: gpio-controller@10D10040 {
571 compatible = "samsung,exynos4-gpio";
572 reg = <0x10D10060 0x20>;
573 #gpio-cells = <4>;
574 };
575
576 gpv3: gpio-controller@10D10060 {
577 compatible = "samsung,exynos4-gpio";
578 reg = <0x10D10080 0x20>;
579 #gpio-cells = <4>;
580 };
581
582 gpv4: gpio-controller@10D10080 {
583 compatible = "samsung,exynos4-gpio";
584 reg = <0x10D100C0 0x20>;
585 #gpio-cells = <4>;
586 };
587
588 gpz: gpio-controller@03860000 {
589 compatible = "samsung,exynos4-gpio";
590 reg = <0x03860000 0x20>;
591 #gpio-cells = <4>;
592 };
593 };
594
595 gsc_0: gsc@0x13e00000 { 540 gsc_0: gsc@0x13e00000 {
596 compatible = "samsung,exynos5-gsc"; 541 compatible = "samsung,exynos5-gsc";
597 reg = <0x13e00000 0x1000>; 542 reg = <0x13e00000 0x1000>;
598 interrupts = <0 85 0>; 543 interrupts = <0 85 0>;
544 samsung,power-domain = <&pd_gsc>;
545 clocks = <&clock 256>;
546 clock-names = "gscl";
599 }; 547 };
600 548
601 gsc_1: gsc@0x13e10000 { 549 gsc_1: gsc@0x13e10000 {
602 compatible = "samsung,exynos5-gsc"; 550 compatible = "samsung,exynos5-gsc";
603 reg = <0x13e10000 0x1000>; 551 reg = <0x13e10000 0x1000>;
604 interrupts = <0 86 0>; 552 interrupts = <0 86 0>;
553 samsung,power-domain = <&pd_gsc>;
554 clocks = <&clock 257>;
555 clock-names = "gscl";
605 }; 556 };
606 557
607 gsc_2: gsc@0x13e20000 { 558 gsc_2: gsc@0x13e20000 {
608 compatible = "samsung,exynos5-gsc"; 559 compatible = "samsung,exynos5-gsc";
609 reg = <0x13e20000 0x1000>; 560 reg = <0x13e20000 0x1000>;
610 interrupts = <0 87 0>; 561 interrupts = <0 87 0>;
562 samsung,power-domain = <&pd_gsc>;
563 clocks = <&clock 258>;
564 clock-names = "gscl";
611 }; 565 };
612 566
613 gsc_3: gsc@0x13e30000 { 567 gsc_3: gsc@0x13e30000 {
614 compatible = "samsung,exynos5-gsc"; 568 compatible = "samsung,exynos5-gsc";
615 reg = <0x13e30000 0x1000>; 569 reg = <0x13e30000 0x1000>;
616 interrupts = <0 88 0>; 570 interrupts = <0 88 0>;
571 samsung,power-domain = <&pd_gsc>;
572 clocks = <&clock 259>;
573 clock-names = "gscl";
617 }; 574 };
618 575
619 hdmi { 576 hdmi {
620 compatible = "samsung,exynos5-hdmi"; 577 compatible = "samsung,exynos5-hdmi";
621 reg = <0x14530000 0x70000>; 578 reg = <0x14530000 0x70000>;
622 interrupts = <0 95 0>; 579 interrupts = <0 95 0>;
580 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
581 <&clock 333>, <&clock 333>;
582 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
583 "sclk_hdmiphy", "hdmiphy";
623 }; 584 };
624 585
625 mixer { 586 mixer {
@@ -627,4 +588,28 @@
627 reg = <0x14450000 0x10000>; 588 reg = <0x14450000 0x10000>;
628 interrupts = <0 94 0>; 589 interrupts = <0 94 0>;
629 }; 590 };
591
592 dp-controller {
593 compatible = "samsung,exynos5-dp";
594 reg = <0x145b0000 0x1000>;
595 interrupts = <10 3>;
596 interrupt-parent = <&combiner>;
597 #address-cells = <1>;
598 #size-cells = <0>;
599
600 dptx-phy {
601 reg = <0x10040720>;
602 samsung,enable-mask = <1>;
603 };
604 };
605
606 fimd {
607 compatible = "samsung,exynos5250-fimd";
608 interrupt-parent = <&combiner>;
609 reg = <0x14400000 0x40000>;
610 interrupt-names = "fifo", "vsync", "lcd_sys";
611 interrupts = <18 4>, <18 5>, <18 6>;
612 clocks = <&clock 133>, <&clock 339>;
613 clock-names = "sclk_fimd", "fimd";
614 };
630}; 615};
diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts
new file mode 100644
index 000000000000..ef747b52b674
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts
@@ -0,0 +1,39 @@
1/*
2 * SAMSUNG SD5v1 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13/include/ "exynos5440.dtsi"
14
15/ {
16 model = "SAMSUNG SD5v1 board based on EXYNOS5440";
17 compatible = "samsung,sd5v1", "samsung,exynos5440";
18
19 chosen {
20 bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 console=ttySAC0,115200";
21 };
22
23 fixed-rate-clocks {
24 xtal {
25 compatible = "samsung,clock-xtal";
26 clock-frequency = <50000000>;
27 };
28 };
29
30 gmac: ethernet@00230000 {
31 fixed_phy;
32 phy_addr = <1>;
33 };
34
35 spi {
36 status = "disabled";
37 };
38
39};
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index 81e2c964a900..d55042beb5c5 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -16,31 +16,18 @@
16 model = "SAMSUNG SSDK5440 board based on EXYNOS5440"; 16 model = "SAMSUNG SSDK5440 board based on EXYNOS5440";
17 compatible = "samsung,ssdk5440", "samsung,exynos5440"; 17 compatible = "samsung,ssdk5440", "samsung,exynos5440";
18 18
19 memory {
20 reg = <0x80000000 0x80000000>;
21 };
22
23 chosen { 19 chosen {
24 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc"; 20 bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 console=ttySAC0,115200";
25 }; 21 };
26 22
27 spi { 23 spi {
28 status = "disabled"; 24 status = "disabled";
29 }; 25 };
30 26
31 i2c@F0000 { 27 fixed-rate-clocks {
32 status = "disabled"; 28 xtal {
33 }; 29 compatible = "samsung,clock-xtal";
34 30 clock-frequency = <50000000>;
35 i2c@100000 { 31 };
36 status = "disabled";
37 };
38
39 watchdog {
40 status = "disabled";
41 };
42
43 rtc {
44 status = "disabled";
45 }; 32 };
46}; 33};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 9a99755920c0..93e9028edaaf 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,63 +16,89 @@
16 16
17 interrupt-parent = <&gic>; 17 interrupt-parent = <&gic>;
18 18
19 clock: clock-controller@0x160000 {
20 compatible = "samsung,exynos5440-clock";
21 reg = <0x160000 0x1000>;
22 #clock-cells = <1>;
23 };
24
19 gic:interrupt-controller@2E0000 { 25 gic:interrupt-controller@2E0000 {
20 compatible = "arm,cortex-a15-gic"; 26 compatible = "arm,cortex-a15-gic";
21 #interrupt-cells = <3>; 27 #interrupt-cells = <3>;
22 interrupt-controller; 28 interrupt-controller;
23 reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>; 29 reg = <0x2E1000 0x1000>,
30 <0x2E2000 0x1000>,
31 <0x2E4000 0x2000>,
32 <0x2E6000 0x2000>;
33 interrupts = <1 9 0xf04>;
24 }; 34 };
25 35
26 cpus { 36 cpus {
37 #address-cells = <1>;
38 #size-cells = <0>;
39
27 cpu@0 { 40 cpu@0 {
28 compatible = "arm,cortex-a15"; 41 compatible = "arm,cortex-a15";
29 timer { 42 reg = <0>;
30 compatible = "arm,armv7-timer";
31 interrupts = <1 13 0xf08>;
32 clock-frequency = <1000000>;
33 };
34 }; 43 };
35 cpu@1 { 44 cpu@1 {
36 compatible = "arm,cortex-a15"; 45 compatible = "arm,cortex-a15";
37 timer { 46 reg = <1>;
38 compatible = "arm,armv7-timer";
39 interrupts = <1 14 0xf08>;
40 clock-frequency = <1000000>;
41 };
42 }; 47 };
43 cpu@2 { 48 cpu@2 {
44 compatible = "arm,cortex-a15"; 49 compatible = "arm,cortex-a15";
45 timer { 50 reg = <2>;
46 compatible = "arm,armv7-timer";
47 interrupts = <1 14 0xf08>;
48 clock-frequency = <1000000>;
49 };
50 }; 51 };
51 cpu@3 { 52 cpu@3 {
52 compatible = "arm,cortex-a15"; 53 compatible = "arm,cortex-a15";
53 timer { 54 reg = <3>;
54 compatible = "arm,armv7-timer";
55 interrupts = <1 14 0xf08>;
56 clock-frequency = <1000000>;
57 };
58 }; 55 };
59 }; 56 };
60 57
61 common { 58 arm-pmu {
62 compatible = "samsung,exynos5440"; 59 compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
60 interrupts = <0 52 4>,
61 <0 53 4>,
62 <0 54 4>,
63 <0 55 4>;
64 };
65
66 timer {
67 compatible = "arm,cortex-a15-timer",
68 "arm,armv7-timer";
69 interrupts = <1 13 0xf08>,
70 <1 14 0xf08>,
71 <1 11 0xf08>,
72 <1 10 0xf08>;
73 clock-frequency = <50000000>;
74 };
63 75
76 cpufreq@160000 {
77 compatible = "samsung,exynos5440-cpufreq";
78 reg = <0x160000 0x1000>;
79 interrupts = <0 57 0>;
80 operating-points = <
81 /* KHz uV */
82 1200000 1025000
83 1000000 975000
84 800000 925000
85 >;
64 }; 86 };
65 87
66 serial@B0000 { 88 serial@B0000 {
67 compatible = "samsung,exynos4210-uart"; 89 compatible = "samsung,exynos4210-uart";
68 reg = <0xB0000 0x1000>; 90 reg = <0xB0000 0x1000>;
69 interrupts = <0 2 0>; 91 interrupts = <0 2 0>;
92 clocks = <&clock 21>, <&clock 21>;
93 clock-names = "uart", "clk_uart_baud0";
70 }; 94 };
71 95
72 serial@C0000 { 96 serial@C0000 {
73 compatible = "samsung,exynos4210-uart"; 97 compatible = "samsung,exynos4210-uart";
74 reg = <0xC0000 0x1000>; 98 reg = <0xC0000 0x1000>;
75 interrupts = <0 3 0>; 99 interrupts = <0 3 0>;
100 clocks = <&clock 21>, <&clock 21>;
101 clock-names = "uart", "clk_uart_baud0";
76 }; 102 };
77 103
78 spi { 104 spi {
@@ -83,11 +109,15 @@
83 rx-dma-channel = <&pdma0 4>; /* preliminary */ 109 rx-dma-channel = <&pdma0 4>; /* preliminary */
84 #address-cells = <1>; 110 #address-cells = <1>;
85 #size-cells = <0>; 111 #size-cells = <0>;
112 clocks = <&clock 21>, <&clock 16>;
113 clock-names = "spi", "spi_busclk0";
86 }; 114 };
87 115
88 pinctrl { 116 pinctrl {
89 compatible = "samsung,exynos5440-pinctrl"; 117 compatible = "samsung,exynos5440-pinctrl";
90 reg = <0xE0000 0x1000>; 118 reg = <0xE0000 0x1000>;
119 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
120 <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
91 interrupt-controller; 121 interrupt-controller;
92 #interrupt-cells = <2>; 122 #interrupt-cells = <2>;
93 #gpio-cells = <2>; 123 #gpio-cells = <2>;
@@ -110,25 +140,42 @@
110 }; 140 };
111 141
112 i2c@F0000 { 142 i2c@F0000 {
113 compatible = "samsung,s3c2440-i2c"; 143 compatible = "samsung,exynos5440-i2c";
114 reg = <0xF0000 0x1000>; 144 reg = <0xF0000 0x1000>;
115 interrupts = <0 5 0>; 145 interrupts = <0 5 0>;
116 #address-cells = <1>; 146 #address-cells = <1>;
117 #size-cells = <0>; 147 #size-cells = <0>;
148 clocks = <&clock 21>;
149 clock-names = "i2c";
118 }; 150 };
119 151
120 i2c@100000 { 152 i2c@100000 {
121 compatible = "samsung,s3c2440-i2c"; 153 compatible = "samsung,exynos5440-i2c";
122 reg = <0x100000 0x1000>; 154 reg = <0x100000 0x1000>;
123 interrupts = <0 6 0>; 155 interrupts = <0 6 0>;
124 #address-cells = <1>; 156 #address-cells = <1>;
125 #size-cells = <0>; 157 #size-cells = <0>;
158 clocks = <&clock 21>;
159 clock-names = "i2c";
126 }; 160 };
127 161
128 watchdog { 162 watchdog {
129 compatible = "samsung,s3c2410-wdt"; 163 compatible = "samsung,s3c2410-wdt";
130 reg = <0x110000 0x1000>; 164 reg = <0x110000 0x1000>;
131 interrupts = <0 1 0>; 165 interrupts = <0 1 0>;
166 clocks = <&clock 21>;
167 clock-names = "watchdog";
168 };
169
170 gmac: ethernet@00230000 {
171 compatible = "snps,dwmac-3.70a";
172 reg = <0x00230000 0x8000>;
173 interrupt-parent = <&gic>;
174 interrupts = <0 31 4>;
175 interrupt-names = "macirq";
176 phy-mode = "sgmii";
177 clocks = <&clock 25>;
178 clock-names = "stmmaceth";
132 }; 179 };
133 180
134 amba { 181 amba {
@@ -138,19 +185,23 @@
138 interrupt-parent = <&gic>; 185 interrupt-parent = <&gic>;
139 ranges; 186 ranges;
140 187
141 pdma0: pdma@121A0000 { 188 pdma0: pdma@00121000 {
142 compatible = "arm,pl330", "arm,primecell"; 189 compatible = "arm,pl330", "arm,primecell";
143 reg = <0x120000 0x1000>; 190 reg = <0x121000 0x1000>;
144 interrupts = <0 34 0>; 191 interrupts = <0 46 0>;
192 clocks = <&clock 8>;
193 clock-names = "apb_pclk";
145 #dma-cells = <1>; 194 #dma-cells = <1>;
146 #dma-channels = <8>; 195 #dma-channels = <8>;
147 #dma-requests = <32>; 196 #dma-requests = <32>;
148 }; 197 };
149 198
150 pdma1: pdma@121B0000 { 199 pdma1: pdma@00120000 {
151 compatible = "arm,pl330", "arm,primecell"; 200 compatible = "arm,pl330", "arm,primecell";
152 reg = <0x121000 0x1000>; 201 reg = <0x120000 0x1000>;
153 interrupts = <0 35 0>; 202 interrupts = <0 47 0>;
203 clocks = <&clock 8>;
204 clock-names = "apb_pclk";
154 #dma-cells = <1>; 205 #dma-cells = <1>;
155 #dma-channels = <8>; 206 #dma-channels = <8>;
156 #dma-requests = <32>; 207 #dma-requests = <32>;
@@ -161,5 +212,7 @@
161 compatible = "samsung,s3c6410-rtc"; 212 compatible = "samsung,s3c6410-rtc";
162 reg = <0x130000 0x1000>; 213 reg = <0x130000 0x1000>;
163 interrupts = <0 17 0>, <0 16 0>; 214 interrupts = <0 17 0>, <0 16 0>;
215 clocks = <&clock 21>;
216 clock-names = "rtc";
164 }; 217 };
165}; 218};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-25 10:45:43 -0500