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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-07 14:06:17 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-07 14:06:17 -0400
commit38f56f33ca381751f9b8910f67e7a805ec0b68cb (patch)
tree202f2ce60f3f43a948607ec76c8cc48c1cf73a4b /arch/arm/boot/dts/exynos5250.dtsi
parentfcba914542082b272f31c8e4c40000b88ed3208d (diff)
parent4183bef2e093a2f0aab45f2d5fed82b0e02aeacf (diff)
Merge tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates (part 2) from Arnd Bergmann: "These are mostly new device tree bindings for existing drivers, as well as changes to the device tree source files to add support for those devices, and a couple of new boards, most notably Samsung's Exynos5 based Chromebook. The changes depend on earlier platform specific updates and touch the usual platforms: omap, exynos, tegra, mxs, mvebu and davinci." * tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits) ARM: exynos: dts: cros5250: add EC device ARM: dts: Add sbs-battery for exynos5250-snow ARM: dts: Add i2c-arbitrator bus for exynos5250-snow ARM: dts: add mshc controller node for Exynos4x12 SoCs ARM: dts: Add chip-id controller node on Exynos4/5 SoC ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree ARM: davinci: da850-evm: add SPI flash support ARM: davinci: da850: override SPI DT node device name ARM: davinci: da850: add SPI1 DT node spi/davinci: add DT binding documentation spi/davinci: no wildcards in DT compatible property ARM: dts: mvebu: Convert mvebu device tree files to 64 bits ARM: dts: mvebu: introduce internal-regs node ARM: dts: mvebu: Convert all the mvebu files to use the range property ARM: dts: mvebu: move all peripherals inside soc ARM: dts: mvebu: fix cpus section indentation ARM: davinci: da850: add EHRPWM & ECAP DT node ARM/dts: OMAP3: fix pinctrl-single configuration ARM: dts: Add OMAP3430 SDP NOR flash memory binding ARM: dts: Add NOR flash bindings for OMAP2420 H4 ...
Diffstat (limited to 'arch/arm/boot/dts/exynos5250.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi348
1 files changed, 98 insertions, 250 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 28758e5dd15c..98dfc3ea5c0b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -18,6 +18,7 @@
18*/ 18*/
19 19
20/include/ "skeleton.dtsi" 20/include/ "skeleton.dtsi"
21/include/ "exynos5250-pinctrl.dtsi"
21 22
22/ { 23/ {
23 compatible = "samsung,exynos5250"; 24 compatible = "samsung,exynos5250";
@@ -44,6 +45,15 @@
44 i2c6 = &i2c_6; 45 i2c6 = &i2c_6;
45 i2c7 = &i2c_7; 46 i2c7 = &i2c_7;
46 i2c8 = &i2c_8; 47 i2c8 = &i2c_8;
48 pinctrl0 = &pinctrl_0;
49 pinctrl1 = &pinctrl_1;
50 pinctrl2 = &pinctrl_2;
51 pinctrl3 = &pinctrl_3;
52 };
53
54 chipid@10000000 {
55 compatible = "samsung,exynos4210-chipid";
56 reg = <0x10000000 0x100>;
47 }; 57 };
48 58
49 pd_gsc: gsc-power-domain@0x10044000 { 59 pd_gsc: gsc-power-domain@0x10044000 {
@@ -63,10 +73,22 @@
63 }; 73 };
64 74
65 gic:interrupt-controller@10481000 { 75 gic:interrupt-controller@10481000 {
66 compatible = "arm,cortex-a9-gic"; 76 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
67 #interrupt-cells = <3>; 77 #interrupt-cells = <3>;
68 interrupt-controller; 78 interrupt-controller;
69 reg = <0x10481000 0x1000>, <0x10482000 0x2000>; 79 reg = <0x10481000 0x1000>,
80 <0x10482000 0x1000>,
81 <0x10484000 0x2000>,
82 <0x10486000 0x2000>;
83 interrupts = <1 9 0xf04>;
84 };
85
86 timer {
87 compatible = "arm,armv7-timer";
88 interrupts = <1 13 0xf08>,
89 <1 14 0xf08>,
90 <1 11 0xf08>,
91 <1 10 0xf08>;
70 }; 92 };
71 93
72 combiner:interrupt-controller@10440000 { 94 combiner:interrupt-controller@10440000 {
@@ -115,6 +137,36 @@
115 interrupts = <1 2>, <22 4>; 137 interrupts = <1 2>, <22 4>;
116 }; 138 };
117 139
140 pinctrl_0: pinctrl@11400000 {
141 compatible = "samsung,exynos5250-pinctrl";
142 reg = <0x11400000 0x1000>;
143 interrupts = <0 46 0>;
144
145 wakup_eint: wakeup-interrupt-controller {
146 compatible = "samsung,exynos4210-wakeup-eint";
147 interrupt-parent = <&gic>;
148 interrupts = <0 32 0>;
149 };
150 };
151
152 pinctrl_1: pinctrl@13400000 {
153 compatible = "samsung,exynos5250-pinctrl";
154 reg = <0x13400000 0x1000>;
155 interrupts = <0 45 0>;
156 };
157
158 pinctrl_2: pinctrl@10d10000 {
159 compatible = "samsung,exynos5250-pinctrl";
160 reg = <0x10d10000 0x1000>;
161 interrupts = <0 50 0>;
162 };
163
164 pinctrl_3: pinctrl@03680000 {
165 compatible = "samsung,exynos5250-pinctrl";
166 reg = <0x0368000 0x1000>;
167 interrupts = <0 47 0>;
168 };
169
118 watchdog { 170 watchdog {
119 compatible = "samsung,s3c2410-wdt"; 171 compatible = "samsung,s3c2410-wdt";
120 reg = <0x101D0000 0x100>; 172 reg = <0x101D0000 0x100>;
@@ -200,6 +252,8 @@
200 #size-cells = <0>; 252 #size-cells = <0>;
201 clocks = <&clock 294>; 253 clocks = <&clock 294>;
202 clock-names = "i2c"; 254 clock-names = "i2c";
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c0_bus>;
203 }; 257 };
204 258
205 i2c_1: i2c@12C70000 { 259 i2c_1: i2c@12C70000 {
@@ -210,6 +264,8 @@
210 #size-cells = <0>; 264 #size-cells = <0>;
211 clocks = <&clock 295>; 265 clocks = <&clock 295>;
212 clock-names = "i2c"; 266 clock-names = "i2c";
267 pinctrl-names = "default";
268 pinctrl-0 = <&i2c1_bus>;
213 }; 269 };
214 270
215 i2c_2: i2c@12C80000 { 271 i2c_2: i2c@12C80000 {
@@ -220,6 +276,8 @@
220 #size-cells = <0>; 276 #size-cells = <0>;
221 clocks = <&clock 296>; 277 clocks = <&clock 296>;
222 clock-names = "i2c"; 278 clock-names = "i2c";
279 pinctrl-names = "default";
280 pinctrl-0 = <&i2c2_bus>;
223 }; 281 };
224 282
225 i2c_3: i2c@12C90000 { 283 i2c_3: i2c@12C90000 {
@@ -230,6 +288,8 @@
230 #size-cells = <0>; 288 #size-cells = <0>;
231 clocks = <&clock 297>; 289 clocks = <&clock 297>;
232 clock-names = "i2c"; 290 clock-names = "i2c";
291 pinctrl-names = "default";
292 pinctrl-0 = <&i2c3_bus>;
233 }; 293 };
234 294
235 i2c_4: i2c@12CA0000 { 295 i2c_4: i2c@12CA0000 {
@@ -240,6 +300,8 @@
240 #size-cells = <0>; 300 #size-cells = <0>;
241 clocks = <&clock 298>; 301 clocks = <&clock 298>;
242 clock-names = "i2c"; 302 clock-names = "i2c";
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c4_bus>;
243 }; 305 };
244 306
245 i2c_5: i2c@12CB0000 { 307 i2c_5: i2c@12CB0000 {
@@ -250,6 +312,8 @@
250 #size-cells = <0>; 312 #size-cells = <0>;
251 clocks = <&clock 299>; 313 clocks = <&clock 299>;
252 clock-names = "i2c"; 314 clock-names = "i2c";
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c5_bus>;
253 }; 317 };
254 318
255 i2c_6: i2c@12CC0000 { 319 i2c_6: i2c@12CC0000 {
@@ -260,6 +324,8 @@
260 #size-cells = <0>; 324 #size-cells = <0>;
261 clocks = <&clock 300>; 325 clocks = <&clock 300>;
262 clock-names = "i2c"; 326 clock-names = "i2c";
327 pinctrl-names = "default";
328 pinctrl-0 = <&i2c6_bus>;
263 }; 329 };
264 330
265 i2c_7: i2c@12CD0000 { 331 i2c_7: i2c@12CD0000 {
@@ -270,6 +336,8 @@
270 #size-cells = <0>; 336 #size-cells = <0>;
271 clocks = <&clock 301>; 337 clocks = <&clock 301>;
272 clock-names = "i2c"; 338 clock-names = "i2c";
339 pinctrl-names = "default";
340 pinctrl-0 = <&i2c7_bus>;
273 }; 341 };
274 342
275 i2c_8: i2c@12CE0000 { 343 i2c_8: i2c@12CE0000 {
@@ -302,6 +370,8 @@
302 #size-cells = <0>; 370 #size-cells = <0>;
303 clocks = <&clock 304>, <&clock 154>; 371 clocks = <&clock 304>, <&clock 154>;
304 clock-names = "spi", "spi_busclk0"; 372 clock-names = "spi", "spi_busclk0";
373 pinctrl-names = "default";
374 pinctrl-0 = <&spi0_bus>;
305 }; 375 };
306 376
307 spi_1: spi@12d30000 { 377 spi_1: spi@12d30000 {
@@ -315,6 +385,8 @@
315 #size-cells = <0>; 385 #size-cells = <0>;
316 clocks = <&clock 305>, <&clock 155>; 386 clocks = <&clock 305>, <&clock 155>;
317 clock-names = "spi", "spi_busclk0"; 387 clock-names = "spi", "spi_busclk0";
388 pinctrl-names = "default";
389 pinctrl-0 = <&spi1_bus>;
318 }; 390 };
319 391
320 spi_2: spi@12d40000 { 392 spi_2: spi@12d40000 {
@@ -328,6 +400,8 @@
328 #size-cells = <0>; 400 #size-cells = <0>;
329 clocks = <&clock 306>, <&clock 156>; 401 clocks = <&clock 306>, <&clock 156>;
330 clock-names = "spi", "spi_busclk0"; 402 clock-names = "spi", "spi_busclk0";
403 pinctrl-names = "default";
404 pinctrl-0 = <&spi2_bus>;
331 }; 405 };
332 406
333 dwmmc_0: dwmmc0@12200000 { 407 dwmmc_0: dwmmc0@12200000 {
@@ -381,6 +455,8 @@
381 samsung,supports-rstclr; 455 samsung,supports-rstclr;
382 samsung,supports-secdai; 456 samsung,supports-secdai;
383 samsung,idma-addr = <0x03000000>; 457 samsung,idma-addr = <0x03000000>;
458 pinctrl-names = "default";
459 pinctrl-0 = <&i2s0_bus>;
384 }; 460 };
385 461
386 i2s1: i2s@12D60000 { 462 i2s1: i2s@12D60000 {
@@ -389,6 +465,8 @@
389 dmas = <&pdma1 12 465 dmas = <&pdma1 12
390 &pdma1 11>; 466 &pdma1 11>;
391 dma-names = "tx", "rx"; 467 dma-names = "tx", "rx";
468 pinctrl-names = "default";
469 pinctrl-0 = <&i2s1_bus>;
392 }; 470 };
393 471
394 i2s2: i2s@12D70000 { 472 i2s2: i2s@12D70000 {
@@ -397,18 +475,26 @@
397 dmas = <&pdma0 12 475 dmas = <&pdma0 12
398 &pdma0 11>; 476 &pdma0 11>;
399 dma-names = "tx", "rx"; 477 dma-names = "tx", "rx";
478 pinctrl-names = "default";
479 pinctrl-0 = <&i2s2_bus>;
400 }; 480 };
401 481
402 usb@12110000 { 482 usb@12110000 {
403 compatible = "samsung,exynos4210-ehci"; 483 compatible = "samsung,exynos4210-ehci";
404 reg = <0x12110000 0x100>; 484 reg = <0x12110000 0x100>;
405 interrupts = <0 71 0>; 485 interrupts = <0 71 0>;
486
487 clocks = <&clock 285>;
488 clock-names = "usbhost";
406 }; 489 };
407 490
408 usb@12120000 { 491 usb@12120000 {
409 compatible = "samsung,exynos4210-ohci"; 492 compatible = "samsung,exynos4210-ohci";
410 reg = <0x12120000 0x100>; 493 reg = <0x12120000 0x100>;
411 interrupts = <0 71 0>; 494 interrupts = <0 71 0>;
495
496 clocks = <&clock 285>;
497 clock-names = "usbhost";
412 }; 498 };
413 499
414 amba { 500 amba {
@@ -463,254 +549,6 @@
463 }; 549 };
464 }; 550 };
465 551
466 gpio-controllers {
467 #address-cells = <1>;
468 #size-cells = <1>;
469 gpio-controller;
470 ranges;
471
472 gpa0: gpio-controller@11400000 {
473 compatible = "samsung,exynos4-gpio";
474 reg = <0x11400000 0x20>;
475 #gpio-cells = <4>;
476 };
477
478 gpa1: gpio-controller@11400020 {
479 compatible = "samsung,exynos4-gpio";
480 reg = <0x11400020 0x20>;
481 #gpio-cells = <4>;
482 };
483
484 gpa2: gpio-controller@11400040 {
485 compatible = "samsung,exynos4-gpio";
486 reg = <0x11400040 0x20>;
487 #gpio-cells = <4>;
488 };
489
490 gpb0: gpio-controller@11400060 {
491 compatible = "samsung,exynos4-gpio";
492 reg = <0x11400060 0x20>;
493 #gpio-cells = <4>;
494 };
495
496 gpb1: gpio-controller@11400080 {
497 compatible = "samsung,exynos4-gpio";
498 reg = <0x11400080 0x20>;
499 #gpio-cells = <4>;
500 };
501
502 gpb2: gpio-controller@114000A0 {
503 compatible = "samsung,exynos4-gpio";
504 reg = <0x114000A0 0x20>;
505 #gpio-cells = <4>;
506 };
507
508 gpb3: gpio-controller@114000C0 {
509 compatible = "samsung,exynos4-gpio";
510 reg = <0x114000C0 0x20>;
511 #gpio-cells = <4>;
512 };
513
514 gpc0: gpio-controller@114000E0 {
515 compatible = "samsung,exynos4-gpio";
516 reg = <0x114000E0 0x20>;
517 #gpio-cells = <4>;
518 };
519
520 gpc1: gpio-controller@11400100 {
521 compatible = "samsung,exynos4-gpio";
522 reg = <0x11400100 0x20>;
523 #gpio-cells = <4>;
524 };
525
526 gpc2: gpio-controller@11400120 {
527 compatible = "samsung,exynos4-gpio";
528 reg = <0x11400120 0x20>;
529 #gpio-cells = <4>;
530 };
531
532 gpc3: gpio-controller@11400140 {
533 compatible = "samsung,exynos4-gpio";
534 reg = <0x11400140 0x20>;
535 #gpio-cells = <4>;
536 };
537
538 gpc4: gpio-controller@114002E0 {
539 compatible = "samsung,exynos4-gpio";
540 reg = <0x114002E0 0x20>;
541 #gpio-cells = <4>;
542 };
543
544 gpd0: gpio-controller@11400160 {
545 compatible = "samsung,exynos4-gpio";
546 reg = <0x11400160 0x20>;
547 #gpio-cells = <4>;
548 };
549
550 gpd1: gpio-controller@11400180 {
551 compatible = "samsung,exynos4-gpio";
552 reg = <0x11400180 0x20>;
553 #gpio-cells = <4>;
554 };
555
556 gpy0: gpio-controller@114001A0 {
557 compatible = "samsung,exynos4-gpio";
558 reg = <0x114001A0 0x20>;
559 #gpio-cells = <4>;
560 };
561
562 gpy1: gpio-controller@114001C0 {
563 compatible = "samsung,exynos4-gpio";
564 reg = <0x114001C0 0x20>;
565 #gpio-cells = <4>;
566 };
567
568 gpy2: gpio-controller@114001E0 {
569 compatible = "samsung,exynos4-gpio";
570 reg = <0x114001E0 0x20>;
571 #gpio-cells = <4>;
572 };
573
574 gpy3: gpio-controller@11400200 {
575 compatible = "samsung,exynos4-gpio";
576 reg = <0x11400200 0x20>;
577 #gpio-cells = <4>;
578 };
579
580 gpy4: gpio-controller@11400220 {
581 compatible = "samsung,exynos4-gpio";
582 reg = <0x11400220 0x20>;
583 #gpio-cells = <4>;
584 };
585
586 gpy5: gpio-controller@11400240 {
587 compatible = "samsung,exynos4-gpio";
588 reg = <0x11400240 0x20>;
589 #gpio-cells = <4>;
590 };
591
592 gpy6: gpio-controller@11400260 {
593 compatible = "samsung,exynos4-gpio";
594 reg = <0x11400260 0x20>;
595 #gpio-cells = <4>;
596 };
597
598 gpx0: gpio-controller@11400C00 {
599 compatible = "samsung,exynos4-gpio";
600 reg = <0x11400C00 0x20>;
601 #gpio-cells = <4>;
602 };
603
604 gpx1: gpio-controller@11400C20 {
605 compatible = "samsung,exynos4-gpio";
606 reg = <0x11400C20 0x20>;
607 #gpio-cells = <4>;
608 };
609
610 gpx2: gpio-controller@11400C40 {
611 compatible = "samsung,exynos4-gpio";
612 reg = <0x11400C40 0x20>;
613 #gpio-cells = <4>;
614 };
615
616 gpx3: gpio-controller@11400C60 {
617 compatible = "samsung,exynos4-gpio";
618 reg = <0x11400C60 0x20>;
619 #gpio-cells = <4>;
620 };
621
622 gpe0: gpio-controller@13400000 {
623 compatible = "samsung,exynos4-gpio";
624 reg = <0x13400000 0x20>;
625 #gpio-cells = <4>;
626 };
627
628 gpe1: gpio-controller@13400020 {
629 compatible = "samsung,exynos4-gpio";
630 reg = <0x13400020 0x20>;
631 #gpio-cells = <4>;
632 };
633
634 gpf0: gpio-controller@13400040 {
635 compatible = "samsung,exynos4-gpio";
636 reg = <0x13400040 0x20>;
637 #gpio-cells = <4>;
638 };
639
640 gpf1: gpio-controller@13400060 {
641 compatible = "samsung,exynos4-gpio";
642 reg = <0x13400060 0x20>;
643 #gpio-cells = <4>;
644 };
645
646 gpg0: gpio-controller@13400080 {
647 compatible = "samsung,exynos4-gpio";
648 reg = <0x13400080 0x20>;
649 #gpio-cells = <4>;
650 };
651
652 gpg1: gpio-controller@134000A0 {
653 compatible = "samsung,exynos4-gpio";
654 reg = <0x134000A0 0x20>;
655 #gpio-cells = <4>;
656 };
657
658 gpg2: gpio-controller@134000C0 {
659 compatible = "samsung,exynos4-gpio";
660 reg = <0x134000C0 0x20>;
661 #gpio-cells = <4>;
662 };
663
664 gph0: gpio-controller@134000E0 {
665 compatible = "samsung,exynos4-gpio";
666 reg = <0x134000E0 0x20>;
667 #gpio-cells = <4>;
668 };
669
670 gph1: gpio-controller@13400100 {
671 compatible = "samsung,exynos4-gpio";
672 reg = <0x13400100 0x20>;
673 #gpio-cells = <4>;
674 };
675
676 gpv0: gpio-controller@10D10000 {
677 compatible = "samsung,exynos4-gpio";
678 reg = <0x10D10000 0x20>;
679 #gpio-cells = <4>;
680 };
681
682 gpv1: gpio-controller@10D10020 {
683 compatible = "samsung,exynos4-gpio";
684 reg = <0x10D10020 0x20>;
685 #gpio-cells = <4>;
686 };
687
688 gpv2: gpio-controller@10D10040 {
689 compatible = "samsung,exynos4-gpio";
690 reg = <0x10D10060 0x20>;
691 #gpio-cells = <4>;
692 };
693
694 gpv3: gpio-controller@10D10060 {
695 compatible = "samsung,exynos4-gpio";
696 reg = <0x10D10080 0x20>;
697 #gpio-cells = <4>;
698 };
699
700 gpv4: gpio-controller@10D10080 {
701 compatible = "samsung,exynos4-gpio";
702 reg = <0x10D100C0 0x20>;
703 #gpio-cells = <4>;
704 };
705
706 gpz: gpio-controller@03860000 {
707 compatible = "samsung,exynos4-gpio";
708 reg = <0x03860000 0x20>;
709 #gpio-cells = <4>;
710 };
711 };
712
713
714 gsc_0: gsc@0x13e00000 { 552 gsc_0: gsc@0x13e00000 {
715 compatible = "samsung,exynos5-gsc"; 553 compatible = "samsung,exynos5-gsc";
716 reg = <0x13e00000 0x1000>; 554 reg = <0x13e00000 0x1000>;
@@ -776,4 +614,14 @@
776 samsung,enable-mask = <1>; 614 samsung,enable-mask = <1>;
777 }; 615 };
778 }; 616 };
617
618 fimd {
619 compatible = "samsung,exynos5250-fimd";
620 interrupt-parent = <&combiner>;
621 reg = <0x14400000 0x40000>;
622 interrupt-names = "fifo", "vsync", "lcd_sys";
623 interrupts = <18 4>, <18 5>, <18 6>;
624 clocks = <&clock 133>, <&clock 339>;
625 clock-names = "sclk_fimd", "fimd";
626 };
779}; 627};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 12:42:29 -0500