diff options
author | Olof Johansson <olof@lixom.net> | 2015-04-03 17:59:52 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2015-04-03 17:59:52 -0400 |
commit | fb0d305dcb05f2ab11d77e900362811019b4983b (patch) | |
tree | 305ee91be097e3b2ba888c16da547e82e8d679d7 | |
parent | 4b3be93dd095af7488b0aee6e53c0e74a6130303 (diff) | |
parent | f27b907595fc586bce62b8a3dc421e89bb927250 (diff) |
Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v4.1" from Kukjin Kim:
- for exynos3250
: add assigned clock parents for CMU nodes
- for exynos4412-odroid
: add eMMC reset line
- for exynos5250
: fixed typo for interrupt-cells
- for exynos5250-snow
: define stdout-path property
: represent bridge and panel connection
: enable wifi power-on and add cap-sdio-irq to wifi mmc node
- for exynos5250-spring
: define stdout-path property
- for exynos5420
: fixed typo for interrupt-cells
: add async-bridge clocks for gsc and disp1 PDs
- for exynos5420 boards
: Mux XMMCnDATA[0] pad correctly
- for exynos5420-odroidxu3
: add eMMC reset line
- for Peach boards
: add HS400 support and define stdout-path property
: add mclk entry and add WiFi module support
: represent bridge and panel connection
* tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Fixed typo interrupt-cells for exynos5420 and exynos5250
ARM: dts: Add HS400 support for exynos5420 and exynos5800
ARM: dts: add async-bridge clocks to gsc power domain for exynos5420
ARM: dts: add async-bridge clocks to disp1 power domain for exynos5420
dt-bindings: add asynchronous bridge clock for exynos
ARM: dts: Define stdout-path property for exynos5250-spring
ARM: dts: Define stdout-path property for exynos5250-snow
ARM: dts: Define stdout-path property for Peach boards
ARM: dts: Add assigned clock parents to CMU node for exynos3250
ARM: dts: Add mclk entry for Peach boards
ARM: dts: Add WiFi module support for Peach boards
ARM: dts: Mux XMMCnDATA[0] pad correctly for Exynos5420 boards
ARM: dts: add eMMC reset line for exynos5422-odroidxu3
ARM: dts: add eMMC reset line for exynos4412-odroid-common
ARM: dts: represent bridge and panel connection for exynos5420-peach-pit
ARM: dts: represent bridge and panel connection for exynos5250-snow
ARM: dts: Add cap-sdio-irq to wifi mmc node for exynos5250-snow
ARM: dts: Enable wifi power-on for exynos5250-snow
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos3250.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 14 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5250-snow.dts | 57 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5250-spring.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5420-arndale-octa.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5420-peach-pit.dts | 99 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5420-smdk5420.dts | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5422-odroidxu3.dts | 21 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5800-peach-pi.dts | 71 |
13 files changed, 280 insertions, 20 deletions
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index 1e097037349c..5da38c5ed476 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt | |||
@@ -22,6 +22,9 @@ Optional Properties: | |||
22 | - pclkN, clkN: Pairs of parent of input clock and input clock to the | 22 | - pclkN, clkN: Pairs of parent of input clock and input clock to the |
23 | devices in this power domain. Maximum of 4 pairs (N = 0 to 3) | 23 | devices in this power domain. Maximum of 4 pairs (N = 0 to 3) |
24 | are supported currently. | 24 | are supported currently. |
25 | - asbN: Clocks required by asynchronous bridges (ASB) present in | ||
26 | the power domain. These clock should be enabled during power | ||
27 | domain on/off operations. | ||
25 | - power-domains: phandle pointing to the parent power domain, for more details | 28 | - power-domains: phandle pointing to the parent power domain, for more details |
26 | see Documentation/devicetree/bindings/power/power_domain.txt | 29 | see Documentation/devicetree/bindings/power/power_domain.txt |
27 | 30 | ||
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index ac6b0ae42caf..4a4f2c90e452 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi | |||
@@ -173,6 +173,10 @@ | |||
173 | compatible = "samsung,exynos3250-cmu"; | 173 | compatible = "samsung,exynos3250-cmu"; |
174 | reg = <0x10030000 0x20000>; | 174 | reg = <0x10030000 0x20000>; |
175 | #clock-cells = <1>; | 175 | #clock-cells = <1>; |
176 | assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>, | ||
177 | <&cmu CLK_MOUT_ACLK_266_SUB>; | ||
178 | assigned-clock-parents = <&cmu CLK_FIN_PLL>, | ||
179 | <&cmu CLK_FIN_PLL>; | ||
176 | }; | 180 | }; |
177 | 181 | ||
178 | cmu_dmc: clock-controller@105C0000 { | 182 | cmu_dmc: clock-controller@105C0000 { |
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index adb4f6a97a1d..8de12af7c276 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi | |||
@@ -75,10 +75,18 @@ | |||
75 | }; | 75 | }; |
76 | }; | 76 | }; |
77 | 77 | ||
78 | emmc_pwrseq: pwrseq { | ||
79 | pinctrl-0 = <&sd1_cd>; | ||
80 | pinctrl-names = "default"; | ||
81 | compatible = "mmc-pwrseq-emmc"; | ||
82 | reset-gpios = <&gpk1 2 1>; | ||
83 | }; | ||
84 | |||
78 | mmc@12550000 { | 85 | mmc@12550000 { |
79 | pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; | 86 | pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; |
80 | pinctrl-names = "default"; | 87 | pinctrl-names = "default"; |
81 | vmmc-supply = <&ldo20_reg &buck8_reg>; | 88 | vmmc-supply = <&ldo20_reg &buck8_reg>; |
89 | mmc-pwrseq = <&emmc_pwrseq>; | ||
82 | status = "okay"; | 90 | status = "okay"; |
83 | 91 | ||
84 | num-slots = <1>; | 92 | num-slots = <1>; |
@@ -472,6 +480,12 @@ | |||
472 | }; | 480 | }; |
473 | }; | 481 | }; |
474 | 482 | ||
483 | /* RSTN signal for eMMC */ | ||
484 | &sd1_cd { | ||
485 | samsung,pin-pud = <0>; | ||
486 | samsung,pin-drv = <0>; | ||
487 | }; | ||
488 | |||
475 | &pinctrl_1 { | 489 | &pinctrl_1 { |
476 | gpio_power_key: power_key { | 490 | gpio_power_key: power_key { |
477 | samsung,pins = "gpx1-3"; | 491 | samsung,pins = "gpx1-3"; |
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index b9aeec430527..2657e842e5a5 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts | |||
@@ -29,6 +29,7 @@ | |||
29 | 29 | ||
30 | chosen { | 30 | chosen { |
31 | bootargs = "console=tty1"; | 31 | bootargs = "console=tty1"; |
32 | stdout-path = "serial3:115200n8"; | ||
32 | }; | 33 | }; |
33 | 34 | ||
34 | gpio-keys { | 35 | gpio-keys { |
@@ -183,7 +184,20 @@ | |||
183 | powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>; | 184 | powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>; |
184 | reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>; | 185 | reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>; |
185 | edid-emulation = <5>; | 186 | edid-emulation = <5>; |
186 | panel = <&panel>; | 187 | |
188 | ports { | ||
189 | port@0 { | ||
190 | bridge_out: endpoint { | ||
191 | remote-endpoint = <&panel_in>; | ||
192 | }; | ||
193 | }; | ||
194 | |||
195 | port@1 { | ||
196 | bridge_in: endpoint { | ||
197 | remote-endpoint = <&dp_out>; | ||
198 | }; | ||
199 | }; | ||
200 | }; | ||
187 | }; | 201 | }; |
188 | }; | 202 | }; |
189 | 203 | ||
@@ -228,6 +242,20 @@ | |||
228 | compatible = "auo,b116xw03"; | 242 | compatible = "auo,b116xw03"; |
229 | power-supply = <&fet6>; | 243 | power-supply = <&fet6>; |
230 | backlight = <&backlight>; | 244 | backlight = <&backlight>; |
245 | |||
246 | port { | ||
247 | panel_in: endpoint { | ||
248 | remote-endpoint = <&bridge_out>; | ||
249 | }; | ||
250 | }; | ||
251 | }; | ||
252 | |||
253 | mmc3_pwrseq: mmc3_pwrseq { | ||
254 | compatible = "mmc-pwrseq-simple"; | ||
255 | reset-gpios = <&gpx0 2 GPIO_ACTIVE_LOW>, /* WIFI_RSTn */ | ||
256 | <&gpx0 1 GPIO_ACTIVE_LOW>; /* WIFI_EN */ | ||
257 | clocks = <&max77686 MAX77686_CLK_PMIC>; | ||
258 | clock-names = "ext_clock"; | ||
231 | }; | 259 | }; |
232 | }; | 260 | }; |
233 | 261 | ||
@@ -242,7 +270,14 @@ | |||
242 | samsung,link-rate = <0x0a>; | 270 | samsung,link-rate = <0x0a>; |
243 | samsung,lane-count = <2>; | 271 | samsung,lane-count = <2>; |
244 | samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>; | 272 | samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>; |
245 | bridge = <&ptn3460>; | 273 | |
274 | ports { | ||
275 | port@0 { | ||
276 | dp_out: endpoint { | ||
277 | remote-endpoint = <&bridge_in>; | ||
278 | }; | ||
279 | }; | ||
280 | }; | ||
246 | }; | 281 | }; |
247 | 282 | ||
248 | &ehci { | 283 | &ehci { |
@@ -531,17 +566,33 @@ | |||
531 | status = "okay"; | 566 | status = "okay"; |
532 | num-slots = <1>; | 567 | num-slots = <1>; |
533 | broken-cd; | 568 | broken-cd; |
569 | cap-sdio-irq; | ||
534 | card-detect-delay = <200>; | 570 | card-detect-delay = <200>; |
535 | samsung,dw-mshc-ciu-div = <3>; | 571 | samsung,dw-mshc-ciu-div = <3>; |
536 | samsung,dw-mshc-sdr-timing = <2 3>; | 572 | samsung,dw-mshc-sdr-timing = <2 3>; |
537 | samsung,dw-mshc-ddr-timing = <1 2>; | 573 | samsung,dw-mshc-ddr-timing = <1 2>; |
538 | pinctrl-names = "default"; | 574 | pinctrl-names = "default"; |
539 | pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>; | 575 | pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4 &wifi_en &wifi_rst>; |
540 | bus-width = <4>; | 576 | bus-width = <4>; |
541 | cap-sd-highspeed; | 577 | cap-sd-highspeed; |
578 | mmc-pwrseq = <&mmc3_pwrseq>; | ||
542 | }; | 579 | }; |
543 | 580 | ||
544 | &pinctrl_0 { | 581 | &pinctrl_0 { |
582 | wifi_en: wifi-en { | ||
583 | samsung,pins = "gpx0-1"; | ||
584 | samsung,pin-function = <1>; | ||
585 | samsung,pin-pud = <0>; | ||
586 | samsung,pin-drv = <0>; | ||
587 | }; | ||
588 | |||
589 | wifi_rst: wifi-rst { | ||
590 | samsung,pins = "gpx0-2"; | ||
591 | samsung,pin-function = <1>; | ||
592 | samsung,pin-pud = <0>; | ||
593 | samsung,pin-drv = <0>; | ||
594 | }; | ||
595 | |||
545 | power_key_irq: power-key-irq { | 596 | power_key_irq: power-key-irq { |
546 | samsung,pins = "gpx1-3"; | 597 | samsung,pins = "gpx1-3"; |
547 | samsung,pin-function = <0xf>; | 598 | samsung,pin-function = <0xf>; |
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts index f02775487cd4..b9ec763a5602 100644 --- a/arch/arm/boot/dts/exynos5250-spring.dts +++ b/arch/arm/boot/dts/exynos5250-spring.dts | |||
@@ -25,6 +25,7 @@ | |||
25 | 25 | ||
26 | chosen { | 26 | chosen { |
27 | bootargs = "console=tty1"; | 27 | bootargs = "console=tty1"; |
28 | stdout-path = "serial3:115200n8"; | ||
28 | }; | 29 | }; |
29 | 30 | ||
30 | gpio-keys { | 31 | gpio-keys { |
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index adbde1adad95..c0767b41f31e 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi | |||
@@ -143,7 +143,7 @@ | |||
143 | compatible = "samsung,exynos4210-mct"; | 143 | compatible = "samsung,exynos4210-mct"; |
144 | reg = <0x101C0000 0x800>; | 144 | reg = <0x101C0000 0x800>; |
145 | interrupt-controller; | 145 | interrupt-controller; |
146 | #interrups-cells = <2>; | 146 | #interrupt-cells = <2>; |
147 | interrupt-parent = <&mct_map>; | 147 | interrupt-parent = <&mct_map>; |
148 | interrupts = <0 0>, <1 0>, <2 0>, <3 0>, | 148 | interrupts = <0 0>, <1 0>, <2 0>, <3 0>, |
149 | <4 0>, <5 0>; | 149 | <4 0>, <5 0>; |
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index db2c1c4cd900..b82b6fa15f48 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts | |||
@@ -55,7 +55,7 @@ | |||
55 | samsung,dw-mshc-sdr-timing = <0 4>; | 55 | samsung,dw-mshc-sdr-timing = <0 4>; |
56 | samsung,dw-mshc-ddr-timing = <0 2>; | 56 | samsung,dw-mshc-ddr-timing = <0 2>; |
57 | pinctrl-names = "default"; | 57 | pinctrl-names = "default"; |
58 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; | 58 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; |
59 | vmmc-supply = <&ldo10_reg>; | 59 | vmmc-supply = <&ldo10_reg>; |
60 | bus-width = <8>; | 60 | bus-width = <8>; |
61 | cap-mmc-highspeed; | 61 | cap-mmc-highspeed; |
@@ -68,7 +68,7 @@ | |||
68 | samsung,dw-mshc-sdr-timing = <2 3>; | 68 | samsung,dw-mshc-sdr-timing = <2 3>; |
69 | samsung,dw-mshc-ddr-timing = <1 2>; | 69 | samsung,dw-mshc-ddr-timing = <1 2>; |
70 | pinctrl-names = "default"; | 70 | pinctrl-names = "default"; |
71 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | 71 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
72 | vmmc-supply = <&ldo19_reg>; | 72 | vmmc-supply = <&ldo19_reg>; |
73 | vqmmc-supply = <&ldo13_reg>; | 73 | vqmmc-supply = <&ldo13_reg>; |
74 | bus-width = <4>; | 74 | bus-width = <4>; |
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index c47bb70665c1..0788d08fb43e 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts | |||
@@ -43,6 +43,10 @@ | |||
43 | pinctrl-names = "default"; | 43 | pinctrl-names = "default"; |
44 | }; | 44 | }; |
45 | 45 | ||
46 | chosen { | ||
47 | stdout-path = "serial3:115200n8"; | ||
48 | }; | ||
49 | |||
46 | fixed-rate-clocks { | 50 | fixed-rate-clocks { |
47 | oscclk { | 51 | oscclk { |
48 | compatible = "samsung,exynos5420-oscclk"; | 52 | compatible = "samsung,exynos5420-oscclk"; |
@@ -118,6 +122,19 @@ | |||
118 | compatible = "auo,b116xw03"; | 122 | compatible = "auo,b116xw03"; |
119 | power-supply = <&tps65090_fet6>; | 123 | power-supply = <&tps65090_fet6>; |
120 | backlight = <&backlight>; | 124 | backlight = <&backlight>; |
125 | |||
126 | port { | ||
127 | panel_in: endpoint { | ||
128 | remote-endpoint = <&bridge_out>; | ||
129 | }; | ||
130 | }; | ||
131 | }; | ||
132 | |||
133 | mmc1_pwrseq: mmc1_pwrseq { | ||
134 | compatible = "mmc-pwrseq-simple"; | ||
135 | reset-gpios = <&gpx0 0 GPIO_ACTIVE_LOW>; /* WIFI_EN */ | ||
136 | clocks = <&max77802 MAX77802_CLK_32K_CP>; | ||
137 | clock-names = "ext_clock"; | ||
121 | }; | 138 | }; |
122 | }; | 139 | }; |
123 | 140 | ||
@@ -137,7 +154,14 @@ | |||
137 | samsung,link-rate = <0x06>; | 154 | samsung,link-rate = <0x06>; |
138 | samsung,lane-count = <2>; | 155 | samsung,lane-count = <2>; |
139 | samsung,hpd-gpio = <&gpx2 6 0>; | 156 | samsung,hpd-gpio = <&gpx2 6 0>; |
140 | bridge = <&ps8625>; | 157 | |
158 | ports { | ||
159 | port@0 { | ||
160 | dp_out: endpoint { | ||
161 | remote-endpoint = <&bridge_in>; | ||
162 | }; | ||
163 | }; | ||
164 | }; | ||
141 | }; | 165 | }; |
142 | 166 | ||
143 | &fimd { | 167 | &fimd { |
@@ -581,6 +605,8 @@ | |||
581 | interrupt-parent = <&gpx0>; | 605 | interrupt-parent = <&gpx0>; |
582 | pinctrl-names = "default"; | 606 | pinctrl-names = "default"; |
583 | pinctrl-0 = <&max98090_irq>; | 607 | pinctrl-0 = <&max98090_irq>; |
608 | clocks = <&pmu_system_controller 0>; | ||
609 | clock-names = "mclk"; | ||
584 | }; | 610 | }; |
585 | 611 | ||
586 | light-sensor@44 { | 612 | light-sensor@44 { |
@@ -595,8 +621,22 @@ | |||
595 | sleep-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>; | 621 | sleep-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>; |
596 | reset-gpios = <&gpy7 7 GPIO_ACTIVE_HIGH>; | 622 | reset-gpios = <&gpy7 7 GPIO_ACTIVE_HIGH>; |
597 | lane-count = <2>; | 623 | lane-count = <2>; |
598 | panel = <&panel>; | ||
599 | use-external-pwm; | 624 | use-external-pwm; |
625 | |||
626 | ports { | ||
627 | port@0 { | ||
628 | bridge_out: endpoint { | ||
629 | remote-endpoint = <&panel_in>; | ||
630 | }; | ||
631 | }; | ||
632 | |||
633 | port@1 { | ||
634 | bridge_in: endpoint { | ||
635 | remote-endpoint = <&dp_out>; | ||
636 | }; | ||
637 | }; | ||
638 | }; | ||
639 | |||
600 | }; | 640 | }; |
601 | }; | 641 | }; |
602 | 642 | ||
@@ -659,11 +699,32 @@ | |||
659 | samsung,dw-mshc-ciu-div = <3>; | 699 | samsung,dw-mshc-ciu-div = <3>; |
660 | samsung,dw-mshc-sdr-timing = <0 4>; | 700 | samsung,dw-mshc-sdr-timing = <0 4>; |
661 | samsung,dw-mshc-ddr-timing = <0 2>; | 701 | samsung,dw-mshc-ddr-timing = <0 2>; |
702 | samsung,dw-mshc-hs400-timing = <0 2>; | ||
703 | samsung,read-strobe-delay = <90>; | ||
662 | pinctrl-names = "default"; | 704 | pinctrl-names = "default"; |
663 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; | 705 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>; |
664 | bus-width = <8>; | 706 | bus-width = <8>; |
665 | }; | 707 | }; |
666 | 708 | ||
709 | &mmc_1 { | ||
710 | status = "okay"; | ||
711 | num-slots = <1>; | ||
712 | broken-cd; | ||
713 | cap-sdio-irq; | ||
714 | card-detect-delay = <200>; | ||
715 | clock-frequency = <400000000>; | ||
716 | samsung,dw-mshc-ciu-div = <1>; | ||
717 | samsung,dw-mshc-sdr-timing = <0 1>; | ||
718 | samsung,dw-mshc-ddr-timing = <0 2>; | ||
719 | pinctrl-names = "default"; | ||
720 | pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_int>, <&sd1_bus1>, | ||
721 | <&sd1_bus4>, <&sd1_bus8>, <&wifi_en>; | ||
722 | bus-width = <4>; | ||
723 | cap-sd-highspeed; | ||
724 | mmc-pwrseq = <&mmc1_pwrseq>; | ||
725 | vqmmc-supply = <&buck10_reg>; | ||
726 | }; | ||
727 | |||
667 | &mmc_2 { | 728 | &mmc_2 { |
668 | status = "okay"; | 729 | status = "okay"; |
669 | num-slots = <1>; | 730 | num-slots = <1>; |
@@ -674,7 +735,7 @@ | |||
674 | samsung,dw-mshc-sdr-timing = <2 3>; | 735 | samsung,dw-mshc-sdr-timing = <2 3>; |
675 | samsung,dw-mshc-ddr-timing = <1 2>; | 736 | samsung,dw-mshc-ddr-timing = <1 2>; |
676 | pinctrl-names = "default"; | 737 | pinctrl-names = "default"; |
677 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | 738 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
678 | bus-width = <4>; | 739 | bus-width = <4>; |
679 | }; | 740 | }; |
680 | 741 | ||
@@ -683,6 +744,13 @@ | |||
683 | pinctrl-names = "default"; | 744 | pinctrl-names = "default"; |
684 | pinctrl-0 = <&mask_tpm_reset>; | 745 | pinctrl-0 = <&mask_tpm_reset>; |
685 | 746 | ||
747 | wifi_en: wifi-en { | ||
748 | samsung,pins = "gpx0-0"; | ||
749 | samsung,pin-function = <1>; | ||
750 | samsung,pin-pud = <0>; | ||
751 | samsung,pin-drv = <0>; | ||
752 | }; | ||
753 | |||
686 | max98090_irq: max98090-irq { | 754 | max98090_irq: max98090-irq { |
687 | samsung,pins = "gpx0-2"; | 755 | samsung,pins = "gpx0-2"; |
688 | samsung,pin-function = <0>; | 756 | samsung,pin-function = <0>; |
@@ -770,6 +838,29 @@ | |||
770 | }; | 838 | }; |
771 | }; | 839 | }; |
772 | 840 | ||
841 | &pinctrl_1 { | ||
842 | /* Adjust WiFi drive strengths lower for EMI */ | ||
843 | sd1_clk: sd1-clk { | ||
844 | samsung,pin-drv = <2>; | ||
845 | }; | ||
846 | |||
847 | sd1_cmd: sd1-cmd { | ||
848 | samsung,pin-drv = <2>; | ||
849 | }; | ||
850 | |||
851 | sd1_bus1: sd1-bus-width1 { | ||
852 | samsung,pin-drv = <2>; | ||
853 | }; | ||
854 | |||
855 | sd1_bus4: sd1-bus-width4 { | ||
856 | samsung,pin-drv = <2>; | ||
857 | }; | ||
858 | |||
859 | sd1_bus8: sd1-bus-width8 { | ||
860 | samsung,pin-drv = <2>; | ||
861 | }; | ||
862 | }; | ||
863 | |||
773 | &pinctrl_2 { | 864 | &pinctrl_2 { |
774 | pmic_dvs_2: pmic-dvs-2 { | 865 | pmic_dvs_2: pmic-dvs-2 { |
775 | samsung,pins = "gpj4-2"; | 866 | samsung,pins = "gpj4-2"; |
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index ba686e40eac7..8b153166ebdb 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi | |||
@@ -201,6 +201,13 @@ | |||
201 | samsung,pin-drv = <3>; | 201 | samsung,pin-drv = <3>; |
202 | }; | 202 | }; |
203 | 203 | ||
204 | sd0_rclk: sd0-rclk { | ||
205 | samsung,pins = "gpc0-7"; | ||
206 | samsung,pin-function = <2>; | ||
207 | samsung,pin-pud = <1>; | ||
208 | samsung,pin-drv = <3>; | ||
209 | }; | ||
210 | |||
204 | sd1_cmd: sd1-cmd { | 211 | sd1_cmd: sd1-cmd { |
205 | samsung,pins = "gpc1-1"; | 212 | samsung,pins = "gpc1-1"; |
206 | samsung,pin-function = <2>; | 213 | samsung,pin-function = <2>; |
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 8be3d7b489ff..9103f2381a6d 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts | |||
@@ -80,8 +80,11 @@ | |||
80 | samsung,dw-mshc-ciu-div = <3>; | 80 | samsung,dw-mshc-ciu-div = <3>; |
81 | samsung,dw-mshc-sdr-timing = <0 4>; | 81 | samsung,dw-mshc-sdr-timing = <0 4>; |
82 | samsung,dw-mshc-ddr-timing = <0 2>; | 82 | samsung,dw-mshc-ddr-timing = <0 2>; |
83 | samsung,dw-mshc-hs400-timing = <0 2>; | ||
84 | samsung,read-strobe-delay = <90>; | ||
83 | pinctrl-names = "default"; | 85 | pinctrl-names = "default"; |
84 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; | 86 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 |
87 | &sd0_rclk>; | ||
85 | bus-width = <8>; | 88 | bus-width = <8>; |
86 | cap-mmc-highspeed; | 89 | cap-mmc-highspeed; |
87 | }; | 90 | }; |
@@ -93,7 +96,7 @@ | |||
93 | samsung,dw-mshc-sdr-timing = <2 3>; | 96 | samsung,dw-mshc-sdr-timing = <2 3>; |
94 | samsung,dw-mshc-ddr-timing = <1 2>; | 97 | samsung,dw-mshc-ddr-timing = <1 2>; |
95 | pinctrl-names = "default"; | 98 | pinctrl-names = "default"; |
96 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | 99 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
97 | bus-width = <4>; | 100 | bus-width = <4>; |
98 | cap-sd-highspeed; | 101 | cap-sd-highspeed; |
99 | }; | 102 | }; |
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c0e98cf3514f..ac6f86083729 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi | |||
@@ -221,7 +221,7 @@ | |||
221 | compatible = "samsung,exynos4210-mct"; | 221 | compatible = "samsung,exynos4210-mct"; |
222 | reg = <0x101C0000 0x800>; | 222 | reg = <0x101C0000 0x800>; |
223 | interrupt-controller; | 223 | interrupt-controller; |
224 | #interrups-cells = <1>; | 224 | #interrupt-cells = <1>; |
225 | interrupt-parent = <&mct_map>; | 225 | interrupt-parent = <&mct_map>; |
226 | interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, | 226 | interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, |
227 | <8>, <9>, <10>, <11>; | 227 | <8>, <9>, <10>, <11>; |
@@ -251,6 +251,8 @@ | |||
251 | compatible = "samsung,exynos4210-pd"; | 251 | compatible = "samsung,exynos4210-pd"; |
252 | reg = <0x10044000 0x20>; | 252 | reg = <0x10044000 0x20>; |
253 | #power-domain-cells = <0>; | 253 | #power-domain-cells = <0>; |
254 | clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>; | ||
255 | clock-names = "asb0", "asb1"; | ||
254 | }; | 256 | }; |
255 | 257 | ||
256 | isp_pd: power-domain@10044020 { | 258 | isp_pd: power-domain@10044020 { |
@@ -283,9 +285,11 @@ | |||
283 | <&clock CLK_MOUT_SW_ACLK300>, | 285 | <&clock CLK_MOUT_SW_ACLK300>, |
284 | <&clock CLK_MOUT_USER_ACLK300_DISP1>, | 286 | <&clock CLK_MOUT_USER_ACLK300_DISP1>, |
285 | <&clock CLK_MOUT_SW_ACLK400>, | 287 | <&clock CLK_MOUT_SW_ACLK400>, |
286 | <&clock CLK_MOUT_USER_ACLK400_DISP1>; | 288 | <&clock CLK_MOUT_USER_ACLK400_DISP1>, |
289 | <&clock CLK_FIMD1>, <&clock CLK_MIXER>; | ||
287 | clock-names = "oscclk", "pclk0", "clk0", | 290 | clock-names = "oscclk", "pclk0", "clk0", |
288 | "pclk1", "clk1", "pclk2", "clk2"; | 291 | "pclk1", "clk1", "pclk2", "clk2", |
292 | "asb0", "asb1"; | ||
289 | }; | 293 | }; |
290 | 294 | ||
291 | pinctrl_0: pinctrl@13400000 { | 295 | pinctrl_0: pinctrl@13400000 { |
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts index a519c863248d..edc25cf1d717 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts | |||
@@ -264,6 +264,13 @@ | |||
264 | }; | 264 | }; |
265 | }; | 265 | }; |
266 | 266 | ||
267 | emmc_pwrseq: pwrseq { | ||
268 | pinctrl-0 = <&emmc_nrst_pin>; | ||
269 | pinctrl-names = "default"; | ||
270 | compatible = "mmc-pwrseq-emmc"; | ||
271 | reset-gpios = <&gpd1 0 1>; | ||
272 | }; | ||
273 | |||
267 | i2c_2: i2c@12C80000 { | 274 | i2c_2: i2c@12C80000 { |
268 | samsung,i2c-sda-delay = <100>; | 275 | samsung,i2c-sda-delay = <100>; |
269 | samsung,i2c-max-bus-freq = <66000>; | 276 | samsung,i2c-max-bus-freq = <66000>; |
@@ -298,13 +305,14 @@ | |||
298 | 305 | ||
299 | &mmc_0 { | 306 | &mmc_0 { |
300 | status = "okay"; | 307 | status = "okay"; |
308 | mmc-pwrseq = <&emmc_pwrseq>; | ||
301 | broken-cd; | 309 | broken-cd; |
302 | card-detect-delay = <200>; | 310 | card-detect-delay = <200>; |
303 | samsung,dw-mshc-ciu-div = <3>; | 311 | samsung,dw-mshc-ciu-div = <3>; |
304 | samsung,dw-mshc-sdr-timing = <0 4>; | 312 | samsung,dw-mshc-sdr-timing = <0 4>; |
305 | samsung,dw-mshc-ddr-timing = <0 2>; | 313 | samsung,dw-mshc-ddr-timing = <0 2>; |
306 | pinctrl-names = "default"; | 314 | pinctrl-names = "default"; |
307 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; | 315 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; |
308 | bus-width = <8>; | 316 | bus-width = <8>; |
309 | cap-mmc-highspeed; | 317 | cap-mmc-highspeed; |
310 | }; | 318 | }; |
@@ -316,7 +324,7 @@ | |||
316 | samsung,dw-mshc-sdr-timing = <0 4>; | 324 | samsung,dw-mshc-sdr-timing = <0 4>; |
317 | samsung,dw-mshc-ddr-timing = <0 2>; | 325 | samsung,dw-mshc-ddr-timing = <0 2>; |
318 | pinctrl-names = "default"; | 326 | pinctrl-names = "default"; |
319 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | 327 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
320 | bus-width = <4>; | 328 | bus-width = <4>; |
321 | cap-sd-highspeed; | 329 | cap-sd-highspeed; |
322 | }; | 330 | }; |
@@ -330,6 +338,15 @@ | |||
330 | }; | 338 | }; |
331 | }; | 339 | }; |
332 | 340 | ||
341 | &pinctrl_1 { | ||
342 | emmc_nrst_pin: emmc-nrst { | ||
343 | samsung,pins = "gpd1-0"; | ||
344 | samsung,pin-function = <0>; | ||
345 | samsung,pin-pud = <0>; | ||
346 | samsung,pin-drv = <0>; | ||
347 | }; | ||
348 | }; | ||
349 | |||
333 | &usbdrd_dwc3_0 { | 350 | &usbdrd_dwc3_0 { |
334 | dr_mode = "host"; | 351 | dr_mode = "host"; |
335 | }; | 352 | }; |
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 06737c60d333..412f41d62686 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts | |||
@@ -42,6 +42,10 @@ | |||
42 | pinctrl-names = "default"; | 42 | pinctrl-names = "default"; |
43 | }; | 43 | }; |
44 | 44 | ||
45 | chosen { | ||
46 | stdout-path = "serial3:115200n8"; | ||
47 | }; | ||
48 | |||
45 | fixed-rate-clocks { | 49 | fixed-rate-clocks { |
46 | oscclk { | 50 | oscclk { |
47 | compatible = "samsung,exynos5420-oscclk"; | 51 | compatible = "samsung,exynos5420-oscclk"; |
@@ -119,6 +123,13 @@ | |||
119 | power-supply = <&tps65090_fet6>; | 123 | power-supply = <&tps65090_fet6>; |
120 | backlight = <&backlight>; | 124 | backlight = <&backlight>; |
121 | }; | 125 | }; |
126 | |||
127 | mmc1_pwrseq: mmc1_pwrseq { | ||
128 | compatible = "mmc-pwrseq-simple"; | ||
129 | reset-gpios = <&gpx0 0 GPIO_ACTIVE_LOW>; /* WIFI_EN */ | ||
130 | clocks = <&max77802 MAX77802_CLK_32K_CP>; | ||
131 | clock-names = "ext_clock"; | ||
132 | }; | ||
122 | }; | 133 | }; |
123 | 134 | ||
124 | &adc { | 135 | &adc { |
@@ -581,6 +592,8 @@ | |||
581 | interrupt-parent = <&gpx0>; | 592 | interrupt-parent = <&gpx0>; |
582 | pinctrl-names = "default"; | 593 | pinctrl-names = "default"; |
583 | pinctrl-0 = <&max98091_irq>; | 594 | pinctrl-0 = <&max98091_irq>; |
595 | clocks = <&pmu_system_controller 0>; | ||
596 | clock-names = "mclk"; | ||
584 | }; | 597 | }; |
585 | 598 | ||
586 | light-sensor@44 { | 599 | light-sensor@44 { |
@@ -641,18 +654,40 @@ | |||
641 | num-slots = <1>; | 654 | num-slots = <1>; |
642 | broken-cd; | 655 | broken-cd; |
643 | mmc-hs200-1_8v; | 656 | mmc-hs200-1_8v; |
657 | mmc-hs400-1_8v; | ||
644 | cap-mmc-highspeed; | 658 | cap-mmc-highspeed; |
645 | non-removable; | 659 | non-removable; |
646 | card-detect-delay = <200>; | 660 | card-detect-delay = <200>; |
647 | clock-frequency = <400000000>; | 661 | clock-frequency = <800000000>; |
648 | samsung,dw-mshc-ciu-div = <3>; | 662 | samsung,dw-mshc-ciu-div = <3>; |
649 | samsung,dw-mshc-sdr-timing = <0 4>; | 663 | samsung,dw-mshc-sdr-timing = <0 4>; |
650 | samsung,dw-mshc-ddr-timing = <0 2>; | 664 | samsung,dw-mshc-ddr-timing = <0 2>; |
665 | samsung,dw-mshc-hs400-timing = <0 2>; | ||
666 | samsung,read-strobe-delay = <90>; | ||
651 | pinctrl-names = "default"; | 667 | pinctrl-names = "default"; |
652 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; | 668 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>; |
653 | bus-width = <8>; | 669 | bus-width = <8>; |
654 | }; | 670 | }; |
655 | 671 | ||
672 | &mmc_1 { | ||
673 | status = "okay"; | ||
674 | num-slots = <1>; | ||
675 | broken-cd; | ||
676 | cap-sdio-irq; | ||
677 | card-detect-delay = <200>; | ||
678 | clock-frequency = <400000000>; | ||
679 | samsung,dw-mshc-ciu-div = <1>; | ||
680 | samsung,dw-mshc-sdr-timing = <0 1>; | ||
681 | samsung,dw-mshc-ddr-timing = <0 2>; | ||
682 | pinctrl-names = "default"; | ||
683 | pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_int>, <&sd1_bus1>, | ||
684 | <&sd1_bus4>, <&sd1_bus8>, <&wifi_en>; | ||
685 | bus-width = <4>; | ||
686 | cap-sd-highspeed; | ||
687 | mmc-pwrseq = <&mmc1_pwrseq>; | ||
688 | vqmmc-supply = <&buck10_reg>; | ||
689 | }; | ||
690 | |||
656 | &mmc_2 { | 691 | &mmc_2 { |
657 | status = "okay"; | 692 | status = "okay"; |
658 | num-slots = <1>; | 693 | num-slots = <1>; |
@@ -663,7 +698,7 @@ | |||
663 | samsung,dw-mshc-sdr-timing = <2 3>; | 698 | samsung,dw-mshc-sdr-timing = <2 3>; |
664 | samsung,dw-mshc-ddr-timing = <1 2>; | 699 | samsung,dw-mshc-ddr-timing = <1 2>; |
665 | pinctrl-names = "default"; | 700 | pinctrl-names = "default"; |
666 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | 701 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
667 | bus-width = <4>; | 702 | bus-width = <4>; |
668 | }; | 703 | }; |
669 | 704 | ||
@@ -672,6 +707,13 @@ | |||
672 | pinctrl-names = "default"; | 707 | pinctrl-names = "default"; |
673 | pinctrl-0 = <&mask_tpm_reset>; | 708 | pinctrl-0 = <&mask_tpm_reset>; |
674 | 709 | ||
710 | wifi_en: wifi-en { | ||
711 | samsung,pins = "gpx0-0"; | ||
712 | samsung,pin-function = <1>; | ||
713 | samsung,pin-pud = <0>; | ||
714 | samsung,pin-drv = <0>; | ||
715 | }; | ||
716 | |||
675 | max98091_irq: max98091-irq { | 717 | max98091_irq: max98091-irq { |
676 | samsung,pins = "gpx0-2"; | 718 | samsung,pins = "gpx0-2"; |
677 | samsung,pin-function = <0>; | 719 | samsung,pin-function = <0>; |
@@ -759,6 +801,29 @@ | |||
759 | }; | 801 | }; |
760 | }; | 802 | }; |
761 | 803 | ||
804 | &pinctrl_1 { | ||
805 | /* Adjust WiFi drive strengths lower for EMI */ | ||
806 | sd1_clk: sd1-clk { | ||
807 | samsung,pin-drv = <2>; | ||
808 | }; | ||
809 | |||
810 | sd1_cmd: sd1-cmd { | ||
811 | samsung,pin-drv = <2>; | ||
812 | }; | ||
813 | |||
814 | sd1_bus1: sd1-bus-width1 { | ||
815 | samsung,pin-drv = <2>; | ||
816 | }; | ||
817 | |||
818 | sd1_bus4: sd1-bus-width4 { | ||
819 | samsung,pin-drv = <2>; | ||
820 | }; | ||
821 | |||
822 | sd1_bus8: sd1-bus-width8 { | ||
823 | samsung,pin-drv = <2>; | ||
824 | }; | ||
825 | }; | ||
826 | |||
762 | &pinctrl_2 { | 827 | &pinctrl_2 { |
763 | pmic_dvs_2: pmic-dvs-2 { | 828 | pmic_dvs_2: pmic-dvs-2 { |
764 | samsung,pins = "gpj4-2"; | 829 | samsung,pins = "gpj4-2"; |