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authorIcenowy Zheng <icenowy@aosc.xyz>2017-03-25 10:50:12 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-03-27 07:43:21 -0400
commitda89e1d5cbafe9fac6325867e609cc4d2b681e84 (patch)
treeb3f1342eb7599887f62cd4445b61c61eba1b8a51
parent0127216f2217e63fcf976343d1504d2ba1d83a45 (diff)
ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
Allwinner H3/H5 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller. Add device nodes for these controllers. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 2494ea063cd4..6640ebfa6419 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -144,6 +144,19 @@
144 #size-cells = <0>; 144 #size-cells = <0>;
145 }; 145 };
146 146
147 usb_otg: usb@01c19000 {
148 compatible = "allwinner,sun8i-h3-musb";
149 reg = <0x01c19000 0x400>;
150 clocks = <&ccu CLK_BUS_OTG>;
151 resets = <&ccu RST_BUS_OTG>;
152 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
153 interrupt-names = "mc";
154 phys = <&usbphy 0>;
155 phy-names = "usb";
156 extcon = <&usbphy 0>;
157 status = "disabled";
158 };
159
147 usbphy: phy@01c19400 { 160 usbphy: phy@01c19400 {
148 compatible = "allwinner,sun8i-h3-usb-phy"; 161 compatible = "allwinner,sun8i-h3-usb-phy";
149 reg = <0x01c19400 0x2c>, 162 reg = <0x01c19400 0x2c>,
@@ -176,6 +189,25 @@
176 #phy-cells = <1>; 189 #phy-cells = <1>;
177 }; 190 };
178 191
192 ehci0: usb@01c1a000 {
193 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
194 reg = <0x01c1a000 0x100>;
195 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
196 clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
197 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
198 status = "disabled";
199 };
200
201 ohci0: usb@01c1a400 {
202 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
203 reg = <0x01c1a400 0x100>;
204 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
205 clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
206 <&ccu CLK_USB_OHCI0>;
207 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
208 status = "disabled";
209 };
210
179 ehci1: usb@01c1b000 { 211 ehci1: usb@01c1b000 {
180 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; 212 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
181 reg = <0x01c1b000 0x100>; 213 reg = <0x01c1b000 0x100>;