diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2014-05-12 05:37:17 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@linaro.org> | 2014-11-27 12:22:02 -0500 |
commit | a81a6c654bbe129af529d11b4763367af90d1152 (patch) | |
tree | 9378c0a0ad4e010db9ef2c3bfd75ce07fa46f32d | |
parent | e99010edb37f5d5bca6a4d4b78d74cddfc0fc5a4 (diff) |
ARM: dt: fix up PL011 device tree bindings
Make the map match the reality, the current binding text is
nonsense:
- The clock required for the clocking of the serial port
must come first and is not optional (as the driver will
otherwise proceed to grab and use the apb_pclk as uartclk),
and the apb_pclk that clocks the logic must come second
as the code will retrieve the first clock by index,
whereas the PrimeCell but will explicitly look for
"apb_pclk" so this can be specified later, as it is
looked up by name.
- The pin control state "default" is the only mandated
state, the sleep state is entirely optional.
We also add an example to avoid further confusion.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/serial/pl011.txt | 28 |
1 files changed, 25 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/serial/pl011.txt b/Documentation/devicetree/bindings/serial/pl011.txt index 5d2e840ae65c..52464918cfe2 100644 --- a/Documentation/devicetree/bindings/serial/pl011.txt +++ b/Documentation/devicetree/bindings/serial/pl011.txt | |||
@@ -6,12 +6,34 @@ Required properties: | |||
6 | - interrupts: exactly one interrupt specifier | 6 | - interrupts: exactly one interrupt specifier |
7 | 7 | ||
8 | Optional properties: | 8 | Optional properties: |
9 | - pinctrl: When present, must have one state named "sleep" | 9 | - pinctrl: When present, must have one state named "default", |
10 | and one state named "default" | 10 | and may contain a second name named "sleep". The former |
11 | - clocks: When present, must refer to exactly one clock named | 11 | state sets up pins for ordinary operation whereas |
12 | the latter state will put the associated pins to sleep | ||
13 | when the UART is unused | ||
14 | - clocks: When present, the first clock listed must correspond to | ||
15 | the clock named UARTCLK on the IP block, i.e. the clock | ||
16 | to the external serial line, whereas the second clock | ||
17 | must correspond to the PCLK clocking the internal logic | ||
18 | of the block. Just listing one clock (the first one) is | ||
19 | deprecated. | ||
20 | - clocks-names: When present, the first clock listed must be named | ||
21 | "uartclk" and the second clock listed must be named | ||
12 | "apb_pclk" | 22 | "apb_pclk" |
13 | - dmas: When present, may have one or two dma channels. | 23 | - dmas: When present, may have one or two dma channels. |
14 | The first one must be named "rx", the second one | 24 | The first one must be named "rx", the second one |
15 | must be named "tx". | 25 | must be named "tx". |
16 | 26 | ||
17 | See also bindings/arm/primecell.txt | 27 | See also bindings/arm/primecell.txt |
28 | |||
29 | Example: | ||
30 | |||
31 | uart@80120000 { | ||
32 | compatible = "arm,pl011", "arm,primecell"; | ||
33 | reg = <0x80120000 0x1000>; | ||
34 | interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; | ||
35 | dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>; | ||
36 | dma-names = "rx", "tx"; | ||
37 | clocks = <&foo_clk>, <&bar_clk>; | ||
38 | clock-names = "uartclk", "apb_pclk"; | ||
39 | }; | ||