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authorOlof Johansson <olof@lixom.net>2016-07-07 01:22:19 -0400
committerOlof Johansson <olof@lixom.net>2016-07-07 01:22:19 -0400
commita7f856d6ad3feeedfb560325dab67c8e253ea7a1 (patch)
treeb75603f3d0170a21e63371c64e90a6cbd9922a73
parent5fd70b1b17d47519b908ae6a4960dfdcf0a069ca (diff)
parent241eff3c198492b2d63e75723b774f2836fee8a3 (diff)
Merge tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Audio support and spi-flash on rk3288-veyron Chromedevices as well as i2s and ethernet support on rk3228/rk3229 devices and a dts file for the rk3229 eval board. * tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add support rk3229 evb board ARM: dts: rockchip: add GMAC nodes for RK322x SoCs ARM: dts: rockchip: add i2s nodes for RK322x SoCs ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi clk: rockchip: add clock-ids for rk3228 MAC clocks clk: rockchip: add clock-ids for rk3228 audio clocks ARM: dts: rockchip: rename i2s model for Veyron devices ARM: dts: rockchip: move rk3288 io-domain nodes to the grf ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards ARM: dts: rockchip: add SPI flash node for rk3288-veyron Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.txt3
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/rk3228-evb.dts2
-rw-r--r--arch/arm/boot/dts/rk3229-evb.dts90
-rw-r--r--arch/arm/boot/dts/rk322x.dtsi (renamed from arch/arm/boot/dts/rk3228.dtsi)118
-rw-r--r--arch/arm/boot/dts/rk3288-firefly.dtsi31
-rw-r--r--arch/arm/boot/dts/rk3288-miqi.dts26
-rw-r--r--arch/arm/boot/dts/rk3288-popmetal.dts31
-rw-r--r--arch/arm/boot/dts/rk3288-rock2-som.dtsi31
-rw-r--r--arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi101
-rw-r--r--arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi1
-rw-r--r--arch/arm/boot/dts/rk3288-veyron.dtsi31
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi5
-rw-r--r--include/dt-bindings/clock/rk3228-cru.h15
14 files changed, 409 insertions, 77 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 715d960d5eea..666864517069 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -107,6 +107,9 @@ Rockchip platforms device tree bindings
107 Required root node properties: 107 Required root node properties:
108 - compatible = "rockchip,rk3228-evb", "rockchip,rk3228"; 108 - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
109 109
110- Rockchip RK3229 Evaluation board:
111 - compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
112
110- Rockchip RK3399 evb: 113- Rockchip RK3399 evb:
111 Required root node properties: 114 Required root node properties:
112 - compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; 115 - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f65a24b861e5..276d9f6452b3 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
617 rk3066a-rayeager.dtb \ 617 rk3066a-rayeager.dtb \
618 rk3188-radxarock.dtb \ 618 rk3188-radxarock.dtb \
619 rk3228-evb.dtb \ 619 rk3228-evb.dtb \
620 rk3229-evb.dtb \
620 rk3288-evb-act8846.dtb \ 621 rk3288-evb-act8846.dtb \
621 rk3288-evb-rk808.dtb \ 622 rk3288-evb-rk808.dtb \
622 rk3288-firefly-beta.dtb \ 623 rk3288-firefly-beta.dtb \
diff --git a/arch/arm/boot/dts/rk3228-evb.dts b/arch/arm/boot/dts/rk3228-evb.dts
index 5956e8246abe..904668e2e666 100644
--- a/arch/arm/boot/dts/rk3228-evb.dts
+++ b/arch/arm/boot/dts/rk3228-evb.dts
@@ -40,7 +40,7 @@
40 40
41/dts-v1/; 41/dts-v1/;
42 42
43#include "rk3228.dtsi" 43#include "rk322x.dtsi"
44 44
45/ { 45/ {
46 model = "Rockchip RK3228 Evaluation board"; 46 model = "Rockchip RK3228 Evaluation board";
diff --git a/arch/arm/boot/dts/rk3229-evb.dts b/arch/arm/boot/dts/rk3229-evb.dts
new file mode 100644
index 000000000000..b6a12035a6bb
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-evb.dts
@@ -0,0 +1,90 @@
1/*
2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
5 * whole.
6 *
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41/dts-v1/;
42
43#include "rk322x.dtsi"
44
45/ {
46 model = "Rockchip RK3229 Evaluation board";
47 compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
48
49 memory {
50 device_type = "memory";
51 reg = <0x60000000 0x40000000>;
52 };
53
54 ext_gmac: ext_gmac {
55 compatible = "fixed-clock";
56 clock-frequency = <125000000>;
57 clock-output-names = "ext_gmac";
58 #clock-cells = <0>;
59 };
60
61 vcc_phy: vcc-phy-regulator {
62 compatible = "regulator-fixed";
63 enable-active-high;
64 regulator-name = "vcc_phy";
65 regulator-min-microvolt = <1800000>;
66 regulator-max-microvolt = <1800000>;
67 regulator-always-on;
68 regulator-boot-on;
69 };
70};
71
72&gmac {
73 assigned-clocks = <&cru SCLK_MAC_EXTCLK>, <&cru SCLK_MAC>;
74 assigned-clock-parents = <&ext_gmac>, <&cru SCLK_MAC_EXTCLK>;
75 clock_in_out = "input";
76 phy-supply = <&vcc_phy>;
77 phy-mode = "rgmii";
78 pinctrl-names = "default";
79 pinctrl-0 = <&rgmii_pins>;
80 snps,reset-gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
81 snps,reset-active-low;
82 snps,reset-delays-us = <0 10000 1000000>;
83 tx_delay = <0x30>;
84 rx_delay = <0x10>;
85 status = "okay";
86};
87
88&uart2 {
89 status = "okay";
90};
diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index e23a22e29155..9e6bf0e311bb 100644
--- a/arch/arm/boot/dts/rk3228.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -47,8 +47,6 @@
47#include "skeleton.dtsi" 47#include "skeleton.dtsi"
48 48
49/ { 49/ {
50 compatible = "rockchip,rk3228";
51
52 interrupt-parent = <&gic>; 50 interrupt-parent = <&gic>;
53 51
54 aliases { 52 aliases {
@@ -140,6 +138,47 @@
140 #clock-cells = <0>; 138 #clock-cells = <0>;
141 }; 139 };
142 140
141 i2s1: i2s1@100b0000 {
142 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
143 reg = <0x100b0000 0x4000>;
144 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
145 #address-cells = <1>;
146 #size-cells = <0>;
147 clock-names = "i2s_clk", "i2s_hclk";
148 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
149 dmas = <&pdma 14>, <&pdma 15>;
150 dma-names = "tx", "rx";
151 pinctrl-names = "default";
152 pinctrl-0 = <&i2s1_bus>;
153 status = "disabled";
154 };
155
156 i2s0: i2s0@100c0000 {
157 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
158 reg = <0x100c0000 0x4000>;
159 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162 clock-names = "i2s_clk", "i2s_hclk";
163 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
164 dmas = <&pdma 11>, <&pdma 12>;
165 dma-names = "tx", "rx";
166 status = "disabled";
167 };
168
169 i2s2: i2s2@100e0000 {
170 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
171 reg = <0x100e0000 0x4000>;
172 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 clock-names = "i2s_clk", "i2s_hclk";
176 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
177 dmas = <&pdma 0>, <&pdma 1>;
178 dma-names = "tx", "rx";
179 status = "disabled";
180 };
181
143 grf: syscon@11000000 { 182 grf: syscon@11000000 {
144 compatible = "syscon"; 183 compatible = "syscon";
145 reg = <0x11000000 0x1000>; 184 reg = <0x11000000 0x1000>;
@@ -376,6 +415,25 @@
376 status = "disabled"; 415 status = "disabled";
377 }; 416 };
378 417
418 gmac: ethernet@30200000 {
419 compatible = "rockchip,rk3228-gmac";
420 reg = <0x30200000 0x10000>;
421 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
422 interrupt-names = "macirq";
423 clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
424 <&cru SCLK_MAC_TX>, <&cru SCLK_MAC_REF>,
425 <&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>,
426 <&cru PCLK_GMAC>;
427 clock-names = "stmmaceth", "mac_clk_rx",
428 "mac_clk_tx", "clk_mac_ref",
429 "clk_mac_refout", "aclk_mac",
430 "pclk_mac";
431 resets = <&cru SRST_GMAC>;
432 reset-names = "stmmaceth";
433 rockchip,grf = <&grf>;
434 status = "disabled";
435 };
436
379 gic: interrupt-controller@32010000 { 437 gic: interrupt-controller@32010000 {
380 compatible = "arm,gic-400"; 438 compatible = "arm,gic-400";
381 interrupt-controller; 439 interrupt-controller;
@@ -460,6 +518,10 @@
460 bias-disable; 518 bias-disable;
461 }; 519 };
462 520
521 pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {
522 drive-strength = <12>;
523 };
524
463 emmc { 525 emmc {
464 emmc_clk: emmc-clk { 526 emmc_clk: emmc-clk {
465 rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>; 527 rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
@@ -481,6 +543,44 @@
481 }; 543 };
482 }; 544 };
483 545
546 gmac {
547 rgmii_pins: rgmii-pins {
548 rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
549 <2 12 RK_FUNC_1 &pcfg_pull_none>,
550 <2 25 RK_FUNC_1 &pcfg_pull_none>,
551 <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
552 <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
553 <2 22 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
554 <2 23 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
555 <2 9 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
556 <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
557 <2 17 RK_FUNC_1 &pcfg_pull_none>,
558 <2 16 RK_FUNC_1 &pcfg_pull_none>,
559 <2 21 RK_FUNC_2 &pcfg_pull_none>,
560 <2 20 RK_FUNC_2 &pcfg_pull_none>,
561 <2 11 RK_FUNC_1 &pcfg_pull_none>,
562 <2 8 RK_FUNC_1 &pcfg_pull_none>;
563 };
564
565 rmii_pins: rmii-pins {
566 rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
567 <2 12 RK_FUNC_1 &pcfg_pull_none>,
568 <2 25 RK_FUNC_1 &pcfg_pull_none>,
569 <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
570 <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
571 <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
572 <2 17 RK_FUNC_1 &pcfg_pull_none>,
573 <2 16 RK_FUNC_1 &pcfg_pull_none>,
574 <2 8 RK_FUNC_1 &pcfg_pull_none>,
575 <2 15 RK_FUNC_1 &pcfg_pull_none>;
576 };
577
578 phy_pins: phy-pins {
579 rockchip,pins = <2 14 RK_FUNC_2 &pcfg_pull_none>,
580 <2 8 RK_FUNC_2 &pcfg_pull_none>;
581 };
582 };
583
484 i2c0 { 584 i2c0 {
485 i2c0_xfer: i2c0-xfer { 585 i2c0_xfer: i2c0-xfer {
486 rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>, 586 rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
@@ -509,6 +609,20 @@
509 }; 609 };
510 }; 610 };
511 611
612 i2s1 {
613 i2s1_bus: i2s1-bus {
614 rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
615 <0 9 RK_FUNC_1 &pcfg_pull_none>,
616 <0 11 RK_FUNC_1 &pcfg_pull_none>,
617 <0 12 RK_FUNC_1 &pcfg_pull_none>,
618 <0 13 RK_FUNC_1 &pcfg_pull_none>,
619 <0 14 RK_FUNC_1 &pcfg_pull_none>,
620 <1 2 RK_FUNC_1 &pcfg_pull_none>,
621 <1 4 RK_FUNC_1 &pcfg_pull_none>,
622 <1 5 RK_FUNC_1 &pcfg_pull_none>;
623 };
624 };
625
512 pwm0 { 626 pwm0 {
513 pwm0_pin: pwm0-pin { 627 pwm0_pin: pwm0-pin {
514 rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>; 628 rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index d6cf9ada13c9..114c90fb65e2 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -64,22 +64,6 @@
64 clock-output-names = "ext_gmac"; 64 clock-output-names = "ext_gmac";
65 }; 65 };
66 66
67 io_domains: io-domains {
68 compatible = "rockchip,rk3288-io-voltage-domain";
69 rockchip,grf = <&grf>;
70
71 audio-supply = <&vcca_33>;
72 bb-supply = <&vcc_io>;
73 dvp-supply = <&dovdd_1v8>;
74 flash0-supply = <&vcc_flash>;
75 flash1-supply = <&vcc_lan>;
76 gpio30-supply = <&vcc_io>;
77 gpio1830-supply = <&vcc_io>;
78 lcdc-supply = <&vcc_io>;
79 sdcard-supply = <&vccio_sd>;
80 wifi-supply = <&vccio_wl>;
81 };
82
83 ir: ir-receiver { 67 ir: ir-receiver {
84 compatible = "gpio-ir-receiver"; 68 compatible = "gpio-ir-receiver";
85 pinctrl-names = "default"; 69 pinctrl-names = "default";
@@ -397,6 +381,21 @@
397 status = "okay"; 381 status = "okay";
398}; 382};
399 383
384&io_domains {
385 status = "okay";
386
387 audio-supply = <&vcca_33>;
388 bb-supply = <&vcc_io>;
389 dvp-supply = <&dovdd_1v8>;
390 flash0-supply = <&vcc_flash>;
391 flash1-supply = <&vcc_lan>;
392 gpio30-supply = <&vcc_io>;
393 gpio1830-supply = <&vcc_io>;
394 lcdc-supply = <&vcc_io>;
395 sdcard-supply = <&vccio_sd>;
396 wifi-supply = <&vccio_wl>;
397};
398
400&pinctrl { 399&pinctrl {
401 pcfg_output_high: pcfg-output-high { 400 pcfg_output_high: pcfg-output-high {
402 output-high; 401 output-high;
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 8643103d8cd8..24488421f0f0 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -64,19 +64,6 @@
64 clock-output-names = "ext_gmac"; 64 clock-output-names = "ext_gmac";
65 }; 65 };
66 66
67 io_domains: io-domains {
68 compatible = "rockchip,rk3288-io-voltage-domain";
69
70 audio-supply = <&vcca_33>;
71 flash0-supply = <&vcc_flash>;
72 flash1-supply = <&vcc_lan>;
73 gpio30-supply = <&vcc_io>;
74 gpio1830-supply = <&vcc_io>;
75 lcdc-supply = <&vcc_io>;
76 sdcard-supply = <&vccio_sd>;
77 wifi-supply = <&vcc_18>;
78 };
79
80 leds { 67 leds {
81 compatible = "gpio-leds"; 68 compatible = "gpio-leds";
82 69
@@ -321,6 +308,19 @@
321 status = "okay"; 308 status = "okay";
322}; 309};
323 310
311&io_domains {
312 status = "okay";
313
314 audio-supply = <&vcca_33>;
315 flash0-supply = <&vcc_flash>;
316 flash1-supply = <&vcc_lan>;
317 gpio30-supply = <&vcc_io>;
318 gpio1830-supply = <&vcc_io>;
319 lcdc-supply = <&vcc_io>;
320 sdcard-supply = <&vccio_sd>;
321 wifi-supply = <&vcc_18>;
322};
323
324&pinctrl { 324&pinctrl {
325 pcfg_output_high: pcfg-output-high { 325 pcfg_output_high: pcfg-output-high {
326 output-high; 326 output-high;
diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts
index 720717bb3614..dda8d259bb6d 100644
--- a/arch/arm/boot/dts/rk3288-popmetal.dts
+++ b/arch/arm/boot/dts/rk3288-popmetal.dts
@@ -77,22 +77,6 @@
77 }; 77 };
78 }; 78 };
79 79
80 io_domains: io-domains {
81 compatible = "rockchip,rk3288-io-voltage-domain";
82 rockchip,grf = <&grf>;
83
84 audio-supply = <&vcca_33>;
85 bb-supply = <&vcc_io>;
86 dvp-supply = <&vcc18_dvp>;
87 flash0-supply = <&vcc_flash>;
88 flash1-supply = <&vcc_lan>;
89 gpio30-supply = <&vcc_io>;
90 gpio1830-supply = <&vcc_io>;
91 lcdc-supply = <&vcc_io>;
92 sdcard-supply = <&vccio_sd>;
93 wifi-supply = <&vccio_wl>;
94 };
95
96 ir: ir-receiver { 80 ir: ir-receiver {
97 compatible = "gpio-ir-receiver"; 81 compatible = "gpio-ir-receiver";
98 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 82 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
@@ -437,6 +421,21 @@
437 status = "okay"; 421 status = "okay";
438}; 422};
439 423
424&io_domains {
425 status = "okay";
426
427 audio-supply = <&vcca_33>;
428 bb-supply = <&vcc_io>;
429 dvp-supply = <&vcc18_dvp>;
430 flash0-supply = <&vcc_flash>;
431 flash1-supply = <&vcc_lan>;
432 gpio30-supply = <&vcc_io>;
433 gpio1830-supply = <&vcc_io>;
434 lcdc-supply = <&vcc_io>;
435 sdcard-supply = <&vccio_sd>;
436 wifi-supply = <&vccio_wl>;
437};
438
440&pinctrl { 439&pinctrl {
441 ak8963 { 440 ak8963 {
442 comp_int: comp-int { 441 comp_int: comp-int {
diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
index e1ee9f949035..bb1f01e037ba 100644
--- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
@@ -61,22 +61,6 @@
61 clock-output-names = "ext_gmac"; 61 clock-output-names = "ext_gmac";
62 }; 62 };
63 63
64 io_domains: io-domains {
65 compatible = "rockchip,rk3288-io-voltage-domain";
66 rockchip,grf = <&grf>;
67
68 audio-supply = <&vcc_io>;
69 bb-supply = <&vcc_io>;
70 dvp-supply = <&vcc_18>;
71 flash0-supply = <&vcc_flash>;
72 flash1-supply = <&vccio_pmu>;
73 gpio30-supply = <&vccio_pmu>;
74 gpio1830 = <&vcc_io>;
75 lcdc-supply = <&vcc_io>;
76 sdcard-supply = <&vccio_sd>;
77 wifi-supply = <&vcc_18>;
78 };
79
80 vcc_flash: flash-regulator { 64 vcc_flash: flash-regulator {
81 compatible = "regulator-fixed"; 65 compatible = "regulator-fixed";
82 regulator-name = "vcc_sys"; 66 regulator-name = "vcc_sys";
@@ -259,6 +243,21 @@
259 }; 243 };
260}; 244};
261 245
246&io_domains {
247 status = "okay";
248
249 audio-supply = <&vcc_io>;
250 bb-supply = <&vcc_io>;
251 dvp-supply = <&vcc_18>;
252 flash0-supply = <&vcc_flash>;
253 flash1-supply = <&vccio_pmu>;
254 gpio30-supply = <&vccio_pmu>;
255 gpio1830 = <&vcc_io>;
256 lcdc-supply = <&vcc_io>;
257 sdcard-supply = <&vccio_sd>;
258 wifi-supply = <&vcc_18>;
259};
260
262&pinctrl { 261&pinctrl {
263 pcfg_output_high: pcfg-output-high { 262 pcfg_output_high: pcfg-output-high {
264 output-high; 263 output-high;
diff --git a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
new file mode 100644
index 000000000000..6d105914a4f3
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
@@ -0,0 +1,101 @@
1/*
2 * Google Veyron (and derivatives) fragment for the max98090 audio
3 * codec and analog headphone jack.
4 *
5 * Copyright 2016 Google, Inc
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12/ {
13 sound {
14 compatible = "rockchip,rockchip-audio-max98090";
15 pinctrl-names = "default";
16 pinctrl-0 = <&mic_det>, <&hp_det>;
17 rockchip,model = "VEYRON-I2S";
18 rockchip,i2s-controller = <&i2s>;
19 rockchip,audio-codec = <&max98090>;
20 rockchip,hp-det-gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>;
21 rockchip,mic-det-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
22 rockchip,headset-codec = <&headsetcodec>;
23 };
24};
25
26&i2c2 {
27 max98090: max98090@10 {
28 compatible = "maxim,max98090";
29 reg = <0x10>;
30 interrupt-parent = <&gpio6>;
31 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
32 clock-names = "mclk";
33 clocks = <&cru SCLK_I2S0_OUT>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&int_codec>;
36 };
37};
38
39&i2c4 {
40 headsetcodec: ts3a227e@3b {
41 compatible = "ti,ts3a227e";
42 reg = <0x3b>;
43 interrupt-parent = <&gpio0>;
44 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
45 pinctrl-names = "default";
46 pinctrl-0 = <&ts3a227e_int_l>;
47 ti,micbias = <7>; /* MICBIAS = 2.8V */
48 };
49};
50
51&i2s {
52 status = "okay";
53};
54
55&io_domains {
56 audio-supply = <&vcc18_codec>;
57};
58
59&rk808 {
60 vcc10-supply = <&vcc33_sys>;
61
62 regulators {
63 vcc18_codec: LDO_REG6 {
64 regulator-name = "vcc18_codec";
65 regulator-always-on;
66 regulator-boot-on;
67 regulator-min-microvolt = <1800000>;
68 regulator-max-microvolt = <1800000>;
69 regulator-state-mem {
70 regulator-off-in-suspend;
71 };
72 };
73 };
74};
75
76&pinctrl {
77 codec {
78 hp_det: hp-det {
79 rockchip,pins = <6 5 RK_FUNC_GPIO &pcfg_pull_up>;
80 };
81
82 /*
83 * HACK: We're going to _pull down_ this _active low_ interrupt
84 * so that it never fires. We don't need this interrupt because
85 * we've got a ts3a227e chip but the driver requires it.
86 */
87 int_codec: int-codec {
88 rockchip,pins = <6 7 RK_FUNC_GPIO &pcfg_pull_down>;
89 };
90
91 mic_det: mic-det {
92 rockchip,pins = <6 11 RK_FUNC_GPIO &pcfg_pull_up>;
93 };
94 };
95
96 headset {
97 ts3a227e_int_l: ts3a227e-int-l {
98 rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_up>;
99 };
100 };
101};
diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
index 2958c36d12a0..ce1f87980bcb 100644
--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
@@ -46,6 +46,7 @@
46#include <dt-bindings/clock/rockchip,rk808.h> 46#include <dt-bindings/clock/rockchip,rk808.h>
47#include <dt-bindings/input/input.h> 47#include <dt-bindings/input/input.h>
48#include "rk3288-veyron.dtsi" 48#include "rk3288-veyron.dtsi"
49#include "rk3288-veyron-analog-audio.dtsi"
49#include "rk3288-veyron-sdmmc.dtsi" 50#include "rk3288-veyron-sdmmc.dtsi"
50 51
51/ { 52/ {
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index b2557bf5a58f..3dd2cca48c11 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -83,19 +83,6 @@
83 reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; 83 reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
84 }; 84 };
85 85
86 io_domains: io-domains {
87 compatible = "rockchip,rk3288-io-voltage-domain";
88 rockchip,grf = <&grf>;
89
90 bb-supply = <&vcc33_io>;
91 dvp-supply = <&vcc_18>;
92 flash0-supply = <&vcc18_flashio>;
93 gpio1830-supply = <&vcc33_io>;
94 gpio30-supply = <&vcc33_io>;
95 lcdc-supply = <&vcc33_lcd>;
96 wifi-supply = <&vcc18_wl>;
97 };
98
99 sdio_pwrseq: sdio-pwrseq { 86 sdio_pwrseq: sdio-pwrseq {
100 compatible = "mmc-pwrseq-simple"; 87 compatible = "mmc-pwrseq-simple";
101 clocks = <&rk808 RK808_CLKOUT1>; 88 clocks = <&rk808 RK808_CLKOUT1>;
@@ -355,6 +342,18 @@
355 i2c-scl-rising-time-ns = <1000>; 342 i2c-scl-rising-time-ns = <1000>;
356}; 343};
357 344
345&io_domains {
346 status = "okay";
347
348 bb-supply = <&vcc33_io>;
349 dvp-supply = <&vcc_18>;
350 flash0-supply = <&vcc18_flashio>;
351 gpio1830-supply = <&vcc33_io>;
352 gpio30-supply = <&vcc33_io>;
353 lcdc-supply = <&vcc33_lcd>;
354 wifi-supply = <&vcc18_wl>;
355};
356
358&pwm1 { 357&pwm1 {
359 status = "okay"; 358 status = "okay";
360}; 359};
@@ -383,6 +382,12 @@
383 status = "okay"; 382 status = "okay";
384 383
385 rx-sample-delay-ns = <12>; 384 rx-sample-delay-ns = <12>;
385
386 flash@0 {
387 compatible = "jedec,spi-nor";
388 spi-max-frequency = <50000000>;
389 reg = <0>;
390 };
386}; 391};
387 392
388&tsadc { 393&tsadc {
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 3b44ef3cff12..7fa932fcd08e 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -826,6 +826,11 @@
826 #phy-cells = <0>; 826 #phy-cells = <0>;
827 status = "disabled"; 827 status = "disabled";
828 }; 828 };
829
830 io_domains: io-domains {
831 compatible = "rockchip,rk3288-io-voltage-domain";
832 status = "disabled";
833 };
829 }; 834 };
830 835
831 wdt: watchdog@ff800000 { 836 wdt: watchdog@ff800000 {
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 5d43ed9b05ad..b27e2b1a65e3 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -52,6 +52,15 @@
52#define SCLK_EMMC_SAMPLE 121 52#define SCLK_EMMC_SAMPLE 121
53#define SCLK_VOP 122 53#define SCLK_VOP 122
54#define SCLK_HDMI_HDCP 123 54#define SCLK_HDMI_HDCP 123
55#define SCLK_MAC_SRC 124
56#define SCLK_MAC_EXTCLK 125
57#define SCLK_MAC 126
58#define SCLK_MAC_REFOUT 127
59#define SCLK_MAC_REF 128
60#define SCLK_MAC_RX 129
61#define SCLK_MAC_TX 130
62#define SCLK_MAC_PHY 131
63#define SCLK_MAC_OUT 132
55 64
56/* dclk gates */ 65/* dclk gates */
57#define DCLK_VOP 190 66#define DCLK_VOP 190
@@ -61,6 +70,7 @@
61#define ACLK_DMAC 194 70#define ACLK_DMAC 194
62#define ACLK_PERI 210 71#define ACLK_PERI 210
63#define ACLK_VOP 211 72#define ACLK_VOP 211
73#define ACLK_GMAC 212
64 74
65/* pclk gates */ 75/* pclk gates */
66#define PCLK_GPIO0 320 76#define PCLK_GPIO0 320
@@ -82,8 +92,13 @@
82#define PCLK_PERI 363 92#define PCLK_PERI 363
83#define PCLK_HDMI_CTRL 364 93#define PCLK_HDMI_CTRL 364
84#define PCLK_HDMI_PHY 365 94#define PCLK_HDMI_PHY 365
95#define PCLK_GMAC 367
85 96
86/* hclk gates */ 97/* hclk gates */
98#define HCLK_I2S0_8CH 442
99#define HCLK_I2S1_8CH 443
100#define HCLK_I2S2_2CH 444
101#define HCLK_SPDIF_8CH 445
87#define HCLK_VOP 452 102#define HCLK_VOP 452
88#define HCLK_NANDC 453 103#define HCLK_NANDC 453
89#define HCLK_SDMMC 456 104#define HCLK_SDMMC 456
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-18 19:24:33 -0400