Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is the first set of bugfixes for ARM SoCs, fixing a couple of
  stability problems, mostly on TI OMAP and Rockchips platforms:

   - OMAP2 hwmod clocks must be enabled in the correct order

   - OMAP3 Wakeup from resume through PRM IRQ was unreliable

   - one regression on OMAP5 caused by a kexec fix

   - Rockchip ethernet needs some settings for stable operation on
     Rock64

   - Rockchip based Chrombook Plus needs another clock setting for
     stable display suspend/resume

   - Rockchip based phyCORE-RK3288 was able to run at an invalid CPU
     clock frequency

   - Rockchip MMC link was sometimes unreliable

   - multiple fixes to avoid crashes in the Broadcom STB DPFE driver

  Other minor changes include:

   - Devicetree fixes for incorrect hardware description (rockchip,
     omap, Gemini, amlogic)

   - some MAINTAINER file updates to correct email and git addresses

   - some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
     cavium, qualcomm, hisilicon, zx)

   - fixes for LTO-compilation (orion, davinci, clps711x)

   - one fix for an incorrect Kconfig errata selection

   - a memory leak in the OMAP timer driver

   - a kernel data leak in OMAP1 debugfs files"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  MAINTAINERS: update entries for ARM/STM32
  ARM: dts: bcm283x: Move arm-pmu out of soc node
  ARM: dts: bcm283x: Fix unit address of local_intc
  ARM: dts: NSP: Fix amount of RAM on BCM958625HR
  ARM: dts: Set D-Link DNS-313 SATA to muxmode 0
  ARM: omap2: set CONFIG_LIRC=y in defconfig
  ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6 DualLite/Solo RQS
  memory: brcmstb: dpfe: support new way of passing data from the DCPU
  memory: brcmstb: dpfe: fix type declaration of variable "ret"
  memory: brcmstb: dpfe: properly mask vendor error bits
  ARM: BCM: dts: Remove leading 0x and 0s from bindings notation
  ARM: orion: fix orion_ge00_switch_board_info initialization
  ARM: davinci: mark spi_board_info arrays as const
  ARM: clps711x: mark clps711x_compat as const
  arm: zx: dts: Remove leading 0x and 0s from bindings notation
  arm64: dts: Remove leading 0x and 0s from bindings notation
  arm64: dts: cavium: fix PCI bus dtc warnings
  MAINTAINERS: ARM: at91: update my email address
  soc: imx: gpc: de-register power domains only if initialized
  ARM: dts: rockchip: Fix DWMMC clocks
  ...

45 files changed, 191 insertions, 137 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index 93a12af4f180..8249251527ca 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1238,7 +1238,7 @@ F:	drivers/clk/at91
 
 ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
 M:      Nicolas Ferre <nicolas.ferre@microchip.com>
-M:      Alexandre Belloni <alexandre.belloni@free-electrons.com>
+M:      Alexandre Belloni <alexandre.belloni@bootlin.com>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 W:      http://www.linux4sam.org
 T:      git git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91.git
@@ -1590,7 +1590,7 @@ ARM/Marvell Dove/MV78xx0/Orion SOC support
 M:      Jason Cooper <jason@lakedaemon.net>
 M:      Andrew Lunn <andrew@lunn.ch>
 M:      Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-M:      Gregory Clement <gregory.clement@free-electrons.com>
+M:      Gregory Clement <gregory.clement@bootlin.com>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
 F:      Documentation/devicetree/bindings/soc/dove/
@@ -1604,7 +1604,7 @@ F:	arch/arm/boot/dts/orion5x*
 ARM/Marvell Kirkwood and Armada 370, 375, 38x, 39x, XP, 3700, 7K/8K SOC support
 M:      Jason Cooper <jason@lakedaemon.net>
 M:      Andrew Lunn <andrew@lunn.ch>
-M:      Gregory Clement <gregory.clement@free-electrons.com>
+M:      Gregory Clement <gregory.clement@bootlin.com>
 M:      Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
@@ -1999,8 +1999,10 @@ M:	Maxime Coquelin <mcoquelin.stm32@gmail.com>
 M:      Alexandre Torgue <alexandre.torgue@st.com>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
-T:      git git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32.git
+T:      git git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git stm32-next
 N:      stm32
+F:      arch/arm/boot/dts/stm32*
+F:      arch/arm/mach-stm32/
 F:      drivers/clocksource/armv7m_systick.c
 
 ARM/TANGO ARCHITECTURE
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index 18045c38bcf1..db7cded1b7ad 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -55,7 +55,7 @@
                       <0x3ff00100 0x100>;
         };
 
-        smc@0x3404c000 {
+        smc@3404c000 {
                 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
                 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
         };
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 6dde95f21cef..266f2611dc22 100644
--- a/arch/arm/boot/dts/bcm21664.dtsi
+++ b/arch/arm/boot/dts/bcm21664.dtsi
@@ -55,7 +55,7 @@
                       <0x3ff00100 0x100>;
         };
 
-        smc@0x3404e000 {
+        smc@3404e000 {
                 compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
                 reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
         };
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 0e3d2a5ff208..a5c3824c8056 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -18,10 +18,10 @@
         soc {
                 ranges = <0x7e000000 0x20000000 0x02000000>;
                 dma-ranges = <0x40000000 0x00000000 0x20000000>;
+        };
 
-                arm-pmu {
-                        compatible = "arm,arm1176-pmu";
-                };
+        arm-pmu {
+                compatible = "arm,arm1176-pmu";
         };
 };
 
diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi
index 1dfd76442777..c933e8413884 100644
--- a/arch/arm/boot/dts/bcm2836.dtsi
+++ b/arch/arm/boot/dts/bcm2836.dtsi
@@ -9,19 +9,19 @@
                          <0x40000000 0x40000000 0x00001000>;
                 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
 
-                local_intc: local_intc {
+                local_intc: local_intc@40000000 {
                         compatible = "brcm,bcm2836-l1-intc";
                         reg = <0x40000000 0x100>;
                         interrupt-controller;
                         #interrupt-cells = <2>;
                         interrupt-parent = <&local_intc>;
                 };
+        };
 
-                arm-pmu {
-                        compatible = "arm,cortex-a7-pmu";
-                        interrupt-parent = <&local_intc>;
-                        interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
-                };
+        arm-pmu {
+                compatible = "arm,cortex-a7-pmu";
+                interrupt-parent = <&local_intc>;
+                interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
         };
 
         timer {
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
index efa7d3387ab2..7704bb029605 100644
--- a/arch/arm/boot/dts/bcm2837.dtsi
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -8,7 +8,7 @@
                          <0x40000000 0x40000000 0x00001000>;
                 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
 
-                local_intc: local_intc {
+                local_intc: local_intc@40000000 {
                         compatible = "brcm,bcm2836-l1-intc";
                         reg = <0x40000000 0x100>;
                         interrupt-controller;
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 18db25a5a66e..9d293decf8d3 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -465,7 +465,7 @@
                         status = "disabled";
                 };
 
-                aux: aux@0x7e215000 {
+                aux: aux@7e215000 {
                         compatible = "brcm,bcm2835-aux";
                         #clock-cells = <1>;
                         reg = <0x7e215000 0x8>;
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 6a44b8021702..f0e2008f7490 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -49,7 +49,7 @@
 
         memory {
                 device_type = "memory";
-                reg = <0x60000000 0x80000000>;
+                reg = <0x60000000 0x20000000>;
         };
 
         gpio-restart {
diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index 08568ce24d06..da8bb9d60f99 100644
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -269,7 +269,7 @@
 
                 sata: sata@46000000 {
                         /* The ROM uses this muxmode */
-                        cortina,gemini-ata-muxmode = <3>;
+                        cortina,gemini-ata-muxmode = <0>;
                         cortina,gemini-enable-sata-bridge;
                         status = "okay";
                 };
diff --git a/arch/arm/boot/dts/imx6dl-icore-rqs.dts b/arch/arm/boot/dts/imx6dl-icore-rqs.dts
index cf42c2f5cdc7..1281bc39b7ab 100644
--- a/arch/arm/boot/dts/imx6dl-icore-rqs.dts
+++ b/arch/arm/boot/dts/imx6dl-icore-rqs.dts
@@ -42,7 +42,7 @@
 
 /dts-v1/;
 
-#include "imx6q.dtsi"
+#include "imx6dl.dtsi"
 #include "imx6qdl-icore-rqs.dtsi"
 
 / {
diff --git a/arch/arm/boot/dts/logicpd-som-lv.dtsi b/arch/arm/boot/dts/logicpd-som-lv.dtsi
index c1aa7a4518fb..a30ee9fcb3ae 100644
--- a/arch/arm/boot/dts/logicpd-som-lv.dtsi
+++ b/arch/arm/boot/dts/logicpd-som-lv.dtsi
@@ -71,6 +71,8 @@
 };
 
 &i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
         clock-frequency = <2600000>;
 
         twl: twl@48 {
@@ -189,7 +191,12 @@
                 >;
         };
 
-
+        i2c1_pins: pinmux_i2c1_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
+                        OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
+                >;
+        };
 };
 
 &omap3_pmx_wkup {
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index b50b796e15c7..47915447a826 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -66,6 +66,8 @@
 };
 
 &i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
         clock-frequency = <2600000>;
 
         twl: twl@48 {
@@ -136,6 +138,12 @@
                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7.hsusb0_data7 */
                 >;
         };
+        i2c1_pins: pinmux_i2c1_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
+                        OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
+                >;
+        };
 };
 
 &uart2 {
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index ec2c8baef62a..592e17fd4eeb 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -47,7 +47,7 @@
                         gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;    /* gpio3_83 */
                         wakeup-source;
                         autorepeat;
-                        debounce_interval = <50>;
+                        debounce-interval = <50>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 3b704cfed69a..a97458112ff6 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -280,7 +280,7 @@
                 max-frequency = <37500000>;
                 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
                          <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                 resets = <&cru SRST_SDIO>;
@@ -298,7 +298,7 @@
                 max-frequency = <37500000>;
                 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                          <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 default-sample-phase = <158>;
                 disable-wp;
                 dmas = <&pdma 12>;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 780ec3a99b21..341deaf62ff6 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -621,7 +621,7 @@
                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                          <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
@@ -634,7 +634,7 @@
                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
                          <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
@@ -649,7 +649,7 @@
                 max-frequency = <37500000>;
                 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                          <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 bus-width = <8>;
                 default-sample-phase = <158>;
                 fifo-depth = <0x100>;
diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
index 99cfae875e12..5eae4776ffde 100644
--- a/arch/arm/boot/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
@@ -110,26 +110,6 @@
         };
 };
 
-&cpu0 {
-        cpu0-supply = <&vdd_cpu>;
-        operating-points = <
-                /* KHz    uV */
-                1800000 1400000
-                1608000 1350000
-                1512000 1300000
-                1416000 1200000
-                1200000 1100000
-                1008000 1050000
-                 816000 1000000
-                 696000  950000
-                 600000  900000
-                 408000  900000
-                 312000  900000
-                 216000  900000
-                 126000  900000
-        >;
-};
-
 &emmc {
         status = "okay";
         bus-width = <8>;
diff --git a/arch/arm/boot/dts/zx296702.dtsi b/arch/arm/boot/dts/zx296702.dtsi
index 8a74efdb6360..240e7a23d81f 100644
--- a/arch/arm/boot/dts/zx296702.dtsi
+++ b/arch/arm/boot/dts/zx296702.dtsi
@@ -56,7 +56,7 @@
                         clocks = <&topclk ZX296702_A9_PERIPHCLK>;
                 };
 
-                l2cc: l2-cache-controller@0x00c00000 {
+                l2cc: l2-cache-controller@c00000 {
                         compatible = "arm,pl310-cache";
                         reg = <0x00c00000 0x1000>;
                         cache-unified;
@@ -67,30 +67,30 @@
                         arm,double-linefill-incr = <0>;
                 };
 
-                pcu: pcu@0xa0008000 {
+                pcu: pcu@a0008000 {
                         compatible = "zte,zx296702-pcu";
                         reg = <0xa0008000 0x1000>;
                 };
 
-                topclk: topclk@0x09800000 {
+                topclk: topclk@9800000 {
                         compatible = "zte,zx296702-topcrm-clk";
                         reg = <0x09800000 0x1000>;
                         #clock-cells = <1>;
                 };
 
-                lsp1clk: lsp1clk@0x09400000 {
+                lsp1clk: lsp1clk@9400000 {
                         compatible = "zte,zx296702-lsp1crpm-clk";
                         reg = <0x09400000 0x1000>;
                         #clock-cells = <1>;
                 };
 
-                lsp0clk: lsp0clk@0x0b000000 {
+                lsp0clk: lsp0clk@b000000 {
                         compatible = "zte,zx296702-lsp0crpm-clk";
                         reg = <0x0b000000 0x1000>;
                         #clock-cells = <1>;
                 };
 
-                uart0: serial@0x09405000 {
+                uart0: serial@9405000 {
                         compatible = "zte,zx296702-uart";
                         reg = <0x09405000 0x1000>;
                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
@@ -98,7 +98,7 @@
                         status = "disabled";
                 };
 
-                uart1: serial@0x09406000 {
+                uart1: serial@9406000 {
                         compatible = "zte,zx296702-uart";
                         reg = <0x09406000 0x1000>;
                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
@@ -106,7 +106,7 @@
                         status = "disabled";
                 };
 
-                mmc0: mmc@0x09408000 {
+                mmc0: mmc@9408000 {
                         compatible = "snps,dw-mshc";
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -119,7 +119,7 @@
                         status = "disabled";
                 };
 
-                mmc1: mmc@0x0b003000 {
+                mmc1: mmc@b003000 {
                         compatible = "snps,dw-mshc";
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -132,7 +132,7 @@
                         status = "disabled";
                 };
 
-                sysctrl: sysctrl@0xa0007000 {
+                sysctrl: sysctrl@a0007000 {
                         compatible = "zte,sysctrl", "syscon";
                         reg = <0xa0007000 0x1000>;
                 };
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 2f145c4af93a..92674f247a12 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -319,7 +319,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
 CONFIG_RC_CORE=m
 CONFIG_MEDIA_CONTROLLER=y
 CONFIG_VIDEO_V4L2_SUBDEV_API=y
-CONFIG_LIRC=m
+CONFIG_LIRC=y
 CONFIG_RC_DEVICES=y
 CONFIG_IR_RX51=m
 CONFIG_V4L_PLATFORM_DRIVERS=y
diff --git a/arch/arm/mach-clps711x/board-dt.c b/arch/arm/mach-clps711x/board-dt.c
index ee1f83b1a332..4c89a8e9a2e3 100644
--- a/arch/arm/mach-clps711x/board-dt.c
+++ b/arch/arm/mach-clps711x/board-dt.c
@@ -69,7 +69,7 @@ static void clps711x_restart(enum reboot_mode mode, const char *cmd)
         soft_restart(0);
 }
 
-static const char *clps711x_compat[] __initconst = {
+static const char *const clps711x_compat[] __initconst = {
         "cirrus,ep7209",
         NULL
 };
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index e457f299cd44..d6b11907380c 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -368,7 +368,7 @@ static struct spi_eeprom at25640a = {
         .flags          = EE_ADDR2,
 };
 
-static struct spi_board_info dm355_evm_spi_info[] __initconst = {
+static const struct spi_board_info dm355_evm_spi_info[] __initconst = {
         {
                 .modalias       = "at25",
                 .platform_data  = &at25640a,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index be997243447b..fad9a5611a5d 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -217,7 +217,7 @@ static struct spi_eeprom at25640a = {
         .flags          = EE_ADDR2,
 };
 
-static struct spi_board_info dm355_leopard_spi_info[] __initconst = {
+static const struct spi_board_info dm355_leopard_spi_info[] __initconst = {
         {
                 .modalias       = "at25",
                 .platform_data  = &at25640a,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index e75741fb2c1d..e3780986d2a3 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -726,7 +726,7 @@ static struct spi_eeprom at25640 = {
         .flags          = EE_ADDR2,
 };
 
-static struct spi_board_info dm365_evm_spi_info[] __initconst = {
+static const struct spi_board_info dm365_evm_spi_info[] __initconst = {
         {
                 .modalias       = "at25",
                 .platform_data  = &at25640,
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 6b32dc527edc..2c20599cc350 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -41,7 +41,7 @@ config MACH_ARMADA_375
         depends on ARCH_MULTI_V7
         select ARMADA_370_XP_IRQ
         select ARM_ERRATA_720789
-        select ARM_ERRATA_753970
+        select PL310_ERRATA_753970
         select ARM_GIC
         select ARMADA_375_CLK
         select HAVE_ARM_SCU
@@ -57,7 +57,7 @@ config MACH_ARMADA_38X
         bool "Marvell Armada 380/385 boards"
         depends on ARCH_MULTI_V7
         select ARM_ERRATA_720789
-        select ARM_ERRATA_753970
+        select PL310_ERRATA_753970
         select ARM_GIC
         select ARM_GLOBAL_TIMER
         select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 43e3e188f521..fa512413a471 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -1011,17 +1011,17 @@ static int clk_debugfs_register_one(struct clk *c)
                 return -ENOMEM;
         c->dent = d;
 
-        d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
+        d = debugfs_create_u8("usecount", S_IRUGO, c->dent, &c->usecount);
         if (!d) {
                 err = -ENOMEM;
                 goto err_out;
         }
-        d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
+        d = debugfs_create_ulong("rate", S_IRUGO, c->dent, &c->rate);
         if (!d) {
                 err = -ENOMEM;
                 goto err_out;
         }
-        d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
+        d = debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags);
         if (!d) {
                 err = -ENOMEM;
                 goto err_out;
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 4bb6751864a5..fc5fb776a710 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -299,8 +299,6 @@ static void irq_save_context(void)
         if (soc_is_dra7xx())
                 return;
 
-        if (!sar_base)
-                sar_base = omap4_get_sar_ram_base();
         if (wakeupgen_ops && wakeupgen_ops->save_context)
                 wakeupgen_ops->save_context();
 }
@@ -598,6 +596,8 @@ static int __init wakeupgen_init(struct device_node *node,
         irq_hotplug_init();
         irq_pm_init();
 
+        sar_base = omap4_get_sar_ram_base();
+
         return 0;
 }
 IRQCHIP_DECLARE(ti_wakeupgen, "ti,omap4-wugen-mpu", wakeupgen_init);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 124f9af34a15..34156eca8e23 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -977,6 +977,9 @@ static int _enable_clocks(struct omap_hwmod *oh)
 
         pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
 
+        if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
+                _enable_optional_clocks(oh);
+
         if (oh->_clk)
                 clk_enable(oh->_clk);
 
@@ -985,9 +988,6 @@ static int _enable_clocks(struct omap_hwmod *oh)
                         clk_enable(os->_clk);
         }
 
-        if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
-                _enable_optional_clocks(oh);
-
         /* The opt clocks are controlled by the device driver. */
 
         return 0;
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 366158a54fcd..6f68576e5695 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -186,7 +186,7 @@ static void omap_pm_end(void)
         cpu_idle_poll_ctrl(false);
 }
 
-static void omap_pm_finish(void)
+static void omap_pm_wake(void)
 {
         if (soc_is_omap34xx())
                 omap_prcm_irq_complete();
@@ -196,7 +196,7 @@ static const struct platform_suspend_ops omap_pm_ops = {
         .begin          = omap_pm_begin,
         .end            = omap_pm_end,
         .enter          = omap_pm_enter,
-        .finish         = omap_pm_finish,
+        .wake           = omap_pm_wake,
         .valid          = suspend_valid_only_mem,
 };
 
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index ece09c9461f7..d61fbd7a2840 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -156,12 +156,6 @@ static struct clock_event_device clockevent_gpt = {
         .tick_resume            = omap2_gp_timer_shutdown,
 };
 
-static struct property device_disabled = {
-        .name = "status",
-        .length = sizeof("disabled"),
-        .value = "disabled",
-};
-
 static const struct of_device_id omap_timer_match[] __initconst = {
         { .compatible = "ti,omap2420-timer", },
         { .compatible = "ti,omap3430-timer", },
@@ -203,8 +197,17 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id *
                                   of_get_property(np, "ti,timer-secure", NULL)))
                         continue;
 
-                if (!of_device_is_compatible(np, "ti,omap-counter32k"))
-                        of_add_property(np, &device_disabled);
+                if (!of_device_is_compatible(np, "ti,omap-counter32k")) {
+                        struct property *prop;
+
+                        prop = kzalloc(sizeof(*prop), GFP_KERNEL);
+                        if (!prop)
+                                return NULL;
+                        prop->name = "status";
+                        prop->value = "disabled";
+                        prop->length = strlen(prop->value);
+                        of_add_property(np, prop);
+                }
                 return np;
         }
 
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index aff6994950ba..a2399fd66e97 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -472,28 +472,27 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
 /*****************************************************************************
  * Ethernet switch
  ****************************************************************************/
-static __initconst const char *orion_ge00_mvmdio_bus_name = "orion-mii";
-static __initdata struct mdio_board_info
-                  orion_ge00_switch_board_info;
+static __initdata struct mdio_board_info orion_ge00_switch_board_info = {
+        .bus_id   = "orion-mii",
+        .modalias = "mv88e6085",
+};
 
 void __init orion_ge00_switch_init(struct dsa_chip_data *d)
 {
-        struct mdio_board_info *bd;
         unsigned int i;
 
         if (!IS_BUILTIN(CONFIG_PHYLIB))
                 return;
 
-        for (i = 0; i < ARRAY_SIZE(d->port_names); i++)
-                if (!strcmp(d->port_names[i], "cpu"))
+        for (i = 0; i < ARRAY_SIZE(d->port_names); i++) {
+                if (!strcmp(d->port_names[i], "cpu")) {
+                        d->netdev[i] = &orion_ge00.dev;
                         break;
+                }
+        }
 
-        bd = &orion_ge00_switch_board_info;
-        bd->bus_id = orion_ge00_mvmdio_bus_name;
-        bd->mdio_addr = d->sw_addr;
-        d->netdev[i] = &orion_ge00.dev;
-        strcpy(bd->modalias, "mv88e6085");
-        bd->platform_data = d;
+        orion_ge00_switch_board_info.mdio_addr = d->sw_addr;
+        orion_ge00_switch_board_info.platform_data = d;
 
         mdiobus_register_board_info(&orion_ge00_switch_board_info, 1);
 }
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index a80632641b39..70c776ef7aa7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -165,14 +165,14 @@
 
                         uart_A: serial@24000 {
                                 compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
-                                reg = <0x0 0x24000 0x0 0x14>;
+                                reg = <0x0 0x24000 0x0 0x18>;
                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
                                 status = "disabled";
                         };
 
                         uart_B: serial@23000 {
                                 compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
-                                reg = <0x0 0x23000 0x0 0x14>;
+                                reg = <0x0 0x23000 0x0 0x18>;
                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
                                 status = "disabled";
                         };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 6cb3c2a52baf..4ee2e7951482 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -235,14 +235,14 @@
 
                         uart_A: serial@84c0 {
                                 compatible = "amlogic,meson-gx-uart";
-                                reg = <0x0 0x84c0 0x0 0x14>;
+                                reg = <0x0 0x84c0 0x0 0x18>;
                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
                                 status = "disabled";
                         };
 
                         uart_B: serial@84dc {
                                 compatible = "amlogic,meson-gx-uart";
-                                reg = <0x0 0x84dc 0x0 0x14>;
+                                reg = <0x0 0x84dc 0x0 0x18>;
                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
                                 status = "disabled";
                         };
@@ -287,7 +287,7 @@
 
                         uart_C: serial@8700 {
                                 compatible = "amlogic,meson-gx-uart";
-                                reg = <0x0 0x8700 0x0 0x14>;
+                                reg = <0x0 0x8700 0x0 0x18>;
                                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
                                 status = "disabled";
                         };
@@ -404,14 +404,14 @@
 
                         uart_AO: serial@4c0 {
                                 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
-                                reg = <0x0 0x004c0 0x0 0x14>;
+                                reg = <0x0 0x004c0 0x0 0x18>;
                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
                                 status = "disabled";
                         };
 
                         uart_AO_B: serial@4e0 {
                                 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
-                                reg = <0x0 0x004e0 0x0 0x14>;
+                                reg = <0x0 0x004e0 0x0 0x18>;
                                 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
                                 status = "disabled";
                         };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 4f355f17eed6..c8514110b9da 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -631,6 +631,7 @@
 
                         internal_phy: ethernet-phy@8 {
                                 compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
+                                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
                                 reg = <8>;
                                 max-speed = <100>;
                         };
diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
index 4220fbdcb24a..ff5c4c47b22b 100644
--- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
@@ -98,7 +98,7 @@
                 clock-output-names = "clk125mhz";
         };
 
-        pci {
+        pcie@30000000 {
                 compatible = "pci-host-ecam-generic";
                 device_type = "pci";
                 #interrupt-cells = <1>;
@@ -118,6 +118,7 @@
                 ranges =
                   <0x02000000    0 0x40000000    0 0x40000000    0 0x20000000
                    0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
+                bus-range = <0 0xff>;
                 interrupt-map-mask = <0 0 0 7>;
                 interrupt-map =
                       /* addr  pin  ic   icaddr  icintr */
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index e94fa1a53192..047641fe294c 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -51,7 +51,7 @@
                 #size-cells = <2>;
                 ranges;
 
-                ramoops@0x21f00000 {
+                ramoops@21f00000 {
                         compatible = "ramoops";
                         reg = <0x0 0x21f00000 0x0 0x00100000>;
                         record-size     = <0x00020000>;
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 9fbe4705ee88..94597e33c806 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -341,7 +341,7 @@
                         reg = <0 0x10005000 0 0x1000>;
                 };
 
-                pio: pinctrl@0x10005000 {
+                pio: pinctrl@10005000 {
                         compatible = "mediatek,mt8173-pinctrl";
                         reg = <0 0x1000b000 0 0x1000>;
                         mediatek,pctl-regmap = <&syscfg_pctl_a>;
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 492a011f14f6..1c8f1b86472d 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -140,16 +140,16 @@
                 };
 
                 agnoc@0 {
-                        qcom,pcie@00600000 {
+                        qcom,pcie@600000 {
                                 perst-gpio = <&msmgpio 35 GPIO_ACTIVE_LOW>;
                         };
 
-                        qcom,pcie@00608000 {
+                        qcom,pcie@608000 {
                                 status = "okay";
                                 perst-gpio = <&msmgpio 130 GPIO_ACTIVE_LOW>;
                         };
 
-                        qcom,pcie@00610000 {
+                        qcom,pcie@610000 {
                                 status = "okay";
                                 perst-gpio = <&msmgpio 114 GPIO_ACTIVE_LOW>;
                         };
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 4b2afcc4fdf4..0a6f7952bbb1 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -840,7 +840,7 @@
                         #size-cells = <1>;
                         ranges;
 
-                        pcie0: qcom,pcie@00600000 {
+                        pcie0: qcom,pcie@600000 {
                                 compatible = "qcom,pcie-msm8996", "snps,dw-pcie";
                                 status = "disabled";
                                 power-domains = <&gcc PCIE0_GDSC>;
@@ -893,7 +893,7 @@
 
                         };
 
-                        pcie1: qcom,pcie@00608000 {
+                        pcie1: qcom,pcie@608000 {
                                 compatible = "qcom,pcie-msm8996", "snps,dw-pcie";
                                 power-domains = <&gcc PCIE1_GDSC>;
                                 bus-range = <0x00 0xff>;
@@ -946,7 +946,7 @@
                                                 "bus_slave";
                         };
 
-                        pcie2: qcom,pcie@00610000 {
+                        pcie2: qcom,pcie@610000 {
                                 compatible = "qcom,pcie-msm8996", "snps,dw-pcie";
                                 power-domains = <&gcc PCIE2_GDSC>;
                                 bus-range = <0x00 0xff>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index 3890468678ce..28257724a56e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -132,17 +132,16 @@
         assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
         assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
         clock_in_out = "input";
-        /* shows instability at 1GBit right now */
-        max-speed = <100>;
         phy-supply = <&vcc_io>;
         phy-mode = "rgmii";
         pinctrl-names = "default";
         pinctrl-0 = <&rgmiim1_pins>;
+        snps,force_thresh_dma_mode;
         snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 50000>;
-        tx_delay = <0x26>;
-        rx_delay = <0x11>;
+        tx_delay = <0x24>;
+        rx_delay = <0x18>;
         status = "okay";
 };
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index a037ee56fead..cae341554486 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -730,7 +730,7 @@
                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                          <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
                 status = "disabled";
         };
@@ -741,7 +741,7 @@
                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
                          <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
                 status = "disabled";
         };
@@ -752,7 +752,7 @@
                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                          <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
                 status = "disabled";
         };
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index aa4d07046a7b..03458ac44201 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -257,7 +257,7 @@
                 max-frequency = <150000000>;
                 clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
                          <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
-                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                 resets = <&cru SRST_SDIO0>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
index 0f873c897d0d..ce592a4c0c4c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -457,7 +457,7 @@
         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
         assigned-clock-rates = <100000000>;
-        ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
+        ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
         num-lanes = <4>;
         pinctrl-names = "default";
         pinctrl-0 = <&pcie_clkreqn_cpm>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7aa2144e0d47..2605118d4b4c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1739,8 +1739,8 @@
                 compatible = "rockchip,rk3399-edp";
                 reg = <0x0 0xff970000 0x0 0x8000>;
                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
-                clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
-                clock-names = "dp", "pclk";
+                clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>, <&cru PCLK_VIO_GRF>;
+                clock-names = "dp", "pclk", "grf";
                 pinctrl-names = "default";
                 pinctrl-0 = <&edp_hpd>;
                 power-domains = <&power RK3399_PD_EDP>;
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index 4d46003c46cf..cdaeeea7999c 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -630,7 +630,7 @@ static int sysc_init_dts_quirks(struct sysc *ddata)
         for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
                 prop = of_get_property(np, sysc_dts_quirks[i].name, &len);
                 if (!prop)
-                        break;
+                        continue;
 
                 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
         }
diff --git a/drivers/memory/brcmstb_dpfe.c b/drivers/memory/brcmstb_dpfe.c
index 0a7bdbed3a6f..e9c1485c32b9 100644
--- a/drivers/memory/brcmstb_dpfe.c
+++ b/drivers/memory/brcmstb_dpfe.c
@@ -45,8 +45,16 @@
 #define REG_TO_DCPU_MBOX        0x10
 #define REG_TO_HOST_MBOX        0x14
 
+/* Macros to process offsets returned by the DCPU */
+#define DRAM_MSG_ADDR_OFFSET    0x0
+#define DRAM_MSG_TYPE_OFFSET    0x1c
+#define DRAM_MSG_ADDR_MASK      ((1UL << DRAM_MSG_TYPE_OFFSET) - 1)
+#define DRAM_MSG_TYPE_MASK      ((1UL << \
+                                 (BITS_PER_LONG - DRAM_MSG_TYPE_OFFSET)) - 1)
+
 /* Message RAM */
-#define DCPU_MSG_RAM(x)         (0x100 + (x) * sizeof(u32))
+#define DCPU_MSG_RAM_START      0x100
+#define DCPU_MSG_RAM(x)         (DCPU_MSG_RAM_START + (x) * sizeof(u32))
 
 /* DRAM Info Offsets & Masks */
 #define DRAM_INFO_INTERVAL      0x0
@@ -255,6 +263,40 @@ static unsigned int get_msg_chksum(const u32 msg[])
         return sum;
 }
 
+static void __iomem *get_msg_ptr(struct private_data *priv, u32 response,
+                                 char *buf, ssize_t *size)
+{
+        unsigned int msg_type;
+        unsigned int offset;
+        void __iomem *ptr = NULL;
+
+        msg_type = (response >> DRAM_MSG_TYPE_OFFSET) & DRAM_MSG_TYPE_MASK;
+        offset = (response >> DRAM_MSG_ADDR_OFFSET) & DRAM_MSG_ADDR_MASK;
+
+        /*
+         * msg_type == 1: the offset is relative to the message RAM
+         * msg_type == 0: the offset is relative to the data RAM (this is the
+         *                previous way of passing data)
+         * msg_type is anything else: there's critical hardware problem
+         */
+        switch (msg_type) {
+        case 1:
+                ptr = priv->regs + DCPU_MSG_RAM_START + offset;
+                break;
+        case 0:
+                ptr = priv->dmem + offset;
+                break;
+        default:
+                dev_emerg(priv->dev, "invalid message reply from DCPU: %#x\n",
+                        response);
+                if (buf && size)
+                        *size = sprintf(buf,
+                                "FATAL: communication error with DCPU\n");
+        }
+
+        return ptr;
+}
+
 static int __send_command(struct private_data *priv, unsigned int cmd,
                           u32 result[])
 {
@@ -507,7 +549,7 @@ static ssize_t show_info(struct device *dev, struct device_attribute *devattr,
 {
         u32 response[MSG_FIELD_MAX];
         unsigned int info;
-        int ret;
+        ssize_t ret;
 
         ret = generic_show(DPFE_CMD_GET_INFO, response, dev, buf);
         if (ret)
@@ -528,18 +570,19 @@ static ssize_t show_refresh(struct device *dev,
         u32 response[MSG_FIELD_MAX];
         void __iomem *info;
         struct private_data *priv;
-        unsigned int offset;
         u8 refresh, sr_abort, ppre, thermal_offs, tuf;
         u32 mr4;
-        int ret;
+        ssize_t ret;
 
         ret = generic_show(DPFE_CMD_GET_REFRESH, response, dev, buf);
         if (ret)
                 return ret;
 
         priv = dev_get_drvdata(dev);
-        offset = response[MSG_ARG0];
-        info = priv->dmem + offset;
+
+        info = get_msg_ptr(priv, response[MSG_ARG0], buf, &ret);
+        if (!info)
+                return ret;
 
         mr4 = readl_relaxed(info + DRAM_INFO_MR4) & DRAM_INFO_MR4_MASK;
 
@@ -561,7 +604,6 @@ static ssize_t store_refresh(struct device *dev, struct device_attribute *attr,
         u32 response[MSG_FIELD_MAX];
         struct private_data *priv;
         void __iomem *info;
-        unsigned int offset;
         unsigned long val;
         int ret;
 
@@ -574,8 +616,10 @@ static ssize_t store_refresh(struct device *dev, struct device_attribute *attr,
         if (ret)
                 return ret;
 
-        offset = response[MSG_ARG0];
-        info = priv->dmem + offset;
+        info = get_msg_ptr(priv, response[MSG_ARG0], NULL, NULL);
+        if (!info)
+                return -EIO;
+
         writel_relaxed(val, info + DRAM_INFO_INTERVAL);
 
         return count;
@@ -587,23 +631,25 @@ static ssize_t show_vendor(struct device *dev, struct device_attribute *devattr,
         u32 response[MSG_FIELD_MAX];
         struct private_data *priv;
         void __iomem *info;
-        unsigned int offset;
-        int ret;
+        ssize_t ret;
 
         ret = generic_show(DPFE_CMD_GET_VENDOR, response, dev, buf);
         if (ret)
                 return ret;
 
-        offset = response[MSG_ARG0];
         priv = dev_get_drvdata(dev);
-        info = priv->dmem + offset;
+
+        info = get_msg_ptr(priv, response[MSG_ARG0], buf, &ret);
+        if (!info)
+                return ret;
 
         return sprintf(buf, "%#x %#x %#x %#x %#x\n",
                        readl_relaxed(info + DRAM_VENDOR_MR5) & DRAM_VENDOR_MASK,
                        readl_relaxed(info + DRAM_VENDOR_MR6) & DRAM_VENDOR_MASK,
                        readl_relaxed(info + DRAM_VENDOR_MR7) & DRAM_VENDOR_MASK,
                        readl_relaxed(info + DRAM_VENDOR_MR8) & DRAM_VENDOR_MASK,
-                       readl_relaxed(info + DRAM_VENDOR_ERROR));
+                       readl_relaxed(info + DRAM_VENDOR_ERROR) &
+                                     DRAM_VENDOR_MASK);
 }
 
 static int brcmstb_dpfe_resume(struct platform_device *pdev)
diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
index cfb42f5eccb2..750f93197411 100644
--- a/drivers/soc/imx/gpc.c
+++ b/drivers/soc/imx/gpc.c
@@ -470,13 +470,21 @@ static int imx_gpc_probe(struct platform_device *pdev)
 
 static int imx_gpc_remove(struct platform_device *pdev)
 {
+        struct device_node *pgc_node;
         int ret;
 
+        pgc_node = of_get_child_by_name(pdev->dev.of_node, "pgc");
+
+        /* bail out if DT too old and doesn't provide the necessary info */
+        if (!of_property_read_bool(pdev->dev.of_node, "#power-domain-cells") &&
+            !pgc_node)
+                return 0;
+
         /*
          * If the old DT binding is used the toplevel driver needs to
          * de-register the power domains
          */
-        if (!of_get_child_by_name(pdev->dev.of_node, "pgc")) {
+        if (!pgc_node) {
                 of_genpd_del_provider(pdev->dev.of_node);
 
                 ret = pm_genpd_remove(&imx_gpc_domains[GPC_PGC_DOMAIN_PU].base);