diff options
author | Arnd Bergmann <arnd@arndb.de> | 2018-02-28 17:27:21 -0500 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2018-02-28 17:27:21 -0500 |
commit | 8f148f32926c8226cb26b0108aec0c295056775b (patch) | |
tree | 7091216f4a20b734b723378603d903506d71746c | |
parent | c98e140ff5a284079226dc7c53ed8b81d1fded7f (diff) | |
parent | fee5f1ef6cf76f87d9799596d06979c9e6589f2b (diff) |
Merge tag 'arm-soc/for-4.16/drivers-fixes' of https://github.com/Broadcom/stblinux into fixes
Pull "Broadcom drivers fixes for 4.16" from Florian Fainelli:
This pull request contains Broadcom SoCs drivers fixes for 4.16, please
pull the following:
- Markus provides two minor fixes to the Broadcom STB DPFE driver, one
to properly mask bits, and a second one to use the correct type. The
third commit is a consequence of a newer DFPE firmware which would
unfortunately crash without appropriate kernel changes.
* tag 'arm-soc/for-4.16/drivers-fixes' of https://github.com/Broadcom/stblinux:
memory: brcmstb: dpfe: support new way of passing data from the DCPU
memory: brcmstb: dpfe: fix type declaration of variable "ret"
memory: brcmstb: dpfe: properly mask vendor error bits
-rw-r--r-- | drivers/memory/brcmstb_dpfe.c | 74 |
1 files changed, 60 insertions, 14 deletions
diff --git a/drivers/memory/brcmstb_dpfe.c b/drivers/memory/brcmstb_dpfe.c index 0a7bdbed3a6f..e9c1485c32b9 100644 --- a/drivers/memory/brcmstb_dpfe.c +++ b/drivers/memory/brcmstb_dpfe.c | |||
@@ -45,8 +45,16 @@ | |||
45 | #define REG_TO_DCPU_MBOX 0x10 | 45 | #define REG_TO_DCPU_MBOX 0x10 |
46 | #define REG_TO_HOST_MBOX 0x14 | 46 | #define REG_TO_HOST_MBOX 0x14 |
47 | 47 | ||
48 | /* Macros to process offsets returned by the DCPU */ | ||
49 | #define DRAM_MSG_ADDR_OFFSET 0x0 | ||
50 | #define DRAM_MSG_TYPE_OFFSET 0x1c | ||
51 | #define DRAM_MSG_ADDR_MASK ((1UL << DRAM_MSG_TYPE_OFFSET) - 1) | ||
52 | #define DRAM_MSG_TYPE_MASK ((1UL << \ | ||
53 | (BITS_PER_LONG - DRAM_MSG_TYPE_OFFSET)) - 1) | ||
54 | |||
48 | /* Message RAM */ | 55 | /* Message RAM */ |
49 | #define DCPU_MSG_RAM(x) (0x100 + (x) * sizeof(u32)) | 56 | #define DCPU_MSG_RAM_START 0x100 |
57 | #define DCPU_MSG_RAM(x) (DCPU_MSG_RAM_START + (x) * sizeof(u32)) | ||
50 | 58 | ||
51 | /* DRAM Info Offsets & Masks */ | 59 | /* DRAM Info Offsets & Masks */ |
52 | #define DRAM_INFO_INTERVAL 0x0 | 60 | #define DRAM_INFO_INTERVAL 0x0 |
@@ -255,6 +263,40 @@ static unsigned int get_msg_chksum(const u32 msg[]) | |||
255 | return sum; | 263 | return sum; |
256 | } | 264 | } |
257 | 265 | ||
266 | static void __iomem *get_msg_ptr(struct private_data *priv, u32 response, | ||
267 | char *buf, ssize_t *size) | ||
268 | { | ||
269 | unsigned int msg_type; | ||
270 | unsigned int offset; | ||
271 | void __iomem *ptr = NULL; | ||
272 | |||
273 | msg_type = (response >> DRAM_MSG_TYPE_OFFSET) & DRAM_MSG_TYPE_MASK; | ||
274 | offset = (response >> DRAM_MSG_ADDR_OFFSET) & DRAM_MSG_ADDR_MASK; | ||
275 | |||
276 | /* | ||
277 | * msg_type == 1: the offset is relative to the message RAM | ||
278 | * msg_type == 0: the offset is relative to the data RAM (this is the | ||
279 | * previous way of passing data) | ||
280 | * msg_type is anything else: there's critical hardware problem | ||
281 | */ | ||
282 | switch (msg_type) { | ||
283 | case 1: | ||
284 | ptr = priv->regs + DCPU_MSG_RAM_START + offset; | ||
285 | break; | ||
286 | case 0: | ||
287 | ptr = priv->dmem + offset; | ||
288 | break; | ||
289 | default: | ||
290 | dev_emerg(priv->dev, "invalid message reply from DCPU: %#x\n", | ||
291 | response); | ||
292 | if (buf && size) | ||
293 | *size = sprintf(buf, | ||
294 | "FATAL: communication error with DCPU\n"); | ||
295 | } | ||
296 | |||
297 | return ptr; | ||
298 | } | ||
299 | |||
258 | static int __send_command(struct private_data *priv, unsigned int cmd, | 300 | static int __send_command(struct private_data *priv, unsigned int cmd, |
259 | u32 result[]) | 301 | u32 result[]) |
260 | { | 302 | { |
@@ -507,7 +549,7 @@ static ssize_t show_info(struct device *dev, struct device_attribute *devattr, | |||
507 | { | 549 | { |
508 | u32 response[MSG_FIELD_MAX]; | 550 | u32 response[MSG_FIELD_MAX]; |
509 | unsigned int info; | 551 | unsigned int info; |
510 | int ret; | 552 | ssize_t ret; |
511 | 553 | ||
512 | ret = generic_show(DPFE_CMD_GET_INFO, response, dev, buf); | 554 | ret = generic_show(DPFE_CMD_GET_INFO, response, dev, buf); |
513 | if (ret) | 555 | if (ret) |
@@ -528,18 +570,19 @@ static ssize_t show_refresh(struct device *dev, | |||
528 | u32 response[MSG_FIELD_MAX]; | 570 | u32 response[MSG_FIELD_MAX]; |
529 | void __iomem *info; | 571 | void __iomem *info; |
530 | struct private_data *priv; | 572 | struct private_data *priv; |
531 | unsigned int offset; | ||
532 | u8 refresh, sr_abort, ppre, thermal_offs, tuf; | 573 | u8 refresh, sr_abort, ppre, thermal_offs, tuf; |
533 | u32 mr4; | 574 | u32 mr4; |
534 | int ret; | 575 | ssize_t ret; |
535 | 576 | ||
536 | ret = generic_show(DPFE_CMD_GET_REFRESH, response, dev, buf); | 577 | ret = generic_show(DPFE_CMD_GET_REFRESH, response, dev, buf); |
537 | if (ret) | 578 | if (ret) |
538 | return ret; | 579 | return ret; |
539 | 580 | ||
540 | priv = dev_get_drvdata(dev); | 581 | priv = dev_get_drvdata(dev); |
541 | offset = response[MSG_ARG0]; | 582 | |
542 | info = priv->dmem + offset; | 583 | info = get_msg_ptr(priv, response[MSG_ARG0], buf, &ret); |
584 | if (!info) | ||
585 | return ret; | ||
543 | 586 | ||
544 | mr4 = readl_relaxed(info + DRAM_INFO_MR4) & DRAM_INFO_MR4_MASK; | 587 | mr4 = readl_relaxed(info + DRAM_INFO_MR4) & DRAM_INFO_MR4_MASK; |
545 | 588 | ||
@@ -561,7 +604,6 @@ static ssize_t store_refresh(struct device *dev, struct device_attribute *attr, | |||
561 | u32 response[MSG_FIELD_MAX]; | 604 | u32 response[MSG_FIELD_MAX]; |
562 | struct private_data *priv; | 605 | struct private_data *priv; |
563 | void __iomem *info; | 606 | void __iomem *info; |
564 | unsigned int offset; | ||
565 | unsigned long val; | 607 | unsigned long val; |
566 | int ret; | 608 | int ret; |
567 | 609 | ||
@@ -574,8 +616,10 @@ static ssize_t store_refresh(struct device *dev, struct device_attribute *attr, | |||
574 | if (ret) | 616 | if (ret) |
575 | return ret; | 617 | return ret; |
576 | 618 | ||
577 | offset = response[MSG_ARG0]; | 619 | info = get_msg_ptr(priv, response[MSG_ARG0], NULL, NULL); |
578 | info = priv->dmem + offset; | 620 | if (!info) |
621 | return -EIO; | ||
622 | |||
579 | writel_relaxed(val, info + DRAM_INFO_INTERVAL); | 623 | writel_relaxed(val, info + DRAM_INFO_INTERVAL); |
580 | 624 | ||
581 | return count; | 625 | return count; |
@@ -587,23 +631,25 @@ static ssize_t show_vendor(struct device *dev, struct device_attribute *devattr, | |||
587 | u32 response[MSG_FIELD_MAX]; | 631 | u32 response[MSG_FIELD_MAX]; |
588 | struct private_data *priv; | 632 | struct private_data *priv; |
589 | void __iomem *info; | 633 | void __iomem *info; |
590 | unsigned int offset; | 634 | ssize_t ret; |
591 | int ret; | ||
592 | 635 | ||
593 | ret = generic_show(DPFE_CMD_GET_VENDOR, response, dev, buf); | 636 | ret = generic_show(DPFE_CMD_GET_VENDOR, response, dev, buf); |
594 | if (ret) | 637 | if (ret) |
595 | return ret; | 638 | return ret; |
596 | 639 | ||
597 | offset = response[MSG_ARG0]; | ||
598 | priv = dev_get_drvdata(dev); | 640 | priv = dev_get_drvdata(dev); |
599 | info = priv->dmem + offset; | 641 | |
642 | info = get_msg_ptr(priv, response[MSG_ARG0], buf, &ret); | ||
643 | if (!info) | ||
644 | return ret; | ||
600 | 645 | ||
601 | return sprintf(buf, "%#x %#x %#x %#x %#x\n", | 646 | return sprintf(buf, "%#x %#x %#x %#x %#x\n", |
602 | readl_relaxed(info + DRAM_VENDOR_MR5) & DRAM_VENDOR_MASK, | 647 | readl_relaxed(info + DRAM_VENDOR_MR5) & DRAM_VENDOR_MASK, |
603 | readl_relaxed(info + DRAM_VENDOR_MR6) & DRAM_VENDOR_MASK, | 648 | readl_relaxed(info + DRAM_VENDOR_MR6) & DRAM_VENDOR_MASK, |
604 | readl_relaxed(info + DRAM_VENDOR_MR7) & DRAM_VENDOR_MASK, | 649 | readl_relaxed(info + DRAM_VENDOR_MR7) & DRAM_VENDOR_MASK, |
605 | readl_relaxed(info + DRAM_VENDOR_MR8) & DRAM_VENDOR_MASK, | 650 | readl_relaxed(info + DRAM_VENDOR_MR8) & DRAM_VENDOR_MASK, |
606 | readl_relaxed(info + DRAM_VENDOR_ERROR)); | 651 | readl_relaxed(info + DRAM_VENDOR_ERROR) & |
652 | DRAM_VENDOR_MASK); | ||
607 | } | 653 | } |
608 | 654 | ||
609 | static int brcmstb_dpfe_resume(struct platform_device *pdev) | 655 | static int brcmstb_dpfe_resume(struct platform_device *pdev) |