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authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-22 14:15:59 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-22 14:15:59 -0500
commit8ff546b801e5cca0337c0f0a7234795d0a6309a1 (patch)
treefbda2c8e8e5aa9b82d389091f7945e28cdb67418
parentca78d3173cff3503bcd15723b049757f75762d15 (diff)
parent0df8a3dbacb585bb9c8b2e55de43c6aac9d86488 (diff)
Merge tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH: "Here is the big USB and PHY driver updates for 4.11-rc1. Nothing major, just the normal amount of churn in the usb gadget and dwc and xhci controllers, new device ids, new phy drivers, a new usb-serial driver, and a few other minor changes in different USB drivers. All have been in linux-next for a long time with no reported issues" * tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (265 commits) usb: cdc-wdm: remove logically dead code USB: serial: keyspan: drop header file USB: serial: io_edgeport: drop io-tables header file usb: musb: add code comment for clarification usb: misc: add USB251xB/xBi Hi-Speed Hub Controller Driver usb: misc: usbtest: remove redundant check on retval < 0 USB: serial: upd78f0730: sort device ids USB: serial: upd78f0730: add ID for EVAL-ADXL362Z ohci-hub: fix typo in dbg_port macro usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS usb: musb: tusb6010: Clean up tusb_omap_dma structure usb: musb: cppi_dma: Clean up cppi41_dma_controller structure usb: musb: cppi_dma: Clean up cppi structure usb: musb: cppi41: Detect aborted transfers in cppi41_dma_callback() usb: musb: dma: Add a DMA completion platform callback drivers: usb: usbip: Add missing break statement to switch usb: mtu3: remove redundant dev_err call in get_ssusb_rscs() USB: serial: mos7840: fix another NULL-deref at open USB: serial: console: clean up sanity checks USB: serial: console: fix uninitialised spinlock ...
-rw-r--r--Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt39
-rw-r--r--Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt84
-rw-r--r--Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt65
-rw-r--r--Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt1
-rw-r--r--Documentation/devicetree/bindings/ufs/ufs-qcom.txt1
-rw-r--r--Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt4
-rw-r--r--Documentation/devicetree/bindings/usb/dwc3-st.txt4
-rw-r--r--Documentation/devicetree/bindings/usb/dwc3.txt4
-rw-r--r--Documentation/devicetree/bindings/usb/ehci-st.txt2
-rw-r--r--Documentation/devicetree/bindings/usb/mt8173-mtu3.txt12
-rw-r--r--Documentation/devicetree/bindings/usb/mt8173-xhci.txt14
-rw-r--r--Documentation/devicetree/bindings/usb/qcom,dwc3.txt2
-rw-r--r--Documentation/devicetree/bindings/usb/ulpi.txt20
-rw-r--r--Documentation/devicetree/bindings/usb/usb-xhci.txt1
-rw-r--r--Documentation/devicetree/bindings/usb/usb251xb.txt83
-rw-r--r--Documentation/usb/gadget-testing.txt2
-rw-r--r--MAINTAINERS8
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173.dtsi6
-rw-r--r--drivers/dma/cppi41.c28
-rw-r--r--drivers/of/device.c25
-rw-r--r--drivers/phy/Kconfig24
-rw-r--r--drivers/phy/Makefile3
-rw-r--r--drivers/phy/phy-bcm-cygnus-pcie.c2
-rw-r--r--drivers/phy/phy-bcm-nsp-usb3.c177
-rw-r--r--drivers/phy/phy-hi6220-usb.c2
-rw-r--r--drivers/phy/phy-mt65xx-usb3.c2
-rw-r--r--drivers/phy/phy-qcom-ufs-i.h1
-rw-r--r--drivers/phy/phy-qcom-ufs-qmp-14nm.c15
-rw-r--r--drivers/phy/phy-qcom-ufs-qmp-20nm.c12
-rw-r--r--drivers/phy/phy-qcom-ufs.c37
-rw-r--r--drivers/phy/phy-qcom-usb-hs.c296
-rw-r--r--drivers/phy/phy-qcom-usb-hsic.c160
-rw-r--r--drivers/phy/phy-rcar-gen3-usb2.c10
-rw-r--r--drivers/phy/phy-rockchip-inno-usb2.c7
-rw-r--r--drivers/phy/phy-sun4i-usb.c18
-rw-r--r--drivers/usb/chipidea/Kconfig8
-rw-r--r--drivers/usb/chipidea/Makefile1
-rw-r--r--drivers/usb/chipidea/ci.h22
-rw-r--r--drivers/usb/chipidea/ci_hdrc_msm.c280
-rw-r--r--drivers/usb/chipidea/ci_hdrc_usb2.c4
-rw-r--r--drivers/usb/chipidea/core.c173
-rw-r--r--drivers/usb/chipidea/host.c10
-rw-r--r--drivers/usb/chipidea/otg.c99
-rw-r--r--drivers/usb/chipidea/udc.c5
-rw-r--r--drivers/usb/chipidea/ulpi.c113
-rw-r--r--drivers/usb/class/cdc-acm.c1
-rw-r--r--drivers/usb/class/cdc-wdm.c2
-rw-r--r--drivers/usb/common/ulpi.c79
-rw-r--r--drivers/usb/core/devio.c43
-rw-r--r--drivers/usb/core/hcd.c1
-rw-r--r--drivers/usb/core/message.c33
-rw-r--r--drivers/usb/dwc2/core.c39
-rw-r--r--drivers/usb/dwc2/core.h208
-rw-r--r--drivers/usb/dwc2/core_intr.c11
-rw-r--r--drivers/usb/dwc2/debug.h4
-rw-r--r--drivers/usb/dwc2/debugfs.c182
-rw-r--r--drivers/usb/dwc2/gadget.c313
-rw-r--r--drivers/usb/dwc2/hcd.c263
-rw-r--r--drivers/usb/dwc2/hcd.h76
-rw-r--r--drivers/usb/dwc2/hcd_ddma.c23
-rw-r--r--drivers/usb/dwc2/hcd_intr.c98
-rw-r--r--drivers/usb/dwc2/hcd_queue.c40
-rw-r--r--drivers/usb/dwc2/hw.h596
-rw-r--r--drivers/usb/dwc2/params.c1454
-rw-r--r--drivers/usb/dwc2/pci.c2
-rw-r--r--drivers/usb/dwc2/platform.c16
-rw-r--r--drivers/usb/dwc3/core.h5
-rw-r--r--drivers/usb/dwc3/dwc3-exynos.c5
-rw-r--r--drivers/usb/dwc3/dwc3-omap.c20
-rw-r--r--drivers/usb/dwc3/ep0.c14
-rw-r--r--drivers/usb/dwc3/gadget.c194
-rw-r--r--drivers/usb/dwc3/host.c21
-rw-r--r--drivers/usb/early/ehci-dbgp.c1
-rw-r--r--drivers/usb/gadget/function/f_fs.c4
-rw-r--r--drivers/usb/gadget/function/f_hid.c188
-rw-r--r--drivers/usb/gadget/function/f_printer.c57
-rw-r--r--drivers/usb/gadget/function/f_uac2.c49
-rw-r--r--drivers/usb/gadget/function/u_ether.c24
-rw-r--r--drivers/usb/gadget/function/u_ether_configfs.h2
-rw-r--r--drivers/usb/gadget/function/u_fs.h3
-rw-r--r--drivers/usb/gadget/function/u_printer.h5
-rw-r--r--drivers/usb/gadget/function/u_uac2.h2
-rw-r--r--drivers/usb/gadget/legacy/audio.c1
-rw-r--r--drivers/usb/gadget/legacy/printer.c28
-rw-r--r--drivers/usb/gadget/udc/Kconfig14
-rw-r--r--drivers/usb/gadget/udc/atmel_usba_udc.c236
-rw-r--r--drivers/usb/gadget/udc/atmel_usba_udc.h10
-rw-r--r--drivers/usb/gadget/udc/core.c45
-rw-r--r--drivers/usb/gadget/udc/fotg210-udc.c4
-rw-r--r--drivers/usb/gadget/udc/fsl_qe_udc.c2
-rw-r--r--drivers/usb/gadget/udc/fsl_udc_core.c12
-rw-r--r--drivers/usb/gadget/udc/fusb300_udc.c2
-rw-r--r--drivers/usb/gadget/udc/goku_udc.c2
-rw-r--r--drivers/usb/gadget/udc/gr_udc.c2
-rw-r--r--drivers/usb/gadget/udc/m66592-udc.c2
-rw-r--r--drivers/usb/gadget/udc/mv_u3d_core.c2
-rw-r--r--drivers/usb/gadget/udc/mv_udc_core.c2
-rw-r--r--drivers/usb/gadget/udc/net2272.c4
-rw-r--r--drivers/usb/gadget/udc/omap_udc.c2
-rw-r--r--drivers/usb/gadget/udc/pxa27x_udc.c2
-rw-r--r--drivers/usb/gadget/udc/r8a66597-udc.c2
-rw-r--r--drivers/usb/gadget/udc/s3c-hsudc.c2
-rw-r--r--drivers/usb/host/Kconfig4
-rw-r--r--drivers/usb/host/ehci-exynos.c2
-rw-r--r--drivers/usb/host/ehci-fsl.c2
-rw-r--r--drivers/usb/host/ohci-exynos.c2
-rw-r--r--drivers/usb/host/ohci-hub.c26
-rw-r--r--drivers/usb/host/ohci-omap.c3
-rw-r--r--drivers/usb/host/oxu210hp-hcd.c2
-rw-r--r--drivers/usb/host/xhci-dbg.c22
-rw-r--r--drivers/usb/host/xhci-ext-caps.h2
-rw-r--r--drivers/usb/host/xhci-hub.c14
-rw-r--r--drivers/usb/host/xhci-mem.c30
-rw-r--r--drivers/usb/host/xhci-mtk.c22
-rw-r--r--drivers/usb/host/xhci-mtk.h1
-rw-r--r--drivers/usb/host/xhci-pci.c6
-rw-r--r--drivers/usb/host/xhci-plat.c7
-rw-r--r--drivers/usb/host/xhci-ring.c463
-rw-r--r--drivers/usb/host/xhci-trace.h184
-rw-r--r--drivers/usb/host/xhci.c212
-rw-r--r--drivers/usb/host/xhci.h528
-rw-r--r--drivers/usb/isp1760/isp1760-udc.c2
-rw-r--r--drivers/usb/misc/Kconfig9
-rw-r--r--drivers/usb/misc/Makefile1
-rw-r--r--drivers/usb/misc/adutux.c4
-rw-r--r--drivers/usb/misc/sisusbvga/sisusb.c6
-rw-r--r--drivers/usb/misc/usb251xb.c605
-rw-r--r--drivers/usb/misc/usbtest.c2
-rw-r--r--drivers/usb/mtu3/mtu3.h1
-rw-r--r--drivers/usb/mtu3/mtu3_plat.c56
-rw-r--r--drivers/usb/musb/am35x.c1
-rw-r--r--drivers/usb/musb/blackfin.c6
-rw-r--r--drivers/usb/musb/cppi_dma.c26
-rw-r--r--drivers/usb/musb/cppi_dma.h1
-rw-r--r--drivers/usb/musb/da8xx.c36
-rw-r--r--drivers/usb/musb/davinci.c1
-rw-r--r--drivers/usb/musb/jz4740.c2
-rw-r--r--drivers/usb/musb/musb_core.c28
-rw-r--r--drivers/usb/musb/musb_core.h1
-rw-r--r--drivers/usb/musb/musb_cppi41.c49
-rw-r--r--drivers/usb/musb/musb_debugfs.c46
-rw-r--r--drivers/usb/musb/musb_dma.h5
-rw-r--r--drivers/usb/musb/musb_dsps.c204
-rw-r--r--drivers/usb/musb/omap2430.c2
-rw-r--r--drivers/usb/musb/sunxi.c49
-rw-r--r--drivers/usb/musb/tusb6010_omap.c7
-rw-r--r--drivers/usb/musb/ux500.c2
-rw-r--r--drivers/usb/phy/phy-ab8500-usb.c33
-rw-r--r--drivers/usb/phy/phy-fsl-usb.c12
-rw-r--r--drivers/usb/phy/phy-msm-usb.c51
-rw-r--r--drivers/usb/phy/phy-omap-otg.c24
-rw-r--r--drivers/usb/phy/phy-qcom-8x16-usb.c13
-rw-r--r--drivers/usb/phy/phy-tahvo.c10
-rw-r--r--drivers/usb/renesas_usbhs/common.c2
-rw-r--r--drivers/usb/renesas_usbhs/mod_host.c2
-rw-r--r--drivers/usb/serial/Kconfig9
-rw-r--r--drivers/usb/serial/Makefile1
-rw-r--r--drivers/usb/serial/ark3116.c74
-rw-r--r--drivers/usb/serial/ch341.c118
-rw-r--r--drivers/usb/serial/console.c4
-rw-r--r--drivers/usb/serial/cp210x.c2
-rw-r--r--drivers/usb/serial/cypress_m8.c5
-rw-r--r--drivers/usb/serial/digi_acceleport.c52
-rw-r--r--drivers/usb/serial/ftdi_sio.c57
-rw-r--r--drivers/usb/serial/io_edgeport.c266
-rw-r--r--drivers/usb/serial/io_tables.h232
-rw-r--r--drivers/usb/serial/io_ti.c1
-rw-r--r--drivers/usb/serial/iuu_phoenix.c15
-rw-r--r--drivers/usb/serial/keyspan.c592
-rw-r--r--drivers/usb/serial/keyspan.h629
-rw-r--r--drivers/usb/serial/keyspan_pda.c19
-rw-r--r--drivers/usb/serial/kl5kusb105.c115
-rw-r--r--drivers/usb/serial/mct_u232.c6
-rw-r--r--drivers/usb/serial/metro-usb.c42
-rw-r--r--drivers/usb/serial/mos7720.c10
-rw-r--r--drivers/usb/serial/mos7840.c24
-rw-r--r--drivers/usb/serial/opticon.c3
-rw-r--r--drivers/usb/serial/pl2303.c8
-rw-r--r--drivers/usb/serial/quatech2.c25
-rw-r--r--drivers/usb/serial/sierra.c28
-rw-r--r--drivers/usb/serial/spcp8x5.c8
-rw-r--r--drivers/usb/serial/ssu100.c32
-rw-r--r--drivers/usb/serial/ti_usb_3410_5052.c12
-rw-r--r--drivers/usb/serial/upd78f0730.c441
-rw-r--r--drivers/usb/serial/whiteheat.c1
-rw-r--r--drivers/usb/storage/ene_ub6250.c2
-rw-r--r--drivers/usb/storage/sddr09.c4
-rw-r--r--drivers/usb/usbip/vhci_hcd.c1
-rw-r--r--include/linux/of_device.h6
-rw-r--r--include/linux/usb/chipidea.h9
-rw-r--r--tools/usb/ffs-test.c52
-rw-r--r--tools/usb/usbip/README57
-rwxr-xr-xtools/usb/usbip/vudc/vudc_server_example.sh107
193 files changed, 7780 insertions, 4460 deletions
diff --git a/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt b/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
new file mode 100644
index 000000000000..e68ae5dec9c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
@@ -0,0 +1,39 @@
1Broadcom USB3 phy binding for northstar plus SoC
2The USB3 phy is internal to the SoC and is accessed using mdio interface.
3
4Required mdio bus properties:
5- reg: Should be 0x0 for SoC internal USB3 phy
6- #address-cells: must be 1
7- #size-cells: must be 0
8
9Required USB3 PHY properties:
10- compatible: should be "brcm,nsp-usb3-phy"
11- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
12- usb3-ctrl-syscon: handler of syscon node defining physical address
13 of usb3 control register.
14- #phy-cells: must be 0
15
16Required usb3 control properties:
17- compatible: should be "brcm,nsp-usb3-ctrl"
18- reg: offset and length of the control registers
19
20Example:
21
22 mdio@0 {
23 reg = <0x0>;
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 usb3_phy: usb-phy@10 {
28 compatible = "brcm,nsp-usb3-phy";
29 reg = <0x10>;
30 usb3-ctrl-syscon = <&usb3_ctrl>;
31 #phy-cells = <0>;
32 status = "disabled";
33 };
34 };
35
36 usb3_ctrl: syscon@104408 {
37 compatible = "brcm,nsp-usb3-ctrl", "syscon";
38 reg = <0x104408 0x3fc>;
39 };
diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
new file mode 100644
index 000000000000..b3b75c1e6285
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
@@ -0,0 +1,84 @@
1Qualcomm's USB HS PHY
2
3PROPERTIES
4
5- compatible:
6 Usage: required
7 Value type: <string>
8 Definition: Should contain "qcom,usb-hs-phy" and more specifically one of the
9 following:
10
11 "qcom,usb-hs-phy-apq8064"
12 "qcom,usb-hs-phy-msm8916"
13 "qcom,usb-hs-phy-msm8974"
14
15- #phy-cells:
16 Usage: required
17 Value type: <u32>
18 Definition: Should contain 0
19
20- clocks:
21 Usage: required
22 Value type: <prop-encoded-array>
23 Definition: Should contain clock specifier for the reference and sleep
24 clocks
25
26- clock-names:
27 Usage: required
28 Value type: <stringlist>
29 Definition: Should contain "ref" and "sleep" for the reference and sleep
30 clocks respectively
31
32- resets:
33 Usage: required
34 Value type: <prop-encoded-array>
35 Definition: Should contain the phy and POR resets
36
37- reset-names:
38 Usage: required
39 Value type: <stringlist>
40 Definition: Should contain "phy" and "por" for the phy and POR resets
41 respectively
42
43- v3p3-supply:
44 Usage: required
45 Value type: <phandle>
46 Definition: Should contain a reference to the 3.3V supply
47
48- v1p8-supply:
49 Usage: required
50 Value type: <phandle>
51 Definition: Should contain a reference to the 1.8V supply
52
53- extcon:
54 Usage: optional
55 Value type: <prop-encoded-array>
56 Definition: Should contain the vbus extcon
57
58- qcom,init-seq:
59 Usage: optional
60 Value type: <u8 array>
61 Definition: Should contain a sequence of ULPI address and value pairs to
62 program into the ULPI_EXT_VENDOR_SPECIFIC area. This is related
63 to Device Mode Eye Diagram test. The addresses are offsets
64 from the ULPI_EXT_VENDOR_SPECIFIC address, for example,
65 <0x1 0x53> would mean "write the value 0x53 to address 0x81".
66
67EXAMPLE
68
69otg: usb-controller {
70 ulpi {
71 phy {
72 compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy";
73 #phy-cells = <0>;
74 clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
75 clock-names = "ref", "sleep";
76 resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
77 reset-names = "phy", "por";
78 v3p3-supply = <&pm8941_l24>;
79 v1p8-supply = <&pm8941_l6>;
80 extcon = <&smbb>;
81 qcom,init-seq = /bits/ 8 <0x1 0x63>;
82 };
83 };
84};
diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index 000000000000..3c7cb2be4b12
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,65 @@
1Qualcomm's USB HSIC PHY
2
3PROPERTIES
4
5- compatible:
6 Usage: required
7 Value type: <string>
8 Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
9 following:
10
11 "qcom,usb-hsic-phy-mdm9615"
12 "qcom,usb-hsic-phy-msm8974"
13
14- #phy-cells:
15 Usage: required
16 Value type: <u32>
17 Definition: Should contain 0
18
19- clocks:
20 Usage: required
21 Value type: <prop-encoded-array>
22 Definition: Should contain clock specifier for phy, calibration and
23 a calibration sleep clock
24
25- clock-names:
26 Usage: required
27 Value type: <stringlist>
28 Definition: Should contain "phy, "cal" and "cal_sleep"
29
30- pinctrl-names:
31 Usage: required
32 Value type: <stringlist>
33 Definition: Should contain "init" and "default" in that order
34
35- pinctrl-0:
36 Usage: required
37 Value type: <prop-encoded-array>
38 Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
39 free state
40
41- pinctrl-1:
42 Usage: required
43 Value type: <prop-encoded-array>
44 Definition: List of pinctrl settings to apply to mux out the HSIC pins
45
46EXAMPLE
47
48usb-controller {
49 ulpi {
50 phy {
51 compatible = "qcom,usb-hsic-phy-msm8974",
52 "qcom,usb-hsic-phy";
53 #phy-cells = <0>;
54 pinctrl-names = "init", "default";
55 pinctrl-0 = <&hsic_sleep>;
56 pinctrl-1 = <&hsic_default>;
57 clocks = <&gcc GCC_USB_HSIC_CLK>,
58 <&gcc GCC_USB_HSIC_IO_CAL_CLK>,
59 <&gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
60 clock-names = "phy", "cal", "cal_sleep";
61 assigned-clocks = <&gcc GCC_USB_HSIC_IO_CAL_CLK>;
62 assigned-clock-rates = <960000>;
63 };
64 };
65};
diff --git a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
index 287150db6db4..e42334258185 100644
--- a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
@@ -10,6 +10,7 @@ Required properties:
10 * allwinner,sun8i-a23-usb-phy 10 * allwinner,sun8i-a23-usb-phy
11 * allwinner,sun8i-a33-usb-phy 11 * allwinner,sun8i-a33-usb-phy
12 * allwinner,sun8i-h3-usb-phy 12 * allwinner,sun8i-h3-usb-phy
13 * allwinner,sun8i-v3s-usb-phy
13 * allwinner,sun50i-a64-usb-phy 14 * allwinner,sun50i-a64-usb-phy
14- reg : a list of offset + length pairs 15- reg : a list of offset + length pairs
15- reg-names : 16- reg-names :
diff --git a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
index b6b5130e5f65..1f69ee1a61ea 100644
--- a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
+++ b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
@@ -29,7 +29,6 @@ Optional properties:
29- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply 29- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply
30- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply 30- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
31- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply 31- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
32- vddp-ref-clk-always-on : specifies if this supply needs to be kept always on
33 32
34Example: 33Example:
35 34
diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt
index 862cd7c79805..d9b42da016f3 100644
--- a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt
+++ b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt
@@ -2,8 +2,8 @@ Allwinner sun4i A10 musb DRC/OTG controller
2------------------------------------------- 2-------------------------------------------
3 3
4Required properties: 4Required properties:
5 - compatible : "allwinner,sun4i-a10-musb", "allwinner,sun6i-a31-musb" 5 - compatible : "allwinner,sun4i-a10-musb", "allwinner,sun6i-a31-musb",
6 or "allwinner,sun8i-a33-musb" 6 "allwinner,sun8i-a33-musb" or "allwinner,sun8i-h3-musb"
7 - reg : mmio address range of the musb controller 7 - reg : mmio address range of the musb controller
8 - clocks : clock specifier for the musb controller ahb gate clock 8 - clocks : clock specifier for the musb controller ahb gate clock
9 - reset : reset specifier for the ahb reset (A31 and newer only) 9 - reset : reset specifier for the ahb reset (A31 and newer only)
diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt
index 01c71b1258f4..50dee3b44665 100644
--- a/Documentation/devicetree/bindings/usb/dwc3-st.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3-st.txt
@@ -20,10 +20,10 @@ See: Documentation/devicetree/bindings/reset/reset.txt
20 with 'reg' property 20 with 'reg' property
21 21
22 - pinctl-names : A pinctrl state named "default" must be defined 22 - pinctl-names : A pinctrl state named "default" must be defined
23See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt 23See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
24 24
25 - pinctrl-0 : Pin control group 25 - pinctrl-0 : Pin control group
26See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt 26See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
27 27
28 - ranges : allows valid 1:1 translation between child's address space and 28 - ranges : allows valid 1:1 translation between child's address space and
29 parent's address space 29 parent's address space
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index e3e6983288e3..f658f394c2d3 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -56,6 +56,10 @@ Optional properties:
56 56
57 - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated. 57 - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
58 58
59 - in addition all properties from usb-xhci.txt from the current directory are
60 supported as well
61
62
59This is usually a subnode to DWC3 glue to which it is connected. 63This is usually a subnode to DWC3 glue to which it is connected.
60 64
61dwc3@4a030000 { 65dwc3@4a030000 {
diff --git a/Documentation/devicetree/bindings/usb/ehci-st.txt b/Documentation/devicetree/bindings/usb/ehci-st.txt
index fb45fa5770bb..410d922cfdd7 100644
--- a/Documentation/devicetree/bindings/usb/ehci-st.txt
+++ b/Documentation/devicetree/bindings/usb/ehci-st.txt
@@ -7,7 +7,7 @@ Required properties:
7 - interrupts : one EHCI interrupt should be described here 7 - interrupts : one EHCI interrupt should be described here
8 - pinctrl-names : a pinctrl state named "default" must be defined 8 - pinctrl-names : a pinctrl state named "default" must be defined
9 - pinctrl-0 : phandle referencing pin configuration of the USB controller 9 - pinctrl-0 : phandle referencing pin configuration of the USB controller
10See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt 10See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
11 - clocks : phandle list of usb clocks 11 - clocks : phandle list of usb clocks
12 - clock-names : should be "ic" for interconnect clock and "clk48" 12 - clock-names : should be "ic" for interconnect clock and "clk48"
13See: Documentation/devicetree/bindings/clock/clock-bindings.txt 13See: Documentation/devicetree/bindings/clock/clock-bindings.txt
diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
index e049d199bf0d..1d7c3bc677f7 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
@@ -10,7 +10,7 @@ Required properties:
10 - vusb33-supply : regulator of USB avdd3.3v 10 - vusb33-supply : regulator of USB avdd3.3v
11 - clocks : a list of phandle + clock-specifier pairs, one for each 11 - clocks : a list of phandle + clock-specifier pairs, one for each
12 entry in clock-names 12 entry in clock-names
13 - clock-names : must contain "sys_ck" for clock of controller; 13 - clock-names : must contain "sys_ck" and "ref_ck" for clock of controller;
14 "wakeup_deb_p0" and "wakeup_deb_p1" are optional, they are 14 "wakeup_deb_p0" and "wakeup_deb_p1" are optional, they are
15 depends on "mediatek,enable-wakeup" 15 depends on "mediatek,enable-wakeup"
16 - phys : a list of phandle + phy specifier pairs 16 - phys : a list of phandle + phy specifier pairs
@@ -30,7 +30,7 @@ Optional properties:
30 "id_float" and "id_ground" are optinal which depends on 30 "id_float" and "id_ground" are optinal which depends on
31 "mediatek,enable-manual-drd" 31 "mediatek,enable-manual-drd"
32 - pinctrl-0 : pin control group 32 - pinctrl-0 : pin control group
33 See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt 33 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
34 34
35 - maximum-speed : valid arguments are "super-speed", "high-speed" and 35 - maximum-speed : valid arguments are "super-speed", "high-speed" and
36 "full-speed"; refer to usb/generic.txt 36 "full-speed"; refer to usb/generic.txt
@@ -56,10 +56,10 @@ ssusb: usb@11271000 {
56 phys = <&phy_port0 PHY_TYPE_USB3>, 56 phys = <&phy_port0 PHY_TYPE_USB3>,
57 <&phy_port1 PHY_TYPE_USB2>; 57 <&phy_port1 PHY_TYPE_USB2>;
58 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 58 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
59 clocks = <&topckgen CLK_TOP_USB30_SEL>, 59 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
60 <&pericfg CLK_PERI_USB0>, 60 <&pericfg CLK_PERI_USB0>,
61 <&pericfg CLK_PERI_USB1>; 61 <&pericfg CLK_PERI_USB1>;
62 clock-names = "sys_ck", 62 clock-names = "sys_ck", "ref_ck",
63 "wakeup_deb_p0", 63 "wakeup_deb_p0",
64 "wakeup_deb_p1"; 64 "wakeup_deb_p1";
65 vusb33-supply = <&mt6397_vusb_reg>; 65 vusb33-supply = <&mt6397_vusb_reg>;
@@ -79,8 +79,8 @@ ssusb: usb@11271000 {
79 reg-names = "mac"; 79 reg-names = "mac";
80 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 80 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
81 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 81 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
82 clocks = <&topckgen CLK_TOP_USB30_SEL>; 82 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
83 clock-names = "sys_ck"; 83 clock-names = "sys_ck", "ref_ck";
84 vusb33-supply = <&mt6397_vusb_reg>; 84 vusb33-supply = <&mt6397_vusb_reg>;
85 status = "disabled"; 85 status = "disabled";
86 }; 86 };
diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
index 2a930bd52b94..0acfc8acbea1 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
@@ -23,6 +23,7 @@ Required properties:
23 entry in clock-names 23 entry in clock-names
24 - clock-names : must contain 24 - clock-names : must contain
25 "sys_ck": for clock of xHCI MAC 25 "sys_ck": for clock of xHCI MAC
26 "ref_ck": for reference clock of xHCI MAC
26 "wakeup_deb_p0": for USB wakeup debounce clock of port0 27 "wakeup_deb_p0": for USB wakeup debounce clock of port0
27 "wakeup_deb_p1": for USB wakeup debounce clock of port1 28 "wakeup_deb_p1": for USB wakeup debounce clock of port1
28 29
@@ -37,7 +38,7 @@ Optional properties:
37 - usb3-lpm-capable : supports USB3.0 LPM 38 - usb3-lpm-capable : supports USB3.0 LPM
38 - pinctrl-names : a pinctrl state named "default" must be defined 39 - pinctrl-names : a pinctrl state named "default" must be defined
39 - pinctrl-0 : pin control group 40 - pinctrl-0 : pin control group
40 See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt 41 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
41 42
42Example: 43Example:
43usb30: usb@11270000 { 44usb30: usb@11270000 {
@@ -47,10 +48,10 @@ usb30: usb@11270000 {
47 reg-names = "mac", "ippc"; 48 reg-names = "mac", "ippc";
48 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 49 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
49 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 50 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
50 clocks = <&topckgen CLK_TOP_USB30_SEL>, 51 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
51 <&pericfg CLK_PERI_USB0>, 52 <&pericfg CLK_PERI_USB0>,
52 <&pericfg CLK_PERI_USB1>; 53 <&pericfg CLK_PERI_USB1>;
53 clock-names = "sys_ck", 54 clock-names = "sys_ck", "ref_ck",
54 "wakeup_deb_p0", 55 "wakeup_deb_p0",
55 "wakeup_deb_p1"; 56 "wakeup_deb_p1";
56 phys = <&phy_port0 PHY_TYPE_USB3>, 57 phys = <&phy_port0 PHY_TYPE_USB3>,
@@ -67,7 +68,7 @@ usb30: usb@11270000 {
67 68
68In the case, xhci is added as subnode to mtu3. An example and the DT binding 69In the case, xhci is added as subnode to mtu3. An example and the DT binding
69details of mtu3 can be found in: 70details of mtu3 can be found in:
70Documentation/devicetree/bindings/usb/mtu3.txt 71Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
71 72
72Required properties: 73Required properties:
73 - compatible : should contain "mediatek,mt8173-xhci" 74 - compatible : should contain "mediatek,mt8173-xhci"
@@ -82,6 +83,7 @@ Required properties:
82 entry in clock-names 83 entry in clock-names
83 - clock-names : must be 84 - clock-names : must be
84 "sys_ck": for clock of xHCI MAC 85 "sys_ck": for clock of xHCI MAC
86 "ref_ck": for reference clock of xHCI MAC
85 87
86Optional properties: 88Optional properties:
87 - vbus-supply : reference to the VBUS regulator; 89 - vbus-supply : reference to the VBUS regulator;
@@ -94,8 +96,8 @@ usb30: usb@11270000 {
94 reg-names = "mac"; 96 reg-names = "mac";
95 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 97 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
96 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 98 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
97 clocks = <&topckgen CLK_TOP_USB30_SEL>; 99 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
98 clock-names = "sys_ck"; 100 clock-names = "sys_ck", "ref_ck";
99 vusb33-supply = <&mt6397_vusb_reg>; 101 vusb33-supply = <&mt6397_vusb_reg>;
100 usb3-lpm-capable; 102 usb3-lpm-capable;
101}; 103};
diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
index 39acb084bce9..73cc0963e823 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
@@ -18,7 +18,7 @@ A child node must exist to represent the core DWC3 IP block. The name of
18the node is not important. The content of the node is defined in dwc3.txt. 18the node is not important. The content of the node is defined in dwc3.txt.
19 19
20Phy documentation is provided in the following places: 20Phy documentation is provided in the following places:
21Documentation/devicetree/bindings/phy/qcom,dwc3-usb-phy.txt 21Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt
22 22
23Example device nodes: 23Example device nodes:
24 24
diff --git a/Documentation/devicetree/bindings/usb/ulpi.txt b/Documentation/devicetree/bindings/usb/ulpi.txt
new file mode 100644
index 000000000000..ca179dc4bd50
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ulpi.txt
@@ -0,0 +1,20 @@
1ULPI bus binding
2----------------
3
4Phys that are behind a ULPI connection can be described with the following
5binding. The host controller shall have a "ulpi" named node as a child, and
6that node shall have one enabled node underneath it representing the ulpi
7device on the bus.
8
9EXAMPLE
10-------
11
12usb {
13 compatible = "vendor,usb-controller";
14
15 ulpi {
16 phy {
17 compatible = "vendor,phy";
18 };
19 };
20};
diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
index 0b7d8576001c..2d80b60eeabe 100644
--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
@@ -27,6 +27,7 @@ Required properties:
27Optional properties: 27Optional properties:
28 - clocks: reference to a clock 28 - clocks: reference to a clock
29 - usb3-lpm-capable: determines if platform is USB3 LPM capable 29 - usb3-lpm-capable: determines if platform is USB3 LPM capable
30 - quirk-broken-port-ped: set if the controller has broken port disable mechanism
30 31
31Example: 32Example:
32 usb@f0931000 { 33 usb@f0931000 {
diff --git a/Documentation/devicetree/bindings/usb/usb251xb.txt b/Documentation/devicetree/bindings/usb/usb251xb.txt
new file mode 100644
index 000000000000..0c065f77658f
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/usb251xb.txt
@@ -0,0 +1,83 @@
1Microchip USB 2.0 Hi-Speed Hub Controller
2
3The device node for the configuration of a Microchip USB251xB/xBi USB 2.0
4Hi-Speed Controller.
5
6Required properties :
7 - compatible : Should be "microchip,usb251xb" or one of the specific types:
8 "microchip,usb2512b", "microchip,usb2512bi", "microchip,usb2513b",
9 "microchip,usb2513bi", "microchip,usb2514b", "microchip,usb2514bi"
10 - hub-reset-gpios : Should specify the gpio for hub reset
11
12Optional properties :
13 - reg : I2C address on the selected bus (default is <0x2C>)
14 - skip-config : Skip Hub configuration, but only send the USB-Attach command
15 - vendor-id : USB Vendor ID of the hub (16 bit, default is 0x0424)
16 - product-id : USB Product ID of the hub (16 bit, default depends on type)
17 - device-id : USB Device ID of the hub (16 bit, default is 0x0bb3)
18 - language-id : USB Language ID (16 bit, default is 0x0000)
19 - manufacturer : USB Manufacturer string (max 31 characters long)
20 - product : USB Product string (max 31 characters long)
21 - serial : USB Serial string (max 31 characters long)
22 - {bus,self}-powered : selects between self- and bus-powered operation (default
23 is self-powered)
24 - disable-hi-speed : disable USB Hi-Speed support
25 - {multi,single}-tt : selects between multi- and single-transaction-translator
26 (default is multi-tt)
27 - disable-eop : disable End of Packet generation in full-speed mode
28 - {ganged,individual}-sensing : select over-current sense type in self-powered
29 mode (default is individual)
30 - {ganged,individual}-port-switching : select port power switching mode
31 (default is individual)
32 - dynamic-power-switching : enable auto-switching from self- to bus-powered
33 operation if the local power source is removed or unavailable
34 - oc-delay-{100us,4ms,8ms,16ms} : set over current timer delay (default is 8ms)
35 - compound-device : indicated the hub is part of a compound device
36 - port-mapping-mode : enable port mapping mode
37 - string-support : enable string descriptor support (required for manufacturer,
38 product and serial string configuration)
39 - non-removable-ports : Should specify the ports which have a non-removable
40 device connected.
41 - sp-disabled-ports : Specifies the ports which will be self-power disabled
42 - bp-disabled-ports : Specifies the ports which will be bus-power disabled
43 - max-sp-power : Specifies the maximum current the hub consumes from an
44 upstream port when operating as self-powered hub including the power
45 consumption of a permanently attached peripheral if the hub is
46 configured as a compound device. The value is given in mA in a 0 - 500
47 range (default is 2).
48 - max-bp-power : Specifies the maximum current the hub consumes from an
49 upstream port when operating as bus-powered hub including the power
50 consumption of a permanently attached peripheral if the hub is
51 configured as a compound device. The value is given in mA in a 0 - 500
52 range (default is 100).
53 - max-sp-current : Specifies the maximum current the hub consumes from an
54 upstream port when operating as self-powered hub EXCLUDING the power
55 consumption of a permanently attached peripheral if the hub is
56 configured as a compound device. The value is given in mA in a 0 - 500
57 range (default is 2).
58 - max-bp-current : Specifies the maximum current the hub consumes from an
59 upstream port when operating as bus-powered hub EXCLUDING the power
60 consumption of a permanently attached peripheral if the hub is
61 configured as a compound device. The value is given in mA in a 0 - 500
62 range (default is 100).
63 - power-on-time : Specifies the time it takes from the time the host initiates
64 the power-on sequence to a port until the port has adequate power. The
65 value is given in ms in a 0 - 510 range (default is 100ms).
66
67Examples:
68 usb2512b@2c {
69 compatible = "microchip,usb2512b";
70 hub-reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
71 };
72
73 usb2514b@2c {
74 compatible = "microchip,usb2514b";
75 reg = <0x2c>;
76 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
77 vendor-id = /bits/ 16 <0x0000>;
78 product-id = /bits/ 16 <0x0000>;
79 string-support;
80 manufacturer = "Foo";
81 product = "Foo-Bar";
82 serial = "1234567890A";
83 };
diff --git a/Documentation/usb/gadget-testing.txt b/Documentation/usb/gadget-testing.txt
index 581960574889..fb0cc4df1765 100644
--- a/Documentation/usb/gadget-testing.txt
+++ b/Documentation/usb/gadget-testing.txt
@@ -632,6 +632,8 @@ The uac2 function provides these attributes in its function directory:
632 p_chmask - playback channel mask 632 p_chmask - playback channel mask
633 p_srate - playback sampling rate 633 p_srate - playback sampling rate
634 p_ssize - playback sample size (bytes) 634 p_ssize - playback sample size (bytes)
635 req_number - the number of pre-allocated request for both capture
636 and playback
635 637
636The attributes have sane default values. 638The attributes have sane default values.
637 639
diff --git a/MAINTAINERS b/MAINTAINERS
index 2d79f8fcb265..d6e91e96f4e5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8233,6 +8233,14 @@ F: drivers/media/platform/atmel/atmel-isc.c
8233F: drivers/media/platform/atmel/atmel-isc-regs.h 8233F: drivers/media/platform/atmel/atmel-isc-regs.h
8234F: devicetree/bindings/media/atmel-isc.txt 8234F: devicetree/bindings/media/atmel-isc.txt
8235 8235
8236MICROCHIP USB251XB DRIVER
8237M: Richard Leitner <richard.leitner@skidata.com>
8238L: linux-usb@vger.kernel.org
8239S: Maintained
8240F: drivers/usb/misc/usb251xb.c
8241F: include/linux/platform_data/usb251xb.h
8242F: Documentation/devicetree/bindings/usb/usb251xb.txt
8243
8236MICROSOFT SURFACE PRO 3 BUTTON DRIVER 8244MICROSOFT SURFACE PRO 3 BUTTON DRIVER
8237M: Chen Yu <yu.c.chen@intel.com> 8245M: Chen Yu <yu.c.chen@intel.com>
8238L: platform-driver-x86@vger.kernel.org 8246L: platform-driver-x86@vger.kernel.org
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 12e702771f5c..40a02b29213e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -728,9 +728,11 @@
728 <&phy_port1 PHY_TYPE_USB2>; 728 <&phy_port1 PHY_TYPE_USB2>;
729 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 729 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
730 clocks = <&topckgen CLK_TOP_USB30_SEL>, 730 clocks = <&topckgen CLK_TOP_USB30_SEL>,
731 <&clk26m>,
731 <&pericfg CLK_PERI_USB0>, 732 <&pericfg CLK_PERI_USB0>,
732 <&pericfg CLK_PERI_USB1>; 733 <&pericfg CLK_PERI_USB1>;
733 clock-names = "sys_ck", 734 clock-names = "sys_ck",
735 "ref_ck",
734 "wakeup_deb_p0", 736 "wakeup_deb_p0",
735 "wakeup_deb_p1"; 737 "wakeup_deb_p1";
736 mediatek,syscon-wakeup = <&pericfg>; 738 mediatek,syscon-wakeup = <&pericfg>;
@@ -745,8 +747,8 @@
745 reg-names = "mac"; 747 reg-names = "mac";
746 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 748 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
747 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 749 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
748 clocks = <&topckgen CLK_TOP_USB30_SEL>; 750 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
749 clock-names = "sys_ck"; 751 clock-names = "sys_ck", "ref_ck";
750 status = "disabled"; 752 status = "disabled";
751 }; 753 };
752 }; 754 };
diff --git a/drivers/dma/cppi41.c b/drivers/dma/cppi41.c
index 200828c60db9..d74cee077842 100644
--- a/drivers/dma/cppi41.c
+++ b/drivers/dma/cppi41.c
@@ -79,14 +79,6 @@
79#define QMGR_QUEUE_C(n) (0x2008 + (n) * 0x10) 79#define QMGR_QUEUE_C(n) (0x2008 + (n) * 0x10)
80#define QMGR_QUEUE_D(n) (0x200c + (n) * 0x10) 80#define QMGR_QUEUE_D(n) (0x200c + (n) * 0x10)
81 81
82/* Glue layer specific */
83/* USBSS / USB AM335x */
84#define USBSS_IRQ_STATUS 0x28
85#define USBSS_IRQ_ENABLER 0x2c
86#define USBSS_IRQ_CLEARR 0x30
87
88#define USBSS_IRQ_PD_COMP (1 << 2)
89
90/* Packet Descriptor */ 82/* Packet Descriptor */
91#define PD2_ZERO_LENGTH (1 << 19) 83#define PD2_ZERO_LENGTH (1 << 19)
92 84
@@ -294,14 +286,8 @@ static irqreturn_t cppi41_irq(int irq, void *data)
294{ 286{
295 struct cppi41_dd *cdd = data; 287 struct cppi41_dd *cdd = data;
296 struct cppi41_channel *c; 288 struct cppi41_channel *c;
297 u32 status;
298 int i; 289 int i;
299 290
300 status = cppi_readl(cdd->usbss_mem + USBSS_IRQ_STATUS);
301 if (!(status & USBSS_IRQ_PD_COMP))
302 return IRQ_NONE;
303 cppi_writel(status, cdd->usbss_mem + USBSS_IRQ_STATUS);
304
305 for (i = QMGR_PENDING_SLOT_Q(FIST_COMPLETION_QUEUE); i < QMGR_NUM_PEND; 291 for (i = QMGR_PENDING_SLOT_Q(FIST_COMPLETION_QUEUE); i < QMGR_NUM_PEND;
306 i++) { 292 i++) {
307 u32 val; 293 u32 val;
@@ -618,6 +604,7 @@ static void cppi41_compute_td_desc(struct cppi41_desc *d)
618 604
619static int cppi41_tear_down_chan(struct cppi41_channel *c) 605static int cppi41_tear_down_chan(struct cppi41_channel *c)
620{ 606{
607 struct dmaengine_result abort_result;
621 struct cppi41_dd *cdd = c->cdd; 608 struct cppi41_dd *cdd = c->cdd;
622 struct cppi41_desc *td; 609 struct cppi41_desc *td;
623 u32 reg; 610 u32 reg;
@@ -701,6 +688,12 @@ static int cppi41_tear_down_chan(struct cppi41_channel *c)
701 c->td_seen = 0; 688 c->td_seen = 0;
702 c->td_desc_seen = 0; 689 c->td_desc_seen = 0;
703 cppi_writel(0, c->gcr_reg); 690 cppi_writel(0, c->gcr_reg);
691
692 /* Invoke the callback to do the necessary clean-up */
693 abort_result.result = DMA_TRANS_ABORTED;
694 dma_cookie_complete(&c->txd);
695 dmaengine_desc_get_callback_invoke(&c->txd, &abort_result);
696
704 return 0; 697 return 0;
705} 698}
706 699
@@ -1066,8 +1059,6 @@ static int cppi41_dma_probe(struct platform_device *pdev)
1066 goto err_irq; 1059 goto err_irq;
1067 } 1060 }
1068 1061
1069 cppi_writel(USBSS_IRQ_PD_COMP, cdd->usbss_mem + USBSS_IRQ_ENABLER);
1070
1071 ret = devm_request_irq(&pdev->dev, irq, glue_info->isr, IRQF_SHARED, 1062 ret = devm_request_irq(&pdev->dev, irq, glue_info->isr, IRQF_SHARED,
1072 dev_name(dev), cdd); 1063 dev_name(dev), cdd);
1073 if (ret) 1064 if (ret)
@@ -1091,7 +1082,6 @@ err_of:
1091 dma_async_device_unregister(&cdd->ddev); 1082 dma_async_device_unregister(&cdd->ddev);
1092err_dma_reg: 1083err_dma_reg:
1093err_irq: 1084err_irq:
1094 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR);
1095 cleanup_chans(cdd); 1085 cleanup_chans(cdd);
1096err_chans: 1086err_chans:
1097 deinit_cppi41(dev, cdd); 1087 deinit_cppi41(dev, cdd);
@@ -1119,7 +1109,6 @@ static int cppi41_dma_remove(struct platform_device *pdev)
1119 of_dma_controller_free(pdev->dev.of_node); 1109 of_dma_controller_free(pdev->dev.of_node);
1120 dma_async_device_unregister(&cdd->ddev); 1110 dma_async_device_unregister(&cdd->ddev);
1121 1111
1122 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR);
1123 devm_free_irq(&pdev->dev, cdd->irq, cdd); 1112 devm_free_irq(&pdev->dev, cdd->irq, cdd);
1124 cleanup_chans(cdd); 1113 cleanup_chans(cdd);
1125 deinit_cppi41(&pdev->dev, cdd); 1114 deinit_cppi41(&pdev->dev, cdd);
@@ -1138,7 +1127,6 @@ static int __maybe_unused cppi41_suspend(struct device *dev)
1138 struct cppi41_dd *cdd = dev_get_drvdata(dev); 1127 struct cppi41_dd *cdd = dev_get_drvdata(dev);
1139 1128
1140 cdd->dma_tdfdq = cppi_readl(cdd->ctrl_mem + DMA_TDFDQ); 1129 cdd->dma_tdfdq = cppi_readl(cdd->ctrl_mem + DMA_TDFDQ);
1141 cppi_writel(0, cdd->usbss_mem + USBSS_IRQ_CLEARR);
1142 disable_sched(cdd); 1130 disable_sched(cdd);
1143 1131
1144 return 0; 1132 return 0;
@@ -1164,8 +1152,6 @@ static int __maybe_unused cppi41_resume(struct device *dev)
1164 cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE); 1152 cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE);
1165 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE); 1153 cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE);
1166 1154
1167 cppi_writel(USBSS_IRQ_PD_COMP, cdd->usbss_mem + USBSS_IRQ_ENABLER);
1168
1169 return 0; 1155 return 0;
1170} 1156}
1171 1157
diff --git a/drivers/of/device.c b/drivers/of/device.c
index fd5cfad7c403..b1e6bebda3f3 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -225,6 +225,30 @@ ssize_t of_device_get_modalias(struct device *dev, char *str, ssize_t len)
225 225
226 return tsize; 226 return tsize;
227} 227}
228EXPORT_SYMBOL_GPL(of_device_get_modalias);
229
230int of_device_request_module(struct device *dev)
231{
232 char *str;
233 ssize_t size;
234 int ret;
235
236 size = of_device_get_modalias(dev, NULL, 0);
237 if (size < 0)
238 return size;
239
240 str = kmalloc(size + 1, GFP_KERNEL);
241 if (!str)
242 return -ENOMEM;
243
244 of_device_get_modalias(dev, str, size);
245 str[size] = '\0';
246 ret = request_module(str);
247 kfree(str);
248
249 return ret;
250}
251EXPORT_SYMBOL_GPL(of_device_request_module);
228 252
229/** 253/**
230 * of_device_uevent - Display OF related uevent information 254 * of_device_uevent - Display OF related uevent information
@@ -287,3 +311,4 @@ int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env)
287 311
288 return 0; 312 return 0;
289} 313}
314EXPORT_SYMBOL_GPL(of_device_uevent_modalias);
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index e8eb7f225a88..bb5cf6f49b06 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -363,6 +363,7 @@ config PHY_ROCKCHIP_INNO_USB2
363 tristate "Rockchip INNO USB2PHY Driver" 363 tristate "Rockchip INNO USB2PHY Driver"
364 depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF 364 depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF
365 depends on COMMON_CLK 365 depends on COMMON_CLK
366 depends on EXTCON
366 depends on USB_SUPPORT 367 depends on USB_SUPPORT
367 select GENERIC_PHY 368 select GENERIC_PHY
368 select USB_COMMON 369 select USB_COMMON
@@ -437,6 +438,21 @@ config PHY_QCOM_UFS
437 help 438 help
438 Support for UFS PHY on QCOM chipsets. 439 Support for UFS PHY on QCOM chipsets.
439 440
441config PHY_QCOM_USB_HS
442 tristate "Qualcomm USB HS PHY module"
443 depends on USB_ULPI_BUS
444 select GENERIC_PHY
445 help
446 Support for the USB high-speed ULPI compliant phy on Qualcomm
447 chipsets.
448
449config PHY_QCOM_USB_HSIC
450 tristate "Qualcomm USB HSIC ULPI PHY module"
451 depends on USB_ULPI_BUS
452 select GENERIC_PHY
453 help
454 Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
455
440config PHY_TUSB1210 456config PHY_TUSB1210
441 tristate "TI TUSB1210 ULPI PHY module" 457 tristate "TI TUSB1210 ULPI PHY module"
442 depends on USB_ULPI_BUS 458 depends on USB_ULPI_BUS
@@ -486,4 +502,12 @@ config PHY_MESON8B_USB2
486 and GXBB SoCs. 502 and GXBB SoCs.
487 If unsure, say N. 503 If unsure, say N.
488 504
505config PHY_NSP_USB3
506 tristate "Broadcom NorthStar plus USB3 PHY driver"
507 depends on OF && (ARCH_BCM_NSP || COMPILE_TEST)
508 select GENERIC_PHY
509 default ARCH_BCM_NSP
510 help
511 Enable this to support the Broadcom Northstar plus USB3 PHY.
512 If unsure, say N.
489endmenu 513endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 65eb2f436a41..9f008004f75d 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -52,6 +52,8 @@ obj-$(CONFIG_PHY_STIH407_USB) += phy-stih407-usb.o
52obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o 52obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
53obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o 53obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
54obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o 54obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
55obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
56obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
55obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o 57obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
56obj-$(CONFIG_PHY_BRCM_SATA) += phy-brcm-sata.o 58obj-$(CONFIG_PHY_BRCM_SATA) += phy-brcm-sata.o
57obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o 59obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
@@ -59,3 +61,4 @@ obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o
59obj-$(CONFIG_ARCH_TEGRA) += tegra/ 61obj-$(CONFIG_ARCH_TEGRA) += tegra/
60obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o 62obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
61obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o 63obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
64obj-$(CONFIG_PHY_NSP_USB3) += phy-bcm-nsp-usb3.o
diff --git a/drivers/phy/phy-bcm-cygnus-pcie.c b/drivers/phy/phy-bcm-cygnus-pcie.c
index 082c03f6438f..0f4ac5d63cff 100644
--- a/drivers/phy/phy-bcm-cygnus-pcie.c
+++ b/drivers/phy/phy-bcm-cygnus-pcie.c
@@ -114,7 +114,7 @@ static int cygnus_pcie_phy_power_off(struct phy *p)
114 return cygnus_pcie_power_config(phy, false); 114 return cygnus_pcie_power_config(phy, false);
115} 115}
116 116
117static struct phy_ops cygnus_pcie_phy_ops = { 117static const struct phy_ops cygnus_pcie_phy_ops = {
118 .power_on = cygnus_pcie_phy_power_on, 118 .power_on = cygnus_pcie_phy_power_on,
119 .power_off = cygnus_pcie_phy_power_off, 119 .power_off = cygnus_pcie_phy_power_off,
120 .owner = THIS_MODULE, 120 .owner = THIS_MODULE,
diff --git a/drivers/phy/phy-bcm-nsp-usb3.c b/drivers/phy/phy-bcm-nsp-usb3.c
new file mode 100644
index 000000000000..49024eaa5545
--- /dev/null
+++ b/drivers/phy/phy-bcm-nsp-usb3.c
@@ -0,0 +1,177 @@
1/*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/delay.h>
15#include <linux/io.h>
16#include <linux/kernel.h>
17#include <linux/mfd/syscon.h>
18#include <linux/mdio.h>
19#include <linux/module.h>
20#include <linux/of.h>
21#include <linux/of_address.h>
22#include <linux/phy/phy.h>
23#include <linux/regmap.h>
24
25#define NSP_USB3_RST_CTRL_OFFSET 0x3f8
26
27/* mdio reg access */
28#define NSP_USB3_PHY_BASE_ADDR_REG 0x1f
29
30#define NSP_USB3_PHY_PLL30_BLOCK 0x8000
31#define NSP_USB3_PLL_CONTROL 0x01
32#define NSP_USB3_PLLA_CONTROL0 0x0a
33#define NSP_USB3_PLLA_CONTROL1 0x0b
34
35#define NSP_USB3_PHY_TX_PMD_BLOCK 0x8040
36#define NSP_USB3_TX_PMD_CONTROL1 0x01
37
38#define NSP_USB3_PHY_PIPE_BLOCK 0x8060
39#define NSP_USB3_LFPS_CMP 0x02
40#define NSP_USB3_LFPS_DEGLITCH 0x03
41
42struct nsp_usb3_phy {
43 struct regmap *usb3_ctrl;
44 struct phy *phy;
45 struct mdio_device *mdiodev;
46};
47
48static int nsp_usb3_phy_init(struct phy *phy)
49{
50 struct nsp_usb3_phy *iphy = phy_get_drvdata(phy);
51 struct mii_bus *bus = iphy->mdiodev->bus;
52 int addr = iphy->mdiodev->addr;
53 u32 data;
54 int rc;
55
56 rc = regmap_read(iphy->usb3_ctrl, 0, &data);
57 if (rc)
58 return rc;
59 data |= 1;
60 rc = regmap_write(iphy->usb3_ctrl, 0, data);
61 if (rc)
62 return rc;
63
64 rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 1);
65 if (rc)
66 return rc;
67
68 rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
69 NSP_USB3_PHY_PLL30_BLOCK);
70 if (rc)
71 return rc;
72
73 rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x1000);
74 if (rc)
75 return rc;
76
77 rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL0, 0x6400);
78 if (rc)
79 return rc;
80
81 rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0xc000);
82 if (rc)
83 return rc;
84
85 rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0x8000);
86 if (rc)
87 return rc;
88
89 rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 0);
90 if (rc)
91 return rc;
92
93 rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x9000);
94 if (rc)
95 return rc;
96
97 rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
98 NSP_USB3_PHY_PIPE_BLOCK);
99 if (rc)
100 return rc;
101
102 rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_CMP, 0xf30d);
103 if (rc)
104 return rc;
105
106 rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_DEGLITCH, 0x6302);
107 if (rc)
108 return rc;
109
110 rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
111 NSP_USB3_PHY_TX_PMD_BLOCK);
112 if (rc)
113 return rc;
114
115 rc = mdiobus_write(bus, addr, NSP_USB3_TX_PMD_CONTROL1, 0x1003);
116
117 return rc;
118}
119
120static struct phy_ops nsp_usb3_phy_ops = {
121 .init = nsp_usb3_phy_init,
122 .owner = THIS_MODULE,
123};
124
125static int nsp_usb3_phy_probe(struct mdio_device *mdiodev)
126{
127 struct device *dev = &mdiodev->dev;
128 struct phy_provider *provider;
129 struct nsp_usb3_phy *iphy;
130
131 iphy = devm_kzalloc(dev, sizeof(*iphy), GFP_KERNEL);
132 if (!iphy)
133 return -ENOMEM;
134 iphy->mdiodev = mdiodev;
135
136 iphy->usb3_ctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
137 "usb3-ctrl-syscon");
138 if (IS_ERR(iphy->usb3_ctrl))
139 return PTR_ERR(iphy->usb3_ctrl);
140
141 iphy->phy = devm_phy_create(dev, dev->of_node, &nsp_usb3_phy_ops);
142 if (IS_ERR(iphy->phy)) {
143 dev_err(dev, "failed to create PHY\n");
144 return PTR_ERR(iphy->phy);
145 }
146
147 phy_set_drvdata(iphy->phy, iphy);
148
149 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
150 if (IS_ERR(provider)) {
151 dev_err(dev, "could not register PHY provider\n");
152 return PTR_ERR(provider);
153 }
154
155 return 0;
156}
157
158static const struct of_device_id nsp_usb3_phy_of_match[] = {
159 {.compatible = "brcm,nsp-usb3-phy",},
160 { /* sentinel */ }
161};
162
163static struct mdio_driver nsp_usb3_phy_driver = {
164 .mdiodrv = {
165 .driver = {
166 .name = "nsp-usb3-phy",
167 .of_match_table = nsp_usb3_phy_of_match,
168 },
169 },
170 .probe = nsp_usb3_phy_probe,
171};
172
173mdio_module_driver(nsp_usb3_phy_driver);
174
175MODULE_DESCRIPTION("Broadcom NSP USB3 PHY driver");
176MODULE_LICENSE("GPL v2");
177MODULE_AUTHOR("Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com");
diff --git a/drivers/phy/phy-hi6220-usb.c b/drivers/phy/phy-hi6220-usb.c
index b2141cbd4cf6..398c1021deec 100644
--- a/drivers/phy/phy-hi6220-usb.c
+++ b/drivers/phy/phy-hi6220-usb.c
@@ -112,7 +112,7 @@ static int hi6220_phy_exit(struct phy *phy)
112 return hi6220_phy_setup(priv, false); 112 return hi6220_phy_setup(priv, false);
113} 113}
114 114
115static struct phy_ops hi6220_phy_ops = { 115static const struct phy_ops hi6220_phy_ops = {
116 .init = hi6220_phy_start, 116 .init = hi6220_phy_start,
117 .exit = hi6220_phy_exit, 117 .exit = hi6220_phy_exit,
118 .owner = THIS_MODULE, 118 .owner = THIS_MODULE,
diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 4d85e730ccab..d9720675b9db 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -506,7 +506,7 @@ static struct phy *mt65xx_phy_xlate(struct device *dev,
506 return instance->phy; 506 return instance->phy;
507} 507}
508 508
509static struct phy_ops mt65xx_u3phy_ops = { 509static const struct phy_ops mt65xx_u3phy_ops = {
510 .init = mt65xx_phy_init, 510 .init = mt65xx_phy_init,
511 .exit = mt65xx_phy_exit, 511 .exit = mt65xx_phy_exit,
512 .power_on = mt65xx_phy_power_on, 512 .power_on = mt65xx_phy_power_on,
diff --git a/drivers/phy/phy-qcom-ufs-i.h b/drivers/phy/phy-qcom-ufs-i.h
index d505d98cf5f8..13b02b7de30b 100644
--- a/drivers/phy/phy-qcom-ufs-i.h
+++ b/drivers/phy/phy-qcom-ufs-i.h
@@ -77,7 +77,6 @@ struct ufs_qcom_phy_vreg {
77 int min_uV; 77 int min_uV;
78 int max_uV; 78 int max_uV;
79 bool enabled; 79 bool enabled;
80 bool is_always_on;
81}; 80};
82 81
83struct ufs_qcom_phy { 82struct ufs_qcom_phy {
diff --git a/drivers/phy/phy-qcom-ufs-qmp-14nm.c b/drivers/phy/phy-qcom-ufs-qmp-14nm.c
index c71c84734916..12a1b498dc4b 100644
--- a/drivers/phy/phy-qcom-ufs-qmp-14nm.c
+++ b/drivers/phy/phy-qcom-ufs-qmp-14nm.c
@@ -132,27 +132,18 @@ static int ufs_qcom_phy_qmp_14nm_probe(struct platform_device *pdev)
132 &ufs_qcom_phy_qmp_14nm_phy_ops, &phy_14nm_ops); 132 &ufs_qcom_phy_qmp_14nm_phy_ops, &phy_14nm_ops);
133 133
134 if (!generic_phy) { 134 if (!generic_phy) {
135 dev_err(dev, "%s: ufs_qcom_phy_generic_probe() failed\n",
136 __func__);
137 err = -EIO; 135 err = -EIO;
138 goto out; 136 goto out;
139 } 137 }
140 138
141 err = ufs_qcom_phy_init_clks(phy_common); 139 err = ufs_qcom_phy_init_clks(phy_common);
142 if (err) { 140 if (err)
143 dev_err(phy_common->dev,
144 "%s: ufs_qcom_phy_init_clks() failed %d\n",
145 __func__, err);
146 goto out; 141 goto out;
147 }
148 142
149 err = ufs_qcom_phy_init_vregulators(phy_common); 143 err = ufs_qcom_phy_init_vregulators(phy_common);
150 if (err) { 144 if (err)
151 dev_err(phy_common->dev,
152 "%s: ufs_qcom_phy_init_vregulators() failed %d\n",
153 __func__, err);
154 goto out; 145 goto out;
155 } 146
156 phy_common->vdda_phy.max_uV = UFS_PHY_VDDA_PHY_UV; 147 phy_common->vdda_phy.max_uV = UFS_PHY_VDDA_PHY_UV;
157 phy_common->vdda_phy.min_uV = UFS_PHY_VDDA_PHY_UV; 148 phy_common->vdda_phy.min_uV = UFS_PHY_VDDA_PHY_UV;
158 149
diff --git a/drivers/phy/phy-qcom-ufs-qmp-20nm.c b/drivers/phy/phy-qcom-ufs-qmp-20nm.c
index 1a26a64e06d3..4f68acb58b73 100644
--- a/drivers/phy/phy-qcom-ufs-qmp-20nm.c
+++ b/drivers/phy/phy-qcom-ufs-qmp-20nm.c
@@ -190,25 +190,17 @@ static int ufs_qcom_phy_qmp_20nm_probe(struct platform_device *pdev)
190 &ufs_qcom_phy_qmp_20nm_phy_ops, &phy_20nm_ops); 190 &ufs_qcom_phy_qmp_20nm_phy_ops, &phy_20nm_ops);
191 191
192 if (!generic_phy) { 192 if (!generic_phy) {
193 dev_err(dev, "%s: ufs_qcom_phy_generic_probe() failed\n",
194 __func__);
195 err = -EIO; 193 err = -EIO;
196 goto out; 194 goto out;
197 } 195 }
198 196
199 err = ufs_qcom_phy_init_clks(phy_common); 197 err = ufs_qcom_phy_init_clks(phy_common);
200 if (err) { 198 if (err)
201 dev_err(phy_common->dev, "%s: ufs_qcom_phy_init_clks() failed %d\n",
202 __func__, err);
203 goto out; 199 goto out;
204 }
205 200
206 err = ufs_qcom_phy_init_vregulators(phy_common); 201 err = ufs_qcom_phy_init_vregulators(phy_common);
207 if (err) { 202 if (err)
208 dev_err(phy_common->dev, "%s: ufs_qcom_phy_init_vregulators() failed %d\n",
209 __func__, err);
210 goto out; 203 goto out;
211 }
212 204
213 ufs_qcom_phy_qmp_20nm_advertise_quirks(phy_common); 205 ufs_qcom_phy_qmp_20nm_advertise_quirks(phy_common);
214 206
diff --git a/drivers/phy/phy-qcom-ufs.c b/drivers/phy/phy-qcom-ufs.c
index c69568b8543d..43865ef340e2 100644
--- a/drivers/phy/phy-qcom-ufs.c
+++ b/drivers/phy/phy-qcom-ufs.c
@@ -189,12 +189,12 @@ int ufs_qcom_phy_init_clks(struct ufs_qcom_phy *phy_common)
189 if (err) 189 if (err)
190 goto out; 190 goto out;
191 191
192skip_txrx_clk:
192 err = ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk_src", 193 err = ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk_src",
193 &phy_common->ref_clk_src); 194 &phy_common->ref_clk_src);
194 if (err) 195 if (err)
195 goto out; 196 goto out;
196 197
197skip_txrx_clk:
198 /* 198 /*
199 * "ref_clk_parent" is optional hence don't abort init if it's not 199 * "ref_clk_parent" is optional hence don't abort init if it's not
200 * found. 200 * found.
@@ -210,25 +210,19 @@ out:
210} 210}
211EXPORT_SYMBOL_GPL(ufs_qcom_phy_init_clks); 211EXPORT_SYMBOL_GPL(ufs_qcom_phy_init_clks);
212 212
213static int __ufs_qcom_phy_init_vreg(struct device *dev, 213static int ufs_qcom_phy_init_vreg(struct device *dev,
214 struct ufs_qcom_phy_vreg *vreg, const char *name, bool optional) 214 struct ufs_qcom_phy_vreg *vreg,
215 const char *name)
215{ 216{
216 int err = 0; 217 int err = 0;
217 218
218 char prop_name[MAX_PROP_NAME]; 219 char prop_name[MAX_PROP_NAME];
219 220
220 vreg->name = devm_kstrdup(dev, name, GFP_KERNEL); 221 vreg->name = name;
221 if (!vreg->name) {
222 err = -ENOMEM;
223 goto out;
224 }
225
226 vreg->reg = devm_regulator_get(dev, name); 222 vreg->reg = devm_regulator_get(dev, name);
227 if (IS_ERR(vreg->reg)) { 223 if (IS_ERR(vreg->reg)) {
228 err = PTR_ERR(vreg->reg); 224 err = PTR_ERR(vreg->reg);
229 vreg->reg = NULL; 225 dev_err(dev, "failed to get %s, %d\n", name, err);
230 if (!optional)
231 dev_err(dev, "failed to get %s, %d\n", name, err);
232 goto out; 226 goto out;
233 } 227 }
234 228
@@ -248,9 +242,6 @@ static int __ufs_qcom_phy_init_vreg(struct device *dev,
248 } 242 }
249 err = 0; 243 err = 0;
250 } 244 }
251 snprintf(prop_name, MAX_PROP_NAME, "%s-always-on", name);
252 vreg->is_always_on = of_property_read_bool(dev->of_node,
253 prop_name);
254 } 245 }
255 246
256 if (!strcmp(name, "vdda-pll")) { 247 if (!strcmp(name, "vdda-pll")) {
@@ -265,17 +256,9 @@ static int __ufs_qcom_phy_init_vreg(struct device *dev,
265 } 256 }
266 257
267out: 258out:
268 if (err)
269 kfree(vreg->name);
270 return err; 259 return err;
271} 260}
272 261
273static int ufs_qcom_phy_init_vreg(struct device *dev,
274 struct ufs_qcom_phy_vreg *vreg, const char *name)
275{
276 return __ufs_qcom_phy_init_vreg(dev, vreg, name, false);
277}
278
279int ufs_qcom_phy_init_vregulators(struct ufs_qcom_phy *phy_common) 262int ufs_qcom_phy_init_vregulators(struct ufs_qcom_phy *phy_common)
280{ 263{
281 int err; 264 int err;
@@ -291,9 +274,9 @@ int ufs_qcom_phy_init_vregulators(struct ufs_qcom_phy *phy_common)
291 if (err) 274 if (err)
292 goto out; 275 goto out;
293 276
294 /* vddp-ref-clk-* properties are optional */ 277 err = ufs_qcom_phy_init_vreg(phy_common->dev, &phy_common->vddp_ref_clk,
295 __ufs_qcom_phy_init_vreg(phy_common->dev, &phy_common->vddp_ref_clk, 278 "vddp-ref-clk");
296 "vddp-ref-clk", true); 279
297out: 280out:
298 return err; 281 return err;
299} 282}
@@ -416,7 +399,7 @@ static int ufs_qcom_phy_disable_vreg(struct device *dev,
416{ 399{
417 int ret = 0; 400 int ret = 0;
418 401
419 if (!vreg || !vreg->enabled || vreg->is_always_on) 402 if (!vreg || !vreg->enabled)
420 goto out; 403 goto out;
421 404
422 ret = regulator_disable(vreg->reg); 405 ret = regulator_disable(vreg->reg);
diff --git a/drivers/phy/phy-qcom-usb-hs.c b/drivers/phy/phy-qcom-usb-hs.c
new file mode 100644
index 000000000000..94dfbfd739c3
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hs.c
@@ -0,0 +1,296 @@
1/**
2 * Copyright (C) 2016 Linaro Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/module.h>
9#include <linux/ulpi/driver.h>
10#include <linux/ulpi/regs.h>
11#include <linux/clk.h>
12#include <linux/regulator/consumer.h>
13#include <linux/of_device.h>
14#include <linux/reset.h>
15#include <linux/extcon.h>
16#include <linux/notifier.h>
17
18#include "ulpi_phy.h"
19
20#define ULPI_PWR_CLK_MNG_REG 0x88
21# define ULPI_PWR_OTG_COMP_DISABLE BIT(0)
22
23#define ULPI_MISC_A 0x96
24# define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
25# define ULPI_MISC_A_VBUSVLDEXT BIT(0)
26
27
28struct ulpi_seq {
29 u8 addr;
30 u8 val;
31};
32
33struct qcom_usb_hs_phy {
34 struct ulpi *ulpi;
35 struct phy *phy;
36 struct clk *ref_clk;
37 struct clk *sleep_clk;
38 struct regulator *v1p8;
39 struct regulator *v3p3;
40 struct reset_control *reset;
41 struct ulpi_seq *init_seq;
42 struct extcon_dev *vbus_edev;
43 struct notifier_block vbus_notify;
44};
45
46static int qcom_usb_hs_phy_set_mode(struct phy *phy, enum phy_mode mode)
47{
48 struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
49 u8 addr;
50 int ret;
51
52 if (!uphy->vbus_edev) {
53 u8 val = 0;
54
55 switch (mode) {
56 case PHY_MODE_USB_OTG:
57 case PHY_MODE_USB_HOST:
58 val |= ULPI_INT_IDGRD;
59 case PHY_MODE_USB_DEVICE:
60 val |= ULPI_INT_SESS_VALID;
61 default:
62 break;
63 }
64
65 ret = ulpi_write(uphy->ulpi, ULPI_USB_INT_EN_RISE, val);
66 if (ret)
67 return ret;
68 ret = ulpi_write(uphy->ulpi, ULPI_USB_INT_EN_FALL, val);
69 } else {
70 switch (mode) {
71 case PHY_MODE_USB_OTG:
72 case PHY_MODE_USB_DEVICE:
73 addr = ULPI_SET(ULPI_MISC_A);
74 break;
75 case PHY_MODE_USB_HOST:
76 addr = ULPI_CLR(ULPI_MISC_A);
77 break;
78 default:
79 return -EINVAL;
80 }
81
82 ret = ulpi_write(uphy->ulpi, ULPI_SET(ULPI_PWR_CLK_MNG_REG),
83 ULPI_PWR_OTG_COMP_DISABLE);
84 if (ret)
85 return ret;
86 ret = ulpi_write(uphy->ulpi, addr, ULPI_MISC_A_VBUSVLDEXTSEL);
87 }
88
89 return ret;
90}
91
92static int
93qcom_usb_hs_phy_vbus_notifier(struct notifier_block *nb, unsigned long event,
94 void *ptr)
95{
96 struct qcom_usb_hs_phy *uphy;
97 u8 addr;
98
99 uphy = container_of(nb, struct qcom_usb_hs_phy, vbus_notify);
100
101 if (event)
102 addr = ULPI_SET(ULPI_MISC_A);
103 else
104 addr = ULPI_CLR(ULPI_MISC_A);
105
106 return ulpi_write(uphy->ulpi, addr, ULPI_MISC_A_VBUSVLDEXT);
107}
108
109static int qcom_usb_hs_phy_power_on(struct phy *phy)
110{
111 struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
112 struct ulpi *ulpi = uphy->ulpi;
113 const struct ulpi_seq *seq;
114 int ret, state;
115
116 ret = clk_prepare_enable(uphy->ref_clk);
117 if (ret)
118 return ret;
119
120 ret = clk_prepare_enable(uphy->sleep_clk);
121 if (ret)
122 goto err_sleep;
123
124 ret = regulator_set_load(uphy->v1p8, 50000);
125 if (ret < 0)
126 goto err_1p8;
127
128 ret = regulator_enable(uphy->v1p8);
129 if (ret)
130 goto err_1p8;
131
132 ret = regulator_set_voltage_triplet(uphy->v3p3, 3050000, 3300000,
133 3300000);
134 if (ret)
135 goto err_3p3;
136
137 ret = regulator_set_load(uphy->v3p3, 50000);
138 if (ret < 0)
139 goto err_3p3;
140
141 ret = regulator_enable(uphy->v3p3);
142 if (ret)
143 goto err_3p3;
144
145 for (seq = uphy->init_seq; seq->addr; seq++) {
146 ret = ulpi_write(ulpi, ULPI_EXT_VENDOR_SPECIFIC + seq->addr,
147 seq->val);
148 if (ret)
149 goto err_ulpi;
150 }
151
152 if (uphy->reset) {
153 ret = reset_control_reset(uphy->reset);
154 if (ret)
155 goto err_ulpi;
156 }
157
158 if (uphy->vbus_edev) {
159 state = extcon_get_cable_state_(uphy->vbus_edev, EXTCON_USB);
160 /* setup initial state */
161 qcom_usb_hs_phy_vbus_notifier(&uphy->vbus_notify, state,
162 uphy->vbus_edev);
163 ret = extcon_register_notifier(uphy->vbus_edev, EXTCON_USB,
164 &uphy->vbus_notify);
165 if (ret)
166 goto err_ulpi;
167 }
168
169 return 0;
170err_ulpi:
171 regulator_disable(uphy->v3p3);
172err_3p3:
173 regulator_disable(uphy->v1p8);
174err_1p8:
175 clk_disable_unprepare(uphy->sleep_clk);
176err_sleep:
177 clk_disable_unprepare(uphy->ref_clk);
178 return ret;
179}
180
181static int qcom_usb_hs_phy_power_off(struct phy *phy)
182{
183 int ret;
184 struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
185
186 if (uphy->vbus_edev) {
187 ret = extcon_unregister_notifier(uphy->vbus_edev, EXTCON_USB,
188 &uphy->vbus_notify);
189 if (ret)
190 return ret;
191 }
192
193 regulator_disable(uphy->v3p3);
194 regulator_disable(uphy->v1p8);
195 clk_disable_unprepare(uphy->sleep_clk);
196 clk_disable_unprepare(uphy->ref_clk);
197
198 return 0;
199}
200
201static const struct phy_ops qcom_usb_hs_phy_ops = {
202 .power_on = qcom_usb_hs_phy_power_on,
203 .power_off = qcom_usb_hs_phy_power_off,
204 .set_mode = qcom_usb_hs_phy_set_mode,
205 .owner = THIS_MODULE,
206};
207
208static int qcom_usb_hs_phy_probe(struct ulpi *ulpi)
209{
210 struct qcom_usb_hs_phy *uphy;
211 struct phy_provider *p;
212 struct clk *clk;
213 struct regulator *reg;
214 struct reset_control *reset;
215 int size;
216 int ret;
217
218 uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
219 if (!uphy)
220 return -ENOMEM;
221 ulpi_set_drvdata(ulpi, uphy);
222 uphy->ulpi = ulpi;
223
224 size = of_property_count_u8_elems(ulpi->dev.of_node, "qcom,init-seq");
225 if (size < 0)
226 size = 0;
227 uphy->init_seq = devm_kmalloc_array(&ulpi->dev, (size / 2) + 1,
228 sizeof(*uphy->init_seq), GFP_KERNEL);
229 if (!uphy->init_seq)
230 return -ENOMEM;
231 ret = of_property_read_u8_array(ulpi->dev.of_node, "qcom,init-seq",
232 (u8 *)uphy->init_seq, size);
233 if (ret && size)
234 return ret;
235 /* NUL terminate */
236 uphy->init_seq[size / 2].addr = uphy->init_seq[size / 2].val = 0;
237
238 uphy->ref_clk = clk = devm_clk_get(&ulpi->dev, "ref");
239 if (IS_ERR(clk))
240 return PTR_ERR(clk);
241
242 uphy->sleep_clk = clk = devm_clk_get(&ulpi->dev, "sleep");
243 if (IS_ERR(clk))
244 return PTR_ERR(clk);
245
246 uphy->v1p8 = reg = devm_regulator_get(&ulpi->dev, "v1p8");
247 if (IS_ERR(reg))
248 return PTR_ERR(reg);
249
250 uphy->v3p3 = reg = devm_regulator_get(&ulpi->dev, "v3p3");
251 if (IS_ERR(reg))
252 return PTR_ERR(reg);
253
254 uphy->reset = reset = devm_reset_control_get(&ulpi->dev, "por");
255 if (IS_ERR(reset)) {
256 if (PTR_ERR(reset) == -EPROBE_DEFER)
257 return PTR_ERR(reset);
258 uphy->reset = NULL;
259 }
260
261 uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
262 &qcom_usb_hs_phy_ops);
263 if (IS_ERR(uphy->phy))
264 return PTR_ERR(uphy->phy);
265
266 uphy->vbus_edev = extcon_get_edev_by_phandle(&ulpi->dev, 0);
267 if (IS_ERR(uphy->vbus_edev)) {
268 if (PTR_ERR(uphy->vbus_edev) != -ENODEV)
269 return PTR_ERR(uphy->vbus_edev);
270 uphy->vbus_edev = NULL;
271 }
272
273 uphy->vbus_notify.notifier_call = qcom_usb_hs_phy_vbus_notifier;
274 phy_set_drvdata(uphy->phy, uphy);
275
276 p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
277 return PTR_ERR_OR_ZERO(p);
278}
279
280static const struct of_device_id qcom_usb_hs_phy_match[] = {
281 { .compatible = "qcom,usb-hs-phy", },
282 { }
283};
284MODULE_DEVICE_TABLE(of, qcom_usb_hs_phy_match);
285
286static struct ulpi_driver qcom_usb_hs_phy_driver = {
287 .probe = qcom_usb_hs_phy_probe,
288 .driver = {
289 .name = "qcom_usb_hs_phy",
290 .of_match_table = qcom_usb_hs_phy_match,
291 },
292};
293module_ulpi_driver(qcom_usb_hs_phy_driver);
294
295MODULE_DESCRIPTION("Qualcomm USB HS phy");
296MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index 000000000000..47690f9945b9
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,160 @@
1/**
2 * Copyright (C) 2016 Linaro Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/module.h>
9#include <linux/ulpi/driver.h>
10#include <linux/ulpi/regs.h>
11#include <linux/pinctrl/consumer.h>
12#include <linux/pinctrl/pinctrl-state.h>
13#include <linux/delay.h>
14#include <linux/clk.h>
15
16#include "ulpi_phy.h"
17
18#define ULPI_HSIC_CFG 0x30
19#define ULPI_HSIC_IO_CAL 0x33
20
21struct qcom_usb_hsic_phy {
22 struct ulpi *ulpi;
23 struct phy *phy;
24 struct pinctrl *pctl;
25 struct clk *phy_clk;
26 struct clk *cal_clk;
27 struct clk *cal_sleep_clk;
28};
29
30static int qcom_usb_hsic_phy_power_on(struct phy *phy)
31{
32 struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
33 struct ulpi *ulpi = uphy->ulpi;
34 struct pinctrl_state *pins_default;
35 int ret;
36
37 ret = clk_prepare_enable(uphy->phy_clk);
38 if (ret)
39 return ret;
40
41 ret = clk_prepare_enable(uphy->cal_clk);
42 if (ret)
43 goto err_cal;
44
45 ret = clk_prepare_enable(uphy->cal_sleep_clk);
46 if (ret)
47 goto err_sleep;
48
49 /* Set periodic calibration interval to ~2.048sec in HSIC_IO_CAL_REG */
50 ret = ulpi_write(ulpi, ULPI_HSIC_IO_CAL, 0xff);
51 if (ret)
52 goto err_ulpi;
53
54 /* Enable periodic IO calibration in HSIC_CFG register */
55 ret = ulpi_write(ulpi, ULPI_HSIC_CFG, 0xa8);
56 if (ret)
57 goto err_ulpi;
58
59 /* Configure pins for HSIC functionality */
60 pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT);
61 if (IS_ERR(pins_default))
62 return PTR_ERR(pins_default);
63
64 ret = pinctrl_select_state(uphy->pctl, pins_default);
65 if (ret)
66 goto err_ulpi;
67
68 /* Enable HSIC mode in HSIC_CFG register */
69 ret = ulpi_write(ulpi, ULPI_SET(ULPI_HSIC_CFG), 0x01);
70 if (ret)
71 goto err_ulpi;
72
73 /* Disable auto-resume */
74 ret = ulpi_write(ulpi, ULPI_CLR(ULPI_IFC_CTRL),
75 ULPI_IFC_CTRL_AUTORESUME);
76 if (ret)
77 goto err_ulpi;
78
79 return ret;
80err_ulpi:
81 clk_disable_unprepare(uphy->cal_sleep_clk);
82err_sleep:
83 clk_disable_unprepare(uphy->cal_clk);
84err_cal:
85 clk_disable_unprepare(uphy->phy_clk);
86 return ret;
87}
88
89static int qcom_usb_hsic_phy_power_off(struct phy *phy)
90{
91 struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
92
93 clk_disable_unprepare(uphy->cal_sleep_clk);
94 clk_disable_unprepare(uphy->cal_clk);
95 clk_disable_unprepare(uphy->phy_clk);
96
97 return 0;
98}
99
100static const struct phy_ops qcom_usb_hsic_phy_ops = {
101 .power_on = qcom_usb_hsic_phy_power_on,
102 .power_off = qcom_usb_hsic_phy_power_off,
103 .owner = THIS_MODULE,
104};
105
106static int qcom_usb_hsic_phy_probe(struct ulpi *ulpi)
107{
108 struct qcom_usb_hsic_phy *uphy;
109 struct phy_provider *p;
110 struct clk *clk;
111
112 uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
113 if (!uphy)
114 return -ENOMEM;
115 ulpi_set_drvdata(ulpi, uphy);
116
117 uphy->ulpi = ulpi;
118 uphy->pctl = devm_pinctrl_get(&ulpi->dev);
119 if (IS_ERR(uphy->pctl))
120 return PTR_ERR(uphy->pctl);
121
122 uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy");
123 if (IS_ERR(clk))
124 return PTR_ERR(clk);
125
126 uphy->cal_clk = clk = devm_clk_get(&ulpi->dev, "cal");
127 if (IS_ERR(clk))
128 return PTR_ERR(clk);
129
130 uphy->cal_sleep_clk = clk = devm_clk_get(&ulpi->dev, "cal_sleep");
131 if (IS_ERR(clk))
132 return PTR_ERR(clk);
133
134 uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
135 &qcom_usb_hsic_phy_ops);
136 if (IS_ERR(uphy->phy))
137 return PTR_ERR(uphy->phy);
138 phy_set_drvdata(uphy->phy, uphy);
139
140 p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
141 return PTR_ERR_OR_ZERO(p);
142}
143
144static const struct of_device_id qcom_usb_hsic_phy_match[] = {
145 { .compatible = "qcom,usb-hsic-phy", },
146 { }
147};
148MODULE_DEVICE_TABLE(of, qcom_usb_hsic_phy_match);
149
150static struct ulpi_driver qcom_usb_hsic_phy_driver = {
151 .probe = qcom_usb_hsic_phy_probe,
152 .driver = {
153 .name = "qcom_usb_hsic_phy",
154 .of_match_table = qcom_usb_hsic_phy_match,
155 },
156};
157module_ulpi_driver(qcom_usb_hsic_phy_driver);
158
159MODULE_DESCRIPTION("Qualcomm USB HSIC phy");
160MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-rcar-gen3-usb2.c b/drivers/phy/phy-rcar-gen3-usb2.c
index c63da1b955c1..afb4d048d3e9 100644
--- a/drivers/phy/phy-rcar-gen3-usb2.c
+++ b/drivers/phy/phy-rcar-gen3-usb2.c
@@ -94,11 +94,11 @@ static void rcar_gen3_phy_usb2_work(struct work_struct *work)
94 work); 94 work);
95 95
96 if (ch->extcon_host) { 96 if (ch->extcon_host) {
97 extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, true); 97 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
98 extcon_set_cable_state_(ch->extcon, EXTCON_USB, false); 98 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
99 } else { 99 } else {
100 extcon_set_cable_state_(ch->extcon, EXTCON_USB_HOST, false); 100 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
101 extcon_set_cable_state_(ch->extcon, EXTCON_USB, true); 101 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
102 } 102 }
103} 103}
104 104
@@ -350,7 +350,7 @@ static int rcar_gen3_phy_usb2_power_off(struct phy *p)
350 return ret; 350 return ret;
351} 351}
352 352
353static struct phy_ops rcar_gen3_phy_usb2_ops = { 353static const struct phy_ops rcar_gen3_phy_usb2_ops = {
354 .init = rcar_gen3_phy_usb2_init, 354 .init = rcar_gen3_phy_usb2_init,
355 .exit = rcar_gen3_phy_usb2_exit, 355 .exit = rcar_gen3_phy_usb2_exit,
356 .power_on = rcar_gen3_phy_usb2_power_on, 356 .power_on = rcar_gen3_phy_usb2_power_on,
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 2f99ec95079c..4ea95c28a66f 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -595,9 +595,14 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
595 if (rport->vbus_attached != vbus_attach) { 595 if (rport->vbus_attached != vbus_attach) {
596 rport->vbus_attached = vbus_attach; 596 rport->vbus_attached = vbus_attach;
597 597
598 if (notify_charger && rphy->edev) 598 if (notify_charger && rphy->edev) {
599 extcon_set_cable_state_(rphy->edev, 599 extcon_set_cable_state_(rphy->edev,
600 cable, vbus_attach); 600 cable, vbus_attach);
601 if (cable == EXTCON_CHG_USB_SDP)
602 extcon_set_state_sync(rphy->edev,
603 EXTCON_USB,
604 vbus_attach);
605 }
601 } 606 }
602 break; 607 break;
603 case OTG_STATE_B_PERIPHERAL: 608 case OTG_STATE_B_PERIPHERAL:
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index bf28a0fdd569..a21b5f24a340 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -99,6 +99,7 @@ enum sun4i_usb_phy_type {
99 sun6i_a31_phy, 99 sun6i_a31_phy,
100 sun8i_a33_phy, 100 sun8i_a33_phy,
101 sun8i_h3_phy, 101 sun8i_h3_phy,
102 sun8i_v3s_phy,
102 sun50i_a64_phy, 103 sun50i_a64_phy,
103}; 104};
104 105
@@ -188,7 +189,8 @@ static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
188 spin_lock_irqsave(&phy_data->reg_lock, flags); 189 spin_lock_irqsave(&phy_data->reg_lock, flags);
189 190
190 if (phy_data->cfg->type == sun8i_a33_phy || 191 if (phy_data->cfg->type == sun8i_a33_phy ||
191 phy_data->cfg->type == sun50i_a64_phy) { 192 phy_data->cfg->type == sun50i_a64_phy ||
193 phy_data->cfg->type == sun8i_v3s_phy) {
192 /* A33 or A64 needs us to set phyctl to 0 explicitly */ 194 /* A33 or A64 needs us to set phyctl to 0 explicitly */
193 writel(0, phyctl); 195 writel(0, phyctl);
194 } 196 }
@@ -534,7 +536,7 @@ static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
534 mutex_unlock(&phy0->mutex); 536 mutex_unlock(&phy0->mutex);
535 537
536 if (id_notify) { 538 if (id_notify) {
537 extcon_set_cable_state_(data->extcon, EXTCON_USB_HOST, 539 extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
538 !id_det); 540 !id_det);
539 /* When leaving host mode force end the session here */ 541 /* When leaving host mode force end the session here */
540 if (force_session_end && id_det == 1) { 542 if (force_session_end && id_det == 1) {
@@ -547,7 +549,7 @@ static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
547 } 549 }
548 550
549 if (vbus_notify) 551 if (vbus_notify)
550 extcon_set_cable_state_(data->extcon, EXTCON_USB, vbus_det); 552 extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
551 553
552 if (sun4i_usb_phy0_poll(data)) 554 if (sun4i_usb_phy0_poll(data))
553 queue_delayed_work(system_wq, &data->detect, POLL_TIME); 555 queue_delayed_work(system_wq, &data->detect, POLL_TIME);
@@ -825,6 +827,15 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
825 .enable_pmu_unk1 = true, 827 .enable_pmu_unk1 = true,
826}; 828};
827 829
830static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
831 .num_phys = 1,
832 .type = sun8i_v3s_phy,
833 .disc_thresh = 3,
834 .phyctl_offset = REG_PHYCTL_A33,
835 .dedicated_clocks = true,
836 .enable_pmu_unk1 = true,
837};
838
828static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = { 839static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
829 .num_phys = 2, 840 .num_phys = 2,
830 .type = sun50i_a64_phy, 841 .type = sun50i_a64_phy,
@@ -842,6 +853,7 @@ static const struct of_device_id sun4i_usb_phy_of_match[] = {
842 { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg }, 853 { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
843 { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg }, 854 { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
844 { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg }, 855 { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
856 { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
845 { .compatible = "allwinner,sun50i-a64-usb-phy", 857 { .compatible = "allwinner,sun50i-a64-usb-phy",
846 .data = &sun50i_a64_cfg}, 858 .data = &sun50i_a64_cfg},
847 { }, 859 { },
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 5e5b9eb7ebf6..fc96f5cdcb5c 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -2,6 +2,7 @@ config USB_CHIPIDEA
2 tristate "ChipIdea Highspeed Dual Role Controller" 2 tristate "ChipIdea Highspeed Dual Role Controller"
3 depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA 3 depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
4 select EXTCON 4 select EXTCON
5 select RESET_CONTROLLER
5 help 6 help
6 Say Y here if your system has a dual role high speed USB 7 Say Y here if your system has a dual role high speed USB
7 controller based on ChipIdea silicon IP. It supports: 8 controller based on ChipIdea silicon IP. It supports:
@@ -38,4 +39,11 @@ config USB_CHIPIDEA_HOST
38 Say Y here to enable host controller functionality of the 39 Say Y here to enable host controller functionality of the
39 ChipIdea driver. 40 ChipIdea driver.
40 41
42config USB_CHIPIDEA_ULPI
43 bool "ChipIdea ULPI PHY support"
44 depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
45 help
46 Say Y here if you have a ULPI PHY attached to your ChipIdea
47 controller.
48
41endif 49endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 518e445476c3..39fca5715ed3 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -4,6 +4,7 @@ ci_hdrc-y := core.o otg.o debug.o
4ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o 4ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
5ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST) += host.o 5ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST) += host.o
6ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o 6ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
7ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI) += ulpi.o
7 8
8# Glue/Bridge layers go here 9# Glue/Bridge layers go here
9 10
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index cd414559040f..59e22389c10b 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -18,6 +18,8 @@
18#include <linux/usb.h> 18#include <linux/usb.h>
19#include <linux/usb/gadget.h> 19#include <linux/usb/gadget.h>
20#include <linux/usb/otg-fsm.h> 20#include <linux/usb/otg-fsm.h>
21#include <linux/usb/otg.h>
22#include <linux/ulpi/interface.h>
21 23
22/****************************************************************************** 24/******************************************************************************
23 * DEFINE 25 * DEFINE
@@ -52,6 +54,7 @@ enum ci_hw_regs {
52 OP_ENDPTLISTADDR, 54 OP_ENDPTLISTADDR,
53 OP_TTCTRL, 55 OP_TTCTRL,
54 OP_BURSTSIZE, 56 OP_BURSTSIZE,
57 OP_ULPI_VIEWPORT,
55 OP_PORTSC, 58 OP_PORTSC,
56 OP_DEVLC, 59 OP_DEVLC,
57 OP_OTGSC, 60 OP_OTGSC,
@@ -187,6 +190,8 @@ struct hw_bank {
187 * @test_mode: the selected test mode 190 * @test_mode: the selected test mode
188 * @platdata: platform specific information supplied by parent device 191 * @platdata: platform specific information supplied by parent device
189 * @vbus_active: is VBUS active 192 * @vbus_active: is VBUS active
193 * @ulpi: pointer to ULPI device, if any
194 * @ulpi_ops: ULPI read/write ops for this device
190 * @phy: pointer to PHY, if any 195 * @phy: pointer to PHY, if any
191 * @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework 196 * @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework
192 * @hcd: pointer to usb_hcd for ehci host driver 197 * @hcd: pointer to usb_hcd for ehci host driver
@@ -236,6 +241,10 @@ struct ci_hdrc {
236 241
237 struct ci_hdrc_platform_data *platdata; 242 struct ci_hdrc_platform_data *platdata;
238 int vbus_active; 243 int vbus_active;
244#ifdef CONFIG_USB_CHIPIDEA_ULPI
245 struct ulpi *ulpi;
246 struct ulpi_ops ulpi_ops;
247#endif
239 struct phy *phy; 248 struct phy *phy;
240 /* old usb_phy interface */ 249 /* old usb_phy interface */
241 struct usb_phy *usb_phy; 250 struct usb_phy *usb_phy;
@@ -418,6 +427,16 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
418#endif 427#endif
419} 428}
420 429
430#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
431int ci_ulpi_init(struct ci_hdrc *ci);
432void ci_ulpi_exit(struct ci_hdrc *ci);
433int ci_ulpi_resume(struct ci_hdrc *ci);
434#else
435static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
436static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
437static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
438#endif
439
421u32 hw_read_intr_enable(struct ci_hdrc *ci); 440u32 hw_read_intr_enable(struct ci_hdrc *ci);
422 441
423u32 hw_read_intr_status(struct ci_hdrc *ci); 442u32 hw_read_intr_status(struct ci_hdrc *ci);
@@ -428,8 +447,7 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
428 447
429u8 hw_port_test_get(struct ci_hdrc *ci); 448u8 hw_port_test_get(struct ci_hdrc *ci);
430 449
431int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask, 450void hw_phymode_configure(struct ci_hdrc *ci);
432 u32 value, unsigned int timeout_ms);
433 451
434void ci_platform_configure(struct ci_hdrc *ci); 452void ci_platform_configure(struct ci_hdrc *ci);
435 453
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c
index 3889809fd0c4..0bdfcdcbf7a5 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,90 +8,292 @@
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/pm_runtime.h> 10#include <linux/pm_runtime.h>
11#include <linux/usb/msm_hsusb_hw.h>
12#include <linux/usb/ulpi.h>
13#include <linux/usb/gadget.h>
14#include <linux/usb/chipidea.h> 11#include <linux/usb/chipidea.h>
12#include <linux/clk.h>
13#include <linux/reset.h>
14#include <linux/mfd/syscon.h>
15#include <linux/regmap.h>
16#include <linux/io.h>
17#include <linux/reset-controller.h>
18#include <linux/extcon.h>
19#include <linux/of.h>
15 20
16#include "ci.h" 21#include "ci.h"
17 22
18#define MSM_USB_BASE (ci->hw_bank.abs) 23#define HS_PHY_AHB_MODE 0x0098
19 24
20static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) 25#define HS_PHY_GENCONFIG 0x009c
26#define HS_PHY_TXFIFO_IDLE_FORCE_DIS BIT(4)
27
28#define HS_PHY_GENCONFIG_2 0x00a0
29#define HS_PHY_SESS_VLD_CTRL_EN BIT(7)
30#define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX BIT(19)
31
32#define HSPHY_SESS_VLD_CTRL BIT(25)
33
34/* Vendor base starts at 0x200 beyond CI base */
35#define HS_PHY_CTRL 0x0040
36#define HS_PHY_SEC_CTRL 0x0078
37#define HS_PHY_DIG_CLAMP_N BIT(16)
38#define HS_PHY_POR_ASSERT BIT(0)
39
40struct ci_hdrc_msm {
41 struct platform_device *ci;
42 struct clk *core_clk;
43 struct clk *iface_clk;
44 struct clk *fs_clk;
45 struct ci_hdrc_platform_data pdata;
46 struct reset_controller_dev rcdev;
47 bool secondary_phy;
48 bool hsic;
49 void __iomem *base;
50};
51
52static int
53ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
21{ 54{
22 struct device *dev = ci->gadget.dev.parent; 55 struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev);
56 void __iomem *addr = ci_msm->base;
57 u32 val;
58
59 if (id)
60 addr += HS_PHY_SEC_CTRL;
61 else
62 addr += HS_PHY_CTRL;
63
64 val = readl_relaxed(addr);
65 val |= HS_PHY_POR_ASSERT;
66 writel(val, addr);
67 /*
68 * wait for minimum 10 microseconds as suggested by manual.
69 * Use a slightly larger value since the exact value didn't
70 * work 100% of the time.
71 */
72 udelay(12);
73 val &= ~HS_PHY_POR_ASSERT;
74 writel(val, addr);
75
76 return 0;
77}
78
79static const struct reset_control_ops ci_hdrc_msm_reset_ops = {
80 .reset = ci_hdrc_msm_por_reset,
81};
82
83static int ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
84{
85 struct device *dev = ci->dev->parent;
86 struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
87 int ret;
23 88
24 switch (event) { 89 switch (event) {
25 case CI_HDRC_CONTROLLER_RESET_EVENT: 90 case CI_HDRC_CONTROLLER_RESET_EVENT:
26 dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n"); 91 dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
27 writel(0, USB_AHBBURST); 92
93 hw_phymode_configure(ci);
94 if (msm_ci->secondary_phy) {
95 u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
96 val |= HS_PHY_DIG_CLAMP_N;
97 writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL);
98 }
99
100 ret = phy_init(ci->phy);
101 if (ret)
102 return ret;
103
104 ret = phy_power_on(ci->phy);
105 if (ret) {
106 phy_exit(ci->phy);
107 return ret;
108 }
109
28 /* use AHB transactor, allow posted data writes */ 110 /* use AHB transactor, allow posted data writes */
29 writel(0x8, USB_AHBMODE); 111 hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0xffffffff, 0x8);
30 usb_phy_init(ci->usb_phy); 112
113 /* workaround for rx buffer collision issue */
114 hw_write_id_reg(ci, HS_PHY_GENCONFIG,
115 HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0);
116
117 if (!msm_ci->hsic)
118 hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
119 HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
120
121 if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {
122 hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
123 HS_PHY_SESS_VLD_CTRL_EN,
124 HS_PHY_SESS_VLD_CTRL_EN);
125 hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL,
126 HSPHY_SESS_VLD_CTRL);
127
128 }
31 break; 129 break;
32 case CI_HDRC_CONTROLLER_STOPPED_EVENT: 130 case CI_HDRC_CONTROLLER_STOPPED_EVENT:
33 dev_dbg(dev, "CI_HDRC_CONTROLLER_STOPPED_EVENT received\n"); 131 dev_dbg(dev, "CI_HDRC_CONTROLLER_STOPPED_EVENT received\n");
34 /* 132 phy_power_off(ci->phy);
35 * Put the phy in non-driving mode. Otherwise host 133 phy_exit(ci->phy);
36 * may not detect soft-disconnection.
37 */
38 usb_phy_notify_disconnect(ci->usb_phy, USB_SPEED_UNKNOWN);
39 break; 134 break;
40 default: 135 default:
41 dev_dbg(dev, "unknown ci_hdrc event\n"); 136 dev_dbg(dev, "unknown ci_hdrc event\n");
42 break; 137 break;
43 } 138 }
139
140 return 0;
44} 141}
45 142
46static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = { 143static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
47 .name = "ci_hdrc_msm", 144 struct platform_device *pdev)
48 .capoffset = DEF_CAPOFFSET, 145{
49 .flags = CI_HDRC_REGS_SHARED | 146 struct regmap *regmap;
50 CI_HDRC_DISABLE_STREAMING, 147 struct device *dev = &pdev->dev;
148 struct of_phandle_args args;
149 u32 val;
150 int ret;
51 151
52 .notify_event = ci_hdrc_msm_notify_event, 152 ret = of_parse_phandle_with_fixed_args(dev->of_node, "phy-select", 2, 0,
53}; 153 &args);
154 if (ret)
155 return 0;
156
157 regmap = syscon_node_to_regmap(args.np);
158 of_node_put(args.np);
159 if (IS_ERR(regmap))
160 return PTR_ERR(regmap);
161
162 ret = regmap_write(regmap, args.args[0], args.args[1]);
163 if (ret)
164 return ret;
165
166 ci->secondary_phy = !!args.args[1];
167 if (ci->secondary_phy) {
168 val = readl_relaxed(ci->base + HS_PHY_SEC_CTRL);
169 val |= HS_PHY_DIG_CLAMP_N;
170 writel_relaxed(val, ci->base + HS_PHY_SEC_CTRL);
171 }
172
173 return 0;
174}
54 175
55static int ci_hdrc_msm_probe(struct platform_device *pdev) 176static int ci_hdrc_msm_probe(struct platform_device *pdev)
56{ 177{
178 struct ci_hdrc_msm *ci;
57 struct platform_device *plat_ci; 179 struct platform_device *plat_ci;
58 struct usb_phy *phy; 180 struct clk *clk;
181 struct reset_control *reset;
182 struct resource *res;
183 int ret;
184 struct device_node *ulpi_node, *phy_node;
59 185
60 dev_dbg(&pdev->dev, "ci_hdrc_msm_probe\n"); 186 dev_dbg(&pdev->dev, "ci_hdrc_msm_probe\n");
61 187
62 /* 188 ci = devm_kzalloc(&pdev->dev, sizeof(*ci), GFP_KERNEL);
63 * OTG(PHY) driver takes care of PHY initialization, clock management, 189 if (!ci)
64 * powering up VBUS, mapping of registers address space and power 190 return -ENOMEM;
65 * management. 191 platform_set_drvdata(pdev, ci);
66 */ 192
67 phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); 193 ci->pdata.name = "ci_hdrc_msm";
68 if (IS_ERR(phy)) 194 ci->pdata.capoffset = DEF_CAPOFFSET;
69 return PTR_ERR(phy); 195 ci->pdata.flags = CI_HDRC_REGS_SHARED | CI_HDRC_DISABLE_STREAMING |
196 CI_HDRC_OVERRIDE_AHB_BURST |
197 CI_HDRC_OVERRIDE_PHY_CONTROL;
198 ci->pdata.notify_event = ci_hdrc_msm_notify_event;
199
200 reset = devm_reset_control_get(&pdev->dev, "core");
201 if (IS_ERR(reset))
202 return PTR_ERR(reset);
203
204 ci->core_clk = clk = devm_clk_get(&pdev->dev, "core");
205 if (IS_ERR(clk))
206 return PTR_ERR(clk);
70 207
71 ci_hdrc_msm_platdata.usb_phy = phy; 208 ci->iface_clk = clk = devm_clk_get(&pdev->dev, "iface");
209 if (IS_ERR(clk))
210 return PTR_ERR(clk);
72 211
73 plat_ci = ci_hdrc_add_device(&pdev->dev, 212 ci->fs_clk = clk = devm_clk_get(&pdev->dev, "fs");
74 pdev->resource, pdev->num_resources, 213 if (IS_ERR(clk)) {
75 &ci_hdrc_msm_platdata); 214 if (PTR_ERR(clk) == -EPROBE_DEFER)
215 return -EPROBE_DEFER;
216 ci->fs_clk = NULL;
217 }
218
219 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
220 ci->base = devm_ioremap_resource(&pdev->dev, res);
221 if (IS_ERR(ci->base))
222 return PTR_ERR(ci->base);
223
224 ci->rcdev.owner = THIS_MODULE;
225 ci->rcdev.ops = &ci_hdrc_msm_reset_ops;
226 ci->rcdev.of_node = pdev->dev.of_node;
227 ci->rcdev.nr_resets = 2;
228 ret = reset_controller_register(&ci->rcdev);
229 if (ret)
230 return ret;
231
232 ret = clk_prepare_enable(ci->fs_clk);
233 if (ret)
234 goto err_fs;
235
236 reset_control_assert(reset);
237 usleep_range(10000, 12000);
238 reset_control_deassert(reset);
239
240 clk_disable_unprepare(ci->fs_clk);
241
242 ret = clk_prepare_enable(ci->core_clk);
243 if (ret)
244 goto err_fs;
245
246 ret = clk_prepare_enable(ci->iface_clk);
247 if (ret)
248 goto err_iface;
249
250 ret = ci_hdrc_msm_mux_phy(ci, pdev);
251 if (ret)
252 goto err_mux;
253
254 ulpi_node = of_find_node_by_name(pdev->dev.of_node, "ulpi");
255 if (ulpi_node) {
256 phy_node = of_get_next_available_child(ulpi_node, NULL);
257 ci->hsic = of_device_is_compatible(phy_node, "qcom,usb-hsic-phy");
258 of_node_put(phy_node);
259 }
260 of_node_put(ulpi_node);
261
262 plat_ci = ci_hdrc_add_device(&pdev->dev, pdev->resource,
263 pdev->num_resources, &ci->pdata);
76 if (IS_ERR(plat_ci)) { 264 if (IS_ERR(plat_ci)) {
77 dev_err(&pdev->dev, "ci_hdrc_add_device failed!\n"); 265 ret = PTR_ERR(plat_ci);
78 return PTR_ERR(plat_ci); 266 if (ret != -EPROBE_DEFER)
267 dev_err(&pdev->dev, "ci_hdrc_add_device failed!\n");
268 goto err_mux;
79 } 269 }
80 270
81 platform_set_drvdata(pdev, plat_ci); 271 ci->ci = plat_ci;
82 272
273 pm_runtime_set_active(&pdev->dev);
83 pm_runtime_no_callbacks(&pdev->dev); 274 pm_runtime_no_callbacks(&pdev->dev);
84 pm_runtime_enable(&pdev->dev); 275 pm_runtime_enable(&pdev->dev);
85 276
86 return 0; 277 return 0;
278
279err_mux:
280 clk_disable_unprepare(ci->iface_clk);
281err_iface:
282 clk_disable_unprepare(ci->core_clk);
283err_fs:
284 reset_controller_unregister(&ci->rcdev);
285 return ret;
87} 286}
88 287
89static int ci_hdrc_msm_remove(struct platform_device *pdev) 288static int ci_hdrc_msm_remove(struct platform_device *pdev)
90{ 289{
91 struct platform_device *plat_ci = platform_get_drvdata(pdev); 290 struct ci_hdrc_msm *ci = platform_get_drvdata(pdev);
92 291
93 pm_runtime_disable(&pdev->dev); 292 pm_runtime_disable(&pdev->dev);
94 ci_hdrc_remove_device(plat_ci); 293 ci_hdrc_remove_device(ci->ci);
294 clk_disable_unprepare(ci->iface_clk);
295 clk_disable_unprepare(ci->core_clk);
296 reset_controller_unregister(&ci->rcdev);
95 297
96 return 0; 298 return 0;
97} 299}
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 4456d2cf80ff..d162cc0bb8ce 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -74,10 +74,6 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
74 } 74 }
75 } 75 }
76 76
77 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
78 if (ret)
79 goto clk_err;
80
81 ci_pdata->name = dev_name(dev); 77 ci_pdata->name = dev_name(dev);
82 78
83 priv->ci_pdev = ci_hdrc_add_device(dev, pdev->resource, 79 priv->ci_pdev = ci_hdrc_add_device(dev, pdev->resource,
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 3dbb4a21ab44..79ad8e91632e 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -62,7 +62,6 @@
62#include <linux/usb/chipidea.h> 62#include <linux/usb/chipidea.h>
63#include <linux/usb/of.h> 63#include <linux/usb/of.h>
64#include <linux/of.h> 64#include <linux/of.h>
65#include <linux/phy.h>
66#include <linux/regulator/consumer.h> 65#include <linux/regulator/consumer.h>
67#include <linux/usb/ehci_def.h> 66#include <linux/usb/ehci_def.h>
68 67
@@ -86,6 +85,7 @@ static const u8 ci_regs_nolpm[] = {
86 [OP_ENDPTLISTADDR] = 0x18U, 85 [OP_ENDPTLISTADDR] = 0x18U,
87 [OP_TTCTRL] = 0x1CU, 86 [OP_TTCTRL] = 0x1CU,
88 [OP_BURSTSIZE] = 0x20U, 87 [OP_BURSTSIZE] = 0x20U,
88 [OP_ULPI_VIEWPORT] = 0x30U,
89 [OP_PORTSC] = 0x44U, 89 [OP_PORTSC] = 0x44U,
90 [OP_DEVLC] = 0x84U, 90 [OP_DEVLC] = 0x84U,
91 [OP_OTGSC] = 0x64U, 91 [OP_OTGSC] = 0x64U,
@@ -110,6 +110,7 @@ static const u8 ci_regs_lpm[] = {
110 [OP_ENDPTLISTADDR] = 0x18U, 110 [OP_ENDPTLISTADDR] = 0x18U,
111 [OP_TTCTRL] = 0x1CU, 111 [OP_TTCTRL] = 0x1CU,
112 [OP_BURSTSIZE] = 0x20U, 112 [OP_BURSTSIZE] = 0x20U,
113 [OP_ULPI_VIEWPORT] = 0x30U,
113 [OP_PORTSC] = 0x44U, 114 [OP_PORTSC] = 0x44U,
114 [OP_DEVLC] = 0x84U, 115 [OP_DEVLC] = 0x84U,
115 [OP_OTGSC] = 0xC4U, 116 [OP_OTGSC] = 0xC4U,
@@ -285,7 +286,7 @@ static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
285 return 0; 286 return 0;
286} 287}
287 288
288static void hw_phymode_configure(struct ci_hdrc *ci) 289void hw_phymode_configure(struct ci_hdrc *ci)
289{ 290{
290 u32 portsc, lpm, sts = 0; 291 u32 portsc, lpm, sts = 0;
291 292
@@ -325,6 +326,7 @@ static void hw_phymode_configure(struct ci_hdrc *ci)
325 hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS); 326 hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
326 } 327 }
327} 328}
329EXPORT_SYMBOL_GPL(hw_phymode_configure);
328 330
329/** 331/**
330 * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy 332 * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
@@ -361,6 +363,9 @@ static int _ci_usb_phy_init(struct ci_hdrc *ci)
361 */ 363 */
362static void ci_usb_phy_exit(struct ci_hdrc *ci) 364static void ci_usb_phy_exit(struct ci_hdrc *ci)
363{ 365{
366 if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
367 return;
368
364 if (ci->phy) { 369 if (ci->phy) {
365 phy_power_off(ci->phy); 370 phy_power_off(ci->phy);
366 phy_exit(ci->phy); 371 phy_exit(ci->phy);
@@ -379,6 +384,9 @@ static int ci_usb_phy_init(struct ci_hdrc *ci)
379{ 384{
380 int ret; 385 int ret;
381 386
387 if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
388 return 0;
389
382 switch (ci->platdata->phy_mode) { 390 switch (ci->platdata->phy_mode) {
383 case USBPHY_INTERFACE_MODE_UTMI: 391 case USBPHY_INTERFACE_MODE_UTMI:
384 case USBPHY_INTERFACE_MODE_UTMIW: 392 case USBPHY_INTERFACE_MODE_UTMIW:
@@ -419,13 +427,21 @@ void ci_platform_configure(struct ci_hdrc *ci)
419 is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC; 427 is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
420 is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC; 428 is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
421 429
422 if (is_device_mode && 430 if (is_device_mode) {
423 (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)) 431 phy_set_mode(ci->phy, PHY_MODE_USB_DEVICE);
424 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS); 432
433 if (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)
434 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
435 USBMODE_CI_SDIS);
436 }
437
438 if (is_host_mode) {
439 phy_set_mode(ci->phy, PHY_MODE_USB_HOST);
425 440
426 if (is_host_mode && 441 if (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)
427 (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)) 442 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
428 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS); 443 USBMODE_CI_SDIS);
444 }
429 445
430 if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) { 446 if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
431 if (ci->hw_bank.lpm) 447 if (ci->hw_bank.lpm)
@@ -495,9 +511,12 @@ int hw_device_reset(struct ci_hdrc *ci)
495 return ret; 511 return ret;
496 } 512 }
497 513
498 if (ci->platdata->notify_event) 514 if (ci->platdata->notify_event) {
499 ci->platdata->notify_event(ci, 515 ret = ci->platdata->notify_event(ci,
500 CI_HDRC_CONTROLLER_RESET_EVENT); 516 CI_HDRC_CONTROLLER_RESET_EVENT);
517 if (ret)
518 return ret;
519 }
501 520
502 /* USBMODE should be configured step by step */ 521 /* USBMODE should be configured step by step */
503 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE); 522 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
@@ -516,38 +535,6 @@ int hw_device_reset(struct ci_hdrc *ci)
516 return 0; 535 return 0;
517} 536}
518 537
519/**
520 * hw_wait_reg: wait the register value
521 *
522 * Sometimes, it needs to wait register value before going on.
523 * Eg, when switch to device mode, the vbus value should be lower
524 * than OTGSC_BSV before connects to host.
525 *
526 * @ci: the controller
527 * @reg: register index
528 * @mask: mast bit
529 * @value: the bit value to wait
530 * @timeout_ms: timeout in millisecond
531 *
532 * This function returns an error code if timeout
533 */
534int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
535 u32 value, unsigned int timeout_ms)
536{
537 unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms);
538
539 while (hw_read(ci, reg, mask) != value) {
540 if (time_after(jiffies, elapse)) {
541 dev_err(ci->dev, "timeout waiting for %08x in %d\n",
542 mask, reg);
543 return -ETIMEDOUT;
544 }
545 msleep(20);
546 }
547
548 return 0;
549}
550
551static irqreturn_t ci_irq(int irq, void *data) 538static irqreturn_t ci_irq(int irq, void *data)
552{ 539{
553 struct ci_hdrc *ci = data; 540 struct ci_hdrc *ci = data;
@@ -601,35 +588,14 @@ static irqreturn_t ci_irq(int irq, void *data)
601 return ret; 588 return ret;
602} 589}
603 590
604static int ci_vbus_notifier(struct notifier_block *nb, unsigned long event, 591static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
605 void *ptr) 592 void *ptr)
606{
607 struct ci_hdrc_cable *vbus = container_of(nb, struct ci_hdrc_cable, nb);
608 struct ci_hdrc *ci = vbus->ci;
609
610 if (event)
611 vbus->state = true;
612 else
613 vbus->state = false;
614
615 vbus->changed = true;
616
617 ci_irq(ci->irq, ci);
618 return NOTIFY_DONE;
619}
620
621static int ci_id_notifier(struct notifier_block *nb, unsigned long event,
622 void *ptr)
623{ 593{
624 struct ci_hdrc_cable *id = container_of(nb, struct ci_hdrc_cable, nb); 594 struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
625 struct ci_hdrc *ci = id->ci; 595 struct ci_hdrc *ci = cbl->ci;
626 596
627 if (event) 597 cbl->connected = event;
628 id->state = false; 598 cbl->changed = true;
629 else
630 id->state = true;
631
632 id->changed = true;
633 599
634 ci_irq(ci->irq, ci); 600 ci_irq(ci->irq, ci);
635 return NOTIFY_DONE; 601 return NOTIFY_DONE;
@@ -738,27 +704,27 @@ static int ci_get_platdata(struct device *dev,
738 } 704 }
739 705
740 cable = &platdata->vbus_extcon; 706 cable = &platdata->vbus_extcon;
741 cable->nb.notifier_call = ci_vbus_notifier; 707 cable->nb.notifier_call = ci_cable_notifier;
742 cable->edev = ext_vbus; 708 cable->edev = ext_vbus;
743 709
744 if (!IS_ERR(ext_vbus)) { 710 if (!IS_ERR(ext_vbus)) {
745 ret = extcon_get_cable_state_(cable->edev, EXTCON_USB); 711 ret = extcon_get_state(cable->edev, EXTCON_USB);
746 if (ret) 712 if (ret)
747 cable->state = true; 713 cable->connected = true;
748 else 714 else
749 cable->state = false; 715 cable->connected = false;
750 } 716 }
751 717
752 cable = &platdata->id_extcon; 718 cable = &platdata->id_extcon;
753 cable->nb.notifier_call = ci_id_notifier; 719 cable->nb.notifier_call = ci_cable_notifier;
754 cable->edev = ext_id; 720 cable->edev = ext_id;
755 721
756 if (!IS_ERR(ext_id)) { 722 if (!IS_ERR(ext_id)) {
757 ret = extcon_get_cable_state_(cable->edev, EXTCON_USB_HOST); 723 ret = extcon_get_state(cable->edev, EXTCON_USB_HOST);
758 if (ret) 724 if (ret)
759 cable->state = false; 725 cable->connected = true;
760 else 726 else
761 cable->state = true; 727 cable->connected = false;
762 } 728 }
763 return 0; 729 return 0;
764} 730}
@@ -771,8 +737,8 @@ static int ci_extcon_register(struct ci_hdrc *ci)
771 id = &ci->platdata->id_extcon; 737 id = &ci->platdata->id_extcon;
772 id->ci = ci; 738 id->ci = ci;
773 if (!IS_ERR(id->edev)) { 739 if (!IS_ERR(id->edev)) {
774 ret = extcon_register_notifier(id->edev, EXTCON_USB_HOST, 740 ret = devm_extcon_register_notifier(ci->dev, id->edev,
775 &id->nb); 741 EXTCON_USB_HOST, &id->nb);
776 if (ret < 0) { 742 if (ret < 0) {
777 dev_err(ci->dev, "register ID failed\n"); 743 dev_err(ci->dev, "register ID failed\n");
778 return ret; 744 return ret;
@@ -782,11 +748,9 @@ static int ci_extcon_register(struct ci_hdrc *ci)
782 vbus = &ci->platdata->vbus_extcon; 748 vbus = &ci->platdata->vbus_extcon;
783 vbus->ci = ci; 749 vbus->ci = ci;
784 if (!IS_ERR(vbus->edev)) { 750 if (!IS_ERR(vbus->edev)) {
785 ret = extcon_register_notifier(vbus->edev, EXTCON_USB, 751 ret = devm_extcon_register_notifier(ci->dev, vbus->edev,
786 &vbus->nb); 752 EXTCON_USB, &vbus->nb);
787 if (ret < 0) { 753 if (ret < 0) {
788 extcon_unregister_notifier(id->edev, EXTCON_USB_HOST,
789 &id->nb);
790 dev_err(ci->dev, "register VBUS failed\n"); 754 dev_err(ci->dev, "register VBUS failed\n");
791 return ret; 755 return ret;
792 } 756 }
@@ -795,20 +759,6 @@ static int ci_extcon_register(struct ci_hdrc *ci)
795 return 0; 759 return 0;
796} 760}
797 761
798static void ci_extcon_unregister(struct ci_hdrc *ci)
799{
800 struct ci_hdrc_cable *cable;
801
802 cable = &ci->platdata->id_extcon;
803 if (!IS_ERR(cable->edev))
804 extcon_unregister_notifier(cable->edev, EXTCON_USB_HOST,
805 &cable->nb);
806
807 cable = &ci->platdata->vbus_extcon;
808 if (!IS_ERR(cable->edev))
809 extcon_unregister_notifier(cable->edev, EXTCON_USB, &cable->nb);
810}
811
812static DEFINE_IDA(ci_ida); 762static DEFINE_IDA(ci_ida);
813 763
814struct platform_device *ci_hdrc_add_device(struct device *dev, 764struct platform_device *ci_hdrc_add_device(struct device *dev,
@@ -921,6 +871,7 @@ static int ci_hdrc_probe(struct platform_device *pdev)
921 CI_HDRC_IMX28_WRITE_FIX); 871 CI_HDRC_IMX28_WRITE_FIX);
922 ci->supports_runtime_pm = !!(ci->platdata->flags & 872 ci->supports_runtime_pm = !!(ci->platdata->flags &
923 CI_HDRC_SUPPORTS_RUNTIME_PM); 873 CI_HDRC_SUPPORTS_RUNTIME_PM);
874 platform_set_drvdata(pdev, ci);
924 875
925 ret = hw_device_init(ci, base); 876 ret = hw_device_init(ci, base);
926 if (ret < 0) { 877 if (ret < 0) {
@@ -928,6 +879,10 @@ static int ci_hdrc_probe(struct platform_device *pdev)
928 return -ENODEV; 879 return -ENODEV;
929 } 880 }
930 881
882 ret = ci_ulpi_init(ci);
883 if (ret)
884 return ret;
885
931 if (ci->platdata->phy) { 886 if (ci->platdata->phy) {
932 ci->phy = ci->platdata->phy; 887 ci->phy = ci->platdata->phy;
933 } else if (ci->platdata->usb_phy) { 888 } else if (ci->platdata->usb_phy) {
@@ -938,11 +893,15 @@ static int ci_hdrc_probe(struct platform_device *pdev)
938 893
939 /* if both generic PHY and USB PHY layers aren't enabled */ 894 /* if both generic PHY and USB PHY layers aren't enabled */
940 if (PTR_ERR(ci->phy) == -ENOSYS && 895 if (PTR_ERR(ci->phy) == -ENOSYS &&
941 PTR_ERR(ci->usb_phy) == -ENXIO) 896 PTR_ERR(ci->usb_phy) == -ENXIO) {
942 return -ENXIO; 897 ret = -ENXIO;
898 goto ulpi_exit;
899 }
943 900
944 if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) 901 if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) {
945 return -EPROBE_DEFER; 902 ret = -EPROBE_DEFER;
903 goto ulpi_exit;
904 }
946 905
947 if (IS_ERR(ci->phy)) 906 if (IS_ERR(ci->phy))
948 ci->phy = NULL; 907 ci->phy = NULL;
@@ -1027,7 +986,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
1027 } 986 }
1028 } 987 }
1029 988
1030 platform_set_drvdata(pdev, ci);
1031 ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED, 989 ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED,
1032 ci->platdata->name, ci); 990 ci->platdata->name, ci);
1033 if (ret) 991 if (ret)
@@ -1054,11 +1012,12 @@ static int ci_hdrc_probe(struct platform_device *pdev)
1054 if (!ret) 1012 if (!ret)
1055 return 0; 1013 return 0;
1056 1014
1057 ci_extcon_unregister(ci);
1058stop: 1015stop:
1059 ci_role_destroy(ci); 1016 ci_role_destroy(ci);
1060deinit_phy: 1017deinit_phy:
1061 ci_usb_phy_exit(ci); 1018 ci_usb_phy_exit(ci);
1019ulpi_exit:
1020 ci_ulpi_exit(ci);
1062 1021
1063 return ret; 1022 return ret;
1064} 1023}
@@ -1074,10 +1033,10 @@ static int ci_hdrc_remove(struct platform_device *pdev)
1074 } 1033 }
1075 1034
1076 dbg_remove_files(ci); 1035 dbg_remove_files(ci);
1077 ci_extcon_unregister(ci);
1078 ci_role_destroy(ci); 1036 ci_role_destroy(ci);
1079 ci_hdrc_enter_lpm(ci, true); 1037 ci_hdrc_enter_lpm(ci, true);
1080 ci_usb_phy_exit(ci); 1038 ci_usb_phy_exit(ci);
1039 ci_ulpi_exit(ci);
1081 1040
1082 return 0; 1041 return 0;
1083} 1042}
@@ -1125,6 +1084,7 @@ static void ci_controller_suspend(struct ci_hdrc *ci)
1125static int ci_controller_resume(struct device *dev) 1084static int ci_controller_resume(struct device *dev)
1126{ 1085{
1127 struct ci_hdrc *ci = dev_get_drvdata(dev); 1086 struct ci_hdrc *ci = dev_get_drvdata(dev);
1087 int ret;
1128 1088
1129 dev_dbg(dev, "at %s\n", __func__); 1089 dev_dbg(dev, "at %s\n", __func__);
1130 1090
@@ -1134,6 +1094,11 @@ static int ci_controller_resume(struct device *dev)
1134 } 1094 }
1135 1095
1136 ci_hdrc_enter_lpm(ci, false); 1096 ci_hdrc_enter_lpm(ci, false);
1097
1098 ret = ci_ulpi_resume(ci);
1099 if (ret)
1100 return ret;
1101
1137 if (ci->usb_phy) { 1102 if (ci->usb_phy) {
1138 usb_phy_set_suspend(ci->usb_phy, 0); 1103 usb_phy_set_suspend(ci->usb_phy, 0);
1139 usb_phy_set_wakeup(ci->usb_phy, false); 1104 usb_phy_set_wakeup(ci->usb_phy, false);
diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 111b0e0b8698..915f3e91586e 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -90,6 +90,13 @@ static int ehci_ci_reset(struct usb_hcd *hcd)
90 90
91 ehci->need_io_watchdog = 0; 91 ehci->need_io_watchdog = 0;
92 92
93 if (ci->platdata->notify_event) {
94 ret = ci->platdata->notify_event(ci,
95 CI_HDRC_CONTROLLER_RESET_EVENT);
96 if (ret)
97 return ret;
98 }
99
93 ci_platform_configure(ci); 100 ci_platform_configure(ci);
94 101
95 return ret; 102 return ret;
@@ -187,6 +194,9 @@ static void host_stop(struct ci_hdrc *ci)
187 struct usb_hcd *hcd = ci->hcd; 194 struct usb_hcd *hcd = ci->hcd;
188 195
189 if (hcd) { 196 if (hcd) {
197 if (ci->platdata->notify_event)
198 ci->platdata->notify_event(ci,
199 CI_HDRC_CONTROLLER_STOPPED_EVENT);
190 usb_remove_hcd(hcd); 200 usb_remove_hcd(hcd);
191 ci->role = CI_ROLE_END; 201 ci->role = CI_ROLE_END;
192 synchronize_irq(ci->irq); 202 synchronize_irq(ci->irq);
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 03b6743461d1..10236fe71522 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -44,12 +44,15 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
44 else 44 else
45 val &= ~OTGSC_BSVIS; 45 val &= ~OTGSC_BSVIS;
46 46
47 cable->changed = false; 47 if (cable->connected)
48
49 if (cable->state)
50 val |= OTGSC_BSV; 48 val |= OTGSC_BSV;
51 else 49 else
52 val &= ~OTGSC_BSV; 50 val &= ~OTGSC_BSV;
51
52 if (cable->enabled)
53 val |= OTGSC_BSVIE;
54 else
55 val &= ~OTGSC_BSVIE;
53 } 56 }
54 57
55 cable = &ci->platdata->id_extcon; 58 cable = &ci->platdata->id_extcon;
@@ -59,15 +62,18 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
59 else 62 else
60 val &= ~OTGSC_IDIS; 63 val &= ~OTGSC_IDIS;
61 64
62 cable->changed = false; 65 if (cable->connected)
66 val &= ~OTGSC_ID; /* host */
67 else
68 val |= OTGSC_ID; /* device */
63 69
64 if (cable->state) 70 if (cable->enabled)
65 val |= OTGSC_ID; 71 val |= OTGSC_IDIE;
66 else 72 else
67 val &= ~OTGSC_ID; 73 val &= ~OTGSC_IDIE;
68 } 74 }
69 75
70 return val; 76 return val & mask;
71} 77}
72 78
73/** 79/**
@@ -77,6 +83,36 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
77 */ 83 */
78void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data) 84void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
79{ 85{
86 struct ci_hdrc_cable *cable;
87
88 cable = &ci->platdata->vbus_extcon;
89 if (!IS_ERR(cable->edev)) {
90 if (data & mask & OTGSC_BSVIS)
91 cable->changed = false;
92
93 /* Don't enable vbus interrupt if using external notifier */
94 if (data & mask & OTGSC_BSVIE) {
95 cable->enabled = true;
96 data &= ~OTGSC_BSVIE;
97 } else if (mask & OTGSC_BSVIE) {
98 cable->enabled = false;
99 }
100 }
101
102 cable = &ci->platdata->id_extcon;
103 if (!IS_ERR(cable->edev)) {
104 if (data & mask & OTGSC_IDIS)
105 cable->changed = false;
106
107 /* Don't enable id interrupt if using external notifier */
108 if (data & mask & OTGSC_IDIE) {
109 cable->enabled = true;
110 data &= ~OTGSC_IDIE;
111 } else if (mask & OTGSC_IDIE) {
112 cable->enabled = false;
113 }
114 }
115
80 hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data); 116 hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
81} 117}
82 118
@@ -98,13 +134,37 @@ void ci_handle_vbus_change(struct ci_hdrc *ci)
98 if (!ci->is_otg) 134 if (!ci->is_otg)
99 return; 135 return;
100 136
101 if (hw_read_otgsc(ci, OTGSC_BSV)) 137 if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active)
102 usb_gadget_vbus_connect(&ci->gadget); 138 usb_gadget_vbus_connect(&ci->gadget);
103 else 139 else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active)
104 usb_gadget_vbus_disconnect(&ci->gadget); 140 usb_gadget_vbus_disconnect(&ci->gadget);
105} 141}
106 142
107#define CI_VBUS_STABLE_TIMEOUT_MS 5000 143/**
144 * When we switch to device mode, the vbus value should be lower
145 * than OTGSC_BSV before connecting to host.
146 *
147 * @ci: the controller
148 *
149 * This function returns an error code if timeout
150 */
151static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
152{
153 unsigned long elapse = jiffies + msecs_to_jiffies(5000);
154 u32 mask = OTGSC_BSV;
155
156 while (hw_read_otgsc(ci, mask)) {
157 if (time_after(jiffies, elapse)) {
158 dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
159 mask);
160 return -ETIMEDOUT;
161 }
162 msleep(20);
163 }
164
165 return 0;
166}
167
108static void ci_handle_id_switch(struct ci_hdrc *ci) 168static void ci_handle_id_switch(struct ci_hdrc *ci)
109{ 169{
110 enum ci_role role = ci_otg_role(ci); 170 enum ci_role role = ci_otg_role(ci);
@@ -115,12 +175,21 @@ static void ci_handle_id_switch(struct ci_hdrc *ci)
115 175
116 ci_role_stop(ci); 176 ci_role_stop(ci);
117 177
118 if (role == CI_ROLE_GADGET) 178 if (role == CI_ROLE_GADGET &&
119 /* wait vbus lower than OTGSC_BSV */ 179 IS_ERR(ci->platdata->vbus_extcon.edev))
120 hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0, 180 /*
121 CI_VBUS_STABLE_TIMEOUT_MS); 181 * Wait vbus lower than OTGSC_BSV before connecting
182 * to host. If connecting status is from an external
183 * connector instead of register, we don't need to
184 * care vbus on the board, since it will not affect
185 * external connector status.
186 */
187 hw_wait_vbus_lower_bsv(ci);
122 188
123 ci_role_start(ci, role); 189 ci_role_start(ci, role);
190 /* vbus change may have already occurred */
191 if (role == CI_ROLE_GADGET)
192 ci_handle_vbus_change(ci);
124 } 193 }
125} 194}
126/** 195/**
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index cf132f057137..f88e9157fad0 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -1725,7 +1725,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
1725 struct usb_gadget_driver *driver) 1725 struct usb_gadget_driver *driver)
1726{ 1726{
1727 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1727 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1728 unsigned long flags;
1729 int retval = -ENOMEM; 1728 int retval = -ENOMEM;
1730 1729
1731 if (driver->disconnect == NULL) 1730 if (driver->disconnect == NULL)
@@ -1752,7 +1751,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
1752 1751
1753 pm_runtime_get_sync(&ci->gadget.dev); 1752 pm_runtime_get_sync(&ci->gadget.dev);
1754 if (ci->vbus_active) { 1753 if (ci->vbus_active) {
1755 spin_lock_irqsave(&ci->lock, flags);
1756 hw_device_reset(ci); 1754 hw_device_reset(ci);
1757 } else { 1755 } else {
1758 usb_udc_vbus_handler(&ci->gadget, false); 1756 usb_udc_vbus_handler(&ci->gadget, false);
@@ -1761,7 +1759,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
1761 } 1759 }
1762 1760
1763 retval = hw_device_state(ci, ci->ep0out->qh.dma); 1761 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1764 spin_unlock_irqrestore(&ci->lock, flags);
1765 if (retval) 1762 if (retval)
1766 pm_runtime_put_sync(&ci->gadget.dev); 1763 pm_runtime_put_sync(&ci->gadget.dev);
1767 1764
@@ -1796,10 +1793,10 @@ static int ci_udc_stop(struct usb_gadget *gadget)
1796 1793
1797 if (ci->vbus_active) { 1794 if (ci->vbus_active) {
1798 hw_device_state(ci, 0); 1795 hw_device_state(ci, 0);
1796 spin_unlock_irqrestore(&ci->lock, flags);
1799 if (ci->platdata->notify_event) 1797 if (ci->platdata->notify_event)
1800 ci->platdata->notify_event(ci, 1798 ci->platdata->notify_event(ci,
1801 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1799 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1802 spin_unlock_irqrestore(&ci->lock, flags);
1803 _gadget_stop_activity(&ci->gadget); 1800 _gadget_stop_activity(&ci->gadget);
1804 spin_lock_irqsave(&ci->lock, flags); 1801 spin_lock_irqsave(&ci->lock, flags);
1805 pm_runtime_put(&ci->gadget.dev); 1802 pm_runtime_put(&ci->gadget.dev);
diff --git a/drivers/usb/chipidea/ulpi.c b/drivers/usb/chipidea/ulpi.c
new file mode 100644
index 000000000000..1219583dc1b2
--- /dev/null
+++ b/drivers/usb/chipidea/ulpi.c
@@ -0,0 +1,113 @@
1/*
2 * Copyright (c) 2016 Linaro Ltd.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/device.h>
15#include <linux/usb/chipidea.h>
16#include <linux/ulpi/interface.h>
17
18#include "ci.h"
19
20#define ULPI_WAKEUP BIT(31)
21#define ULPI_RUN BIT(30)
22#define ULPI_WRITE BIT(29)
23#define ULPI_SYNC_STATE BIT(27)
24#define ULPI_ADDR(n) ((n) << 16)
25#define ULPI_DATA(n) (n)
26
27static int ci_ulpi_wait(struct ci_hdrc *ci, u32 mask)
28{
29 unsigned long usec = 10000;
30
31 while (usec--) {
32 if (!hw_read(ci, OP_ULPI_VIEWPORT, mask))
33 return 0;
34
35 udelay(1);
36 }
37
38 return -ETIMEDOUT;
39}
40
41static int ci_ulpi_read(struct device *dev, u8 addr)
42{
43 struct ci_hdrc *ci = dev_get_drvdata(dev);
44 int ret;
45
46 hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
47 ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
48 if (ret)
49 return ret;
50
51 hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_RUN | ULPI_ADDR(addr));
52 ret = ci_ulpi_wait(ci, ULPI_RUN);
53 if (ret)
54 return ret;
55
56 return hw_read(ci, OP_ULPI_VIEWPORT, GENMASK(15, 8)) >> 8;
57}
58
59static int ci_ulpi_write(struct device *dev, u8 addr, u8 val)
60{
61 struct ci_hdrc *ci = dev_get_drvdata(dev);
62 int ret;
63
64 hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
65 ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
66 if (ret)
67 return ret;
68
69 hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff,
70 ULPI_RUN | ULPI_WRITE | ULPI_ADDR(addr) | val);
71 return ci_ulpi_wait(ci, ULPI_RUN);
72}
73
74int ci_ulpi_init(struct ci_hdrc *ci)
75{
76 if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI)
77 return 0;
78
79 /*
80 * Set PORTSC correctly so we can read/write ULPI registers for
81 * identification purposes
82 */
83 hw_phymode_configure(ci);
84
85 ci->ulpi_ops.read = ci_ulpi_read;
86 ci->ulpi_ops.write = ci_ulpi_write;
87 ci->ulpi = ulpi_register_interface(ci->dev, &ci->ulpi_ops);
88 if (IS_ERR(ci->ulpi))
89 dev_err(ci->dev, "failed to register ULPI interface");
90
91 return PTR_ERR_OR_ZERO(ci->ulpi);
92}
93
94void ci_ulpi_exit(struct ci_hdrc *ci)
95{
96 if (ci->ulpi) {
97 ulpi_unregister_interface(ci->ulpi);
98 ci->ulpi = NULL;
99 }
100}
101
102int ci_ulpi_resume(struct ci_hdrc *ci)
103{
104 int cnt = 100000;
105
106 while (cnt-- > 0) {
107 if (hw_read(ci, OP_ULPI_VIEWPORT, ULPI_SYNC_STATE))
108 return 0;
109 udelay(1);
110 }
111
112 return -ETIMEDOUT;
113}
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index e35b1508d3eb..235e305f8473 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -913,7 +913,6 @@ static int get_serial_info(struct acm *acm, struct serial_struct __user *info)
913 struct serial_struct tmp; 913 struct serial_struct tmp;
914 914
915 memset(&tmp, 0, sizeof(tmp)); 915 memset(&tmp, 0, sizeof(tmp));
916 tmp.flags = ASYNC_LOW_LATENCY;
917 tmp.xmit_fifo_size = acm->writesize; 916 tmp.xmit_fifo_size = acm->writesize;
918 tmp.baud_base = le32_to_cpu(acm->line.dwDTERate); 917 tmp.baud_base = le32_to_cpu(acm->line.dwDTERate);
919 tmp.close_delay = acm->port.close_delay / 10; 918 tmp.close_delay = acm->port.close_delay / 10;
diff --git a/drivers/usb/class/cdc-wdm.c b/drivers/usb/class/cdc-wdm.c
index 0a6369510f2d..8fda45a45bd3 100644
--- a/drivers/usb/class/cdc-wdm.c
+++ b/drivers/usb/class/cdc-wdm.c
@@ -531,7 +531,7 @@ retry:
531 i++; 531 i++;
532 if (file->f_flags & O_NONBLOCK) { 532 if (file->f_flags & O_NONBLOCK) {
533 if (!test_bit(WDM_READ, &desc->flags)) { 533 if (!test_bit(WDM_READ, &desc->flags)) {
534 rv = cntr ? cntr : -EAGAIN; 534 rv = -EAGAIN;
535 goto err; 535 goto err;
536 } 536 }
537 rv = 0; 537 rv = 0;
diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c
index 8b317702d761..c9480d77810c 100644
--- a/drivers/usb/common/ulpi.c
+++ b/drivers/usb/common/ulpi.c
@@ -16,6 +16,9 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/acpi.h> 18#include <linux/acpi.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/clk/clk-conf.h>
19 22
20/* -------------------------------------------------------------------------- */ 23/* -------------------------------------------------------------------------- */
21 24
@@ -39,6 +42,10 @@ static int ulpi_match(struct device *dev, struct device_driver *driver)
39 struct ulpi *ulpi = to_ulpi_dev(dev); 42 struct ulpi *ulpi = to_ulpi_dev(dev);
40 const struct ulpi_device_id *id; 43 const struct ulpi_device_id *id;
41 44
45 /* Some ULPI devices don't have a vendor id so rely on OF match */
46 if (ulpi->id.vendor == 0)
47 return of_driver_match_device(dev, driver);
48
42 for (id = drv->id_table; id->vendor; id++) 49 for (id = drv->id_table; id->vendor; id++)
43 if (id->vendor == ulpi->id.vendor && 50 if (id->vendor == ulpi->id.vendor &&
44 id->product == ulpi->id.product) 51 id->product == ulpi->id.product)
@@ -50,6 +57,11 @@ static int ulpi_match(struct device *dev, struct device_driver *driver)
50static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env) 57static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
51{ 58{
52 struct ulpi *ulpi = to_ulpi_dev(dev); 59 struct ulpi *ulpi = to_ulpi_dev(dev);
60 int ret;
61
62 ret = of_device_uevent_modalias(dev, env);
63 if (ret != -ENODEV)
64 return ret;
53 65
54 if (add_uevent_var(env, "MODALIAS=ulpi:v%04xp%04x", 66 if (add_uevent_var(env, "MODALIAS=ulpi:v%04xp%04x",
55 ulpi->id.vendor, ulpi->id.product)) 67 ulpi->id.vendor, ulpi->id.product))
@@ -60,6 +72,11 @@ static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
60static int ulpi_probe(struct device *dev) 72static int ulpi_probe(struct device *dev)
61{ 73{
62 struct ulpi_driver *drv = to_ulpi_driver(dev->driver); 74 struct ulpi_driver *drv = to_ulpi_driver(dev->driver);
75 int ret;
76
77 ret = of_clk_set_defaults(dev->of_node, false);
78 if (ret < 0)
79 return ret;
63 80
64 return drv->probe(to_ulpi_dev(dev)); 81 return drv->probe(to_ulpi_dev(dev));
65} 82}
@@ -87,8 +104,13 @@ static struct bus_type ulpi_bus = {
87static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 104static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
88 char *buf) 105 char *buf)
89{ 106{
107 int len;
90 struct ulpi *ulpi = to_ulpi_dev(dev); 108 struct ulpi *ulpi = to_ulpi_dev(dev);
91 109
110 len = of_device_get_modalias(dev, buf, PAGE_SIZE - 1);
111 if (len != -ENODEV)
112 return len;
113
92 return sprintf(buf, "ulpi:v%04xp%04x\n", 114 return sprintf(buf, "ulpi:v%04xp%04x\n",
93 ulpi->id.vendor, ulpi->id.product); 115 ulpi->id.vendor, ulpi->id.product);
94} 116}
@@ -153,23 +175,45 @@ EXPORT_SYMBOL_GPL(ulpi_unregister_driver);
153 175
154/* -------------------------------------------------------------------------- */ 176/* -------------------------------------------------------------------------- */
155 177
156static int ulpi_register(struct device *dev, struct ulpi *ulpi) 178static int ulpi_of_register(struct ulpi *ulpi)
157{ 179{
158 int ret; 180 struct device_node *np = NULL, *child;
181 struct device *parent;
182
183 /* Find a ulpi bus underneath the parent or the grandparent */
184 parent = ulpi->dev.parent;
185 if (parent->of_node)
186 np = of_find_node_by_name(parent->of_node, "ulpi");
187 else if (parent->parent && parent->parent->of_node)
188 np = of_find_node_by_name(parent->parent->of_node, "ulpi");
189 if (!np)
190 return 0;
191
192 child = of_get_next_available_child(np, NULL);
193 of_node_put(np);
194 if (!child)
195 return -EINVAL;
159 196
160 ulpi->dev.parent = dev; /* needed early for ops */ 197 ulpi->dev.of_node = child;
198
199 return 0;
200}
201
202static int ulpi_read_id(struct ulpi *ulpi)
203{
204 int ret;
161 205
162 /* Test the interface */ 206 /* Test the interface */
163 ret = ulpi_write(ulpi, ULPI_SCRATCH, 0xaa); 207 ret = ulpi_write(ulpi, ULPI_SCRATCH, 0xaa);
164 if (ret < 0) 208 if (ret < 0)
165 return ret; 209 goto err;
166 210
167 ret = ulpi_read(ulpi, ULPI_SCRATCH); 211 ret = ulpi_read(ulpi, ULPI_SCRATCH);
168 if (ret < 0) 212 if (ret < 0)
169 return ret; 213 return ret;
170 214
171 if (ret != 0xaa) 215 if (ret != 0xaa)
172 return -ENODEV; 216 goto err;
173 217
174 ulpi->id.vendor = ulpi_read(ulpi, ULPI_VENDOR_ID_LOW); 218 ulpi->id.vendor = ulpi_read(ulpi, ULPI_VENDOR_ID_LOW);
175 ulpi->id.vendor |= ulpi_read(ulpi, ULPI_VENDOR_ID_HIGH) << 8; 219 ulpi->id.vendor |= ulpi_read(ulpi, ULPI_VENDOR_ID_HIGH) << 8;
@@ -177,13 +221,35 @@ static int ulpi_register(struct device *dev, struct ulpi *ulpi)
177 ulpi->id.product = ulpi_read(ulpi, ULPI_PRODUCT_ID_LOW); 221 ulpi->id.product = ulpi_read(ulpi, ULPI_PRODUCT_ID_LOW);
178 ulpi->id.product |= ulpi_read(ulpi, ULPI_PRODUCT_ID_HIGH) << 8; 222 ulpi->id.product |= ulpi_read(ulpi, ULPI_PRODUCT_ID_HIGH) << 8;
179 223
224 /* Some ULPI devices don't have a vendor id so rely on OF match */
225 if (ulpi->id.vendor == 0)
226 goto err;
227
228 request_module("ulpi:v%04xp%04x", ulpi->id.vendor, ulpi->id.product);
229 return 0;
230err:
231 of_device_request_module(&ulpi->dev);
232 return 0;
233}
234
235static int ulpi_register(struct device *dev, struct ulpi *ulpi)
236{
237 int ret;
238
239 ulpi->dev.parent = dev; /* needed early for ops */
180 ulpi->dev.bus = &ulpi_bus; 240 ulpi->dev.bus = &ulpi_bus;
181 ulpi->dev.type = &ulpi_dev_type; 241 ulpi->dev.type = &ulpi_dev_type;
182 dev_set_name(&ulpi->dev, "%s.ulpi", dev_name(dev)); 242 dev_set_name(&ulpi->dev, "%s.ulpi", dev_name(dev));
183 243
184 ACPI_COMPANION_SET(&ulpi->dev, ACPI_COMPANION(dev)); 244 ACPI_COMPANION_SET(&ulpi->dev, ACPI_COMPANION(dev));
185 245
186 request_module("ulpi:v%04xp%04x", ulpi->id.vendor, ulpi->id.product); 246 ret = ulpi_of_register(ulpi);
247 if (ret)
248 return ret;
249
250 ret = ulpi_read_id(ulpi);
251 if (ret)
252 return ret;
187 253
188 ret = device_register(&ulpi->dev); 254 ret = device_register(&ulpi->dev);
189 if (ret) 255 if (ret)
@@ -234,6 +300,7 @@ EXPORT_SYMBOL_GPL(ulpi_register_interface);
234 */ 300 */
235void ulpi_unregister_interface(struct ulpi *ulpi) 301void ulpi_unregister_interface(struct ulpi *ulpi)
236{ 302{
303 of_node_put(ulpi->dev.of_node);
237 device_unregister(&ulpi->dev); 304 device_unregister(&ulpi->dev);
238} 305}
239EXPORT_SYMBOL_GPL(ulpi_unregister_interface); 306EXPORT_SYMBOL_GPL(ulpi_unregister_interface);
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index 4016dae7433b..52747b6ac89a 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -134,42 +134,35 @@ enum snoop_when {
134#define USB_DEVICE_DEV MKDEV(USB_DEVICE_MAJOR, 0) 134#define USB_DEVICE_DEV MKDEV(USB_DEVICE_MAJOR, 0)
135 135
136/* Limit on the total amount of memory we can allocate for transfers */ 136/* Limit on the total amount of memory we can allocate for transfers */
137static unsigned usbfs_memory_mb = 16; 137static u32 usbfs_memory_mb = 16;
138module_param(usbfs_memory_mb, uint, 0644); 138module_param(usbfs_memory_mb, uint, 0644);
139MODULE_PARM_DESC(usbfs_memory_mb, 139MODULE_PARM_DESC(usbfs_memory_mb,
140 "maximum MB allowed for usbfs buffers (0 = no limit)"); 140 "maximum MB allowed for usbfs buffers (0 = no limit)");
141 141
142/* Hard limit, necessary to avoid arithmetic overflow */ 142static atomic64_t usbfs_memory_usage; /* Total memory currently allocated */
143#define USBFS_XFER_MAX (UINT_MAX / 2 - 1000000)
144
145static atomic_t usbfs_memory_usage; /* Total memory currently allocated */
146 143
147/* Check whether it's okay to allocate more memory for a transfer */ 144/* Check whether it's okay to allocate more memory for a transfer */
148static int usbfs_increase_memory_usage(unsigned amount) 145static int usbfs_increase_memory_usage(u64 amount)
149{ 146{
150 unsigned lim; 147 u64 lim;
151 148
152 /*
153 * Convert usbfs_memory_mb to bytes, avoiding overflows.
154 * 0 means use the hard limit (effectively unlimited).
155 */
156 lim = ACCESS_ONCE(usbfs_memory_mb); 149 lim = ACCESS_ONCE(usbfs_memory_mb);
157 if (lim == 0 || lim > (USBFS_XFER_MAX >> 20)) 150 lim <<= 20;
158 lim = USBFS_XFER_MAX;
159 else
160 lim <<= 20;
161 151
162 atomic_add(amount, &usbfs_memory_usage); 152 atomic64_add(amount, &usbfs_memory_usage);
163 if (atomic_read(&usbfs_memory_usage) <= lim) 153
164 return 0; 154 if (lim > 0 && atomic64_read(&usbfs_memory_usage) > lim) {
165 atomic_sub(amount, &usbfs_memory_usage); 155 atomic64_sub(amount, &usbfs_memory_usage);
166 return -ENOMEM; 156 return -ENOMEM;
157 }
158
159 return 0;
167} 160}
168 161
169/* Memory for a transfer is being deallocated */ 162/* Memory for a transfer is being deallocated */
170static void usbfs_decrease_memory_usage(unsigned amount) 163static void usbfs_decrease_memory_usage(u64 amount)
171{ 164{
172 atomic_sub(amount, &usbfs_memory_usage); 165 atomic64_sub(amount, &usbfs_memory_usage);
173} 166}
174 167
175static int connected(struct usb_dev_state *ps) 168static int connected(struct usb_dev_state *ps)
@@ -1191,7 +1184,7 @@ static int proc_bulk(struct usb_dev_state *ps, void __user *arg)
1191 if (!usb_maxpacket(dev, pipe, !(bulk.ep & USB_DIR_IN))) 1184 if (!usb_maxpacket(dev, pipe, !(bulk.ep & USB_DIR_IN)))
1192 return -EINVAL; 1185 return -EINVAL;
1193 len1 = bulk.len; 1186 len1 = bulk.len;
1194 if (len1 >= USBFS_XFER_MAX) 1187 if (len1 >= (INT_MAX - sizeof(struct urb)))
1195 return -EINVAL; 1188 return -EINVAL;
1196 ret = usbfs_increase_memory_usage(len1 + sizeof(struct urb)); 1189 ret = usbfs_increase_memory_usage(len1 + sizeof(struct urb));
1197 if (ret) 1190 if (ret)
@@ -1584,10 +1577,6 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
1584 return -EINVAL; 1577 return -EINVAL;
1585 } 1578 }
1586 1579
1587 if (uurb->buffer_length >= USBFS_XFER_MAX) {
1588 ret = -EINVAL;
1589 goto error;
1590 }
1591 if (uurb->buffer_length > 0 && 1580 if (uurb->buffer_length > 0 &&
1592 !access_ok(is_in ? VERIFY_WRITE : VERIFY_READ, 1581 !access_ok(is_in ? VERIFY_WRITE : VERIFY_READ,
1593 uurb->buffer, uurb->buffer_length)) { 1582 uurb->buffer, uurb->buffer_length)) {
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index 479e223f9cff..612fab6e54fb 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -3017,6 +3017,7 @@ void usb_remove_hcd(struct usb_hcd *hcd)
3017 } 3017 }
3018 3018
3019 usb_put_invalidate_rhdev(hcd); 3019 usb_put_invalidate_rhdev(hcd);
3020 hcd->flags = 0;
3020} 3021}
3021EXPORT_SYMBOL_GPL(usb_remove_hcd); 3022EXPORT_SYMBOL_GPL(usb_remove_hcd);
3022 3023
diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
index dea55914d641..2184ef40a82a 100644
--- a/drivers/usb/core/message.c
+++ b/drivers/usb/core/message.c
@@ -122,12 +122,11 @@ static int usb_internal_control_msg(struct usb_device *usb_dev,
122 * This function sends a simple control message to a specified endpoint and 122 * This function sends a simple control message to a specified endpoint and
123 * waits for the message to complete, or timeout. 123 * waits for the message to complete, or timeout.
124 * 124 *
125 * Don't use this function from within an interrupt context, like a bottom half 125 * Don't use this function from within an interrupt context. If you need
126 * handler. If you need an asynchronous message, or need to send a message 126 * an asynchronous message, or need to send a message from within interrupt
127 * from within interrupt context, use usb_submit_urb(). 127 * context, use usb_submit_urb(). If a thread in your driver uses this call,
128 * If a thread in your driver uses this call, make sure your disconnect() 128 * make sure your disconnect() method can wait for it to complete. Since you
129 * method can wait for it to complete. Since you don't have a handle on the 129 * don't have a handle on the URB used, you can't cancel the request.
130 * URB used, you can't cancel the request.
131 * 130 *
132 * Return: If successful, the number of bytes transferred. Otherwise, a negative 131 * Return: If successful, the number of bytes transferred. Otherwise, a negative
133 * error number. 132 * error number.
@@ -173,12 +172,11 @@ EXPORT_SYMBOL_GPL(usb_control_msg);
173 * This function sends a simple interrupt message to a specified endpoint and 172 * This function sends a simple interrupt message to a specified endpoint and
174 * waits for the message to complete, or timeout. 173 * waits for the message to complete, or timeout.
175 * 174 *
176 * Don't use this function from within an interrupt context, like a bottom half 175 * Don't use this function from within an interrupt context. If you need
177 * handler. If you need an asynchronous message, or need to send a message 176 * an asynchronous message, or need to send a message from within interrupt
178 * from within interrupt context, use usb_submit_urb() If a thread in your 177 * context, use usb_submit_urb() If a thread in your driver uses this call,
179 * driver uses this call, make sure your disconnect() method can wait for it to 178 * make sure your disconnect() method can wait for it to complete. Since you
180 * complete. Since you don't have a handle on the URB used, you can't cancel 179 * don't have a handle on the URB used, you can't cancel the request.
181 * the request.
182 * 180 *
183 * Return: 181 * Return:
184 * If successful, 0. Otherwise a negative error number. The number of actual 182 * If successful, 0. Otherwise a negative error number. The number of actual
@@ -207,12 +205,11 @@ EXPORT_SYMBOL_GPL(usb_interrupt_msg);
207 * This function sends a simple bulk message to a specified endpoint 205 * This function sends a simple bulk message to a specified endpoint
208 * and waits for the message to complete, or timeout. 206 * and waits for the message to complete, or timeout.
209 * 207 *
210 * Don't use this function from within an interrupt context, like a bottom half 208 * Don't use this function from within an interrupt context. If you need
211 * handler. If you need an asynchronous message, or need to send a message 209 * an asynchronous message, or need to send a message from within interrupt
212 * from within interrupt context, use usb_submit_urb() If a thread in your 210 * context, use usb_submit_urb() If a thread in your driver uses this call,
213 * driver uses this call, make sure your disconnect() method can wait for it to 211 * make sure your disconnect() method can wait for it to complete. Since you
214 * complete. Since you don't have a handle on the URB used, you can't cancel 212 * don't have a handle on the URB used, you can't cancel the request.
215 * the request.
216 * 213 *
217 * Because there is no usb_interrupt_msg() and no USBDEVFS_INTERRUPT ioctl, 214 * Because there is no usb_interrupt_msg() and no USBDEVFS_INTERRUPT ioctl,
218 * users are forced to abuse this routine by using it to submit URBs for 215 * users are forced to abuse this routine by using it to submit URBs for
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 11d8ae9aead1..1b6612c2cdda 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -104,7 +104,7 @@ static int dwc2_restore_global_registers(struct dwc2_hsotg *hsotg)
104 gr = &hsotg->gr_backup; 104 gr = &hsotg->gr_backup;
105 if (!gr->valid) { 105 if (!gr->valid) {
106 dev_err(hsotg->dev, "%s: no global registers to restore\n", 106 dev_err(hsotg->dev, "%s: no global registers to restore\n",
107 __func__); 107 __func__);
108 return -EINVAL; 108 return -EINVAL;
109 } 109 }
110 gr->valid = false; 110 gr->valid = false;
@@ -155,21 +155,21 @@ int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore)
155 ret = dwc2_restore_global_registers(hsotg); 155 ret = dwc2_restore_global_registers(hsotg);
156 if (ret) { 156 if (ret) {
157 dev_err(hsotg->dev, "%s: failed to restore registers\n", 157 dev_err(hsotg->dev, "%s: failed to restore registers\n",
158 __func__); 158 __func__);
159 return ret; 159 return ret;
160 } 160 }
161 if (dwc2_is_host_mode(hsotg)) { 161 if (dwc2_is_host_mode(hsotg)) {
162 ret = dwc2_restore_host_registers(hsotg); 162 ret = dwc2_restore_host_registers(hsotg);
163 if (ret) { 163 if (ret) {
164 dev_err(hsotg->dev, "%s: failed to restore host registers\n", 164 dev_err(hsotg->dev, "%s: failed to restore host registers\n",
165 __func__); 165 __func__);
166 return ret; 166 return ret;
167 } 167 }
168 } else { 168 } else {
169 ret = dwc2_restore_device_registers(hsotg); 169 ret = dwc2_restore_device_registers(hsotg);
170 if (ret) { 170 if (ret) {
171 dev_err(hsotg->dev, "%s: failed to restore device registers\n", 171 dev_err(hsotg->dev, "%s: failed to restore device registers\n",
172 __func__); 172 __func__);
173 return ret; 173 return ret;
174 } 174 }
175 } 175 }
@@ -195,7 +195,7 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg)
195 ret = dwc2_backup_global_registers(hsotg); 195 ret = dwc2_backup_global_registers(hsotg);
196 if (ret) { 196 if (ret) {
197 dev_err(hsotg->dev, "%s: failed to backup global registers\n", 197 dev_err(hsotg->dev, "%s: failed to backup global registers\n",
198 __func__); 198 __func__);
199 return ret; 199 return ret;
200 } 200 }
201 201
@@ -203,14 +203,14 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg)
203 ret = dwc2_backup_host_registers(hsotg); 203 ret = dwc2_backup_host_registers(hsotg);
204 if (ret) { 204 if (ret) {
205 dev_err(hsotg->dev, "%s: failed to backup host registers\n", 205 dev_err(hsotg->dev, "%s: failed to backup host registers\n",
206 __func__); 206 __func__);
207 return ret; 207 return ret;
208 } 208 }
209 } else { 209 } else {
210 ret = dwc2_backup_device_registers(hsotg); 210 ret = dwc2_backup_device_registers(hsotg);
211 if (ret) { 211 if (ret) {
212 dev_err(hsotg->dev, "%s: failed to backup device registers\n", 212 dev_err(hsotg->dev, "%s: failed to backup device registers\n",
213 __func__); 213 __func__);
214 return ret; 214 return ret;
215 } 215 }
216 } 216 }
@@ -313,7 +313,7 @@ static bool dwc2_iddig_filter_enabled(struct dwc2_hsotg *hsotg)
313 * Do core a soft reset of the core. Be careful with this because it 313 * Do core a soft reset of the core. Be careful with this because it
314 * resets all the internal state machines of the core. 314 * resets all the internal state machines of the core.
315 */ 315 */
316int dwc2_core_reset(struct dwc2_hsotg *hsotg) 316int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait)
317{ 317{
318 u32 greset; 318 u32 greset;
319 int count = 0; 319 int count = 0;
@@ -369,7 +369,7 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg)
369 } 369 }
370 } while (!(greset & GRSTCTL_AHBIDLE)); 370 } while (!(greset & GRSTCTL_AHBIDLE));
371 371
372 if (wait_for_host_mode) 372 if (wait_for_host_mode && !skip_wait)
373 dwc2_wait_for_mode(hsotg, true); 373 dwc2_wait_for_mode(hsotg, true);
374 374
375 return 0; 375 return 0;
@@ -455,7 +455,7 @@ void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
455 dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG); 455 dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
456 456
457 if (dwc2_iddig_filter_enabled(hsotg)) 457 if (dwc2_iddig_filter_enabled(hsotg))
458 usleep_range(100000, 110000); 458 msleep(100);
459} 459}
460 460
461/* 461/*
@@ -500,7 +500,7 @@ int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg)
500{ 500{
501 int retval; 501 int retval;
502 502
503 retval = dwc2_core_reset(hsotg); 503 retval = dwc2_core_reset(hsotg, false);
504 if (retval) 504 if (retval)
505 return retval; 505 return retval;
506 506
@@ -541,7 +541,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
541 addr = hsotg->regs + HAINTMSK; 541 addr = hsotg->regs + HAINTMSK;
542 dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n", 542 dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n",
543 (unsigned long)addr, dwc2_readl(addr)); 543 (unsigned long)addr, dwc2_readl(addr));
544 if (hsotg->params.dma_desc_enable > 0) { 544 if (hsotg->params.dma_desc_enable) {
545 addr = hsotg->regs + HFLBADDR; 545 addr = hsotg->regs + HFLBADDR;
546 dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n", 546 dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n",
547 (unsigned long)addr, dwc2_readl(addr)); 547 (unsigned long)addr, dwc2_readl(addr));
@@ -571,7 +571,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
571 addr = hsotg->regs + HCDMA(i); 571 addr = hsotg->regs + HCDMA(i);
572 dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n", 572 dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n",
573 (unsigned long)addr, dwc2_readl(addr)); 573 (unsigned long)addr, dwc2_readl(addr));
574 if (hsotg->params.dma_desc_enable > 0) { 574 if (hsotg->params.dma_desc_enable) {
575 addr = hsotg->regs + HCDMAB(i); 575 addr = hsotg->regs + HCDMAB(i);
576 dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n", 576 dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n",
577 (unsigned long)addr, dwc2_readl(addr)); 577 (unsigned long)addr, dwc2_readl(addr));
@@ -751,11 +751,6 @@ bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host)
751 return dwc2_force_mode(hsotg, host); 751 return dwc2_force_mode(hsotg, host);
752} 752}
753 753
754u16 dwc2_get_otg_version(struct dwc2_hsotg *hsotg)
755{
756 return hsotg->params.otg_ver == 1 ? 0x0200 : 0x0103;
757}
758
759bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg) 754bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg)
760{ 755{
761 if (dwc2_readl(hsotg->regs + GSNPSID) == 0xffffffff) 756 if (dwc2_readl(hsotg->regs + GSNPSID) == 0xffffffff)
@@ -793,7 +788,7 @@ void dwc2_disable_global_interrupts(struct dwc2_hsotg *hsotg)
793} 788}
794 789
795/* Returns the controller's GHWCFG2.OTG_MODE. */ 790/* Returns the controller's GHWCFG2.OTG_MODE. */
796unsigned dwc2_op_mode(struct dwc2_hsotg *hsotg) 791unsigned int dwc2_op_mode(struct dwc2_hsotg *hsotg)
797{ 792{
798 u32 ghwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2); 793 u32 ghwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2);
799 794
@@ -804,7 +799,7 @@ unsigned dwc2_op_mode(struct dwc2_hsotg *hsotg)
804/* Returns true if the controller is capable of DRD. */ 799/* Returns true if the controller is capable of DRD. */
805bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg) 800bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg)
806{ 801{
807 unsigned op_mode = dwc2_op_mode(hsotg); 802 unsigned int op_mode = dwc2_op_mode(hsotg);
808 803
809 return (op_mode == GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) || 804 return (op_mode == GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) ||
810 (op_mode == GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE) || 805 (op_mode == GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE) ||
@@ -814,7 +809,7 @@ bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg)
814/* Returns true if the controller is host-only. */ 809/* Returns true if the controller is host-only. */
815bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg) 810bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg)
816{ 811{
817 unsigned op_mode = dwc2_op_mode(hsotg); 812 unsigned int op_mode = dwc2_op_mode(hsotg);
818 813
819 return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_HOST) || 814 return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_HOST) ||
820 (op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST); 815 (op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST);
@@ -823,7 +818,7 @@ bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg)
823/* Returns true if the controller is device-only. */ 818/* Returns true if the controller is device-only. */
824bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg) 819bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg)
825{ 820{
826 unsigned op_mode = dwc2_op_mode(hsotg); 821 unsigned int op_mode = dwc2_op_mode(hsotg);
827 822
828 return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) || 823 return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) ||
829 (op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE); 824 (op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE);
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 302b8f5f7d27..1a7e83005082 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -127,6 +127,8 @@ static const char * const dwc2_hsotg_supply_names[] = {
127 "vusb_a", /* analog USB supply, 1.1V */ 127 "vusb_a", /* analog USB supply, 1.1V */
128}; 128};
129 129
130#define DWC2_NUM_SUPPLIES ARRAY_SIZE(dwc2_hsotg_supply_names)
131
130/* 132/*
131 * EP0_MPS_LIMIT 133 * EP0_MPS_LIMIT
132 * 134 *
@@ -246,7 +248,8 @@ struct dwc2_hsotg_req {
246 void *saved_req_buf; 248 void *saved_req_buf;
247}; 249};
248 250
249#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 251#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
252 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
250#define call_gadget(_hs, _entry) \ 253#define call_gadget(_hs, _entry) \
251do { \ 254do { \
252 if ((_hs)->gadget.speed != USB_SPEED_UNKNOWN && \ 255 if ((_hs)->gadget.speed != USB_SPEED_UNKNOWN && \
@@ -271,13 +274,6 @@ enum dwc2_lx_state {
271 DWC2_L3, /* Off state */ 274 DWC2_L3, /* Off state */
272}; 275};
273 276
274/*
275 * Gadget periodic tx fifo sizes as used by legacy driver
276 * EP0 is not included
277 */
278#define DWC2_G_P_LEGACY_TX_FIFO_SIZE {256, 256, 256, 256, 768, 768, 768, \
279 768, 0, 0, 0, 0, 0, 0, 0}
280
281/* Gadget ep0 states */ 277/* Gadget ep0 states */
282enum dwc2_ep0_state { 278enum dwc2_ep0_state {
283 DWC2_EP0_SETUP, 279 DWC2_EP0_SETUP,
@@ -295,9 +291,6 @@ enum dwc2_ep0_state {
295 * 1 - SRP Only capable 291 * 1 - SRP Only capable
296 * 2 - No HNP/SRP capable (always available) 292 * 2 - No HNP/SRP capable (always available)
297 * Defaults to best available option (0, 1, then 2) 293 * Defaults to best available option (0, 1, then 2)
298 * @otg_ver: OTG version supported
299 * 0 - 1.3 (default)
300 * 1 - 2.0
301 * @host_dma: Specifies whether to use slave or DMA mode for accessing 294 * @host_dma: Specifies whether to use slave or DMA mode for accessing
302 * the data FIFOs. The driver will automatically detect the 295 * the data FIFOs. The driver will automatically detect the
303 * value for this parameter if none is specified. 296 * value for this parameter if none is specified.
@@ -444,6 +437,11 @@ enum dwc2_ep0_state {
444 * in DWORDS with possible values from from 437 * in DWORDS with possible values from from
445 * 16-32768 (default: 256, 256, 256, 256, 768, 438 * 16-32768 (default: 256, 256, 256, 256, 768,
446 * 768, 768, 768, 0, 0, 0, 0, 0, 0, 0). 439 * 768, 768, 768, 0, 0, 0, 0, 0, 0, 0).
440 * @change_speed_quirk: Change speed configuration to DWC2_SPEED_PARAM_FULL
441 * while full&low speed device connect. And change speed
442 * back to DWC2_SPEED_PARAM_HIGH while device is gone.
443 * 0 - No (default)
444 * 1 - Yes
447 * 445 *
448 * The following parameters may be specified when starting the module. These 446 * The following parameters may be specified when starting the module. These
449 * parameters define how the DWC_otg controller should be configured. A 447 * parameters define how the DWC_otg controller should be configured. A
@@ -452,63 +450,48 @@ enum dwc2_ep0_state {
452 * default described above. 450 * default described above.
453 */ 451 */
454struct dwc2_core_params { 452struct dwc2_core_params {
455 /* 453 u8 otg_cap;
456 * Don't add any non-int members here, this will break
457 * dwc2_set_all_params!
458 */
459 int otg_cap;
460#define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0 454#define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0
461#define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1 455#define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1
462#define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE 2 456#define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE 2
463 457
464 int otg_ver; 458 u8 phy_type;
465 int dma_desc_enable;
466 int dma_desc_fs_enable;
467 int speed;
468#define DWC2_SPEED_PARAM_HIGH 0
469#define DWC2_SPEED_PARAM_FULL 1
470#define DWC2_SPEED_PARAM_LOW 2
471
472 int enable_dynamic_fifo;
473 int en_multiple_tx_fifo;
474 int host_rx_fifo_size;
475 int host_nperio_tx_fifo_size;
476 int host_perio_tx_fifo_size;
477 int max_transfer_size;
478 int max_packet_count;
479 int host_channels;
480 int phy_type;
481#define DWC2_PHY_TYPE_PARAM_FS 0 459#define DWC2_PHY_TYPE_PARAM_FS 0
482#define DWC2_PHY_TYPE_PARAM_UTMI 1 460#define DWC2_PHY_TYPE_PARAM_UTMI 1
483#define DWC2_PHY_TYPE_PARAM_ULPI 2 461#define DWC2_PHY_TYPE_PARAM_ULPI 2
484 462
485 int phy_utmi_width; 463 u8 speed;
486 int phy_ulpi_ddr; 464#define DWC2_SPEED_PARAM_HIGH 0
487 int phy_ulpi_ext_vbus; 465#define DWC2_SPEED_PARAM_FULL 1
488#define DWC2_PHY_ULPI_INTERNAL_VBUS 0 466#define DWC2_SPEED_PARAM_LOW 2
489#define DWC2_PHY_ULPI_EXTERNAL_VBUS 1
490
491 int i2c_enable;
492 int ulpi_fs_ls;
493 int host_support_fs_ls_low_power;
494 int host_ls_low_power_phy_clk;
495#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
496#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1
497
498 int ts_dline;
499 int reload_ctl;
500 int ahbcfg;
501 int uframe_sched;
502 int external_id_pin_ctl;
503 int hibernation;
504 467
505 /* 468 u8 phy_utmi_width;
506 * The following parameters are *only* set via device 469 bool phy_ulpi_ddr;
507 * properties and cannot be set directly in this structure. 470 bool phy_ulpi_ext_vbus;
508 */ 471 bool enable_dynamic_fifo;
472 bool en_multiple_tx_fifo;
473 bool i2c_enable;
474 bool ulpi_fs_ls;
475 bool ts_dline;
476 bool reload_ctl;
477 bool uframe_sched;
478 bool external_id_pin_ctl;
479 bool hibernation;
480 u16 max_packet_count;
481 u32 max_transfer_size;
482 u32 ahbcfg;
509 483
510 /* Host parameters */ 484 /* Host parameters */
511 bool host_dma; 485 bool host_dma;
486 bool dma_desc_enable;
487 bool dma_desc_fs_enable;
488 bool host_support_fs_ls_low_power;
489 bool host_ls_low_power_phy_clk;
490
491 u8 host_channels;
492 u16 host_rx_fifo_size;
493 u16 host_nperio_tx_fifo_size;
494 u16 host_perio_tx_fifo_size;
512 495
513 /* Gadget parameters */ 496 /* Gadget parameters */
514 bool g_dma; 497 bool g_dma;
@@ -516,6 +499,8 @@ struct dwc2_core_params {
516 u32 g_rx_fifo_size; 499 u32 g_rx_fifo_size;
517 u32 g_np_tx_fifo_size; 500 u32 g_np_tx_fifo_size;
518 u32 g_tx_fifo_size[MAX_EPS_CHANNELS]; 501 u32 g_tx_fifo_size[MAX_EPS_CHANNELS];
502
503 bool change_speed_quirk;
519}; 504};
520 505
521/** 506/**
@@ -603,8 +588,8 @@ struct dwc2_hw_params {
603#define DWC2_CTRL_BUFF_SIZE 8 588#define DWC2_CTRL_BUFF_SIZE 8
604 589
605/** 590/**
606 * struct dwc2_gregs_backup - Holds global registers state before entering partial 591 * struct dwc2_gregs_backup - Holds global registers state before
607 * power down 592 * entering partial power down
608 * @gotgctl: Backup of GOTGCTL register 593 * @gotgctl: Backup of GOTGCTL register
609 * @gintmsk: Backup of GINTMSK register 594 * @gintmsk: Backup of GINTMSK register
610 * @gahbcfg: Backup of GAHBCFG register 595 * @gahbcfg: Backup of GAHBCFG register
@@ -634,8 +619,8 @@ struct dwc2_gregs_backup {
634}; 619};
635 620
636/** 621/**
637 * struct dwc2_dregs_backup - Holds device registers state before entering partial 622 * struct dwc2_dregs_backup - Holds device registers state before
638 * power down 623 * entering partial power down
639 * @dcfg: Backup of DCFG register 624 * @dcfg: Backup of DCFG register
640 * @dctl: Backup of DCTL register 625 * @dctl: Backup of DCTL register
641 * @daintmsk: Backup of DAINTMSK register 626 * @daintmsk: Backup of DAINTMSK register
@@ -664,8 +649,8 @@ struct dwc2_dregs_backup {
664}; 649};
665 650
666/** 651/**
667 * struct dwc2_hregs_backup - Holds host registers state before entering partial 652 * struct dwc2_hregs_backup - Holds host registers state before
668 * power down 653 * entering partial power down
669 * @hcfg: Backup of HCFG register 654 * @hcfg: Backup of HCFG register
670 * @haintmsk: Backup of HAINTMSK register 655 * @haintmsk: Backup of HAINTMSK register
671 * @hcintmsk: Backup of HCINTMSK register 656 * @hcintmsk: Backup of HCINTMSK register
@@ -782,9 +767,10 @@ struct dwc2_hregs_backup {
782 * @gadget_enabled Peripheral mode sub-driver initialization indicator. 767 * @gadget_enabled Peripheral mode sub-driver initialization indicator.
783 * @ll_hw_enabled Status of low-level hardware resources. 768 * @ll_hw_enabled Status of low-level hardware resources.
784 * @phy: The otg phy transceiver structure for phy control. 769 * @phy: The otg phy transceiver structure for phy control.
785 * @uphy: The otg phy transceiver structure for old USB phy control. 770 * @uphy: The otg phy transceiver structure for old USB phy
786 * @plat: The platform specific configuration data. This can be removed once 771 * control.
787 * all SoCs support usb transceiver. 772 * @plat: The platform specific configuration data. This can be
773 * removed once all SoCs support usb transceiver.
788 * @supplies: Definition of USB power supplies 774 * @supplies: Definition of USB power supplies
789 * @phyif: PHY interface width 775 * @phyif: PHY interface width
790 * @lock: Spinlock that protects all the driver data structures 776 * @lock: Spinlock that protects all the driver data structures
@@ -921,7 +907,7 @@ struct dwc2_hsotg {
921 struct phy *phy; 907 struct phy *phy;
922 struct usb_phy *uphy; 908 struct usb_phy *uphy;
923 struct dwc2_hsotg_plat *plat; 909 struct dwc2_hsotg_plat *plat;
924 struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)]; 910 struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
925 u32 phyif; 911 u32 phyif;
926 912
927 spinlock_t lock; 913 spinlock_t lock;
@@ -947,6 +933,7 @@ struct dwc2_hsotg {
947 /* DWC OTG HW Release versions */ 933 /* DWC OTG HW Release versions */
948#define DWC2_CORE_REV_2_71a 0x4f54271a 934#define DWC2_CORE_REV_2_71a 0x4f54271a
949#define DWC2_CORE_REV_2_90a 0x4f54290a 935#define DWC2_CORE_REV_2_90a 0x4f54290a
936#define DWC2_CORE_REV_2_91a 0x4f54291a
950#define DWC2_CORE_REV_2_92a 0x4f54292a 937#define DWC2_CORE_REV_2_92a 0x4f54292a
951#define DWC2_CORE_REV_2_94a 0x4f54294a 938#define DWC2_CORE_REV_2_94a 0x4f54294a
952#define DWC2_CORE_REV_3_00a 0x4f54300a 939#define DWC2_CORE_REV_3_00a 0x4f54300a
@@ -1033,7 +1020,8 @@ struct dwc2_hsotg {
1033#endif 1020#endif
1034#endif /* CONFIG_USB_DWC2_HOST || CONFIG_USB_DWC2_DUAL_ROLE */ 1021#endif /* CONFIG_USB_DWC2_HOST || CONFIG_USB_DWC2_DUAL_ROLE */
1035 1022
1036#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1023#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
1024 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
1037 /* Gadget structures */ 1025 /* Gadget structures */
1038 struct usb_gadget_driver *driver; 1026 struct usb_gadget_driver *driver;
1039 int fifo_mem; 1027 int fifo_mem;
@@ -1101,37 +1089,37 @@ static inline bool dwc2_is_hs_iot(struct dwc2_hsotg *hsotg)
1101 * The following functions support initialization of the core driver component 1089 * The following functions support initialization of the core driver component
1102 * and the DWC_otg controller 1090 * and the DWC_otg controller
1103 */ 1091 */
1104extern int dwc2_core_reset(struct dwc2_hsotg *hsotg); 1092int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait);
1105extern int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg); 1093int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg);
1106extern int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg); 1094int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg);
1107extern int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore); 1095int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore);
1108 1096
1109bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host); 1097bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host);
1110void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg); 1098void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg);
1111void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg); 1099void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg);
1112 1100
1113extern bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg); 1101bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg);
1114 1102
1115/* 1103/*
1116 * Common core Functions. 1104 * Common core Functions.
1117 * The following functions support managing the DWC_otg controller in either 1105 * The following functions support managing the DWC_otg controller in either
1118 * device or host mode. 1106 * device or host mode.
1119 */ 1107 */
1120extern void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes); 1108void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes);
1121extern void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num); 1109void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num);
1122extern void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg); 1110void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg);
1123 1111
1124extern void dwc2_enable_global_interrupts(struct dwc2_hsotg *hcd); 1112void dwc2_enable_global_interrupts(struct dwc2_hsotg *hcd);
1125extern void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd); 1113void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd);
1126 1114
1127/* This function should be called on every hardware interrupt. */ 1115/* This function should be called on every hardware interrupt. */
1128extern irqreturn_t dwc2_handle_common_intr(int irq, void *dev); 1116irqreturn_t dwc2_handle_common_intr(int irq, void *dev);
1129 1117
1130/* The device ID match table */ 1118/* The device ID match table */
1131extern const struct of_device_id dwc2_of_match_table[]; 1119extern const struct of_device_id dwc2_of_match_table[];
1132 1120
1133extern int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg); 1121int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg);
1134extern int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg); 1122int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg);
1135 1123
1136/* Parameters */ 1124/* Parameters */
1137int dwc2_get_hwparams(struct dwc2_hsotg *hsotg); 1125int dwc2_get_hwparams(struct dwc2_hsotg *hsotg);
@@ -1145,7 +1133,7 @@ int dwc2_init_params(struct dwc2_hsotg *hsotg);
1145 * are read in and cached so they always read directly from the 1133 * are read in and cached so they always read directly from the
1146 * GHWCFG2 register. 1134 * GHWCFG2 register.
1147 */ 1135 */
1148unsigned dwc2_op_mode(struct dwc2_hsotg *hsotg); 1136unsigned int dwc2_op_mode(struct dwc2_hsotg *hsotg);
1149bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg); 1137bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg);
1150bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg); 1138bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg);
1151bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg); 1139bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg);
@@ -1157,6 +1145,7 @@ static inline int dwc2_is_host_mode(struct dwc2_hsotg *hsotg)
1157{ 1145{
1158 return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) != 0; 1146 return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) != 0;
1159} 1147}
1148
1160static inline int dwc2_is_device_mode(struct dwc2_hsotg *hsotg) 1149static inline int dwc2_is_device_mode(struct dwc2_hsotg *hsotg)
1161{ 1150{
1162 return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) == 0; 1151 return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) == 0;
@@ -1165,29 +1154,28 @@ static inline int dwc2_is_device_mode(struct dwc2_hsotg *hsotg)
1165/* 1154/*
1166 * Dump core registers and SPRAM 1155 * Dump core registers and SPRAM
1167 */ 1156 */
1168extern void dwc2_dump_dev_registers(struct dwc2_hsotg *hsotg); 1157void dwc2_dump_dev_registers(struct dwc2_hsotg *hsotg);
1169extern void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg); 1158void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg);
1170extern void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg); 1159void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg);
1171
1172/*
1173 * Return OTG version - either 1.3 or 2.0
1174 */
1175extern u16 dwc2_get_otg_version(struct dwc2_hsotg *hsotg);
1176 1160
1177/* Gadget defines */ 1161/* Gadget defines */
1178#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1162#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
1179extern int dwc2_hsotg_remove(struct dwc2_hsotg *hsotg); 1163 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
1180extern int dwc2_hsotg_suspend(struct dwc2_hsotg *dwc2); 1164int dwc2_hsotg_remove(struct dwc2_hsotg *hsotg);
1181extern int dwc2_hsotg_resume(struct dwc2_hsotg *dwc2); 1165int dwc2_hsotg_suspend(struct dwc2_hsotg *dwc2);
1182extern int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq); 1166int dwc2_hsotg_resume(struct dwc2_hsotg *dwc2);
1183extern void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2, 1167int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq);
1184 bool reset); 1168void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2,
1185extern void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg); 1169 bool reset);
1186extern void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2); 1170void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg);
1187extern int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode); 1171void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2);
1172int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode);
1188#define dwc2_is_device_connected(hsotg) (hsotg->connected) 1173#define dwc2_is_device_connected(hsotg) (hsotg->connected)
1189int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg); 1174int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg);
1190int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg); 1175int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg);
1176int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg);
1177int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg);
1178int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg);
1191#else 1179#else
1192static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2) 1180static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2)
1193{ return 0; } 1181{ return 0; }
@@ -1198,25 +1186,31 @@ static inline int dwc2_hsotg_resume(struct dwc2_hsotg *dwc2)
1198static inline int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) 1186static inline int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
1199{ return 0; } 1187{ return 0; }
1200static inline void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2, 1188static inline void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2,
1201 bool reset) {} 1189 bool reset) {}
1202static inline void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg) {} 1190static inline void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg) {}
1203static inline void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2) {} 1191static inline void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2) {}
1204static inline int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, 1192static inline int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg,
1205 int testmode) 1193 int testmode)
1206{ return 0; } 1194{ return 0; }
1207#define dwc2_is_device_connected(hsotg) (0) 1195#define dwc2_is_device_connected(hsotg) (0)
1208static inline int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg) 1196static inline int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg)
1209{ return 0; } 1197{ return 0; }
1210static inline int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg) 1198static inline int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg)
1211{ return 0; } 1199{ return 0; }
1200static inline int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg)
1201{ return 0; }
1202static inline int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
1203{ return 0; }
1204static inline int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg)
1205{ return 0; }
1212#endif 1206#endif
1213 1207
1214#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1208#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
1215extern int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg); 1209int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg);
1216extern int dwc2_hcd_get_future_frame_number(struct dwc2_hsotg *hsotg, int us); 1210int dwc2_hcd_get_future_frame_number(struct dwc2_hsotg *hsotg, int us);
1217extern void dwc2_hcd_connect(struct dwc2_hsotg *hsotg); 1211void dwc2_hcd_connect(struct dwc2_hsotg *hsotg);
1218extern void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force); 1212void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force);
1219extern void dwc2_hcd_start(struct dwc2_hsotg *hsotg); 1213void dwc2_hcd_start(struct dwc2_hsotg *hsotg);
1220int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg); 1214int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg);
1221int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg); 1215int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg);
1222#else 1216#else
@@ -1229,7 +1223,7 @@ static inline void dwc2_hcd_connect(struct dwc2_hsotg *hsotg) {}
1229static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force) {} 1223static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force) {}
1230static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {} 1224static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {}
1231static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {} 1225static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {}
1232static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq) 1226static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
1233{ return 0; } 1227{ return 0; }
1234static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg) 1228static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
1235{ return 0; } 1229{ return 0; }
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index 5b228ba6045f..b8bcb007c92a 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -159,9 +159,8 @@ static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
159 " ++OTG Interrupt: Session Request Success Status Change++\n"); 159 " ++OTG Interrupt: Session Request Success Status Change++\n");
160 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL); 160 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
161 if (gotgctl & GOTGCTL_SESREQSCS) { 161 if (gotgctl & GOTGCTL_SESREQSCS) {
162 if (hsotg->params.phy_type == 162 if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
163 DWC2_PHY_TYPE_PARAM_FS 163 hsotg->params.i2c_enable) {
164 && hsotg->params.i2c_enable > 0) {
165 hsotg->srp_success = 1; 164 hsotg->srp_success = 1;
166 } else { 165 } else {
167 /* Clear Session Request */ 166 /* Clear Session Request */
@@ -317,7 +316,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
317 dwc2_writel(GINTSTS_SESSREQINT, hsotg->regs + GINTSTS); 316 dwc2_writel(GINTSTS_SESSREQINT, hsotg->regs + GINTSTS);
318 317
319 dev_dbg(hsotg->dev, "Session request interrupt - lx_state=%d\n", 318 dev_dbg(hsotg->dev, "Session request interrupt - lx_state=%d\n",
320 hsotg->lx_state); 319 hsotg->lx_state);
321 320
322 if (dwc2_is_device_mode(hsotg)) { 321 if (dwc2_is_device_mode(hsotg)) {
323 if (hsotg->lx_state == DWC2_L2) { 322 if (hsotg->lx_state == DWC2_L2) {
@@ -437,7 +436,7 @@ static void dwc2_handle_usb_suspend_intr(struct dwc2_hsotg *hsotg)
437 /* Ignore suspend request before enumeration */ 436 /* Ignore suspend request before enumeration */
438 if (!dwc2_is_device_connected(hsotg)) { 437 if (!dwc2_is_device_connected(hsotg)) {
439 dev_dbg(hsotg->dev, 438 dev_dbg(hsotg->dev,
440 "ignore suspend request before enumeration\n"); 439 "ignore suspend request before enumeration\n");
441 return; 440 return;
442 } 441 }
443 442
@@ -445,7 +444,7 @@ static void dwc2_handle_usb_suspend_intr(struct dwc2_hsotg *hsotg)
445 if (ret) { 444 if (ret) {
446 if (ret != -ENOTSUPP) 445 if (ret != -ENOTSUPP)
447 dev_err(hsotg->dev, 446 dev_err(hsotg->dev,
448 "enter hibernation failed\n"); 447 "enter hibernation failed\n");
449 goto skip_power_saving; 448 goto skip_power_saving;
450 } 449 }
451 450
diff --git a/drivers/usb/dwc2/debug.h b/drivers/usb/dwc2/debug.h
index 12dbd1daec87..8222783e6822 100644
--- a/drivers/usb/dwc2/debug.h
+++ b/drivers/usb/dwc2/debug.h
@@ -17,8 +17,8 @@
17#include "core.h" 17#include "core.h"
18 18
19#ifdef CONFIG_DEBUG_FS 19#ifdef CONFIG_DEBUG_FS
20extern int dwc2_debugfs_init(struct dwc2_hsotg *); 20int dwc2_debugfs_init(struct dwc2_hsotg *hsotg);
21extern void dwc2_debugfs_exit(struct dwc2_hsotg *); 21void dwc2_debugfs_exit(struct dwc2_hsotg *hsotg);
22#else 22#else
23static inline int dwc2_debugfs_init(struct dwc2_hsotg *hsotg) 23static inline int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
24{ return 0; } 24{ return 0; }
diff --git a/drivers/usb/dwc2/debugfs.c b/drivers/usb/dwc2/debugfs.c
index 0a130916a91c..794b959a7c8c 100644
--- a/drivers/usb/dwc2/debugfs.c
+++ b/drivers/usb/dwc2/debugfs.c
@@ -137,7 +137,7 @@ static int state_show(struct seq_file *seq, void *v)
137 int idx; 137 int idx;
138 138
139 seq_printf(seq, "DCFG=0x%08x, DCTL=0x%08x, DSTS=0x%08x\n", 139 seq_printf(seq, "DCFG=0x%08x, DCTL=0x%08x, DSTS=0x%08x\n",
140 dwc2_readl(regs + DCFG), 140 dwc2_readl(regs + DCFG),
141 dwc2_readl(regs + DCTL), 141 dwc2_readl(regs + DCTL),
142 dwc2_readl(regs + DSTS)); 142 dwc2_readl(regs + DSTS));
143 143
@@ -338,23 +338,23 @@ static void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg)
338{ 338{
339 struct dentry *root; 339 struct dentry *root;
340 struct dentry *file; 340 struct dentry *file;
341 unsigned epidx; 341 unsigned int epidx;
342 342
343 root = hsotg->debug_root; 343 root = hsotg->debug_root;
344 344
345 /* create general state file */ 345 /* create general state file */
346 346
347 file = debugfs_create_file("state", S_IRUGO, root, hsotg, &state_fops); 347 file = debugfs_create_file("state", 0444, root, hsotg, &state_fops);
348 if (IS_ERR(file)) 348 if (IS_ERR(file))
349 dev_err(hsotg->dev, "%s: failed to create state\n", __func__); 349 dev_err(hsotg->dev, "%s: failed to create state\n", __func__);
350 350
351 file = debugfs_create_file("testmode", S_IRUGO | S_IWUSR, root, hsotg, 351 file = debugfs_create_file("testmode", 0644, root, hsotg,
352 &testmode_fops); 352 &testmode_fops);
353 if (IS_ERR(file)) 353 if (IS_ERR(file))
354 dev_err(hsotg->dev, "%s: failed to create testmode\n", 354 dev_err(hsotg->dev, "%s: failed to create testmode\n",
355 __func__); 355 __func__);
356 356
357 file = debugfs_create_file("fifo", S_IRUGO, root, hsotg, &fifo_fops); 357 file = debugfs_create_file("fifo", 0444, root, hsotg, &fifo_fops);
358 if (IS_ERR(file)) 358 if (IS_ERR(file))
359 dev_err(hsotg->dev, "%s: failed to create fifo\n", __func__); 359 dev_err(hsotg->dev, "%s: failed to create fifo\n", __func__);
360 360
@@ -364,8 +364,8 @@ static void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg)
364 364
365 ep = hsotg->eps_out[epidx]; 365 ep = hsotg->eps_out[epidx];
366 if (ep) { 366 if (ep) {
367 file = debugfs_create_file(ep->name, S_IRUGO, 367 file = debugfs_create_file(ep->name, 0444,
368 root, ep, &ep_fops); 368 root, ep, &ep_fops);
369 if (IS_ERR(file)) 369 if (IS_ERR(file))
370 dev_err(hsotg->dev, "failed to create %s debug file\n", 370 dev_err(hsotg->dev, "failed to create %s debug file\n",
371 ep->name); 371 ep->name);
@@ -377,8 +377,8 @@ static void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg)
377 377
378 ep = hsotg->eps_in[epidx]; 378 ep = hsotg->eps_in[epidx];
379 if (ep) { 379 if (ep) {
380 file = debugfs_create_file(ep->name, S_IRUGO, 380 file = debugfs_create_file(ep->name, 0444,
381 root, ep, &ep_fops); 381 root, ep, &ep_fops);
382 if (IS_ERR(file)) 382 if (IS_ERR(file))
383 dev_err(hsotg->dev, "failed to create %s debug file\n", 383 dev_err(hsotg->dev, "failed to create %s debug file\n",
384 ep->name); 384 ep->name);
@@ -725,6 +725,143 @@ static const struct debugfs_reg32 dwc2_regs[] = {
725 dump_register(HCDMAB(15)), 725 dump_register(HCDMAB(15)),
726}; 726};
727 727
728#define print_param(_seq, _ptr, _param) \
729seq_printf((_seq), "%-30s: %d\n", #_param, (_ptr)->_param)
730
731#define print_param_hex(_seq, _ptr, _param) \
732seq_printf((_seq), "%-30s: 0x%x\n", #_param, (_ptr)->_param)
733
734static int params_show(struct seq_file *seq, void *v)
735{
736 struct dwc2_hsotg *hsotg = seq->private;
737 struct dwc2_core_params *p = &hsotg->params;
738 int i;
739
740 print_param(seq, p, otg_cap);
741 print_param(seq, p, dma_desc_enable);
742 print_param(seq, p, dma_desc_fs_enable);
743 print_param(seq, p, speed);
744 print_param(seq, p, enable_dynamic_fifo);
745 print_param(seq, p, en_multiple_tx_fifo);
746 print_param(seq, p, host_rx_fifo_size);
747 print_param(seq, p, host_nperio_tx_fifo_size);
748 print_param(seq, p, host_perio_tx_fifo_size);
749 print_param(seq, p, max_transfer_size);
750 print_param(seq, p, max_packet_count);
751 print_param(seq, p, host_channels);
752 print_param(seq, p, phy_type);
753 print_param(seq, p, phy_utmi_width);
754 print_param(seq, p, phy_ulpi_ddr);
755 print_param(seq, p, phy_ulpi_ext_vbus);
756 print_param(seq, p, i2c_enable);
757 print_param(seq, p, ulpi_fs_ls);
758 print_param(seq, p, host_support_fs_ls_low_power);
759 print_param(seq, p, host_ls_low_power_phy_clk);
760 print_param(seq, p, ts_dline);
761 print_param(seq, p, reload_ctl);
762 print_param_hex(seq, p, ahbcfg);
763 print_param(seq, p, uframe_sched);
764 print_param(seq, p, external_id_pin_ctl);
765 print_param(seq, p, hibernation);
766 print_param(seq, p, host_dma);
767 print_param(seq, p, g_dma);
768 print_param(seq, p, g_dma_desc);
769 print_param(seq, p, g_rx_fifo_size);
770 print_param(seq, p, g_np_tx_fifo_size);
771
772 for (i = 0; i < MAX_EPS_CHANNELS; i++) {
773 char str[32];
774
775 snprintf(str, 32, "g_tx_fifo_size[%d]", i);
776 seq_printf(seq, "%-30s: %d\n", str, p->g_tx_fifo_size[i]);
777 }
778
779 return 0;
780}
781
782static int params_open(struct inode *inode, struct file *file)
783{
784 return single_open(file, params_show, inode->i_private);
785}
786
787static const struct file_operations params_fops = {
788 .owner = THIS_MODULE,
789 .open = params_open,
790 .read = seq_read,
791 .llseek = seq_lseek,
792 .release = single_release,
793};
794
795static int hw_params_show(struct seq_file *seq, void *v)
796{
797 struct dwc2_hsotg *hsotg = seq->private;
798 struct dwc2_hw_params *hw = &hsotg->hw_params;
799
800 print_param(seq, hw, op_mode);
801 print_param(seq, hw, arch);
802 print_param(seq, hw, dma_desc_enable);
803 print_param(seq, hw, enable_dynamic_fifo);
804 print_param(seq, hw, en_multiple_tx_fifo);
805 print_param(seq, hw, rx_fifo_size);
806 print_param(seq, hw, host_nperio_tx_fifo_size);
807 print_param(seq, hw, dev_nperio_tx_fifo_size);
808 print_param(seq, hw, host_perio_tx_fifo_size);
809 print_param(seq, hw, nperio_tx_q_depth);
810 print_param(seq, hw, host_perio_tx_q_depth);
811 print_param(seq, hw, dev_token_q_depth);
812 print_param(seq, hw, max_transfer_size);
813 print_param(seq, hw, max_packet_count);
814 print_param(seq, hw, host_channels);
815 print_param(seq, hw, hs_phy_type);
816 print_param(seq, hw, fs_phy_type);
817 print_param(seq, hw, i2c_enable);
818 print_param(seq, hw, num_dev_ep);
819 print_param(seq, hw, num_dev_perio_in_ep);
820 print_param(seq, hw, total_fifo_size);
821 print_param(seq, hw, power_optimized);
822 print_param(seq, hw, utmi_phy_data_width);
823 print_param_hex(seq, hw, snpsid);
824 print_param_hex(seq, hw, dev_ep_dirs);
825
826 return 0;
827}
828
829static int hw_params_open(struct inode *inode, struct file *file)
830{
831 return single_open(file, hw_params_show, inode->i_private);
832}
833
834static const struct file_operations hw_params_fops = {
835 .owner = THIS_MODULE,
836 .open = hw_params_open,
837 .read = seq_read,
838 .llseek = seq_lseek,
839 .release = single_release,
840};
841
842static int dr_mode_show(struct seq_file *seq, void *v)
843{
844 struct dwc2_hsotg *hsotg = seq->private;
845 const char *dr_mode = "";
846
847 device_property_read_string(hsotg->dev, "dr_mode", &dr_mode);
848 seq_printf(seq, "%s\n", dr_mode);
849 return 0;
850}
851
852static int dr_mode_open(struct inode *inode, struct file *file)
853{
854 return single_open(file, dr_mode_show, inode->i_private);
855}
856
857static const struct file_operations dr_mode_fops = {
858 .owner = THIS_MODULE,
859 .open = dr_mode_open,
860 .read = seq_read,
861 .llseek = seq_lseek,
862 .release = single_release,
863};
864
728int dwc2_debugfs_init(struct dwc2_hsotg *hsotg) 865int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
729{ 866{
730 int ret; 867 int ret;
@@ -736,6 +873,25 @@ int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
736 goto err0; 873 goto err0;
737 } 874 }
738 875
876 file = debugfs_create_file("params", 0444,
877 hsotg->debug_root,
878 hsotg, &params_fops);
879 if (IS_ERR(file))
880 dev_err(hsotg->dev, "%s: failed to create params\n", __func__);
881
882 file = debugfs_create_file("hw_params", 0444,
883 hsotg->debug_root,
884 hsotg, &hw_params_fops);
885 if (IS_ERR(file))
886 dev_err(hsotg->dev, "%s: failed to create hw_params\n",
887 __func__);
888
889 file = debugfs_create_file("dr_mode", 0444,
890 hsotg->debug_root,
891 hsotg, &dr_mode_fops);
892 if (IS_ERR(file))
893 dev_err(hsotg->dev, "%s: failed to create dr_mode\n", __func__);
894
739 /* Add gadget debugfs nodes */ 895 /* Add gadget debugfs nodes */
740 dwc2_hsotg_create_debug(hsotg); 896 dwc2_hsotg_create_debug(hsotg);
741 897
@@ -750,8 +906,8 @@ int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
750 hsotg->regset->nregs = ARRAY_SIZE(dwc2_regs); 906 hsotg->regset->nregs = ARRAY_SIZE(dwc2_regs);
751 hsotg->regset->base = hsotg->regs; 907 hsotg->regset->base = hsotg->regs;
752 908
753 file = debugfs_create_regset32("regdump", S_IRUGO, hsotg->debug_root, 909 file = debugfs_create_regset32("regdump", 0444, hsotg->debug_root,
754 hsotg->regset); 910 hsotg->regset);
755 if (!file) { 911 if (!file) {
756 ret = -ENOMEM; 912 ret = -ENOMEM;
757 goto err1; 913 goto err1;
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 77c5fcf3a5bf..bc3b3fda5000 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -171,7 +171,7 @@ static void dwc2_hsotg_disable_gsint(struct dwc2_hsotg *hsotg, u32 ints)
171 * request. 171 * request.
172 */ 172 */
173static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg, 173static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg,
174 unsigned int ep, unsigned int dir_in, 174 unsigned int ep, unsigned int dir_in,
175 unsigned int en) 175 unsigned int en)
176{ 176{
177 unsigned long flags; 177 unsigned long flags;
@@ -192,6 +192,99 @@ static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg,
192} 192}
193 193
194/** 194/**
195 * dwc2_hsotg_tx_fifo_count - return count of TX FIFOs in device mode
196 */
197int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg)
198{
199 if (hsotg->hw_params.en_multiple_tx_fifo)
200 /* In dedicated FIFO mode we need count of IN EPs */
201 return (dwc2_readl(hsotg->regs + GHWCFG4) &
202 GHWCFG4_NUM_IN_EPS_MASK) >> GHWCFG4_NUM_IN_EPS_SHIFT;
203 else
204 /* In shared FIFO mode we need count of Periodic IN EPs */
205 return hsotg->hw_params.num_dev_perio_in_ep;
206}
207
208/**
209 * dwc2_hsotg_ep_info_size - return Endpoint Info Control block size in DWORDs
210 */
211static int dwc2_hsotg_ep_info_size(struct dwc2_hsotg *hsotg)
212{
213 int val = 0;
214 int i;
215 u32 ep_dirs;
216
217 /*
218 * Don't need additional space for ep info control registers in
219 * slave mode.
220 */
221 if (!using_dma(hsotg)) {
222 dev_dbg(hsotg->dev, "Buffer DMA ep info size 0\n");
223 return 0;
224 }
225
226 /*
227 * Buffer DMA mode - 1 location per endpoit
228 * Descriptor DMA mode - 4 locations per endpoint
229 */
230 ep_dirs = hsotg->hw_params.dev_ep_dirs;
231
232 for (i = 0; i <= hsotg->hw_params.num_dev_ep; i++) {
233 val += ep_dirs & 3 ? 1 : 2;
234 ep_dirs >>= 2;
235 }
236
237 if (using_desc_dma(hsotg))
238 val = val * 4;
239
240 return val;
241}
242
243/**
244 * dwc2_hsotg_tx_fifo_total_depth - return total FIFO depth available for
245 * device mode TX FIFOs
246 */
247int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
248{
249 int ep_info_size;
250 int addr;
251 int tx_addr_max;
252 u32 np_tx_fifo_size;
253
254 np_tx_fifo_size = min_t(u32, hsotg->hw_params.dev_nperio_tx_fifo_size,
255 hsotg->params.g_np_tx_fifo_size);
256
257 /* Get Endpoint Info Control block size in DWORDs. */
258 ep_info_size = dwc2_hsotg_ep_info_size(hsotg);
259 tx_addr_max = hsotg->hw_params.total_fifo_size - ep_info_size;
260
261 addr = hsotg->params.g_rx_fifo_size + np_tx_fifo_size;
262 if (tx_addr_max <= addr)
263 return 0;
264
265 return tx_addr_max - addr;
266}
267
268/**
269 * dwc2_hsotg_tx_fifo_average_depth - returns average depth of device mode
270 * TX FIFOs
271 */
272int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg)
273{
274 int tx_fifo_count;
275 int tx_fifo_depth;
276
277 tx_fifo_depth = dwc2_hsotg_tx_fifo_total_depth(hsotg);
278
279 tx_fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
280
281 if (!tx_fifo_count)
282 return tx_fifo_depth;
283 else
284 return tx_fifo_depth / tx_fifo_count;
285}
286
287/**
195 * dwc2_hsotg_init_fifo - initialise non-periodic FIFOs 288 * dwc2_hsotg_init_fifo - initialise non-periodic FIFOs
196 * @hsotg: The device instance. 289 * @hsotg: The device instance.
197 */ 290 */
@@ -241,6 +334,9 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
241 val = dwc2_readl(hsotg->regs + DPTXFSIZN(ep)); 334 val = dwc2_readl(hsotg->regs + DPTXFSIZN(ep));
242 } 335 }
243 336
337 dwc2_writel(hsotg->hw_params.total_fifo_size |
338 addr << GDFIFOCFG_EPINFOBASE_SHIFT,
339 hsotg->regs + GDFIFOCFG);
244 /* 340 /*
245 * according to p428 of the design guide, we need to ensure that 341 * according to p428 of the design guide, we need to ensure that
246 * all fifos are flushed before continuing 342 * all fifos are flushed before continuing
@@ -277,11 +373,11 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
277 * Allocate a new USB request structure appropriate for the specified endpoint 373 * Allocate a new USB request structure appropriate for the specified endpoint
278 */ 374 */
279static struct usb_request *dwc2_hsotg_ep_alloc_request(struct usb_ep *ep, 375static struct usb_request *dwc2_hsotg_ep_alloc_request(struct usb_ep *ep,
280 gfp_t flags) 376 gfp_t flags)
281{ 377{
282 struct dwc2_hsotg_req *req; 378 struct dwc2_hsotg_req *req;
283 379
284 req = kzalloc(sizeof(struct dwc2_hsotg_req), flags); 380 req = kzalloc(sizeof(*req), flags);
285 if (!req) 381 if (!req)
286 return NULL; 382 return NULL;
287 383
@@ -312,10 +408,11 @@ static inline int is_ep_periodic(struct dwc2_hsotg_ep *hs_ep)
312 * of a request to ensure the buffer is ready for access by the caller. 408 * of a request to ensure the buffer is ready for access by the caller.
313 */ 409 */
314static void dwc2_hsotg_unmap_dma(struct dwc2_hsotg *hsotg, 410static void dwc2_hsotg_unmap_dma(struct dwc2_hsotg *hsotg,
315 struct dwc2_hsotg_ep *hs_ep, 411 struct dwc2_hsotg_ep *hs_ep,
316 struct dwc2_hsotg_req *hs_req) 412 struct dwc2_hsotg_req *hs_req)
317{ 413{
318 struct usb_request *req = &hs_req->req; 414 struct usb_request *req = &hs_req->req;
415
319 usb_gadget_unmap_request(&hsotg->gadget, req, hs_ep->dir_in); 416 usb_gadget_unmap_request(&hsotg->gadget, req, hs_ep->dir_in);
320} 417}
321 418
@@ -384,7 +481,7 @@ fail:
384 * This routine is only needed for PIO 481 * This routine is only needed for PIO
385 */ 482 */
386static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg, 483static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg,
387 struct dwc2_hsotg_ep *hs_ep, 484 struct dwc2_hsotg_ep *hs_ep,
388 struct dwc2_hsotg_req *hs_req) 485 struct dwc2_hsotg_req *hs_req)
389{ 486{
390 bool periodic = is_ep_periodic(hs_ep); 487 bool periodic = is_ep_periodic(hs_ep);
@@ -466,7 +563,7 @@ static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg,
466 max_transfer = hs_ep->ep.maxpacket * hs_ep->mc; 563 max_transfer = hs_ep->ep.maxpacket * hs_ep->mc;
467 564
468 dev_dbg(hsotg->dev, "%s: GNPTXSTS=%08x, can=%d, to=%d, max_transfer %d\n", 565 dev_dbg(hsotg->dev, "%s: GNPTXSTS=%08x, can=%d, to=%d, max_transfer %d\n",
469 __func__, gnptxsts, can_write, to_write, max_transfer); 566 __func__, gnptxsts, can_write, to_write, max_transfer);
470 567
471 /* 568 /*
472 * limit to 512 bytes of data, it seems at least on the non-periodic 569 * limit to 512 bytes of data, it seems at least on the non-periodic
@@ -487,7 +584,7 @@ static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg,
487 /* it's needed only when we do not use dedicated fifos */ 584 /* it's needed only when we do not use dedicated fifos */
488 if (!hsotg->dedicated_fifos) 585 if (!hsotg->dedicated_fifos)
489 dwc2_hsotg_en_gsint(hsotg, 586 dwc2_hsotg_en_gsint(hsotg,
490 periodic ? GINTSTS_PTXFEMP : 587 periodic ? GINTSTS_PTXFEMP :
491 GINTSTS_NPTXFEMP); 588 GINTSTS_NPTXFEMP);
492 } 589 }
493 590
@@ -516,12 +613,12 @@ static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg,
516 /* it's needed only when we do not use dedicated fifos */ 613 /* it's needed only when we do not use dedicated fifos */
517 if (!hsotg->dedicated_fifos) 614 if (!hsotg->dedicated_fifos)
518 dwc2_hsotg_en_gsint(hsotg, 615 dwc2_hsotg_en_gsint(hsotg,
519 periodic ? GINTSTS_PTXFEMP : 616 periodic ? GINTSTS_PTXFEMP :
520 GINTSTS_NPTXFEMP); 617 GINTSTS_NPTXFEMP);
521 } 618 }
522 619
523 dev_dbg(hsotg->dev, "write %d/%d, can_write %d, done %d\n", 620 dev_dbg(hsotg->dev, "write %d/%d, can_write %d, done %d\n",
524 to_write, hs_req->req.length, can_write, buf_pos); 621 to_write, hs_req->req.length, can_write, buf_pos);
525 622
526 if (to_write <= 0) 623 if (to_write <= 0)
527 return -ENOSPC; 624 return -ENOSPC;
@@ -547,17 +644,17 @@ static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg,
547 * Return the maximum data that can be queued in one go on a given endpoint 644 * Return the maximum data that can be queued in one go on a given endpoint
548 * so that transfers that are too long can be split. 645 * so that transfers that are too long can be split.
549 */ 646 */
550static unsigned get_ep_limit(struct dwc2_hsotg_ep *hs_ep) 647static unsigned int get_ep_limit(struct dwc2_hsotg_ep *hs_ep)
551{ 648{
552 int index = hs_ep->index; 649 int index = hs_ep->index;
553 unsigned maxsize; 650 unsigned int maxsize;
554 unsigned maxpkt; 651 unsigned int maxpkt;
555 652
556 if (index != 0) { 653 if (index != 0) {
557 maxsize = DXEPTSIZ_XFERSIZE_LIMIT + 1; 654 maxsize = DXEPTSIZ_XFERSIZE_LIMIT + 1;
558 maxpkt = DXEPTSIZ_PKTCNT_LIMIT + 1; 655 maxpkt = DXEPTSIZ_PKTCNT_LIMIT + 1;
559 } else { 656 } else {
560 maxsize = 64+64; 657 maxsize = 64 + 64;
561 if (hs_ep->dir_in) 658 if (hs_ep->dir_in)
562 maxpkt = DIEPTSIZ0_PKTCNT_LIMIT + 1; 659 maxpkt = DIEPTSIZ0_PKTCNT_LIMIT + 1;
563 else 660 else
@@ -580,11 +677,11 @@ static unsigned get_ep_limit(struct dwc2_hsotg_ep *hs_ep)
580} 677}
581 678
582/** 679/**
583* dwc2_hsotg_read_frameno - read current frame number 680 * dwc2_hsotg_read_frameno - read current frame number
584* @hsotg: The device instance 681 * @hsotg: The device instance
585* 682 *
586* Return the current frame number 683 * Return the current frame number
587*/ 684 */
588static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg) 685static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg)
589{ 686{
590 u32 dsts; 687 u32 dsts;
@@ -874,7 +971,7 @@ static void dwc2_gadget_start_isoc_ddma(struct dwc2_hsotg_ep *hs_ep)
874 * appropriately, and writing any data to the FIFOs. 971 * appropriately, and writing any data to the FIFOs.
875 */ 972 */
876static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg, 973static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
877 struct dwc2_hsotg_ep *hs_ep, 974 struct dwc2_hsotg_ep *hs_ep,
878 struct dwc2_hsotg_req *hs_req, 975 struct dwc2_hsotg_req *hs_req,
879 bool continuing) 976 bool continuing)
880{ 977{
@@ -885,9 +982,9 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
885 u32 epsize_reg; 982 u32 epsize_reg;
886 u32 epsize; 983 u32 epsize;
887 u32 ctrl; 984 u32 ctrl;
888 unsigned length; 985 unsigned int length;
889 unsigned packets; 986 unsigned int packets;
890 unsigned maxreq; 987 unsigned int maxreq;
891 unsigned int dma_reg; 988 unsigned int dma_reg;
892 989
893 if (index != 0) { 990 if (index != 0) {
@@ -966,7 +1063,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
966 if (dir_in && ureq->zero && !continuing) { 1063 if (dir_in && ureq->zero && !continuing) {
967 /* Test if zlp is actually required. */ 1064 /* Test if zlp is actually required. */
968 if ((ureq->length >= hs_ep->ep.maxpacket) && 1065 if ((ureq->length >= hs_ep->ep.maxpacket) &&
969 !(ureq->length % hs_ep->ep.maxpacket)) 1066 !(ureq->length % hs_ep->ep.maxpacket))
970 hs_ep->send_zlp = 1; 1067 hs_ep->send_zlp = 1;
971 } 1068 }
972 1069
@@ -1070,7 +1167,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
1070 /* check ep is enabled */ 1167 /* check ep is enabled */
1071 if (!(dwc2_readl(hsotg->regs + epctrl_reg) & DXEPCTL_EPENA)) 1168 if (!(dwc2_readl(hsotg->regs + epctrl_reg) & DXEPCTL_EPENA))
1072 dev_dbg(hsotg->dev, 1169 dev_dbg(hsotg->dev,
1073 "ep%d: failed to become enabled (DXEPCTL=0x%08x)?\n", 1170 "ep%d: failed to become enabled (DXEPCTL=0x%08x)?\n",
1074 index, dwc2_readl(hsotg->regs + epctrl_reg)); 1171 index, dwc2_readl(hsotg->regs + epctrl_reg));
1075 1172
1076 dev_dbg(hsotg->dev, "%s: DXEPCTL=0x%08x\n", 1173 dev_dbg(hsotg->dev, "%s: DXEPCTL=0x%08x\n",
@@ -1093,7 +1190,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
1093 * cleanup on completion. 1190 * cleanup on completion.
1094 */ 1191 */
1095static int dwc2_hsotg_map_dma(struct dwc2_hsotg *hsotg, 1192static int dwc2_hsotg_map_dma(struct dwc2_hsotg *hsotg,
1096 struct dwc2_hsotg_ep *hs_ep, 1193 struct dwc2_hsotg_ep *hs_ep,
1097 struct usb_request *req) 1194 struct usb_request *req)
1098{ 1195{
1099 int ret; 1196 int ret;
@@ -1112,7 +1209,8 @@ dma_error:
1112} 1209}
1113 1210
1114static int dwc2_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg, 1211static int dwc2_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg,
1115 struct dwc2_hsotg_ep *hs_ep, struct dwc2_hsotg_req *hs_req) 1212 struct dwc2_hsotg_ep *hs_ep,
1213 struct dwc2_hsotg_req *hs_req)
1116{ 1214{
1117 void *req_buf = hs_req->req.buf; 1215 void *req_buf = hs_req->req.buf;
1118 1216
@@ -1123,7 +1221,7 @@ static int dwc2_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg,
1123 WARN_ON(hs_req->saved_req_buf); 1221 WARN_ON(hs_req->saved_req_buf);
1124 1222
1125 dev_dbg(hsotg->dev, "%s: %s: buf=%p length=%d\n", __func__, 1223 dev_dbg(hsotg->dev, "%s: %s: buf=%p length=%d\n", __func__,
1126 hs_ep->ep.name, req_buf, hs_req->req.length); 1224 hs_ep->ep.name, req_buf, hs_req->req.length);
1127 1225
1128 hs_req->req.buf = kmalloc(hs_req->req.length, GFP_ATOMIC); 1226 hs_req->req.buf = kmalloc(hs_req->req.length, GFP_ATOMIC);
1129 if (!hs_req->req.buf) { 1227 if (!hs_req->req.buf) {
@@ -1142,8 +1240,10 @@ static int dwc2_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg,
1142 return 0; 1240 return 0;
1143} 1241}
1144 1242
1145static void dwc2_hsotg_handle_unaligned_buf_complete(struct dwc2_hsotg *hsotg, 1243static void
1146 struct dwc2_hsotg_ep *hs_ep, struct dwc2_hsotg_req *hs_req) 1244dwc2_hsotg_handle_unaligned_buf_complete(struct dwc2_hsotg *hsotg,
1245 struct dwc2_hsotg_ep *hs_ep,
1246 struct dwc2_hsotg_req *hs_req)
1147{ 1247{
1148 /* If dma is not being used or buffer was aligned */ 1248 /* If dma is not being used or buffer was aligned */
1149 if (!using_dma(hsotg) || !hs_req->saved_req_buf) 1249 if (!using_dma(hsotg) || !hs_req->saved_req_buf)
@@ -1155,7 +1255,7 @@ static void dwc2_hsotg_handle_unaligned_buf_complete(struct dwc2_hsotg *hsotg,
1155 /* Copy data from bounce buffer on successful out transfer */ 1255 /* Copy data from bounce buffer on successful out transfer */
1156 if (!hs_ep->dir_in && !hs_req->req.status) 1256 if (!hs_ep->dir_in && !hs_req->req.status)
1157 memcpy(hs_req->saved_req_buf, hs_req->req.buf, 1257 memcpy(hs_req->saved_req_buf, hs_req->req.buf,
1158 hs_req->req.actual); 1258 hs_req->req.actual);
1159 1259
1160 /* Free bounce buffer */ 1260 /* Free bounce buffer */
1161 kfree(hs_req->req.buf); 1261 kfree(hs_req->req.buf);
@@ -1224,7 +1324,7 @@ static int dwc2_gadget_set_ep0_desc_chain(struct dwc2_hsotg *hsotg,
1224} 1324}
1225 1325
1226static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req, 1326static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req,
1227 gfp_t gfp_flags) 1327 gfp_t gfp_flags)
1228{ 1328{
1229 struct dwc2_hsotg_req *hs_req = our_req(req); 1329 struct dwc2_hsotg_req *hs_req = our_req(req);
1230 struct dwc2_hsotg_ep *hs_ep = our_ep(ep); 1330 struct dwc2_hsotg_ep *hs_ep = our_ep(ep);
@@ -1239,7 +1339,7 @@ static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req,
1239 /* Prevent new request submission when controller is suspended */ 1339 /* Prevent new request submission when controller is suspended */
1240 if (hs->lx_state == DWC2_L2) { 1340 if (hs->lx_state == DWC2_L2) {
1241 dev_dbg(hs->dev, "%s: don't submit request while suspended\n", 1341 dev_dbg(hs->dev, "%s: don't submit request while suspended\n",
1242 __func__); 1342 __func__);
1243 return -EAGAIN; 1343 return -EAGAIN;
1244 } 1344 }
1245 1345
@@ -1300,7 +1400,7 @@ static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req,
1300} 1400}
1301 1401
1302static int dwc2_hsotg_ep_queue_lock(struct usb_ep *ep, struct usb_request *req, 1402static int dwc2_hsotg_ep_queue_lock(struct usb_ep *ep, struct usb_request *req,
1303 gfp_t gfp_flags) 1403 gfp_t gfp_flags)
1304{ 1404{
1305 struct dwc2_hsotg_ep *hs_ep = our_ep(ep); 1405 struct dwc2_hsotg_ep *hs_ep = our_ep(ep);
1306 struct dwc2_hsotg *hs = hs_ep->parent; 1406 struct dwc2_hsotg *hs = hs_ep->parent;
@@ -1315,7 +1415,7 @@ static int dwc2_hsotg_ep_queue_lock(struct usb_ep *ep, struct usb_request *req,
1315} 1415}
1316 1416
1317static void dwc2_hsotg_ep_free_request(struct usb_ep *ep, 1417static void dwc2_hsotg_ep_free_request(struct usb_ep *ep,
1318 struct usb_request *req) 1418 struct usb_request *req)
1319{ 1419{
1320 struct dwc2_hsotg_req *hs_req = our_req(req); 1420 struct dwc2_hsotg_req *hs_req = our_req(req);
1321 1421
@@ -1331,7 +1431,7 @@ static void dwc2_hsotg_ep_free_request(struct usb_ep *ep,
1331 * submitted that need cleaning up. 1431 * submitted that need cleaning up.
1332 */ 1432 */
1333static void dwc2_hsotg_complete_oursetup(struct usb_ep *ep, 1433static void dwc2_hsotg_complete_oursetup(struct usb_ep *ep,
1334 struct usb_request *req) 1434 struct usb_request *req)
1335{ 1435{
1336 struct dwc2_hsotg_ep *hs_ep = our_ep(ep); 1436 struct dwc2_hsotg_ep *hs_ep = our_ep(ep);
1337 struct dwc2_hsotg *hsotg = hs_ep->parent; 1437 struct dwc2_hsotg *hsotg = hs_ep->parent;
@@ -1350,7 +1450,7 @@ static void dwc2_hsotg_complete_oursetup(struct usb_ep *ep,
1350 * structure, or return NULL if it is not a valid endpoint. 1450 * structure, or return NULL if it is not a valid endpoint.
1351 */ 1451 */
1352static struct dwc2_hsotg_ep *ep_from_windex(struct dwc2_hsotg *hsotg, 1452static struct dwc2_hsotg_ep *ep_from_windex(struct dwc2_hsotg *hsotg,
1353 u32 windex) 1453 u32 windex)
1354{ 1454{
1355 struct dwc2_hsotg_ep *ep; 1455 struct dwc2_hsotg_ep *ep;
1356 int dir = (windex & USB_DIR_IN) ? 1 : 0; 1456 int dir = (windex & USB_DIR_IN) ? 1 : 0;
@@ -1407,7 +1507,7 @@ int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode)
1407 * an internal method of sending replies to certain control requests, etc. 1507 * an internal method of sending replies to certain control requests, etc.
1408 */ 1508 */
1409static int dwc2_hsotg_send_reply(struct dwc2_hsotg *hsotg, 1509static int dwc2_hsotg_send_reply(struct dwc2_hsotg *hsotg,
1410 struct dwc2_hsotg_ep *ep, 1510 struct dwc2_hsotg_ep *ep,
1411 void *buff, 1511 void *buff,
1412 int length) 1512 int length)
1413{ 1513{
@@ -1450,7 +1550,7 @@ static int dwc2_hsotg_send_reply(struct dwc2_hsotg *hsotg,
1450 * @ctrl: USB control request 1550 * @ctrl: USB control request
1451 */ 1551 */
1452static int dwc2_hsotg_process_req_status(struct dwc2_hsotg *hsotg, 1552static int dwc2_hsotg_process_req_status(struct dwc2_hsotg *hsotg,
1453 struct usb_ctrlrequest *ctrl) 1553 struct usb_ctrlrequest *ctrl)
1454{ 1554{
1455 struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; 1555 struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0];
1456 struct dwc2_hsotg_ep *ep; 1556 struct dwc2_hsotg_ep *ep;
@@ -1466,8 +1566,11 @@ static int dwc2_hsotg_process_req_status(struct dwc2_hsotg *hsotg,
1466 1566
1467 switch (ctrl->bRequestType & USB_RECIP_MASK) { 1567 switch (ctrl->bRequestType & USB_RECIP_MASK) {
1468 case USB_RECIP_DEVICE: 1568 case USB_RECIP_DEVICE:
1469 reply = cpu_to_le16(0); /* bit 0 => self powered, 1569 /*
1470 * bit 1 => remote wakeup */ 1570 * bit 0 => self powered
1571 * bit 1 => remote wakeup
1572 */
1573 reply = cpu_to_le16(0);
1471 break; 1574 break;
1472 1575
1473 case USB_RECIP_INTERFACE: 1576 case USB_RECIP_INTERFACE:
@@ -1555,7 +1658,7 @@ static void dwc2_gadget_start_next_request(struct dwc2_hsotg_ep *hs_ep)
1555 * @ctrl: USB control request 1658 * @ctrl: USB control request
1556 */ 1659 */
1557static int dwc2_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, 1660static int dwc2_hsotg_process_req_feature(struct dwc2_hsotg *hsotg,
1558 struct usb_ctrlrequest *ctrl) 1661 struct usb_ctrlrequest *ctrl)
1559{ 1662{
1560 struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; 1663 struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0];
1561 struct dwc2_hsotg_req *hs_req; 1664 struct dwc2_hsotg_req *hs_req;
@@ -1640,9 +1743,8 @@ static int dwc2_hsotg_process_req_feature(struct dwc2_hsotg *hsotg,
1640 } 1743 }
1641 1744
1642 /* If we have pending request, then start it */ 1745 /* If we have pending request, then start it */
1643 if (!ep->req) { 1746 if (!ep->req)
1644 dwc2_gadget_start_next_request(ep); 1747 dwc2_gadget_start_next_request(ep);
1645 }
1646 } 1748 }
1647 1749
1648 break; 1750 break;
@@ -1705,7 +1807,7 @@ static void dwc2_hsotg_stall_ep0(struct dwc2_hsotg *hsotg)
1705 * gadget driver). 1807 * gadget driver).
1706 */ 1808 */
1707static void dwc2_hsotg_process_control(struct dwc2_hsotg *hsotg, 1809static void dwc2_hsotg_process_control(struct dwc2_hsotg *hsotg,
1708 struct usb_ctrlrequest *ctrl) 1810 struct usb_ctrlrequest *ctrl)
1709{ 1811{
1710 struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; 1812 struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0];
1711 int ret = 0; 1813 int ret = 0;
@@ -1781,7 +1883,7 @@ static void dwc2_hsotg_process_control(struct dwc2_hsotg *hsotg,
1781 * EP0 setup packets 1883 * EP0 setup packets
1782 */ 1884 */
1783static void dwc2_hsotg_complete_setup(struct usb_ep *ep, 1885static void dwc2_hsotg_complete_setup(struct usb_ep *ep,
1784 struct usb_request *req) 1886 struct usb_request *req)
1785{ 1887{
1786 struct dwc2_hsotg_ep *hs_ep = our_ep(ep); 1888 struct dwc2_hsotg_ep *hs_ep = our_ep(ep);
1787 struct dwc2_hsotg *hsotg = hs_ep->parent; 1889 struct dwc2_hsotg *hsotg = hs_ep->parent;
@@ -1839,7 +1941,7 @@ static void dwc2_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg)
1839} 1941}
1840 1942
1841static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg, 1943static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg,
1842 struct dwc2_hsotg_ep *hs_ep) 1944 struct dwc2_hsotg_ep *hs_ep)
1843{ 1945{
1844 u32 ctrl; 1946 u32 ctrl;
1845 u8 index = hs_ep->index; 1947 u8 index = hs_ep->index;
@@ -1885,11 +1987,10 @@ static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg,
1885 * Note, expects the ep to already be locked as appropriate. 1987 * Note, expects the ep to already be locked as appropriate.
1886 */ 1988 */
1887static void dwc2_hsotg_complete_request(struct dwc2_hsotg *hsotg, 1989static void dwc2_hsotg_complete_request(struct dwc2_hsotg *hsotg,
1888 struct dwc2_hsotg_ep *hs_ep, 1990 struct dwc2_hsotg_ep *hs_ep,
1889 struct dwc2_hsotg_req *hs_req, 1991 struct dwc2_hsotg_req *hs_req,
1890 int result) 1992 int result)
1891{ 1993{
1892
1893 if (!hs_req) { 1994 if (!hs_req) {
1894 dev_dbg(hsotg->dev, "%s: nothing to complete?\n", __func__); 1995 dev_dbg(hsotg->dev, "%s: nothing to complete?\n", __func__);
1895 return; 1996 return;
@@ -1935,9 +2036,8 @@ static void dwc2_hsotg_complete_request(struct dwc2_hsotg *hsotg,
1935 * so be careful when doing this. 2036 * so be careful when doing this.
1936 */ 2037 */
1937 2038
1938 if (!hs_ep->req && result >= 0) { 2039 if (!hs_ep->req && result >= 0)
1939 dwc2_gadget_start_next_request(hs_ep); 2040 dwc2_gadget_start_next_request(hs_ep);
1940 }
1941} 2041}
1942 2042
1943/* 2043/*
@@ -2068,13 +2168,12 @@ static void dwc2_hsotg_rx_data(struct dwc2_hsotg *hsotg, int ep_idx, int size)
2068 int max_req; 2168 int max_req;
2069 int read_ptr; 2169 int read_ptr;
2070 2170
2071
2072 if (!hs_req) { 2171 if (!hs_req) {
2073 u32 epctl = dwc2_readl(hsotg->regs + DOEPCTL(ep_idx)); 2172 u32 epctl = dwc2_readl(hsotg->regs + DOEPCTL(ep_idx));
2074 int ptr; 2173 int ptr;
2075 2174
2076 dev_dbg(hsotg->dev, 2175 dev_dbg(hsotg->dev,
2077 "%s: FIFO %d bytes on ep%d but no req (DXEPCTl=0x%08x)\n", 2176 "%s: FIFO %d bytes on ep%d but no req (DXEPCTl=0x%08x)\n",
2078 __func__, size, ep_idx, epctl); 2177 __func__, size, ep_idx, epctl);
2079 2178
2080 /* dump the data from the FIFO, we've nothing we can do */ 2179 /* dump the data from the FIFO, we've nothing we can do */
@@ -2134,7 +2233,7 @@ static void dwc2_hsotg_ep0_zlp(struct dwc2_hsotg *hsotg, bool dir_in)
2134} 2233}
2135 2234
2136static void dwc2_hsotg_change_ep_iso_parity(struct dwc2_hsotg *hsotg, 2235static void dwc2_hsotg_change_ep_iso_parity(struct dwc2_hsotg *hsotg,
2137 u32 epctl_reg) 2236 u32 epctl_reg)
2138{ 2237{
2139 u32 ctrl; 2238 u32 ctrl;
2140 2239
@@ -2191,7 +2290,7 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
2191 struct dwc2_hsotg_ep *hs_ep = hsotg->eps_out[epnum]; 2290 struct dwc2_hsotg_ep *hs_ep = hsotg->eps_out[epnum];
2192 struct dwc2_hsotg_req *hs_req = hs_ep->req; 2291 struct dwc2_hsotg_req *hs_req = hs_ep->req;
2193 struct usb_request *req = &hs_req->req; 2292 struct usb_request *req = &hs_req->req;
2194 unsigned size_left = DXEPTSIZ_XFERSIZE_GET(epsize); 2293 unsigned int size_left = DXEPTSIZ_XFERSIZE_GET(epsize);
2195 int result = 0; 2294 int result = 0;
2196 2295
2197 if (!hs_req) { 2296 if (!hs_req) {
@@ -2210,7 +2309,7 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
2210 size_left = dwc2_gadget_get_xfersize_ddma(hs_ep); 2309 size_left = dwc2_gadget_get_xfersize_ddma(hs_ep);
2211 2310
2212 if (using_dma(hsotg)) { 2311 if (using_dma(hsotg)) {
2213 unsigned size_done; 2312 unsigned int size_done;
2214 2313
2215 /* 2314 /*
2216 * Calculate the size of the transfer by checking how much 2315 * Calculate the size of the transfer by checking how much
@@ -2295,7 +2394,7 @@ static void dwc2_hsotg_handle_rx(struct dwc2_hsotg *hsotg)
2295 size >>= GRXSTS_BYTECNT_SHIFT; 2394 size >>= GRXSTS_BYTECNT_SHIFT;
2296 2395
2297 dev_dbg(hsotg->dev, "%s: GRXSTSP=0x%08x (%d@%d)\n", 2396 dev_dbg(hsotg->dev, "%s: GRXSTSP=0x%08x (%d@%d)\n",
2298 __func__, grxstsr, size, epnum); 2397 __func__, grxstsr, size, epnum);
2299 2398
2300 switch ((status & GRXSTS_PKTSTS_MASK) >> GRXSTS_PKTSTS_SHIFT) { 2399 switch ((status & GRXSTS_PKTSTS_MASK) >> GRXSTS_PKTSTS_SHIFT) {
2301 case GRXSTS_PKTSTS_GLOBALOUTNAK: 2400 case GRXSTS_PKTSTS_GLOBALOUTNAK:
@@ -2470,7 +2569,7 @@ static void dwc2_hsotg_txfifo_flush(struct dwc2_hsotg *hsotg, unsigned int idx)
2470 * make an attempt to write data into the FIFO. 2569 * make an attempt to write data into the FIFO.
2471 */ 2570 */
2472static int dwc2_hsotg_trytx(struct dwc2_hsotg *hsotg, 2571static int dwc2_hsotg_trytx(struct dwc2_hsotg *hsotg,
2473 struct dwc2_hsotg_ep *hs_ep) 2572 struct dwc2_hsotg_ep *hs_ep)
2474{ 2573{
2475 struct dwc2_hsotg_req *hs_req = hs_ep->req; 2574 struct dwc2_hsotg_req *hs_req = hs_ep->req;
2476 2575
@@ -2481,7 +2580,7 @@ static int dwc2_hsotg_trytx(struct dwc2_hsotg *hsotg,
2481 */ 2580 */
2482 if (hs_ep->index != 0) 2581 if (hs_ep->index != 0)
2483 dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index, 2582 dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index,
2484 hs_ep->dir_in, 0); 2583 hs_ep->dir_in, 0);
2485 return 0; 2584 return 0;
2486 } 2585 }
2487 2586
@@ -2503,7 +2602,7 @@ static int dwc2_hsotg_trytx(struct dwc2_hsotg *hsotg,
2503 * call the relevant completion routines. 2602 * call the relevant completion routines.
2504 */ 2603 */
2505static void dwc2_hsotg_complete_in(struct dwc2_hsotg *hsotg, 2604static void dwc2_hsotg_complete_in(struct dwc2_hsotg *hsotg,
2506 struct dwc2_hsotg_ep *hs_ep) 2605 struct dwc2_hsotg_ep *hs_ep)
2507{ 2606{
2508 struct dwc2_hsotg_req *hs_req = hs_ep->req; 2607 struct dwc2_hsotg_req *hs_req = hs_ep->req;
2509 u32 epsize = dwc2_readl(hsotg->regs + DIEPTSIZ(hs_ep->index)); 2608 u32 epsize = dwc2_readl(hsotg->regs + DIEPTSIZ(hs_ep->index));
@@ -2531,7 +2630,7 @@ static void dwc2_hsotg_complete_in(struct dwc2_hsotg *hsotg,
2531 ret = dwc2_hsotg_set_test_mode(hsotg, hsotg->test_mode); 2630 ret = dwc2_hsotg_set_test_mode(hsotg, hsotg->test_mode);
2532 if (ret < 0) { 2631 if (ret < 0) {
2533 dev_dbg(hsotg->dev, "Invalid Test #%d\n", 2632 dev_dbg(hsotg->dev, "Invalid Test #%d\n",
2534 hsotg->test_mode); 2633 hsotg->test_mode);
2535 dwc2_hsotg_stall_ep0(hsotg); 2634 dwc2_hsotg_stall_ep0(hsotg);
2536 return; 2635 return;
2537 } 2636 }
@@ -2751,19 +2850,19 @@ static void dwc2_gadget_handle_out_token_ep_disabled(struct dwc2_hsotg_ep *ep)
2751} 2850}
2752 2851
2753/** 2852/**
2754* dwc2_gadget_handle_nak - handle NAK interrupt 2853 * dwc2_gadget_handle_nak - handle NAK interrupt
2755* @hs_ep: The endpoint on which interrupt is asserted. 2854 * @hs_ep: The endpoint on which interrupt is asserted.
2756* 2855 *
2757* This is starting point for ISOC-IN transfer, synchronization done with 2856 * This is starting point for ISOC-IN transfer, synchronization done with
2758* first IN token received from host while corresponding EP is disabled. 2857 * first IN token received from host while corresponding EP is disabled.
2759* 2858 *
2760* Device does not know when first one token will arrive from host. On first 2859 * Device does not know when first one token will arrive from host. On first
2761* token arrival HW generates 2 interrupts: 'in token received while FIFO empty' 2860 * token arrival HW generates 2 interrupts: 'in token received while FIFO empty'
2762* and 'NAK'. NAK interrupt for ISOC-IN means that token has arrived and ZLP was 2861 * and 'NAK'. NAK interrupt for ISOC-IN means that token has arrived and ZLP was
2763* sent in response to that as there was no data in FIFO. SW is basing on this 2862 * sent in response to that as there was no data in FIFO. SW is basing on this
2764* interrupt to obtain frame in which token has come and then based on the 2863 * interrupt to obtain frame in which token has come and then based on the
2765* interval calculates next frame for transfer. 2864 * interval calculates next frame for transfer.
2766*/ 2865 */
2767static void dwc2_gadget_handle_nak(struct dwc2_hsotg_ep *hs_ep) 2866static void dwc2_gadget_handle_nak(struct dwc2_hsotg_ep *hs_ep)
2768{ 2867{
2769 struct dwc2_hsotg *hsotg = hs_ep->parent; 2868 struct dwc2_hsotg *hsotg = hs_ep->parent;
@@ -2807,7 +2906,7 @@ static void dwc2_gadget_handle_nak(struct dwc2_hsotg_ep *hs_ep)
2807 * Process and clear any interrupt pending for an individual endpoint 2906 * Process and clear any interrupt pending for an individual endpoint
2808 */ 2907 */
2809static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, 2908static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
2810 int dir_in) 2909 int dir_in)
2811{ 2910{
2812 struct dwc2_hsotg_ep *hs_ep = index_to_ep(hsotg, idx, dir_in); 2911 struct dwc2_hsotg_ep *hs_ep = index_to_ep(hsotg, idx, dir_in);
2813 u32 epint_reg = dir_in ? DIEPINT(idx) : DOEPINT(idx); 2912 u32 epint_reg = dir_in ? DIEPINT(idx) : DOEPINT(idx);
@@ -2824,7 +2923,7 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
2824 2923
2825 if (!hs_ep) { 2924 if (!hs_ep) {
2826 dev_err(hsotg->dev, "%s:Interrupt for unconfigured ep%d(%s)\n", 2925 dev_err(hsotg->dev, "%s:Interrupt for unconfigured ep%d(%s)\n",
2827 __func__, idx, dir_in ? "in" : "out"); 2926 __func__, idx, dir_in ? "in" : "out");
2828 return; 2927 return;
2829 } 2928 }
2830 2929
@@ -3059,13 +3158,13 @@ static void kill_all_requests(struct dwc2_hsotg *hsotg,
3059 int result) 3158 int result)
3060{ 3159{
3061 struct dwc2_hsotg_req *req, *treq; 3160 struct dwc2_hsotg_req *req, *treq;
3062 unsigned size; 3161 unsigned int size;
3063 3162
3064 ep->req = NULL; 3163 ep->req = NULL;
3065 3164
3066 list_for_each_entry_safe(req, treq, &ep->queue, queue) 3165 list_for_each_entry_safe(req, treq, &ep->queue, queue)
3067 dwc2_hsotg_complete_request(hsotg, ep, req, 3166 dwc2_hsotg_complete_request(hsotg, ep, req,
3068 result); 3167 result);
3069 3168
3070 if (!hsotg->dedicated_fifos) 3169 if (!hsotg->dedicated_fifos)
3071 return; 3170 return;
@@ -3084,7 +3183,7 @@ static void kill_all_requests(struct dwc2_hsotg *hsotg,
3084 */ 3183 */
3085void dwc2_hsotg_disconnect(struct dwc2_hsotg *hsotg) 3184void dwc2_hsotg_disconnect(struct dwc2_hsotg *hsotg)
3086{ 3185{
3087 unsigned ep; 3186 unsigned int ep;
3088 3187
3089 if (!hsotg->connected) 3188 if (!hsotg->connected)
3090 return; 3189 return;
@@ -3095,10 +3194,10 @@ void dwc2_hsotg_disconnect(struct dwc2_hsotg *hsotg)
3095 for (ep = 0; ep < hsotg->num_of_eps; ep++) { 3194 for (ep = 0; ep < hsotg->num_of_eps; ep++) {
3096 if (hsotg->eps_in[ep]) 3195 if (hsotg->eps_in[ep])
3097 kill_all_requests(hsotg, hsotg->eps_in[ep], 3196 kill_all_requests(hsotg, hsotg->eps_in[ep],
3098 -ESHUTDOWN); 3197 -ESHUTDOWN);
3099 if (hsotg->eps_out[ep]) 3198 if (hsotg->eps_out[ep])
3100 kill_all_requests(hsotg, hsotg->eps_out[ep], 3199 kill_all_requests(hsotg, hsotg->eps_out[ep],
3101 -ESHUTDOWN); 3200 -ESHUTDOWN);
3102 } 3201 }
3103 3202
3104 call_gadget(hsotg, disconnect); 3203 call_gadget(hsotg, disconnect);
@@ -3147,7 +3246,7 @@ static void dwc2_hsotg_irq_fifoempty(struct dwc2_hsotg *hsotg, bool periodic)
3147 * Issue a soft reset to the core, and await the core finishing it. 3246 * Issue a soft reset to the core, and await the core finishing it.
3148 */ 3247 */
3149void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, 3248void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
3150 bool is_usb_reset) 3249 bool is_usb_reset)
3151{ 3250{
3152 u32 intmsk; 3251 u32 intmsk;
3153 u32 val; 3252 u32 val;
@@ -3158,7 +3257,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
3158 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); 3257 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
3159 3258
3160 if (!is_usb_reset) 3259 if (!is_usb_reset)
3161 if (dwc2_core_reset(hsotg)) 3260 if (dwc2_core_reset(hsotg, true))
3162 return; 3261 return;
3163 3262
3164 /* 3263 /*
@@ -3221,7 +3320,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
3221 if (!using_desc_dma(hsotg)) 3320 if (!using_desc_dma(hsotg))
3222 intmsk |= GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT; 3321 intmsk |= GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT;
3223 3322
3224 if (hsotg->params.external_id_pin_ctl <= 0) 3323 if (!hsotg->params.external_id_pin_ctl)
3225 intmsk |= GINTSTS_CONIDSTSCHNG; 3324 intmsk |= GINTSTS_CONIDSTSCHNG;
3226 3325
3227 dwc2_writel(intmsk, hsotg->regs + GINTMSK); 3326 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
@@ -3462,7 +3561,6 @@ irq_retry:
3462 } 3561 }
3463 3562
3464 if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) { 3563 if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) {
3465
3466 u32 usb_status = dwc2_readl(hsotg->regs + GOTGCTL); 3564 u32 usb_status = dwc2_readl(hsotg->regs + GOTGCTL);
3467 u32 connected = hsotg->connected; 3565 u32 connected = hsotg->connected;
3468 3566
@@ -3601,7 +3699,7 @@ irq_retry:
3601 */ 3699 */
3602 3700
3603 if (gintsts & IRQ_RETRY_MASK && --retry_count > 0) 3701 if (gintsts & IRQ_RETRY_MASK && --retry_count > 0)
3604 goto irq_retry; 3702 goto irq_retry;
3605 3703
3606 spin_unlock(&hsotg->lock); 3704 spin_unlock(&hsotg->lock);
3607 3705
@@ -3705,7 +3803,7 @@ static void dwc2_hsotg_ep_stop_xfr(struct dwc2_hsotg *hsotg,
3705 * This is called from the USB gadget code's usb_ep_enable(). 3803 * This is called from the USB gadget code's usb_ep_enable().
3706 */ 3804 */
3707static int dwc2_hsotg_ep_enable(struct usb_ep *ep, 3805static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
3708 const struct usb_endpoint_descriptor *desc) 3806 const struct usb_endpoint_descriptor *desc)
3709{ 3807{
3710 struct dwc2_hsotg_ep *hs_ep = our_ep(ep); 3808 struct dwc2_hsotg_ep *hs_ep = our_ep(ep);
3711 struct dwc2_hsotg *hsotg = hs_ep->parent; 3809 struct dwc2_hsotg *hsotg = hs_ep->parent;
@@ -3827,12 +3925,13 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
3827 if (dir_in && hsotg->dedicated_fifos) { 3925 if (dir_in && hsotg->dedicated_fifos) {
3828 u32 fifo_index = 0; 3926 u32 fifo_index = 0;
3829 u32 fifo_size = UINT_MAX; 3927 u32 fifo_size = UINT_MAX;
3830 size = hs_ep->ep.maxpacket*hs_ep->mc; 3928
3929 size = hs_ep->ep.maxpacket * hs_ep->mc;
3831 for (i = 1; i < hsotg->num_of_eps; ++i) { 3930 for (i = 1; i < hsotg->num_of_eps; ++i) {
3832 if (hsotg->fifo_map & (1<<i)) 3931 if (hsotg->fifo_map & (1 << i))
3833 continue; 3932 continue;
3834 val = dwc2_readl(hsotg->regs + DPTXFSIZN(i)); 3933 val = dwc2_readl(hsotg->regs + DPTXFSIZN(i));
3835 val = (val >> FIFOSIZE_DEPTH_SHIFT)*4; 3934 val = (val >> FIFOSIZE_DEPTH_SHIFT) * 4;
3836 if (val < size) 3935 if (val < size)
3837 continue; 3936 continue;
3838 /* Search for smallest acceptable fifo */ 3937 /* Search for smallest acceptable fifo */
@@ -4033,23 +4132,22 @@ static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value, bool now)
4033 epctl &= ~DXEPCTL_STALL; 4132 epctl &= ~DXEPCTL_STALL;
4034 xfertype = epctl & DXEPCTL_EPTYPE_MASK; 4133 xfertype = epctl & DXEPCTL_EPTYPE_MASK;
4035 if (xfertype == DXEPCTL_EPTYPE_BULK || 4134 if (xfertype == DXEPCTL_EPTYPE_BULK ||
4036 xfertype == DXEPCTL_EPTYPE_INTERRUPT) 4135 xfertype == DXEPCTL_EPTYPE_INTERRUPT)
4037 epctl |= DXEPCTL_SETD0PID; 4136 epctl |= DXEPCTL_SETD0PID;
4038 } 4137 }
4039 dwc2_writel(epctl, hs->regs + epreg); 4138 dwc2_writel(epctl, hs->regs + epreg);
4040 } else { 4139 } else {
4041
4042 epreg = DOEPCTL(index); 4140 epreg = DOEPCTL(index);
4043 epctl = dwc2_readl(hs->regs + epreg); 4141 epctl = dwc2_readl(hs->regs + epreg);
4044 4142
4045 if (value) 4143 if (value) {
4046 epctl |= DXEPCTL_STALL; 4144 epctl |= DXEPCTL_STALL;
4047 else { 4145 } else {
4048 epctl &= ~DXEPCTL_STALL; 4146 epctl &= ~DXEPCTL_STALL;
4049 xfertype = epctl & DXEPCTL_EPTYPE_MASK; 4147 xfertype = epctl & DXEPCTL_EPTYPE_MASK;
4050 if (xfertype == DXEPCTL_EPTYPE_BULK || 4148 if (xfertype == DXEPCTL_EPTYPE_BULK ||
4051 xfertype == DXEPCTL_EPTYPE_INTERRUPT) 4149 xfertype == DXEPCTL_EPTYPE_INTERRUPT)
4052 epctl |= DXEPCTL_SETD0PID; 4150 epctl |= DXEPCTL_SETD0PID;
4053 } 4151 }
4054 dwc2_writel(epctl, hs->regs + epreg); 4152 dwc2_writel(epctl, hs->regs + epreg);
4055 } 4153 }
@@ -4090,7 +4188,7 @@ static struct usb_ep_ops dwc2_hsotg_ep_ops = {
4090}; 4188};
4091 4189
4092/** 4190/**
4093 * dwc2_hsotg_init - initalize the usb core 4191 * dwc2_hsotg_init - initialize the usb core
4094 * @hsotg: The driver state 4192 * @hsotg: The driver state
4095 */ 4193 */
4096static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg) 4194static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
@@ -4144,7 +4242,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
4144 * to work. 4242 * to work.
4145 */ 4243 */
4146static int dwc2_hsotg_udc_start(struct usb_gadget *gadget, 4244static int dwc2_hsotg_udc_start(struct usb_gadget *gadget,
4147 struct usb_gadget_driver *driver) 4245 struct usb_gadget_driver *driver)
4148{ 4246{
4149 struct dwc2_hsotg *hsotg = to_hsotg(gadget); 4247 struct dwc2_hsotg *hsotg = to_hsotg(gadget);
4150 unsigned long flags; 4248 unsigned long flags;
@@ -4267,7 +4365,7 @@ static int dwc2_hsotg_pullup(struct usb_gadget *gadget, int is_on)
4267 unsigned long flags = 0; 4365 unsigned long flags = 0;
4268 4366
4269 dev_dbg(hsotg->dev, "%s: is_on: %d op_state: %d\n", __func__, is_on, 4367 dev_dbg(hsotg->dev, "%s: is_on: %d op_state: %d\n", __func__, is_on,
4270 hsotg->op_state); 4368 hsotg->op_state);
4271 4369
4272 /* Don't modify pullup state while in host mode */ 4370 /* Don't modify pullup state while in host mode */
4273 if (hsotg->op_state != OTG_STATE_B_PERIPHERAL) { 4371 if (hsotg->op_state != OTG_STATE_B_PERIPHERAL) {
@@ -4329,7 +4427,7 @@ static int dwc2_hsotg_vbus_session(struct usb_gadget *gadget, int is_active)
4329 * 4427 *
4330 * Report how much power the device may consume to the phy. 4428 * Report how much power the device may consume to the phy.
4331 */ 4429 */
4332static int dwc2_hsotg_vbus_draw(struct usb_gadget *gadget, unsigned mA) 4430static int dwc2_hsotg_vbus_draw(struct usb_gadget *gadget, unsigned int mA)
4333{ 4431{
4334 struct dwc2_hsotg *hsotg = to_hsotg(gadget); 4432 struct dwc2_hsotg *hsotg = to_hsotg(gadget);
4335 4433
@@ -4358,7 +4456,7 @@ static const struct usb_gadget_ops dwc2_hsotg_gadget_ops = {
4358 * direction information and other state that may be required. 4456 * direction information and other state that may be required.
4359 */ 4457 */
4360static void dwc2_hsotg_initep(struct dwc2_hsotg *hsotg, 4458static void dwc2_hsotg_initep(struct dwc2_hsotg *hsotg,
4361 struct dwc2_hsotg_ep *hs_ep, 4459 struct dwc2_hsotg_ep *hs_ep,
4362 int epnum, 4460 int epnum,
4363 bool dir_in) 4461 bool dir_in)
4364{ 4462{
@@ -4415,6 +4513,7 @@ static void dwc2_hsotg_initep(struct dwc2_hsotg *hsotg,
4415 4513
4416 if (using_dma(hsotg)) { 4514 if (using_dma(hsotg)) {
4417 u32 next = DXEPCTL_NEXTEP((epnum + 1) % 15); 4515 u32 next = DXEPCTL_NEXTEP((epnum + 1) % 15);
4516
4418 if (dir_in) 4517 if (dir_in)
4419 dwc2_writel(next, hsotg->regs + DIEPCTL(epnum)); 4518 dwc2_writel(next, hsotg->regs + DIEPCTL(epnum));
4420 else 4519 else
@@ -4441,8 +4540,9 @@ static int dwc2_hsotg_hw_cfg(struct dwc2_hsotg *hsotg)
4441 /* Add ep0 */ 4540 /* Add ep0 */
4442 hsotg->num_of_eps++; 4541 hsotg->num_of_eps++;
4443 4542
4444 hsotg->eps_in[0] = devm_kzalloc(hsotg->dev, sizeof(struct dwc2_hsotg_ep), 4543 hsotg->eps_in[0] = devm_kzalloc(hsotg->dev,
4445 GFP_KERNEL); 4544 sizeof(struct dwc2_hsotg_ep),
4545 GFP_KERNEL);
4446 if (!hsotg->eps_in[0]) 4546 if (!hsotg->eps_in[0])
4447 return -ENOMEM; 4547 return -ENOMEM;
4448 /* Same dwc2_hsotg_ep is used in both directions for ep0 */ 4548 /* Same dwc2_hsotg_ep is used in both directions for ep0 */
@@ -4521,7 +4621,6 @@ static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg)
4521 idx, dwc2_readl(regs + DOEPCTL(idx)), 4621 idx, dwc2_readl(regs + DOEPCTL(idx)),
4522 dwc2_readl(regs + DOEPTSIZ(idx)), 4622 dwc2_readl(regs + DOEPTSIZ(idx)),
4523 dwc2_readl(regs + DOEPDMA(idx))); 4623 dwc2_readl(regs + DOEPDMA(idx)));
4524
4525 } 4624 }
4526 4625
4527 dev_info(dev, "DVBUSDIS=0x%08x, DVBUSPULSE=%08x\n", 4626 dev_info(dev, "DVBUSDIS=0x%08x, DVBUSPULSE=%08x\n",
@@ -4576,7 +4675,7 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
4576 } 4675 }
4577 4676
4578 ret = devm_request_irq(hsotg->dev, irq, dwc2_hsotg_irq, IRQF_SHARED, 4677 ret = devm_request_irq(hsotg->dev, irq, dwc2_hsotg_irq, IRQF_SHARED,
4579 dev_name(hsotg->dev), hsotg); 4678 dev_name(hsotg->dev), hsotg);
4580 if (ret < 0) { 4679 if (ret < 0) {
4581 dev_err(dev, "cannot claim IRQ for gadget\n"); 4680 dev_err(dev, "cannot claim IRQ for gadget\n");
4582 return ret; 4681 return ret;
@@ -4607,10 +4706,10 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
4607 for (epnum = 0; epnum < hsotg->num_of_eps; epnum++) { 4706 for (epnum = 0; epnum < hsotg->num_of_eps; epnum++) {
4608 if (hsotg->eps_in[epnum]) 4707 if (hsotg->eps_in[epnum])
4609 dwc2_hsotg_initep(hsotg, hsotg->eps_in[epnum], 4708 dwc2_hsotg_initep(hsotg, hsotg->eps_in[epnum],
4610 epnum, 1); 4709 epnum, 1);
4611 if (hsotg->eps_out[epnum]) 4710 if (hsotg->eps_out[epnum])
4612 dwc2_hsotg_initep(hsotg, hsotg->eps_out[epnum], 4711 dwc2_hsotg_initep(hsotg, hsotg->eps_out[epnum],
4613 epnum, 0); 4712 epnum, 0);
4614 } 4713 }
4615 4714
4616 ret = usb_add_gadget_udc(dev, &hsotg->gadget); 4715 ret = usb_add_gadget_udc(dev, &hsotg->gadget);
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 46d0ad5105e4..a73722e27d07 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -42,6 +42,7 @@
42#include <linux/module.h> 42#include <linux/module.h>
43#include <linux/spinlock.h> 43#include <linux/spinlock.h>
44#include <linux/interrupt.h> 44#include <linux/interrupt.h>
45#include <linux/platform_device.h>
45#include <linux/dma-mapping.h> 46#include <linux/dma-mapping.h>
46#include <linux/delay.h> 47#include <linux/delay.h>
47#include <linux/io.h> 48#include <linux/io.h>
@@ -54,6 +55,8 @@
54#include "core.h" 55#include "core.h"
55#include "hcd.h" 56#include "hcd.h"
56 57
58static void dwc2_port_resume(struct dwc2_hsotg *hsotg);
59
57/* 60/*
58 * ========================================================================= 61 * =========================================================================
59 * Host Core Layer Functions 62 * Host Core Layer Functions
@@ -79,9 +82,9 @@ static void dwc2_enable_common_interrupts(struct dwc2_hsotg *hsotg)
79 /* Enable the interrupts in the GINTMSK */ 82 /* Enable the interrupts in the GINTMSK */
80 intmsk = GINTSTS_MODEMIS | GINTSTS_OTGINT; 83 intmsk = GINTSTS_MODEMIS | GINTSTS_OTGINT;
81 84
82 if (hsotg->params.host_dma <= 0) 85 if (!hsotg->params.host_dma)
83 intmsk |= GINTSTS_RXFLVL; 86 intmsk |= GINTSTS_RXFLVL;
84 if (hsotg->params.external_id_pin_ctl <= 0) 87 if (!hsotg->params.external_id_pin_ctl)
85 intmsk |= GINTSTS_CONIDSTSCHNG; 88 intmsk |= GINTSTS_CONIDSTSCHNG;
86 89
87 intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP | 90 intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP |
@@ -100,7 +103,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
100 103
101 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && 104 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
102 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && 105 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
103 hsotg->params.ulpi_fs_ls > 0) || 106 hsotg->params.ulpi_fs_ls) ||
104 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) { 107 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) {
105 /* Full speed PHY */ 108 /* Full speed PHY */
106 val = HCFG_FSLSPCLKSEL_48_MHZ; 109 val = HCFG_FSLSPCLKSEL_48_MHZ;
@@ -152,7 +155,7 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
152 if (dwc2_is_host_mode(hsotg)) 155 if (dwc2_is_host_mode(hsotg))
153 dwc2_init_fs_ls_pclk_sel(hsotg); 156 dwc2_init_fs_ls_pclk_sel(hsotg);
154 157
155 if (hsotg->params.i2c_enable > 0) { 158 if (hsotg->params.i2c_enable) {
156 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n"); 159 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n");
157 160
158 /* Program GUSBCFG.OtgUtmiFsSel to I2C */ 161 /* Program GUSBCFG.OtgUtmiFsSel to I2C */
@@ -195,7 +198,7 @@ static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
195 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n"); 198 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n");
196 usbcfg |= GUSBCFG_ULPI_UTMI_SEL; 199 usbcfg |= GUSBCFG_ULPI_UTMI_SEL;
197 usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL); 200 usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL);
198 if (hsotg->params.phy_ulpi_ddr > 0) 201 if (hsotg->params.phy_ulpi_ddr)
199 usbcfg |= GUSBCFG_DDRSEL; 202 usbcfg |= GUSBCFG_DDRSEL;
200 break; 203 break;
201 case DWC2_PHY_TYPE_PARAM_UTMI: 204 case DWC2_PHY_TYPE_PARAM_UTMI:
@@ -246,7 +249,7 @@ static int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
246 249
247 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && 250 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
248 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && 251 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
249 hsotg->params.ulpi_fs_ls > 0) { 252 hsotg->params.ulpi_fs_ls) {
250 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n"); 253 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n");
251 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); 254 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
252 usbcfg |= GUSBCFG_ULPI_FS_LS; 255 usbcfg |= GUSBCFG_ULPI_FS_LS;
@@ -290,17 +293,17 @@ static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
290 hsotg->params.host_dma, 293 hsotg->params.host_dma,
291 hsotg->params.dma_desc_enable); 294 hsotg->params.dma_desc_enable);
292 295
293 if (hsotg->params.host_dma > 0) { 296 if (hsotg->params.host_dma) {
294 if (hsotg->params.dma_desc_enable > 0) 297 if (hsotg->params.dma_desc_enable)
295 dev_dbg(hsotg->dev, "Using Descriptor DMA mode\n"); 298 dev_dbg(hsotg->dev, "Using Descriptor DMA mode\n");
296 else 299 else
297 dev_dbg(hsotg->dev, "Using Buffer DMA mode\n"); 300 dev_dbg(hsotg->dev, "Using Buffer DMA mode\n");
298 } else { 301 } else {
299 dev_dbg(hsotg->dev, "Using Slave mode\n"); 302 dev_dbg(hsotg->dev, "Using Slave mode\n");
300 hsotg->params.dma_desc_enable = 0; 303 hsotg->params.dma_desc_enable = false;
301 } 304 }
302 305
303 if (hsotg->params.host_dma > 0) 306 if (hsotg->params.host_dma)
304 ahbcfg |= GAHBCFG_DMA_EN; 307 ahbcfg |= GAHBCFG_DMA_EN;
305 308
306 dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG); 309 dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG);
@@ -491,9 +494,10 @@ static void dwc2_config_fifos(struct dwc2_hsotg *hsotg)
491 dev_dbg(hsotg->dev, "new hptxfsiz=%08x\n", 494 dev_dbg(hsotg->dev, "new hptxfsiz=%08x\n",
492 dwc2_readl(hsotg->regs + HPTXFSIZ)); 495 dwc2_readl(hsotg->regs + HPTXFSIZ));
493 496
494 if (hsotg->params.en_multiple_tx_fifo > 0 && 497 if (hsotg->params.en_multiple_tx_fifo &&
495 hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) { 498 hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_91a) {
496 /* 499 /*
500 * This feature was implemented in 2.91a version
497 * Global DFIFOCFG calculation for Host mode - 501 * Global DFIFOCFG calculation for Host mode -
498 * include RxFIFO, NPTXFIFO and HPTXFIFO 502 * include RxFIFO, NPTXFIFO and HPTXFIFO
499 */ 503 */
@@ -771,7 +775,7 @@ static void dwc2_hc_enable_dma_ints(struct dwc2_hsotg *hsotg,
771 * For Descriptor DMA mode core halts the channel on AHB error. 775 * For Descriptor DMA mode core halts the channel on AHB error.
772 * Interrupt is not required. 776 * Interrupt is not required.
773 */ 777 */
774 if (hsotg->params.dma_desc_enable <= 0) { 778 if (!hsotg->params.dma_desc_enable) {
775 if (dbg_hc(chan)) 779 if (dbg_hc(chan))
776 dev_vdbg(hsotg->dev, "desc DMA disabled\n"); 780 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
777 hcintmsk |= HCINTMSK_AHBERR; 781 hcintmsk |= HCINTMSK_AHBERR;
@@ -804,7 +808,7 @@ static void dwc2_hc_enable_ints(struct dwc2_hsotg *hsotg,
804{ 808{
805 u32 intmsk; 809 u32 intmsk;
806 810
807 if (hsotg->params.host_dma > 0) { 811 if (hsotg->params.host_dma) {
808 if (dbg_hc(chan)) 812 if (dbg_hc(chan))
809 dev_vdbg(hsotg->dev, "DMA enabled\n"); 813 dev_vdbg(hsotg->dev, "DMA enabled\n");
810 dwc2_hc_enable_dma_ints(hsotg, chan); 814 dwc2_hc_enable_dma_ints(hsotg, chan);
@@ -1024,7 +1028,7 @@ void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
1024 1028
1025 /* No need to set the bit in DDMA for disabling the channel */ 1029 /* No need to set the bit in DDMA for disabling the channel */
1026 /* TODO check it everywhere channel is disabled */ 1030 /* TODO check it everywhere channel is disabled */
1027 if (hsotg->params.dma_desc_enable <= 0) { 1031 if (!hsotg->params.dma_desc_enable) {
1028 if (dbg_hc(chan)) 1032 if (dbg_hc(chan))
1029 dev_vdbg(hsotg->dev, "desc DMA disabled\n"); 1033 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
1030 hcchar |= HCCHAR_CHENA; 1034 hcchar |= HCCHAR_CHENA;
@@ -1034,7 +1038,7 @@ void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
1034 } 1038 }
1035 hcchar |= HCCHAR_CHDIS; 1039 hcchar |= HCCHAR_CHDIS;
1036 1040
1037 if (hsotg->params.host_dma <= 0) { 1041 if (!hsotg->params.host_dma) {
1038 if (dbg_hc(chan)) 1042 if (dbg_hc(chan))
1039 dev_vdbg(hsotg->dev, "DMA not enabled\n"); 1043 dev_vdbg(hsotg->dev, "DMA not enabled\n");
1040 hcchar |= HCCHAR_CHENA; 1044 hcchar |= HCCHAR_CHENA;
@@ -1380,7 +1384,7 @@ static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1380 dev_vdbg(hsotg->dev, "%s()\n", __func__); 1384 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1381 1385
1382 if (chan->do_ping) { 1386 if (chan->do_ping) {
1383 if (hsotg->params.host_dma <= 0) { 1387 if (!hsotg->params.host_dma) {
1384 if (dbg_hc(chan)) 1388 if (dbg_hc(chan))
1385 dev_vdbg(hsotg->dev, "ping, no DMA\n"); 1389 dev_vdbg(hsotg->dev, "ping, no DMA\n");
1386 dwc2_hc_do_ping(hsotg, chan); 1390 dwc2_hc_do_ping(hsotg, chan);
@@ -1508,7 +1512,7 @@ static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1508 TSIZ_SC_MC_PID_SHIFT); 1512 TSIZ_SC_MC_PID_SHIFT);
1509 } 1513 }
1510 1514
1511 if (hsotg->params.host_dma > 0) { 1515 if (hsotg->params.host_dma) {
1512 dwc2_writel((u32)chan->xfer_dma, 1516 dwc2_writel((u32)chan->xfer_dma,
1513 hsotg->regs + HCDMA(chan->hc_num)); 1517 hsotg->regs + HCDMA(chan->hc_num));
1514 if (dbg_hc(chan)) 1518 if (dbg_hc(chan))
@@ -1551,7 +1555,7 @@ static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1551 chan->xfer_started = 1; 1555 chan->xfer_started = 1;
1552 chan->requests++; 1556 chan->requests++;
1553 1557
1554 if (hsotg->params.host_dma <= 0 && 1558 if (!hsotg->params.host_dma &&
1555 !chan->ep_is_in && chan->xfer_len > 0) 1559 !chan->ep_is_in && chan->xfer_len > 0)
1556 /* Load OUT packet into the appropriate Tx FIFO */ 1560 /* Load OUT packet into the appropriate Tx FIFO */
1557 dwc2_hc_write_packet(hsotg, chan); 1561 dwc2_hc_write_packet(hsotg, chan);
@@ -1834,7 +1838,7 @@ static void dwc2_hcd_cleanup_channels(struct dwc2_hsotg *hsotg)
1834 u32 hcchar; 1838 u32 hcchar;
1835 int i; 1839 int i;
1836 1840
1837 if (hsotg->params.host_dma <= 0) { 1841 if (!hsotg->params.host_dma) {
1838 /* Flush out any channel requests in slave mode */ 1842 /* Flush out any channel requests in slave mode */
1839 for (i = 0; i < num_channels; i++) { 1843 for (i = 0; i < num_channels; i++) {
1840 channel = hsotg->hc_ptr_array[i]; 1844 channel = hsotg->hc_ptr_array[i];
@@ -1870,7 +1874,7 @@ static void dwc2_hcd_cleanup_channels(struct dwc2_hsotg *hsotg)
1870 channel->qh = NULL; 1874 channel->qh = NULL;
1871 } 1875 }
1872 /* All channels have been freed, mark them available */ 1876 /* All channels have been freed, mark them available */
1873 if (hsotg->params.uframe_sched > 0) { 1877 if (hsotg->params.uframe_sched) {
1874 hsotg->available_host_channels = 1878 hsotg->available_host_channels =
1875 hsotg->params.host_channels; 1879 hsotg->params.host_channels;
1876 } else { 1880 } else {
@@ -2107,7 +2111,7 @@ static int dwc2_hcd_urb_dequeue(struct dwc2_hsotg *hsotg,
2107 * Free the QTD and clean up the associated QH. Leave the QH in the 2111 * Free the QTD and clean up the associated QH. Leave the QH in the
2108 * schedule if it has any remaining QTDs. 2112 * schedule if it has any remaining QTDs.
2109 */ 2113 */
2110 if (hsotg->params.dma_desc_enable <= 0) { 2114 if (!hsotg->params.dma_desc_enable) {
2111 u8 in_process = urb_qtd->in_process; 2115 u8 in_process = urb_qtd->in_process;
2112 2116
2113 dwc2_hcd_qtd_unlink_and_free(hsotg, urb_qtd, qh); 2117 dwc2_hcd_qtd_unlink_and_free(hsotg, urb_qtd, qh);
@@ -2150,7 +2154,7 @@ static int dwc2_hcd_endpoint_disable(struct dwc2_hsotg *hsotg,
2150 } 2154 }
2151 2155
2152 spin_unlock_irqrestore(&hsotg->lock, flags); 2156 spin_unlock_irqrestore(&hsotg->lock, flags);
2153 usleep_range(20000, 40000); 2157 msleep(20);
2154 spin_lock_irqsave(&hsotg->lock, flags); 2158 spin_lock_irqsave(&hsotg->lock, flags);
2155 qh = ep->hcpriv; 2159 qh = ep->hcpriv;
2156 if (!qh) { 2160 if (!qh) {
@@ -2215,13 +2219,12 @@ static int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup)
2215 2219
2216 /* Set ULPI External VBUS bit if needed */ 2220 /* Set ULPI External VBUS bit if needed */
2217 usbcfg &= ~GUSBCFG_ULPI_EXT_VBUS_DRV; 2221 usbcfg &= ~GUSBCFG_ULPI_EXT_VBUS_DRV;
2218 if (hsotg->params.phy_ulpi_ext_vbus == 2222 if (hsotg->params.phy_ulpi_ext_vbus)
2219 DWC2_PHY_ULPI_EXTERNAL_VBUS)
2220 usbcfg |= GUSBCFG_ULPI_EXT_VBUS_DRV; 2223 usbcfg |= GUSBCFG_ULPI_EXT_VBUS_DRV;
2221 2224
2222 /* Set external TS Dline pulsing bit if needed */ 2225 /* Set external TS Dline pulsing bit if needed */
2223 usbcfg &= ~GUSBCFG_TERMSELDLPULSE; 2226 usbcfg &= ~GUSBCFG_TERMSELDLPULSE;
2224 if (hsotg->params.ts_dline > 0) 2227 if (hsotg->params.ts_dline)
2225 usbcfg |= GUSBCFG_TERMSELDLPULSE; 2228 usbcfg |= GUSBCFG_TERMSELDLPULSE;
2226 2229
2227 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG); 2230 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
@@ -2260,10 +2263,7 @@ static int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup)
2260 /* Program the GOTGCTL register */ 2263 /* Program the GOTGCTL register */
2261 otgctl = dwc2_readl(hsotg->regs + GOTGCTL); 2264 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
2262 otgctl &= ~GOTGCTL_OTGVER; 2265 otgctl &= ~GOTGCTL_OTGVER;
2263 if (hsotg->params.otg_ver > 0)
2264 otgctl |= GOTGCTL_OTGVER;
2265 dwc2_writel(otgctl, hsotg->regs + GOTGCTL); 2266 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
2266 dev_dbg(hsotg->dev, "OTG VER PARAM: %d\n", hsotg->params.otg_ver);
2267 2267
2268 /* Clear the SRP success bit for FS-I2c */ 2268 /* Clear the SRP success bit for FS-I2c */
2269 hsotg->srp_success = 0; 2269 hsotg->srp_success = 0;
@@ -2319,13 +2319,13 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2319 * runtime. This bit needs to be programmed during initial configuration 2319 * runtime. This bit needs to be programmed during initial configuration
2320 * and its value must not be changed during runtime. 2320 * and its value must not be changed during runtime.
2321 */ 2321 */
2322 if (hsotg->params.reload_ctl > 0) { 2322 if (hsotg->params.reload_ctl) {
2323 hfir = dwc2_readl(hsotg->regs + HFIR); 2323 hfir = dwc2_readl(hsotg->regs + HFIR);
2324 hfir |= HFIR_RLDCTRL; 2324 hfir |= HFIR_RLDCTRL;
2325 dwc2_writel(hfir, hsotg->regs + HFIR); 2325 dwc2_writel(hfir, hsotg->regs + HFIR);
2326 } 2326 }
2327 2327
2328 if (hsotg->params.dma_desc_enable > 0) { 2328 if (hsotg->params.dma_desc_enable) {
2329 u32 op_mode = hsotg->hw_params.op_mode; 2329 u32 op_mode = hsotg->hw_params.op_mode;
2330 2330
2331 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a || 2331 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a ||
@@ -2337,7 +2337,7 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2337 "Hardware does not support descriptor DMA mode -\n"); 2337 "Hardware does not support descriptor DMA mode -\n");
2338 dev_err(hsotg->dev, 2338 dev_err(hsotg->dev,
2339 "falling back to buffer DMA mode.\n"); 2339 "falling back to buffer DMA mode.\n");
2340 hsotg->params.dma_desc_enable = 0; 2340 hsotg->params.dma_desc_enable = false;
2341 } else { 2341 } else {
2342 hcfg = dwc2_readl(hsotg->regs + HCFG); 2342 hcfg = dwc2_readl(hsotg->regs + HCFG);
2343 hcfg |= HCFG_DESCDMA; 2343 hcfg |= HCFG_DESCDMA;
@@ -2363,7 +2363,7 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2363 otgctl &= ~GOTGCTL_HSTSETHNPEN; 2363 otgctl &= ~GOTGCTL_HSTSETHNPEN;
2364 dwc2_writel(otgctl, hsotg->regs + GOTGCTL); 2364 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
2365 2365
2366 if (hsotg->params.dma_desc_enable <= 0) { 2366 if (!hsotg->params.dma_desc_enable) {
2367 int num_channels, i; 2367 int num_channels, i;
2368 u32 hcchar; 2368 u32 hcchar;
2369 2369
@@ -2430,7 +2430,7 @@ static void dwc2_hcd_reinit(struct dwc2_hsotg *hsotg)
2430 hsotg->flags.d32 = 0; 2430 hsotg->flags.d32 = 0;
2431 hsotg->non_periodic_qh_ptr = &hsotg->non_periodic_sched_active; 2431 hsotg->non_periodic_qh_ptr = &hsotg->non_periodic_sched_active;
2432 2432
2433 if (hsotg->params.uframe_sched > 0) { 2433 if (hsotg->params.uframe_sched) {
2434 hsotg->available_host_channels = 2434 hsotg->available_host_channels =
2435 hsotg->params.host_channels; 2435 hsotg->params.host_channels;
2436 } else { 2436 } else {
@@ -2488,7 +2488,7 @@ static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
2488 chan->do_ping = 0; 2488 chan->do_ping = 0;
2489 chan->ep_is_in = 0; 2489 chan->ep_is_in = 0;
2490 chan->data_pid_start = DWC2_HC_PID_SETUP; 2490 chan->data_pid_start = DWC2_HC_PID_SETUP;
2491 if (hsotg->params.host_dma > 0) 2491 if (hsotg->params.host_dma)
2492 chan->xfer_dma = urb->setup_dma; 2492 chan->xfer_dma = urb->setup_dma;
2493 else 2493 else
2494 chan->xfer_buf = urb->setup_packet; 2494 chan->xfer_buf = urb->setup_packet;
@@ -2515,7 +2515,7 @@ static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
2515 chan->do_ping = 0; 2515 chan->do_ping = 0;
2516 chan->data_pid_start = DWC2_HC_PID_DATA1; 2516 chan->data_pid_start = DWC2_HC_PID_DATA1;
2517 chan->xfer_len = 0; 2517 chan->xfer_len = 0;
2518 if (hsotg->params.host_dma > 0) 2518 if (hsotg->params.host_dma)
2519 chan->xfer_dma = hsotg->status_buf_dma; 2519 chan->xfer_dma = hsotg->status_buf_dma;
2520 else 2520 else
2521 chan->xfer_buf = hsotg->status_buf; 2521 chan->xfer_buf = hsotg->status_buf;
@@ -2533,13 +2533,13 @@ static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
2533 2533
2534 case USB_ENDPOINT_XFER_ISOC: 2534 case USB_ENDPOINT_XFER_ISOC:
2535 chan->ep_type = USB_ENDPOINT_XFER_ISOC; 2535 chan->ep_type = USB_ENDPOINT_XFER_ISOC;
2536 if (hsotg->params.dma_desc_enable > 0) 2536 if (hsotg->params.dma_desc_enable)
2537 break; 2537 break;
2538 2538
2539 frame_desc = &urb->iso_descs[qtd->isoc_frame_index]; 2539 frame_desc = &urb->iso_descs[qtd->isoc_frame_index];
2540 frame_desc->status = 0; 2540 frame_desc->status = 0;
2541 2541
2542 if (hsotg->params.host_dma > 0) { 2542 if (hsotg->params.host_dma) {
2543 chan->xfer_dma = urb->dma; 2543 chan->xfer_dma = urb->dma;
2544 chan->xfer_dma += frame_desc->offset + 2544 chan->xfer_dma += frame_desc->offset +
2545 qtd->isoc_split_offset; 2545 qtd->isoc_split_offset;
@@ -2577,7 +2577,7 @@ static void dwc2_free_dma_aligned_buffer(struct urb *urb)
2577 return; 2577 return;
2578 2578
2579 temp = container_of(urb->transfer_buffer, 2579 temp = container_of(urb->transfer_buffer,
2580 struct dma_aligned_buffer, data); 2580 struct dma_aligned_buffer, data);
2581 2581
2582 if (usb_urb_dir_in(urb)) 2582 if (usb_urb_dir_in(urb))
2583 memcpy(temp->old_xfer_buffer, temp->data, 2583 memcpy(temp->old_xfer_buffer, temp->data,
@@ -2621,7 +2621,7 @@ static int dwc2_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
2621} 2621}
2622 2622
2623static int dwc2_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, 2623static int dwc2_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
2624 gfp_t mem_flags) 2624 gfp_t mem_flags)
2625{ 2625{
2626 int ret; 2626 int ret;
2627 2627
@@ -2718,10 +2718,10 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
2718 chan->multi_count = 1; 2718 chan->multi_count = 1;
2719 2719
2720 if (urb->actual_length > urb->length && 2720 if (urb->actual_length > urb->length &&
2721 !dwc2_hcd_is_pipe_in(&urb->pipe_info)) 2721 !dwc2_hcd_is_pipe_in(&urb->pipe_info))
2722 urb->actual_length = urb->length; 2722 urb->actual_length = urb->length;
2723 2723
2724 if (hsotg->params.host_dma > 0) 2724 if (hsotg->params.host_dma)
2725 chan->xfer_dma = urb->dma + urb->actual_length; 2725 chan->xfer_dma = urb->dma + urb->actual_length;
2726 else 2726 else
2727 chan->xfer_buf = (u8 *)urb->buf + urb->actual_length; 2727 chan->xfer_buf = (u8 *)urb->buf + urb->actual_length;
@@ -2746,7 +2746,7 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
2746 */ 2746 */
2747 chan->multi_count = dwc2_hb_mult(qh->maxp); 2747 chan->multi_count = dwc2_hb_mult(qh->maxp);
2748 2748
2749 if (hsotg->params.dma_desc_enable > 0) { 2749 if (hsotg->params.dma_desc_enable) {
2750 chan->desc_list_addr = qh->desc_list_dma; 2750 chan->desc_list_addr = qh->desc_list_dma;
2751 chan->desc_list_sz = qh->desc_list_sz; 2751 chan->desc_list_sz = qh->desc_list_sz;
2752 } 2752 }
@@ -2783,7 +2783,7 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
2783 while (qh_ptr != &hsotg->periodic_sched_ready) { 2783 while (qh_ptr != &hsotg->periodic_sched_ready) {
2784 if (list_empty(&hsotg->free_hc_list)) 2784 if (list_empty(&hsotg->free_hc_list))
2785 break; 2785 break;
2786 if (hsotg->params.uframe_sched > 0) { 2786 if (hsotg->params.uframe_sched) {
2787 if (hsotg->available_host_channels <= 1) 2787 if (hsotg->available_host_channels <= 1)
2788 break; 2788 break;
2789 hsotg->available_host_channels--; 2789 hsotg->available_host_channels--;
@@ -2810,14 +2810,14 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
2810 num_channels = hsotg->params.host_channels; 2810 num_channels = hsotg->params.host_channels;
2811 qh_ptr = hsotg->non_periodic_sched_inactive.next; 2811 qh_ptr = hsotg->non_periodic_sched_inactive.next;
2812 while (qh_ptr != &hsotg->non_periodic_sched_inactive) { 2812 while (qh_ptr != &hsotg->non_periodic_sched_inactive) {
2813 if (hsotg->params.uframe_sched <= 0 && 2813 if (!hsotg->params.uframe_sched &&
2814 hsotg->non_periodic_channels >= num_channels - 2814 hsotg->non_periodic_channels >= num_channels -
2815 hsotg->periodic_channels) 2815 hsotg->periodic_channels)
2816 break; 2816 break;
2817 if (list_empty(&hsotg->free_hc_list)) 2817 if (list_empty(&hsotg->free_hc_list))
2818 break; 2818 break;
2819 qh = list_entry(qh_ptr, struct dwc2_qh, qh_list_entry); 2819 qh = list_entry(qh_ptr, struct dwc2_qh, qh_list_entry);
2820 if (hsotg->params.uframe_sched > 0) { 2820 if (hsotg->params.uframe_sched) {
2821 if (hsotg->available_host_channels < 1) 2821 if (hsotg->available_host_channels < 1)
2822 break; 2822 break;
2823 hsotg->available_host_channels--; 2823 hsotg->available_host_channels--;
@@ -2839,7 +2839,7 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
2839 else 2839 else
2840 ret_val = DWC2_TRANSACTION_ALL; 2840 ret_val = DWC2_TRANSACTION_ALL;
2841 2841
2842 if (hsotg->params.uframe_sched <= 0) 2842 if (!hsotg->params.uframe_sched)
2843 hsotg->non_periodic_channels++; 2843 hsotg->non_periodic_channels++;
2844 } 2844 }
2845 2845
@@ -2878,8 +2878,8 @@ static int dwc2_queue_transaction(struct dwc2_hsotg *hsotg,
2878 list_move_tail(&chan->split_order_list_entry, 2878 list_move_tail(&chan->split_order_list_entry,
2879 &hsotg->split_order); 2879 &hsotg->split_order);
2880 2880
2881 if (hsotg->params.host_dma > 0) { 2881 if (hsotg->params.host_dma) {
2882 if (hsotg->params.dma_desc_enable > 0) { 2882 if (hsotg->params.dma_desc_enable) {
2883 if (!chan->xfer_started || 2883 if (!chan->xfer_started ||
2884 chan->ep_type == USB_ENDPOINT_XFER_ISOC) { 2884 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
2885 dwc2_hcd_start_xfer_ddma(hsotg, chan->qh); 2885 dwc2_hcd_start_xfer_ddma(hsotg, chan->qh);
@@ -2967,7 +2967,7 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
2967 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> 2967 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >>
2968 TXSTS_QSPCAVAIL_SHIFT; 2968 TXSTS_QSPCAVAIL_SHIFT;
2969 if (qspcavail == 0) { 2969 if (qspcavail == 0) {
2970 no_queue_space = 1; 2970 no_queue_space = true;
2971 break; 2971 break;
2972 } 2972 }
2973 2973
@@ -2988,15 +2988,15 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
2988 * The flag prevents any halts to get into the request queue in 2988 * The flag prevents any halts to get into the request queue in
2989 * the middle of multiple high-bandwidth packets getting queued. 2989 * the middle of multiple high-bandwidth packets getting queued.
2990 */ 2990 */
2991 if (hsotg->params.host_dma <= 0 && 2991 if (!hsotg->params.host_dma &&
2992 qh->channel->multi_count > 1) 2992 qh->channel->multi_count > 1)
2993 hsotg->queuing_high_bandwidth = 1; 2993 hsotg->queuing_high_bandwidth = 1;
2994 2994
2995 fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> 2995 fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >>
2996 TXSTS_FSPCAVAIL_SHIFT; 2996 TXSTS_FSPCAVAIL_SHIFT;
2997 status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail); 2997 status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail);
2998 if (status < 0) { 2998 if (status < 0) {
2999 no_fifo_space = 1; 2999 no_fifo_space = true;
3000 break; 3000 break;
3001 } 3001 }
3002 3002
@@ -3007,7 +3007,7 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
3007 * controller automatically handles multiple packets for 3007 * controller automatically handles multiple packets for
3008 * high-bandwidth transfers. 3008 * high-bandwidth transfers.
3009 */ 3009 */
3010 if (hsotg->params.host_dma > 0 || status == 0 || 3010 if (hsotg->params.host_dma || status == 0 ||
3011 qh->channel->requests == qh->channel->multi_count) { 3011 qh->channel->requests == qh->channel->multi_count) {
3012 qh_ptr = qh_ptr->next; 3012 qh_ptr = qh_ptr->next;
3013 /* 3013 /*
@@ -3024,7 +3024,7 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
3024 3024
3025exit: 3025exit:
3026 if (no_queue_space || no_fifo_space || 3026 if (no_queue_space || no_fifo_space ||
3027 (hsotg->params.host_dma <= 0 && 3027 (!hsotg->params.host_dma &&
3028 !list_empty(&hsotg->periodic_sched_assigned))) { 3028 !list_empty(&hsotg->periodic_sched_assigned))) {
3029 /* 3029 /*
3030 * May need to queue more transactions as the request 3030 * May need to queue more transactions as the request
@@ -3045,7 +3045,7 @@ exit:
3045 * now. This function is called from interrupt 3045 * now. This function is called from interrupt
3046 * handlers to queue more transactions as transfer 3046 * handlers to queue more transactions as transfer
3047 * states change. 3047 * states change.
3048 */ 3048 */
3049 gintmsk = dwc2_readl(hsotg->regs + GINTMSK); 3049 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
3050 if (gintmsk & GINTSTS_PTXFEMP) { 3050 if (gintmsk & GINTSTS_PTXFEMP) {
3051 gintmsk &= ~GINTSTS_PTXFEMP; 3051 gintmsk &= ~GINTSTS_PTXFEMP;
@@ -3104,7 +3104,7 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg)
3104 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS); 3104 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS);
3105 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> 3105 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >>
3106 TXSTS_QSPCAVAIL_SHIFT; 3106 TXSTS_QSPCAVAIL_SHIFT;
3107 if (hsotg->params.host_dma <= 0 && qspcavail == 0) { 3107 if (!hsotg->params.host_dma && qspcavail == 0) {
3108 no_queue_space = 1; 3108 no_queue_space = 1;
3109 break; 3109 break;
3110 } 3110 }
@@ -3137,7 +3137,7 @@ next:
3137 hsotg->non_periodic_qh_ptr->next; 3137 hsotg->non_periodic_qh_ptr->next;
3138 } while (hsotg->non_periodic_qh_ptr != orig_qh_ptr); 3138 } while (hsotg->non_periodic_qh_ptr != orig_qh_ptr);
3139 3139
3140 if (hsotg->params.host_dma <= 0) { 3140 if (!hsotg->params.host_dma) {
3141 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS); 3141 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS);
3142 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> 3142 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >>
3143 TXSTS_QSPCAVAIL_SHIFT; 3143 TXSTS_QSPCAVAIL_SHIFT;
@@ -3235,12 +3235,25 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
3235 if (gotgctl & GOTGCTL_CONID_B) { 3235 if (gotgctl & GOTGCTL_CONID_B) {
3236 /* Wait for switch to device mode */ 3236 /* Wait for switch to device mode */
3237 dev_dbg(hsotg->dev, "connId B\n"); 3237 dev_dbg(hsotg->dev, "connId B\n");
3238 if (hsotg->bus_suspended) {
3239 dev_info(hsotg->dev,
3240 "Do port resume before switching to device mode\n");
3241 dwc2_port_resume(hsotg);
3242 }
3238 while (!dwc2_is_device_mode(hsotg)) { 3243 while (!dwc2_is_device_mode(hsotg)) {
3239 dev_info(hsotg->dev, 3244 dev_info(hsotg->dev,
3240 "Waiting for Peripheral Mode, Mode=%s\n", 3245 "Waiting for Peripheral Mode, Mode=%s\n",
3241 dwc2_is_host_mode(hsotg) ? "Host" : 3246 dwc2_is_host_mode(hsotg) ? "Host" :
3242 "Peripheral"); 3247 "Peripheral");
3243 usleep_range(20000, 40000); 3248 msleep(20);
3249 /*
3250 * Sometimes the initial GOTGCTRL read is wrong, so
3251 * check it again and jump to host mode if that was
3252 * the case.
3253 */
3254 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
3255 if (!(gotgctl & GOTGCTL_CONID_B))
3256 goto host;
3244 if (++count > 250) 3257 if (++count > 250)
3245 break; 3258 break;
3246 } 3259 }
@@ -3255,13 +3268,14 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
3255 spin_unlock_irqrestore(&hsotg->lock, flags); 3268 spin_unlock_irqrestore(&hsotg->lock, flags);
3256 dwc2_hsotg_core_connect(hsotg); 3269 dwc2_hsotg_core_connect(hsotg);
3257 } else { 3270 } else {
3271host:
3258 /* A-Device connector (Host Mode) */ 3272 /* A-Device connector (Host Mode) */
3259 dev_dbg(hsotg->dev, "connId A\n"); 3273 dev_dbg(hsotg->dev, "connId A\n");
3260 while (!dwc2_is_host_mode(hsotg)) { 3274 while (!dwc2_is_host_mode(hsotg)) {
3261 dev_info(hsotg->dev, "Waiting for Host Mode, Mode=%s\n", 3275 dev_info(hsotg->dev, "Waiting for Host Mode, Mode=%s\n",
3262 dwc2_is_host_mode(hsotg) ? 3276 dwc2_is_host_mode(hsotg) ?
3263 "Host" : "Peripheral"); 3277 "Host" : "Peripheral");
3264 usleep_range(20000, 40000); 3278 msleep(20);
3265 if (++count > 250) 3279 if (++count > 250)
3266 break; 3280 break;
3267 } 3281 }
@@ -3296,7 +3310,7 @@ static void dwc2_wakeup_detected(unsigned long data)
3296 dwc2_readl(hsotg->regs + HPRT0)); 3310 dwc2_readl(hsotg->regs + HPRT0));
3297 3311
3298 dwc2_hcd_rem_wakeup(hsotg); 3312 dwc2_hcd_rem_wakeup(hsotg);
3299 hsotg->bus_suspended = 0; 3313 hsotg->bus_suspended = false;
3300 3314
3301 /* Change to L0 state */ 3315 /* Change to L0 state */
3302 hsotg->lx_state = DWC2_L0; 3316 hsotg->lx_state = DWC2_L0;
@@ -3332,7 +3346,7 @@ static void dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)
3332 hprt0 |= HPRT0_SUSP; 3346 hprt0 |= HPRT0_SUSP;
3333 dwc2_writel(hprt0, hsotg->regs + HPRT0); 3347 dwc2_writel(hprt0, hsotg->regs + HPRT0);
3334 3348
3335 hsotg->bus_suspended = 1; 3349 hsotg->bus_suspended = true;
3336 3350
3337 /* 3351 /*
3338 * If hibernation is supported, Phy clock will be suspended 3352 * If hibernation is supported, Phy clock will be suspended
@@ -3354,7 +3368,7 @@ static void dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)
3354 3368
3355 spin_unlock_irqrestore(&hsotg->lock, flags); 3369 spin_unlock_irqrestore(&hsotg->lock, flags);
3356 3370
3357 usleep_range(200000, 250000); 3371 msleep(200);
3358 } else { 3372 } else {
3359 spin_unlock_irqrestore(&hsotg->lock, flags); 3373 spin_unlock_irqrestore(&hsotg->lock, flags);
3360 } 3374 }
@@ -3378,7 +3392,7 @@ static void dwc2_port_resume(struct dwc2_hsotg *hsotg)
3378 pcgctl &= ~PCGCTL_STOPPCLK; 3392 pcgctl &= ~PCGCTL_STOPPCLK;
3379 dwc2_writel(pcgctl, hsotg->regs + PCGCTL); 3393 dwc2_writel(pcgctl, hsotg->regs + PCGCTL);
3380 spin_unlock_irqrestore(&hsotg->lock, flags); 3394 spin_unlock_irqrestore(&hsotg->lock, flags);
3381 usleep_range(20000, 40000); 3395 msleep(20);
3382 spin_lock_irqsave(&hsotg->lock, flags); 3396 spin_lock_irqsave(&hsotg->lock, flags);
3383 } 3397 }
3384 3398
@@ -3394,7 +3408,7 @@ static void dwc2_port_resume(struct dwc2_hsotg *hsotg)
3394 hprt0 = dwc2_read_hprt0(hsotg); 3408 hprt0 = dwc2_read_hprt0(hsotg);
3395 hprt0 &= ~(HPRT0_RES | HPRT0_SUSP); 3409 hprt0 &= ~(HPRT0_RES | HPRT0_SUSP);
3396 dwc2_writel(hprt0, hsotg->regs + HPRT0); 3410 dwc2_writel(hprt0, hsotg->regs + HPRT0);
3397 hsotg->bus_suspended = 0; 3411 hsotg->bus_suspended = false;
3398 spin_unlock_irqrestore(&hsotg->lock, flags); 3412 spin_unlock_irqrestore(&hsotg->lock, flags);
3399} 3413}
3400 3414
@@ -3614,7 +3628,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
3614 u32 hcfg; 3628 u32 hcfg;
3615 3629
3616 dev_info(hsotg->dev, "Enabling descriptor DMA mode\n"); 3630 dev_info(hsotg->dev, "Enabling descriptor DMA mode\n");
3617 hsotg->params.dma_desc_enable = 1; 3631 hsotg->params.dma_desc_enable = true;
3618 hcfg = dwc2_readl(hsotg->regs + HCFG); 3632 hcfg = dwc2_readl(hsotg->regs + HCFG);
3619 hcfg |= HCFG_DESCDMA; 3633 hcfg |= HCFG_DESCDMA;
3620 dwc2_writel(hcfg, hsotg->regs + HCFG); 3634 dwc2_writel(hcfg, hsotg->regs + HCFG);
@@ -3691,7 +3705,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
3691 } 3705 }
3692 3706
3693 /* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */ 3707 /* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */
3694 usleep_range(50000, 70000); 3708 msleep(50);
3695 hprt0 &= ~HPRT0_RST; 3709 hprt0 &= ~HPRT0_RST;
3696 dwc2_writel(hprt0, hsotg->regs + HPRT0); 3710 dwc2_writel(hprt0, hsotg->regs + HPRT0);
3697 hsotg->lx_state = DWC2_L0; /* Now back to On state */ 3711 hsotg->lx_state = DWC2_L0; /* Now back to On state */
@@ -4047,7 +4061,7 @@ static struct dwc2_hsotg *dwc2_hcd_to_hsotg(struct usb_hcd *hcd)
4047{ 4061{
4048 struct wrapper_priv_data *p; 4062 struct wrapper_priv_data *p;
4049 4063
4050 p = (struct wrapper_priv_data *) &hcd->hcd_priv; 4064 p = (struct wrapper_priv_data *)&hcd->hcd_priv;
4051 return p->hsotg; 4065 return p->hsotg;
4052} 4066}
4053 4067
@@ -4082,7 +4096,7 @@ struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg, void *context,
4082 *ttport = urb->dev->ttport; 4096 *ttport = urb->dev->ttport;
4083 4097
4084 dwc_tt = urb->dev->tt->hcpriv; 4098 dwc_tt = urb->dev->tt->hcpriv;
4085 if (dwc_tt == NULL) { 4099 if (!dwc_tt) {
4086 size_t bitmap_size; 4100 size_t bitmap_size;
4087 4101
4088 /* 4102 /*
@@ -4096,7 +4110,7 @@ struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg, void *context,
4096 4110
4097 dwc_tt = kzalloc(sizeof(*dwc_tt) + bitmap_size, 4111 dwc_tt = kzalloc(sizeof(*dwc_tt) + bitmap_size,
4098 mem_flags); 4112 mem_flags);
4099 if (dwc_tt == NULL) 4113 if (!dwc_tt)
4100 return NULL; 4114 return NULL;
4101 4115
4102 dwc_tt->usb_tt = urb->dev->tt; 4116 dwc_tt->usb_tt = urb->dev->tt;
@@ -4123,7 +4137,7 @@ struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg, void *context,
4123void dwc2_host_put_tt_info(struct dwc2_hsotg *hsotg, struct dwc2_tt *dwc_tt) 4137void dwc2_host_put_tt_info(struct dwc2_hsotg *hsotg, struct dwc2_tt *dwc_tt)
4124{ 4138{
4125 /* Model kfree and make put of NULL a no-op */ 4139 /* Model kfree and make put of NULL a no-op */
4126 if (dwc_tt == NULL) 4140 if (!dwc_tt)
4127 return; 4141 return;
4128 4142
4129 WARN_ON(dwc_tt->refcount < 1); 4143 WARN_ON(dwc_tt->refcount < 1);
@@ -4206,7 +4220,6 @@ void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
4206 usb_pipein(urb->pipe) ? "IN" : "OUT", status, 4220 usb_pipein(urb->pipe) ? "IN" : "OUT", status,
4207 urb->actual_length); 4221 urb->actual_length);
4208 4222
4209
4210 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { 4223 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
4211 urb->error_count = dwc2_hcd_urb_get_error_count(qtd->urb); 4224 urb->error_count = dwc2_hcd_urb_get_error_count(qtd->urb);
4212 for (i = 0; i < urb->number_of_packets; ++i) { 4225 for (i = 0; i < urb->number_of_packets; ++i) {
@@ -4587,7 +4600,7 @@ static int _dwc2_hcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
4587 dwc2_dump_urb_info(hcd, urb, "urb_enqueue"); 4600 dwc2_dump_urb_info(hcd, urb, "urb_enqueue");
4588 } 4601 }
4589 4602
4590 if (ep == NULL) 4603 if (!ep)
4591 return -EINVAL; 4604 return -EINVAL;
4592 4605
4593 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS || 4606 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS ||
@@ -4657,7 +4670,7 @@ static int _dwc2_hcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
4657 urb->iso_frame_desc[i].length); 4670 urb->iso_frame_desc[i].length);
4658 4671
4659 urb->hcpriv = dwc2_urb; 4672 urb->hcpriv = dwc2_urb;
4660 qh = (struct dwc2_qh *) ep->hcpriv; 4673 qh = (struct dwc2_qh *)ep->hcpriv;
4661 /* Create QH for the endpoint if it doesn't exist */ 4674 /* Create QH for the endpoint if it doesn't exist */
4662 if (!qh) { 4675 if (!qh) {
4663 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, mem_flags); 4676 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, mem_flags);
@@ -4712,7 +4725,7 @@ fail1:
4712 dwc2_hcd_qh_unlink(hsotg, qh); 4725 dwc2_hcd_qh_unlink(hsotg, qh);
4713 /* Free each QTD in the QH's QTD list */ 4726 /* Free each QTD in the QH's QTD list */
4714 list_for_each_entry_safe(qtd2, qtd2_tmp, &qh->qtd_list, 4727 list_for_each_entry_safe(qtd2, qtd2_tmp, &qh->qtd_list,
4715 qtd_list_entry) 4728 qtd_list_entry)
4716 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd2, qh); 4729 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd2, qh);
4717 dwc2_hcd_qh_free(hsotg, qh); 4730 dwc2_hcd_qh_free(hsotg, qh);
4718 } 4731 }
@@ -4860,6 +4873,61 @@ static void _dwc2_hcd_clear_tt_buffer_complete(struct usb_hcd *hcd,
4860 spin_unlock_irqrestore(&hsotg->lock, flags); 4873 spin_unlock_irqrestore(&hsotg->lock, flags);
4861} 4874}
4862 4875
4876/*
4877 * HPRT0_SPD_HIGH_SPEED: high speed
4878 * HPRT0_SPD_FULL_SPEED: full speed
4879 */
4880static void dwc2_change_bus_speed(struct usb_hcd *hcd, int speed)
4881{
4882 struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
4883
4884 if (hsotg->params.speed == speed)
4885 return;
4886
4887 hsotg->params.speed = speed;
4888 queue_work(hsotg->wq_otg, &hsotg->wf_otg);
4889}
4890
4891static void dwc2_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
4892{
4893 struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
4894
4895 if (!hsotg->params.change_speed_quirk)
4896 return;
4897
4898 /*
4899 * On removal, set speed to default high-speed.
4900 */
4901 if (udev->parent && udev->parent->speed > USB_SPEED_UNKNOWN &&
4902 udev->parent->speed < USB_SPEED_HIGH) {
4903 dev_info(hsotg->dev, "Set speed to default high-speed\n");
4904 dwc2_change_bus_speed(hcd, HPRT0_SPD_HIGH_SPEED);
4905 }
4906}
4907
4908static int dwc2_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
4909{
4910 struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
4911
4912 if (!hsotg->params.change_speed_quirk)
4913 return 0;
4914
4915 if (udev->speed == USB_SPEED_HIGH) {
4916 dev_info(hsotg->dev, "Set speed to high-speed\n");
4917 dwc2_change_bus_speed(hcd, HPRT0_SPD_HIGH_SPEED);
4918 } else if ((udev->speed == USB_SPEED_FULL ||
4919 udev->speed == USB_SPEED_LOW)) {
4920 /*
4921 * Change speed setting to full-speed if there's
4922 * a full-speed or low-speed device plugged in.
4923 */
4924 dev_info(hsotg->dev, "Set speed to full-speed\n");
4925 dwc2_change_bus_speed(hcd, HPRT0_SPD_FULL_SPEED);
4926 }
4927
4928 return 0;
4929}
4930
4863static struct hc_driver dwc2_hc_driver = { 4931static struct hc_driver dwc2_hc_driver = {
4864 .description = "dwc2_hsotg", 4932 .description = "dwc2_hsotg",
4865 .product_desc = "DWC OTG Controller", 4933 .product_desc = "DWC OTG Controller",
@@ -4911,7 +4979,7 @@ static void dwc2_hcd_free(struct dwc2_hsotg *hsotg)
4911 for (i = 0; i < MAX_EPS_CHANNELS; i++) { 4979 for (i = 0; i < MAX_EPS_CHANNELS; i++) {
4912 struct dwc2_host_chan *chan = hsotg->hc_ptr_array[i]; 4980 struct dwc2_host_chan *chan = hsotg->hc_ptr_array[i];
4913 4981
4914 if (chan != NULL) { 4982 if (chan) {
4915 dev_dbg(hsotg->dev, "HCD Free channel #%i, chan=%p\n", 4983 dev_dbg(hsotg->dev, "HCD Free channel #%i, chan=%p\n",
4916 i, chan); 4984 i, chan);
4917 hsotg->hc_ptr_array[i] = NULL; 4985 hsotg->hc_ptr_array[i] = NULL;
@@ -4919,7 +4987,7 @@ static void dwc2_hcd_free(struct dwc2_hsotg *hsotg)
4919 } 4987 }
4920 } 4988 }
4921 4989
4922 if (hsotg->params.host_dma > 0) { 4990 if (hsotg->params.host_dma) {
4923 if (hsotg->status_buf) { 4991 if (hsotg->status_buf) {
4924 dma_free_coherent(hsotg->dev, DWC2_HCD_STATUS_BUF_SIZE, 4992 dma_free_coherent(hsotg->dev, DWC2_HCD_STATUS_BUF_SIZE,
4925 hsotg->status_buf, 4993 hsotg->status_buf,
@@ -4967,8 +5035,10 @@ static void dwc2_hcd_release(struct dwc2_hsotg *hsotg)
4967 * USB bus with the core and calls the hc_driver->start() function. It returns 5035 * USB bus with the core and calls the hc_driver->start() function. It returns
4968 * a negative error on failure. 5036 * a negative error on failure.
4969 */ 5037 */
4970int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq) 5038int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
4971{ 5039{
5040 struct platform_device *pdev = to_platform_device(hsotg->dev);
5041 struct resource *res;
4972 struct usb_hcd *hcd; 5042 struct usb_hcd *hcd;
4973 struct dwc2_host_chan *channel; 5043 struct dwc2_host_chan *channel;
4974 u32 hcfg; 5044 u32 hcfg;
@@ -4999,32 +5069,41 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
4999 hsotg->last_frame_num = HFNUM_MAX_FRNUM; 5069 hsotg->last_frame_num = HFNUM_MAX_FRNUM;
5000 5070
5001 /* Check if the bus driver or platform code has setup a dma_mask */ 5071 /* Check if the bus driver or platform code has setup a dma_mask */
5002 if (hsotg->params.host_dma > 0 && 5072 if (hsotg->params.host_dma &&
5003 hsotg->dev->dma_mask == NULL) { 5073 !hsotg->dev->dma_mask) {
5004 dev_warn(hsotg->dev, 5074 dev_warn(hsotg->dev,
5005 "dma_mask not set, disabling DMA\n"); 5075 "dma_mask not set, disabling DMA\n");
5006 hsotg->params.host_dma = 0; 5076 hsotg->params.host_dma = false;
5007 hsotg->params.dma_desc_enable = 0; 5077 hsotg->params.dma_desc_enable = false;
5008 } 5078 }
5009 5079
5010 /* Set device flags indicating whether the HCD supports DMA */ 5080 /* Set device flags indicating whether the HCD supports DMA */
5011 if (hsotg->params.host_dma > 0) { 5081 if (hsotg->params.host_dma) {
5012 if (dma_set_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0) 5082 if (dma_set_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0)
5013 dev_warn(hsotg->dev, "can't set DMA mask\n"); 5083 dev_warn(hsotg->dev, "can't set DMA mask\n");
5014 if (dma_set_coherent_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0) 5084 if (dma_set_coherent_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0)
5015 dev_warn(hsotg->dev, "can't set coherent DMA mask\n"); 5085 dev_warn(hsotg->dev, "can't set coherent DMA mask\n");
5016 } 5086 }
5017 5087
5088 if (hsotg->params.change_speed_quirk) {
5089 dwc2_hc_driver.free_dev = dwc2_free_dev;
5090 dwc2_hc_driver.reset_device = dwc2_reset_device;
5091 }
5092
5018 hcd = usb_create_hcd(&dwc2_hc_driver, hsotg->dev, dev_name(hsotg->dev)); 5093 hcd = usb_create_hcd(&dwc2_hc_driver, hsotg->dev, dev_name(hsotg->dev));
5019 if (!hcd) 5094 if (!hcd)
5020 goto error1; 5095 goto error1;
5021 5096
5022 if (hsotg->params.host_dma <= 0) 5097 if (!hsotg->params.host_dma)
5023 hcd->self.uses_dma = 0; 5098 hcd->self.uses_dma = 0;
5024 5099
5025 hcd->has_tt = 1; 5100 hcd->has_tt = 1;
5026 5101
5027 ((struct wrapper_priv_data *) &hcd->hcd_priv)->hsotg = hsotg; 5102 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5103 hcd->rsrc_start = res->start;
5104 hcd->rsrc_len = resource_size(res);
5105
5106 ((struct wrapper_priv_data *)&hcd->hcd_priv)->hsotg = hsotg;
5028 hsotg->priv = hcd; 5107 hsotg->priv = hcd;
5029 5108
5030 /* 5109 /*
@@ -5072,7 +5151,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5072 5151
5073 for (i = 0; i < num_channels; i++) { 5152 for (i = 0; i < num_channels; i++) {
5074 channel = kzalloc(sizeof(*channel), GFP_KERNEL); 5153 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
5075 if (channel == NULL) 5154 if (!channel)
5076 goto error3; 5155 goto error3;
5077 channel->hc_num = i; 5156 channel->hc_num = i;
5078 INIT_LIST_HEAD(&channel->split_order_list_entry); 5157 INIT_LIST_HEAD(&channel->split_order_list_entry);
@@ -5091,7 +5170,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5091 * done after usb_add_hcd since that function allocates the DMA buffer 5170 * done after usb_add_hcd since that function allocates the DMA buffer
5092 * pool. 5171 * pool.
5093 */ 5172 */
5094 if (hsotg->params.host_dma > 0) 5173 if (hsotg->params.host_dma)
5095 hsotg->status_buf = dma_alloc_coherent(hsotg->dev, 5174 hsotg->status_buf = dma_alloc_coherent(hsotg->dev,
5096 DWC2_HCD_STATUS_BUF_SIZE, 5175 DWC2_HCD_STATUS_BUF_SIZE,
5097 &hsotg->status_buf_dma, GFP_KERNEL); 5176 &hsotg->status_buf_dma, GFP_KERNEL);
@@ -5121,8 +5200,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5121 * Disable descriptor dma mode since it will not be 5200 * Disable descriptor dma mode since it will not be
5122 * usable. 5201 * usable.
5123 */ 5202 */
5124 hsotg->params.dma_desc_enable = 0; 5203 hsotg->params.dma_desc_enable = false;
5125 hsotg->params.dma_desc_fs_enable = 0; 5204 hsotg->params.dma_desc_fs_enable = false;
5126 } 5205 }
5127 5206
5128 hsotg->desc_hsisoc_cache = kmem_cache_create("dwc2-hsisoc-desc", 5207 hsotg->desc_hsisoc_cache = kmem_cache_create("dwc2-hsisoc-desc",
@@ -5138,8 +5217,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5138 * Disable descriptor dma mode since it will not be 5217 * Disable descriptor dma mode since it will not be
5139 * usable. 5218 * usable.
5140 */ 5219 */
5141 hsotg->params.dma_desc_enable = 0; 5220 hsotg->params.dma_desc_enable = false;
5142 hsotg->params.dma_desc_fs_enable = 0; 5221 hsotg->params.dma_desc_fs_enable = false;
5143 } 5222 }
5144 } 5223 }
5145 5224
@@ -5164,7 +5243,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5164 * allocates the DMA buffer pool, registers the USB bus, requests the 5243 * allocates the DMA buffer pool, registers the USB bus, requests the
5165 * IRQ line, and calls hcd_start method. 5244 * IRQ line, and calls hcd_start method.
5166 */ 5245 */
5167 retval = usb_add_hcd(hcd, irq, IRQF_SHARED); 5246 retval = usb_add_hcd(hcd, hsotg->irq, IRQF_SHARED);
5168 if (retval < 0) 5247 if (retval < 0)
5169 goto error4; 5248 goto error4;
5170 5249
diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
index 1ed5fa2beff4..11c3c145b793 100644
--- a/drivers/usb/dwc2/hcd.h
+++ b/drivers/usb/dwc2/hcd.h
@@ -521,29 +521,29 @@ static inline u8 dwc2_hcd_is_pipe_out(struct dwc2_hcd_pipe_info *pipe)
521 return !dwc2_hcd_is_pipe_in(pipe); 521 return !dwc2_hcd_is_pipe_in(pipe);
522} 522}
523 523
524extern int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq); 524int dwc2_hcd_init(struct dwc2_hsotg *hsotg);
525extern void dwc2_hcd_remove(struct dwc2_hsotg *hsotg); 525void dwc2_hcd_remove(struct dwc2_hsotg *hsotg);
526 526
527/* Transaction Execution Functions */ 527/* Transaction Execution Functions */
528extern enum dwc2_transaction_type dwc2_hcd_select_transactions( 528enum dwc2_transaction_type dwc2_hcd_select_transactions(
529 struct dwc2_hsotg *hsotg); 529 struct dwc2_hsotg *hsotg);
530extern void dwc2_hcd_queue_transactions(struct dwc2_hsotg *hsotg, 530void dwc2_hcd_queue_transactions(struct dwc2_hsotg *hsotg,
531 enum dwc2_transaction_type tr_type); 531 enum dwc2_transaction_type tr_type);
532 532
533/* Schedule Queue Functions */ 533/* Schedule Queue Functions */
534/* Implemented in hcd_queue.c */ 534/* Implemented in hcd_queue.c */
535extern struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg, 535struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
536 struct dwc2_hcd_urb *urb, 536 struct dwc2_hcd_urb *urb,
537 gfp_t mem_flags); 537 gfp_t mem_flags);
538extern void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh); 538void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh);
539extern int dwc2_hcd_qh_add(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh); 539int dwc2_hcd_qh_add(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh);
540extern void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh); 540void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh);
541extern void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, 541void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
542 int sched_csplit); 542 int sched_csplit);
543 543
544extern void dwc2_hcd_qtd_init(struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb); 544void dwc2_hcd_qtd_init(struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb);
545extern int dwc2_hcd_qtd_add(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 545int dwc2_hcd_qtd_add(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
546 struct dwc2_qh *qh); 546 struct dwc2_qh *qh);
547 547
548/* Unlinks and frees a QTD */ 548/* Unlinks and frees a QTD */
549static inline void dwc2_hcd_qtd_unlink_and_free(struct dwc2_hsotg *hsotg, 549static inline void dwc2_hcd_qtd_unlink_and_free(struct dwc2_hsotg *hsotg,
@@ -556,15 +556,15 @@ static inline void dwc2_hcd_qtd_unlink_and_free(struct dwc2_hsotg *hsotg,
556} 556}
557 557
558/* Descriptor DMA support functions */ 558/* Descriptor DMA support functions */
559extern void dwc2_hcd_start_xfer_ddma(struct dwc2_hsotg *hsotg, 559void dwc2_hcd_start_xfer_ddma(struct dwc2_hsotg *hsotg,
560 struct dwc2_qh *qh); 560 struct dwc2_qh *qh);
561extern void dwc2_hcd_complete_xfer_ddma(struct dwc2_hsotg *hsotg, 561void dwc2_hcd_complete_xfer_ddma(struct dwc2_hsotg *hsotg,
562 struct dwc2_host_chan *chan, int chnum, 562 struct dwc2_host_chan *chan, int chnum,
563 enum dwc2_halt_status halt_status); 563 enum dwc2_halt_status halt_status);
564 564
565extern int dwc2_hcd_qh_init_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, 565int dwc2_hcd_qh_init_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
566 gfp_t mem_flags); 566 gfp_t mem_flags);
567extern void dwc2_hcd_qh_free_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh); 567void dwc2_hcd_qh_free_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh);
568 568
569/* Check if QH is non-periodic */ 569/* Check if QH is non-periodic */
570#define dwc2_qh_is_non_per(_qh_ptr_) \ 570#define dwc2_qh_is_non_per(_qh_ptr_) \
@@ -732,8 +732,8 @@ static inline u16 dwc2_hcd_get_ep_bandwidth(struct dwc2_hsotg *hsotg,
732 return qh->host_us; 732 return qh->host_us;
733} 733}
734 734
735extern void dwc2_hcd_save_data_toggle(struct dwc2_hsotg *hsotg, 735void dwc2_hcd_save_data_toggle(struct dwc2_hsotg *hsotg,
736 struct dwc2_host_chan *chan, int chnum, 736 struct dwc2_host_chan *chan, int chnum,
737 struct dwc2_qtd *qtd); 737 struct dwc2_qtd *qtd);
738 738
739/* HCD Core API */ 739/* HCD Core API */
@@ -746,14 +746,14 @@ extern void dwc2_hcd_save_data_toggle(struct dwc2_hsotg *hsotg,
746 * Returns IRQ_HANDLED if interrupt is handled 746 * Returns IRQ_HANDLED if interrupt is handled
747 * Return IRQ_NONE if interrupt is not handled 747 * Return IRQ_NONE if interrupt is not handled
748 */ 748 */
749extern irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg *hsotg); 749irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg *hsotg);
750 750
751/** 751/**
752 * dwc2_hcd_stop() - Halts the DWC_otg host mode operation 752 * dwc2_hcd_stop() - Halts the DWC_otg host mode operation
753 * 753 *
754 * @hsotg: The DWC2 HCD 754 * @hsotg: The DWC2 HCD
755 */ 755 */
756extern void dwc2_hcd_stop(struct dwc2_hsotg *hsotg); 756void dwc2_hcd_stop(struct dwc2_hsotg *hsotg);
757 757
758/** 758/**
759 * dwc2_hcd_is_b_host() - Returns 1 if core currently is acting as B host, 759 * dwc2_hcd_is_b_host() - Returns 1 if core currently is acting as B host,
@@ -761,7 +761,7 @@ extern void dwc2_hcd_stop(struct dwc2_hsotg *hsotg);
761 * 761 *
762 * @hsotg: The DWC2 HCD 762 * @hsotg: The DWC2 HCD
763 */ 763 */
764extern int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg); 764int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg);
765 765
766/** 766/**
767 * dwc2_hcd_dump_state() - Dumps hsotg state 767 * dwc2_hcd_dump_state() - Dumps hsotg state
@@ -771,7 +771,7 @@ extern int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg);
771 * NOTE: This function will be removed once the peripheral controller code 771 * NOTE: This function will be removed once the peripheral controller code
772 * is integrated and the driver is stable 772 * is integrated and the driver is stable
773 */ 773 */
774extern void dwc2_hcd_dump_state(struct dwc2_hsotg *hsotg); 774void dwc2_hcd_dump_state(struct dwc2_hsotg *hsotg);
775 775
776/** 776/**
777 * dwc2_hcd_dump_frrem() - Dumps the average frame remaining at SOF 777 * dwc2_hcd_dump_frrem() - Dumps the average frame remaining at SOF
@@ -784,7 +784,7 @@ extern void dwc2_hcd_dump_state(struct dwc2_hsotg *hsotg);
784 * NOTE: This function will be removed once the peripheral controller code 784 * NOTE: This function will be removed once the peripheral controller code
785 * is integrated and the driver is stable 785 * is integrated and the driver is stable
786 */ 786 */
787extern void dwc2_hcd_dump_frrem(struct dwc2_hsotg *hsotg); 787void dwc2_hcd_dump_frrem(struct dwc2_hsotg *hsotg);
788 788
789/* URB interface */ 789/* URB interface */
790 790
@@ -793,15 +793,15 @@ extern void dwc2_hcd_dump_frrem(struct dwc2_hsotg *hsotg);
793#define URB_SEND_ZERO_PACKET 0x2 793#define URB_SEND_ZERO_PACKET 0x2
794 794
795/* Host driver callbacks */ 795/* Host driver callbacks */
796extern struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg, 796struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg,
797 void *context, gfp_t mem_flags, 797 void *context, gfp_t mem_flags,
798 int *ttport); 798 int *ttport);
799 799
800extern void dwc2_host_put_tt_info(struct dwc2_hsotg *hsotg, 800void dwc2_host_put_tt_info(struct dwc2_hsotg *hsotg,
801 struct dwc2_tt *dwc_tt); 801 struct dwc2_tt *dwc_tt);
802extern int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context); 802int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context);
803extern void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 803void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
804 int status); 804 int status);
805 805
806#ifdef DEBUG 806#ifdef DEBUG
807/* 807/*
diff --git a/drivers/usb/dwc2/hcd_ddma.c b/drivers/usb/dwc2/hcd_ddma.c
index cf0367768cb3..b8bdf545c3a7 100644
--- a/drivers/usb/dwc2/hcd_ddma.c
+++ b/drivers/usb/dwc2/hcd_ddma.c
@@ -89,8 +89,8 @@ static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
89{ 89{
90 struct kmem_cache *desc_cache; 90 struct kmem_cache *desc_cache;
91 91
92 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC 92 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC &&
93 && qh->dev_speed == USB_SPEED_HIGH) 93 qh->dev_speed == USB_SPEED_HIGH)
94 desc_cache = hsotg->desc_hsisoc_cache; 94 desc_cache = hsotg->desc_hsisoc_cache;
95 else 95 else
96 desc_cache = hsotg->desc_gen_cache; 96 desc_cache = hsotg->desc_gen_cache;
@@ -106,7 +106,7 @@ static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
106 qh->desc_list_sz, 106 qh->desc_list_sz,
107 DMA_TO_DEVICE); 107 DMA_TO_DEVICE);
108 108
109 qh->n_bytes = kzalloc(sizeof(u32) * dwc2_max_desc_num(qh), flags); 109 qh->n_bytes = kcalloc(dwc2_max_desc_num(qh), sizeof(u32), flags);
110 if (!qh->n_bytes) { 110 if (!qh->n_bytes) {
111 dma_unmap_single(hsotg->dev, qh->desc_list_dma, 111 dma_unmap_single(hsotg->dev, qh->desc_list_dma,
112 qh->desc_list_sz, 112 qh->desc_list_sz,
@@ -123,8 +123,8 @@ static void dwc2_desc_list_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
123{ 123{
124 struct kmem_cache *desc_cache; 124 struct kmem_cache *desc_cache;
125 125
126 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC 126 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC &&
127 && qh->dev_speed == USB_SPEED_HIGH) 127 qh->dev_speed == USB_SPEED_HIGH)
128 desc_cache = hsotg->desc_hsisoc_cache; 128 desc_cache = hsotg->desc_hsisoc_cache;
129 else 129 else
130 desc_cache = hsotg->desc_gen_cache; 130 desc_cache = hsotg->desc_gen_cache;
@@ -175,7 +175,6 @@ static void dwc2_frame_list_free(struct dwc2_hsotg *hsotg)
175 hsotg->frame_list = NULL; 175 hsotg->frame_list = NULL;
176 176
177 spin_unlock_irqrestore(&hsotg->lock, flags); 177 spin_unlock_irqrestore(&hsotg->lock, flags);
178
179} 178}
180 179
181static void dwc2_per_sched_enable(struct dwc2_hsotg *hsotg, u32 fr_list_en) 180static void dwc2_per_sched_enable(struct dwc2_hsotg *hsotg, u32 fr_list_en)
@@ -297,7 +296,7 @@ static void dwc2_release_channel_ddma(struct dwc2_hsotg *hsotg,
297 struct dwc2_host_chan *chan = qh->channel; 296 struct dwc2_host_chan *chan = qh->channel;
298 297
299 if (dwc2_qh_is_non_per(qh)) { 298 if (dwc2_qh_is_non_per(qh)) {
300 if (hsotg->params.uframe_sched > 0) 299 if (hsotg->params.uframe_sched)
301 hsotg->available_host_channels++; 300 hsotg->available_host_channels++;
302 else 301 else
303 hsotg->non_periodic_channels--; 302 hsotg->non_periodic_channels--;
@@ -404,7 +403,7 @@ void dwc2_hcd_qh_free_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
404 403
405 if ((qh->ep_type == USB_ENDPOINT_XFER_ISOC || 404 if ((qh->ep_type == USB_ENDPOINT_XFER_ISOC ||
406 qh->ep_type == USB_ENDPOINT_XFER_INT) && 405 qh->ep_type == USB_ENDPOINT_XFER_INT) &&
407 (hsotg->params.uframe_sched > 0 || 406 (hsotg->params.uframe_sched ||
408 !hsotg->periodic_channels) && hsotg->frame_list) { 407 !hsotg->periodic_channels) && hsotg->frame_list) {
409 dwc2_per_sched_disable(hsotg); 408 dwc2_per_sched_disable(hsotg);
410 dwc2_frame_list_free(hsotg); 409 dwc2_frame_list_free(hsotg);
@@ -570,7 +569,7 @@ static void dwc2_fill_host_isoc_dma_desc(struct dwc2_hsotg *hsotg,
570#endif 569#endif
571 570
572 dma_sync_single_for_device(hsotg->dev, 571 dma_sync_single_for_device(hsotg->dev,
573 qh->desc_list_dma + 572 qh->desc_list_dma +
574 (idx * sizeof(struct dwc2_dma_desc)), 573 (idx * sizeof(struct dwc2_dma_desc)),
575 sizeof(struct dwc2_dma_desc), 574 sizeof(struct dwc2_dma_desc),
576 DMA_TO_DEVICE); 575 DMA_TO_DEVICE);
@@ -776,7 +775,7 @@ static void dwc2_init_non_isoc_dma_desc(struct dwc2_hsotg *hsotg,
776 n_desc - 1, 775 n_desc - 1,
777 &qh->desc_list[n_desc - 1]); 776 &qh->desc_list[n_desc - 1]);
778 dma_sync_single_for_device(hsotg->dev, 777 dma_sync_single_for_device(hsotg->dev,
779 qh->desc_list_dma + 778 qh->desc_list_dma +
780 ((n_desc - 1) * 779 ((n_desc - 1) *
781 sizeof(struct dwc2_dma_desc)), 780 sizeof(struct dwc2_dma_desc)),
782 sizeof(struct dwc2_dma_desc), 781 sizeof(struct dwc2_dma_desc),
@@ -816,7 +815,7 @@ static void dwc2_init_non_isoc_dma_desc(struct dwc2_hsotg *hsotg,
816 dev_vdbg(hsotg->dev, "set A bit in desc 0 (%p)\n", 815 dev_vdbg(hsotg->dev, "set A bit in desc 0 (%p)\n",
817 &qh->desc_list[0]); 816 &qh->desc_list[0]);
818 dma_sync_single_for_device(hsotg->dev, 817 dma_sync_single_for_device(hsotg->dev,
819 qh->desc_list_dma, 818 qh->desc_list_dma,
820 sizeof(struct dwc2_dma_desc), 819 sizeof(struct dwc2_dma_desc),
821 DMA_TO_DEVICE); 820 DMA_TO_DEVICE);
822 } 821 }
@@ -1064,7 +1063,7 @@ stop_scan:
1064} 1063}
1065 1064
1066static int dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg, 1065static int dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg,
1067 struct dwc2_host_chan *chan, 1066 struct dwc2_host_chan *chan,
1068 struct dwc2_qtd *qtd, 1067 struct dwc2_qtd *qtd,
1069 struct dwc2_dma_desc *dma_desc, 1068 struct dwc2_dma_desc *dma_desc,
1070 enum dwc2_halt_status halt_status, 1069 enum dwc2_halt_status halt_status,
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index b8f4b6aaf1d0..28a8210710b1 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -60,7 +60,7 @@ static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg)
60 60
61 if (expected != curr_frame_number) 61 if (expected != curr_frame_number)
62 dwc2_sch_vdbg(hsotg, "MISSED SOF %04x != %04x\n", 62 dwc2_sch_vdbg(hsotg, "MISSED SOF %04x != %04x\n",
63 expected, curr_frame_number); 63 expected, curr_frame_number);
64 64
65#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS 65#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS
66 if (hsotg->frame_num_idx < FRAME_NUM_ARRAY_SIZE) { 66 if (hsotg->frame_num_idx < FRAME_NUM_ARRAY_SIZE) {
@@ -163,7 +163,7 @@ static void dwc2_sof_intr(struct dwc2_hsotg *hsotg)
163 * (micro)frame 163 * (micro)frame
164 */ 164 */
165 list_move_tail(&qh->qh_list_entry, 165 list_move_tail(&qh->qh_list_entry,
166 &hsotg->periodic_sched_ready); 166 &hsotg->periodic_sched_ready);
167 } 167 }
168 } 168 }
169 tr_type = dwc2_hcd_select_transactions(hsotg); 169 tr_type = dwc2_hcd_select_transactions(hsotg);
@@ -297,8 +297,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
297 HCFG_FSLSPCLKSEL_SHIFT; 297 HCFG_FSLSPCLKSEL_SHIFT;
298 298
299 if (prtspd == HPRT0_SPD_LOW_SPEED && 299 if (prtspd == HPRT0_SPD_LOW_SPEED &&
300 params->host_ls_low_power_phy_clk == 300 params->host_ls_low_power_phy_clk) {
301 DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ) {
302 /* 6 MHZ */ 301 /* 6 MHZ */
303 dev_vdbg(hsotg->dev, 302 dev_vdbg(hsotg->dev,
304 "FS_PHY programming HCFG to 6 MHz\n"); 303 "FS_PHY programming HCFG to 6 MHz\n");
@@ -398,7 +397,7 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)
398 if (hsotg->params.dma_desc_fs_enable) { 397 if (hsotg->params.dma_desc_fs_enable) {
399 u32 hcfg; 398 u32 hcfg;
400 399
401 hsotg->params.dma_desc_enable = 0; 400 hsotg->params.dma_desc_enable = false;
402 hsotg->new_connection = false; 401 hsotg->new_connection = false;
403 hcfg = dwc2_readl(hsotg->regs + HCFG); 402 hcfg = dwc2_readl(hsotg->regs + HCFG);
404 hcfg &= ~HCFG_DESCDMA; 403 hcfg &= ~HCFG_DESCDMA;
@@ -442,7 +441,7 @@ static u32 dwc2_get_actual_xfer_length(struct dwc2_hsotg *hsotg,
442 count = (hctsiz & TSIZ_XFERSIZE_MASK) >> 441 count = (hctsiz & TSIZ_XFERSIZE_MASK) >>
443 TSIZ_XFERSIZE_SHIFT; 442 TSIZ_XFERSIZE_SHIFT;
444 length = chan->xfer_len - count; 443 length = chan->xfer_len - count;
445 if (short_read != NULL) 444 if (short_read)
446 *short_read = (count != 0); 445 *short_read = (count != 0);
447 } else if (chan->qh->do_split) { 446 } else if (chan->qh->do_split) {
448 length = qtd->ssplit_out_xfer_count; 447 length = qtd->ssplit_out_xfer_count;
@@ -604,7 +603,7 @@ static enum dwc2_halt_status dwc2_update_isoc_urb_state(
604 /* Skip whole frame */ 603 /* Skip whole frame */
605 if (chan->qh->do_split && 604 if (chan->qh->do_split &&
606 chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in && 605 chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in &&
607 hsotg->params.host_dma > 0) { 606 hsotg->params.host_dma) {
608 qtd->complete_split = 0; 607 qtd->complete_split = 0;
609 qtd->isoc_split_offset = 0; 608 qtd->isoc_split_offset = 0;
610 } 609 }
@@ -743,7 +742,7 @@ cleanup:
743 dwc2_hc_cleanup(hsotg, chan); 742 dwc2_hc_cleanup(hsotg, chan);
744 list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list); 743 list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list);
745 744
746 if (hsotg->params.uframe_sched > 0) { 745 if (hsotg->params.uframe_sched) {
747 hsotg->available_host_channels++; 746 hsotg->available_host_channels++;
748 } else { 747 } else {
749 switch (chan->ep_type) { 748 switch (chan->ep_type) {
@@ -789,7 +788,7 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,
789 if (dbg_hc(chan)) 788 if (dbg_hc(chan))
790 dev_vdbg(hsotg->dev, "%s()\n", __func__); 789 dev_vdbg(hsotg->dev, "%s()\n", __func__);
791 790
792 if (hsotg->params.host_dma > 0) { 791 if (hsotg->params.host_dma) {
793 if (dbg_hc(chan)) 792 if (dbg_hc(chan))
794 dev_vdbg(hsotg->dev, "DMA enabled\n"); 793 dev_vdbg(hsotg->dev, "DMA enabled\n");
795 dwc2_release_channel(hsotg, chan, qtd, halt_status); 794 dwc2_release_channel(hsotg, chan, qtd, halt_status);
@@ -823,7 +822,7 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,
823 * processed. 822 * processed.
824 */ 823 */
825 list_move_tail(&chan->qh->qh_list_entry, 824 list_move_tail(&chan->qh->qh_list_entry,
826 &hsotg->periodic_sched_assigned); 825 &hsotg->periodic_sched_assigned);
827 826
828 /* 827 /*
829 * Make sure the Periodic Tx FIFO Empty interrupt is 828 * Make sure the Periodic Tx FIFO Empty interrupt is
@@ -979,7 +978,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg,
979 978
980 pipe_type = dwc2_hcd_get_pipe_type(&urb->pipe_info); 979 pipe_type = dwc2_hcd_get_pipe_type(&urb->pipe_info);
981 980
982 if (hsotg->params.dma_desc_enable > 0) { 981 if (hsotg->params.dma_desc_enable) {
983 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, halt_status); 982 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, halt_status);
984 if (pipe_type == USB_ENDPOINT_XFER_ISOC) 983 if (pipe_type == USB_ENDPOINT_XFER_ISOC)
985 /* Do not disable the interrupt, just clear it */ 984 /* Do not disable the interrupt, just clear it */
@@ -990,7 +989,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg,
990 /* Handle xfer complete on CSPLIT */ 989 /* Handle xfer complete on CSPLIT */
991 if (chan->qh->do_split) { 990 if (chan->qh->do_split) {
992 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in && 991 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in &&
993 hsotg->params.host_dma > 0) { 992 hsotg->params.host_dma) {
994 if (qtd->complete_split && 993 if (qtd->complete_split &&
995 dwc2_xfercomp_isoc_split_in(hsotg, chan, chnum, 994 dwc2_xfercomp_isoc_split_in(hsotg, chan, chnum,
996 qtd)) 995 qtd))
@@ -1078,7 +1077,8 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg,
1078 dev_vdbg(hsotg->dev, " Isochronous transfer complete\n"); 1077 dev_vdbg(hsotg->dev, " Isochronous transfer complete\n");
1079 if (qtd->isoc_split_pos == DWC2_HCSPLT_XACTPOS_ALL) 1078 if (qtd->isoc_split_pos == DWC2_HCSPLT_XACTPOS_ALL)
1080 halt_status = dwc2_update_isoc_urb_state(hsotg, chan, 1079 halt_status = dwc2_update_isoc_urb_state(hsotg, chan,
1081 chnum, qtd, DWC2_HC_XFER_COMPLETE); 1080 chnum, qtd,
1081 DWC2_HC_XFER_COMPLETE);
1082 dwc2_complete_periodic_xfer(hsotg, chan, chnum, qtd, 1082 dwc2_complete_periodic_xfer(hsotg, chan, chnum, qtd,
1083 halt_status); 1083 halt_status);
1084 break; 1084 break;
@@ -1102,7 +1102,7 @@ static void dwc2_hc_stall_intr(struct dwc2_hsotg *hsotg,
1102 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: STALL Received--\n", 1102 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: STALL Received--\n",
1103 chnum); 1103 chnum);
1104 1104
1105 if (hsotg->params.dma_desc_enable > 0) { 1105 if (hsotg->params.dma_desc_enable) {
1106 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1106 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1107 DWC2_HC_XFER_STALL); 1107 DWC2_HC_XFER_STALL);
1108 goto handle_stall_done; 1108 goto handle_stall_done;
@@ -1212,7 +1212,7 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg,
1212 switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) { 1212 switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) {
1213 case USB_ENDPOINT_XFER_CONTROL: 1213 case USB_ENDPOINT_XFER_CONTROL:
1214 case USB_ENDPOINT_XFER_BULK: 1214 case USB_ENDPOINT_XFER_BULK:
1215 if (hsotg->params.host_dma > 0 && chan->ep_is_in) { 1215 if (hsotg->params.host_dma && chan->ep_is_in) {
1216 /* 1216 /*
1217 * NAK interrupts are enabled on bulk/control IN 1217 * NAK interrupts are enabled on bulk/control IN
1218 * transfers in DMA mode for the sole purpose of 1218 * transfers in DMA mode for the sole purpose of
@@ -1358,7 +1358,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
1358 */ 1358 */
1359 if (chan->do_split && chan->complete_split) { 1359 if (chan->do_split && chan->complete_split) {
1360 if (chan->ep_is_in && chan->ep_type == USB_ENDPOINT_XFER_ISOC && 1360 if (chan->ep_is_in && chan->ep_type == USB_ENDPOINT_XFER_ISOC &&
1361 hsotg->params.host_dma > 0) { 1361 hsotg->params.host_dma) {
1362 qtd->complete_split = 0; 1362 qtd->complete_split = 0;
1363 qtd->isoc_split_offset = 0; 1363 qtd->isoc_split_offset = 0;
1364 qtd->isoc_frame_index++; 1364 qtd->isoc_frame_index++;
@@ -1379,7 +1379,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
1379 struct dwc2_qh *qh = chan->qh; 1379 struct dwc2_qh *qh = chan->qh;
1380 bool past_end; 1380 bool past_end;
1381 1381
1382 if (hsotg->params.uframe_sched <= 0) { 1382 if (!hsotg->params.uframe_sched) {
1383 int frnum = dwc2_hcd_get_frame_number(hsotg); 1383 int frnum = dwc2_hcd_get_frame_number(hsotg);
1384 1384
1385 /* Don't have num_hs_transfers; simple logic */ 1385 /* Don't have num_hs_transfers; simple logic */
@@ -1389,22 +1389,27 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
1389 int end_frnum; 1389 int end_frnum;
1390 1390
1391 /* 1391 /*
1392 * Figure out the end frame based on schedule. 1392 * Figure out the end frame based on
1393 * 1393 * schedule.
1394 * We don't want to go on trying again and again 1394 *
1395 * forever. Let's stop when we've done all the 1395 * We don't want to go on trying again
1396 * transfers that were scheduled. 1396 * and again forever. Let's stop when
1397 * 1397 * we've done all the transfers that
1398 * We're going to be comparing start_active_frame 1398 * were scheduled.
1399 * and next_active_frame, both of which are 1 1399 *
1400 * before the time the packet goes on the wire, 1400 * We're going to be comparing
1401 * so that cancels out. Basically if had 1 1401 * start_active_frame and
1402 * transfer and we saw 1 NYET then we're done. 1402 * next_active_frame, both of which
1403 * We're getting a NYET here so if next >= 1403 * are 1 before the time the packet
1404 * (start + num_transfers) we're done. The 1404 * goes on the wire, so that cancels
1405 * complexity is that for all but ISOC_OUT we 1405 * out. Basically if had 1 transfer
1406 * skip one slot. 1406 * and we saw 1 NYET then we're done.
1407 */ 1407 * We're getting a NYET here so if
1408 * next >= (start + num_transfers)
1409 * we're done. The complexity is that
1410 * for all but ISOC_OUT we skip one
1411 * slot.
1412 */
1408 end_frnum = dwc2_frame_num_inc( 1413 end_frnum = dwc2_frame_num_inc(
1409 qh->start_active_frame, 1414 qh->start_active_frame,
1410 qh->num_hs_transfers); 1415 qh->num_hs_transfers);
@@ -1472,7 +1477,7 @@ static void dwc2_hc_babble_intr(struct dwc2_hsotg *hsotg,
1472 1477
1473 dwc2_hc_handle_tt_clear(hsotg, chan, qtd); 1478 dwc2_hc_handle_tt_clear(hsotg, chan, qtd);
1474 1479
1475 if (hsotg->params.dma_desc_enable > 0) { 1480 if (hsotg->params.dma_desc_enable) {
1476 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1481 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1477 DWC2_HC_XFER_BABBLE_ERR); 1482 DWC2_HC_XFER_BABBLE_ERR);
1478 goto disable_int; 1483 goto disable_int;
@@ -1577,7 +1582,7 @@ static void dwc2_hc_ahberr_intr(struct dwc2_hsotg *hsotg,
1577 dev_err(hsotg->dev, " Interval: %d\n", urb->interval); 1582 dev_err(hsotg->dev, " Interval: %d\n", urb->interval);
1578 1583
1579 /* Core halts the channel for Descriptor DMA mode */ 1584 /* Core halts the channel for Descriptor DMA mode */
1580 if (hsotg->params.dma_desc_enable > 0) { 1585 if (hsotg->params.dma_desc_enable) {
1581 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1586 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1582 DWC2_HC_XFER_AHB_ERR); 1587 DWC2_HC_XFER_AHB_ERR);
1583 goto handle_ahberr_done; 1588 goto handle_ahberr_done;
@@ -1609,7 +1614,7 @@ static void dwc2_hc_xacterr_intr(struct dwc2_hsotg *hsotg,
1609 1614
1610 dwc2_hc_handle_tt_clear(hsotg, chan, qtd); 1615 dwc2_hc_handle_tt_clear(hsotg, chan, qtd);
1611 1616
1612 if (hsotg->params.dma_desc_enable > 0) { 1617 if (hsotg->params.dma_desc_enable) {
1613 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1618 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1614 DWC2_HC_XFER_XACT_ERR); 1619 DWC2_HC_XFER_XACT_ERR);
1615 goto handle_xacterr_done; 1620 goto handle_xacterr_done;
@@ -1620,7 +1625,6 @@ static void dwc2_hc_xacterr_intr(struct dwc2_hsotg *hsotg,
1620 case USB_ENDPOINT_XFER_BULK: 1625 case USB_ENDPOINT_XFER_BULK:
1621 qtd->error_count++; 1626 qtd->error_count++;
1622 if (!chan->qh->ping_state) { 1627 if (!chan->qh->ping_state) {
1623
1624 dwc2_update_urb_state_abn(hsotg, chan, chnum, qtd->urb, 1628 dwc2_update_urb_state_abn(hsotg, chan, chnum, qtd->urb,
1625 qtd, DWC2_HC_XFER_XACT_ERR); 1629 qtd, DWC2_HC_XFER_XACT_ERR);
1626 dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd); 1630 dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd);
@@ -1645,7 +1649,7 @@ static void dwc2_hc_xacterr_intr(struct dwc2_hsotg *hsotg,
1645 enum dwc2_halt_status halt_status; 1649 enum dwc2_halt_status halt_status;
1646 1650
1647 halt_status = dwc2_update_isoc_urb_state(hsotg, chan, 1651 halt_status = dwc2_update_isoc_urb_state(hsotg, chan,
1648 chnum, qtd, DWC2_HC_XFER_XACT_ERR); 1652 chnum, qtd, DWC2_HC_XFER_XACT_ERR);
1649 dwc2_halt_channel(hsotg, chan, qtd, halt_status); 1653 dwc2_halt_channel(hsotg, chan, qtd, halt_status);
1650 } 1654 }
1651 break; 1655 break;
@@ -1803,8 +1807,8 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
1803 1807
1804 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE || 1808 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE ||
1805 (chan->halt_status == DWC2_HC_XFER_AHB_ERR && 1809 (chan->halt_status == DWC2_HC_XFER_AHB_ERR &&
1806 hsotg->params.dma_desc_enable <= 0)) { 1810 !hsotg->params.dma_desc_enable)) {
1807 if (hsotg->params.dma_desc_enable > 0) 1811 if (hsotg->params.dma_desc_enable)
1808 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1812 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1809 chan->halt_status); 1813 chan->halt_status);
1810 else 1814 else
@@ -1835,7 +1839,7 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
1835 } else if (chan->hcint & HCINTMSK_STALL) { 1839 } else if (chan->hcint & HCINTMSK_STALL) {
1836 dwc2_hc_stall_intr(hsotg, chan, chnum, qtd); 1840 dwc2_hc_stall_intr(hsotg, chan, chnum, qtd);
1837 } else if ((chan->hcint & HCINTMSK_XACTERR) && 1841 } else if ((chan->hcint & HCINTMSK_XACTERR) &&
1838 hsotg->params.dma_desc_enable <= 0) { 1842 !hsotg->params.dma_desc_enable) {
1839 if (out_nak_enh) { 1843 if (out_nak_enh) {
1840 if (chan->hcint & 1844 if (chan->hcint &
1841 (HCINTMSK_NYET | HCINTMSK_NAK | HCINTMSK_ACK)) { 1845 (HCINTMSK_NYET | HCINTMSK_NAK | HCINTMSK_ACK)) {
@@ -1855,10 +1859,10 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
1855 */ 1859 */
1856 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd); 1860 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd);
1857 } else if ((chan->hcint & HCINTMSK_XCS_XACT) && 1861 } else if ((chan->hcint & HCINTMSK_XCS_XACT) &&
1858 hsotg->params.dma_desc_enable > 0) { 1862 hsotg->params.dma_desc_enable) {
1859 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd); 1863 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd);
1860 } else if ((chan->hcint & HCINTMSK_AHBERR) && 1864 } else if ((chan->hcint & HCINTMSK_AHBERR) &&
1861 hsotg->params.dma_desc_enable > 0) { 1865 hsotg->params.dma_desc_enable) {
1862 dwc2_hc_ahberr_intr(hsotg, chan, chnum, qtd); 1866 dwc2_hc_ahberr_intr(hsotg, chan, chnum, qtd);
1863 } else if (chan->hcint & HCINTMSK_BBLERR) { 1867 } else if (chan->hcint & HCINTMSK_BBLERR) {
1864 dwc2_hc_babble_intr(hsotg, chan, chnum, qtd); 1868 dwc2_hc_babble_intr(hsotg, chan, chnum, qtd);
@@ -1951,7 +1955,7 @@ static void dwc2_hc_chhltd_intr(struct dwc2_hsotg *hsotg,
1951 dev_vdbg(hsotg->dev, "--Host Channel %d Interrupt: Channel Halted--\n", 1955 dev_vdbg(hsotg->dev, "--Host Channel %d Interrupt: Channel Halted--\n",
1952 chnum); 1956 chnum);
1953 1957
1954 if (hsotg->params.host_dma > 0) { 1958 if (hsotg->params.host_dma) {
1955 dwc2_hc_chhltd_intr_dma(hsotg, chan, chnum, qtd); 1959 dwc2_hc_chhltd_intr_dma(hsotg, chan, chnum, qtd);
1956 } else { 1960 } else {
1957 if (!dwc2_halt_status_ok(hsotg, chan, chnum, qtd)) 1961 if (!dwc2_halt_status_ok(hsotg, chan, chnum, qtd))
@@ -1970,7 +1974,7 @@ static bool dwc2_check_qtd_still_ok(struct dwc2_qtd *qtd, struct dwc2_qh *qh)
1970{ 1974{
1971 struct dwc2_qtd *cur_head; 1975 struct dwc2_qtd *cur_head;
1972 1976
1973 if (qh == NULL) 1977 if (!qh)
1974 return false; 1978 return false;
1975 1979
1976 cur_head = list_first_entry(&qh->qtd_list, struct dwc2_qtd, 1980 cur_head = list_first_entry(&qh->qtd_list, struct dwc2_qtd,
@@ -2028,7 +2032,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)
2028 * interrupt unmasked 2032 * interrupt unmasked
2029 */ 2033 */
2030 WARN_ON(hcint != HCINTMSK_CHHLTD); 2034 WARN_ON(hcint != HCINTMSK_CHHLTD);
2031 if (hsotg->params.dma_desc_enable > 0) 2035 if (hsotg->params.dma_desc_enable)
2032 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 2036 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
2033 chan->halt_status); 2037 chan->halt_status);
2034 else 2038 else
@@ -2056,7 +2060,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)
2056 qtd = list_first_entry(&chan->qh->qtd_list, struct dwc2_qtd, 2060 qtd = list_first_entry(&chan->qh->qtd_list, struct dwc2_qtd,
2057 qtd_list_entry); 2061 qtd_list_entry);
2058 2062
2059 if (hsotg->params.host_dma <= 0) { 2063 if (!hsotg->params.host_dma) {
2060 if ((hcint & HCINTMSK_CHHLTD) && hcint != HCINTMSK_CHHLTD) 2064 if ((hcint & HCINTMSK_CHHLTD) && hcint != HCINTMSK_CHHLTD)
2061 hcint &= ~HCINTMSK_CHHLTD; 2065 hcint &= ~HCINTMSK_CHHLTD;
2062 } 2066 }
diff --git a/drivers/usb/dwc2/hcd_queue.c b/drivers/usb/dwc2/hcd_queue.c
index 5713f03a4e56..3ae8b1bbaa55 100644
--- a/drivers/usb/dwc2/hcd_queue.c
+++ b/drivers/usb/dwc2/hcd_queue.c
@@ -76,14 +76,13 @@ static int dwc2_periodic_channel_available(struct dwc2_hsotg *hsotg)
76 int num_channels; 76 int num_channels;
77 77
78 num_channels = hsotg->params.host_channels; 78 num_channels = hsotg->params.host_channels;
79 if (hsotg->periodic_channels + hsotg->non_periodic_channels < 79 if ((hsotg->periodic_channels + hsotg->non_periodic_channels <
80 num_channels 80 num_channels) && (hsotg->periodic_channels < num_channels - 1)) {
81 && hsotg->periodic_channels < num_channels - 1) {
82 status = 0; 81 status = 0;
83 } else { 82 } else {
84 dev_dbg(hsotg->dev, 83 dev_dbg(hsotg->dev,
85 "%s: Total channels: %d, Periodic: %d, " 84 "%s: Total channels: %d, Periodic: %d, Non-periodic: %d\n",
86 "Non-periodic: %d\n", __func__, num_channels, 85 __func__, num_channels,
87 hsotg->periodic_channels, hsotg->non_periodic_channels); 86 hsotg->periodic_channels, hsotg->non_periodic_channels);
88 status = -ENOSPC; 87 status = -ENOSPC;
89 } 88 }
@@ -485,7 +484,6 @@ static void pmap_print(unsigned long *map, int bits_per_period,
485 } 484 }
486} 485}
487 486
488
489struct dwc2_qh_print_data { 487struct dwc2_qh_print_data {
490 struct dwc2_hsotg *hsotg; 488 struct dwc2_hsotg *hsotg;
491 struct dwc2_qh *qh; 489 struct dwc2_qh *qh;
@@ -558,7 +556,6 @@ static void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
558 DWC2_HS_SCHEDULE_UFRAMES, "uFrame", "us", 556 DWC2_HS_SCHEDULE_UFRAMES, "uFrame", "us",
559 dwc2_qh_print, &print_data); 557 dwc2_qh_print, &print_data);
560 } 558 }
561 return;
562} 559}
563#else 560#else
564static inline void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg, 561static inline void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
@@ -587,7 +584,7 @@ static int dwc2_ls_pmap_schedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
587 unsigned long *map = dwc2_get_ls_map(hsotg, qh); 584 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
588 int slice; 585 int slice;
589 586
590 if (map == NULL) 587 if (!map)
591 return -EINVAL; 588 return -EINVAL;
592 589
593 /* 590 /*
@@ -626,7 +623,7 @@ static void dwc2_ls_pmap_unschedule(struct dwc2_hsotg *hsotg,
626 unsigned long *map = dwc2_get_ls_map(hsotg, qh); 623 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
627 624
628 /* Schedule should have failed, so no worries about no error code */ 625 /* Schedule should have failed, so no worries about no error code */
629 if (map == NULL) 626 if (!map)
630 return; 627 return;
631 628
632 pmap_unschedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME, 629 pmap_unschedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,
@@ -1107,7 +1104,7 @@ static void dwc2_pick_first_frame(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1107 next_active_frame = earliest_frame; 1104 next_active_frame = earliest_frame;
1108 1105
1109 /* Get the "no microframe schduler" out of the way... */ 1106 /* Get the "no microframe schduler" out of the way... */
1110 if (hsotg->params.uframe_sched <= 0) { 1107 if (!hsotg->params.uframe_sched) {
1111 if (qh->do_split) 1108 if (qh->do_split)
1112 /* Splits are active at microframe 0 minus 1 */ 1109 /* Splits are active at microframe 0 minus 1 */
1113 next_active_frame |= 0x7; 1110 next_active_frame |= 0x7;
@@ -1182,7 +1179,7 @@ exit:
1182 qh->start_active_frame = next_active_frame; 1179 qh->start_active_frame = next_active_frame;
1183 1180
1184 dwc2_sch_vdbg(hsotg, "QH=%p First fn=%04x nxt=%04x\n", 1181 dwc2_sch_vdbg(hsotg, "QH=%p First fn=%04x nxt=%04x\n",
1185 qh, frame_number, qh->next_active_frame); 1182 qh, frame_number, qh->next_active_frame);
1186} 1183}
1187 1184
1188/** 1185/**
@@ -1200,7 +1197,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1200{ 1197{
1201 int status; 1198 int status;
1202 1199
1203 if (hsotg->params.uframe_sched > 0) { 1200 if (hsotg->params.uframe_sched) {
1204 status = dwc2_uframe_schedule(hsotg, qh); 1201 status = dwc2_uframe_schedule(hsotg, qh);
1205 } else { 1202 } else {
1206 status = dwc2_periodic_channel_available(hsotg); 1203 status = dwc2_periodic_channel_available(hsotg);
@@ -1221,7 +1218,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1221 return status; 1218 return status;
1222 } 1219 }
1223 1220
1224 if (hsotg->params.uframe_sched <= 0) 1221 if (!hsotg->params.uframe_sched)
1225 /* Reserve periodic channel */ 1222 /* Reserve periodic channel */
1226 hsotg->periodic_channels++; 1223 hsotg->periodic_channels++;
1227 1224
@@ -1257,7 +1254,7 @@ static void dwc2_do_unreserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1257 /* Update claimed usecs per (micro)frame */ 1254 /* Update claimed usecs per (micro)frame */
1258 hsotg->periodic_usecs -= qh->host_us; 1255 hsotg->periodic_usecs -= qh->host_us;
1259 1256
1260 if (hsotg->params.uframe_sched > 0) { 1257 if (hsotg->params.uframe_sched) {
1261 dwc2_uframe_unschedule(hsotg, qh); 1258 dwc2_uframe_unschedule(hsotg, qh);
1262 } else { 1259 } else {
1263 /* Release periodic channel reservation */ 1260 /* Release periodic channel reservation */
@@ -1394,7 +1391,7 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1394 1391
1395 qh->unreserve_pending = 0; 1392 qh->unreserve_pending = 0;
1396 1393
1397 if (hsotg->params.dma_desc_enable > 0) 1394 if (hsotg->params.dma_desc_enable)
1398 /* Don't rely on SOF and start in ready schedule */ 1395 /* Don't rely on SOF and start in ready schedule */
1399 list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready); 1396 list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready);
1400 else 1397 else
@@ -1501,7 +1498,6 @@ static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1501 device_ns += dwc_tt->usb_tt->think_time; 1498 device_ns += dwc_tt->usb_tt->think_time;
1502 qh->device_us = NS_TO_US(device_ns); 1499 qh->device_us = NS_TO_US(device_ns);
1503 1500
1504
1505 qh->device_interval = urb->interval; 1501 qh->device_interval = urb->interval;
1506 qh->host_interval = urb->interval * (do_split ? 8 : 1); 1502 qh->host_interval = urb->interval * (do_split ? 8 : 1);
1507 1503
@@ -1587,7 +1583,7 @@ static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1587 * Return: Pointer to the newly allocated QH, or NULL on error 1583 * Return: Pointer to the newly allocated QH, or NULL on error
1588 */ 1584 */
1589struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg, 1585struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
1590 struct dwc2_hcd_urb *urb, 1586 struct dwc2_hcd_urb *urb,
1591 gfp_t mem_flags) 1587 gfp_t mem_flags)
1592{ 1588{
1593 struct dwc2_qh *qh; 1589 struct dwc2_qh *qh;
@@ -1602,7 +1598,7 @@ struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
1602 1598
1603 dwc2_qh_init(hsotg, qh, urb, mem_flags); 1599 dwc2_qh_init(hsotg, qh, urb, mem_flags);
1604 1600
1605 if (hsotg->params.dma_desc_enable > 0 && 1601 if (hsotg->params.dma_desc_enable &&
1606 dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) { 1602 dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) {
1607 dwc2_hcd_qh_free(hsotg, qh); 1603 dwc2_hcd_qh_free(hsotg, qh);
1608 return NULL; 1604 return NULL;
@@ -1714,7 +1710,7 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1714 dwc2_deschedule_periodic(hsotg, qh); 1710 dwc2_deschedule_periodic(hsotg, qh);
1715 hsotg->periodic_qh_count--; 1711 hsotg->periodic_qh_count--;
1716 if (!hsotg->periodic_qh_count && 1712 if (!hsotg->periodic_qh_count &&
1717 hsotg->params.dma_desc_enable <= 0) { 1713 !hsotg->params.dma_desc_enable) {
1718 intr_mask = dwc2_readl(hsotg->regs + GINTMSK); 1714 intr_mask = dwc2_readl(hsotg->regs + GINTMSK);
1719 intr_mask &= ~GINTSTS_SOF; 1715 intr_mask &= ~GINTSTS_SOF;
1720 dwc2_writel(intr_mask, hsotg->regs + GINTMSK); 1716 dwc2_writel(intr_mask, hsotg->regs + GINTMSK);
@@ -1741,7 +1737,7 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1741 * Return: number missed by (or 0 if we didn't miss). 1737 * Return: number missed by (or 0 if we didn't miss).
1742 */ 1738 */
1743static int dwc2_next_for_periodic_split(struct dwc2_hsotg *hsotg, 1739static int dwc2_next_for_periodic_split(struct dwc2_hsotg *hsotg,
1744 struct dwc2_qh *qh, u16 frame_number) 1740 struct dwc2_qh *qh, u16 frame_number)
1745{ 1741{
1746 u16 old_frame = qh->next_active_frame; 1742 u16 old_frame = qh->next_active_frame;
1747 u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1); 1743 u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1);
@@ -1804,7 +1800,7 @@ static int dwc2_next_for_periodic_split(struct dwc2_hsotg *hsotg,
1804 * Return: number missed by (or 0 if we didn't miss). 1800 * Return: number missed by (or 0 if we didn't miss).
1805 */ 1801 */
1806static int dwc2_next_periodic_start(struct dwc2_hsotg *hsotg, 1802static int dwc2_next_periodic_start(struct dwc2_hsotg *hsotg,
1807 struct dwc2_qh *qh, u16 frame_number) 1803 struct dwc2_qh *qh, u16 frame_number)
1808{ 1804{
1809 int missed = 0; 1805 int missed = 0;
1810 u16 interval = qh->host_interval; 1806 u16 interval = qh->host_interval;
@@ -1926,7 +1922,7 @@ void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1926 missed = dwc2_next_periodic_start(hsotg, qh, frame_number); 1922 missed = dwc2_next_periodic_start(hsotg, qh, frame_number);
1927 1923
1928 dwc2_sch_vdbg(hsotg, 1924 dwc2_sch_vdbg(hsotg,
1929 "QH=%p next(%d) fn=%04x, sch=%04x=>%04x (%+d) miss=%d %s\n", 1925 "QH=%p next(%d) fn=%04x, sch=%04x=>%04x (%+d) miss=%d %s\n",
1930 qh, sched_next_periodic_split, frame_number, old_frame, 1926 qh, sched_next_periodic_split, frame_number, old_frame,
1931 qh->next_active_frame, 1927 qh->next_active_frame,
1932 dwc2_frame_num_dec(qh->next_active_frame, old_frame), 1928 dwc2_frame_num_dec(qh->next_active_frame, old_frame),
diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
index 5be056b39e5c..bde72489ae66 100644
--- a/drivers/usb/dwc2/hw.h
+++ b/drivers/usb/dwc2/hw.h
@@ -40,37 +40,37 @@
40#define HSOTG_REG(x) (x) 40#define HSOTG_REG(x) (x)
41 41
42#define GOTGCTL HSOTG_REG(0x000) 42#define GOTGCTL HSOTG_REG(0x000)
43#define GOTGCTL_CHIRPEN (1 << 27) 43#define GOTGCTL_CHIRPEN BIT(27)
44#define GOTGCTL_MULT_VALID_BC_MASK (0x1f << 22) 44#define GOTGCTL_MULT_VALID_BC_MASK (0x1f << 22)
45#define GOTGCTL_MULT_VALID_BC_SHIFT 22 45#define GOTGCTL_MULT_VALID_BC_SHIFT 22
46#define GOTGCTL_OTGVER (1 << 20) 46#define GOTGCTL_OTGVER BIT(20)
47#define GOTGCTL_BSESVLD (1 << 19) 47#define GOTGCTL_BSESVLD BIT(19)
48#define GOTGCTL_ASESVLD (1 << 18) 48#define GOTGCTL_ASESVLD BIT(18)
49#define GOTGCTL_DBNC_SHORT (1 << 17) 49#define GOTGCTL_DBNC_SHORT BIT(17)
50#define GOTGCTL_CONID_B (1 << 16) 50#define GOTGCTL_CONID_B BIT(16)
51#define GOTGCTL_DBNCE_FLTR_BYPASS (1 << 15) 51#define GOTGCTL_DBNCE_FLTR_BYPASS BIT(15)
52#define GOTGCTL_DEVHNPEN (1 << 11) 52#define GOTGCTL_DEVHNPEN BIT(11)
53#define GOTGCTL_HSTSETHNPEN (1 << 10) 53#define GOTGCTL_HSTSETHNPEN BIT(10)
54#define GOTGCTL_HNPREQ (1 << 9) 54#define GOTGCTL_HNPREQ BIT(9)
55#define GOTGCTL_HSTNEGSCS (1 << 8) 55#define GOTGCTL_HSTNEGSCS BIT(8)
56#define GOTGCTL_SESREQ (1 << 1) 56#define GOTGCTL_SESREQ BIT(1)
57#define GOTGCTL_SESREQSCS (1 << 0) 57#define GOTGCTL_SESREQSCS BIT(0)
58 58
59#define GOTGINT HSOTG_REG(0x004) 59#define GOTGINT HSOTG_REG(0x004)
60#define GOTGINT_DBNCE_DONE (1 << 19) 60#define GOTGINT_DBNCE_DONE BIT(19)
61#define GOTGINT_A_DEV_TOUT_CHG (1 << 18) 61#define GOTGINT_A_DEV_TOUT_CHG BIT(18)
62#define GOTGINT_HST_NEG_DET (1 << 17) 62#define GOTGINT_HST_NEG_DET BIT(17)
63#define GOTGINT_HST_NEG_SUC_STS_CHNG (1 << 9) 63#define GOTGINT_HST_NEG_SUC_STS_CHNG BIT(9)
64#define GOTGINT_SES_REQ_SUC_STS_CHNG (1 << 8) 64#define GOTGINT_SES_REQ_SUC_STS_CHNG BIT(8)
65#define GOTGINT_SES_END_DET (1 << 2) 65#define GOTGINT_SES_END_DET BIT(2)
66 66
67#define GAHBCFG HSOTG_REG(0x008) 67#define GAHBCFG HSOTG_REG(0x008)
68#define GAHBCFG_AHB_SINGLE (1 << 23) 68#define GAHBCFG_AHB_SINGLE BIT(23)
69#define GAHBCFG_NOTI_ALL_DMA_WRIT (1 << 22) 69#define GAHBCFG_NOTI_ALL_DMA_WRIT BIT(22)
70#define GAHBCFG_REM_MEM_SUPP (1 << 21) 70#define GAHBCFG_REM_MEM_SUPP BIT(21)
71#define GAHBCFG_P_TXF_EMP_LVL (1 << 8) 71#define GAHBCFG_P_TXF_EMP_LVL BIT(8)
72#define GAHBCFG_NP_TXF_EMP_LVL (1 << 7) 72#define GAHBCFG_NP_TXF_EMP_LVL BIT(7)
73#define GAHBCFG_DMA_EN (1 << 5) 73#define GAHBCFG_DMA_EN BIT(5)
74#define GAHBCFG_HBSTLEN_MASK (0xf << 1) 74#define GAHBCFG_HBSTLEN_MASK (0xf << 1)
75#define GAHBCFG_HBSTLEN_SHIFT 1 75#define GAHBCFG_HBSTLEN_SHIFT 1
76#define GAHBCFG_HBSTLEN_SINGLE 0 76#define GAHBCFG_HBSTLEN_SINGLE 0
@@ -78,38 +78,38 @@
78#define GAHBCFG_HBSTLEN_INCR4 3 78#define GAHBCFG_HBSTLEN_INCR4 3
79#define GAHBCFG_HBSTLEN_INCR8 5 79#define GAHBCFG_HBSTLEN_INCR8 5
80#define GAHBCFG_HBSTLEN_INCR16 7 80#define GAHBCFG_HBSTLEN_INCR16 7
81#define GAHBCFG_GLBL_INTR_EN (1 << 0) 81#define GAHBCFG_GLBL_INTR_EN BIT(0)
82#define GAHBCFG_CTRL_MASK (GAHBCFG_P_TXF_EMP_LVL | \ 82#define GAHBCFG_CTRL_MASK (GAHBCFG_P_TXF_EMP_LVL | \
83 GAHBCFG_NP_TXF_EMP_LVL | \ 83 GAHBCFG_NP_TXF_EMP_LVL | \
84 GAHBCFG_DMA_EN | \ 84 GAHBCFG_DMA_EN | \
85 GAHBCFG_GLBL_INTR_EN) 85 GAHBCFG_GLBL_INTR_EN)
86 86
87#define GUSBCFG HSOTG_REG(0x00C) 87#define GUSBCFG HSOTG_REG(0x00C)
88#define GUSBCFG_FORCEDEVMODE (1 << 30) 88#define GUSBCFG_FORCEDEVMODE BIT(30)
89#define GUSBCFG_FORCEHOSTMODE (1 << 29) 89#define GUSBCFG_FORCEHOSTMODE BIT(29)
90#define GUSBCFG_TXENDDELAY (1 << 28) 90#define GUSBCFG_TXENDDELAY BIT(28)
91#define GUSBCFG_ICTRAFFICPULLREMOVE (1 << 27) 91#define GUSBCFG_ICTRAFFICPULLREMOVE BIT(27)
92#define GUSBCFG_ICUSBCAP (1 << 26) 92#define GUSBCFG_ICUSBCAP BIT(26)
93#define GUSBCFG_ULPI_INT_PROT_DIS (1 << 25) 93#define GUSBCFG_ULPI_INT_PROT_DIS BIT(25)
94#define GUSBCFG_INDICATORPASSTHROUGH (1 << 24) 94#define GUSBCFG_INDICATORPASSTHROUGH BIT(24)
95#define GUSBCFG_INDICATORCOMPLEMENT (1 << 23) 95#define GUSBCFG_INDICATORCOMPLEMENT BIT(23)
96#define GUSBCFG_TERMSELDLPULSE (1 << 22) 96#define GUSBCFG_TERMSELDLPULSE BIT(22)
97#define GUSBCFG_ULPI_INT_VBUS_IND (1 << 21) 97#define GUSBCFG_ULPI_INT_VBUS_IND BIT(21)
98#define GUSBCFG_ULPI_EXT_VBUS_DRV (1 << 20) 98#define GUSBCFG_ULPI_EXT_VBUS_DRV BIT(20)
99#define GUSBCFG_ULPI_CLK_SUSP_M (1 << 19) 99#define GUSBCFG_ULPI_CLK_SUSP_M BIT(19)
100#define GUSBCFG_ULPI_AUTO_RES (1 << 18) 100#define GUSBCFG_ULPI_AUTO_RES BIT(18)
101#define GUSBCFG_ULPI_FS_LS (1 << 17) 101#define GUSBCFG_ULPI_FS_LS BIT(17)
102#define GUSBCFG_OTG_UTMI_FS_SEL (1 << 16) 102#define GUSBCFG_OTG_UTMI_FS_SEL BIT(16)
103#define GUSBCFG_PHY_LP_CLK_SEL (1 << 15) 103#define GUSBCFG_PHY_LP_CLK_SEL BIT(15)
104#define GUSBCFG_USBTRDTIM_MASK (0xf << 10) 104#define GUSBCFG_USBTRDTIM_MASK (0xf << 10)
105#define GUSBCFG_USBTRDTIM_SHIFT 10 105#define GUSBCFG_USBTRDTIM_SHIFT 10
106#define GUSBCFG_HNPCAP (1 << 9) 106#define GUSBCFG_HNPCAP BIT(9)
107#define GUSBCFG_SRPCAP (1 << 8) 107#define GUSBCFG_SRPCAP BIT(8)
108#define GUSBCFG_DDRSEL (1 << 7) 108#define GUSBCFG_DDRSEL BIT(7)
109#define GUSBCFG_PHYSEL (1 << 6) 109#define GUSBCFG_PHYSEL BIT(6)
110#define GUSBCFG_FSINTF (1 << 5) 110#define GUSBCFG_FSINTF BIT(5)
111#define GUSBCFG_ULPI_UTMI_SEL (1 << 4) 111#define GUSBCFG_ULPI_UTMI_SEL BIT(4)
112#define GUSBCFG_PHYIF16 (1 << 3) 112#define GUSBCFG_PHYIF16 BIT(3)
113#define GUSBCFG_PHYIF8 (0 << 3) 113#define GUSBCFG_PHYIF8 (0 << 3)
114#define GUSBCFG_TOUTCAL_MASK (0x7 << 0) 114#define GUSBCFG_TOUTCAL_MASK (0x7 << 0)
115#define GUSBCFG_TOUTCAL_SHIFT 0 115#define GUSBCFG_TOUTCAL_SHIFT 0
@@ -117,54 +117,54 @@
117#define GUSBCFG_TOUTCAL(_x) ((_x) << 0) 117#define GUSBCFG_TOUTCAL(_x) ((_x) << 0)
118 118
119#define GRSTCTL HSOTG_REG(0x010) 119#define GRSTCTL HSOTG_REG(0x010)
120#define GRSTCTL_AHBIDLE (1 << 31) 120#define GRSTCTL_AHBIDLE BIT(31)
121#define GRSTCTL_DMAREQ (1 << 30) 121#define GRSTCTL_DMAREQ BIT(30)
122#define GRSTCTL_TXFNUM_MASK (0x1f << 6) 122#define GRSTCTL_TXFNUM_MASK (0x1f << 6)
123#define GRSTCTL_TXFNUM_SHIFT 6 123#define GRSTCTL_TXFNUM_SHIFT 6
124#define GRSTCTL_TXFNUM_LIMIT 0x1f 124#define GRSTCTL_TXFNUM_LIMIT 0x1f
125#define GRSTCTL_TXFNUM(_x) ((_x) << 6) 125#define GRSTCTL_TXFNUM(_x) ((_x) << 6)
126#define GRSTCTL_TXFFLSH (1 << 5) 126#define GRSTCTL_TXFFLSH BIT(5)
127#define GRSTCTL_RXFFLSH (1 << 4) 127#define GRSTCTL_RXFFLSH BIT(4)
128#define GRSTCTL_IN_TKNQ_FLSH (1 << 3) 128#define GRSTCTL_IN_TKNQ_FLSH BIT(3)
129#define GRSTCTL_FRMCNTRRST (1 << 2) 129#define GRSTCTL_FRMCNTRRST BIT(2)
130#define GRSTCTL_HSFTRST (1 << 1) 130#define GRSTCTL_HSFTRST BIT(1)
131#define GRSTCTL_CSFTRST (1 << 0) 131#define GRSTCTL_CSFTRST BIT(0)
132 132
133#define GINTSTS HSOTG_REG(0x014) 133#define GINTSTS HSOTG_REG(0x014)
134#define GINTMSK HSOTG_REG(0x018) 134#define GINTMSK HSOTG_REG(0x018)
135#define GINTSTS_WKUPINT (1 << 31) 135#define GINTSTS_WKUPINT BIT(31)
136#define GINTSTS_SESSREQINT (1 << 30) 136#define GINTSTS_SESSREQINT BIT(30)
137#define GINTSTS_DISCONNINT (1 << 29) 137#define GINTSTS_DISCONNINT BIT(29)
138#define GINTSTS_CONIDSTSCHNG (1 << 28) 138#define GINTSTS_CONIDSTSCHNG BIT(28)
139#define GINTSTS_LPMTRANRCVD (1 << 27) 139#define GINTSTS_LPMTRANRCVD BIT(27)
140#define GINTSTS_PTXFEMP (1 << 26) 140#define GINTSTS_PTXFEMP BIT(26)
141#define GINTSTS_HCHINT (1 << 25) 141#define GINTSTS_HCHINT BIT(25)
142#define GINTSTS_PRTINT (1 << 24) 142#define GINTSTS_PRTINT BIT(24)
143#define GINTSTS_RESETDET (1 << 23) 143#define GINTSTS_RESETDET BIT(23)
144#define GINTSTS_FET_SUSP (1 << 22) 144#define GINTSTS_FET_SUSP BIT(22)
145#define GINTSTS_INCOMPL_IP (1 << 21) 145#define GINTSTS_INCOMPL_IP BIT(21)
146#define GINTSTS_INCOMPL_SOOUT (1 << 21) 146#define GINTSTS_INCOMPL_SOOUT BIT(21)
147#define GINTSTS_INCOMPL_SOIN (1 << 20) 147#define GINTSTS_INCOMPL_SOIN BIT(20)
148#define GINTSTS_OEPINT (1 << 19) 148#define GINTSTS_OEPINT BIT(19)
149#define GINTSTS_IEPINT (1 << 18) 149#define GINTSTS_IEPINT BIT(18)
150#define GINTSTS_EPMIS (1 << 17) 150#define GINTSTS_EPMIS BIT(17)
151#define GINTSTS_RESTOREDONE (1 << 16) 151#define GINTSTS_RESTOREDONE BIT(16)
152#define GINTSTS_EOPF (1 << 15) 152#define GINTSTS_EOPF BIT(15)
153#define GINTSTS_ISOUTDROP (1 << 14) 153#define GINTSTS_ISOUTDROP BIT(14)
154#define GINTSTS_ENUMDONE (1 << 13) 154#define GINTSTS_ENUMDONE BIT(13)
155#define GINTSTS_USBRST (1 << 12) 155#define GINTSTS_USBRST BIT(12)
156#define GINTSTS_USBSUSP (1 << 11) 156#define GINTSTS_USBSUSP BIT(11)
157#define GINTSTS_ERLYSUSP (1 << 10) 157#define GINTSTS_ERLYSUSP BIT(10)
158#define GINTSTS_I2CINT (1 << 9) 158#define GINTSTS_I2CINT BIT(9)
159#define GINTSTS_ULPI_CK_INT (1 << 8) 159#define GINTSTS_ULPI_CK_INT BIT(8)
160#define GINTSTS_GOUTNAKEFF (1 << 7) 160#define GINTSTS_GOUTNAKEFF BIT(7)
161#define GINTSTS_GINNAKEFF (1 << 6) 161#define GINTSTS_GINNAKEFF BIT(6)
162#define GINTSTS_NPTXFEMP (1 << 5) 162#define GINTSTS_NPTXFEMP BIT(5)
163#define GINTSTS_RXFLVL (1 << 4) 163#define GINTSTS_RXFLVL BIT(4)
164#define GINTSTS_SOF (1 << 3) 164#define GINTSTS_SOF BIT(3)
165#define GINTSTS_OTGINT (1 << 2) 165#define GINTSTS_OTGINT BIT(2)
166#define GINTSTS_MODEMIS (1 << 1) 166#define GINTSTS_MODEMIS BIT(1)
167#define GINTSTS_CURMODE_HOST (1 << 0) 167#define GINTSTS_CURMODE_HOST BIT(0)
168 168
169#define GRXSTSR HSOTG_REG(0x01C) 169#define GRXSTSR HSOTG_REG(0x01C)
170#define GRXSTSP HSOTG_REG(0x020) 170#define GRXSTSP HSOTG_REG(0x020)
@@ -208,14 +208,14 @@
208#define GNPTXSTS_NP_TXF_SPC_AVAIL_GET(_v) (((_v) >> 0) & 0xffff) 208#define GNPTXSTS_NP_TXF_SPC_AVAIL_GET(_v) (((_v) >> 0) & 0xffff)
209 209
210#define GI2CCTL HSOTG_REG(0x0030) 210#define GI2CCTL HSOTG_REG(0x0030)
211#define GI2CCTL_BSYDNE (1 << 31) 211#define GI2CCTL_BSYDNE BIT(31)
212#define GI2CCTL_RW (1 << 30) 212#define GI2CCTL_RW BIT(30)
213#define GI2CCTL_I2CDATSE0 (1 << 28) 213#define GI2CCTL_I2CDATSE0 BIT(28)
214#define GI2CCTL_I2CDEVADDR_MASK (0x3 << 26) 214#define GI2CCTL_I2CDEVADDR_MASK (0x3 << 26)
215#define GI2CCTL_I2CDEVADDR_SHIFT 26 215#define GI2CCTL_I2CDEVADDR_SHIFT 26
216#define GI2CCTL_I2CSUSPCTL (1 << 25) 216#define GI2CCTL_I2CSUSPCTL BIT(25)
217#define GI2CCTL_ACK (1 << 24) 217#define GI2CCTL_ACK BIT(24)
218#define GI2CCTL_I2CEN (1 << 23) 218#define GI2CCTL_I2CEN BIT(23)
219#define GI2CCTL_ADDR_MASK (0x7f << 16) 219#define GI2CCTL_ADDR_MASK (0x7f << 16)
220#define GI2CCTL_ADDR_SHIFT 16 220#define GI2CCTL_ADDR_SHIFT 16
221#define GI2CCTL_REGADDR_MASK (0xff << 8) 221#define GI2CCTL_REGADDR_MASK (0xff << 8)
@@ -230,16 +230,16 @@
230#define GHWCFG1 HSOTG_REG(0x0044) 230#define GHWCFG1 HSOTG_REG(0x0044)
231 231
232#define GHWCFG2 HSOTG_REG(0x0048) 232#define GHWCFG2 HSOTG_REG(0x0048)
233#define GHWCFG2_OTG_ENABLE_IC_USB (1 << 31) 233#define GHWCFG2_OTG_ENABLE_IC_USB BIT(31)
234#define GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK (0x1f << 26) 234#define GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK (0x1f << 26)
235#define GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT 26 235#define GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT 26
236#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK (0x3 << 24) 236#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK (0x3 << 24)
237#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT 24 237#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT 24
238#define GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK (0x3 << 22) 238#define GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK (0x3 << 22)
239#define GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT 22 239#define GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT 22
240#define GHWCFG2_MULTI_PROC_INT (1 << 20) 240#define GHWCFG2_MULTI_PROC_INT BIT(20)
241#define GHWCFG2_DYNAMIC_FIFO (1 << 19) 241#define GHWCFG2_DYNAMIC_FIFO BIT(19)
242#define GHWCFG2_PERIO_EP_SUPPORTED (1 << 18) 242#define GHWCFG2_PERIO_EP_SUPPORTED BIT(18)
243#define GHWCFG2_NUM_HOST_CHAN_MASK (0xf << 14) 243#define GHWCFG2_NUM_HOST_CHAN_MASK (0xf << 14)
244#define GHWCFG2_NUM_HOST_CHAN_SHIFT 14 244#define GHWCFG2_NUM_HOST_CHAN_SHIFT 14
245#define GHWCFG2_NUM_DEV_EP_MASK (0xf << 10) 245#define GHWCFG2_NUM_DEV_EP_MASK (0xf << 10)
@@ -256,7 +256,7 @@
256#define GHWCFG2_HS_PHY_TYPE_UTMI 1 256#define GHWCFG2_HS_PHY_TYPE_UTMI 1
257#define GHWCFG2_HS_PHY_TYPE_ULPI 2 257#define GHWCFG2_HS_PHY_TYPE_ULPI 2
258#define GHWCFG2_HS_PHY_TYPE_UTMI_ULPI 3 258#define GHWCFG2_HS_PHY_TYPE_UTMI_ULPI 3
259#define GHWCFG2_POINT2POINT (1 << 5) 259#define GHWCFG2_POINT2POINT BIT(5)
260#define GHWCFG2_ARCHITECTURE_MASK (0x3 << 3) 260#define GHWCFG2_ARCHITECTURE_MASK (0x3 << 3)
261#define GHWCFG2_ARCHITECTURE_SHIFT 3 261#define GHWCFG2_ARCHITECTURE_SHIFT 3
262#define GHWCFG2_SLAVE_ONLY_ARCH 0 262#define GHWCFG2_SLAVE_ONLY_ARCH 0
@@ -276,32 +276,32 @@
276#define GHWCFG3 HSOTG_REG(0x004c) 276#define GHWCFG3 HSOTG_REG(0x004c)
277#define GHWCFG3_DFIFO_DEPTH_MASK (0xffff << 16) 277#define GHWCFG3_DFIFO_DEPTH_MASK (0xffff << 16)
278#define GHWCFG3_DFIFO_DEPTH_SHIFT 16 278#define GHWCFG3_DFIFO_DEPTH_SHIFT 16
279#define GHWCFG3_OTG_LPM_EN (1 << 15) 279#define GHWCFG3_OTG_LPM_EN BIT(15)
280#define GHWCFG3_BC_SUPPORT (1 << 14) 280#define GHWCFG3_BC_SUPPORT BIT(14)
281#define GHWCFG3_OTG_ENABLE_HSIC (1 << 13) 281#define GHWCFG3_OTG_ENABLE_HSIC BIT(13)
282#define GHWCFG3_ADP_SUPP (1 << 12) 282#define GHWCFG3_ADP_SUPP BIT(12)
283#define GHWCFG3_SYNCH_RESET_TYPE (1 << 11) 283#define GHWCFG3_SYNCH_RESET_TYPE BIT(11)
284#define GHWCFG3_OPTIONAL_FEATURES (1 << 10) 284#define GHWCFG3_OPTIONAL_FEATURES BIT(10)
285#define GHWCFG3_VENDOR_CTRL_IF (1 << 9) 285#define GHWCFG3_VENDOR_CTRL_IF BIT(9)
286#define GHWCFG3_I2C (1 << 8) 286#define GHWCFG3_I2C BIT(8)
287#define GHWCFG3_OTG_FUNC (1 << 7) 287#define GHWCFG3_OTG_FUNC BIT(7)
288#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK (0x7 << 4) 288#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK (0x7 << 4)
289#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT 4 289#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT 4
290#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK (0xf << 0) 290#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK (0xf << 0)
291#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT 0 291#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT 0
292 292
293#define GHWCFG4 HSOTG_REG(0x0050) 293#define GHWCFG4 HSOTG_REG(0x0050)
294#define GHWCFG4_DESC_DMA_DYN (1 << 31) 294#define GHWCFG4_DESC_DMA_DYN BIT(31)
295#define GHWCFG4_DESC_DMA (1 << 30) 295#define GHWCFG4_DESC_DMA BIT(30)
296#define GHWCFG4_NUM_IN_EPS_MASK (0xf << 26) 296#define GHWCFG4_NUM_IN_EPS_MASK (0xf << 26)
297#define GHWCFG4_NUM_IN_EPS_SHIFT 26 297#define GHWCFG4_NUM_IN_EPS_SHIFT 26
298#define GHWCFG4_DED_FIFO_EN (1 << 25) 298#define GHWCFG4_DED_FIFO_EN BIT(25)
299#define GHWCFG4_DED_FIFO_SHIFT 25 299#define GHWCFG4_DED_FIFO_SHIFT 25
300#define GHWCFG4_SESSION_END_FILT_EN (1 << 24) 300#define GHWCFG4_SESSION_END_FILT_EN BIT(24)
301#define GHWCFG4_B_VALID_FILT_EN (1 << 23) 301#define GHWCFG4_B_VALID_FILT_EN BIT(23)
302#define GHWCFG4_A_VALID_FILT_EN (1 << 22) 302#define GHWCFG4_A_VALID_FILT_EN BIT(22)
303#define GHWCFG4_VBUS_VALID_FILT_EN (1 << 21) 303#define GHWCFG4_VBUS_VALID_FILT_EN BIT(21)
304#define GHWCFG4_IDDIG_FILT_EN (1 << 20) 304#define GHWCFG4_IDDIG_FILT_EN BIT(20)
305#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_MASK (0xf << 16) 305#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_MASK (0xf << 16)
306#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT 16 306#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT 16
307#define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK (0x3 << 14) 307#define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK (0x3 << 14)
@@ -309,64 +309,64 @@
309#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8 0 309#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8 0
310#define GHWCFG4_UTMI_PHY_DATA_WIDTH_16 1 310#define GHWCFG4_UTMI_PHY_DATA_WIDTH_16 1
311#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16 2 311#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16 2
312#define GHWCFG4_XHIBER (1 << 7) 312#define GHWCFG4_XHIBER BIT(7)
313#define GHWCFG4_HIBER (1 << 6) 313#define GHWCFG4_HIBER BIT(6)
314#define GHWCFG4_MIN_AHB_FREQ (1 << 5) 314#define GHWCFG4_MIN_AHB_FREQ BIT(5)
315#define GHWCFG4_POWER_OPTIMIZ (1 << 4) 315#define GHWCFG4_POWER_OPTIMIZ BIT(4)
316#define GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK (0xf << 0) 316#define GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK (0xf << 0)
317#define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT 0 317#define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT 0
318 318
319#define GLPMCFG HSOTG_REG(0x0054) 319#define GLPMCFG HSOTG_REG(0x0054)
320#define GLPMCFG_INV_SEL_HSIC (1 << 31) 320#define GLPMCFG_INV_SEL_HSIC BIT(31)
321#define GLPMCFG_HSIC_CONNECT (1 << 30) 321#define GLPMCFG_HSIC_CONNECT BIT(30)
322#define GLPMCFG_RETRY_COUNT_STS_MASK (0x7 << 25) 322#define GLPMCFG_RETRY_COUNT_STS_MASK (0x7 << 25)
323#define GLPMCFG_RETRY_COUNT_STS_SHIFT 25 323#define GLPMCFG_RETRY_COUNT_STS_SHIFT 25
324#define GLPMCFG_SEND_LPM (1 << 24) 324#define GLPMCFG_SEND_LPM BIT(24)
325#define GLPMCFG_RETRY_COUNT_MASK (0x7 << 21) 325#define GLPMCFG_RETRY_COUNT_MASK (0x7 << 21)
326#define GLPMCFG_RETRY_COUNT_SHIFT 21 326#define GLPMCFG_RETRY_COUNT_SHIFT 21
327#define GLPMCFG_LPM_CHAN_INDEX_MASK (0xf << 17) 327#define GLPMCFG_LPM_CHAN_INDEX_MASK (0xf << 17)
328#define GLPMCFG_LPM_CHAN_INDEX_SHIFT 17 328#define GLPMCFG_LPM_CHAN_INDEX_SHIFT 17
329#define GLPMCFG_SLEEP_STATE_RESUMEOK (1 << 16) 329#define GLPMCFG_SLEEP_STATE_RESUMEOK BIT(16)
330#define GLPMCFG_PRT_SLEEP_STS (1 << 15) 330#define GLPMCFG_PRT_SLEEP_STS BIT(15)
331#define GLPMCFG_LPM_RESP_MASK (0x3 << 13) 331#define GLPMCFG_LPM_RESP_MASK (0x3 << 13)
332#define GLPMCFG_LPM_RESP_SHIFT 13 332#define GLPMCFG_LPM_RESP_SHIFT 13
333#define GLPMCFG_HIRD_THRES_MASK (0x1f << 8) 333#define GLPMCFG_HIRD_THRES_MASK (0x1f << 8)
334#define GLPMCFG_HIRD_THRES_SHIFT 8 334#define GLPMCFG_HIRD_THRES_SHIFT 8
335#define GLPMCFG_HIRD_THRES_EN (0x10 << 8) 335#define GLPMCFG_HIRD_THRES_EN (0x10 << 8)
336#define GLPMCFG_EN_UTMI_SLEEP (1 << 7) 336#define GLPMCFG_EN_UTMI_SLEEP BIT(7)
337#define GLPMCFG_REM_WKUP_EN (1 << 6) 337#define GLPMCFG_REM_WKUP_EN BIT(6)
338#define GLPMCFG_HIRD_MASK (0xf << 2) 338#define GLPMCFG_HIRD_MASK (0xf << 2)
339#define GLPMCFG_HIRD_SHIFT 2 339#define GLPMCFG_HIRD_SHIFT 2
340#define GLPMCFG_APPL_RESP (1 << 1) 340#define GLPMCFG_APPL_RESP BIT(1)
341#define GLPMCFG_LPM_CAP_EN (1 << 0) 341#define GLPMCFG_LPM_CAP_EN BIT(0)
342 342
343#define GPWRDN HSOTG_REG(0x0058) 343#define GPWRDN HSOTG_REG(0x0058)
344#define GPWRDN_MULT_VAL_ID_BC_MASK (0x1f << 24) 344#define GPWRDN_MULT_VAL_ID_BC_MASK (0x1f << 24)
345#define GPWRDN_MULT_VAL_ID_BC_SHIFT 24 345#define GPWRDN_MULT_VAL_ID_BC_SHIFT 24
346#define GPWRDN_ADP_INT (1 << 23) 346#define GPWRDN_ADP_INT BIT(23)
347#define GPWRDN_BSESSVLD (1 << 22) 347#define GPWRDN_BSESSVLD BIT(22)
348#define GPWRDN_IDSTS (1 << 21) 348#define GPWRDN_IDSTS BIT(21)
349#define GPWRDN_LINESTATE_MASK (0x3 << 19) 349#define GPWRDN_LINESTATE_MASK (0x3 << 19)
350#define GPWRDN_LINESTATE_SHIFT 19 350#define GPWRDN_LINESTATE_SHIFT 19
351#define GPWRDN_STS_CHGINT_MSK (1 << 18) 351#define GPWRDN_STS_CHGINT_MSK BIT(18)
352#define GPWRDN_STS_CHGINT (1 << 17) 352#define GPWRDN_STS_CHGINT BIT(17)
353#define GPWRDN_SRP_DET_MSK (1 << 16) 353#define GPWRDN_SRP_DET_MSK BIT(16)
354#define GPWRDN_SRP_DET (1 << 15) 354#define GPWRDN_SRP_DET BIT(15)
355#define GPWRDN_CONNECT_DET_MSK (1 << 14) 355#define GPWRDN_CONNECT_DET_MSK BIT(14)
356#define GPWRDN_CONNECT_DET (1 << 13) 356#define GPWRDN_CONNECT_DET BIT(13)
357#define GPWRDN_DISCONN_DET_MSK (1 << 12) 357#define GPWRDN_DISCONN_DET_MSK BIT(12)
358#define GPWRDN_DISCONN_DET (1 << 11) 358#define GPWRDN_DISCONN_DET BIT(11)
359#define GPWRDN_RST_DET_MSK (1 << 10) 359#define GPWRDN_RST_DET_MSK BIT(10)
360#define GPWRDN_RST_DET (1 << 9) 360#define GPWRDN_RST_DET BIT(9)
361#define GPWRDN_LNSTSCHG_MSK (1 << 8) 361#define GPWRDN_LNSTSCHG_MSK BIT(8)
362#define GPWRDN_LNSTSCHG (1 << 7) 362#define GPWRDN_LNSTSCHG BIT(7)
363#define GPWRDN_DIS_VBUS (1 << 6) 363#define GPWRDN_DIS_VBUS BIT(6)
364#define GPWRDN_PWRDNSWTCH (1 << 5) 364#define GPWRDN_PWRDNSWTCH BIT(5)
365#define GPWRDN_PWRDNRSTN (1 << 4) 365#define GPWRDN_PWRDNRSTN BIT(4)
366#define GPWRDN_PWRDNCLMP (1 << 3) 366#define GPWRDN_PWRDNCLMP BIT(3)
367#define GPWRDN_RESTORE (1 << 2) 367#define GPWRDN_RESTORE BIT(2)
368#define GPWRDN_PMUACTV (1 << 1) 368#define GPWRDN_PMUACTV BIT(1)
369#define GPWRDN_PMUINTSEL (1 << 0) 369#define GPWRDN_PMUINTSEL BIT(0)
370 370
371#define GDFIFOCFG HSOTG_REG(0x005c) 371#define GDFIFOCFG HSOTG_REG(0x005c)
372#define GDFIFOCFG_EPINFOBASE_MASK (0xffff << 16) 372#define GDFIFOCFG_EPINFOBASE_MASK (0xffff << 16)
@@ -377,16 +377,16 @@
377#define ADPCTL HSOTG_REG(0x0060) 377#define ADPCTL HSOTG_REG(0x0060)
378#define ADPCTL_AR_MASK (0x3 << 27) 378#define ADPCTL_AR_MASK (0x3 << 27)
379#define ADPCTL_AR_SHIFT 27 379#define ADPCTL_AR_SHIFT 27
380#define ADPCTL_ADP_TMOUT_INT_MSK (1 << 26) 380#define ADPCTL_ADP_TMOUT_INT_MSK BIT(26)
381#define ADPCTL_ADP_SNS_INT_MSK (1 << 25) 381#define ADPCTL_ADP_SNS_INT_MSK BIT(25)
382#define ADPCTL_ADP_PRB_INT_MSK (1 << 24) 382#define ADPCTL_ADP_PRB_INT_MSK BIT(24)
383#define ADPCTL_ADP_TMOUT_INT (1 << 23) 383#define ADPCTL_ADP_TMOUT_INT BIT(23)
384#define ADPCTL_ADP_SNS_INT (1 << 22) 384#define ADPCTL_ADP_SNS_INT BIT(22)
385#define ADPCTL_ADP_PRB_INT (1 << 21) 385#define ADPCTL_ADP_PRB_INT BIT(21)
386#define ADPCTL_ADPENA (1 << 20) 386#define ADPCTL_ADPENA BIT(20)
387#define ADPCTL_ADPRES (1 << 19) 387#define ADPCTL_ADPRES BIT(19)
388#define ADPCTL_ENASNS (1 << 18) 388#define ADPCTL_ENASNS BIT(18)
389#define ADPCTL_ENAPRB (1 << 17) 389#define ADPCTL_ENAPRB BIT(17)
390#define ADPCTL_RTIM_MASK (0x7ff << 6) 390#define ADPCTL_RTIM_MASK (0x7ff << 6)
391#define ADPCTL_RTIM_SHIFT 6 391#define ADPCTL_RTIM_SHIFT 6
392#define ADPCTL_PRB_PER_MASK (0x3 << 4) 392#define ADPCTL_PRB_PER_MASK (0x3 << 4)
@@ -412,7 +412,7 @@
412/* Device mode registers */ 412/* Device mode registers */
413 413
414#define DCFG HSOTG_REG(0x800) 414#define DCFG HSOTG_REG(0x800)
415#define DCFG_DESCDMA_EN (1 << 23) 415#define DCFG_DESCDMA_EN BIT(23)
416#define DCFG_EPMISCNT_MASK (0x1f << 18) 416#define DCFG_EPMISCNT_MASK (0x1f << 18)
417#define DCFG_EPMISCNT_SHIFT 18 417#define DCFG_EPMISCNT_SHIFT 18
418#define DCFG_EPMISCNT_LIMIT 0x1f 418#define DCFG_EPMISCNT_LIMIT 0x1f
@@ -425,7 +425,7 @@
425#define DCFG_DEVADDR_SHIFT 4 425#define DCFG_DEVADDR_SHIFT 4
426#define DCFG_DEVADDR_LIMIT 0x7f 426#define DCFG_DEVADDR_LIMIT 0x7f
427#define DCFG_DEVADDR(_x) ((_x) << 4) 427#define DCFG_DEVADDR(_x) ((_x) << 4)
428#define DCFG_NZ_STS_OUT_HSHK (1 << 2) 428#define DCFG_NZ_STS_OUT_HSHK BIT(2)
429#define DCFG_DEVSPD_MASK (0x3 << 0) 429#define DCFG_DEVSPD_MASK (0x3 << 0)
430#define DCFG_DEVSPD_SHIFT 0 430#define DCFG_DEVSPD_SHIFT 0
431#define DCFG_DEVSPD_HS 0 431#define DCFG_DEVSPD_HS 0
@@ -434,54 +434,54 @@
434#define DCFG_DEVSPD_FS48 3 434#define DCFG_DEVSPD_FS48 3
435 435
436#define DCTL HSOTG_REG(0x804) 436#define DCTL HSOTG_REG(0x804)
437#define DCTL_PWRONPRGDONE (1 << 11) 437#define DCTL_PWRONPRGDONE BIT(11)
438#define DCTL_CGOUTNAK (1 << 10) 438#define DCTL_CGOUTNAK BIT(10)
439#define DCTL_SGOUTNAK (1 << 9) 439#define DCTL_SGOUTNAK BIT(9)
440#define DCTL_CGNPINNAK (1 << 8) 440#define DCTL_CGNPINNAK BIT(8)
441#define DCTL_SGNPINNAK (1 << 7) 441#define DCTL_SGNPINNAK BIT(7)
442#define DCTL_TSTCTL_MASK (0x7 << 4) 442#define DCTL_TSTCTL_MASK (0x7 << 4)
443#define DCTL_TSTCTL_SHIFT 4 443#define DCTL_TSTCTL_SHIFT 4
444#define DCTL_GOUTNAKSTS (1 << 3) 444#define DCTL_GOUTNAKSTS BIT(3)
445#define DCTL_GNPINNAKSTS (1 << 2) 445#define DCTL_GNPINNAKSTS BIT(2)
446#define DCTL_SFTDISCON (1 << 1) 446#define DCTL_SFTDISCON BIT(1)
447#define DCTL_RMTWKUPSIG (1 << 0) 447#define DCTL_RMTWKUPSIG BIT(0)
448 448
449#define DSTS HSOTG_REG(0x808) 449#define DSTS HSOTG_REG(0x808)
450#define DSTS_SOFFN_MASK (0x3fff << 8) 450#define DSTS_SOFFN_MASK (0x3fff << 8)
451#define DSTS_SOFFN_SHIFT 8 451#define DSTS_SOFFN_SHIFT 8
452#define DSTS_SOFFN_LIMIT 0x3fff 452#define DSTS_SOFFN_LIMIT 0x3fff
453#define DSTS_SOFFN(_x) ((_x) << 8) 453#define DSTS_SOFFN(_x) ((_x) << 8)
454#define DSTS_ERRATICERR (1 << 3) 454#define DSTS_ERRATICERR BIT(3)
455#define DSTS_ENUMSPD_MASK (0x3 << 1) 455#define DSTS_ENUMSPD_MASK (0x3 << 1)
456#define DSTS_ENUMSPD_SHIFT 1 456#define DSTS_ENUMSPD_SHIFT 1
457#define DSTS_ENUMSPD_HS 0 457#define DSTS_ENUMSPD_HS 0
458#define DSTS_ENUMSPD_FS 1 458#define DSTS_ENUMSPD_FS 1
459#define DSTS_ENUMSPD_LS 2 459#define DSTS_ENUMSPD_LS 2
460#define DSTS_ENUMSPD_FS48 3 460#define DSTS_ENUMSPD_FS48 3
461#define DSTS_SUSPSTS (1 << 0) 461#define DSTS_SUSPSTS BIT(0)
462 462
463#define DIEPMSK HSOTG_REG(0x810) 463#define DIEPMSK HSOTG_REG(0x810)
464#define DIEPMSK_NAKMSK (1 << 13) 464#define DIEPMSK_NAKMSK BIT(13)
465#define DIEPMSK_BNAININTRMSK (1 << 9) 465#define DIEPMSK_BNAININTRMSK BIT(9)
466#define DIEPMSK_TXFIFOUNDRNMSK (1 << 8) 466#define DIEPMSK_TXFIFOUNDRNMSK BIT(8)
467#define DIEPMSK_TXFIFOEMPTY (1 << 7) 467#define DIEPMSK_TXFIFOEMPTY BIT(7)
468#define DIEPMSK_INEPNAKEFFMSK (1 << 6) 468#define DIEPMSK_INEPNAKEFFMSK BIT(6)
469#define DIEPMSK_INTKNEPMISMSK (1 << 5) 469#define DIEPMSK_INTKNEPMISMSK BIT(5)
470#define DIEPMSK_INTKNTXFEMPMSK (1 << 4) 470#define DIEPMSK_INTKNTXFEMPMSK BIT(4)
471#define DIEPMSK_TIMEOUTMSK (1 << 3) 471#define DIEPMSK_TIMEOUTMSK BIT(3)
472#define DIEPMSK_AHBERRMSK (1 << 2) 472#define DIEPMSK_AHBERRMSK BIT(2)
473#define DIEPMSK_EPDISBLDMSK (1 << 1) 473#define DIEPMSK_EPDISBLDMSK BIT(1)
474#define DIEPMSK_XFERCOMPLMSK (1 << 0) 474#define DIEPMSK_XFERCOMPLMSK BIT(0)
475 475
476#define DOEPMSK HSOTG_REG(0x814) 476#define DOEPMSK HSOTG_REG(0x814)
477#define DOEPMSK_BNAMSK (1 << 9) 477#define DOEPMSK_BNAMSK BIT(9)
478#define DOEPMSK_BACK2BACKSETUP (1 << 6) 478#define DOEPMSK_BACK2BACKSETUP BIT(6)
479#define DOEPMSK_STSPHSERCVDMSK (1 << 5) 479#define DOEPMSK_STSPHSERCVDMSK BIT(5)
480#define DOEPMSK_OUTTKNEPDISMSK (1 << 4) 480#define DOEPMSK_OUTTKNEPDISMSK BIT(4)
481#define DOEPMSK_SETUPMSK (1 << 3) 481#define DOEPMSK_SETUPMSK BIT(3)
482#define DOEPMSK_AHBERRMSK (1 << 2) 482#define DOEPMSK_AHBERRMSK BIT(2)
483#define DOEPMSK_EPDISBLDMSK (1 << 1) 483#define DOEPMSK_EPDISBLDMSK BIT(1)
484#define DOEPMSK_XFERCOMPLMSK (1 << 0) 484#define DOEPMSK_XFERCOMPLMSK BIT(0)
485 485
486#define DAINT HSOTG_REG(0x818) 486#define DAINT HSOTG_REG(0x818)
487#define DAINTMSK HSOTG_REG(0x81C) 487#define DAINTMSK HSOTG_REG(0x81C)
@@ -516,30 +516,30 @@
516#define D0EPCTL_MPS_16 2 516#define D0EPCTL_MPS_16 2
517#define D0EPCTL_MPS_8 3 517#define D0EPCTL_MPS_8 3
518 518
519#define DXEPCTL_EPENA (1 << 31) 519#define DXEPCTL_EPENA BIT(31)
520#define DXEPCTL_EPDIS (1 << 30) 520#define DXEPCTL_EPDIS BIT(30)
521#define DXEPCTL_SETD1PID (1 << 29) 521#define DXEPCTL_SETD1PID BIT(29)
522#define DXEPCTL_SETODDFR (1 << 29) 522#define DXEPCTL_SETODDFR BIT(29)
523#define DXEPCTL_SETD0PID (1 << 28) 523#define DXEPCTL_SETD0PID BIT(28)
524#define DXEPCTL_SETEVENFR (1 << 28) 524#define DXEPCTL_SETEVENFR BIT(28)
525#define DXEPCTL_SNAK (1 << 27) 525#define DXEPCTL_SNAK BIT(27)
526#define DXEPCTL_CNAK (1 << 26) 526#define DXEPCTL_CNAK BIT(26)
527#define DXEPCTL_TXFNUM_MASK (0xf << 22) 527#define DXEPCTL_TXFNUM_MASK (0xf << 22)
528#define DXEPCTL_TXFNUM_SHIFT 22 528#define DXEPCTL_TXFNUM_SHIFT 22
529#define DXEPCTL_TXFNUM_LIMIT 0xf 529#define DXEPCTL_TXFNUM_LIMIT 0xf
530#define DXEPCTL_TXFNUM(_x) ((_x) << 22) 530#define DXEPCTL_TXFNUM(_x) ((_x) << 22)
531#define DXEPCTL_STALL (1 << 21) 531#define DXEPCTL_STALL BIT(21)
532#define DXEPCTL_SNP (1 << 20) 532#define DXEPCTL_SNP BIT(20)
533#define DXEPCTL_EPTYPE_MASK (0x3 << 18) 533#define DXEPCTL_EPTYPE_MASK (0x3 << 18)
534#define DXEPCTL_EPTYPE_CONTROL (0x0 << 18) 534#define DXEPCTL_EPTYPE_CONTROL (0x0 << 18)
535#define DXEPCTL_EPTYPE_ISO (0x1 << 18) 535#define DXEPCTL_EPTYPE_ISO (0x1 << 18)
536#define DXEPCTL_EPTYPE_BULK (0x2 << 18) 536#define DXEPCTL_EPTYPE_BULK (0x2 << 18)
537#define DXEPCTL_EPTYPE_INTERRUPT (0x3 << 18) 537#define DXEPCTL_EPTYPE_INTERRUPT (0x3 << 18)
538 538
539#define DXEPCTL_NAKSTS (1 << 17) 539#define DXEPCTL_NAKSTS BIT(17)
540#define DXEPCTL_DPID (1 << 16) 540#define DXEPCTL_DPID BIT(16)
541#define DXEPCTL_EOFRNUM (1 << 16) 541#define DXEPCTL_EOFRNUM BIT(16)
542#define DXEPCTL_USBACTEP (1 << 15) 542#define DXEPCTL_USBACTEP BIT(15)
543#define DXEPCTL_NEXTEP_MASK (0xf << 11) 543#define DXEPCTL_NEXTEP_MASK (0xf << 11)
544#define DXEPCTL_NEXTEP_SHIFT 11 544#define DXEPCTL_NEXTEP_SHIFT 11
545#define DXEPCTL_NEXTEP_LIMIT 0xf 545#define DXEPCTL_NEXTEP_LIMIT 0xf
@@ -551,26 +551,26 @@
551 551
552#define DIEPINT(_a) HSOTG_REG(0x908 + ((_a) * 0x20)) 552#define DIEPINT(_a) HSOTG_REG(0x908 + ((_a) * 0x20))
553#define DOEPINT(_a) HSOTG_REG(0xB08 + ((_a) * 0x20)) 553#define DOEPINT(_a) HSOTG_REG(0xB08 + ((_a) * 0x20))
554#define DXEPINT_SETUP_RCVD (1 << 15) 554#define DXEPINT_SETUP_RCVD BIT(15)
555#define DXEPINT_NYETINTRPT (1 << 14) 555#define DXEPINT_NYETINTRPT BIT(14)
556#define DXEPINT_NAKINTRPT (1 << 13) 556#define DXEPINT_NAKINTRPT BIT(13)
557#define DXEPINT_BBLEERRINTRPT (1 << 12) 557#define DXEPINT_BBLEERRINTRPT BIT(12)
558#define DXEPINT_PKTDRPSTS (1 << 11) 558#define DXEPINT_PKTDRPSTS BIT(11)
559#define DXEPINT_BNAINTR (1 << 9) 559#define DXEPINT_BNAINTR BIT(9)
560#define DXEPINT_TXFIFOUNDRN (1 << 8) 560#define DXEPINT_TXFIFOUNDRN BIT(8)
561#define DXEPINT_OUTPKTERR (1 << 8) 561#define DXEPINT_OUTPKTERR BIT(8)
562#define DXEPINT_TXFEMP (1 << 7) 562#define DXEPINT_TXFEMP BIT(7)
563#define DXEPINT_INEPNAKEFF (1 << 6) 563#define DXEPINT_INEPNAKEFF BIT(6)
564#define DXEPINT_BACK2BACKSETUP (1 << 6) 564#define DXEPINT_BACK2BACKSETUP BIT(6)
565#define DXEPINT_INTKNEPMIS (1 << 5) 565#define DXEPINT_INTKNEPMIS BIT(5)
566#define DXEPINT_STSPHSERCVD (1 << 5) 566#define DXEPINT_STSPHSERCVD BIT(5)
567#define DXEPINT_INTKNTXFEMP (1 << 4) 567#define DXEPINT_INTKNTXFEMP BIT(4)
568#define DXEPINT_OUTTKNEPDIS (1 << 4) 568#define DXEPINT_OUTTKNEPDIS BIT(4)
569#define DXEPINT_TIMEOUT (1 << 3) 569#define DXEPINT_TIMEOUT BIT(3)
570#define DXEPINT_SETUP (1 << 3) 570#define DXEPINT_SETUP BIT(3)
571#define DXEPINT_AHBERR (1 << 2) 571#define DXEPINT_AHBERR BIT(2)
572#define DXEPINT_EPDISBLD (1 << 1) 572#define DXEPINT_EPDISBLD BIT(1)
573#define DXEPINT_XFERCOMPL (1 << 0) 573#define DXEPINT_XFERCOMPL BIT(0)
574 574
575#define DIEPTSIZ0 HSOTG_REG(0x910) 575#define DIEPTSIZ0 HSOTG_REG(0x910)
576#define DIEPTSIZ0_PKTCNT_MASK (0x3 << 19) 576#define DIEPTSIZ0_PKTCNT_MASK (0x3 << 19)
@@ -587,7 +587,7 @@
587#define DOEPTSIZ0_SUPCNT_SHIFT 29 587#define DOEPTSIZ0_SUPCNT_SHIFT 29
588#define DOEPTSIZ0_SUPCNT_LIMIT 0x3 588#define DOEPTSIZ0_SUPCNT_LIMIT 0x3
589#define DOEPTSIZ0_SUPCNT(_x) ((_x) << 29) 589#define DOEPTSIZ0_SUPCNT(_x) ((_x) << 29)
590#define DOEPTSIZ0_PKTCNT (1 << 19) 590#define DOEPTSIZ0_PKTCNT BIT(19)
591#define DOEPTSIZ0_XFERSIZE_MASK (0x7f << 0) 591#define DOEPTSIZ0_XFERSIZE_MASK (0x7f << 0)
592#define DOEPTSIZ0_XFERSIZE_SHIFT 0 592#define DOEPTSIZ0_XFERSIZE_SHIFT 0
593 593
@@ -614,55 +614,55 @@
614#define DTXFSTS(_a) HSOTG_REG(0x918 + ((_a) * 0x20)) 614#define DTXFSTS(_a) HSOTG_REG(0x918 + ((_a) * 0x20))
615 615
616#define PCGCTL HSOTG_REG(0x0e00) 616#define PCGCTL HSOTG_REG(0x0e00)
617#define PCGCTL_IF_DEV_MODE (1 << 31) 617#define PCGCTL_IF_DEV_MODE BIT(31)
618#define PCGCTL_P2HD_PRT_SPD_MASK (0x3 << 29) 618#define PCGCTL_P2HD_PRT_SPD_MASK (0x3 << 29)
619#define PCGCTL_P2HD_PRT_SPD_SHIFT 29 619#define PCGCTL_P2HD_PRT_SPD_SHIFT 29
620#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK (0x3 << 27) 620#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK (0x3 << 27)
621#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT 27 621#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT 27
622#define PCGCTL_MAC_DEV_ADDR_MASK (0x7f << 20) 622#define PCGCTL_MAC_DEV_ADDR_MASK (0x7f << 20)
623#define PCGCTL_MAC_DEV_ADDR_SHIFT 20 623#define PCGCTL_MAC_DEV_ADDR_SHIFT 20
624#define PCGCTL_MAX_TERMSEL (1 << 19) 624#define PCGCTL_MAX_TERMSEL BIT(19)
625#define PCGCTL_MAX_XCVRSELECT_MASK (0x3 << 17) 625#define PCGCTL_MAX_XCVRSELECT_MASK (0x3 << 17)
626#define PCGCTL_MAX_XCVRSELECT_SHIFT 17 626#define PCGCTL_MAX_XCVRSELECT_SHIFT 17
627#define PCGCTL_PORT_POWER (1 << 16) 627#define PCGCTL_PORT_POWER BIT(16)
628#define PCGCTL_PRT_CLK_SEL_MASK (0x3 << 14) 628#define PCGCTL_PRT_CLK_SEL_MASK (0x3 << 14)
629#define PCGCTL_PRT_CLK_SEL_SHIFT 14 629#define PCGCTL_PRT_CLK_SEL_SHIFT 14
630#define PCGCTL_ESS_REG_RESTORED (1 << 13) 630#define PCGCTL_ESS_REG_RESTORED BIT(13)
631#define PCGCTL_EXTND_HIBER_SWITCH (1 << 12) 631#define PCGCTL_EXTND_HIBER_SWITCH BIT(12)
632#define PCGCTL_EXTND_HIBER_PWRCLMP (1 << 11) 632#define PCGCTL_EXTND_HIBER_PWRCLMP BIT(11)
633#define PCGCTL_ENBL_EXTND_HIBER (1 << 10) 633#define PCGCTL_ENBL_EXTND_HIBER BIT(10)
634#define PCGCTL_RESTOREMODE (1 << 9) 634#define PCGCTL_RESTOREMODE BIT(9)
635#define PCGCTL_RESETAFTSUSP (1 << 8) 635#define PCGCTL_RESETAFTSUSP BIT(8)
636#define PCGCTL_DEEP_SLEEP (1 << 7) 636#define PCGCTL_DEEP_SLEEP BIT(7)
637#define PCGCTL_PHY_IN_SLEEP (1 << 6) 637#define PCGCTL_PHY_IN_SLEEP BIT(6)
638#define PCGCTL_ENBL_SLEEP_GATING (1 << 5) 638#define PCGCTL_ENBL_SLEEP_GATING BIT(5)
639#define PCGCTL_RSTPDWNMODULE (1 << 3) 639#define PCGCTL_RSTPDWNMODULE BIT(3)
640#define PCGCTL_PWRCLMP (1 << 2) 640#define PCGCTL_PWRCLMP BIT(2)
641#define PCGCTL_GATEHCLK (1 << 1) 641#define PCGCTL_GATEHCLK BIT(1)
642#define PCGCTL_STOPPCLK (1 << 0) 642#define PCGCTL_STOPPCLK BIT(0)
643 643
644#define EPFIFO(_a) HSOTG_REG(0x1000 + ((_a) * 0x1000)) 644#define EPFIFO(_a) HSOTG_REG(0x1000 + ((_a) * 0x1000))
645 645
646/* Host Mode Registers */ 646/* Host Mode Registers */
647 647
648#define HCFG HSOTG_REG(0x0400) 648#define HCFG HSOTG_REG(0x0400)
649#define HCFG_MODECHTIMEN (1 << 31) 649#define HCFG_MODECHTIMEN BIT(31)
650#define HCFG_PERSCHEDENA (1 << 26) 650#define HCFG_PERSCHEDENA BIT(26)
651#define HCFG_FRLISTEN_MASK (0x3 << 24) 651#define HCFG_FRLISTEN_MASK (0x3 << 24)
652#define HCFG_FRLISTEN_SHIFT 24 652#define HCFG_FRLISTEN_SHIFT 24
653#define HCFG_FRLISTEN_8 (0 << 24) 653#define HCFG_FRLISTEN_8 (0 << 24)
654#define FRLISTEN_8_SIZE 8 654#define FRLISTEN_8_SIZE 8
655#define HCFG_FRLISTEN_16 (1 << 24) 655#define HCFG_FRLISTEN_16 BIT(24)
656#define FRLISTEN_16_SIZE 16 656#define FRLISTEN_16_SIZE 16
657#define HCFG_FRLISTEN_32 (2 << 24) 657#define HCFG_FRLISTEN_32 (2 << 24)
658#define FRLISTEN_32_SIZE 32 658#define FRLISTEN_32_SIZE 32
659#define HCFG_FRLISTEN_64 (3 << 24) 659#define HCFG_FRLISTEN_64 (3 << 24)
660#define FRLISTEN_64_SIZE 64 660#define FRLISTEN_64_SIZE 64
661#define HCFG_DESCDMA (1 << 23) 661#define HCFG_DESCDMA BIT(23)
662#define HCFG_RESVALID_MASK (0xff << 8) 662#define HCFG_RESVALID_MASK (0xff << 8)
663#define HCFG_RESVALID_SHIFT 8 663#define HCFG_RESVALID_SHIFT 8
664#define HCFG_ENA32KHZ (1 << 7) 664#define HCFG_ENA32KHZ BIT(7)
665#define HCFG_FSLSSUPP (1 << 2) 665#define HCFG_FSLSSUPP BIT(2)
666#define HCFG_FSLSPCLKSEL_MASK (0x3 << 0) 666#define HCFG_FSLSPCLKSEL_MASK (0x3 << 0)
667#define HCFG_FSLSPCLKSEL_SHIFT 0 667#define HCFG_FSLSPCLKSEL_SHIFT 0
668#define HCFG_FSLSPCLKSEL_30_60_MHZ 0 668#define HCFG_FSLSPCLKSEL_30_60_MHZ 0
@@ -672,7 +672,7 @@
672#define HFIR HSOTG_REG(0x0404) 672#define HFIR HSOTG_REG(0x0404)
673#define HFIR_FRINT_MASK (0xffff << 0) 673#define HFIR_FRINT_MASK (0xffff << 0)
674#define HFIR_FRINT_SHIFT 0 674#define HFIR_FRINT_SHIFT 0
675#define HFIR_RLDCTRL (1 << 16) 675#define HFIR_RLDCTRL BIT(16)
676 676
677#define HFNUM HSOTG_REG(0x0408) 677#define HFNUM HSOTG_REG(0x0408)
678#define HFNUM_FRREM_MASK (0xffff << 16) 678#define HFNUM_FRREM_MASK (0xffff << 16)
@@ -682,12 +682,12 @@
682#define HFNUM_MAX_FRNUM 0x3fff 682#define HFNUM_MAX_FRNUM 0x3fff
683 683
684#define HPTXSTS HSOTG_REG(0x0410) 684#define HPTXSTS HSOTG_REG(0x0410)
685#define TXSTS_QTOP_ODD (1 << 31) 685#define TXSTS_QTOP_ODD BIT(31)
686#define TXSTS_QTOP_CHNEP_MASK (0xf << 27) 686#define TXSTS_QTOP_CHNEP_MASK (0xf << 27)
687#define TXSTS_QTOP_CHNEP_SHIFT 27 687#define TXSTS_QTOP_CHNEP_SHIFT 27
688#define TXSTS_QTOP_TOKEN_MASK (0x3 << 25) 688#define TXSTS_QTOP_TOKEN_MASK (0x3 << 25)
689#define TXSTS_QTOP_TOKEN_SHIFT 25 689#define TXSTS_QTOP_TOKEN_SHIFT 25
690#define TXSTS_QTOP_TERMINATE (1 << 24) 690#define TXSTS_QTOP_TERMINATE BIT(24)
691#define TXSTS_QSPCAVAIL_MASK (0xff << 16) 691#define TXSTS_QSPCAVAIL_MASK (0xff << 16)
692#define TXSTS_QSPCAVAIL_SHIFT 16 692#define TXSTS_QSPCAVAIL_SHIFT 16
693#define TXSTS_FSPCAVAIL_MASK (0xffff << 0) 693#define TXSTS_FSPCAVAIL_MASK (0xffff << 0)
@@ -705,39 +705,39 @@
705#define HPRT0_SPD_LOW_SPEED 2 705#define HPRT0_SPD_LOW_SPEED 2
706#define HPRT0_TSTCTL_MASK (0xf << 13) 706#define HPRT0_TSTCTL_MASK (0xf << 13)
707#define HPRT0_TSTCTL_SHIFT 13 707#define HPRT0_TSTCTL_SHIFT 13
708#define HPRT0_PWR (1 << 12) 708#define HPRT0_PWR BIT(12)
709#define HPRT0_LNSTS_MASK (0x3 << 10) 709#define HPRT0_LNSTS_MASK (0x3 << 10)
710#define HPRT0_LNSTS_SHIFT 10 710#define HPRT0_LNSTS_SHIFT 10
711#define HPRT0_RST (1 << 8) 711#define HPRT0_RST BIT(8)
712#define HPRT0_SUSP (1 << 7) 712#define HPRT0_SUSP BIT(7)
713#define HPRT0_RES (1 << 6) 713#define HPRT0_RES BIT(6)
714#define HPRT0_OVRCURRCHG (1 << 5) 714#define HPRT0_OVRCURRCHG BIT(5)
715#define HPRT0_OVRCURRACT (1 << 4) 715#define HPRT0_OVRCURRACT BIT(4)
716#define HPRT0_ENACHG (1 << 3) 716#define HPRT0_ENACHG BIT(3)
717#define HPRT0_ENA (1 << 2) 717#define HPRT0_ENA BIT(2)
718#define HPRT0_CONNDET (1 << 1) 718#define HPRT0_CONNDET BIT(1)
719#define HPRT0_CONNSTS (1 << 0) 719#define HPRT0_CONNSTS BIT(0)
720 720
721#define HCCHAR(_ch) HSOTG_REG(0x0500 + 0x20 * (_ch)) 721#define HCCHAR(_ch) HSOTG_REG(0x0500 + 0x20 * (_ch))
722#define HCCHAR_CHENA (1 << 31) 722#define HCCHAR_CHENA BIT(31)
723#define HCCHAR_CHDIS (1 << 30) 723#define HCCHAR_CHDIS BIT(30)
724#define HCCHAR_ODDFRM (1 << 29) 724#define HCCHAR_ODDFRM BIT(29)
725#define HCCHAR_DEVADDR_MASK (0x7f << 22) 725#define HCCHAR_DEVADDR_MASK (0x7f << 22)
726#define HCCHAR_DEVADDR_SHIFT 22 726#define HCCHAR_DEVADDR_SHIFT 22
727#define HCCHAR_MULTICNT_MASK (0x3 << 20) 727#define HCCHAR_MULTICNT_MASK (0x3 << 20)
728#define HCCHAR_MULTICNT_SHIFT 20 728#define HCCHAR_MULTICNT_SHIFT 20
729#define HCCHAR_EPTYPE_MASK (0x3 << 18) 729#define HCCHAR_EPTYPE_MASK (0x3 << 18)
730#define HCCHAR_EPTYPE_SHIFT 18 730#define HCCHAR_EPTYPE_SHIFT 18
731#define HCCHAR_LSPDDEV (1 << 17) 731#define HCCHAR_LSPDDEV BIT(17)
732#define HCCHAR_EPDIR (1 << 15) 732#define HCCHAR_EPDIR BIT(15)
733#define HCCHAR_EPNUM_MASK (0xf << 11) 733#define HCCHAR_EPNUM_MASK (0xf << 11)
734#define HCCHAR_EPNUM_SHIFT 11 734#define HCCHAR_EPNUM_SHIFT 11
735#define HCCHAR_MPS_MASK (0x7ff << 0) 735#define HCCHAR_MPS_MASK (0x7ff << 0)
736#define HCCHAR_MPS_SHIFT 0 736#define HCCHAR_MPS_SHIFT 0
737 737
738#define HCSPLT(_ch) HSOTG_REG(0x0504 + 0x20 * (_ch)) 738#define HCSPLT(_ch) HSOTG_REG(0x0504 + 0x20 * (_ch))
739#define HCSPLT_SPLTENA (1 << 31) 739#define HCSPLT_SPLTENA BIT(31)
740#define HCSPLT_COMPSPLT (1 << 16) 740#define HCSPLT_COMPSPLT BIT(16)
741#define HCSPLT_XACTPOS_MASK (0x3 << 14) 741#define HCSPLT_XACTPOS_MASK (0x3 << 14)
742#define HCSPLT_XACTPOS_SHIFT 14 742#define HCSPLT_XACTPOS_SHIFT 14
743#define HCSPLT_XACTPOS_MID 0 743#define HCSPLT_XACTPOS_MID 0
@@ -752,23 +752,23 @@
752#define HCINT(_ch) HSOTG_REG(0x0508 + 0x20 * (_ch)) 752#define HCINT(_ch) HSOTG_REG(0x0508 + 0x20 * (_ch))
753#define HCINTMSK(_ch) HSOTG_REG(0x050c + 0x20 * (_ch)) 753#define HCINTMSK(_ch) HSOTG_REG(0x050c + 0x20 * (_ch))
754#define HCINTMSK_RESERVED14_31 (0x3ffff << 14) 754#define HCINTMSK_RESERVED14_31 (0x3ffff << 14)
755#define HCINTMSK_FRM_LIST_ROLL (1 << 13) 755#define HCINTMSK_FRM_LIST_ROLL BIT(13)
756#define HCINTMSK_XCS_XACT (1 << 12) 756#define HCINTMSK_XCS_XACT BIT(12)
757#define HCINTMSK_BNA (1 << 11) 757#define HCINTMSK_BNA BIT(11)
758#define HCINTMSK_DATATGLERR (1 << 10) 758#define HCINTMSK_DATATGLERR BIT(10)
759#define HCINTMSK_FRMOVRUN (1 << 9) 759#define HCINTMSK_FRMOVRUN BIT(9)
760#define HCINTMSK_BBLERR (1 << 8) 760#define HCINTMSK_BBLERR BIT(8)
761#define HCINTMSK_XACTERR (1 << 7) 761#define HCINTMSK_XACTERR BIT(7)
762#define HCINTMSK_NYET (1 << 6) 762#define HCINTMSK_NYET BIT(6)
763#define HCINTMSK_ACK (1 << 5) 763#define HCINTMSK_ACK BIT(5)
764#define HCINTMSK_NAK (1 << 4) 764#define HCINTMSK_NAK BIT(4)
765#define HCINTMSK_STALL (1 << 3) 765#define HCINTMSK_STALL BIT(3)
766#define HCINTMSK_AHBERR (1 << 2) 766#define HCINTMSK_AHBERR BIT(2)
767#define HCINTMSK_CHHLTD (1 << 1) 767#define HCINTMSK_CHHLTD BIT(1)
768#define HCINTMSK_XFERCOMPL (1 << 0) 768#define HCINTMSK_XFERCOMPL BIT(0)
769 769
770#define HCTSIZ(_ch) HSOTG_REG(0x0510 + 0x20 * (_ch)) 770#define HCTSIZ(_ch) HSOTG_REG(0x0510 + 0x20 * (_ch))
771#define TSIZ_DOPNG (1 << 31) 771#define TSIZ_DOPNG BIT(31)
772#define TSIZ_SC_MC_PID_MASK (0x3 << 29) 772#define TSIZ_SC_MC_PID_MASK (0x3 << 29)
773#define TSIZ_SC_MC_PID_SHIFT 29 773#define TSIZ_SC_MC_PID_SHIFT 29
774#define TSIZ_SC_MC_PID_DATA0 0 774#define TSIZ_SC_MC_PID_DATA0 0
@@ -808,14 +808,14 @@ struct dwc2_dma_desc {
808 808
809/* Host Mode DMA descriptor status quadlet */ 809/* Host Mode DMA descriptor status quadlet */
810 810
811#define HOST_DMA_A (1 << 31) 811#define HOST_DMA_A BIT(31)
812#define HOST_DMA_STS_MASK (0x3 << 28) 812#define HOST_DMA_STS_MASK (0x3 << 28)
813#define HOST_DMA_STS_SHIFT 28 813#define HOST_DMA_STS_SHIFT 28
814#define HOST_DMA_STS_PKTERR (1 << 28) 814#define HOST_DMA_STS_PKTERR BIT(28)
815#define HOST_DMA_EOL (1 << 26) 815#define HOST_DMA_EOL BIT(26)
816#define HOST_DMA_IOC (1 << 25) 816#define HOST_DMA_IOC BIT(25)
817#define HOST_DMA_SUP (1 << 24) 817#define HOST_DMA_SUP BIT(24)
818#define HOST_DMA_ALT_QTD (1 << 23) 818#define HOST_DMA_ALT_QTD BIT(23)
819#define HOST_DMA_QTD_OFFSET_MASK (0x3f << 17) 819#define HOST_DMA_QTD_OFFSET_MASK (0x3f << 17)
820#define HOST_DMA_QTD_OFFSET_SHIFT 17 820#define HOST_DMA_QTD_OFFSET_SHIFT 17
821#define HOST_DMA_ISOC_NBYTES_MASK (0xfff << 0) 821#define HOST_DMA_ISOC_NBYTES_MASK (0xfff << 0)
@@ -837,11 +837,11 @@ struct dwc2_dma_desc {
837#define DEV_DMA_STS_SUCC 0 837#define DEV_DMA_STS_SUCC 0
838#define DEV_DMA_STS_BUFF_FLUSH 1 838#define DEV_DMA_STS_BUFF_FLUSH 1
839#define DEV_DMA_STS_BUFF_ERR 3 839#define DEV_DMA_STS_BUFF_ERR 3
840#define DEV_DMA_L (1 << 27) 840#define DEV_DMA_L BIT(27)
841#define DEV_DMA_SHORT (1 << 26) 841#define DEV_DMA_SHORT BIT(26)
842#define DEV_DMA_IOC (1 << 25) 842#define DEV_DMA_IOC BIT(25)
843#define DEV_DMA_SR (1 << 24) 843#define DEV_DMA_SR BIT(24)
844#define DEV_DMA_MTRF (1 << 23) 844#define DEV_DMA_MTRF BIT(23)
845#define DEV_DMA_ISOC_PID_MASK (0x3 << 23) 845#define DEV_DMA_ISOC_PID_MASK (0x3 << 23)
846#define DEV_DMA_ISOC_PID_SHIFT 23 846#define DEV_DMA_ISOC_PID_SHIFT 23
847#define DEV_DMA_ISOC_PID_DATA0 0 847#define DEV_DMA_ISOC_PID_DATA0 0
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index bcd1e19b4076..2990c347289f 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -38,1157 +38,499 @@
38 38
39#include "core.h" 39#include "core.h"
40 40
41static const struct dwc2_core_params params_hi6220 = { 41static void dwc2_set_bcm_params(struct dwc2_hsotg *hsotg)
42 .otg_cap = 2, /* No HNP/SRP capable */
43 .otg_ver = 0, /* 1.3 */
44 .dma_desc_enable = 0,
45 .dma_desc_fs_enable = 0,
46 .speed = 0, /* High Speed */
47 .enable_dynamic_fifo = 1,
48 .en_multiple_tx_fifo = 1,
49 .host_rx_fifo_size = 512,
50 .host_nperio_tx_fifo_size = 512,
51 .host_perio_tx_fifo_size = 512,
52 .max_transfer_size = 65535,
53 .max_packet_count = 511,
54 .host_channels = 16,
55 .phy_type = 1, /* UTMI */
56 .phy_utmi_width = 8,
57 .phy_ulpi_ddr = 0, /* Single */
58 .phy_ulpi_ext_vbus = 0,
59 .i2c_enable = 0,
60 .ulpi_fs_ls = 0,
61 .host_support_fs_ls_low_power = 0,
62 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
63 .ts_dline = 0,
64 .reload_ctl = 0,
65 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
66 GAHBCFG_HBSTLEN_SHIFT,
67 .uframe_sched = 0,
68 .external_id_pin_ctl = -1,
69 .hibernation = -1,
70};
71
72static const struct dwc2_core_params params_bcm2835 = {
73 .otg_cap = 0, /* HNP/SRP capable */
74 .otg_ver = 0, /* 1.3 */
75 .dma_desc_enable = 0,
76 .dma_desc_fs_enable = 0,
77 .speed = 0, /* High Speed */
78 .enable_dynamic_fifo = 1,
79 .en_multiple_tx_fifo = 1,
80 .host_rx_fifo_size = 774, /* 774 DWORDs */
81 .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
82 .host_perio_tx_fifo_size = 512, /* 512 DWORDs */
83 .max_transfer_size = 65535,
84 .max_packet_count = 511,
85 .host_channels = 8,
86 .phy_type = 1, /* UTMI */
87 .phy_utmi_width = 8, /* 8 bits */
88 .phy_ulpi_ddr = 0, /* Single */
89 .phy_ulpi_ext_vbus = 0,
90 .i2c_enable = 0,
91 .ulpi_fs_ls = 0,
92 .host_support_fs_ls_low_power = 0,
93 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
94 .ts_dline = 0,
95 .reload_ctl = 0,
96 .ahbcfg = 0x10,
97 .uframe_sched = 0,
98 .external_id_pin_ctl = -1,
99 .hibernation = -1,
100};
101
102static const struct dwc2_core_params params_rk3066 = {
103 .otg_cap = 2, /* non-HNP/non-SRP */
104 .otg_ver = -1,
105 .dma_desc_enable = 0,
106 .dma_desc_fs_enable = 0,
107 .speed = -1,
108 .enable_dynamic_fifo = 1,
109 .en_multiple_tx_fifo = -1,
110 .host_rx_fifo_size = 525, /* 525 DWORDs */
111 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
112 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
113 .max_transfer_size = -1,
114 .max_packet_count = -1,
115 .host_channels = -1,
116 .phy_type = -1,
117 .phy_utmi_width = -1,
118 .phy_ulpi_ddr = -1,
119 .phy_ulpi_ext_vbus = -1,
120 .i2c_enable = -1,
121 .ulpi_fs_ls = -1,
122 .host_support_fs_ls_low_power = -1,
123 .host_ls_low_power_phy_clk = -1,
124 .ts_dline = -1,
125 .reload_ctl = -1,
126 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
127 GAHBCFG_HBSTLEN_SHIFT,
128 .uframe_sched = -1,
129 .external_id_pin_ctl = -1,
130 .hibernation = -1,
131};
132
133static const struct dwc2_core_params params_ltq = {
134 .otg_cap = 2, /* non-HNP/non-SRP */
135 .otg_ver = -1,
136 .dma_desc_enable = -1,
137 .dma_desc_fs_enable = -1,
138 .speed = -1,
139 .enable_dynamic_fifo = -1,
140 .en_multiple_tx_fifo = -1,
141 .host_rx_fifo_size = 288, /* 288 DWORDs */
142 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
143 .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
144 .max_transfer_size = 65535,
145 .max_packet_count = 511,
146 .host_channels = -1,
147 .phy_type = -1,
148 .phy_utmi_width = -1,
149 .phy_ulpi_ddr = -1,
150 .phy_ulpi_ext_vbus = -1,
151 .i2c_enable = -1,
152 .ulpi_fs_ls = -1,
153 .host_support_fs_ls_low_power = -1,
154 .host_ls_low_power_phy_clk = -1,
155 .ts_dline = -1,
156 .reload_ctl = -1,
157 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
158 GAHBCFG_HBSTLEN_SHIFT,
159 .uframe_sched = -1,
160 .external_id_pin_ctl = -1,
161 .hibernation = -1,
162};
163
164static const struct dwc2_core_params params_amlogic = {
165 .otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
166 .otg_ver = -1,
167 .dma_desc_enable = 0,
168 .dma_desc_fs_enable = 0,
169 .speed = DWC2_SPEED_PARAM_HIGH,
170 .enable_dynamic_fifo = 1,
171 .en_multiple_tx_fifo = -1,
172 .host_rx_fifo_size = 512,
173 .host_nperio_tx_fifo_size = 500,
174 .host_perio_tx_fifo_size = 500,
175 .max_transfer_size = -1,
176 .max_packet_count = -1,
177 .host_channels = 16,
178 .phy_type = DWC2_PHY_TYPE_PARAM_UTMI,
179 .phy_utmi_width = -1,
180 .phy_ulpi_ddr = -1,
181 .phy_ulpi_ext_vbus = -1,
182 .i2c_enable = -1,
183 .ulpi_fs_ls = -1,
184 .host_support_fs_ls_low_power = -1,
185 .host_ls_low_power_phy_clk = -1,
186 .ts_dline = -1,
187 .reload_ctl = 1,
188 .ahbcfg = GAHBCFG_HBSTLEN_INCR8 <<
189 GAHBCFG_HBSTLEN_SHIFT,
190 .uframe_sched = 0,
191 .external_id_pin_ctl = -1,
192 .hibernation = -1,
193};
194
195static const struct dwc2_core_params params_default = {
196 .otg_cap = -1,
197 .otg_ver = -1,
198
199 /*
200 * Disable descriptor dma mode by default as the HW can support
201 * it, but does not support it for SPLIT transactions.
202 * Disable it for FS devices as well.
203 */
204 .dma_desc_enable = 0,
205 .dma_desc_fs_enable = 0,
206
207 .speed = -1,
208 .enable_dynamic_fifo = -1,
209 .en_multiple_tx_fifo = -1,
210 .host_rx_fifo_size = -1,
211 .host_nperio_tx_fifo_size = -1,
212 .host_perio_tx_fifo_size = -1,
213 .max_transfer_size = -1,
214 .max_packet_count = -1,
215 .host_channels = -1,
216 .phy_type = -1,
217 .phy_utmi_width = -1,
218 .phy_ulpi_ddr = -1,
219 .phy_ulpi_ext_vbus = -1,
220 .i2c_enable = -1,
221 .ulpi_fs_ls = -1,
222 .host_support_fs_ls_low_power = -1,
223 .host_ls_low_power_phy_clk = -1,
224 .ts_dline = -1,
225 .reload_ctl = -1,
226 .ahbcfg = -1,
227 .uframe_sched = -1,
228 .external_id_pin_ctl = -1,
229 .hibernation = -1,
230};
231
232const struct of_device_id dwc2_of_match_table[] = {
233 { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
234 { .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 },
235 { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
236 { .compatible = "lantiq,arx100-usb", .data = &params_ltq },
237 { .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
238 { .compatible = "snps,dwc2", .data = NULL },
239 { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
240 { .compatible = "amlogic,meson8b-usb", .data = &params_amlogic },
241 { .compatible = "amlogic,meson-gxbb-usb", .data = &params_amlogic },
242 { .compatible = "amcc,dwc-otg", .data = NULL },
243 {},
244};
245MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
246
247static void dwc2_get_device_property(struct dwc2_hsotg *hsotg,
248 char *property, u8 size, u64 *value)
249{ 42{
250 u32 val32; 43 struct dwc2_core_params *p = &hsotg->params;
251
252 switch (size) {
253 case 0:
254 *value = device_property_read_bool(hsotg->dev, property);
255 break;
256 case 1:
257 case 2:
258 case 4:
259 if (device_property_read_u32(hsotg->dev, property, &val32))
260 return;
261
262 *value = val32;
263 break;
264 case 8:
265 if (device_property_read_u64(hsotg->dev, property, value))
266 return;
267 44
268 break; 45 p->host_rx_fifo_size = 774;
269 default: 46 p->max_transfer_size = 65535;
270 /* 47 p->max_packet_count = 511;
271 * The size is checked by the only function that calls 48 p->ahbcfg = 0x10;
272 * this so this should never happen. 49 p->uframe_sched = false;
273 */
274 WARN_ON(1);
275 return;
276 }
277} 50}
278 51
279static void dwc2_set_core_param(void *param, u8 size, u64 value) 52static void dwc2_set_his_params(struct dwc2_hsotg *hsotg)
280{ 53{
281 switch (size) { 54 struct dwc2_core_params *p = &hsotg->params;
282 case 0:
283 *((bool *)param) = !!value;
284 break;
285 case 1:
286 *((u8 *)param) = (u8)value;
287 break;
288 case 2:
289 *((u16 *)param) = (u16)value;
290 break;
291 case 4:
292 *((u32 *)param) = (u32)value;
293 break;
294 case 8:
295 *((u64 *)param) = (u64)value;
296 break;
297 default:
298 /*
299 * The size is checked by the only function that calls
300 * this so this should never happen.
301 */
302 WARN_ON(1);
303 return;
304 }
305}
306 55
307/** 56 p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
308 * dwc2_set_param() - Set a core parameter 57 p->speed = DWC2_SPEED_PARAM_HIGH;
309 * 58 p->host_rx_fifo_size = 512;
310 * @hsotg: Programming view of the DWC_otg controller 59 p->host_nperio_tx_fifo_size = 512;
311 * @param: Pointer to the parameter to set 60 p->host_perio_tx_fifo_size = 512;
312 * @lookup: True if the property should be looked up 61 p->max_transfer_size = 65535;
313 * @property: The device property to read 62 p->max_packet_count = 511;
314 * @legacy: The param value to set if @property is not available. This 63 p->host_channels = 16;
315 * will typically be the legacy value set in the static 64 p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
316 * params structure. 65 p->phy_utmi_width = 8;
317 * @def: The default value 66 p->i2c_enable = false;
318 * @min: The minimum value 67 p->reload_ctl = false;
319 * @max: The maximum value 68 p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
320 * @size: The size of the core parameter in bytes, or 0 for bool. 69 GAHBCFG_HBSTLEN_SHIFT;
321 * 70 p->uframe_sched = false;
322 * This function looks up @property and sets the @param to that value. 71 p->change_speed_quirk = true;
323 * If the property doesn't exist it uses the passed-in @value. It will 72}
324 * verify that the value falls between @min and @max. If it doesn't, 73
325 * it will output an error and set the parameter to either @def or, 74static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
326 * failing that, to @min.
327 *
328 * The @size is used to write to @param and to query the device
329 * properties so that this same function can be used with different
330 * types of parameters.
331 */
332static void dwc2_set_param(struct dwc2_hsotg *hsotg, void *param,
333 bool lookup, char *property, u64 legacy,
334 u64 def, u64 min, u64 max, u8 size)
335{ 75{
336 u64 sizemax; 76 struct dwc2_core_params *p = &hsotg->params;
337 u64 value;
338
339 if (WARN_ON(!hsotg || !param || !property))
340 return;
341
342 if (WARN((size > 8) || ((size & (size - 1)) != 0),
343 "Invalid size %d for %s\n", size, property))
344 return;
345
346 dev_vdbg(hsotg->dev, "%s: Setting %s: legacy=%llu, def=%llu, min=%llu, max=%llu, size=%d\n",
347 __func__, property, legacy, def, min, max, size);
348
349 sizemax = (1ULL << (size * 8)) - 1;
350 value = legacy;
351
352 /* Override legacy settings. */
353 if (lookup)
354 dwc2_get_device_property(hsotg, property, size, &value);
355
356 /*
357 * While the value is not valid, try setting it to the default
358 * value, and failing that, set it to the minimum.
359 */
360 while ((value < min) || (value > max)) {
361 /* Print an error unless the value is set to auto. */
362 if (value != sizemax)
363 dev_err(hsotg->dev, "Invalid value %llu for param %s\n",
364 value, property);
365 77
366 /* 78 p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
367 * If we are already the default, just set it to the 79 p->host_rx_fifo_size = 525;
368 * minimum. 80 p->host_nperio_tx_fifo_size = 128;
369 */ 81 p->host_perio_tx_fifo_size = 256;
370 if (value == def) { 82 p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
371 dev_vdbg(hsotg->dev, "%s: setting value to min=%llu\n", 83 GAHBCFG_HBSTLEN_SHIFT;
372 __func__, min); 84}
373 value = min;
374 break;
375 }
376 85
377 /* Try the default value */ 86static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
378 dev_vdbg(hsotg->dev, "%s: setting value to default=%llu\n", 87{
379 __func__, def); 88 struct dwc2_core_params *p = &hsotg->params;
380 value = def;
381 }
382 89
383 dev_dbg(hsotg->dev, "Setting %s to %llu\n", property, value); 90 p->otg_cap = 2;
384 dwc2_set_core_param(param, size, value); 91 p->host_rx_fifo_size = 288;
92 p->host_nperio_tx_fifo_size = 128;
93 p->host_perio_tx_fifo_size = 96;
94 p->max_transfer_size = 65535;
95 p->max_packet_count = 511;
96 p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
97 GAHBCFG_HBSTLEN_SHIFT;
385} 98}
386 99
387/** 100static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg)
388 * dwc2_set_param_u32() - Set a u32 parameter
389 *
390 * See dwc2_set_param().
391 */
392static void dwc2_set_param_u32(struct dwc2_hsotg *hsotg, u32 *param,
393 bool lookup, char *property, u16 legacy,
394 u16 def, u16 min, u16 max)
395{ 101{
396 dwc2_set_param(hsotg, param, lookup, property, 102 struct dwc2_core_params *p = &hsotg->params;
397 legacy, def, min, max, 4); 103
104 p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
105 p->speed = DWC2_SPEED_PARAM_HIGH;
106 p->host_rx_fifo_size = 512;
107 p->host_nperio_tx_fifo_size = 500;
108 p->host_perio_tx_fifo_size = 500;
109 p->host_channels = 16;
110 p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
111 p->ahbcfg = GAHBCFG_HBSTLEN_INCR8 <<
112 GAHBCFG_HBSTLEN_SHIFT;
113 p->uframe_sched = false;
398} 114}
399 115
400/** 116static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
401 * dwc2_set_param_bool() - Set a bool parameter
402 *
403 * See dwc2_set_param().
404 *
405 * Note: there is no 'legacy' argument here because there is no legacy
406 * source of bool params.
407 */
408static void dwc2_set_param_bool(struct dwc2_hsotg *hsotg, bool *param,
409 bool lookup, char *property,
410 bool def, bool min, bool max)
411{ 117{
412 dwc2_set_param(hsotg, param, lookup, property, 118 struct dwc2_core_params *p = &hsotg->params;
413 def, def, min, max, 0); 119
120 p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
414} 121}
415 122
416#define DWC2_OUT_OF_BOUNDS(a, b, c) ((a) < (b) || (a) > (c)) 123const struct of_device_id dwc2_of_match_table[] = {
124 { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
125 { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
126 { .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params },
127 { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params },
128 { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params },
129 { .compatible = "snps,dwc2" },
130 { .compatible = "samsung,s3c6400-hsotg" },
131 { .compatible = "amlogic,meson8b-usb",
132 .data = dwc2_set_amlogic_params },
133 { .compatible = "amlogic,meson-gxbb-usb",
134 .data = dwc2_set_amlogic_params },
135 { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
136 {},
137};
138MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
417 139
418/* Parameter access functions */ 140static void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg)
419static void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val)
420{ 141{
421 int valid = 1; 142 u8 val;
422 143
423 switch (val) { 144 switch (hsotg->hw_params.op_mode) {
424 case DWC2_CAP_PARAM_HNP_SRP_CAPABLE: 145 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
425 if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) 146 val = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
426 valid = 0;
427 break; 147 break;
428 case DWC2_CAP_PARAM_SRP_ONLY_CAPABLE: 148 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
429 switch (hsotg->hw_params.op_mode) { 149 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
430 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE: 150 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
431 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE: 151 val = DWC2_CAP_PARAM_SRP_ONLY_CAPABLE;
432 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
433 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
434 break;
435 default:
436 valid = 0;
437 break;
438 }
439 break;
440 case DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE:
441 /* always valid */
442 break; 152 break;
443 default: 153 default:
444 valid = 0; 154 val = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
445 break; 155 break;
446 } 156 }
447 157
448 if (!valid) {
449 if (val >= 0)
450 dev_err(hsotg->dev,
451 "%d invalid for otg_cap parameter. Check HW configuration.\n",
452 val);
453 switch (hsotg->hw_params.op_mode) {
454 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
455 val = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
456 break;
457 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
458 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
459 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
460 val = DWC2_CAP_PARAM_SRP_ONLY_CAPABLE;
461 break;
462 default:
463 val = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
464 break;
465 }
466 dev_dbg(hsotg->dev, "Setting otg_cap to %d\n", val);
467 }
468
469 hsotg->params.otg_cap = val; 158 hsotg->params.otg_cap = val;
470} 159}
471 160
472static void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val) 161static void dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg)
473{ 162{
474 int valid = 1; 163 int val;
164 u32 hs_phy_type = hsotg->hw_params.hs_phy_type;
475 165
476 if (val > 0 && (hsotg->params.host_dma <= 0 || 166 val = DWC2_PHY_TYPE_PARAM_FS;
477 !hsotg->hw_params.dma_desc_enable)) 167 if (hs_phy_type != GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED) {
478 valid = 0; 168 if (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI ||
479 if (val < 0) 169 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI)
480 valid = 0; 170 val = DWC2_PHY_TYPE_PARAM_UTMI;
481 171 else
482 if (!valid) { 172 val = DWC2_PHY_TYPE_PARAM_ULPI;
483 if (val >= 0)
484 dev_err(hsotg->dev,
485 "%d invalid for dma_desc_enable parameter. Check HW configuration.\n",
486 val);
487 val = (hsotg->params.host_dma > 0 &&
488 hsotg->hw_params.dma_desc_enable);
489 dev_dbg(hsotg->dev, "Setting dma_desc_enable to %d\n", val);
490 } 173 }
491 174
492 hsotg->params.dma_desc_enable = val; 175 if (dwc2_is_fs_iot(hsotg))
493} 176 hsotg->params.phy_type = DWC2_PHY_TYPE_PARAM_FS;
494
495static void dwc2_set_param_dma_desc_fs_enable(struct dwc2_hsotg *hsotg, int val)
496{
497 int valid = 1;
498
499 if (val > 0 && (hsotg->params.host_dma <= 0 ||
500 !hsotg->hw_params.dma_desc_enable))
501 valid = 0;
502 if (val < 0)
503 valid = 0;
504
505 if (!valid) {
506 if (val >= 0)
507 dev_err(hsotg->dev,
508 "%d invalid for dma_desc_fs_enable parameter. Check HW configuration.\n",
509 val);
510 val = (hsotg->params.host_dma > 0 &&
511 hsotg->hw_params.dma_desc_enable);
512 }
513 177
514 hsotg->params.dma_desc_fs_enable = val; 178 hsotg->params.phy_type = val;
515 dev_dbg(hsotg->dev, "Setting dma_desc_fs_enable to %d\n", val);
516} 179}
517 180
518static void 181static void dwc2_set_param_speed(struct dwc2_hsotg *hsotg)
519dwc2_set_param_host_support_fs_ls_low_power(struct dwc2_hsotg *hsotg,
520 int val)
521{ 182{
522 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) { 183 int val;
523 if (val >= 0) {
524 dev_err(hsotg->dev,
525 "Wrong value for host_support_fs_low_power\n");
526 dev_err(hsotg->dev,
527 "host_support_fs_low_power must be 0 or 1\n");
528 }
529 val = 0;
530 dev_dbg(hsotg->dev,
531 "Setting host_support_fs_low_power to %d\n", val);
532 }
533 184
534 hsotg->params.host_support_fs_ls_low_power = val; 185 val = hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS ?
535} 186 DWC2_SPEED_PARAM_FULL : DWC2_SPEED_PARAM_HIGH;
536
537static void dwc2_set_param_enable_dynamic_fifo(struct dwc2_hsotg *hsotg,
538 int val)
539{
540 int valid = 1;
541 187
542 if (val > 0 && !hsotg->hw_params.enable_dynamic_fifo) 188 if (dwc2_is_fs_iot(hsotg))
543 valid = 0; 189 val = DWC2_SPEED_PARAM_FULL;
544 if (val < 0)
545 valid = 0;
546 190
547 if (!valid) { 191 if (dwc2_is_hs_iot(hsotg))
548 if (val >= 0) 192 val = DWC2_SPEED_PARAM_HIGH;
549 dev_err(hsotg->dev,
550 "%d invalid for enable_dynamic_fifo parameter. Check HW configuration.\n",
551 val);
552 val = hsotg->hw_params.enable_dynamic_fifo;
553 dev_dbg(hsotg->dev, "Setting enable_dynamic_fifo to %d\n", val);
554 }
555 193
556 hsotg->params.enable_dynamic_fifo = val; 194 hsotg->params.speed = val;
557} 195}
558 196
559static void dwc2_set_param_host_rx_fifo_size(struct dwc2_hsotg *hsotg, int val) 197static void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg)
560{ 198{
561 int valid = 1; 199 int val;
562 200
563 if (val < 16 || val > hsotg->hw_params.rx_fifo_size) 201 val = (hsotg->hw_params.utmi_phy_data_width ==
564 valid = 0; 202 GHWCFG4_UTMI_PHY_DATA_WIDTH_8) ? 8 : 16;
565
566 if (!valid) {
567 if (val >= 0)
568 dev_err(hsotg->dev,
569 "%d invalid for host_rx_fifo_size. Check HW configuration.\n",
570 val);
571 val = hsotg->hw_params.rx_fifo_size;
572 dev_dbg(hsotg->dev, "Setting host_rx_fifo_size to %d\n", val);
573 }
574 203
575 hsotg->params.host_rx_fifo_size = val; 204 hsotg->params.phy_utmi_width = val;
576} 205}
577 206
578static void dwc2_set_param_host_nperio_tx_fifo_size(struct dwc2_hsotg *hsotg, 207static void dwc2_set_param_tx_fifo_sizes(struct dwc2_hsotg *hsotg)
579 int val)
580{ 208{
581 int valid = 1; 209 struct dwc2_core_params *p = &hsotg->params;
582 210 int depth_average;
583 if (val < 16 || val > hsotg->hw_params.host_nperio_tx_fifo_size) 211 int fifo_count;
584 valid = 0; 212 int i;
585 213
586 if (!valid) { 214 fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
587 if (val >= 0)
588 dev_err(hsotg->dev,
589 "%d invalid for host_nperio_tx_fifo_size. Check HW configuration.\n",
590 val);
591 val = hsotg->hw_params.host_nperio_tx_fifo_size;
592 dev_dbg(hsotg->dev, "Setting host_nperio_tx_fifo_size to %d\n",
593 val);
594 }
595 215
596 hsotg->params.host_nperio_tx_fifo_size = val; 216 memset(p->g_tx_fifo_size, 0, sizeof(p->g_tx_fifo_size));
217 depth_average = dwc2_hsotg_tx_fifo_average_depth(hsotg);
218 for (i = 1; i <= fifo_count; i++)
219 p->g_tx_fifo_size[i] = depth_average;
597} 220}
598 221
599static void dwc2_set_param_host_perio_tx_fifo_size(struct dwc2_hsotg *hsotg, 222/**
600 int val) 223 * dwc2_set_default_params() - Set all core parameters to their
224 * auto-detected default values.
225 */
226static void dwc2_set_default_params(struct dwc2_hsotg *hsotg)
601{ 227{
602 int valid = 1; 228 struct dwc2_hw_params *hw = &hsotg->hw_params;
229 struct dwc2_core_params *p = &hsotg->params;
230 bool dma_capable = !(hw->arch == GHWCFG2_SLAVE_ONLY_ARCH);
603 231
604 if (val < 16 || val > hsotg->hw_params.host_perio_tx_fifo_size) 232 dwc2_set_param_otg_cap(hsotg);
605 valid = 0; 233 dwc2_set_param_phy_type(hsotg);
234 dwc2_set_param_speed(hsotg);
235 dwc2_set_param_phy_utmi_width(hsotg);
236 p->phy_ulpi_ddr = false;
237 p->phy_ulpi_ext_vbus = false;
238
239 p->enable_dynamic_fifo = hw->enable_dynamic_fifo;
240 p->en_multiple_tx_fifo = hw->en_multiple_tx_fifo;
241 p->i2c_enable = hw->i2c_enable;
242 p->ulpi_fs_ls = false;
243 p->ts_dline = false;
244 p->reload_ctl = (hw->snpsid >= DWC2_CORE_REV_2_92a);
245 p->uframe_sched = true;
246 p->external_id_pin_ctl = false;
247 p->hibernation = false;
248 p->max_packet_count = hw->max_packet_count;
249 p->max_transfer_size = hw->max_transfer_size;
250 p->ahbcfg = GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT;
606 251
607 if (!valid) { 252 if ((hsotg->dr_mode == USB_DR_MODE_HOST) ||
608 if (val >= 0) 253 (hsotg->dr_mode == USB_DR_MODE_OTG)) {
609 dev_err(hsotg->dev, 254 p->host_dma = dma_capable;
610 "%d invalid for host_perio_tx_fifo_size. Check HW configuration.\n", 255 p->dma_desc_enable = false;
611 val); 256 p->dma_desc_fs_enable = false;
612 val = hsotg->hw_params.host_perio_tx_fifo_size; 257 p->host_support_fs_ls_low_power = false;
613 dev_dbg(hsotg->dev, "Setting host_perio_tx_fifo_size to %d\n", 258 p->host_ls_low_power_phy_clk = false;
614 val); 259 p->host_channels = hw->host_channels;
260 p->host_rx_fifo_size = hw->rx_fifo_size;
261 p->host_nperio_tx_fifo_size = hw->host_nperio_tx_fifo_size;
262 p->host_perio_tx_fifo_size = hw->host_perio_tx_fifo_size;
615 } 263 }
616 264
617 hsotg->params.host_perio_tx_fifo_size = val; 265 if ((hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) ||
618} 266 (hsotg->dr_mode == USB_DR_MODE_OTG)) {
619 267 p->g_dma = dma_capable;
620static void dwc2_set_param_max_transfer_size(struct dwc2_hsotg *hsotg, int val) 268 p->g_dma_desc = hw->dma_desc_enable;
621{
622 int valid = 1;
623
624 if (val < 2047 || val > hsotg->hw_params.max_transfer_size)
625 valid = 0;
626 269
627 if (!valid) { 270 /*
628 if (val >= 0) 271 * The values for g_rx_fifo_size (2048) and
629 dev_err(hsotg->dev, 272 * g_np_tx_fifo_size (1024) come from the legacy s3c
630 "%d invalid for max_transfer_size. Check HW configuration.\n", 273 * gadget driver. These defaults have been hard-coded
631 val); 274 * for some time so many platforms depend on these
632 val = hsotg->hw_params.max_transfer_size; 275 * values. Leave them as defaults for now and only
633 dev_dbg(hsotg->dev, "Setting max_transfer_size to %d\n", val); 276 * auto-detect if the hardware does not support the
277 * default.
278 */
279 p->g_rx_fifo_size = 2048;
280 p->g_np_tx_fifo_size = 1024;
281 dwc2_set_param_tx_fifo_sizes(hsotg);
634 } 282 }
635
636 hsotg->params.max_transfer_size = val;
637} 283}
638 284
639static void dwc2_set_param_max_packet_count(struct dwc2_hsotg *hsotg, int val) 285/**
286 * dwc2_get_device_properties() - Read in device properties.
287 *
288 * Read in the device properties and adjust core parameters if needed.
289 */
290static void dwc2_get_device_properties(struct dwc2_hsotg *hsotg)
640{ 291{
641 int valid = 1; 292 struct dwc2_core_params *p = &hsotg->params;
642 293 int num;
643 if (val < 15 || val > hsotg->hw_params.max_packet_count)
644 valid = 0;
645 294
646 if (!valid) { 295 if ((hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) ||
647 if (val >= 0) 296 (hsotg->dr_mode == USB_DR_MODE_OTG)) {
648 dev_err(hsotg->dev, 297 device_property_read_u32(hsotg->dev, "g-rx-fifo-size",
649 "%d invalid for max_packet_count. Check HW configuration.\n", 298 &p->g_rx_fifo_size);
650 val); 299
651 val = hsotg->hw_params.max_packet_count; 300 device_property_read_u32(hsotg->dev, "g-np-tx-fifo-size",
652 dev_dbg(hsotg->dev, "Setting max_packet_count to %d\n", val); 301 &p->g_np_tx_fifo_size);
302
303 num = device_property_read_u32_array(hsotg->dev,
304 "g-tx-fifo-size",
305 NULL, 0);
306
307 if (num > 0) {
308 num = min(num, 15);
309 memset(p->g_tx_fifo_size, 0,
310 sizeof(p->g_tx_fifo_size));
311 device_property_read_u32_array(hsotg->dev,
312 "g-tx-fifo-size",
313 &p->g_tx_fifo_size[1],
314 num);
315 }
653 } 316 }
654
655 hsotg->params.max_packet_count = val;
656} 317}
657 318
658static void dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val) 319static void dwc2_check_param_otg_cap(struct dwc2_hsotg *hsotg)
659{ 320{
660 int valid = 1; 321 int valid = 1;
661 322
662 if (val < 1 || val > hsotg->hw_params.host_channels) 323 switch (hsotg->params.otg_cap) {
324 case DWC2_CAP_PARAM_HNP_SRP_CAPABLE:
325 if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE)
326 valid = 0;
327 break;
328 case DWC2_CAP_PARAM_SRP_ONLY_CAPABLE:
329 switch (hsotg->hw_params.op_mode) {
330 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
331 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
332 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
333 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
334 break;
335 default:
336 valid = 0;
337 break;
338 }
339 break;
340 case DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE:
341 /* always valid */
342 break;
343 default:
663 valid = 0; 344 valid = 0;
664 345 break;
665 if (!valid) {
666 if (val >= 0)
667 dev_err(hsotg->dev,
668 "%d invalid for host_channels. Check HW configuration.\n",
669 val);
670 val = hsotg->hw_params.host_channels;
671 dev_dbg(hsotg->dev, "Setting host_channels to %d\n", val);
672 } 346 }
673 347
674 hsotg->params.host_channels = val; 348 if (!valid)
349 dwc2_set_param_otg_cap(hsotg);
675} 350}
676 351
677static void dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val) 352static void dwc2_check_param_phy_type(struct dwc2_hsotg *hsotg)
678{ 353{
679 int valid = 0; 354 int valid = 0;
680 u32 hs_phy_type, fs_phy_type; 355 u32 hs_phy_type;
681 356 u32 fs_phy_type;
682 if (DWC2_OUT_OF_BOUNDS(val, DWC2_PHY_TYPE_PARAM_FS,
683 DWC2_PHY_TYPE_PARAM_ULPI)) {
684 if (val >= 0) {
685 dev_err(hsotg->dev, "Wrong value for phy_type\n");
686 dev_err(hsotg->dev, "phy_type must be 0, 1 or 2\n");
687 }
688
689 valid = 0;
690 }
691 357
692 hs_phy_type = hsotg->hw_params.hs_phy_type; 358 hs_phy_type = hsotg->hw_params.hs_phy_type;
693 fs_phy_type = hsotg->hw_params.fs_phy_type; 359 fs_phy_type = hsotg->hw_params.fs_phy_type;
694 if (val == DWC2_PHY_TYPE_PARAM_UTMI &&
695 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI ||
696 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
697 valid = 1;
698 else if (val == DWC2_PHY_TYPE_PARAM_ULPI &&
699 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI ||
700 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
701 valid = 1;
702 else if (val == DWC2_PHY_TYPE_PARAM_FS &&
703 fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED)
704 valid = 1;
705
706 if (!valid) {
707 if (val >= 0)
708 dev_err(hsotg->dev,
709 "%d invalid for phy_type. Check HW configuration.\n",
710 val);
711 val = DWC2_PHY_TYPE_PARAM_FS;
712 if (hs_phy_type != GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED) {
713 if (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI ||
714 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI)
715 val = DWC2_PHY_TYPE_PARAM_UTMI;
716 else
717 val = DWC2_PHY_TYPE_PARAM_ULPI;
718 }
719 dev_dbg(hsotg->dev, "Setting phy_type to %d\n", val);
720 }
721
722 hsotg->params.phy_type = val;
723}
724
725static int dwc2_get_param_phy_type(struct dwc2_hsotg *hsotg)
726{
727 return hsotg->params.phy_type;
728}
729
730static void dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val)
731{
732 int valid = 1;
733
734 if (DWC2_OUT_OF_BOUNDS(val, 0, 2)) {
735 if (val >= 0) {
736 dev_err(hsotg->dev, "Wrong value for speed parameter\n");
737 dev_err(hsotg->dev, "max_speed parameter must be 0, 1, or 2\n");
738 }
739 valid = 0;
740 }
741
742 if (dwc2_is_hs_iot(hsotg) &&
743 val == DWC2_SPEED_PARAM_LOW)
744 valid = 0;
745
746 if (val == DWC2_SPEED_PARAM_HIGH &&
747 dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS)
748 valid = 0;
749 360
750 if (!valid) { 361 switch (hsotg->params.phy_type) {
751 if (val >= 0) 362 case DWC2_PHY_TYPE_PARAM_FS:
752 dev_err(hsotg->dev, 363 if (fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED)
753 "%d invalid for speed parameter. Check HW configuration.\n", 364 valid = 1;
754 val); 365 break;
755 val = dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS ? 366 case DWC2_PHY_TYPE_PARAM_UTMI:
756 DWC2_SPEED_PARAM_FULL : DWC2_SPEED_PARAM_HIGH; 367 if ((hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI) ||
757 dev_dbg(hsotg->dev, "Setting speed to %d\n", val); 368 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
369 valid = 1;
370 break;
371 case DWC2_PHY_TYPE_PARAM_ULPI:
372 if ((hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI) ||
373 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
374 valid = 1;
375 break;
376 default:
377 break;
758 } 378 }
759 379
760 hsotg->params.speed = val; 380 if (!valid)
381 dwc2_set_param_phy_type(hsotg);
761} 382}
762 383
763static void dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg, 384static void dwc2_check_param_speed(struct dwc2_hsotg *hsotg)
764 int val)
765{ 385{
766 int valid = 1; 386 int valid = 1;
387 int phy_type = hsotg->params.phy_type;
388 int speed = hsotg->params.speed;
767 389
768 if (DWC2_OUT_OF_BOUNDS(val, DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ, 390 switch (speed) {
769 DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ)) { 391 case DWC2_SPEED_PARAM_HIGH:
770 if (val >= 0) { 392 if ((hsotg->params.speed == DWC2_SPEED_PARAM_HIGH) &&
771 dev_err(hsotg->dev, 393 (phy_type == DWC2_PHY_TYPE_PARAM_FS))
772 "Wrong value for host_ls_low_power_phy_clk parameter\n"); 394 valid = 0;
773 dev_err(hsotg->dev, 395 break;
774 "host_ls_low_power_phy_clk must be 0 or 1\n"); 396 case DWC2_SPEED_PARAM_FULL:
775 } 397 case DWC2_SPEED_PARAM_LOW:
776 valid = 0; 398 break;
777 } 399 default:
778
779 if (val == DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ &&
780 dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS)
781 valid = 0; 400 valid = 0;
782 401 break;
783 if (!valid) {
784 if (val >= 0)
785 dev_err(hsotg->dev,
786 "%d invalid for host_ls_low_power_phy_clk. Check HW configuration.\n",
787 val);
788 val = dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS
789 ? DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ
790 : DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ;
791 dev_dbg(hsotg->dev, "Setting host_ls_low_power_phy_clk to %d\n",
792 val);
793 }
794
795 hsotg->params.host_ls_low_power_phy_clk = val;
796}
797
798static void dwc2_set_param_phy_ulpi_ddr(struct dwc2_hsotg *hsotg, int val)
799{
800 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
801 if (val >= 0) {
802 dev_err(hsotg->dev, "Wrong value for phy_ulpi_ddr\n");
803 dev_err(hsotg->dev, "phy_upli_ddr must be 0 or 1\n");
804 }
805 val = 0;
806 dev_dbg(hsotg->dev, "Setting phy_upli_ddr to %d\n", val);
807 }
808
809 hsotg->params.phy_ulpi_ddr = val;
810}
811
812static void dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val)
813{
814 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
815 if (val >= 0) {
816 dev_err(hsotg->dev,
817 "Wrong value for phy_ulpi_ext_vbus\n");
818 dev_err(hsotg->dev,
819 "phy_ulpi_ext_vbus must be 0 or 1\n");
820 }
821 val = 0;
822 dev_dbg(hsotg->dev, "Setting phy_ulpi_ext_vbus to %d\n", val);
823 } 402 }
824 403
825 hsotg->params.phy_ulpi_ext_vbus = val; 404 if (!valid)
405 dwc2_set_param_speed(hsotg);
826} 406}
827 407
828static void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val) 408static void dwc2_check_param_phy_utmi_width(struct dwc2_hsotg *hsotg)
829{ 409{
830 int valid = 0; 410 int valid = 0;
411 int param = hsotg->params.phy_utmi_width;
412 int width = hsotg->hw_params.utmi_phy_data_width;
831 413
832 switch (hsotg->hw_params.utmi_phy_data_width) { 414 switch (width) {
833 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8: 415 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8:
834 valid = (val == 8); 416 valid = (param == 8);
835 break; 417 break;
836 case GHWCFG4_UTMI_PHY_DATA_WIDTH_16: 418 case GHWCFG4_UTMI_PHY_DATA_WIDTH_16:
837 valid = (val == 16); 419 valid = (param == 16);
838 break; 420 break;
839 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16: 421 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16:
840 valid = (val == 8 || val == 16); 422 valid = (param == 8 || param == 16);
841 break; 423 break;
842 } 424 }
843 425
844 if (!valid) { 426 if (!valid)
845 if (val >= 0) { 427 dwc2_set_param_phy_utmi_width(hsotg);
846 dev_err(hsotg->dev,
847 "%d invalid for phy_utmi_width. Check HW configuration.\n",
848 val);
849 }
850 val = (hsotg->hw_params.utmi_phy_data_width ==
851 GHWCFG4_UTMI_PHY_DATA_WIDTH_8) ? 8 : 16;
852 dev_dbg(hsotg->dev, "Setting phy_utmi_width to %d\n", val);
853 }
854
855 hsotg->params.phy_utmi_width = val;
856}
857
858static void dwc2_set_param_ulpi_fs_ls(struct dwc2_hsotg *hsotg, int val)
859{
860 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
861 if (val >= 0) {
862 dev_err(hsotg->dev, "Wrong value for ulpi_fs_ls\n");
863 dev_err(hsotg->dev, "ulpi_fs_ls must be 0 or 1\n");
864 }
865 val = 0;
866 dev_dbg(hsotg->dev, "Setting ulpi_fs_ls to %d\n", val);
867 }
868
869 hsotg->params.ulpi_fs_ls = val;
870}
871
872static void dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val)
873{
874 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
875 if (val >= 0) {
876 dev_err(hsotg->dev, "Wrong value for ts_dline\n");
877 dev_err(hsotg->dev, "ts_dline must be 0 or 1\n");
878 }
879 val = 0;
880 dev_dbg(hsotg->dev, "Setting ts_dline to %d\n", val);
881 }
882
883 hsotg->params.ts_dline = val;
884}
885
886static void dwc2_set_param_i2c_enable(struct dwc2_hsotg *hsotg, int val)
887{
888 int valid = 1;
889
890 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
891 if (val >= 0) {
892 dev_err(hsotg->dev, "Wrong value for i2c_enable\n");
893 dev_err(hsotg->dev, "i2c_enable must be 0 or 1\n");
894 }
895
896 valid = 0;
897 }
898
899 if (val == 1 && !(hsotg->hw_params.i2c_enable))
900 valid = 0;
901
902 if (!valid) {
903 if (val >= 0)
904 dev_err(hsotg->dev,
905 "%d invalid for i2c_enable. Check HW configuration.\n",
906 val);
907 val = hsotg->hw_params.i2c_enable;
908 dev_dbg(hsotg->dev, "Setting i2c_enable to %d\n", val);
909 }
910
911 hsotg->params.i2c_enable = val;
912}
913
914static void dwc2_set_param_en_multiple_tx_fifo(struct dwc2_hsotg *hsotg,
915 int val)
916{
917 int valid = 1;
918
919 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
920 if (val >= 0) {
921 dev_err(hsotg->dev,
922 "Wrong value for en_multiple_tx_fifo,\n");
923 dev_err(hsotg->dev,
924 "en_multiple_tx_fifo must be 0 or 1\n");
925 }
926 valid = 0;
927 }
928
929 if (val == 1 && !hsotg->hw_params.en_multiple_tx_fifo)
930 valid = 0;
931
932 if (!valid) {
933 if (val >= 0)
934 dev_err(hsotg->dev,
935 "%d invalid for parameter en_multiple_tx_fifo. Check HW configuration.\n",
936 val);
937 val = hsotg->hw_params.en_multiple_tx_fifo;
938 dev_dbg(hsotg->dev, "Setting en_multiple_tx_fifo to %d\n", val);
939 }
940
941 hsotg->params.en_multiple_tx_fifo = val;
942} 428}
943 429
944static void dwc2_set_param_reload_ctl(struct dwc2_hsotg *hsotg, int val) 430static void dwc2_check_param_tx_fifo_sizes(struct dwc2_hsotg *hsotg)
945{ 431{
946 int valid = 1; 432 int fifo_count;
947 433 int fifo;
948 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) { 434 int min;
949 if (val >= 0) { 435 u32 total = 0;
950 dev_err(hsotg->dev, 436 u32 dptxfszn;
951 "'%d' invalid for parameter reload_ctl\n", val);
952 dev_err(hsotg->dev, "reload_ctl must be 0 or 1\n");
953 }
954 valid = 0;
955 }
956
957 if (val == 1 && hsotg->hw_params.snpsid < DWC2_CORE_REV_2_92a)
958 valid = 0;
959
960 if (!valid) {
961 if (val >= 0)
962 dev_err(hsotg->dev,
963 "%d invalid for parameter reload_ctl. Check HW configuration.\n",
964 val);
965 val = hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_92a;
966 dev_dbg(hsotg->dev, "Setting reload_ctl to %d\n", val);
967 }
968 437
969 hsotg->params.reload_ctl = val; 438 fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
970} 439 min = hsotg->hw_params.en_multiple_tx_fifo ? 16 : 4;
971 440
972static void dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val) 441 for (fifo = 1; fifo <= fifo_count; fifo++)
973{ 442 total += hsotg->params.g_tx_fifo_size[fifo];
974 if (val != -1)
975 hsotg->params.ahbcfg = val;
976 else
977 hsotg->params.ahbcfg = GAHBCFG_HBSTLEN_INCR4 <<
978 GAHBCFG_HBSTLEN_SHIFT;
979}
980 443
981static void dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val) 444 if (total > dwc2_hsotg_tx_fifo_total_depth(hsotg) || !total) {
982{ 445 dev_warn(hsotg->dev, "%s: Invalid parameter g-tx-fifo-size, setting to default average\n",
983 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) { 446 __func__);
984 if (val >= 0) { 447 dwc2_set_param_tx_fifo_sizes(hsotg);
985 dev_err(hsotg->dev,
986 "'%d' invalid for parameter otg_ver\n", val);
987 dev_err(hsotg->dev,
988 "otg_ver must be 0 (for OTG 1.3 support) or 1 (for OTG 2.0 support)\n");
989 }
990 val = 0;
991 dev_dbg(hsotg->dev, "Setting otg_ver to %d\n", val);
992 } 448 }
993 449
994 hsotg->params.otg_ver = val; 450 for (fifo = 1; fifo <= fifo_count; fifo++) {
995} 451 dptxfszn = (dwc2_readl(hsotg->regs + DPTXFSIZN(fifo)) &
452 FIFOSIZE_DEPTH_MASK) >> FIFOSIZE_DEPTH_SHIFT;
996 453
997static void dwc2_set_param_uframe_sched(struct dwc2_hsotg *hsotg, int val) 454 if (hsotg->params.g_tx_fifo_size[fifo] < min ||
998{ 455 hsotg->params.g_tx_fifo_size[fifo] > dptxfszn) {
999 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) { 456 dev_warn(hsotg->dev, "%s: Invalid parameter g_tx_fifo_size[%d]=%d\n",
1000 if (val >= 0) { 457 __func__, fifo,
1001 dev_err(hsotg->dev, 458 hsotg->params.g_tx_fifo_size[fifo]);
1002 "'%d' invalid for parameter uframe_sched\n", 459 hsotg->params.g_tx_fifo_size[fifo] = dptxfszn;
1003 val);
1004 dev_err(hsotg->dev, "uframe_sched must be 0 or 1\n");
1005 } 460 }
1006 val = 1;
1007 dev_dbg(hsotg->dev, "Setting uframe_sched to %d\n", val);
1008 } 461 }
1009
1010 hsotg->params.uframe_sched = val;
1011} 462}
1012 463
1013static void dwc2_set_param_external_id_pin_ctl(struct dwc2_hsotg *hsotg, 464#define CHECK_RANGE(_param, _min, _max, _def) do { \
1014 int val) 465 if ((hsotg->params._param) < (_min) || \
1015{ 466 (hsotg->params._param) > (_max)) { \
1016 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) { 467 dev_warn(hsotg->dev, "%s: Invalid parameter %s=%d\n", \
1017 if (val >= 0) { 468 __func__, #_param, hsotg->params._param); \
1018 dev_err(hsotg->dev, 469 hsotg->params._param = (_def); \
1019 "'%d' invalid for parameter external_id_pin_ctl\n", 470 } \
1020 val); 471 } while (0)
1021 dev_err(hsotg->dev, "external_id_pin_ctl must be 0 or 1\n");
1022 }
1023 val = 0;
1024 dev_dbg(hsotg->dev, "Setting external_id_pin_ctl to %d\n", val);
1025 }
1026 472
1027 hsotg->params.external_id_pin_ctl = val; 473#define CHECK_BOOL(_param, _check) do { \
1028} 474 if (hsotg->params._param && !(_check)) { \
475 dev_warn(hsotg->dev, "%s: Invalid parameter %s=%d\n", \
476 __func__, #_param, hsotg->params._param); \
477 hsotg->params._param = false; \
478 } \
479 } while (0)
1029 480
1030static void dwc2_set_param_hibernation(struct dwc2_hsotg *hsotg, 481static void dwc2_check_params(struct dwc2_hsotg *hsotg)
1031 int val)
1032{
1033 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1034 if (val >= 0) {
1035 dev_err(hsotg->dev,
1036 "'%d' invalid for parameter hibernation\n",
1037 val);
1038 dev_err(hsotg->dev, "hibernation must be 0 or 1\n");
1039 }
1040 val = 0;
1041 dev_dbg(hsotg->dev, "Setting hibernation to %d\n", val);
1042 }
1043
1044 hsotg->params.hibernation = val;
1045}
1046
1047static void dwc2_set_param_tx_fifo_sizes(struct dwc2_hsotg *hsotg)
1048{
1049 int i;
1050 int num;
1051 char *property = "g-tx-fifo-size";
1052 struct dwc2_core_params *p = &hsotg->params;
1053
1054 memset(p->g_tx_fifo_size, 0, sizeof(p->g_tx_fifo_size));
1055
1056 /* Read tx fifo sizes */
1057 num = device_property_read_u32_array(hsotg->dev, property, NULL, 0);
1058
1059 if (num > 0) {
1060 device_property_read_u32_array(hsotg->dev, property,
1061 &p->g_tx_fifo_size[1],
1062 num);
1063 } else {
1064 u32 p_tx_fifo[] = DWC2_G_P_LEGACY_TX_FIFO_SIZE;
1065
1066 memcpy(&p->g_tx_fifo_size[1],
1067 p_tx_fifo,
1068 sizeof(p_tx_fifo));
1069
1070 num = ARRAY_SIZE(p_tx_fifo);
1071 }
1072
1073 for (i = 0; i < num; i++) {
1074 if ((i + 1) >= ARRAY_SIZE(p->g_tx_fifo_size))
1075 break;
1076
1077 dev_dbg(hsotg->dev, "Setting %s[%d] to %d\n",
1078 property, i + 1, p->g_tx_fifo_size[i + 1]);
1079 }
1080}
1081
1082static void dwc2_set_gadget_dma(struct dwc2_hsotg *hsotg)
1083{ 482{
1084 struct dwc2_hw_params *hw = &hsotg->hw_params; 483 struct dwc2_hw_params *hw = &hsotg->hw_params;
1085 struct dwc2_core_params *p = &hsotg->params; 484 struct dwc2_core_params *p = &hsotg->params;
1086 bool dma_capable = !(hw->arch == GHWCFG2_SLAVE_ONLY_ARCH); 485 bool dma_capable = !(hw->arch == GHWCFG2_SLAVE_ONLY_ARCH);
1087 486
1088 /* Buffer DMA */ 487 dwc2_check_param_otg_cap(hsotg);
1089 dwc2_set_param_bool(hsotg, &p->g_dma, 488 dwc2_check_param_phy_type(hsotg);
1090 false, "gadget-dma", 489 dwc2_check_param_speed(hsotg);
1091 dma_capable, false, 490 dwc2_check_param_phy_utmi_width(hsotg);
1092 dma_capable); 491 CHECK_BOOL(enable_dynamic_fifo, hw->enable_dynamic_fifo);
1093 492 CHECK_BOOL(en_multiple_tx_fifo, hw->en_multiple_tx_fifo);
1094 /* DMA Descriptor */ 493 CHECK_BOOL(i2c_enable, hw->i2c_enable);
1095 dwc2_set_param_bool(hsotg, &p->g_dma_desc, false, 494 CHECK_BOOL(reload_ctl, (hsotg->hw_params.snpsid > DWC2_CORE_REV_2_92a));
1096 "gadget-dma-desc", 495 CHECK_RANGE(max_packet_count,
1097 !!hw->dma_desc_enable, false, 496 15, hw->max_packet_count,
1098 !!hw->dma_desc_enable); 497 hw->max_packet_count);
1099} 498 CHECK_RANGE(max_transfer_size,
499 2047, hw->max_transfer_size,
500 hw->max_transfer_size);
1100 501
1101/**
1102 * dwc2_set_parameters() - Set all core parameters.
1103 *
1104 * @hsotg: Programming view of the DWC_otg controller
1105 * @params: The parameters to set
1106 */
1107static void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
1108 const struct dwc2_core_params *params)
1109{
1110 struct dwc2_hw_params *hw = &hsotg->hw_params;
1111 struct dwc2_core_params *p = &hsotg->params;
1112 bool dma_capable = !(hw->arch == GHWCFG2_SLAVE_ONLY_ARCH);
1113
1114 dwc2_set_param_otg_cap(hsotg, params->otg_cap);
1115 if ((hsotg->dr_mode == USB_DR_MODE_HOST) || 502 if ((hsotg->dr_mode == USB_DR_MODE_HOST) ||
1116 (hsotg->dr_mode == USB_DR_MODE_OTG)) { 503 (hsotg->dr_mode == USB_DR_MODE_OTG)) {
1117 dev_dbg(hsotg->dev, "Setting HOST parameters\n"); 504 CHECK_BOOL(host_dma, dma_capable);
1118 505 CHECK_BOOL(dma_desc_enable, p->host_dma);
1119 dwc2_set_param_bool(hsotg, &p->host_dma, 506 CHECK_BOOL(dma_desc_fs_enable, p->dma_desc_enable);
1120 false, "host-dma", 507 CHECK_BOOL(host_ls_low_power_phy_clk,
1121 dma_capable, false, 508 p->phy_type == DWC2_PHY_TYPE_PARAM_FS);
1122 dma_capable); 509 CHECK_RANGE(host_channels,
1123 dwc2_set_param_host_rx_fifo_size(hsotg, 510 1, hw->host_channels,
1124 params->host_rx_fifo_size); 511 hw->host_channels);
1125 dwc2_set_param_host_nperio_tx_fifo_size(hsotg, 512 CHECK_RANGE(host_rx_fifo_size,
1126 params->host_nperio_tx_fifo_size); 513 16, hw->rx_fifo_size,
1127 dwc2_set_param_host_perio_tx_fifo_size(hsotg, 514 hw->rx_fifo_size);
1128 params->host_perio_tx_fifo_size); 515 CHECK_RANGE(host_nperio_tx_fifo_size,
516 16, hw->host_nperio_tx_fifo_size,
517 hw->host_nperio_tx_fifo_size);
518 CHECK_RANGE(host_perio_tx_fifo_size,
519 16, hw->host_perio_tx_fifo_size,
520 hw->host_perio_tx_fifo_size);
1129 } 521 }
1130 dwc2_set_param_dma_desc_enable(hsotg, params->dma_desc_enable);
1131 dwc2_set_param_dma_desc_fs_enable(hsotg, params->dma_desc_fs_enable);
1132
1133 dwc2_set_param_host_support_fs_ls_low_power(hsotg,
1134 params->host_support_fs_ls_low_power);
1135 dwc2_set_param_enable_dynamic_fifo(hsotg,
1136 params->enable_dynamic_fifo);
1137 dwc2_set_param_max_transfer_size(hsotg,
1138 params->max_transfer_size);
1139 dwc2_set_param_max_packet_count(hsotg,
1140 params->max_packet_count);
1141 dwc2_set_param_host_channels(hsotg, params->host_channels);
1142 dwc2_set_param_phy_type(hsotg, params->phy_type);
1143 dwc2_set_param_speed(hsotg, params->speed);
1144 dwc2_set_param_host_ls_low_power_phy_clk(hsotg,
1145 params->host_ls_low_power_phy_clk);
1146 dwc2_set_param_phy_ulpi_ddr(hsotg, params->phy_ulpi_ddr);
1147 dwc2_set_param_phy_ulpi_ext_vbus(hsotg,
1148 params->phy_ulpi_ext_vbus);
1149 dwc2_set_param_phy_utmi_width(hsotg, params->phy_utmi_width);
1150 dwc2_set_param_ulpi_fs_ls(hsotg, params->ulpi_fs_ls);
1151 dwc2_set_param_ts_dline(hsotg, params->ts_dline);
1152 dwc2_set_param_i2c_enable(hsotg, params->i2c_enable);
1153 dwc2_set_param_en_multiple_tx_fifo(hsotg,
1154 params->en_multiple_tx_fifo);
1155 dwc2_set_param_reload_ctl(hsotg, params->reload_ctl);
1156 dwc2_set_param_ahbcfg(hsotg, params->ahbcfg);
1157 dwc2_set_param_otg_ver(hsotg, params->otg_ver);
1158 dwc2_set_param_uframe_sched(hsotg, params->uframe_sched);
1159 dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl);
1160 dwc2_set_param_hibernation(hsotg, params->hibernation);
1161 522
1162 /*
1163 * Set devicetree-only parameters. These parameters do not
1164 * take any values from @params.
1165 */
1166 if ((hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) || 523 if ((hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) ||
1167 (hsotg->dr_mode == USB_DR_MODE_OTG)) { 524 (hsotg->dr_mode == USB_DR_MODE_OTG)) {
1168 dev_dbg(hsotg->dev, "Setting peripheral device properties\n"); 525 CHECK_BOOL(g_dma, dma_capable);
1169 526 CHECK_BOOL(g_dma_desc, (p->g_dma && hw->dma_desc_enable));
1170 dwc2_set_gadget_dma(hsotg); 527 CHECK_RANGE(g_rx_fifo_size,
1171 528 16, hw->rx_fifo_size,
1172 /* 529 hw->rx_fifo_size);
1173 * The values for g_rx_fifo_size (2048) and 530 CHECK_RANGE(g_np_tx_fifo_size,
1174 * g_np_tx_fifo_size (1024) come from the legacy s3c 531 16, hw->dev_nperio_tx_fifo_size,
1175 * gadget driver. These defaults have been hard-coded 532 hw->dev_nperio_tx_fifo_size);
1176 * for some time so many platforms depend on these 533 dwc2_check_param_tx_fifo_sizes(hsotg);
1177 * values. Leave them as defaults for now and only
1178 * auto-detect if the hardware does not support the
1179 * default.
1180 */
1181 dwc2_set_param_u32(hsotg, &p->g_rx_fifo_size,
1182 true, "g-rx-fifo-size", 2048,
1183 hw->rx_fifo_size,
1184 16, hw->rx_fifo_size);
1185
1186 dwc2_set_param_u32(hsotg, &p->g_np_tx_fifo_size,
1187 true, "g-np-tx-fifo-size", 1024,
1188 hw->dev_nperio_tx_fifo_size,
1189 16, hw->dev_nperio_tx_fifo_size);
1190
1191 dwc2_set_param_tx_fifo_sizes(hsotg);
1192 } 534 }
1193} 535}
1194 536
@@ -1211,8 +553,6 @@ static void dwc2_get_host_hwparams(struct dwc2_hsotg *hsotg)
1211 553
1212 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ); 554 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
1213 hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ); 555 hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ);
1214 dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
1215 dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz);
1216 556
1217 if (forced) 557 if (forced)
1218 dwc2_clear_force_mode(hsotg); 558 dwc2_clear_force_mode(hsotg);
@@ -1240,7 +580,6 @@ static void dwc2_get_dev_hwparams(struct dwc2_hsotg *hsotg)
1240 forced = dwc2_force_mode_if_needed(hsotg, false); 580 forced = dwc2_force_mode_if_needed(hsotg, false);
1241 581
1242 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ); 582 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
1243 dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
1244 583
1245 if (forced) 584 if (forced)
1246 dwc2_clear_force_mode(hsotg); 585 dwc2_clear_force_mode(hsotg);
@@ -1286,12 +625,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
1286 hwcfg4 = dwc2_readl(hsotg->regs + GHWCFG4); 625 hwcfg4 = dwc2_readl(hsotg->regs + GHWCFG4);
1287 grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ); 626 grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ);
1288 627
1289 dev_dbg(hsotg->dev, "hwcfg1=%08x\n", hwcfg1);
1290 dev_dbg(hsotg->dev, "hwcfg2=%08x\n", hwcfg2);
1291 dev_dbg(hsotg->dev, "hwcfg3=%08x\n", hwcfg3);
1292 dev_dbg(hsotg->dev, "hwcfg4=%08x\n", hwcfg4);
1293 dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz);
1294
1295 /* 628 /*
1296 * Host specific hardware parameters. Reading these parameters 629 * Host specific hardware parameters. Reading these parameters
1297 * requires the controller to be in host mode. The mode will 630 * requires the controller to be in host mode. The mode will
@@ -1351,73 +684,24 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
1351 hw->rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >> 684 hw->rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >>
1352 GRXFSIZ_DEPTH_SHIFT; 685 GRXFSIZ_DEPTH_SHIFT;
1353 686
1354 dev_dbg(hsotg->dev, "Detected values from hardware:\n");
1355 dev_dbg(hsotg->dev, " op_mode=%d\n",
1356 hw->op_mode);
1357 dev_dbg(hsotg->dev, " arch=%d\n",
1358 hw->arch);
1359 dev_dbg(hsotg->dev, " dma_desc_enable=%d\n",
1360 hw->dma_desc_enable);
1361 dev_dbg(hsotg->dev, " power_optimized=%d\n",
1362 hw->power_optimized);
1363 dev_dbg(hsotg->dev, " i2c_enable=%d\n",
1364 hw->i2c_enable);
1365 dev_dbg(hsotg->dev, " hs_phy_type=%d\n",
1366 hw->hs_phy_type);
1367 dev_dbg(hsotg->dev, " fs_phy_type=%d\n",
1368 hw->fs_phy_type);
1369 dev_dbg(hsotg->dev, " utmi_phy_data_width=%d\n",
1370 hw->utmi_phy_data_width);
1371 dev_dbg(hsotg->dev, " num_dev_ep=%d\n",
1372 hw->num_dev_ep);
1373 dev_dbg(hsotg->dev, " num_dev_perio_in_ep=%d\n",
1374 hw->num_dev_perio_in_ep);
1375 dev_dbg(hsotg->dev, " host_channels=%d\n",
1376 hw->host_channels);
1377 dev_dbg(hsotg->dev, " max_transfer_size=%d\n",
1378 hw->max_transfer_size);
1379 dev_dbg(hsotg->dev, " max_packet_count=%d\n",
1380 hw->max_packet_count);
1381 dev_dbg(hsotg->dev, " nperio_tx_q_depth=0x%0x\n",
1382 hw->nperio_tx_q_depth);
1383 dev_dbg(hsotg->dev, " host_perio_tx_q_depth=0x%0x\n",
1384 hw->host_perio_tx_q_depth);
1385 dev_dbg(hsotg->dev, " dev_token_q_depth=0x%0x\n",
1386 hw->dev_token_q_depth);
1387 dev_dbg(hsotg->dev, " enable_dynamic_fifo=%d\n",
1388 hw->enable_dynamic_fifo);
1389 dev_dbg(hsotg->dev, " en_multiple_tx_fifo=%d\n",
1390 hw->en_multiple_tx_fifo);
1391 dev_dbg(hsotg->dev, " total_fifo_size=%d\n",
1392 hw->total_fifo_size);
1393 dev_dbg(hsotg->dev, " rx_fifo_size=%d\n",
1394 hw->rx_fifo_size);
1395 dev_dbg(hsotg->dev, " host_nperio_tx_fifo_size=%d\n",
1396 hw->host_nperio_tx_fifo_size);
1397 dev_dbg(hsotg->dev, " host_perio_tx_fifo_size=%d\n",
1398 hw->host_perio_tx_fifo_size);
1399 dev_dbg(hsotg->dev, "\n");
1400
1401 return 0; 687 return 0;
1402} 688}
1403 689
1404int dwc2_init_params(struct dwc2_hsotg *hsotg) 690int dwc2_init_params(struct dwc2_hsotg *hsotg)
1405{ 691{
1406 const struct of_device_id *match; 692 const struct of_device_id *match;
1407 struct dwc2_core_params params; 693 void (*set_params)(void *data);
694
695 dwc2_set_default_params(hsotg);
696 dwc2_get_device_properties(hsotg);
1408 697
1409 match = of_match_device(dwc2_of_match_table, hsotg->dev); 698 match = of_match_device(dwc2_of_match_table, hsotg->dev);
1410 if (match && match->data) 699 if (match && match->data) {
1411 params = *((struct dwc2_core_params *)match->data); 700 set_params = match->data;
1412 else 701 set_params(hsotg);
1413 params = params_default;
1414
1415 if (dwc2_is_fs_iot(hsotg)) {
1416 params.speed = DWC2_SPEED_PARAM_FULL;
1417 params.phy_type = DWC2_PHY_TYPE_PARAM_FS;
1418 } 702 }
1419 703
1420 dwc2_set_parameters(hsotg, &params); 704 dwc2_check_params(hsotg);
1421 705
1422 return 0; 706 return 0;
1423} 707}
diff --git a/drivers/usb/dwc2/pci.c b/drivers/usb/dwc2/pci.c
index a23329e3d7cd..fdeb8c7bf30a 100644
--- a/drivers/usb/dwc2/pci.c
+++ b/drivers/usb/dwc2/pci.c
@@ -87,7 +87,7 @@ static void dwc2_pci_remove(struct pci_dev *pci)
87} 87}
88 88
89static int dwc2_pci_probe(struct pci_dev *pci, 89static int dwc2_pci_probe(struct pci_dev *pci,
90 const struct pci_device_id *id) 90 const struct pci_device_id *id)
91{ 91{
92 struct resource res[2]; 92 struct resource res[2];
93 struct platform_device *dwc2; 93 struct platform_device *dwc2;
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 4fc8c603afb8..9564bc76c56f 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -111,7 +111,7 @@ static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
111 111
112 if (mode != hsotg->dr_mode) { 112 if (mode != hsotg->dr_mode) {
113 dev_warn(hsotg->dev, 113 dev_warn(hsotg->dev,
114 "Configuration mismatch. dr_mode forced to %s\n", 114 "Configuration mismatch. dr_mode forced to %s\n",
115 mode == USB_DR_MODE_HOST ? "host" : "device"); 115 mode == USB_DR_MODE_HOST ? "host" : "device");
116 116
117 hsotg->dr_mode = mode; 117 hsotg->dr_mode = mode;
@@ -136,11 +136,11 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
136 return ret; 136 return ret;
137 } 137 }
138 138
139 if (hsotg->uphy) 139 if (hsotg->uphy) {
140 ret = usb_phy_init(hsotg->uphy); 140 ret = usb_phy_init(hsotg->uphy);
141 else if (hsotg->plat && hsotg->plat->phy_init) 141 } else if (hsotg->plat && hsotg->plat->phy_init) {
142 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); 142 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
143 else { 143 } else {
144 ret = phy_power_on(hsotg->phy); 144 ret = phy_power_on(hsotg->phy);
145 if (ret == 0) 145 if (ret == 0)
146 ret = phy_init(hsotg->phy); 146 ret = phy_init(hsotg->phy);
@@ -170,11 +170,11 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
170 struct platform_device *pdev = to_platform_device(hsotg->dev); 170 struct platform_device *pdev = to_platform_device(hsotg->dev);
171 int ret = 0; 171 int ret = 0;
172 172
173 if (hsotg->uphy) 173 if (hsotg->uphy) {
174 usb_phy_shutdown(hsotg->uphy); 174 usb_phy_shutdown(hsotg->uphy);
175 else if (hsotg->plat && hsotg->plat->phy_exit) 175 } else if (hsotg->plat && hsotg->plat->phy_exit) {
176 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type); 176 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
177 else { 177 } else {
178 ret = phy_exit(hsotg->phy); 178 ret = phy_exit(hsotg->phy);
179 if (ret == 0) 179 if (ret == 0)
180 ret = phy_power_off(hsotg->phy); 180 ret = phy_power_off(hsotg->phy);
@@ -445,7 +445,7 @@ static int dwc2_driver_probe(struct platform_device *dev)
445 } 445 }
446 446
447 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 447 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
448 retval = dwc2_hcd_init(hsotg, hsotg->irq); 448 retval = dwc2_hcd_init(hsotg);
449 if (retval) { 449 if (retval) {
450 if (hsotg->gadget_enabled) 450 if (hsotg->gadget_enabled)
451 dwc2_hsotg_remove(hsotg); 451 dwc2_hsotg_remove(hsotg);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 14b760209680..2b9e4ca3c932 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -40,6 +40,7 @@
40/* Global constants */ 40/* Global constants */
41#define DWC3_PULL_UP_TIMEOUT 500 /* ms */ 41#define DWC3_PULL_UP_TIMEOUT 500 /* ms */
42#define DWC3_ZLP_BUF_SIZE 1024 /* size of a superspeed bulk */ 42#define DWC3_ZLP_BUF_SIZE 1024 /* size of a superspeed bulk */
43#define DWC3_BOUNCE_SIZE 1024 /* size of a superspeed bulk */
43#define DWC3_EP0_BOUNCE_SIZE 512 44#define DWC3_EP0_BOUNCE_SIZE 512
44#define DWC3_ENDPOINTS_NUM 32 45#define DWC3_ENDPOINTS_NUM 32
45#define DWC3_XHCI_RESOURCES_NUM 2 46#define DWC3_XHCI_RESOURCES_NUM 2
@@ -724,6 +725,7 @@ struct dwc3_hwparams {
724 * @epnum: endpoint number to which this request refers 725 * @epnum: endpoint number to which this request refers
725 * @trb: pointer to struct dwc3_trb 726 * @trb: pointer to struct dwc3_trb
726 * @trb_dma: DMA address of @trb 727 * @trb_dma: DMA address of @trb
728 * @unaligned: true for OUT endpoints with length not divisible by maxp
727 * @direction: IN or OUT direction flag 729 * @direction: IN or OUT direction flag
728 * @mapped: true when request has been dma-mapped 730 * @mapped: true when request has been dma-mapped
729 * @queued: true when request has been queued to HW 731 * @queued: true when request has been queued to HW
@@ -740,6 +742,7 @@ struct dwc3_request {
740 struct dwc3_trb *trb; 742 struct dwc3_trb *trb;
741 dma_addr_t trb_dma; 743 dma_addr_t trb_dma;
742 744
745 unsigned unaligned:1;
743 unsigned direction:1; 746 unsigned direction:1;
744 unsigned mapped:1; 747 unsigned mapped:1;
745 unsigned started:1; 748 unsigned started:1;
@@ -857,12 +860,14 @@ struct dwc3_scratchpad_array {
857struct dwc3 { 860struct dwc3 {
858 struct usb_ctrlrequest *ctrl_req; 861 struct usb_ctrlrequest *ctrl_req;
859 struct dwc3_trb *ep0_trb; 862 struct dwc3_trb *ep0_trb;
863 void *bounce;
860 void *ep0_bounce; 864 void *ep0_bounce;
861 void *zlp_buf; 865 void *zlp_buf;
862 void *scratchbuf; 866 void *scratchbuf;
863 u8 *setup_buf; 867 u8 *setup_buf;
864 dma_addr_t ctrl_req_addr; 868 dma_addr_t ctrl_req_addr;
865 dma_addr_t ep0_trb_addr; 869 dma_addr_t ep0_trb_addr;
870 dma_addr_t bounce_addr;
866 dma_addr_t ep0_bounce_addr; 871 dma_addr_t ep0_bounce_addr;
867 dma_addr_t scratch_addr; 872 dma_addr_t scratch_addr;
868 struct dwc3_request ep0_usb_req; 873 struct dwc3_request ep0_usb_req;
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index e956306d9b0f..1515d45ebcec 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -128,10 +128,8 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
128 clk_prepare_enable(exynos->clk); 128 clk_prepare_enable(exynos->clk);
129 129
130 exynos->susp_clk = devm_clk_get(dev, "usbdrd30_susp_clk"); 130 exynos->susp_clk = devm_clk_get(dev, "usbdrd30_susp_clk");
131 if (IS_ERR(exynos->susp_clk)) { 131 if (IS_ERR(exynos->susp_clk))
132 dev_info(dev, "no suspend clk specified\n");
133 exynos->susp_clk = NULL; 132 exynos->susp_clk = NULL;
134 }
135 clk_prepare_enable(exynos->susp_clk); 133 clk_prepare_enable(exynos->susp_clk);
136 134
137 if (of_device_is_compatible(node, "samsung,exynos7-dwusb3")) { 135 if (of_device_is_compatible(node, "samsung,exynos7-dwusb3")) {
@@ -290,7 +288,6 @@ static struct platform_driver dwc3_exynos_driver = {
290 288
291module_platform_driver(dwc3_exynos_driver); 289module_platform_driver(dwc3_exynos_driver);
292 290
293MODULE_ALIAS("platform:exynos-dwc3");
294MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>"); 291MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
295MODULE_LICENSE("GPL v2"); 292MODULE_LICENSE("GPL v2");
296MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer"); 293MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index eb1b9cb3f9d1..2092e46b1380 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -426,20 +426,20 @@ static int dwc3_omap_extcon_register(struct dwc3_omap *omap)
426 } 426 }
427 427
428 omap->vbus_nb.notifier_call = dwc3_omap_vbus_notifier; 428 omap->vbus_nb.notifier_call = dwc3_omap_vbus_notifier;
429 ret = extcon_register_notifier(edev, EXTCON_USB, 429 ret = devm_extcon_register_notifier(omap->dev, edev,
430 &omap->vbus_nb); 430 EXTCON_USB, &omap->vbus_nb);
431 if (ret < 0) 431 if (ret < 0)
432 dev_vdbg(omap->dev, "failed to register notifier for USB\n"); 432 dev_vdbg(omap->dev, "failed to register notifier for USB\n");
433 433
434 omap->id_nb.notifier_call = dwc3_omap_id_notifier; 434 omap->id_nb.notifier_call = dwc3_omap_id_notifier;
435 ret = extcon_register_notifier(edev, EXTCON_USB_HOST, 435 ret = devm_extcon_register_notifier(omap->dev, edev,
436 &omap->id_nb); 436 EXTCON_USB_HOST, &omap->id_nb);
437 if (ret < 0) 437 if (ret < 0)
438 dev_vdbg(omap->dev, "failed to register notifier for USB-HOST\n"); 438 dev_vdbg(omap->dev, "failed to register notifier for USB-HOST\n");
439 439
440 if (extcon_get_cable_state_(edev, EXTCON_USB) == true) 440 if (extcon_get_state(edev, EXTCON_USB) == true)
441 dwc3_omap_set_mailbox(omap, OMAP_DWC3_VBUS_VALID); 441 dwc3_omap_set_mailbox(omap, OMAP_DWC3_VBUS_VALID);
442 if (extcon_get_cable_state_(edev, EXTCON_USB_HOST) == true) 442 if (extcon_get_state(edev, EXTCON_USB_HOST) == true)
443 dwc3_omap_set_mailbox(omap, OMAP_DWC3_ID_GROUND); 443 dwc3_omap_set_mailbox(omap, OMAP_DWC3_ID_GROUND);
444 444
445 omap->edev = edev; 445 omap->edev = edev;
@@ -528,17 +528,13 @@ static int dwc3_omap_probe(struct platform_device *pdev)
528 ret = of_platform_populate(node, NULL, NULL, dev); 528 ret = of_platform_populate(node, NULL, NULL, dev);
529 if (ret) { 529 if (ret) {
530 dev_err(&pdev->dev, "failed to create dwc3 core\n"); 530 dev_err(&pdev->dev, "failed to create dwc3 core\n");
531 goto err2; 531 goto err1;
532 } 532 }
533 533
534 dwc3_omap_enable_irqs(omap); 534 dwc3_omap_enable_irqs(omap);
535 enable_irq(omap->irq); 535 enable_irq(omap->irq);
536 return 0; 536 return 0;
537 537
538err2:
539 extcon_unregister_notifier(omap->edev, EXTCON_USB, &omap->vbus_nb);
540 extcon_unregister_notifier(omap->edev, EXTCON_USB_HOST, &omap->id_nb);
541
542err1: 538err1:
543 pm_runtime_put_sync(dev); 539 pm_runtime_put_sync(dev);
544 pm_runtime_disable(dev); 540 pm_runtime_disable(dev);
@@ -550,8 +546,6 @@ static int dwc3_omap_remove(struct platform_device *pdev)
550{ 546{
551 struct dwc3_omap *omap = platform_get_drvdata(pdev); 547 struct dwc3_omap *omap = platform_get_drvdata(pdev);
552 548
553 extcon_unregister_notifier(omap->edev, EXTCON_USB, &omap->vbus_nb);
554 extcon_unregister_notifier(omap->edev, EXTCON_USB_HOST, &omap->id_nb);
555 dwc3_omap_disable_irqs(omap); 549 dwc3_omap_disable_irqs(omap);
556 disable_irq(omap->irq); 550 disable_irq(omap->irq);
557 of_platform_depopulate(omap->dev); 551 of_platform_depopulate(omap->dev);
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 9bb1f8526f3e..e689cede9b0e 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -1123,7 +1123,21 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
1123 dwc->ep0state = EP0_STATUS_PHASE; 1123 dwc->ep0state = EP0_STATUS_PHASE;
1124 1124
1125 if (dwc->delayed_status) { 1125 if (dwc->delayed_status) {
1126 struct dwc3_ep *dep = dwc->eps[0];
1127
1126 WARN_ON_ONCE(event->endpoint_number != 1); 1128 WARN_ON_ONCE(event->endpoint_number != 1);
1129 /*
1130 * We should handle the delay STATUS phase here if the
1131 * request for handling delay STATUS has been queued
1132 * into the list.
1133 */
1134 if (!list_empty(&dep->pending_list)) {
1135 dwc->delayed_status = false;
1136 usb_gadget_set_state(&dwc->gadget,
1137 USB_STATE_CONFIGURED);
1138 dwc3_ep0_do_control_status(dwc, event);
1139 }
1140
1127 return; 1141 return;
1128 } 1142 }
1129 1143
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 204c754cc647..4db97ecae885 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -833,29 +833,14 @@ static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
833 833
834static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep); 834static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep);
835 835
836/** 836static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb,
837 * dwc3_prepare_one_trb - setup one TRB from one request 837 dma_addr_t dma, unsigned length, unsigned chain, unsigned node,
838 * @dep: endpoint for which this request is prepared 838 unsigned stream_id, unsigned short_not_ok, unsigned no_interrupt)
839 * @req: dwc3_request pointer
840 */
841static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
842 struct dwc3_request *req, dma_addr_t dma,
843 unsigned length, unsigned chain, unsigned node)
844{ 839{
845 struct dwc3_trb *trb;
846 struct dwc3 *dwc = dep->dwc; 840 struct dwc3 *dwc = dep->dwc;
847 struct usb_gadget *gadget = &dwc->gadget; 841 struct usb_gadget *gadget = &dwc->gadget;
848 enum usb_device_speed speed = gadget->speed; 842 enum usb_device_speed speed = gadget->speed;
849 843
850 trb = &dep->trb_pool[dep->trb_enqueue];
851
852 if (!req->trb) {
853 dwc3_gadget_move_started_request(req);
854 req->trb = trb;
855 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
856 dep->queued_requests++;
857 }
858
859 dwc3_ep_inc_enq(dep); 844 dwc3_ep_inc_enq(dep);
860 845
861 trb->size = DWC3_TRB_SIZE_LENGTH(length); 846 trb->size = DWC3_TRB_SIZE_LENGTH(length);
@@ -900,11 +885,11 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
900 if (usb_endpoint_dir_out(dep->endpoint.desc)) { 885 if (usb_endpoint_dir_out(dep->endpoint.desc)) {
901 trb->ctrl |= DWC3_TRB_CTRL_CSP; 886 trb->ctrl |= DWC3_TRB_CTRL_CSP;
902 887
903 if (req->request.short_not_ok) 888 if (short_not_ok)
904 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI; 889 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
905 } 890 }
906 891
907 if ((!req->request.no_interrupt && !chain) || 892 if ((!no_interrupt && !chain) ||
908 (dwc3_calc_trbs_left(dep) == 0)) 893 (dwc3_calc_trbs_left(dep) == 0))
909 trb->ctrl |= DWC3_TRB_CTRL_IOC; 894 trb->ctrl |= DWC3_TRB_CTRL_IOC;
910 895
@@ -912,7 +897,7 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
912 trb->ctrl |= DWC3_TRB_CTRL_CHN; 897 trb->ctrl |= DWC3_TRB_CTRL_CHN;
913 898
914 if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable) 899 if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable)
915 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(req->request.stream_id); 900 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(stream_id);
916 901
917 trb->ctrl |= DWC3_TRB_CTRL_HWO; 902 trb->ctrl |= DWC3_TRB_CTRL_HWO;
918 903
@@ -920,6 +905,36 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
920} 905}
921 906
922/** 907/**
908 * dwc3_prepare_one_trb - setup one TRB from one request
909 * @dep: endpoint for which this request is prepared
910 * @req: dwc3_request pointer
911 * @chain: should this TRB be chained to the next?
912 * @node: only for isochronous endpoints. First TRB needs different type.
913 */
914static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
915 struct dwc3_request *req, unsigned chain, unsigned node)
916{
917 struct dwc3_trb *trb;
918 unsigned length = req->request.length;
919 unsigned stream_id = req->request.stream_id;
920 unsigned short_not_ok = req->request.short_not_ok;
921 unsigned no_interrupt = req->request.no_interrupt;
922 dma_addr_t dma = req->request.dma;
923
924 trb = &dep->trb_pool[dep->trb_enqueue];
925
926 if (!req->trb) {
927 dwc3_gadget_move_started_request(req);
928 req->trb = trb;
929 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
930 dep->queued_requests++;
931 }
932
933 __dwc3_prepare_one_trb(dep, trb, dma, length, chain, node,
934 stream_id, short_not_ok, no_interrupt);
935}
936
937/**
923 * dwc3_ep_prev_trb() - Returns the previous TRB in the ring 938 * dwc3_ep_prev_trb() - Returns the previous TRB in the ring
924 * @dep: The endpoint with the TRB ring 939 * @dep: The endpoint with the TRB ring
925 * @index: The index of the current TRB in the ring 940 * @index: The index of the current TRB in the ring
@@ -974,21 +989,36 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep,
974{ 989{
975 struct scatterlist *sg = req->sg; 990 struct scatterlist *sg = req->sg;
976 struct scatterlist *s; 991 struct scatterlist *s;
977 unsigned int length;
978 dma_addr_t dma;
979 int i; 992 int i;
980 993
981 for_each_sg(sg, s, req->num_pending_sgs, i) { 994 for_each_sg(sg, s, req->num_pending_sgs, i) {
995 unsigned int length = req->request.length;
996 unsigned int maxp = usb_endpoint_maxp(dep->endpoint.desc);
997 unsigned int rem = length % maxp;
982 unsigned chain = true; 998 unsigned chain = true;
983 999
984 length = sg_dma_len(s);
985 dma = sg_dma_address(s);
986
987 if (sg_is_last(s)) 1000 if (sg_is_last(s))
988 chain = false; 1001 chain = false;
989 1002
990 dwc3_prepare_one_trb(dep, req, dma, length, 1003 if (rem && usb_endpoint_dir_out(dep->endpoint.desc) && !chain) {
991 chain, i); 1004 struct dwc3 *dwc = dep->dwc;
1005 struct dwc3_trb *trb;
1006
1007 req->unaligned = true;
1008
1009 /* prepare normal TRB */
1010 dwc3_prepare_one_trb(dep, req, true, i);
1011
1012 /* Now prepare one extra TRB to align transfer size */
1013 trb = &dep->trb_pool[dep->trb_enqueue];
1014 __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr,
1015 maxp - rem, false, 0,
1016 req->request.stream_id,
1017 req->request.short_not_ok,
1018 req->request.no_interrupt);
1019 } else {
1020 dwc3_prepare_one_trb(dep, req, chain, i);
1021 }
992 1022
993 if (!dwc3_calc_trbs_left(dep)) 1023 if (!dwc3_calc_trbs_left(dep))
994 break; 1024 break;
@@ -998,14 +1028,28 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep,
998static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep, 1028static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep,
999 struct dwc3_request *req) 1029 struct dwc3_request *req)
1000{ 1030{
1001 unsigned int length; 1031 unsigned int length = req->request.length;
1002 dma_addr_t dma; 1032 unsigned int maxp = usb_endpoint_maxp(dep->endpoint.desc);
1033 unsigned int rem = length % maxp;
1034
1035 if (rem && usb_endpoint_dir_out(dep->endpoint.desc)) {
1036 struct dwc3 *dwc = dep->dwc;
1037 struct dwc3_trb *trb;
1003 1038
1004 dma = req->request.dma; 1039 req->unaligned = true;
1005 length = req->request.length;
1006 1040
1007 dwc3_prepare_one_trb(dep, req, dma, length, 1041 /* prepare normal TRB */
1008 false, 0); 1042 dwc3_prepare_one_trb(dep, req, true, 0);
1043
1044 /* Now prepare one extra TRB to align transfer size */
1045 trb = &dep->trb_pool[dep->trb_enqueue];
1046 __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, maxp - rem,
1047 false, 0, req->request.stream_id,
1048 req->request.short_not_ok,
1049 req->request.no_interrupt);
1050 } else {
1051 dwc3_prepare_one_trb(dep, req, false, 0);
1052 }
1009} 1053}
1010 1054
1011/* 1055/*
@@ -1335,6 +1379,9 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)
1335 unsigned transfer_in_flight; 1379 unsigned transfer_in_flight;
1336 unsigned started; 1380 unsigned started;
1337 1381
1382 if (dep->flags & DWC3_EP_STALL)
1383 return 0;
1384
1338 if (dep->number > 1) 1385 if (dep->number > 1)
1339 trb = dwc3_ep_prev_trb(dep, dep->trb_enqueue); 1386 trb = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
1340 else 1387 else
@@ -1356,6 +1403,8 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)
1356 else 1403 else
1357 dep->flags |= DWC3_EP_STALL; 1404 dep->flags |= DWC3_EP_STALL;
1358 } else { 1405 } else {
1406 if (!(dep->flags & DWC3_EP_STALL))
1407 return 0;
1359 1408
1360 ret = dwc3_send_clear_stall_ep_cmd(dep); 1409 ret = dwc3_send_clear_stall_ep_cmd(dep);
1361 if (ret) 1410 if (ret)
@@ -1918,6 +1967,44 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
1918 dep->endpoint.ops = &dwc3_gadget_ep0_ops; 1967 dep->endpoint.ops = &dwc3_gadget_ep0_ops;
1919 if (!epnum) 1968 if (!epnum)
1920 dwc->gadget.ep0 = &dep->endpoint; 1969 dwc->gadget.ep0 = &dep->endpoint;
1970 } else if (direction) {
1971 int mdwidth;
1972 int size;
1973 int ret;
1974 int num;
1975
1976 mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
1977 /* MDWIDTH is represented in bits, we need it in bytes */
1978 mdwidth /= 8;
1979
1980 size = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(i));
1981 size = DWC3_GTXFIFOSIZ_TXFDEF(size);
1982
1983 /* FIFO Depth is in MDWDITH bytes. Multiply */
1984 size *= mdwidth;
1985
1986 num = size / 1024;
1987 if (num == 0)
1988 num = 1;
1989
1990 /*
1991 * FIFO sizes account an extra MDWIDTH * (num + 1) bytes for
1992 * internal overhead. We don't really know how these are used,
1993 * but documentation say it exists.
1994 */
1995 size -= mdwidth * (num + 1);
1996 size /= num;
1997
1998 usb_ep_set_maxpacket_limit(&dep->endpoint, size);
1999
2000 dep->endpoint.max_streams = 15;
2001 dep->endpoint.ops = &dwc3_gadget_ep_ops;
2002 list_add_tail(&dep->endpoint.ep_list,
2003 &dwc->gadget.ep_list);
2004
2005 ret = dwc3_alloc_trb_pool(dep);
2006 if (ret)
2007 return ret;
1921 } else { 2008 } else {
1922 int ret; 2009 int ret;
1923 2010
@@ -2029,6 +2116,16 @@ static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
2029 if (chain && (trb->ctrl & DWC3_TRB_CTRL_HWO)) 2116 if (chain && (trb->ctrl & DWC3_TRB_CTRL_HWO))
2030 trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 2117 trb->ctrl &= ~DWC3_TRB_CTRL_HWO;
2031 2118
2119 /*
2120 * If we're dealing with unaligned size OUT transfer, we will be left
2121 * with one TRB pending in the ring. We need to manually clear HWO bit
2122 * from that TRB.
2123 */
2124 if (req->unaligned && (trb->ctrl & DWC3_TRB_CTRL_HWO)) {
2125 trb->ctrl &= ~DWC3_TRB_CTRL_HWO;
2126 return 1;
2127 }
2128
2032 if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN) 2129 if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
2033 return 1; 2130 return 1;
2034 2131
@@ -2118,6 +2215,13 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
2118 event, status, chain); 2215 event, status, chain);
2119 } 2216 }
2120 2217
2218 if (req->unaligned) {
2219 trb = &dep->trb_pool[dep->trb_dequeue];
2220 ret = __dwc3_cleanup_done_trbs(dwc, dep, req, trb,
2221 event, status, false);
2222 req->unaligned = false;
2223 }
2224
2121 req->request.actual = length - req->remaining; 2225 req->request.actual = length - req->remaining;
2122 2226
2123 if ((req->request.actual < length) && req->num_pending_sgs) 2227 if ((req->request.actual < length) && req->num_pending_sgs)
@@ -3019,6 +3123,13 @@ int dwc3_gadget_init(struct dwc3 *dwc)
3019 goto err4; 3123 goto err4;
3020 } 3124 }
3021 3125
3126 dwc->bounce = dma_alloc_coherent(dwc->sysdev, DWC3_BOUNCE_SIZE,
3127 &dwc->bounce_addr, GFP_KERNEL);
3128 if (!dwc->bounce) {
3129 ret = -ENOMEM;
3130 goto err5;
3131 }
3132
3022 init_completion(&dwc->ep0_in_setup); 3133 init_completion(&dwc->ep0_in_setup);
3023 3134
3024 dwc->gadget.ops = &dwc3_gadget_ops; 3135 dwc->gadget.ops = &dwc3_gadget_ops;
@@ -3050,27 +3161,24 @@ int dwc3_gadget_init(struct dwc3 *dwc)
3050 dwc->gadget.max_speed = dwc->maximum_speed; 3161 dwc->gadget.max_speed = dwc->maximum_speed;
3051 3162
3052 /* 3163 /*
3053 * Per databook, DWC3 needs buffer size to be aligned to MaxPacketSize
3054 * on ep out.
3055 */
3056 dwc->gadget.quirk_ep_out_aligned_size = true;
3057
3058 /*
3059 * REVISIT: Here we should clear all pending IRQs to be 3164 * REVISIT: Here we should clear all pending IRQs to be
3060 * sure we're starting from a well known location. 3165 * sure we're starting from a well known location.
3061 */ 3166 */
3062 3167
3063 ret = dwc3_gadget_init_endpoints(dwc); 3168 ret = dwc3_gadget_init_endpoints(dwc);
3064 if (ret) 3169 if (ret)
3065 goto err5; 3170 goto err6;
3066 3171
3067 ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget); 3172 ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
3068 if (ret) { 3173 if (ret) {
3069 dev_err(dwc->dev, "failed to register udc\n"); 3174 dev_err(dwc->dev, "failed to register udc\n");
3070 goto err5; 3175 goto err6;
3071 } 3176 }
3072 3177
3073 return 0; 3178 return 0;
3179err6:
3180 dma_free_coherent(dwc->sysdev, DWC3_BOUNCE_SIZE, dwc->bounce,
3181 dwc->bounce_addr);
3074 3182
3075err5: 3183err5:
3076 kfree(dwc->zlp_buf); 3184 kfree(dwc->zlp_buf);
@@ -3103,6 +3211,8 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
3103 3211
3104 dwc3_gadget_free_endpoints(dwc); 3212 dwc3_gadget_free_endpoints(dwc);
3105 3213
3214 dma_free_coherent(dwc->sysdev, DWC3_BOUNCE_SIZE, dwc->bounce,
3215 dwc->bounce_addr);
3106 dma_free_coherent(dwc->sysdev, DWC3_EP0_BOUNCE_SIZE, 3216 dma_free_coherent(dwc->sysdev, DWC3_EP0_BOUNCE_SIZE,
3107 dwc->ep0_bounce, dwc->ep0_bounce_addr); 3217 dwc->ep0_bounce, dwc->ep0_bounce_addr);
3108 3218
diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
index 487f0ff6ae25..76f0b0df37c1 100644
--- a/drivers/usb/dwc3/host.c
+++ b/drivers/usb/dwc3/host.c
@@ -54,11 +54,12 @@ out:
54 54
55int dwc3_host_init(struct dwc3 *dwc) 55int dwc3_host_init(struct dwc3 *dwc)
56{ 56{
57 struct property_entry props[2]; 57 struct property_entry props[3];
58 struct platform_device *xhci; 58 struct platform_device *xhci;
59 int ret, irq; 59 int ret, irq;
60 struct resource *res; 60 struct resource *res;
61 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); 61 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
62 int prop_idx = 0;
62 63
63 irq = dwc3_host_get_irq(dwc); 64 irq = dwc3_host_get_irq(dwc);
64 if (irq < 0) 65 if (irq < 0)
@@ -97,8 +98,22 @@ int dwc3_host_init(struct dwc3 *dwc)
97 98
98 memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props)); 99 memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props));
99 100
100 if (dwc->usb3_lpm_capable) { 101 if (dwc->usb3_lpm_capable)
101 props[0].name = "usb3-lpm-capable"; 102 props[prop_idx++].name = "usb3-lpm-capable";
103
104 /**
105 * WORKAROUND: dwc3 revisions <=3.00a have a limitation
106 * where Port Disable command doesn't work.
107 *
108 * The suggested workaround is that we avoid Port Disable
109 * completely.
110 *
111 * This following flag tells XHCI to do just that.
112 */
113 if (dwc->revision <= DWC3_REVISION_300A)
114 props[prop_idx++].name = "quirk-broken-port-ped";
115
116 if (prop_idx) {
102 ret = platform_device_add_properties(xhci, props); 117 ret = platform_device_add_properties(xhci, props);
103 if (ret) { 118 if (ret) {
104 dev_err(dwc->dev, "failed to add properties to xHCI\n"); 119 dev_err(dwc->dev, "failed to add properties to xHCI\n");
diff --git a/drivers/usb/early/ehci-dbgp.c b/drivers/usb/early/ehci-dbgp.c
index ea73afb026d8..e2654443e8eb 100644
--- a/drivers/usb/early/ehci-dbgp.c
+++ b/drivers/usb/early/ehci-dbgp.c
@@ -580,7 +580,6 @@ try_again:
580 USB_DEBUG_DEVNUM); 580 USB_DEBUG_DEVNUM);
581 goto err; 581 goto err;
582 } 582 }
583 devnum = USB_DEBUG_DEVNUM;
584 dbgp_printk("debug device renamed to 127\n"); 583 dbgp_printk("debug device renamed to 127\n");
585 } 584 }
586 585
diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index e6a17455adac..87fccf611b69 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -1230,7 +1230,7 @@ static long ffs_epfile_ioctl(struct file *file, unsigned code,
1230 desc = epfile->ep->descs[desc_idx]; 1230 desc = epfile->ep->descs[desc_idx];
1231 1231
1232 spin_unlock_irq(&epfile->ffs->eps_lock); 1232 spin_unlock_irq(&epfile->ffs->eps_lock);
1233 ret = copy_to_user((void *)value, desc, sizeof(*desc)); 1233 ret = copy_to_user((void *)value, desc, desc->bLength);
1234 if (ret) 1234 if (ret)
1235 ret = -EFAULT; 1235 ret = -EFAULT;
1236 return ret; 1236 return ret;
@@ -2101,7 +2101,7 @@ static int __ffs_data_do_entity(enum ffs_entity_type type,
2101 case FFS_ENDPOINT: 2101 case FFS_ENDPOINT:
2102 d = (void *)desc; 2102 d = (void *)desc;
2103 helper->eps_count++; 2103 helper->eps_count++;
2104 if (helper->eps_count >= 15) 2104 if (helper->eps_count >= FFS_MAX_EPS_COUNT)
2105 return -EINVAL; 2105 return -EINVAL;
2106 /* Check if descriptors for any speed were already parsed */ 2106 /* Check if descriptors for any speed were already parsed */
2107 if (!helper->ffs->eps_count && !helper->ffs->interfaces_count) 2107 if (!helper->ffs->eps_count && !helper->ffs->interfaces_count)
diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c
index 5f8139b8e601..89b48bcc377a 100644
--- a/drivers/usb/gadget/function/f_hid.c
+++ b/drivers/usb/gadget/function/f_hid.c
@@ -50,12 +50,12 @@ struct f_hidg {
50 50
51 /* recv report */ 51 /* recv report */
52 struct list_head completed_out_req; 52 struct list_head completed_out_req;
53 spinlock_t spinlock; 53 spinlock_t read_spinlock;
54 wait_queue_head_t read_queue; 54 wait_queue_head_t read_queue;
55 unsigned int qlen; 55 unsigned int qlen;
56 56
57 /* send report */ 57 /* send report */
58 struct mutex lock; 58 spinlock_t write_spinlock;
59 bool write_pending; 59 bool write_pending;
60 wait_queue_head_t write_queue; 60 wait_queue_head_t write_queue;
61 struct usb_request *req; 61 struct usb_request *req;
@@ -258,28 +258,35 @@ static ssize_t f_hidg_read(struct file *file, char __user *buffer,
258 if (!access_ok(VERIFY_WRITE, buffer, count)) 258 if (!access_ok(VERIFY_WRITE, buffer, count))
259 return -EFAULT; 259 return -EFAULT;
260 260
261 spin_lock_irqsave(&hidg->spinlock, flags); 261 spin_lock_irqsave(&hidg->read_spinlock, flags);
262 262
263#define READ_COND (!list_empty(&hidg->completed_out_req)) 263#define READ_COND (!list_empty(&hidg->completed_out_req))
264 264
265 /* wait for at least one buffer to complete */ 265 /* wait for at least one buffer to complete */
266 while (!READ_COND) { 266 while (!READ_COND) {
267 spin_unlock_irqrestore(&hidg->spinlock, flags); 267 spin_unlock_irqrestore(&hidg->read_spinlock, flags);
268 if (file->f_flags & O_NONBLOCK) 268 if (file->f_flags & O_NONBLOCK)
269 return -EAGAIN; 269 return -EAGAIN;
270 270
271 if (wait_event_interruptible(hidg->read_queue, READ_COND)) 271 if (wait_event_interruptible(hidg->read_queue, READ_COND))
272 return -ERESTARTSYS; 272 return -ERESTARTSYS;
273 273
274 spin_lock_irqsave(&hidg->spinlock, flags); 274 spin_lock_irqsave(&hidg->read_spinlock, flags);
275 } 275 }
276 276
277 /* pick the first one */ 277 /* pick the first one */
278 list = list_first_entry(&hidg->completed_out_req, 278 list = list_first_entry(&hidg->completed_out_req,
279 struct f_hidg_req_list, list); 279 struct f_hidg_req_list, list);
280
281 /*
282 * Remove this from list to protect it from beign free()
283 * while host disables our function
284 */
285 list_del(&list->list);
286
280 req = list->req; 287 req = list->req;
281 count = min_t(unsigned int, count, req->actual - list->pos); 288 count = min_t(unsigned int, count, req->actual - list->pos);
282 spin_unlock_irqrestore(&hidg->spinlock, flags); 289 spin_unlock_irqrestore(&hidg->read_spinlock, flags);
283 290
284 /* copy to user outside spinlock */ 291 /* copy to user outside spinlock */
285 count -= copy_to_user(buffer, req->buf + list->pos, count); 292 count -= copy_to_user(buffer, req->buf + list->pos, count);
@@ -292,15 +299,20 @@ static ssize_t f_hidg_read(struct file *file, char __user *buffer,
292 * call, taking into account its current read position. 299 * call, taking into account its current read position.
293 */ 300 */
294 if (list->pos == req->actual) { 301 if (list->pos == req->actual) {
295 spin_lock_irqsave(&hidg->spinlock, flags);
296 list_del(&list->list);
297 kfree(list); 302 kfree(list);
298 spin_unlock_irqrestore(&hidg->spinlock, flags);
299 303
300 req->length = hidg->report_length; 304 req->length = hidg->report_length;
301 ret = usb_ep_queue(hidg->out_ep, req, GFP_KERNEL); 305 ret = usb_ep_queue(hidg->out_ep, req, GFP_KERNEL);
302 if (ret < 0) 306 if (ret < 0) {
307 free_ep_req(hidg->out_ep, req);
303 return ret; 308 return ret;
309 }
310 } else {
311 spin_lock_irqsave(&hidg->read_spinlock, flags);
312 list_add(&list->list, &hidg->completed_out_req);
313 spin_unlock_irqrestore(&hidg->read_spinlock, flags);
314
315 wake_up(&hidg->read_queue);
304 } 316 }
305 317
306 return count; 318 return count;
@@ -309,13 +321,16 @@ static ssize_t f_hidg_read(struct file *file, char __user *buffer,
309static void f_hidg_req_complete(struct usb_ep *ep, struct usb_request *req) 321static void f_hidg_req_complete(struct usb_ep *ep, struct usb_request *req)
310{ 322{
311 struct f_hidg *hidg = (struct f_hidg *)ep->driver_data; 323 struct f_hidg *hidg = (struct f_hidg *)ep->driver_data;
324 unsigned long flags;
312 325
313 if (req->status != 0) { 326 if (req->status != 0) {
314 ERROR(hidg->func.config->cdev, 327 ERROR(hidg->func.config->cdev,
315 "End Point Request ERROR: %d\n", req->status); 328 "End Point Request ERROR: %d\n", req->status);
316 } 329 }
317 330
331 spin_lock_irqsave(&hidg->write_spinlock, flags);
318 hidg->write_pending = 0; 332 hidg->write_pending = 0;
333 spin_unlock_irqrestore(&hidg->write_spinlock, flags);
319 wake_up(&hidg->write_queue); 334 wake_up(&hidg->write_queue);
320} 335}
321 336
@@ -323,18 +338,20 @@ static ssize_t f_hidg_write(struct file *file, const char __user *buffer,
323 size_t count, loff_t *offp) 338 size_t count, loff_t *offp)
324{ 339{
325 struct f_hidg *hidg = file->private_data; 340 struct f_hidg *hidg = file->private_data;
341 struct usb_request *req;
342 unsigned long flags;
326 ssize_t status = -ENOMEM; 343 ssize_t status = -ENOMEM;
327 344
328 if (!access_ok(VERIFY_READ, buffer, count)) 345 if (!access_ok(VERIFY_READ, buffer, count))
329 return -EFAULT; 346 return -EFAULT;
330 347
331 mutex_lock(&hidg->lock); 348 spin_lock_irqsave(&hidg->write_spinlock, flags);
332 349
333#define WRITE_COND (!hidg->write_pending) 350#define WRITE_COND (!hidg->write_pending)
334 351try_again:
335 /* write queue */ 352 /* write queue */
336 while (!WRITE_COND) { 353 while (!WRITE_COND) {
337 mutex_unlock(&hidg->lock); 354 spin_unlock_irqrestore(&hidg->write_spinlock, flags);
338 if (file->f_flags & O_NONBLOCK) 355 if (file->f_flags & O_NONBLOCK)
339 return -EAGAIN; 356 return -EAGAIN;
340 357
@@ -342,37 +359,59 @@ static ssize_t f_hidg_write(struct file *file, const char __user *buffer,
342 hidg->write_queue, WRITE_COND)) 359 hidg->write_queue, WRITE_COND))
343 return -ERESTARTSYS; 360 return -ERESTARTSYS;
344 361
345 mutex_lock(&hidg->lock); 362 spin_lock_irqsave(&hidg->write_spinlock, flags);
346 } 363 }
347 364
365 hidg->write_pending = 1;
366 req = hidg->req;
348 count = min_t(unsigned, count, hidg->report_length); 367 count = min_t(unsigned, count, hidg->report_length);
368
369 spin_unlock_irqrestore(&hidg->write_spinlock, flags);
349 status = copy_from_user(hidg->req->buf, buffer, count); 370 status = copy_from_user(hidg->req->buf, buffer, count);
350 371
351 if (status != 0) { 372 if (status != 0) {
352 ERROR(hidg->func.config->cdev, 373 ERROR(hidg->func.config->cdev,
353 "copy_from_user error\n"); 374 "copy_from_user error\n");
354 mutex_unlock(&hidg->lock); 375 status = -EINVAL;
355 return -EINVAL; 376 goto release_write_pending;
356 } 377 }
357 378
358 hidg->req->status = 0; 379 spin_lock_irqsave(&hidg->write_spinlock, flags);
359 hidg->req->zero = 0; 380
360 hidg->req->length = count; 381 /* we our function has been disabled by host */
361 hidg->req->complete = f_hidg_req_complete; 382 if (!hidg->req) {
362 hidg->req->context = hidg; 383 free_ep_req(hidg->in_ep, hidg->req);
363 hidg->write_pending = 1; 384 /*
385 * TODO
386 * Should we fail with error here?
387 */
388 goto try_again;
389 }
390
391 req->status = 0;
392 req->zero = 0;
393 req->length = count;
394 req->complete = f_hidg_req_complete;
395 req->context = hidg;
364 396
365 status = usb_ep_queue(hidg->in_ep, hidg->req, GFP_ATOMIC); 397 status = usb_ep_queue(hidg->in_ep, hidg->req, GFP_ATOMIC);
366 if (status < 0) { 398 if (status < 0) {
367 ERROR(hidg->func.config->cdev, 399 ERROR(hidg->func.config->cdev,
368 "usb_ep_queue error on int endpoint %zd\n", status); 400 "usb_ep_queue error on int endpoint %zd\n", status);
369 hidg->write_pending = 0; 401 goto release_write_pending_unlocked;
370 wake_up(&hidg->write_queue);
371 } else { 402 } else {
372 status = count; 403 status = count;
373 } 404 }
405 spin_unlock_irqrestore(&hidg->write_spinlock, flags);
374 406
375 mutex_unlock(&hidg->lock); 407 return status;
408release_write_pending:
409 spin_lock_irqsave(&hidg->write_spinlock, flags);
410release_write_pending_unlocked:
411 hidg->write_pending = 0;
412 spin_unlock_irqrestore(&hidg->write_spinlock, flags);
413
414 wake_up(&hidg->write_queue);
376 415
377 return status; 416 return status;
378} 417}
@@ -425,20 +464,36 @@ static inline struct usb_request *hidg_alloc_ep_req(struct usb_ep *ep,
425static void hidg_set_report_complete(struct usb_ep *ep, struct usb_request *req) 464static void hidg_set_report_complete(struct usb_ep *ep, struct usb_request *req)
426{ 465{
427 struct f_hidg *hidg = (struct f_hidg *) req->context; 466 struct f_hidg *hidg = (struct f_hidg *) req->context;
467 struct usb_composite_dev *cdev = hidg->func.config->cdev;
428 struct f_hidg_req_list *req_list; 468 struct f_hidg_req_list *req_list;
429 unsigned long flags; 469 unsigned long flags;
430 470
431 req_list = kzalloc(sizeof(*req_list), GFP_ATOMIC); 471 switch (req->status) {
432 if (!req_list) 472 case 0:
433 return; 473 req_list = kzalloc(sizeof(*req_list), GFP_ATOMIC);
474 if (!req_list) {
475 ERROR(cdev, "Unable to allocate mem for req_list\n");
476 goto free_req;
477 }
434 478
435 req_list->req = req; 479 req_list->req = req;
436 480
437 spin_lock_irqsave(&hidg->spinlock, flags); 481 spin_lock_irqsave(&hidg->read_spinlock, flags);
438 list_add_tail(&req_list->list, &hidg->completed_out_req); 482 list_add_tail(&req_list->list, &hidg->completed_out_req);
439 spin_unlock_irqrestore(&hidg->spinlock, flags); 483 spin_unlock_irqrestore(&hidg->read_spinlock, flags);
440 484
441 wake_up(&hidg->read_queue); 485 wake_up(&hidg->read_queue);
486 break;
487 default:
488 ERROR(cdev, "Set report failed %d\n", req->status);
489 /* FALLTHROUGH */
490 case -ECONNABORTED: /* hardware forced ep reset */
491 case -ECONNRESET: /* request dequeued */
492 case -ESHUTDOWN: /* disconnect from host */
493free_req:
494 free_ep_req(ep, req);
495 return;
496 }
442} 497}
443 498
444static int hidg_setup(struct usb_function *f, 499static int hidg_setup(struct usb_function *f,
@@ -544,20 +599,35 @@ static void hidg_disable(struct usb_function *f)
544{ 599{
545 struct f_hidg *hidg = func_to_hidg(f); 600 struct f_hidg *hidg = func_to_hidg(f);
546 struct f_hidg_req_list *list, *next; 601 struct f_hidg_req_list *list, *next;
602 unsigned long flags;
547 603
548 usb_ep_disable(hidg->in_ep); 604 usb_ep_disable(hidg->in_ep);
549 usb_ep_disable(hidg->out_ep); 605 usb_ep_disable(hidg->out_ep);
550 606
607 spin_lock_irqsave(&hidg->read_spinlock, flags);
551 list_for_each_entry_safe(list, next, &hidg->completed_out_req, list) { 608 list_for_each_entry_safe(list, next, &hidg->completed_out_req, list) {
609 free_ep_req(hidg->out_ep, list->req);
552 list_del(&list->list); 610 list_del(&list->list);
553 kfree(list); 611 kfree(list);
554 } 612 }
613 spin_unlock_irqrestore(&hidg->read_spinlock, flags);
614
615 spin_lock_irqsave(&hidg->write_spinlock, flags);
616 if (!hidg->write_pending) {
617 free_ep_req(hidg->in_ep, hidg->req);
618 hidg->write_pending = 1;
619 }
620
621 hidg->req = NULL;
622 spin_unlock_irqrestore(&hidg->write_spinlock, flags);
555} 623}
556 624
557static int hidg_set_alt(struct usb_function *f, unsigned intf, unsigned alt) 625static int hidg_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
558{ 626{
559 struct usb_composite_dev *cdev = f->config->cdev; 627 struct usb_composite_dev *cdev = f->config->cdev;
560 struct f_hidg *hidg = func_to_hidg(f); 628 struct f_hidg *hidg = func_to_hidg(f);
629 struct usb_request *req_in = NULL;
630 unsigned long flags;
561 int i, status = 0; 631 int i, status = 0;
562 632
563 VDBG(cdev, "hidg_set_alt intf:%d alt:%d\n", intf, alt); 633 VDBG(cdev, "hidg_set_alt intf:%d alt:%d\n", intf, alt);
@@ -578,6 +648,12 @@ static int hidg_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
578 goto fail; 648 goto fail;
579 } 649 }
580 hidg->in_ep->driver_data = hidg; 650 hidg->in_ep->driver_data = hidg;
651
652 req_in = hidg_alloc_ep_req(hidg->in_ep, hidg->report_length);
653 if (!req_in) {
654 status = -ENOMEM;
655 goto disable_ep_in;
656 }
581 } 657 }
582 658
583 659
@@ -589,12 +665,12 @@ static int hidg_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
589 hidg->out_ep); 665 hidg->out_ep);
590 if (status) { 666 if (status) {
591 ERROR(cdev, "config_ep_by_speed FAILED!\n"); 667 ERROR(cdev, "config_ep_by_speed FAILED!\n");
592 goto fail; 668 goto free_req_in;
593 } 669 }
594 status = usb_ep_enable(hidg->out_ep); 670 status = usb_ep_enable(hidg->out_ep);
595 if (status < 0) { 671 if (status < 0) {
596 ERROR(cdev, "Enable OUT endpoint FAILED!\n"); 672 ERROR(cdev, "Enable OUT endpoint FAILED!\n");
597 goto fail; 673 goto free_req_in;
598 } 674 }
599 hidg->out_ep->driver_data = hidg; 675 hidg->out_ep->driver_data = hidg;
600 676
@@ -610,17 +686,37 @@ static int hidg_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
610 req->context = hidg; 686 req->context = hidg;
611 status = usb_ep_queue(hidg->out_ep, req, 687 status = usb_ep_queue(hidg->out_ep, req,
612 GFP_ATOMIC); 688 GFP_ATOMIC);
613 if (status) 689 if (status) {
614 ERROR(cdev, "%s queue req --> %d\n", 690 ERROR(cdev, "%s queue req --> %d\n",
615 hidg->out_ep->name, status); 691 hidg->out_ep->name, status);
692 free_ep_req(hidg->out_ep, req);
693 }
616 } else { 694 } else {
617 usb_ep_disable(hidg->out_ep);
618 status = -ENOMEM; 695 status = -ENOMEM;
619 goto fail; 696 goto disable_out_ep;
620 } 697 }
621 } 698 }
622 } 699 }
623 700
701 if (hidg->in_ep != NULL) {
702 spin_lock_irqsave(&hidg->write_spinlock, flags);
703 hidg->req = req_in;
704 hidg->write_pending = 0;
705 spin_unlock_irqrestore(&hidg->write_spinlock, flags);
706
707 wake_up(&hidg->write_queue);
708 }
709 return 0;
710disable_out_ep:
711 usb_ep_disable(hidg->out_ep);
712free_req_in:
713 if (req_in)
714 free_ep_req(hidg->in_ep, req_in);
715
716disable_ep_in:
717 if (hidg->in_ep)
718 usb_ep_disable(hidg->in_ep);
719
624fail: 720fail:
625 return status; 721 return status;
626} 722}
@@ -669,12 +765,6 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
669 goto fail; 765 goto fail;
670 hidg->out_ep = ep; 766 hidg->out_ep = ep;
671 767
672 /* preallocate request and buffer */
673 status = -ENOMEM;
674 hidg->req = alloc_ep_req(hidg->in_ep, hidg->report_length);
675 if (!hidg->req)
676 goto fail;
677
678 /* set descriptor dynamic values */ 768 /* set descriptor dynamic values */
679 hidg_interface_desc.bInterfaceSubClass = hidg->bInterfaceSubClass; 769 hidg_interface_desc.bInterfaceSubClass = hidg->bInterfaceSubClass;
680 hidg_interface_desc.bInterfaceProtocol = hidg->bInterfaceProtocol; 770 hidg_interface_desc.bInterfaceProtocol = hidg->bInterfaceProtocol;
@@ -711,8 +801,10 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
711 if (status) 801 if (status)
712 goto fail; 802 goto fail;
713 803
714 mutex_init(&hidg->lock); 804 spin_lock_init(&hidg->write_spinlock);
715 spin_lock_init(&hidg->spinlock); 805 hidg->write_pending = 1;
806 hidg->req = NULL;
807 spin_lock_init(&hidg->read_spinlock);
716 init_waitqueue_head(&hidg->write_queue); 808 init_waitqueue_head(&hidg->write_queue);
717 init_waitqueue_head(&hidg->read_queue); 809 init_waitqueue_head(&hidg->read_queue);
718 INIT_LIST_HEAD(&hidg->completed_out_req); 810 INIT_LIST_HEAD(&hidg->completed_out_req);
@@ -976,10 +1068,6 @@ static void hidg_unbind(struct usb_configuration *c, struct usb_function *f)
976 device_destroy(hidg_class, MKDEV(major, hidg->minor)); 1068 device_destroy(hidg_class, MKDEV(major, hidg->minor));
977 cdev_del(&hidg->cdev); 1069 cdev_del(&hidg->cdev);
978 1070
979 /* disable/free request and end point */
980 usb_ep_disable(hidg->in_ep);
981 free_ep_req(hidg->in_ep, hidg->req);
982
983 usb_free_all_descriptors(f); 1071 usb_free_all_descriptors(f);
984} 1072}
985 1073
diff --git a/drivers/usb/gadget/function/f_printer.c b/drivers/usb/gadget/function/f_printer.c
index 8054da9276dd..8df244fc9d80 100644
--- a/drivers/usb/gadget/function/f_printer.c
+++ b/drivers/usb/gadget/function/f_printer.c
@@ -49,7 +49,6 @@
49 49
50#include "u_printer.h" 50#include "u_printer.h"
51 51
52#define PNP_STRING_LEN 1024
53#define PRINTER_MINORS 4 52#define PRINTER_MINORS 4
54#define GET_DEVICE_ID 0 53#define GET_DEVICE_ID 0
55#define GET_PORT_STATUS 1 54#define GET_PORT_STATUS 1
@@ -907,8 +906,7 @@ static bool gprinter_req_match(struct usb_function *f,
907 switch (ctrl->bRequest) { 906 switch (ctrl->bRequest) {
908 case GET_DEVICE_ID: 907 case GET_DEVICE_ID:
909 w_index >>= 8; 908 w_index >>= 8;
910 if (w_length <= PNP_STRING_LEN && 909 if (USB_DIR_IN & ctrl->bRequestType)
911 (USB_DIR_IN & ctrl->bRequestType))
912 break; 910 break;
913 return false; 911 return false;
914 case GET_PORT_STATUS: 912 case GET_PORT_STATUS:
@@ -937,6 +935,7 @@ static int printer_func_setup(struct usb_function *f,
937 struct printer_dev *dev = func_to_printer(f); 935 struct printer_dev *dev = func_to_printer(f);
938 struct usb_composite_dev *cdev = f->config->cdev; 936 struct usb_composite_dev *cdev = f->config->cdev;
939 struct usb_request *req = cdev->req; 937 struct usb_request *req = cdev->req;
938 u8 *buf = req->buf;
940 int value = -EOPNOTSUPP; 939 int value = -EOPNOTSUPP;
941 u16 wIndex = le16_to_cpu(ctrl->wIndex); 940 u16 wIndex = le16_to_cpu(ctrl->wIndex);
942 u16 wValue = le16_to_cpu(ctrl->wValue); 941 u16 wValue = le16_to_cpu(ctrl->wValue);
@@ -953,10 +952,16 @@ static int printer_func_setup(struct usb_function *f,
953 if ((wIndex>>8) != dev->interface) 952 if ((wIndex>>8) != dev->interface)
954 break; 953 break;
955 954
956 value = (dev->pnp_string[0] << 8) | dev->pnp_string[1]; 955 if (!dev->pnp_string) {
957 memcpy(req->buf, dev->pnp_string, value); 956 value = 0;
957 break;
958 }
959 value = strlen(dev->pnp_string);
960 buf[0] = (value >> 8) & 0xFF;
961 buf[1] = value & 0xFF;
962 memcpy(buf + 2, dev->pnp_string, value);
958 DBG(dev, "1284 PNP String: %x %s\n", value, 963 DBG(dev, "1284 PNP String: %x %s\n", value,
959 &dev->pnp_string[2]); 964 dev->pnp_string);
960 break; 965 break;
961 966
962 case GET_PORT_STATUS: /* Get Port Status */ 967 case GET_PORT_STATUS: /* Get Port Status */
@@ -964,7 +969,7 @@ static int printer_func_setup(struct usb_function *f,
964 if (wIndex != dev->interface) 969 if (wIndex != dev->interface)
965 break; 970 break;
966 971
967 *(u8 *)req->buf = dev->printer_status; 972 buf[0] = dev->printer_status;
968 value = min_t(u16, wLength, 1); 973 value = min_t(u16, wLength, 1);
969 break; 974 break;
970 975
@@ -1157,10 +1162,21 @@ static ssize_t f_printer_opts_pnp_string_show(struct config_item *item,
1157 char *page) 1162 char *page)
1158{ 1163{
1159 struct f_printer_opts *opts = to_f_printer_opts(item); 1164 struct f_printer_opts *opts = to_f_printer_opts(item);
1160 int result; 1165 int result = 0;
1161 1166
1162 mutex_lock(&opts->lock); 1167 mutex_lock(&opts->lock);
1163 result = strlcpy(page, opts->pnp_string + 2, PNP_STRING_LEN - 2); 1168 if (!opts->pnp_string)
1169 goto unlock;
1170
1171 result = strlcpy(page, opts->pnp_string, PAGE_SIZE);
1172 if (result >= PAGE_SIZE) {
1173 result = PAGE_SIZE;
1174 } else if (page[result - 1] != '\n' && result + 1 < PAGE_SIZE) {
1175 page[result++] = '\n';
1176 page[result] = '\0';
1177 }
1178
1179unlock:
1164 mutex_unlock(&opts->lock); 1180 mutex_unlock(&opts->lock);
1165 1181
1166 return result; 1182 return result;
@@ -1170,13 +1186,24 @@ static ssize_t f_printer_opts_pnp_string_store(struct config_item *item,
1170 const char *page, size_t len) 1186 const char *page, size_t len)
1171{ 1187{
1172 struct f_printer_opts *opts = to_f_printer_opts(item); 1188 struct f_printer_opts *opts = to_f_printer_opts(item);
1173 int result, l; 1189 char *new_pnp;
1190 int result;
1174 1191
1175 mutex_lock(&opts->lock); 1192 mutex_lock(&opts->lock);
1176 result = strlcpy(opts->pnp_string + 2, page, PNP_STRING_LEN - 2); 1193
1177 l = strlen(opts->pnp_string + 2) + 2; 1194 new_pnp = kstrndup(page, len, GFP_KERNEL);
1178 opts->pnp_string[0] = (l >> 8) & 0xFF; 1195 if (!new_pnp) {
1179 opts->pnp_string[1] = l & 0xFF; 1196 result = -ENOMEM;
1197 goto unlock;
1198 }
1199
1200 if (opts->pnp_string_allocated)
1201 kfree(opts->pnp_string);
1202
1203 opts->pnp_string_allocated = true;
1204 opts->pnp_string = new_pnp;
1205 result = len;
1206unlock:
1180 mutex_unlock(&opts->lock); 1207 mutex_unlock(&opts->lock);
1181 1208
1182 return result; 1209 return result;
@@ -1270,6 +1297,8 @@ static void gprinter_free_inst(struct usb_function_instance *f)
1270 1297
1271 mutex_unlock(&printer_ida_lock); 1298 mutex_unlock(&printer_ida_lock);
1272 1299
1300 if (opts->pnp_string_allocated)
1301 kfree(opts->pnp_string);
1273 kfree(opts); 1302 kfree(opts);
1274} 1303}
1275 1304
diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c
index 969cfe741380..f6a0d3a1311b 100644
--- a/drivers/usb/gadget/function/f_uac2.c
+++ b/drivers/usb/gadget/function/f_uac2.c
@@ -22,9 +22,6 @@
22 22
23#include "u_uac2.h" 23#include "u_uac2.h"
24 24
25/* Keep everyone on toes */
26#define USB_XFERS 2
27
28/* 25/*
29 * The driver implements a simple UAC_2 topology. 26 * The driver implements a simple UAC_2 topology.
30 * USB-OUT -> IT_1 -> OT_3 -> ALSA_Capture 27 * USB-OUT -> IT_1 -> OT_3 -> ALSA_Capture
@@ -78,7 +75,7 @@ struct uac2_rtd_params {
78 size_t period_size; 75 size_t period_size;
79 76
80 unsigned max_psize; 77 unsigned max_psize;
81 struct uac2_req ureq[USB_XFERS]; 78 struct uac2_req *ureq;
82 79
83 spinlock_t lock; 80 spinlock_t lock;
84}; 81};
@@ -269,6 +266,8 @@ static int
269uac2_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 266uac2_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
270{ 267{
271 struct snd_uac2_chip *uac2 = snd_pcm_substream_chip(substream); 268 struct snd_uac2_chip *uac2 = snd_pcm_substream_chip(substream);
269 struct audio_dev *agdev = uac2_to_agdev(uac2);
270 struct f_uac2_opts *uac2_opts = agdev_to_uac2_opts(agdev);
272 struct uac2_rtd_params *prm; 271 struct uac2_rtd_params *prm;
273 unsigned long flags; 272 unsigned long flags;
274 int err = 0; 273 int err = 0;
@@ -300,7 +299,7 @@ uac2_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
300 299
301 /* Clear buffer after Play stops */ 300 /* Clear buffer after Play stops */
302 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && !prm->ss) 301 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && !prm->ss)
303 memset(prm->rbuf, 0, prm->max_psize * USB_XFERS); 302 memset(prm->rbuf, 0, prm->max_psize * uac2_opts->req_number);
304 303
305 return err; 304 return err;
306} 305}
@@ -943,6 +942,8 @@ static inline void
943free_ep(struct uac2_rtd_params *prm, struct usb_ep *ep) 942free_ep(struct uac2_rtd_params *prm, struct usb_ep *ep)
944{ 943{
945 struct snd_uac2_chip *uac2 = prm->uac2; 944 struct snd_uac2_chip *uac2 = prm->uac2;
945 struct audio_dev *agdev = uac2_to_agdev(uac2);
946 struct f_uac2_opts *uac2_opts = agdev_to_uac2_opts(agdev);
946 int i; 947 int i;
947 948
948 if (!prm->ep_enabled) 949 if (!prm->ep_enabled)
@@ -950,7 +951,7 @@ free_ep(struct uac2_rtd_params *prm, struct usb_ep *ep)
950 951
951 prm->ep_enabled = false; 952 prm->ep_enabled = false;
952 953
953 for (i = 0; i < USB_XFERS; i++) { 954 for (i = 0; i < uac2_opts->req_number; i++) {
954 if (prm->ureq[i].req) { 955 if (prm->ureq[i].req) {
955 usb_ep_dequeue(ep, prm->ureq[i].req); 956 usb_ep_dequeue(ep, prm->ureq[i].req);
956 usb_ep_free_request(ep, prm->ureq[i].req); 957 usb_ep_free_request(ep, prm->ureq[i].req);
@@ -1095,31 +1096,47 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn)
1095 1096
1096 prm = &agdev->uac2.c_prm; 1097 prm = &agdev->uac2.c_prm;
1097 prm->max_psize = hs_epout_desc.wMaxPacketSize; 1098 prm->max_psize = hs_epout_desc.wMaxPacketSize;
1098 prm->rbuf = kzalloc(prm->max_psize * USB_XFERS, GFP_KERNEL); 1099 prm->ureq = kcalloc(uac2_opts->req_number, sizeof(struct uac2_req),
1100 GFP_KERNEL);
1101 if (!prm->ureq) {
1102 ret = -ENOMEM;
1103 goto err_free_descs;
1104 }
1105 prm->rbuf = kcalloc(uac2_opts->req_number, prm->max_psize, GFP_KERNEL);
1099 if (!prm->rbuf) { 1106 if (!prm->rbuf) {
1100 prm->max_psize = 0; 1107 prm->max_psize = 0;
1108 ret = -ENOMEM;
1101 goto err_free_descs; 1109 goto err_free_descs;
1102 } 1110 }
1103 1111
1104 prm = &agdev->uac2.p_prm; 1112 prm = &agdev->uac2.p_prm;
1105 prm->max_psize = hs_epin_desc.wMaxPacketSize; 1113 prm->max_psize = hs_epin_desc.wMaxPacketSize;
1106 prm->rbuf = kzalloc(prm->max_psize * USB_XFERS, GFP_KERNEL); 1114 prm->ureq = kcalloc(uac2_opts->req_number, sizeof(struct uac2_req),
1115 GFP_KERNEL);
1116 if (!prm->ureq) {
1117 ret = -ENOMEM;
1118 goto err_free_descs;
1119 }
1120 prm->rbuf = kcalloc(uac2_opts->req_number, prm->max_psize, GFP_KERNEL);
1107 if (!prm->rbuf) { 1121 if (!prm->rbuf) {
1108 prm->max_psize = 0; 1122 prm->max_psize = 0;
1109 goto err; 1123 ret = -ENOMEM;
1124 goto err_no_memory;
1110 } 1125 }
1111 1126
1112 ret = alsa_uac2_init(agdev); 1127 ret = alsa_uac2_init(agdev);
1113 if (ret) 1128 if (ret)
1114 goto err; 1129 goto err_no_memory;
1115 return 0; 1130 return 0;
1116 1131
1117err: 1132err_no_memory:
1133 kfree(agdev->uac2.p_prm.ureq);
1134 kfree(agdev->uac2.c_prm.ureq);
1118 kfree(agdev->uac2.p_prm.rbuf); 1135 kfree(agdev->uac2.p_prm.rbuf);
1119 kfree(agdev->uac2.c_prm.rbuf); 1136 kfree(agdev->uac2.c_prm.rbuf);
1120err_free_descs: 1137err_free_descs:
1121 usb_free_all_descriptors(fn); 1138 usb_free_all_descriptors(fn);
1122 return -EINVAL; 1139 return ret;
1123} 1140}
1124 1141
1125static int 1142static int
@@ -1127,6 +1144,7 @@ afunc_set_alt(struct usb_function *fn, unsigned intf, unsigned alt)
1127{ 1144{
1128 struct usb_composite_dev *cdev = fn->config->cdev; 1145 struct usb_composite_dev *cdev = fn->config->cdev;
1129 struct audio_dev *agdev = func_to_agdev(fn); 1146 struct audio_dev *agdev = func_to_agdev(fn);
1147 struct f_uac2_opts *opts = agdev_to_uac2_opts(agdev);
1130 struct snd_uac2_chip *uac2 = &agdev->uac2; 1148 struct snd_uac2_chip *uac2 = &agdev->uac2;
1131 struct usb_gadget *gadget = cdev->gadget; 1149 struct usb_gadget *gadget = cdev->gadget;
1132 struct device *dev = &uac2->pdev.dev; 1150 struct device *dev = &uac2->pdev.dev;
@@ -1157,7 +1175,6 @@ afunc_set_alt(struct usb_function *fn, unsigned intf, unsigned alt)
1157 agdev->as_out_alt = alt; 1175 agdev->as_out_alt = alt;
1158 req_len = prm->max_psize; 1176 req_len = prm->max_psize;
1159 } else if (intf == agdev->as_in_intf) { 1177 } else if (intf == agdev->as_in_intf) {
1160 struct f_uac2_opts *opts = agdev_to_uac2_opts(agdev);
1161 unsigned int factor, rate; 1178 unsigned int factor, rate;
1162 struct usb_endpoint_descriptor *ep_desc; 1179 struct usb_endpoint_descriptor *ep_desc;
1163 1180
@@ -1203,7 +1220,7 @@ afunc_set_alt(struct usb_function *fn, unsigned intf, unsigned alt)
1203 prm->ep_enabled = true; 1220 prm->ep_enabled = true;
1204 usb_ep_enable(ep); 1221 usb_ep_enable(ep);
1205 1222
1206 for (i = 0; i < USB_XFERS; i++) { 1223 for (i = 0; i < opts->req_number; i++) {
1207 if (!prm->ureq[i].req) { 1224 if (!prm->ureq[i].req) {
1208 req = usb_ep_alloc_request(ep, GFP_ATOMIC); 1225 req = usb_ep_alloc_request(ep, GFP_ATOMIC);
1209 if (req == NULL) 1226 if (req == NULL)
@@ -1487,6 +1504,7 @@ UAC2_ATTRIBUTE(p_ssize);
1487UAC2_ATTRIBUTE(c_chmask); 1504UAC2_ATTRIBUTE(c_chmask);
1488UAC2_ATTRIBUTE(c_srate); 1505UAC2_ATTRIBUTE(c_srate);
1489UAC2_ATTRIBUTE(c_ssize); 1506UAC2_ATTRIBUTE(c_ssize);
1507UAC2_ATTRIBUTE(req_number);
1490 1508
1491static struct configfs_attribute *f_uac2_attrs[] = { 1509static struct configfs_attribute *f_uac2_attrs[] = {
1492 &f_uac2_opts_attr_p_chmask, 1510 &f_uac2_opts_attr_p_chmask,
@@ -1495,6 +1513,7 @@ static struct configfs_attribute *f_uac2_attrs[] = {
1495 &f_uac2_opts_attr_c_chmask, 1513 &f_uac2_opts_attr_c_chmask,
1496 &f_uac2_opts_attr_c_srate, 1514 &f_uac2_opts_attr_c_srate,
1497 &f_uac2_opts_attr_c_ssize, 1515 &f_uac2_opts_attr_c_ssize,
1516 &f_uac2_opts_attr_req_number,
1498 NULL, 1517 NULL,
1499}; 1518};
1500 1519
@@ -1532,6 +1551,7 @@ static struct usb_function_instance *afunc_alloc_inst(void)
1532 opts->c_chmask = UAC2_DEF_CCHMASK; 1551 opts->c_chmask = UAC2_DEF_CCHMASK;
1533 opts->c_srate = UAC2_DEF_CSRATE; 1552 opts->c_srate = UAC2_DEF_CSRATE;
1534 opts->c_ssize = UAC2_DEF_CSSIZE; 1553 opts->c_ssize = UAC2_DEF_CSSIZE;
1554 opts->req_number = UAC2_DEF_REQ_NUM;
1535 return &opts->func_inst; 1555 return &opts->func_inst;
1536} 1556}
1537 1557
@@ -1560,6 +1580,7 @@ static void afunc_unbind(struct usb_configuration *c, struct usb_function *f)
1560 1580
1561 prm = &agdev->uac2.c_prm; 1581 prm = &agdev->uac2.c_prm;
1562 kfree(prm->rbuf); 1582 kfree(prm->rbuf);
1583 kfree(prm->ureq);
1563 usb_free_all_descriptors(f); 1584 usb_free_all_descriptors(f);
1564} 1585}
1565 1586
diff --git a/drivers/usb/gadget/function/u_ether.c b/drivers/usb/gadget/function/u_ether.c
index b4e5d6dfd549..c3cab77181d4 100644
--- a/drivers/usb/gadget/function/u_ether.c
+++ b/drivers/usb/gadget/function/u_ether.c
@@ -913,9 +913,16 @@ EXPORT_SYMBOL_GPL(gether_set_dev_addr);
913int gether_get_dev_addr(struct net_device *net, char *dev_addr, int len) 913int gether_get_dev_addr(struct net_device *net, char *dev_addr, int len)
914{ 914{
915 struct eth_dev *dev; 915 struct eth_dev *dev;
916 int ret;
916 917
917 dev = netdev_priv(net); 918 dev = netdev_priv(net);
918 return get_ether_addr_str(dev->dev_mac, dev_addr, len); 919 ret = get_ether_addr_str(dev->dev_mac, dev_addr, len);
920 if (ret + 1 < len) {
921 dev_addr[ret++] = '\n';
922 dev_addr[ret] = '\0';
923 }
924
925 return ret;
919} 926}
920EXPORT_SYMBOL_GPL(gether_get_dev_addr); 927EXPORT_SYMBOL_GPL(gether_get_dev_addr);
921 928
@@ -935,9 +942,16 @@ EXPORT_SYMBOL_GPL(gether_set_host_addr);
935int gether_get_host_addr(struct net_device *net, char *host_addr, int len) 942int gether_get_host_addr(struct net_device *net, char *host_addr, int len)
936{ 943{
937 struct eth_dev *dev; 944 struct eth_dev *dev;
945 int ret;
938 946
939 dev = netdev_priv(net); 947 dev = netdev_priv(net);
940 return get_ether_addr_str(dev->host_mac, host_addr, len); 948 ret = get_ether_addr_str(dev->host_mac, host_addr, len);
949 if (ret + 1 < len) {
950 host_addr[ret++] = '\n';
951 host_addr[ret] = '\0';
952 }
953
954 return ret;
941} 955}
942EXPORT_SYMBOL_GPL(gether_get_host_addr); 956EXPORT_SYMBOL_GPL(gether_get_host_addr);
943 957
@@ -984,10 +998,12 @@ EXPORT_SYMBOL_GPL(gether_get_qmult);
984 998
985int gether_get_ifname(struct net_device *net, char *name, int len) 999int gether_get_ifname(struct net_device *net, char *name, int len)
986{ 1000{
1001 int ret;
1002
987 rtnl_lock(); 1003 rtnl_lock();
988 strlcpy(name, netdev_name(net), len); 1004 ret = snprintf(name, len, "%s\n", netdev_name(net));
989 rtnl_unlock(); 1005 rtnl_unlock();
990 return strlen(name); 1006 return ret < len ? ret : len;
991} 1007}
992EXPORT_SYMBOL_GPL(gether_get_ifname); 1008EXPORT_SYMBOL_GPL(gether_get_ifname);
993 1009
diff --git a/drivers/usb/gadget/function/u_ether_configfs.h b/drivers/usb/gadget/function/u_ether_configfs.h
index 4f47289fcf7c..c71133de17e7 100644
--- a/drivers/usb/gadget/function/u_ether_configfs.h
+++ b/drivers/usb/gadget/function/u_ether_configfs.h
@@ -108,7 +108,7 @@
108 mutex_lock(&opts->lock); \ 108 mutex_lock(&opts->lock); \
109 qmult = gether_get_qmult(opts->net); \ 109 qmult = gether_get_qmult(opts->net); \
110 mutex_unlock(&opts->lock); \ 110 mutex_unlock(&opts->lock); \
111 return sprintf(page, "%d", qmult); \ 111 return sprintf(page, "%d\n", qmult); \
112 } \ 112 } \
113 \ 113 \
114 static ssize_t _f_##_opts_qmult_store(struct config_item *item, \ 114 static ssize_t _f_##_opts_qmult_store(struct config_item *item, \
diff --git a/drivers/usb/gadget/function/u_fs.h b/drivers/usb/gadget/function/u_fs.h
index 60139854e0b1..4b6969451cdc 100644
--- a/drivers/usb/gadget/function/u_fs.h
+++ b/drivers/usb/gadget/function/u_fs.h
@@ -247,7 +247,8 @@ struct ffs_data {
247 247
248 unsigned user_flags; 248 unsigned user_flags;
249 249
250 u8 eps_addrmap[15]; 250#define FFS_MAX_EPS_COUNT 31
251 u8 eps_addrmap[FFS_MAX_EPS_COUNT];
251 252
252 unsigned short strings_count; 253 unsigned short strings_count;
253 unsigned short interfaces_count; 254 unsigned short interfaces_count;
diff --git a/drivers/usb/gadget/function/u_printer.h b/drivers/usb/gadget/function/u_printer.h
index 0e2c49d4274e..8d30b7577f87 100644
--- a/drivers/usb/gadget/function/u_printer.h
+++ b/drivers/usb/gadget/function/u_printer.h
@@ -18,12 +18,11 @@
18 18
19#include <linux/usb/composite.h> 19#include <linux/usb/composite.h>
20 20
21#define PNP_STRING_LEN 1024
22
23struct f_printer_opts { 21struct f_printer_opts {
24 struct usb_function_instance func_inst; 22 struct usb_function_instance func_inst;
25 int minor; 23 int minor;
26 char pnp_string[PNP_STRING_LEN]; 24 char *pnp_string;
25 bool pnp_string_allocated;
27 unsigned q_len; 26 unsigned q_len;
28 27
29 /* 28 /*
diff --git a/drivers/usb/gadget/function/u_uac2.h b/drivers/usb/gadget/function/u_uac2.h
index 78dd37279bd4..19eeb83538a5 100644
--- a/drivers/usb/gadget/function/u_uac2.h
+++ b/drivers/usb/gadget/function/u_uac2.h
@@ -24,6 +24,7 @@
24#define UAC2_DEF_CCHMASK 0x3 24#define UAC2_DEF_CCHMASK 0x3
25#define UAC2_DEF_CSRATE 64000 25#define UAC2_DEF_CSRATE 64000
26#define UAC2_DEF_CSSIZE 2 26#define UAC2_DEF_CSSIZE 2
27#define UAC2_DEF_REQ_NUM 2
27 28
28struct f_uac2_opts { 29struct f_uac2_opts {
29 struct usb_function_instance func_inst; 30 struct usb_function_instance func_inst;
@@ -33,6 +34,7 @@ struct f_uac2_opts {
33 int c_chmask; 34 int c_chmask;
34 int c_srate; 35 int c_srate;
35 int c_ssize; 36 int c_ssize;
37 int req_number;
36 bool bound; 38 bool bound;
37 39
38 struct mutex lock; 40 struct mutex lock;
diff --git a/drivers/usb/gadget/legacy/audio.c b/drivers/usb/gadget/legacy/audio.c
index 5d7b3c6a422b..8a39f42a4d56 100644
--- a/drivers/usb/gadget/legacy/audio.c
+++ b/drivers/usb/gadget/legacy/audio.c
@@ -229,6 +229,7 @@ static int audio_bind(struct usb_composite_dev *cdev)
229 uac2_opts->c_chmask = c_chmask; 229 uac2_opts->c_chmask = c_chmask;
230 uac2_opts->c_srate = c_srate; 230 uac2_opts->c_srate = c_srate;
231 uac2_opts->c_ssize = c_ssize; 231 uac2_opts->c_ssize = c_ssize;
232 uac2_opts->req_number = UAC2_DEF_REQ_NUM;
232#else 233#else
233 uac1_opts = container_of(fi_uac1, struct f_uac1_opts, func_inst); 234 uac1_opts = container_of(fi_uac1, struct f_uac1_opts, func_inst);
234 uac1_opts->fn_play = fn_play; 235 uac1_opts->fn_play = fn_play;
diff --git a/drivers/usb/gadget/legacy/printer.c b/drivers/usb/gadget/legacy/printer.c
index 6f969a86175c..4c9cfff34a03 100644
--- a/drivers/usb/gadget/legacy/printer.c
+++ b/drivers/usb/gadget/legacy/printer.c
@@ -88,8 +88,8 @@ static const struct usb_descriptor_header *otg_desc[2];
88 88
89static char product_desc [40] = DRIVER_DESC; 89static char product_desc [40] = DRIVER_DESC;
90static char serial_num [40] = "1"; 90static char serial_num [40] = "1";
91static char pnp_string[PNP_STRING_LEN] = 91static char *pnp_string =
92 "XXMFG:linux;MDL:g_printer;CLS:PRINTER;SN:1;"; 92 "MFG:linux;MDL:g_printer;CLS:PRINTER;SN:1;";
93 93
94/* static strings, in UTF-8 */ 94/* static strings, in UTF-8 */
95static struct usb_string strings [] = { 95static struct usb_string strings [] = {
@@ -143,23 +143,29 @@ static int printer_do_config(struct usb_configuration *c)
143static int printer_bind(struct usb_composite_dev *cdev) 143static int printer_bind(struct usb_composite_dev *cdev)
144{ 144{
145 struct f_printer_opts *opts; 145 struct f_printer_opts *opts;
146 int ret, len; 146 int ret;
147 147
148 fi_printer = usb_get_function_instance("printer"); 148 fi_printer = usb_get_function_instance("printer");
149 if (IS_ERR(fi_printer)) 149 if (IS_ERR(fi_printer))
150 return PTR_ERR(fi_printer); 150 return PTR_ERR(fi_printer);
151 151
152 if (iPNPstring)
153 strlcpy(&pnp_string[2], iPNPstring, PNP_STRING_LEN - 2);
154
155 len = strlen(pnp_string);
156 pnp_string[0] = (len >> 8) & 0xFF;
157 pnp_string[1] = len & 0xFF;
158
159 opts = container_of(fi_printer, struct f_printer_opts, func_inst); 152 opts = container_of(fi_printer, struct f_printer_opts, func_inst);
160 opts->minor = 0; 153 opts->minor = 0;
161 memcpy(opts->pnp_string, pnp_string, PNP_STRING_LEN);
162 opts->q_len = QLEN; 154 opts->q_len = QLEN;
155 if (iPNPstring) {
156 opts->pnp_string = kstrdup(iPNPstring, GFP_KERNEL);
157 if (!opts->pnp_string) {
158 ret = -ENOMEM;
159 goto fail_put_func_inst;
160 }
161 opts->pnp_string_allocated = true;
162 /*
163 * we don't free this memory in case of error
164 * as printer cleanup func will do this for us
165 */
166 } else {
167 opts->pnp_string = pnp_string;
168 }
163 169
164 ret = usb_string_ids_tab(cdev, strings); 170 ret = usb_string_ids_tab(cdev, strings);
165 if (ret < 0) 171 if (ret < 0)
diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index 658b8da60915..4b69f28a9af9 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -60,6 +60,20 @@ config USB_ATMEL_USBA
60 USBA is the integrated high-speed USB Device controller on 60 USBA is the integrated high-speed USB Device controller on
61 the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel. 61 the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
62 62
63 The fifo_mode parameter is used to select endpoint allocation mode.
64 fifo_mode = 0 is used to let the driver autoconfigure the endpoints.
65 In this case 2 banks are allocated for isochronous endpoints and
66 only one bank is allocated for the rest of the endpoints.
67
68 fifo_mode = 1 is a generic maximum fifo size (1024 bytes) configuration
69 allowing the usage of ep1 - ep6
70
71 fifo_mode = 2 is a generic performance maximum fifo size (1024 bytes)
72 configuration allowing the usage of ep1 - ep3
73
74 fifo_mode = 3 is a balanced performance configuration allowing the
75 the usage of ep1 - ep8
76
63config USB_BCM63XX_UDC 77config USB_BCM63XX_UDC
64 tristate "Broadcom BCM63xx Peripheral Controller" 78 tristate "Broadcom BCM63xx Peripheral Controller"
65 depends on BCM63XX 79 depends on BCM63XX
diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c
index 12c7687216e6..11bbce28bc23 100644
--- a/drivers/usb/gadget/udc/atmel_usba_udc.c
+++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
@@ -20,6 +20,7 @@
20#include <linux/mfd/syscon.h> 20#include <linux/mfd/syscon.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/regmap.h> 22#include <linux/regmap.h>
23#include <linux/ctype.h>
23#include <linux/usb/ch9.h> 24#include <linux/usb/ch9.h>
24#include <linux/usb/gadget.h> 25#include <linux/usb/gadget.h>
25#include <linux/usb/atmel_usba_udc.h> 26#include <linux/usb/atmel_usba_udc.h>
@@ -318,6 +319,91 @@ static inline void usba_cleanup_debugfs(struct usba_udc *udc)
318} 319}
319#endif 320#endif
320 321
322static ushort fifo_mode;
323
324/* "modprobe ... fifo_mode=1" etc */
325module_param(fifo_mode, ushort, 0x0);
326MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
327
328/* mode 0 - uses autoconfig */
329
330/* mode 1 - fits in 8KB, generic max fifo configuration */
331static struct usba_fifo_cfg mode_1_cfg[] = {
332{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
333{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
334{ .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 1, },
335{ .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 1, },
336{ .hw_ep_num = 4, .fifo_size = 1024, .nr_banks = 1, },
337{ .hw_ep_num = 5, .fifo_size = 1024, .nr_banks = 1, },
338{ .hw_ep_num = 6, .fifo_size = 1024, .nr_banks = 1, },
339};
340
341/* mode 2 - fits in 8KB, performance max fifo configuration */
342static struct usba_fifo_cfg mode_2_cfg[] = {
343{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
344{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 3, },
345{ .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 2, },
346{ .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 2, },
347};
348
349/* mode 3 - fits in 8KB, mixed fifo configuration */
350static struct usba_fifo_cfg mode_3_cfg[] = {
351{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
352{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
353{ .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
354{ .hw_ep_num = 3, .fifo_size = 512, .nr_banks = 2, },
355{ .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
356{ .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
357{ .hw_ep_num = 6, .fifo_size = 512, .nr_banks = 2, },
358};
359
360/* mode 4 - fits in 8KB, custom fifo configuration */
361static struct usba_fifo_cfg mode_4_cfg[] = {
362{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
363{ .hw_ep_num = 1, .fifo_size = 512, .nr_banks = 2, },
364{ .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
365{ .hw_ep_num = 3, .fifo_size = 8, .nr_banks = 2, },
366{ .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
367{ .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
368{ .hw_ep_num = 6, .fifo_size = 16, .nr_banks = 2, },
369{ .hw_ep_num = 7, .fifo_size = 8, .nr_banks = 2, },
370{ .hw_ep_num = 8, .fifo_size = 8, .nr_banks = 2, },
371};
372/* Add additional configurations here */
373
374int usba_config_fifo_table(struct usba_udc *udc)
375{
376 int n;
377
378 switch (fifo_mode) {
379 default:
380 fifo_mode = 0;
381 case 0:
382 udc->fifo_cfg = NULL;
383 n = 0;
384 break;
385 case 1:
386 udc->fifo_cfg = mode_1_cfg;
387 n = ARRAY_SIZE(mode_1_cfg);
388 break;
389 case 2:
390 udc->fifo_cfg = mode_2_cfg;
391 n = ARRAY_SIZE(mode_2_cfg);
392 break;
393 case 3:
394 udc->fifo_cfg = mode_3_cfg;
395 n = ARRAY_SIZE(mode_3_cfg);
396 break;
397 case 4:
398 udc->fifo_cfg = mode_4_cfg;
399 n = ARRAY_SIZE(mode_4_cfg);
400 break;
401 }
402 DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
403
404 return n;
405}
406
321static inline u32 usba_int_enb_get(struct usba_udc *udc) 407static inline u32 usba_int_enb_get(struct usba_udc *udc)
322{ 408{
323 return udc->int_enb_cache; 409 return udc->int_enb_cache;
@@ -543,24 +629,17 @@ usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
543 ep->is_isoc = 0; 629 ep->is_isoc = 0;
544 ep->is_in = 0; 630 ep->is_in = 0;
545 631
546 if (maxpacket <= 8) 632 DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
547 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
548 else
549 /* LSB is bit 1, not 0 */
550 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
551
552 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
553 ep->ep.name, ept_cfg, maxpacket); 633 ep->ep.name, ept_cfg, maxpacket);
554 634
555 if (usb_endpoint_dir_in(desc)) { 635 if (usb_endpoint_dir_in(desc)) {
556 ep->is_in = 1; 636 ep->is_in = 1;
557 ept_cfg |= USBA_EPT_DIR_IN; 637 ep->ept_cfg |= USBA_EPT_DIR_IN;
558 } 638 }
559 639
560 switch (usb_endpoint_type(desc)) { 640 switch (usb_endpoint_type(desc)) {
561 case USB_ENDPOINT_XFER_CONTROL: 641 case USB_ENDPOINT_XFER_CONTROL:
562 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); 642 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
563 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
564 break; 643 break;
565 case USB_ENDPOINT_XFER_ISOC: 644 case USB_ENDPOINT_XFER_ISOC:
566 if (!ep->can_isoc) { 645 if (!ep->can_isoc) {
@@ -578,24 +657,15 @@ usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
578 return -EINVAL; 657 return -EINVAL;
579 658
580 ep->is_isoc = 1; 659 ep->is_isoc = 1;
581 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); 660 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
661 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
582 662
583 /*
584 * Do triple-buffering on high-bandwidth iso endpoints.
585 */
586 if (nr_trans > 1 && ep->nr_banks == 3)
587 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
588 else
589 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
590 ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
591 break; 663 break;
592 case USB_ENDPOINT_XFER_BULK: 664 case USB_ENDPOINT_XFER_BULK:
593 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); 665 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
594 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
595 break; 666 break;
596 case USB_ENDPOINT_XFER_INT: 667 case USB_ENDPOINT_XFER_INT:
597 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); 668 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
598 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
599 break; 669 break;
600 } 670 }
601 671
@@ -604,7 +674,7 @@ usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
604 ep->ep.desc = desc; 674 ep->ep.desc = desc;
605 ep->ep.maxpacket = maxpacket; 675 ep->ep.maxpacket = maxpacket;
606 676
607 usba_ep_writel(ep, CFG, ept_cfg); 677 usba_ep_writel(ep, CFG, ep->ept_cfg);
608 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); 678 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
609 679
610 if (ep->can_dma) { 680 if (ep->can_dma) {
@@ -1006,12 +1076,81 @@ static int atmel_usba_start(struct usb_gadget *gadget,
1006 struct usb_gadget_driver *driver); 1076 struct usb_gadget_driver *driver);
1007static int atmel_usba_stop(struct usb_gadget *gadget); 1077static int atmel_usba_stop(struct usb_gadget *gadget);
1008 1078
1079static struct usb_ep *atmel_usba_match_ep(
1080 struct usb_gadget *gadget,
1081 struct usb_endpoint_descriptor *desc,
1082 struct usb_ss_ep_comp_descriptor *ep_comp
1083)
1084{
1085 struct usb_ep *_ep;
1086 struct usba_ep *ep;
1087
1088 /* Look at endpoints until an unclaimed one looks usable */
1089 list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1090 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1091 goto found_ep;
1092 }
1093 /* Fail */
1094 return NULL;
1095
1096found_ep:
1097
1098 if (fifo_mode == 0) {
1099 /* Optimize hw fifo size based on ep type and other info */
1100 ep = to_usba_ep(_ep);
1101
1102 switch (usb_endpoint_type(desc)) {
1103
1104 case USB_ENDPOINT_XFER_CONTROL:
1105 break;
1106
1107 case USB_ENDPOINT_XFER_ISOC:
1108 ep->fifo_size = 1024;
1109 ep->nr_banks = 2;
1110 break;
1111
1112 case USB_ENDPOINT_XFER_BULK:
1113 ep->fifo_size = 512;
1114 ep->nr_banks = 1;
1115 break;
1116
1117 case USB_ENDPOINT_XFER_INT:
1118 if (desc->wMaxPacketSize == 0)
1119 ep->fifo_size =
1120 roundup_pow_of_two(_ep->maxpacket_limit);
1121 else
1122 ep->fifo_size =
1123 roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1124 ep->nr_banks = 1;
1125 break;
1126 }
1127
1128 /* It might be a little bit late to set this */
1129 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1130
1131 /* Generate ept_cfg basd on FIFO size and number of banks */
1132 if (ep->fifo_size <= 8)
1133 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1134 else
1135 /* LSB is bit 1, not 0 */
1136 ep->ept_cfg =
1137 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1138
1139 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1140
1141 ep->udc->configured_ep++;
1142 }
1143
1144return _ep;
1145}
1146
1009static const struct usb_gadget_ops usba_udc_ops = { 1147static const struct usb_gadget_ops usba_udc_ops = {
1010 .get_frame = usba_udc_get_frame, 1148 .get_frame = usba_udc_get_frame,
1011 .wakeup = usba_udc_wakeup, 1149 .wakeup = usba_udc_wakeup,
1012 .set_selfpowered = usba_udc_set_selfpowered, 1150 .set_selfpowered = usba_udc_set_selfpowered,
1013 .udc_start = atmel_usba_start, 1151 .udc_start = atmel_usba_start,
1014 .udc_stop = atmel_usba_stop, 1152 .udc_stop = atmel_usba_stop,
1153 .match_ep = atmel_usba_match_ep,
1015}; 1154};
1016 1155
1017static struct usb_endpoint_descriptor usba_ep0_desc = { 1156static struct usb_endpoint_descriptor usba_ep0_desc = {
@@ -1678,7 +1817,8 @@ static irqreturn_t usba_udc_irq(int irq, void *devid)
1678 } 1817 }
1679 1818
1680 if (status & USBA_END_OF_RESET) { 1819 if (status & USBA_END_OF_RESET) {
1681 struct usba_ep *ep0; 1820 struct usba_ep *ep0, *ep;
1821 int i, n;
1682 1822
1683 usba_writel(udc, INT_CLR, USBA_END_OF_RESET); 1823 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1684 generate_bias_pulse(udc); 1824 generate_bias_pulse(udc);
@@ -1717,6 +1857,16 @@ static irqreturn_t usba_udc_irq(int irq, void *devid)
1717 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) 1857 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1718 dev_dbg(&udc->pdev->dev, 1858 dev_dbg(&udc->pdev->dev,
1719 "ODD: EP0 configuration is invalid!\n"); 1859 "ODD: EP0 configuration is invalid!\n");
1860
1861 /* Preallocate other endpoints */
1862 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1863 for (i = 1; i < n; i++) {
1864 ep = &udc->usba_ep[i];
1865 usba_ep_writel(ep, CFG, ep->ept_cfg);
1866 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1867 dev_dbg(&udc->pdev->dev,
1868 "ODD: EP%d configuration is invalid!\n", i);
1869 }
1720 } 1870 }
1721 1871
1722 spin_unlock(&udc->lock); 1872 spin_unlock(&udc->lock);
@@ -1864,6 +2014,9 @@ static int atmel_usba_stop(struct usb_gadget *gadget)
1864 if (gpio_is_valid(udc->vbus_pin)) 2014 if (gpio_is_valid(udc->vbus_pin))
1865 disable_irq(gpio_to_irq(udc->vbus_pin)); 2015 disable_irq(gpio_to_irq(udc->vbus_pin));
1866 2016
2017 if (fifo_mode == 0)
2018 udc->configured_ep = 1;
2019
1867 usba_stop(udc); 2020 usba_stop(udc);
1868 2021
1869 udc->driver = NULL; 2022 udc->driver = NULL;
@@ -1931,9 +2084,13 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
1931 &flags); 2084 &flags);
1932 udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; 2085 udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
1933 2086
1934 pp = NULL; 2087 if (fifo_mode == 0) {
1935 while ((pp = of_get_next_child(np, pp))) 2088 pp = NULL;
1936 udc->num_ep++; 2089 while ((pp = of_get_next_child(np, pp)))
2090 udc->num_ep++;
2091 udc->configured_ep = 1;
2092 } else
2093 udc->num_ep = usba_config_fifo_table(udc);
1937 2094
1938 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep, 2095 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
1939 GFP_KERNEL); 2096 GFP_KERNEL);
@@ -1946,7 +2103,7 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
1946 2103
1947 pp = NULL; 2104 pp = NULL;
1948 i = 0; 2105 i = 0;
1949 while ((pp = of_get_next_child(np, pp))) { 2106 while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
1950 ep = &eps[i]; 2107 ep = &eps[i];
1951 2108
1952 ret = of_property_read_u32(pp, "reg", &val); 2109 ret = of_property_read_u32(pp, "reg", &val);
@@ -1954,21 +2111,21 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
1954 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret); 2111 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
1955 goto err; 2112 goto err;
1956 } 2113 }
1957 ep->index = val; 2114 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
1958 2115
1959 ret = of_property_read_u32(pp, "atmel,fifo-size", &val); 2116 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
1960 if (ret) { 2117 if (ret) {
1961 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret); 2118 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
1962 goto err; 2119 goto err;
1963 } 2120 }
1964 ep->fifo_size = val; 2121 ep->fifo_size = fifo_mode ? udc->fifo_cfg[i].fifo_size : val;
1965 2122
1966 ret = of_property_read_u32(pp, "atmel,nb-banks", &val); 2123 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
1967 if (ret) { 2124 if (ret) {
1968 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret); 2125 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
1969 goto err; 2126 goto err;
1970 } 2127 }
1971 ep->nr_banks = val; 2128 ep->nr_banks = fifo_mode ? udc->fifo_cfg[i].nr_banks : val;
1972 2129
1973 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma"); 2130 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
1974 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc"); 2131 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
@@ -2000,6 +2157,21 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2000 ep->ep.caps.dir_in = true; 2157 ep->ep.caps.dir_in = true;
2001 ep->ep.caps.dir_out = true; 2158 ep->ep.caps.dir_out = true;
2002 2159
2160 if (fifo_mode != 0) {
2161 /*
2162 * Generate ept_cfg based on FIFO size and
2163 * banks number
2164 */
2165 if (ep->fifo_size <= 8)
2166 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2167 else
2168 /* LSB is bit 1, not 0 */
2169 ep->ept_cfg =
2170 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2171
2172 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2173 }
2174
2003 if (i) 2175 if (i)
2004 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 2176 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2005 2177
diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.h b/drivers/usb/gadget/udc/atmel_usba_udc.h
index b03b2ebfc53a..9551b704bfd3 100644
--- a/drivers/usb/gadget/udc/atmel_usba_udc.h
+++ b/drivers/usb/gadget/udc/atmel_usba_udc.h
@@ -275,6 +275,12 @@ struct usba_dma_desc {
275 u32 ctrl; 275 u32 ctrl;
276}; 276};
277 277
278struct usba_fifo_cfg {
279 u8 hw_ep_num;
280 u16 fifo_size;
281 u8 nr_banks;
282};
283
278struct usba_ep { 284struct usba_ep {
279 int state; 285 int state;
280 void __iomem *ep_regs; 286 void __iomem *ep_regs;
@@ -293,7 +299,7 @@ struct usba_ep {
293 unsigned int can_isoc:1; 299 unsigned int can_isoc:1;
294 unsigned int is_isoc:1; 300 unsigned int is_isoc:1;
295 unsigned int is_in:1; 301 unsigned int is_in:1;
296 302 unsigned long ept_cfg;
297#ifdef CONFIG_USB_GADGET_DEBUG_FS 303#ifdef CONFIG_USB_GADGET_DEBUG_FS
298 u32 last_dma_status; 304 u32 last_dma_status;
299 struct dentry *debugfs_dir; 305 struct dentry *debugfs_dir;
@@ -338,6 +344,8 @@ struct usba_udc {
338 int vbus_pin; 344 int vbus_pin;
339 int vbus_pin_inverted; 345 int vbus_pin_inverted;
340 int num_ep; 346 int num_ep;
347 int configured_ep;
348 struct usba_fifo_cfg *fifo_cfg;
341 struct clk *pclk; 349 struct clk *pclk;
342 struct clk *hclk; 350 struct clk *hclk;
343 struct usba_ep *usba_ep; 351 struct usba_ep *usba_ep;
diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c
index 0402177f93cd..d685d82dcf48 100644
--- a/drivers/usb/gadget/udc/core.c
+++ b/drivers/usb/gadget/udc/core.c
@@ -1080,6 +1080,24 @@ static void usb_udc_nop_release(struct device *dev)
1080 dev_vdbg(dev, "%s\n", __func__); 1080 dev_vdbg(dev, "%s\n", __func__);
1081} 1081}
1082 1082
1083/* should be called with udc_lock held */
1084static int check_pending_gadget_drivers(struct usb_udc *udc)
1085{
1086 struct usb_gadget_driver *driver;
1087 int ret = 0;
1088
1089 list_for_each_entry(driver, &gadget_driver_pending_list, pending)
1090 if (!driver->udc_name || strcmp(driver->udc_name,
1091 dev_name(&udc->dev)) == 0) {
1092 ret = udc_bind_to_driver(udc, driver);
1093 if (ret != -EPROBE_DEFER)
1094 list_del(&driver->pending);
1095 break;
1096 }
1097
1098 return ret;
1099}
1100
1083/** 1101/**
1084 * usb_add_gadget_udc_release - adds a new gadget to the udc class driver list 1102 * usb_add_gadget_udc_release - adds a new gadget to the udc class driver list
1085 * @parent: the parent device to this udc. Usually the controller driver's 1103 * @parent: the parent device to this udc. Usually the controller driver's
@@ -1093,7 +1111,6 @@ int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget,
1093 void (*release)(struct device *dev)) 1111 void (*release)(struct device *dev))
1094{ 1112{
1095 struct usb_udc *udc; 1113 struct usb_udc *udc;
1096 struct usb_gadget_driver *driver;
1097 int ret = -ENOMEM; 1114 int ret = -ENOMEM;
1098 1115
1099 udc = kzalloc(sizeof(*udc), GFP_KERNEL); 1116 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
@@ -1136,17 +1153,9 @@ int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget,
1136 udc->vbus = true; 1153 udc->vbus = true;
1137 1154
1138 /* pick up one of pending gadget drivers */ 1155 /* pick up one of pending gadget drivers */
1139 list_for_each_entry(driver, &gadget_driver_pending_list, pending) { 1156 ret = check_pending_gadget_drivers(udc);
1140 if (!driver->udc_name || strcmp(driver->udc_name, 1157 if (ret)
1141 dev_name(&udc->dev)) == 0) { 1158 goto err5;
1142 ret = udc_bind_to_driver(udc, driver);
1143 if (ret != -EPROBE_DEFER)
1144 list_del(&driver->pending);
1145 if (ret)
1146 goto err5;
1147 break;
1148 }
1149 }
1150 1159
1151 mutex_unlock(&udc_lock); 1160 mutex_unlock(&udc_lock);
1152 1161
@@ -1356,14 +1365,22 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1356 return -EINVAL; 1365 return -EINVAL;
1357 1366
1358 mutex_lock(&udc_lock); 1367 mutex_lock(&udc_lock);
1359 list_for_each_entry(udc, &udc_list, list) 1368 list_for_each_entry(udc, &udc_list, list) {
1360 if (udc->driver == driver) { 1369 if (udc->driver == driver) {
1361 usb_gadget_remove_driver(udc); 1370 usb_gadget_remove_driver(udc);
1362 usb_gadget_set_state(udc->gadget, 1371 usb_gadget_set_state(udc->gadget,
1363 USB_STATE_NOTATTACHED); 1372 USB_STATE_NOTATTACHED);
1373
1374 /* Maybe there is someone waiting for this UDC? */
1375 check_pending_gadget_drivers(udc);
1376 /*
1377 * For now we ignore bind errors as probably it's
1378 * not a valid reason to fail other's gadget unbind
1379 */
1364 ret = 0; 1380 ret = 0;
1365 break; 1381 break;
1366 } 1382 }
1383 }
1367 1384
1368 if (ret) { 1385 if (ret) {
1369 list_del(&driver->pending); 1386 list_del(&driver->pending);
diff --git a/drivers/usb/gadget/udc/fotg210-udc.c b/drivers/usb/gadget/udc/fotg210-udc.c
index 6ba122cc7490..78d0204e3e20 100644
--- a/drivers/usb/gadget/udc/fotg210-udc.c
+++ b/drivers/usb/gadget/udc/fotg210-udc.c
@@ -527,7 +527,7 @@ static void fotg210_ep_fifo_flush(struct usb_ep *_ep)
527{ 527{
528} 528}
529 529
530static struct usb_ep_ops fotg210_ep_ops = { 530static const struct usb_ep_ops fotg210_ep_ops = {
531 .enable = fotg210_ep_enable, 531 .enable = fotg210_ep_enable,
532 .disable = fotg210_ep_disable, 532 .disable = fotg210_ep_disable,
533 533
@@ -1058,7 +1058,7 @@ static int fotg210_udc_stop(struct usb_gadget *g)
1058 return 0; 1058 return 0;
1059} 1059}
1060 1060
1061static struct usb_gadget_ops fotg210_gadget_ops = { 1061static const struct usb_gadget_ops fotg210_gadget_ops = {
1062 .udc_start = fotg210_udc_start, 1062 .udc_start = fotg210_udc_start,
1063 .udc_stop = fotg210_udc_stop, 1063 .udc_stop = fotg210_udc_stop,
1064}; 1064};
diff --git a/drivers/usb/gadget/udc/fsl_qe_udc.c b/drivers/usb/gadget/udc/fsl_qe_udc.c
index 4fff51b8a18e..303328ce59ee 100644
--- a/drivers/usb/gadget/udc/fsl_qe_udc.c
+++ b/drivers/usb/gadget/udc/fsl_qe_udc.c
@@ -1847,7 +1847,7 @@ out:
1847 return status; 1847 return status;
1848} 1848}
1849 1849
1850static struct usb_ep_ops qe_ep_ops = { 1850static const struct usb_ep_ops qe_ep_ops = {
1851 .enable = qe_ep_enable, 1851 .enable = qe_ep_enable,
1852 .disable = qe_ep_disable, 1852 .disable = qe_ep_disable,
1853 1853
diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c b/drivers/usb/gadget/udc/fsl_udc_core.c
index 71094e479a96..2e41ef36b944 100644
--- a/drivers/usb/gadget/udc/fsl_udc_core.c
+++ b/drivers/usb/gadget/udc/fsl_udc_core.c
@@ -1118,7 +1118,7 @@ static void fsl_ep_fifo_flush(struct usb_ep *_ep)
1118 } while (fsl_readl(&dr_regs->endptstatus) & bits); 1118 } while (fsl_readl(&dr_regs->endptstatus) & bits);
1119} 1119}
1120 1120
1121static struct usb_ep_ops fsl_ep_ops = { 1121static const struct usb_ep_ops fsl_ep_ops = {
1122 .enable = fsl_ep_enable, 1122 .enable = fsl_ep_enable,
1123 .disable = fsl_ep_disable, 1123 .disable = fsl_ep_disable,
1124 1124
@@ -1248,6 +1248,12 @@ static const struct usb_gadget_ops fsl_gadget_ops = {
1248 .udc_stop = fsl_udc_stop, 1248 .udc_stop = fsl_udc_stop,
1249}; 1249};
1250 1250
1251/*
1252 * Empty complete function used by this driver to fill in the req->complete
1253 * field when creating a request since the complete field is mandatory.
1254 */
1255static void fsl_noop_complete(struct usb_ep *ep, struct usb_request *req) { }
1256
1251/* Set protocol stall on ep0, protocol stall will automatically be cleared 1257/* Set protocol stall on ep0, protocol stall will automatically be cleared
1252 on new transaction */ 1258 on new transaction */
1253static void ep0stall(struct fsl_udc *udc) 1259static void ep0stall(struct fsl_udc *udc)
@@ -1282,7 +1288,7 @@ static int ep0_prime_status(struct fsl_udc *udc, int direction)
1282 req->req.length = 0; 1288 req->req.length = 0;
1283 req->req.status = -EINPROGRESS; 1289 req->req.status = -EINPROGRESS;
1284 req->req.actual = 0; 1290 req->req.actual = 0;
1285 req->req.complete = NULL; 1291 req->req.complete = fsl_noop_complete;
1286 req->dtd_count = 0; 1292 req->dtd_count = 0;
1287 1293
1288 ret = usb_gadget_map_request(&ep->udc->gadget, &req->req, ep_is_in(ep)); 1294 ret = usb_gadget_map_request(&ep->udc->gadget, &req->req, ep_is_in(ep));
@@ -1365,7 +1371,7 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1365 req->req.length = 2; 1371 req->req.length = 2;
1366 req->req.status = -EINPROGRESS; 1372 req->req.status = -EINPROGRESS;
1367 req->req.actual = 0; 1373 req->req.actual = 0;
1368 req->req.complete = NULL; 1374 req->req.complete = fsl_noop_complete;
1369 req->dtd_count = 0; 1375 req->dtd_count = 0;
1370 1376
1371 ret = usb_gadget_map_request(&ep->udc->gadget, &req->req, ep_is_in(ep)); 1377 ret = usb_gadget_map_request(&ep->udc->gadget, &req->req, ep_is_in(ep));
diff --git a/drivers/usb/gadget/udc/fusb300_udc.c b/drivers/usb/gadget/udc/fusb300_udc.c
index 42ff308578df..e0c1b0099265 100644
--- a/drivers/usb/gadget/udc/fusb300_udc.c
+++ b/drivers/usb/gadget/udc/fusb300_udc.c
@@ -518,7 +518,7 @@ static void fusb300_fifo_flush(struct usb_ep *_ep)
518{ 518{
519} 519}
520 520
521static struct usb_ep_ops fusb300_ep_ops = { 521static const struct usb_ep_ops fusb300_ep_ops = {
522 .enable = fusb300_enable, 522 .enable = fusb300_enable,
523 .disable = fusb300_disable, 523 .disable = fusb300_disable,
524 524
diff --git a/drivers/usb/gadget/udc/goku_udc.c b/drivers/usb/gadget/udc/goku_udc.c
index 5107987bd353..8433c22900dc 100644
--- a/drivers/usb/gadget/udc/goku_udc.c
+++ b/drivers/usb/gadget/udc/goku_udc.c
@@ -968,7 +968,7 @@ static void goku_fifo_flush(struct usb_ep *_ep)
968 command(regs, COMMAND_FIFO_CLEAR, ep->num); 968 command(regs, COMMAND_FIFO_CLEAR, ep->num);
969} 969}
970 970
971static struct usb_ep_ops goku_ep_ops = { 971static const struct usb_ep_ops goku_ep_ops = {
972 .enable = goku_ep_enable, 972 .enable = goku_ep_enable,
973 .disable = goku_ep_disable, 973 .disable = goku_ep_disable,
974 974
diff --git a/drivers/usb/gadget/udc/gr_udc.c b/drivers/usb/gadget/udc/gr_udc.c
index b16f8af34050..1f9941145746 100644
--- a/drivers/usb/gadget/udc/gr_udc.c
+++ b/drivers/usb/gadget/udc/gr_udc.c
@@ -1841,7 +1841,7 @@ static void gr_fifo_flush(struct usb_ep *_ep)
1841 spin_unlock(&ep->dev->lock); 1841 spin_unlock(&ep->dev->lock);
1842} 1842}
1843 1843
1844static struct usb_ep_ops gr_ep_ops = { 1844static const struct usb_ep_ops gr_ep_ops = {
1845 .enable = gr_ep_enable, 1845 .enable = gr_ep_enable,
1846 .disable = gr_ep_disable, 1846 .disable = gr_ep_disable,
1847 1847
diff --git a/drivers/usb/gadget/udc/m66592-udc.c b/drivers/usb/gadget/udc/m66592-udc.c
index de3e03483659..46ce7bc15f2b 100644
--- a/drivers/usb/gadget/udc/m66592-udc.c
+++ b/drivers/usb/gadget/udc/m66592-udc.c
@@ -1436,7 +1436,7 @@ static void m66592_fifo_flush(struct usb_ep *_ep)
1436 spin_unlock_irqrestore(&ep->m66592->lock, flags); 1436 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1437} 1437}
1438 1438
1439static struct usb_ep_ops m66592_ep_ops = { 1439static const struct usb_ep_ops m66592_ep_ops = {
1440 .enable = m66592_enable, 1440 .enable = m66592_enable,
1441 .disable = m66592_disable, 1441 .disable = m66592_disable,
1442 1442
diff --git a/drivers/usb/gadget/udc/mv_u3d_core.c b/drivers/usb/gadget/udc/mv_u3d_core.c
index 8d726bd767fd..d365449a295a 100644
--- a/drivers/usb/gadget/udc/mv_u3d_core.c
+++ b/drivers/usb/gadget/udc/mv_u3d_core.c
@@ -995,7 +995,7 @@ static int mv_u3d_ep_set_wedge(struct usb_ep *_ep)
995 return mv_u3d_ep_set_halt_wedge(_ep, 1, 1); 995 return mv_u3d_ep_set_halt_wedge(_ep, 1, 1);
996} 996}
997 997
998static struct usb_ep_ops mv_u3d_ep_ops = { 998static const struct usb_ep_ops mv_u3d_ep_ops = {
999 .enable = mv_u3d_ep_enable, 999 .enable = mv_u3d_ep_enable,
1000 .disable = mv_u3d_ep_disable, 1000 .disable = mv_u3d_ep_disable,
1001 1001
diff --git a/drivers/usb/gadget/udc/mv_udc_core.c b/drivers/usb/gadget/udc/mv_udc_core.c
index d82a91bddbd9..27ebb0d5449d 100644
--- a/drivers/usb/gadget/udc/mv_udc_core.c
+++ b/drivers/usb/gadget/udc/mv_udc_core.c
@@ -946,7 +946,7 @@ static int mv_ep_set_wedge(struct usb_ep *_ep)
946 return mv_ep_set_halt_wedge(_ep, 1, 1); 946 return mv_ep_set_halt_wedge(_ep, 1, 1);
947} 947}
948 948
949static struct usb_ep_ops mv_ep_ops = { 949static const struct usb_ep_ops mv_ep_ops = {
950 .enable = mv_ep_enable, 950 .enable = mv_ep_enable,
951 .disable = mv_ep_disable, 951 .disable = mv_ep_disable,
952 952
diff --git a/drivers/usb/gadget/udc/net2272.c b/drivers/usb/gadget/udc/net2272.c
index 078c91d546e0..7dc0102abdfe 100644
--- a/drivers/usb/gadget/udc/net2272.c
+++ b/drivers/usb/gadget/udc/net2272.c
@@ -181,7 +181,7 @@ static void net2272_dequeue_all(struct net2272_ep *);
181static int net2272_kick_dma(struct net2272_ep *, struct net2272_request *); 181static int net2272_kick_dma(struct net2272_ep *, struct net2272_request *);
182static int net2272_fifo_status(struct usb_ep *); 182static int net2272_fifo_status(struct usb_ep *);
183 183
184static struct usb_ep_ops net2272_ep_ops; 184static const struct usb_ep_ops net2272_ep_ops;
185 185
186/*---------------------------------------------------------------------------*/ 186/*---------------------------------------------------------------------------*/
187 187
@@ -1067,7 +1067,7 @@ net2272_fifo_flush(struct usb_ep *_ep)
1067 net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH); 1067 net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH);
1068} 1068}
1069 1069
1070static struct usb_ep_ops net2272_ep_ops = { 1070static const struct usb_ep_ops net2272_ep_ops = {
1071 .enable = net2272_enable, 1071 .enable = net2272_enable,
1072 .disable = net2272_disable, 1072 .disable = net2272_disable,
1073 1073
diff --git a/drivers/usb/gadget/udc/omap_udc.c b/drivers/usb/gadget/udc/omap_udc.c
index a8709f9e5648..f05ba6825bfe 100644
--- a/drivers/usb/gadget/udc/omap_udc.c
+++ b/drivers/usb/gadget/udc/omap_udc.c
@@ -1112,7 +1112,7 @@ done:
1112 return status; 1112 return status;
1113} 1113}
1114 1114
1115static struct usb_ep_ops omap_ep_ops = { 1115static const struct usb_ep_ops omap_ep_ops = {
1116 .enable = omap_ep_enable, 1116 .enable = omap_ep_enable,
1117 .disable = omap_ep_disable, 1117 .disable = omap_ep_disable,
1118 1118
diff --git a/drivers/usb/gadget/udc/pxa27x_udc.c b/drivers/usb/gadget/udc/pxa27x_udc.c
index 7fa60f5b7ae4..e1335ad5bce9 100644
--- a/drivers/usb/gadget/udc/pxa27x_udc.c
+++ b/drivers/usb/gadget/udc/pxa27x_udc.c
@@ -1473,7 +1473,7 @@ static int pxa_ep_disable(struct usb_ep *_ep)
1473 return 0; 1473 return 0;
1474} 1474}
1475 1475
1476static struct usb_ep_ops pxa_ep_ops = { 1476static const struct usb_ep_ops pxa_ep_ops = {
1477 .enable = pxa_ep_enable, 1477 .enable = pxa_ep_enable,
1478 .disable = pxa_ep_disable, 1478 .disable = pxa_ep_disable,
1479 1479
diff --git a/drivers/usb/gadget/udc/r8a66597-udc.c b/drivers/usb/gadget/udc/r8a66597-udc.c
index f2c8862093a2..118ad70f1af0 100644
--- a/drivers/usb/gadget/udc/r8a66597-udc.c
+++ b/drivers/usb/gadget/udc/r8a66597-udc.c
@@ -1706,7 +1706,7 @@ static void r8a66597_fifo_flush(struct usb_ep *_ep)
1706 spin_unlock_irqrestore(&ep->r8a66597->lock, flags); 1706 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1707} 1707}
1708 1708
1709static struct usb_ep_ops r8a66597_ep_ops = { 1709static const struct usb_ep_ops r8a66597_ep_ops = {
1710 .enable = r8a66597_enable, 1710 .enable = r8a66597_enable,
1711 .disable = r8a66597_disable, 1711 .disable = r8a66597_disable,
1712 1712
diff --git a/drivers/usb/gadget/udc/s3c-hsudc.c b/drivers/usb/gadget/udc/s3c-hsudc.c
index 82a9e2a3bedc..42587b738a1f 100644
--- a/drivers/usb/gadget/udc/s3c-hsudc.c
+++ b/drivers/usb/gadget/udc/s3c-hsudc.c
@@ -954,7 +954,7 @@ static int s3c_hsudc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
954 return 0; 954 return 0;
955} 955}
956 956
957static struct usb_ep_ops s3c_hsudc_ep_ops = { 957static const struct usb_ep_ops s3c_hsudc_ep_ops = {
958 .enable = s3c_hsudc_ep_enable, 958 .enable = s3c_hsudc_ep_enable,
959 .disable = s3c_hsudc_ep_disable, 959 .disable = s3c_hsudc_ep_disable,
960 .alloc_request = s3c_hsudc_alloc_request, 960 .alloc_request = s3c_hsudc_alloc_request,
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 6361fc739306..407d947b34ea 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -45,9 +45,9 @@ config USB_XHCI_PLATFORM
45 If unsure, say N. 45 If unsure, say N.
46 46
47config USB_XHCI_MTK 47config USB_XHCI_MTK
48 tristate "xHCI support for Mediatek MT65xx" 48 tristate "xHCI support for Mediatek MT65xx/MT7621"
49 select MFD_SYSCON 49 select MFD_SYSCON
50 depends on ARCH_MEDIATEK || COMPILE_TEST 50 depends on (MIPS && SOC_MT7621) || ARCH_MEDIATEK || COMPILE_TEST
51 ---help--- 51 ---help---
52 Say 'Y' to enable the support for the xHCI host controller 52 Say 'Y' to enable the support for the xHCI host controller
53 found in Mediatek MT65xx SoCs. 53 found in Mediatek MT65xx SoCs.
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 42e5b66353ef..7a603f66a9bc 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -77,10 +77,12 @@ static int exynos_ehci_get_phy(struct device *dev,
77 if (IS_ERR(phy)) { 77 if (IS_ERR(phy)) {
78 ret = PTR_ERR(phy); 78 ret = PTR_ERR(phy);
79 if (ret == -EPROBE_DEFER) { 79 if (ret == -EPROBE_DEFER) {
80 of_node_put(child);
80 return ret; 81 return ret;
81 } else if (ret != -ENOSYS && ret != -ENODEV) { 82 } else if (ret != -ENOSYS && ret != -ENODEV) {
82 dev_err(dev, 83 dev_err(dev,
83 "Error retrieving usb2 phy: %d\n", ret); 84 "Error retrieving usb2 phy: %d\n", ret);
85 of_node_put(child);
84 return ret; 86 return ret;
85 } 87 }
86 } 88 }
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 91701cc68082..3733aab46efe 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -600,7 +600,7 @@ static int ehci_fsl_drv_restore(struct device *dev)
600 return 0; 600 return 0;
601} 601}
602 602
603static struct dev_pm_ops ehci_fsl_pm_ops = { 603static const struct dev_pm_ops ehci_fsl_pm_ops = {
604 .suspend = ehci_fsl_drv_suspend, 604 .suspend = ehci_fsl_drv_suspend,
605 .resume = ehci_fsl_drv_resume, 605 .resume = ehci_fsl_drv_resume,
606 .restore = ehci_fsl_drv_restore, 606 .restore = ehci_fsl_drv_restore,
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
index 2cd105be7319..6865b919403f 100644
--- a/drivers/usb/host/ohci-exynos.c
+++ b/drivers/usb/host/ohci-exynos.c
@@ -66,10 +66,12 @@ static int exynos_ohci_get_phy(struct device *dev,
66 if (IS_ERR(phy)) { 66 if (IS_ERR(phy)) {
67 ret = PTR_ERR(phy); 67 ret = PTR_ERR(phy);
68 if (ret == -EPROBE_DEFER) { 68 if (ret == -EPROBE_DEFER) {
69 of_node_put(child);
69 return ret; 70 return ret;
70 } else if (ret != -ENOSYS && ret != -ENODEV) { 71 } else if (ret != -ENOSYS && ret != -ENODEV) {
71 dev_err(dev, 72 dev_err(dev,
72 "Error retrieving usb2 phy: %d\n", ret); 73 "Error retrieving usb2 phy: %d\n", ret);
74 of_node_put(child);
73 return ret; 75 return ret;
74 } 76 }
75 } 77 }
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index ed678c17c4ea..248eb7702463 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -17,21 +17,21 @@
17 ohci_dbg (hc, \ 17 ohci_dbg (hc, \
18 "%s roothub.portstatus [%d] " \ 18 "%s roothub.portstatus [%d] " \
19 "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \ 19 "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
20 label, num, temp, \ 20 label, num, value, \
21 (temp & RH_PS_PRSC) ? " PRSC" : "", \ 21 (value & RH_PS_PRSC) ? " PRSC" : "", \
22 (temp & RH_PS_OCIC) ? " OCIC" : "", \ 22 (value & RH_PS_OCIC) ? " OCIC" : "", \
23 (temp & RH_PS_PSSC) ? " PSSC" : "", \ 23 (value & RH_PS_PSSC) ? " PSSC" : "", \
24 (temp & RH_PS_PESC) ? " PESC" : "", \ 24 (value & RH_PS_PESC) ? " PESC" : "", \
25 (temp & RH_PS_CSC) ? " CSC" : "", \ 25 (value & RH_PS_CSC) ? " CSC" : "", \
26 \ 26 \
27 (temp & RH_PS_LSDA) ? " LSDA" : "", \ 27 (value & RH_PS_LSDA) ? " LSDA" : "", \
28 (temp & RH_PS_PPS) ? " PPS" : "", \ 28 (value & RH_PS_PPS) ? " PPS" : "", \
29 (temp & RH_PS_PRS) ? " PRS" : "", \ 29 (value & RH_PS_PRS) ? " PRS" : "", \
30 (temp & RH_PS_POCI) ? " POCI" : "", \ 30 (value & RH_PS_POCI) ? " POCI" : "", \
31 (temp & RH_PS_PSS) ? " PSS" : "", \ 31 (value & RH_PS_PSS) ? " PSS" : "", \
32 \ 32 \
33 (temp & RH_PS_PES) ? " PES" : "", \ 33 (value & RH_PS_PES) ? " PES" : "", \
34 (temp & RH_PS_CCS) ? " CCS" : "" \ 34 (value & RH_PS_CCS) ? " CCS" : "" \
35 ); 35 );
36 36
37/*-------------------------------------------------------------------------*/ 37/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index b08e385399b9..a4d814b7f380 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -227,8 +227,7 @@ static int ohci_omap_reset(struct usb_hcd *hcd)
227 return status; 227 return status;
228 } 228 }
229 } else { 229 } else {
230 dev_err(hcd->self.controller, "can't find phy\n"); 230 return -EPROBE_DEFER;
231 return -ENODEV;
232 } 231 }
233 ohci->start_hnp = start_hnp; 232 ohci->start_hnp = start_hnp;
234 } 233 }
diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c
index 4e4d601af35c..bcf531c44c70 100644
--- a/drivers/usb/host/oxu210hp-hcd.c
+++ b/drivers/usb/host/oxu210hp-hcd.c
@@ -2288,9 +2288,7 @@ restart:
2288 2288
2289 while (q.ptr != NULL) { 2289 while (q.ptr != NULL) {
2290 union ehci_shadow temp; 2290 union ehci_shadow temp;
2291 int live;
2292 2291
2293 live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state);
2294 switch (type) { 2292 switch (type) {
2295 case Q_TYPE_QH: 2293 case Q_TYPE_QH:
2296 /* handle any completions */ 2294 /* handle any completions */
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c
index 74c42f722678..363d125300ea 100644
--- a/drivers/usb/host/xhci-dbg.c
+++ b/drivers/usb/host/xhci-dbg.c
@@ -37,10 +37,8 @@ void xhci_dbg_regs(struct xhci_hcd *xhci)
37 &xhci->cap_regs->hc_capbase, temp); 37 &xhci->cap_regs->hc_capbase, temp);
38 xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n", 38 xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n",
39 (unsigned int) HC_LENGTH(temp)); 39 (unsigned int) HC_LENGTH(temp));
40#if 0
41 xhci_dbg(xhci, "// HCIVERSION: 0x%x\n", 40 xhci_dbg(xhci, "// HCIVERSION: 0x%x\n",
42 (unsigned int) HC_VERSION(temp)); 41 (unsigned int) HC_VERSION(temp));
43#endif
44 42
45 xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs); 43 xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs);
46 44
@@ -177,7 +175,7 @@ static void xhci_print_ports(struct xhci_hcd *xhci)
177 ports = HCS_MAX_PORTS(xhci->hcs_params1); 175 ports = HCS_MAX_PORTS(xhci->hcs_params1);
178 addr = &xhci->op_regs->port_status_base; 176 addr = &xhci->op_regs->port_status_base;
179 for (i = 0; i < ports; i++) { 177 for (i = 0; i < ports; i++) {
180 for (j = 0; j < NUM_PORT_REGS; ++j) { 178 for (j = 0; j < NUM_PORT_REGS; j++) {
181 xhci_dbg(xhci, "%p port %s reg = 0x%x\n", 179 xhci_dbg(xhci, "%p port %s reg = 0x%x\n",
182 addr, names[j], 180 addr, names[j],
183 (unsigned int) readl(addr)); 181 (unsigned int) readl(addr));
@@ -240,7 +238,7 @@ void xhci_print_run_regs(struct xhci_hcd *xhci)
240 xhci_dbg(xhci, " %p: Microframe index = 0x%x\n", 238 xhci_dbg(xhci, " %p: Microframe index = 0x%x\n",
241 &xhci->run_regs->microframe_index, 239 &xhci->run_regs->microframe_index,
242 (unsigned int) temp); 240 (unsigned int) temp);
243 for (i = 0; i < 7; ++i) { 241 for (i = 0; i < 7; i++) {
244 temp = readl(&xhci->run_regs->rsvd[i]); 242 temp = readl(&xhci->run_regs->rsvd[i]);
245 if (temp != XHCI_INIT_VALUE) 243 if (temp != XHCI_INIT_VALUE)
246 xhci_dbg(xhci, " WARN: %p: Rsvd[%i] = 0x%x\n", 244 xhci_dbg(xhci, " WARN: %p: Rsvd[%i] = 0x%x\n",
@@ -259,7 +257,7 @@ void xhci_print_registers(struct xhci_hcd *xhci)
259void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb) 257void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb)
260{ 258{
261 int i; 259 int i;
262 for (i = 0; i < 4; ++i) 260 for (i = 0; i < 4; i++)
263 xhci_dbg(xhci, "Offset 0x%x = 0x%x\n", 261 xhci_dbg(xhci, "Offset 0x%x = 0x%x\n",
264 i*4, trb->generic.field[i]); 262 i*4, trb->generic.field[i]);
265} 263}
@@ -332,7 +330,7 @@ void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg)
332 u64 addr = seg->dma; 330 u64 addr = seg->dma;
333 union xhci_trb *trb = seg->trbs; 331 union xhci_trb *trb = seg->trbs;
334 332
335 for (i = 0; i < TRBS_PER_SEGMENT; ++i) { 333 for (i = 0; i < TRBS_PER_SEGMENT; i++) {
336 trb = &seg->trbs[i]; 334 trb = &seg->trbs[i];
337 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr, 335 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr,
338 lower_32_bits(le64_to_cpu(trb->link.segment_ptr)), 336 lower_32_bits(le64_to_cpu(trb->link.segment_ptr)),
@@ -413,7 +411,7 @@ void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
413 int i; 411 int i;
414 struct xhci_erst_entry *entry; 412 struct xhci_erst_entry *entry;
415 413
416 for (i = 0; i < erst->num_entries; ++i) { 414 for (i = 0; i < erst->num_entries; i++) {
417 entry = &erst->entries[i]; 415 entry = &erst->entries[i];
418 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", 416 xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n",
419 addr, 417 addr,
@@ -440,7 +438,7 @@ void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci)
440static void dbg_rsvd64(struct xhci_hcd *xhci, u64 *ctx, dma_addr_t dma) 438static void dbg_rsvd64(struct xhci_hcd *xhci, u64 *ctx, dma_addr_t dma)
441{ 439{
442 int i; 440 int i;
443 for (i = 0; i < 4; ++i) { 441 for (i = 0; i < 4; i++) {
444 xhci_dbg(xhci, "@%p (virt) @%08llx " 442 xhci_dbg(xhci, "@%p (virt) @%08llx "
445 "(dma) %#08llx - rsvd64[%d]\n", 443 "(dma) %#08llx - rsvd64[%d]\n",
446 &ctx[4 + i], (unsigned long long)dma, 444 &ctx[4 + i], (unsigned long long)dma,
@@ -496,7 +494,7 @@ static void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *
496 &slot_ctx->dev_state, 494 &slot_ctx->dev_state,
497 (unsigned long long)dma, slot_ctx->dev_state); 495 (unsigned long long)dma, slot_ctx->dev_state);
498 dma += field_size; 496 dma += field_size;
499 for (i = 0; i < 4; ++i) { 497 for (i = 0; i < 4; i++) {
500 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n", 498 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
501 &slot_ctx->reserved[i], (unsigned long long)dma, 499 &slot_ctx->reserved[i], (unsigned long long)dma,
502 slot_ctx->reserved[i], i); 500 slot_ctx->reserved[i], i);
@@ -519,7 +517,7 @@ static void xhci_dbg_ep_ctx(struct xhci_hcd *xhci,
519 517
520 if (last_ep < 31) 518 if (last_ep < 31)
521 last_ep_ctx = last_ep + 1; 519 last_ep_ctx = last_ep + 1;
522 for (i = 0; i < last_ep_ctx; ++i) { 520 for (i = 0; i < last_ep_ctx; i++) {
523 unsigned int epaddr = xhci_get_endpoint_address(i); 521 unsigned int epaddr = xhci_get_endpoint_address(i);
524 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, ctx, i); 522 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, ctx, i);
525 dma_addr_t dma = ctx->dma + 523 dma_addr_t dma = ctx->dma +
@@ -544,7 +542,7 @@ static void xhci_dbg_ep_ctx(struct xhci_hcd *xhci,
544 &ep_ctx->tx_info, 542 &ep_ctx->tx_info,
545 (unsigned long long)dma, ep_ctx->tx_info); 543 (unsigned long long)dma, ep_ctx->tx_info);
546 dma += field_size; 544 dma += field_size;
547 for (j = 0; j < 3; ++j) { 545 for (j = 0; j < 3; j++) {
548 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n", 546 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
549 &ep_ctx->reserved[j], 547 &ep_ctx->reserved[j],
550 (unsigned long long)dma, 548 (unsigned long long)dma,
@@ -583,7 +581,7 @@ void xhci_dbg_ctx(struct xhci_hcd *xhci,
583 &ctrl_ctx->add_flags, (unsigned long long)dma, 581 &ctrl_ctx->add_flags, (unsigned long long)dma,
584 ctrl_ctx->add_flags); 582 ctrl_ctx->add_flags);
585 dma += field_size; 583 dma += field_size;
586 for (i = 0; i < 6; ++i) { 584 for (i = 0; i < 6; i++) {
587 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd2[%d]\n", 585 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd2[%d]\n",
588 &ctrl_ctx->rsvd2[i], (unsigned long long)dma, 586 &ctrl_ctx->rsvd2[i], (unsigned long long)dma,
589 ctrl_ctx->rsvd2[i], i); 587 ctrl_ctx->rsvd2[i], i);
diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
index e0244fb3903d..28deea584884 100644
--- a/drivers/usb/host/xhci-ext-caps.h
+++ b/drivers/usb/host/xhci-ext-caps.h
@@ -117,7 +117,7 @@ static inline int xhci_find_next_ext_cap(void __iomem *base, u32 start, int id)
117 offset = XHCI_HCC_EXT_CAPS(val) << 2; 117 offset = XHCI_HCC_EXT_CAPS(val) << 2;
118 if (!offset) 118 if (!offset)
119 return 0; 119 return 0;
120 }; 120 }
121 do { 121 do {
122 val = readl(base + offset); 122 val = readl(base + offset);
123 if (val == ~0) 123 if (val == ~0)
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index 0ef16900efed..3bddeaa1e2d7 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -389,6 +389,8 @@ static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
389 if (!virt_dev) 389 if (!virt_dev)
390 return -ENODEV; 390 return -ENODEV;
391 391
392 trace_xhci_stop_device(virt_dev);
393
392 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO); 394 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
393 if (!cmd) { 395 if (!cmd) {
394 xhci_dbg(xhci, "Couldn't allocate command structure.\n"); 396 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
@@ -418,7 +420,8 @@ static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
418 /* Wait for last stop endpoint command to finish */ 420 /* Wait for last stop endpoint command to finish */
419 wait_for_completion(cmd->completion); 421 wait_for_completion(cmd->completion);
420 422
421 if (cmd->status == COMP_CMD_ABORT || cmd->status == COMP_CMD_STOP) { 423 if (cmd->status == COMP_COMMAND_ABORTED ||
424 cmd->status == COMP_STOPPED) {
422 xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n"); 425 xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n");
423 ret = -ETIME; 426 ret = -ETIME;
424 } 427 }
@@ -458,6 +461,12 @@ static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
458 return; 461 return;
459 } 462 }
460 463
464 if (xhci->quirks & XHCI_BROKEN_PORT_PED) {
465 xhci_dbg(xhci,
466 "Broken Port Enabled/Disabled, ignoring port disable request.\n");
467 return;
468 }
469
461 /* Write 1 to disable the port */ 470 /* Write 1 to disable the port */
462 writel(port_status | PORT_PE, addr); 471 writel(port_status | PORT_PE, addr);
463 port_status = readl(addr); 472 port_status = readl(addr);
@@ -990,8 +999,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
990 temp = readl(port_array[wIndex]); 999 temp = readl(port_array[wIndex]);
991 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) 1000 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
992 || (temp & PORT_PLS_MASK) >= XDEV_U3) { 1001 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
993 xhci_warn(xhci, "USB core suspending device " 1002 xhci_warn(xhci, "USB core suspending device not in U0/U1/U2.\n");
994 "not in U0/U1/U2.\n");
995 goto error; 1003 goto error;
996 } 1004 }
997 1005
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 8414ed2a02de..ba1853f4e407 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -936,6 +936,9 @@ void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
936 return; 936 return;
937 937
938 dev = xhci->devs[slot_id]; 938 dev = xhci->devs[slot_id];
939
940 trace_xhci_free_virt_device(dev);
941
939 xhci->dcbaa->dev_context_ptrs[slot_id] = 0; 942 xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
940 if (!dev) 943 if (!dev)
941 return; 944 return;
@@ -943,7 +946,7 @@ void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
943 if (dev->tt_info) 946 if (dev->tt_info)
944 old_active_eps = dev->tt_info->active_eps; 947 old_active_eps = dev->tt_info->active_eps;
945 948
946 for (i = 0; i < 31; ++i) { 949 for (i = 0; i < 31; i++) {
947 if (dev->eps[i].ring) 950 if (dev->eps[i].ring)
948 xhci_ring_free(xhci, dev->eps[i].ring); 951 xhci_ring_free(xhci, dev->eps[i].ring);
949 if (dev->eps[i].stream_info) 952 if (dev->eps[i].stream_info)
@@ -1075,6 +1078,8 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
1075 &xhci->dcbaa->dev_context_ptrs[slot_id], 1078 &xhci->dcbaa->dev_context_ptrs[slot_id],
1076 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id])); 1079 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id]));
1077 1080
1081 trace_xhci_alloc_virt_device(dev);
1082
1078 return 1; 1083 return 1;
1079fail: 1084fail:
1080 xhci_free_virt_device(xhci, slot_id); 1085 xhci_free_virt_device(xhci, slot_id);
@@ -1249,6 +1254,8 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
1249 ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma | 1254 ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma |
1250 dev->eps[0].ring->cycle_state); 1255 dev->eps[0].ring->cycle_state);
1251 1256
1257 trace_xhci_setup_addressable_virt_device(dev);
1258
1252 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */ 1259 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
1253 1260
1254 return 0; 1261 return 0;
@@ -1414,14 +1421,16 @@ static u32 xhci_get_endpoint_type(struct usb_host_endpoint *ep)
1414 1421
1415 in = usb_endpoint_dir_in(&ep->desc); 1422 in = usb_endpoint_dir_in(&ep->desc);
1416 1423
1417 if (usb_endpoint_xfer_control(&ep->desc)) 1424 switch (usb_endpoint_type(&ep->desc)) {
1425 case USB_ENDPOINT_XFER_CONTROL:
1418 return CTRL_EP; 1426 return CTRL_EP;
1419 if (usb_endpoint_xfer_bulk(&ep->desc)) 1427 case USB_ENDPOINT_XFER_BULK:
1420 return in ? BULK_IN_EP : BULK_OUT_EP; 1428 return in ? BULK_IN_EP : BULK_OUT_EP;
1421 if (usb_endpoint_xfer_isoc(&ep->desc)) 1429 case USB_ENDPOINT_XFER_ISOC:
1422 return in ? ISOC_IN_EP : ISOC_OUT_EP; 1430 return in ? ISOC_IN_EP : ISOC_OUT_EP;
1423 if (usb_endpoint_xfer_int(&ep->desc)) 1431 case USB_ENDPOINT_XFER_INT:
1424 return in ? INT_IN_EP : INT_OUT_EP; 1432 return in ? INT_IN_EP : INT_OUT_EP;
1433 }
1425 return 0; 1434 return 0;
1426} 1435}
1427 1436
@@ -1587,7 +1596,7 @@ void xhci_update_bw_info(struct xhci_hcd *xhci,
1587 unsigned int ep_type; 1596 unsigned int ep_type;
1588 int i; 1597 int i;
1589 1598
1590 for (i = 1; i < 31; ++i) { 1599 for (i = 1; i < 31; i++) {
1591 bw_info = &virt_dev->eps[i].bw_info; 1600 bw_info = &virt_dev->eps[i].bw_info;
1592 1601
1593 /* We can't tell what endpoint type is being dropped, but 1602 /* We can't tell what endpoint type is being dropped, but
@@ -1808,10 +1817,7 @@ struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci,
1808 1817
1809void xhci_urb_free_priv(struct urb_priv *urb_priv) 1818void xhci_urb_free_priv(struct urb_priv *urb_priv)
1810{ 1819{
1811 if (urb_priv) { 1820 kfree(urb_priv);
1812 kfree(urb_priv->td[0]);
1813 kfree(urb_priv);
1814 }
1815} 1821}
1816 1822
1817void xhci_free_command(struct xhci_hcd *xhci, 1823void xhci_free_command(struct xhci_hcd *xhci,
@@ -2569,9 +2575,9 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2569 * something other than the default (~1ms minimum between interrupts). 2575 * something other than the default (~1ms minimum between interrupts).
2570 * See section 5.5.1.2. 2576 * See section 5.5.1.2.
2571 */ 2577 */
2572 for (i = 0; i < MAX_HC_SLOTS; ++i) 2578 for (i = 0; i < MAX_HC_SLOTS; i++)
2573 xhci->devs[i] = NULL; 2579 xhci->devs[i] = NULL;
2574 for (i = 0; i < USB_MAXCHILDREN; ++i) { 2580 for (i = 0; i < USB_MAXCHILDREN; i++) {
2575 xhci->bus_state[0].resume_done[i] = 0; 2581 xhci->bus_state[0].resume_done[i] = 0;
2576 xhci->bus_state[1].resume_done[i] = 0; 2582 xhci->bus_state[1].resume_done[i] = 0;
2577 /* Only the USB 2.0 completions will ever be used. */ 2583 /* Only the USB 2.0 completions will ever be used. */
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index bac961cd24ad..9066ec9e0c2e 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -212,6 +212,12 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
212{ 212{
213 int ret; 213 int ret;
214 214
215 ret = clk_prepare_enable(mtk->ref_clk);
216 if (ret) {
217 dev_err(mtk->dev, "failed to enable ref_clk\n");
218 goto ref_clk_err;
219 }
220
215 ret = clk_prepare_enable(mtk->sys_clk); 221 ret = clk_prepare_enable(mtk->sys_clk);
216 if (ret) { 222 if (ret) {
217 dev_err(mtk->dev, "failed to enable sys_clk\n"); 223 dev_err(mtk->dev, "failed to enable sys_clk\n");
@@ -238,6 +244,8 @@ usb_p1_err:
238usb_p0_err: 244usb_p0_err:
239 clk_disable_unprepare(mtk->sys_clk); 245 clk_disable_unprepare(mtk->sys_clk);
240sys_clk_err: 246sys_clk_err:
247 clk_disable_unprepare(mtk->ref_clk);
248ref_clk_err:
241 return -EINVAL; 249 return -EINVAL;
242} 250}
243 251
@@ -248,6 +256,7 @@ static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
248 clk_disable_unprepare(mtk->wk_deb_p0); 256 clk_disable_unprepare(mtk->wk_deb_p0);
249 } 257 }
250 clk_disable_unprepare(mtk->sys_clk); 258 clk_disable_unprepare(mtk->sys_clk);
259 clk_disable_unprepare(mtk->ref_clk);
251} 260}
252 261
253/* only clocks can be turn off for ip-sleep wakeup mode */ 262/* only clocks can be turn off for ip-sleep wakeup mode */
@@ -550,6 +559,19 @@ static int xhci_mtk_probe(struct platform_device *pdev)
550 return PTR_ERR(mtk->sys_clk); 559 return PTR_ERR(mtk->sys_clk);
551 } 560 }
552 561
562 /*
563 * reference clock is usually a "fixed-clock", make it optional
564 * for backward compatibility and ignore the error if it does
565 * not exist.
566 */
567 mtk->ref_clk = devm_clk_get(dev, "ref_ck");
568 if (IS_ERR(mtk->ref_clk)) {
569 if (PTR_ERR(mtk->ref_clk) == -EPROBE_DEFER)
570 return -EPROBE_DEFER;
571
572 mtk->ref_clk = NULL;
573 }
574
553 mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable"); 575 mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable");
554 576
555 ret = usb_wakeup_of_property_parse(mtk, node); 577 ret = usb_wakeup_of_property_parse(mtk, node);
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index 2845c49efe1b..3aa5e1d25064 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -124,6 +124,7 @@ struct xhci_hcd_mtk {
124 struct regulator *vusb33; 124 struct regulator *vusb33;
125 struct regulator *vbus; 125 struct regulator *vbus;
126 struct clk *sys_clk; /* sys and mac clock */ 126 struct clk *sys_clk; /* sys and mac clock */
127 struct clk *ref_clk;
127 struct clk *wk_deb_p0; /* port0's wakeup debounce clock */ 128 struct clk *wk_deb_p0; /* port0's wakeup debounce clock */
128 struct clk *wk_deb_p1; 129 struct clk *wk_deb_p1;
129 struct regmap *pericfg; 130 struct regmap *pericfg;
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 954abfd5014d..fc99f51d12e1 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -242,11 +242,7 @@ static int xhci_pci_setup(struct usb_hcd *hcd)
242 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn); 242 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
243 243
244 /* Find any debug ports */ 244 /* Find any debug ports */
245 retval = xhci_pci_reinit(xhci, pdev); 245 return xhci_pci_reinit(xhci, pdev);
246 if (!retval)
247 return retval;
248
249 return retval;
250} 246}
251 247
252/* 248/*
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index e5834dd9bcde..6d33b42ffcf5 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -232,8 +232,8 @@ static int xhci_plat_probe(struct platform_device *pdev)
232 if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable")) 232 if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable"))
233 xhci->quirks |= XHCI_LPM_SUPPORT; 233 xhci->quirks |= XHCI_LPM_SUPPORT;
234 234
235 if (HCC_MAX_PSA(xhci->hcc_params) >= 4) 235 if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped"))
236 xhci->shared_hcd->can_do_streams = 1; 236 xhci->quirks |= XHCI_BROKEN_PORT_PED;
237 237
238 hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); 238 hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0);
239 if (IS_ERR(hcd->usb_phy)) { 239 if (IS_ERR(hcd->usb_phy)) {
@@ -251,6 +251,9 @@ static int xhci_plat_probe(struct platform_device *pdev)
251 if (ret) 251 if (ret)
252 goto disable_usb_phy; 252 goto disable_usb_phy;
253 253
254 if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
255 xhci->shared_hcd->can_do_streams = 1;
256
254 ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED); 257 ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
255 if (ret) 258 if (ret)
256 goto dealloc_usb2_hcd; 259 goto dealloc_usb2_hcd;
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index e32029a31ca4..d9936c771fa0 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -119,14 +119,29 @@ static bool last_td_in_urb(struct xhci_td *td)
119{ 119{
120 struct urb_priv *urb_priv = td->urb->hcpriv; 120 struct urb_priv *urb_priv = td->urb->hcpriv;
121 121
122 return urb_priv->td_cnt == urb_priv->length; 122 return urb_priv->num_tds_done == urb_priv->num_tds;
123} 123}
124 124
125static void inc_td_cnt(struct urb *urb) 125static void inc_td_cnt(struct urb *urb)
126{ 126{
127 struct urb_priv *urb_priv = urb->hcpriv; 127 struct urb_priv *urb_priv = urb->hcpriv;
128 128
129 urb_priv->td_cnt++; 129 urb_priv->num_tds_done++;
130}
131
132static void trb_to_noop(union xhci_trb *trb, u32 noop_type)
133{
134 if (trb_is_link(trb)) {
135 /* unchain chained link TRBs */
136 trb->link.control &= cpu_to_le32(~TRB_CHAIN);
137 } else {
138 trb->generic.field[0] = 0;
139 trb->generic.field[1] = 0;
140 trb->generic.field[2] = 0;
141 /* Preserve only the cycle bit of this TRB */
142 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
143 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type));
144 }
130} 145}
131 146
132/* Updates trb to point to the next TRB in the ring, and updates seg if the next 147/* Updates trb to point to the next TRB in the ring, and updates seg if the next
@@ -299,27 +314,19 @@ static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci,
299 struct xhci_command *cur_cmd) 314 struct xhci_command *cur_cmd)
300{ 315{
301 struct xhci_command *i_cmd; 316 struct xhci_command *i_cmd;
302 u32 cycle_state;
303 317
304 /* Turn all aborted commands in list to no-ops, then restart */ 318 /* Turn all aborted commands in list to no-ops, then restart */
305 list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) { 319 list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) {
306 320
307 if (i_cmd->status != COMP_CMD_ABORT) 321 if (i_cmd->status != COMP_COMMAND_ABORTED)
308 continue; 322 continue;
309 323
310 i_cmd->status = COMP_CMD_STOP; 324 i_cmd->status = COMP_STOPPED;
311 325
312 xhci_dbg(xhci, "Turn aborted command %p to no-op\n", 326 xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
313 i_cmd->command_trb); 327 i_cmd->command_trb);
314 /* get cycle state from the original cmd trb */ 328
315 cycle_state = le32_to_cpu( 329 trb_to_noop(i_cmd->command_trb, TRB_CMD_NOOP);
316 i_cmd->command_trb->generic.field[3]) & TRB_CYCLE;
317 /* modify the command trb to no-op command */
318 i_cmd->command_trb->generic.field[0] = 0;
319 i_cmd->command_trb->generic.field[1] = 0;
320 i_cmd->command_trb->generic.field[2] = 0;
321 i_cmd->command_trb->generic.field[3] = cpu_to_le32(
322 TRB_TYPE(TRB_CMD_NOOP) | cycle_state);
323 330
324 /* 331 /*
325 * caller waiting for completion is called when command 332 * caller waiting for completion is called when command
@@ -362,19 +369,11 @@ static int xhci_abort_cmd_ring(struct xhci_hcd *xhci, unsigned long flags)
362 ret = xhci_handshake(&xhci->op_regs->cmd_ring, 369 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
363 CMD_RING_RUNNING, 0, 5 * 1000 * 1000); 370 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
364 if (ret < 0) { 371 if (ret < 0) {
365 /* we are about to kill xhci, give it one more chance */ 372 xhci_err(xhci,
366 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT, 373 "Stop command ring failed, maybe the host is dead\n");
367 &xhci->op_regs->cmd_ring); 374 xhci->xhc_state |= XHCI_STATE_DYING;
368 udelay(1000); 375 xhci_halt(xhci);
369 ret = xhci_handshake(&xhci->op_regs->cmd_ring, 376 return -ESHUTDOWN;
370 CMD_RING_RUNNING, 0, 3 * 1000 * 1000);
371 if (ret < 0) {
372 xhci_err(xhci, "Stopped the command ring failed, "
373 "maybe the host is dead\n");
374 xhci->xhc_state |= XHCI_STATE_DYING;
375 xhci_halt(xhci);
376 return -ESHUTDOWN;
377 }
378 } 377 }
379 /* 378 /*
380 * Writing the CMD_RING_ABORT bit should cause a cmd completion event, 379 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
@@ -410,7 +409,7 @@ void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
410 * pointer command pending because the device can choose to start any 409 * pointer command pending because the device can choose to start any
411 * stream once the endpoint is on the HW schedule. 410 * stream once the endpoint is on the HW schedule.
412 */ 411 */
413 if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) || 412 if ((ep_state & EP_STOP_CMD_PENDING) || (ep_state & SET_DEQ_PENDING) ||
414 (ep_state & EP_HALTED)) 413 (ep_state & EP_HALTED))
415 return; 414 return;
416 writel(DB_VALUE(ep_index, stream_id), db_addr); 415 writel(DB_VALUE(ep_index, stream_id), db_addr);
@@ -600,18 +599,8 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
600 union xhci_trb *trb = td->first_trb; 599 union xhci_trb *trb = td->first_trb;
601 600
602 while (1) { 601 while (1) {
603 if (trb_is_link(trb)) { 602 trb_to_noop(trb, TRB_TR_NOOP);
604 /* unchain chained link TRBs */ 603
605 trb->link.control &= cpu_to_le32(~TRB_CHAIN);
606 } else {
607 trb->generic.field[0] = 0;
608 trb->generic.field[1] = 0;
609 trb->generic.field[2] = 0;
610 /* Preserve only the cycle bit of this TRB */
611 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
612 trb->generic.field[3] |= cpu_to_le32(
613 TRB_TYPE(TRB_TR_NOOP));
614 }
615 /* flip cycle if asked to */ 604 /* flip cycle if asked to */
616 if (flip_cycle && trb != td->first_trb && trb != td->last_trb) 605 if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
617 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE); 606 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
@@ -626,13 +615,9 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
626static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci, 615static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
627 struct xhci_virt_ep *ep) 616 struct xhci_virt_ep *ep)
628{ 617{
629 ep->ep_state &= ~EP_HALT_PENDING; 618 ep->ep_state &= ~EP_STOP_CMD_PENDING;
630 /* Can't del_timer_sync in interrupt, so we attempt to cancel. If the 619 /* Can't del_timer_sync in interrupt */
631 * timer is running on another CPU, we don't decrement stop_cmds_pending 620 del_timer(&ep->stop_cmd_timer);
632 * (since we didn't successfully stop the watchdog timer).
633 */
634 if (del_timer(&ep->stop_cmd_timer))
635 ep->stop_cmds_pending--;
636} 621}
637 622
638/* 623/*
@@ -657,6 +642,7 @@ static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
657 usb_hcd_unlink_urb_from_ep(hcd, urb); 642 usb_hcd_unlink_urb_from_ep(hcd, urb);
658 spin_unlock(&xhci->lock); 643 spin_unlock(&xhci->lock);
659 usb_hcd_giveback_urb(hcd, urb, status); 644 usb_hcd_giveback_urb(hcd, urb, status);
645 trace_xhci_urb_giveback(urb);
660 spin_lock(&xhci->lock); 646 spin_lock(&xhci->lock);
661} 647}
662 648
@@ -667,7 +653,7 @@ static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
667 struct xhci_segment *seg = td->bounce_seg; 653 struct xhci_segment *seg = td->bounce_seg;
668 struct urb *urb = td->urb; 654 struct urb *urb = td->urb;
669 655
670 if (!seg || !urb) 656 if (!ring || !seg || !urb)
671 return; 657 return;
672 658
673 if (usb_urb_dir_out(urb)) { 659 if (usb_urb_dir_out(urb)) {
@@ -701,7 +687,6 @@ static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
701 unsigned int ep_index; 687 unsigned int ep_index;
702 struct xhci_ring *ep_ring; 688 struct xhci_ring *ep_ring;
703 struct xhci_virt_ep *ep; 689 struct xhci_virt_ep *ep;
704 struct list_head *entry;
705 struct xhci_td *cur_td = NULL; 690 struct xhci_td *cur_td = NULL;
706 struct xhci_td *last_unlinked_td; 691 struct xhci_td *last_unlinked_td;
707 692
@@ -718,6 +703,8 @@ static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
718 memset(&deq_state, 0, sizeof(deq_state)); 703 memset(&deq_state, 0, sizeof(deq_state));
719 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3])); 704 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
720 ep = &xhci->devs[slot_id]->eps[ep_index]; 705 ep = &xhci->devs[slot_id]->eps[ep_index];
706 last_unlinked_td = list_last_entry(&ep->cancelled_td_list,
707 struct xhci_td, cancelled_td_list);
721 708
722 if (list_empty(&ep->cancelled_td_list)) { 709 if (list_empty(&ep->cancelled_td_list)) {
723 xhci_stop_watchdog_timer_in_irq(xhci, ep); 710 xhci_stop_watchdog_timer_in_irq(xhci, ep);
@@ -731,8 +718,7 @@ static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
731 * it. We're also in the event handler, so we can't get re-interrupted 718 * it. We're also in the event handler, so we can't get re-interrupted
732 * if another Stop Endpoint command completes 719 * if another Stop Endpoint command completes
733 */ 720 */
734 list_for_each(entry, &ep->cancelled_td_list) { 721 list_for_each_entry(cur_td, &ep->cancelled_td_list, cancelled_td_list) {
735 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
736 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 722 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
737 "Removing canceled TD starting at 0x%llx (dma).", 723 "Removing canceled TD starting at 0x%llx (dma).",
738 (unsigned long long)xhci_trb_virt_to_dma( 724 (unsigned long long)xhci_trb_virt_to_dma(
@@ -774,7 +760,7 @@ remove_finished_td:
774 */ 760 */
775 list_del_init(&cur_td->td_list); 761 list_del_init(&cur_td->td_list);
776 } 762 }
777 last_unlinked_td = cur_td; 763
778 xhci_stop_watchdog_timer_in_irq(xhci, ep); 764 xhci_stop_watchdog_timer_in_irq(xhci, ep);
779 765
780 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */ 766 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
@@ -796,7 +782,7 @@ remove_finished_td:
796 * So stop when we've completed the URB for the last TD we unlinked. 782 * So stop when we've completed the URB for the last TD we unlinked.
797 */ 783 */
798 do { 784 do {
799 cur_td = list_entry(ep->cancelled_td_list.next, 785 cur_td = list_first_entry(&ep->cancelled_td_list,
800 struct xhci_td, cancelled_td_list); 786 struct xhci_td, cancelled_td_list);
801 list_del_init(&cur_td->cancelled_td_list); 787 list_del_init(&cur_td->cancelled_td_list);
802 788
@@ -805,8 +791,7 @@ remove_finished_td:
805 * just overwrite it (because the URB has been unlinked). 791 * just overwrite it (because the URB has been unlinked).
806 */ 792 */
807 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb); 793 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
808 if (ep_ring && cur_td->bounce_seg) 794 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
809 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
810 inc_td_cnt(cur_td->urb); 795 inc_td_cnt(cur_td->urb);
811 if (last_td_in_urb(cur_td)) 796 if (last_td_in_urb(cur_td))
812 xhci_giveback_urb_in_irq(xhci, cur_td, 0); 797 xhci_giveback_urb_in_irq(xhci, cur_td, 0);
@@ -824,16 +809,15 @@ remove_finished_td:
824static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring) 809static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
825{ 810{
826 struct xhci_td *cur_td; 811 struct xhci_td *cur_td;
812 struct xhci_td *tmp;
827 813
828 while (!list_empty(&ring->td_list)) { 814 list_for_each_entry_safe(cur_td, tmp, &ring->td_list, td_list) {
829 cur_td = list_first_entry(&ring->td_list,
830 struct xhci_td, td_list);
831 list_del_init(&cur_td->td_list); 815 list_del_init(&cur_td->td_list);
816
832 if (!list_empty(&cur_td->cancelled_td_list)) 817 if (!list_empty(&cur_td->cancelled_td_list))
833 list_del_init(&cur_td->cancelled_td_list); 818 list_del_init(&cur_td->cancelled_td_list);
834 819
835 if (cur_td->bounce_seg) 820 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
836 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
837 821
838 inc_td_cnt(cur_td->urb); 822 inc_td_cnt(cur_td->urb);
839 if (last_td_in_urb(cur_td)) 823 if (last_td_in_urb(cur_td))
@@ -845,6 +829,7 @@ static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
845 int slot_id, int ep_index) 829 int slot_id, int ep_index)
846{ 830{
847 struct xhci_td *cur_td; 831 struct xhci_td *cur_td;
832 struct xhci_td *tmp;
848 struct xhci_virt_ep *ep; 833 struct xhci_virt_ep *ep;
849 struct xhci_ring *ring; 834 struct xhci_ring *ring;
850 835
@@ -870,12 +855,12 @@ static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
870 slot_id, ep_index); 855 slot_id, ep_index);
871 xhci_kill_ring_urbs(xhci, ring); 856 xhci_kill_ring_urbs(xhci, ring);
872 } 857 }
873 while (!list_empty(&ep->cancelled_td_list)) {
874 cur_td = list_first_entry(&ep->cancelled_td_list,
875 struct xhci_td, cancelled_td_list);
876 list_del_init(&cur_td->cancelled_td_list);
877 858
859 list_for_each_entry_safe(cur_td, tmp, &ep->cancelled_td_list,
860 cancelled_td_list) {
861 list_del_init(&cur_td->cancelled_td_list);
878 inc_td_cnt(cur_td->urb); 862 inc_td_cnt(cur_td->urb);
863
879 if (last_td_in_urb(cur_td)) 864 if (last_td_in_urb(cur_td))
880 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN); 865 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
881 } 866 }
@@ -895,10 +880,8 @@ static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
895 * simple flag to say whether there is a pending stop endpoint command for a 880 * simple flag to say whether there is a pending stop endpoint command for a
896 * particular endpoint. 881 * particular endpoint.
897 * 882 *
898 * Instead we use a combination of that flag and a counter for the number of 883 * Instead we use a combination of that flag and checking if a new timer is
899 * pending stop endpoint commands. If the timer is the tail end of the last 884 * pending.
900 * stop endpoint command, and the endpoint's command is still pending, we assume
901 * the host is dying.
902 */ 885 */
903void xhci_stop_endpoint_command_watchdog(unsigned long arg) 886void xhci_stop_endpoint_command_watchdog(unsigned long arg)
904{ 887{
@@ -912,12 +895,11 @@ void xhci_stop_endpoint_command_watchdog(unsigned long arg)
912 895
913 spin_lock_irqsave(&xhci->lock, flags); 896 spin_lock_irqsave(&xhci->lock, flags);
914 897
915 ep->stop_cmds_pending--; 898 /* bail out if cmd completed but raced with stop ep watchdog timer.*/
916 if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) { 899 if (!(ep->ep_state & EP_STOP_CMD_PENDING) ||
917 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 900 timer_pending(&ep->stop_cmd_timer)) {
918 "Stop EP timer ran, but no command pending, "
919 "exiting.");
920 spin_unlock_irqrestore(&xhci->lock, flags); 901 spin_unlock_irqrestore(&xhci->lock, flags);
902 xhci_dbg(xhci, "Stop EP timer raced with cmd completion, exit");
921 return; 903 return;
922 } 904 }
923 905
@@ -926,7 +908,10 @@ void xhci_stop_endpoint_command_watchdog(unsigned long arg)
926 /* Oops, HC is dead or dying or at least not responding to the stop 908 /* Oops, HC is dead or dying or at least not responding to the stop
927 * endpoint command. 909 * endpoint command.
928 */ 910 */
911
929 xhci->xhc_state |= XHCI_STATE_DYING; 912 xhci->xhc_state |= XHCI_STATE_DYING;
913 ep->ep_state &= ~EP_STOP_CMD_PENDING;
914
930 /* Disable interrupts from the host controller and start halting it */ 915 /* Disable interrupts from the host controller and start halting it */
931 xhci_quiesce(xhci); 916 xhci_quiesce(xhci);
932 spin_unlock_irqrestore(&xhci->lock, flags); 917 spin_unlock_irqrestore(&xhci->lock, flags);
@@ -1050,10 +1035,10 @@ static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
1050 unsigned int slot_state; 1035 unsigned int slot_state;
1051 1036
1052 switch (cmd_comp_code) { 1037 switch (cmd_comp_code) {
1053 case COMP_TRB_ERR: 1038 case COMP_TRB_ERROR:
1054 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n"); 1039 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
1055 break; 1040 break;
1056 case COMP_CTX_STATE: 1041 case COMP_CONTEXT_STATE_ERROR:
1057 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n"); 1042 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1058 ep_state = GET_EP_CTX_STATE(ep_ctx); 1043 ep_state = GET_EP_CTX_STATE(ep_ctx);
1059 slot_state = le32_to_cpu(slot_ctx->dev_state); 1044 slot_state = le32_to_cpu(slot_ctx->dev_state);
@@ -1062,7 +1047,7 @@ static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
1062 "Slot state = %u, EP state = %u", 1047 "Slot state = %u, EP state = %u",
1063 slot_state, ep_state); 1048 slot_state, ep_state);
1064 break; 1049 break;
1065 case COMP_EBADSLT: 1050 case COMP_SLOT_NOT_ENABLED_ERROR:
1066 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n", 1051 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
1067 slot_id); 1052 slot_id);
1068 break; 1053 break;
@@ -1259,7 +1244,7 @@ void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
1259{ 1244{
1260 struct xhci_command *cur_cmd, *tmp_cmd; 1245 struct xhci_command *cur_cmd, *tmp_cmd;
1261 list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list) 1246 list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
1262 xhci_complete_del_and_free_cmd(cur_cmd, COMP_CMD_ABORT); 1247 xhci_complete_del_and_free_cmd(cur_cmd, COMP_COMMAND_ABORTED);
1263} 1248}
1264 1249
1265void xhci_handle_command_timeout(struct work_struct *work) 1250void xhci_handle_command_timeout(struct work_struct *work)
@@ -1282,7 +1267,7 @@ void xhci_handle_command_timeout(struct work_struct *work)
1282 return; 1267 return;
1283 } 1268 }
1284 /* mark this command to be cancelled */ 1269 /* mark this command to be cancelled */
1285 xhci->current_cmd->status = COMP_CMD_ABORT; 1270 xhci->current_cmd->status = COMP_COMMAND_ABORTED;
1286 1271
1287 /* Make sure command ring is running before aborting it */ 1272 /* Make sure command ring is running before aborting it */
1288 hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); 1273 hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
@@ -1335,6 +1320,9 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1335 1320
1336 cmd_dma = le64_to_cpu(event->cmd_trb); 1321 cmd_dma = le64_to_cpu(event->cmd_trb);
1337 cmd_trb = xhci->cmd_ring->dequeue; 1322 cmd_trb = xhci->cmd_ring->dequeue;
1323
1324 trace_xhci_handle_command(xhci->cmd_ring, &cmd_trb->generic);
1325
1338 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, 1326 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1339 cmd_trb); 1327 cmd_trb);
1340 /* 1328 /*
@@ -1347,16 +1335,14 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1347 return; 1335 return;
1348 } 1336 }
1349 1337
1350 cmd = list_entry(xhci->cmd_list.next, struct xhci_command, cmd_list); 1338 cmd = list_first_entry(&xhci->cmd_list, struct xhci_command, cmd_list);
1351 1339
1352 cancel_delayed_work(&xhci->cmd_timer); 1340 cancel_delayed_work(&xhci->cmd_timer);
1353 1341
1354 trace_xhci_cmd_completion(cmd_trb, (struct xhci_generic_trb *) event);
1355
1356 cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status)); 1342 cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
1357 1343
1358 /* If CMD ring stopped we own the trbs between enqueue and dequeue */ 1344 /* If CMD ring stopped we own the trbs between enqueue and dequeue */
1359 if (cmd_comp_code == COMP_CMD_STOP) { 1345 if (cmd_comp_code == COMP_STOPPED) {
1360 complete_all(&xhci->cmd_ring_stop_completion); 1346 complete_all(&xhci->cmd_ring_stop_completion);
1361 return; 1347 return;
1362 } 1348 }
@@ -1373,9 +1359,9 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1373 * The command ring is stopped now, but the xHC will issue a Command 1359 * The command ring is stopped now, but the xHC will issue a Command
1374 * Ring Stopped event which will cause us to restart it. 1360 * Ring Stopped event which will cause us to restart it.
1375 */ 1361 */
1376 if (cmd_comp_code == COMP_CMD_ABORT) { 1362 if (cmd_comp_code == COMP_COMMAND_ABORTED) {
1377 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; 1363 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1378 if (cmd->status == COMP_CMD_ABORT) { 1364 if (cmd->status == COMP_COMMAND_ABORTED) {
1379 if (xhci->current_cmd == cmd) 1365 if (xhci->current_cmd == cmd)
1380 xhci->current_cmd = NULL; 1366 xhci->current_cmd = NULL;
1381 goto event_handled; 1367 goto event_handled;
@@ -1411,8 +1397,8 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1411 break; 1397 break;
1412 case TRB_CMD_NOOP: 1398 case TRB_CMD_NOOP:
1413 /* Is this an aborted command turned to NO-OP? */ 1399 /* Is this an aborted command turned to NO-OP? */
1414 if (cmd->status == COMP_CMD_STOP) 1400 if (cmd->status == COMP_STOPPED)
1415 cmd_comp_code = COMP_CMD_STOP; 1401 cmd_comp_code = COMP_STOPPED;
1416 break; 1402 break;
1417 case TRB_RESET_EP: 1403 case TRB_RESET_EP:
1418 WARN_ON(slot_id != TRB_TO_SLOT_ID( 1404 WARN_ON(slot_id != TRB_TO_SLOT_ID(
@@ -1437,9 +1423,9 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1437 } 1423 }
1438 1424
1439 /* restart timer if this wasn't the last command */ 1425 /* restart timer if this wasn't the last command */
1440 if (cmd->cmd_list.next != &xhci->cmd_list) { 1426 if (!list_is_singular(&xhci->cmd_list)) {
1441 xhci->current_cmd = list_entry(cmd->cmd_list.next, 1427 xhci->current_cmd = list_first_entry(&cmd->cmd_list,
1442 struct xhci_command, cmd_list); 1428 struct xhci_command, cmd_list);
1443 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT); 1429 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
1444 } else if (xhci->current_cmd == cmd) { 1430 } else if (xhci->current_cmd == cmd) {
1445 xhci->current_cmd = NULL; 1431 xhci->current_cmd = NULL;
@@ -1805,9 +1791,9 @@ static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1805 unsigned int trb_comp_code) 1791 unsigned int trb_comp_code)
1806{ 1792{
1807 /* TRB completion codes that may require a manual halt cleanup */ 1793 /* TRB completion codes that may require a manual halt cleanup */
1808 if (trb_comp_code == COMP_TX_ERR || 1794 if (trb_comp_code == COMP_USB_TRANSACTION_ERROR ||
1809 trb_comp_code == COMP_BABBLE || 1795 trb_comp_code == COMP_BABBLE_DETECTED_ERROR ||
1810 trb_comp_code == COMP_SPLIT_ERR) 1796 trb_comp_code == COMP_SPLIT_TRANSACTION_ERROR)
1811 /* The 0.95 spec says a babbling control endpoint 1797 /* The 0.95 spec says a babbling control endpoint
1812 * is not halted. The 0.96 spec says it is. Some HW 1798 * is not halted. The 0.96 spec says it is. Some HW
1813 * claims to be 0.95 compliant, but it halts the control 1799 * claims to be 0.95 compliant, but it halts the control
@@ -1834,22 +1820,64 @@ int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1834 return 0; 1820 return 0;
1835} 1821}
1836 1822
1837/* 1823static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
1838 * Finish the td processing, remove the td from td list; 1824 struct xhci_ring *ep_ring, int *status)
1839 * Return 1 if the urb can be given back. 1825{
1840 */ 1826 struct urb_priv *urb_priv;
1827 struct urb *urb = NULL;
1828
1829 /* Clean up the endpoint's TD list */
1830 urb = td->urb;
1831 urb_priv = urb->hcpriv;
1832
1833 /* if a bounce buffer was used to align this td then unmap it */
1834 xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
1835
1836 /* Do one last check of the actual transfer length.
1837 * If the host controller said we transferred more data than the buffer
1838 * length, urb->actual_length will be a very big number (since it's
1839 * unsigned). Play it safe and say we didn't transfer anything.
1840 */
1841 if (urb->actual_length > urb->transfer_buffer_length) {
1842 xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
1843 urb->transfer_buffer_length, urb->actual_length);
1844 urb->actual_length = 0;
1845 *status = 0;
1846 }
1847 list_del_init(&td->td_list);
1848 /* Was this TD slated to be cancelled but completed anyway? */
1849 if (!list_empty(&td->cancelled_td_list))
1850 list_del_init(&td->cancelled_td_list);
1851
1852 inc_td_cnt(urb);
1853 /* Giveback the urb when all the tds are completed */
1854 if (last_td_in_urb(td)) {
1855 if ((urb->actual_length != urb->transfer_buffer_length &&
1856 (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
1857 (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
1858 xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
1859 urb, urb->actual_length,
1860 urb->transfer_buffer_length, *status);
1861
1862 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
1863 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
1864 *status = 0;
1865 xhci_giveback_urb_in_irq(xhci, td, *status);
1866 }
1867
1868 return 0;
1869}
1870
1841static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td, 1871static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1842 union xhci_trb *ep_trb, struct xhci_transfer_event *event, 1872 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1843 struct xhci_virt_ep *ep, int *status, bool skip) 1873 struct xhci_virt_ep *ep, int *status, bool skip)
1844{ 1874{
1845 struct xhci_virt_device *xdev; 1875 struct xhci_virt_device *xdev;
1876 struct xhci_ep_ctx *ep_ctx;
1846 struct xhci_ring *ep_ring; 1877 struct xhci_ring *ep_ring;
1847 unsigned int slot_id; 1878 unsigned int slot_id;
1848 int ep_index;
1849 struct urb *urb = NULL;
1850 struct xhci_ep_ctx *ep_ctx;
1851 struct urb_priv *urb_priv;
1852 u32 trb_comp_code; 1879 u32 trb_comp_code;
1880 int ep_index;
1853 1881
1854 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); 1882 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1855 xdev = xhci->devs[slot_id]; 1883 xdev = xhci->devs[slot_id];
@@ -1861,9 +1889,9 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1861 if (skip) 1889 if (skip)
1862 goto td_cleanup; 1890 goto td_cleanup;
1863 1891
1864 if (trb_comp_code == COMP_STOP_INVAL || 1892 if (trb_comp_code == COMP_STOPPED_LENGTH_INVALID ||
1865 trb_comp_code == COMP_STOP || 1893 trb_comp_code == COMP_STOPPED ||
1866 trb_comp_code == COMP_STOP_SHORT) { 1894 trb_comp_code == COMP_STOPPED_SHORT_PACKET) {
1867 /* The Endpoint Stop Command completion will take care of any 1895 /* The Endpoint Stop Command completion will take care of any
1868 * stopped TDs. A stopped TD may be restarted, so don't update 1896 * stopped TDs. A stopped TD may be restarted, so don't update
1869 * the ring dequeue pointer or take this TD off any lists yet. 1897 * the ring dequeue pointer or take this TD off any lists yet.
@@ -1871,7 +1899,7 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1871 ep->stopped_td = td; 1899 ep->stopped_td = td;
1872 return 0; 1900 return 0;
1873 } 1901 }
1874 if (trb_comp_code == COMP_STALL || 1902 if (trb_comp_code == COMP_STALL_ERROR ||
1875 xhci_requires_manual_halt_cleanup(xhci, ep_ctx, 1903 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
1876 trb_comp_code)) { 1904 trb_comp_code)) {
1877 /* Issue a reset endpoint command to clear the host side 1905 /* Issue a reset endpoint command to clear the host side
@@ -1889,46 +1917,7 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1889 } 1917 }
1890 1918
1891td_cleanup: 1919td_cleanup:
1892 /* Clean up the endpoint's TD list */ 1920 return xhci_td_cleanup(xhci, td, ep_ring, status);
1893 urb = td->urb;
1894 urb_priv = urb->hcpriv;
1895
1896 /* if a bounce buffer was used to align this td then unmap it */
1897 if (td->bounce_seg)
1898 xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
1899
1900 /* Do one last check of the actual transfer length.
1901 * If the host controller said we transferred more data than the buffer
1902 * length, urb->actual_length will be a very big number (since it's
1903 * unsigned). Play it safe and say we didn't transfer anything.
1904 */
1905 if (urb->actual_length > urb->transfer_buffer_length) {
1906 xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
1907 urb->transfer_buffer_length, urb->actual_length);
1908 urb->actual_length = 0;
1909 *status = 0;
1910 }
1911 list_del_init(&td->td_list);
1912 /* Was this TD slated to be cancelled but completed anyway? */
1913 if (!list_empty(&td->cancelled_td_list))
1914 list_del_init(&td->cancelled_td_list);
1915
1916 inc_td_cnt(urb);
1917 /* Giveback the urb when all the tds are completed */
1918 if (last_td_in_urb(td)) {
1919 if ((urb->actual_length != urb->transfer_buffer_length &&
1920 (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
1921 (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
1922 xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
1923 urb, urb->actual_length,
1924 urb->transfer_buffer_length, *status);
1925
1926 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
1927 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
1928 *status = 0;
1929 xhci_giveback_urb_in_irq(xhci, td, *status);
1930 }
1931 return 0;
1932} 1921}
1933 1922
1934/* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */ 1923/* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
@@ -1982,16 +1971,16 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1982 } 1971 }
1983 *status = 0; 1972 *status = 0;
1984 break; 1973 break;
1985 case COMP_SHORT_TX: 1974 case COMP_SHORT_PACKET:
1986 *status = 0; 1975 *status = 0;
1987 break; 1976 break;
1988 case COMP_STOP_SHORT: 1977 case COMP_STOPPED_SHORT_PACKET:
1989 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL) 1978 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
1990 td->urb->actual_length = remaining; 1979 td->urb->actual_length = remaining;
1991 else 1980 else
1992 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n"); 1981 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
1993 goto finish_td; 1982 goto finish_td;
1994 case COMP_STOP: 1983 case COMP_STOPPED:
1995 switch (trb_type) { 1984 switch (trb_type) {
1996 case TRB_SETUP: 1985 case TRB_SETUP:
1997 td->urb->actual_length = 0; 1986 td->urb->actual_length = 0;
@@ -2005,7 +1994,7 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
2005 trb_type); 1994 trb_type);
2006 goto finish_td; 1995 goto finish_td;
2007 } 1996 }
2008 case COMP_STOP_INVAL: 1997 case COMP_STOPPED_LENGTH_INVALID:
2009 goto finish_td; 1998 goto finish_td;
2010 default: 1999 default:
2011 if (!xhci_requires_manual_halt_cleanup(xhci, 2000 if (!xhci_requires_manual_halt_cleanup(xhci,
@@ -2014,7 +2003,7 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
2014 xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n", 2003 xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
2015 trb_comp_code, ep_index); 2004 trb_comp_code, ep_index);
2016 /* else fall through */ 2005 /* else fall through */
2017 case COMP_STALL: 2006 case COMP_STALL_ERROR:
2018 /* Did we transfer part of the data (middle) phase? */ 2007 /* Did we transfer part of the data (middle) phase? */
2019 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL) 2008 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
2020 td->urb->actual_length = requested - remaining; 2009 td->urb->actual_length = requested - remaining;
@@ -2066,7 +2055,7 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2066 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 2055 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2067 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 2056 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2068 urb_priv = td->urb->hcpriv; 2057 urb_priv = td->urb->hcpriv;
2069 idx = urb_priv->td_cnt; 2058 idx = urb_priv->num_tds_done;
2070 frame = &td->urb->iso_frame_desc[idx]; 2059 frame = &td->urb->iso_frame_desc[idx];
2071 requested = frame->length; 2060 requested = frame->length;
2072 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 2061 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
@@ -2085,35 +2074,35 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2085 } 2074 }
2086 frame->status = 0; 2075 frame->status = 0;
2087 break; 2076 break;
2088 case COMP_SHORT_TX: 2077 case COMP_SHORT_PACKET:
2089 frame->status = short_framestatus; 2078 frame->status = short_framestatus;
2090 sum_trbs_for_length = true; 2079 sum_trbs_for_length = true;
2091 break; 2080 break;
2092 case COMP_BW_OVER: 2081 case COMP_BANDWIDTH_OVERRUN_ERROR:
2093 frame->status = -ECOMM; 2082 frame->status = -ECOMM;
2094 break; 2083 break;
2095 case COMP_BUFF_OVER: 2084 case COMP_ISOCH_BUFFER_OVERRUN:
2096 case COMP_BABBLE: 2085 case COMP_BABBLE_DETECTED_ERROR:
2097 frame->status = -EOVERFLOW; 2086 frame->status = -EOVERFLOW;
2098 break; 2087 break;
2099 case COMP_DEV_ERR: 2088 case COMP_INCOMPATIBLE_DEVICE_ERROR:
2100 case COMP_STALL: 2089 case COMP_STALL_ERROR:
2101 frame->status = -EPROTO; 2090 frame->status = -EPROTO;
2102 break; 2091 break;
2103 case COMP_TX_ERR: 2092 case COMP_USB_TRANSACTION_ERROR:
2104 frame->status = -EPROTO; 2093 frame->status = -EPROTO;
2105 if (ep_trb != td->last_trb) 2094 if (ep_trb != td->last_trb)
2106 return 0; 2095 return 0;
2107 break; 2096 break;
2108 case COMP_STOP: 2097 case COMP_STOPPED:
2109 sum_trbs_for_length = true; 2098 sum_trbs_for_length = true;
2110 break; 2099 break;
2111 case COMP_STOP_SHORT: 2100 case COMP_STOPPED_SHORT_PACKET:
2112 /* field normally containing residue now contains tranferred */ 2101 /* field normally containing residue now contains tranferred */
2113 frame->status = short_framestatus; 2102 frame->status = short_framestatus;
2114 requested = remaining; 2103 requested = remaining;
2115 break; 2104 break;
2116 case COMP_STOP_INVAL: 2105 case COMP_STOPPED_LENGTH_INVALID:
2117 requested = 0; 2106 requested = 0;
2118 remaining = 0; 2107 remaining = 0;
2119 break; 2108 break;
@@ -2145,7 +2134,7 @@ static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2145 2134
2146 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 2135 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2147 urb_priv = td->urb->hcpriv; 2136 urb_priv = td->urb->hcpriv;
2148 idx = urb_priv->td_cnt; 2137 idx = urb_priv->num_tds_done;
2149 frame = &td->urb->iso_frame_desc[idx]; 2138 frame = &td->urb->iso_frame_desc[idx];
2150 2139
2151 /* The transfer is partly done. */ 2140 /* The transfer is partly done. */
@@ -2190,16 +2179,16 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2190 } 2179 }
2191 *status = 0; 2180 *status = 0;
2192 break; 2181 break;
2193 case COMP_SHORT_TX: 2182 case COMP_SHORT_PACKET:
2194 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n", 2183 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2195 td->urb->ep->desc.bEndpointAddress, 2184 td->urb->ep->desc.bEndpointAddress,
2196 requested, remaining); 2185 requested, remaining);
2197 *status = 0; 2186 *status = 0;
2198 break; 2187 break;
2199 case COMP_STOP_SHORT: 2188 case COMP_STOPPED_SHORT_PACKET:
2200 td->urb->actual_length = remaining; 2189 td->urb->actual_length = remaining;
2201 goto finish_td; 2190 goto finish_td;
2202 case COMP_STOP_INVAL: 2191 case COMP_STOPPED_LENGTH_INVALID:
2203 /* stopped on ep trb with invalid length, exclude it */ 2192 /* stopped on ep trb with invalid length, exclude it */
2204 ep_trb_len = 0; 2193 ep_trb_len = 0;
2205 remaining = 0; 2194 remaining = 0;
@@ -2231,8 +2220,6 @@ finish_td:
2231 */ 2220 */
2232static int handle_tx_event(struct xhci_hcd *xhci, 2221static int handle_tx_event(struct xhci_hcd *xhci,
2233 struct xhci_transfer_event *event) 2222 struct xhci_transfer_event *event)
2234 __releases(&xhci->lock)
2235 __acquires(&xhci->lock)
2236{ 2223{
2237 struct xhci_virt_device *xdev; 2224 struct xhci_virt_device *xdev;
2238 struct xhci_virt_ep *ep; 2225 struct xhci_virt_ep *ep;
@@ -2305,50 +2292,50 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2305 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) 2292 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2306 break; 2293 break;
2307 if (xhci->quirks & XHCI_TRUST_TX_LENGTH) 2294 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2308 trb_comp_code = COMP_SHORT_TX; 2295 trb_comp_code = COMP_SHORT_PACKET;
2309 else 2296 else
2310 xhci_warn_ratelimited(xhci, 2297 xhci_warn_ratelimited(xhci,
2311 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n"); 2298 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
2312 case COMP_SHORT_TX: 2299 case COMP_SHORT_PACKET:
2313 break; 2300 break;
2314 case COMP_STOP: 2301 case COMP_STOPPED:
2315 xhci_dbg(xhci, "Stopped on Transfer TRB\n"); 2302 xhci_dbg(xhci, "Stopped on Transfer TRB\n");
2316 break; 2303 break;
2317 case COMP_STOP_INVAL: 2304 case COMP_STOPPED_LENGTH_INVALID:
2318 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n"); 2305 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
2319 break; 2306 break;
2320 case COMP_STOP_SHORT: 2307 case COMP_STOPPED_SHORT_PACKET:
2321 xhci_dbg(xhci, "Stopped with short packet transfer detected\n"); 2308 xhci_dbg(xhci, "Stopped with short packet transfer detected\n");
2322 break; 2309 break;
2323 case COMP_STALL: 2310 case COMP_STALL_ERROR:
2324 xhci_dbg(xhci, "Stalled endpoint\n"); 2311 xhci_dbg(xhci, "Stalled endpoint\n");
2325 ep->ep_state |= EP_HALTED; 2312 ep->ep_state |= EP_HALTED;
2326 status = -EPIPE; 2313 status = -EPIPE;
2327 break; 2314 break;
2328 case COMP_TRB_ERR: 2315 case COMP_TRB_ERROR:
2329 xhci_warn(xhci, "WARN: TRB error on endpoint\n"); 2316 xhci_warn(xhci, "WARN: TRB error on endpoint\n");
2330 status = -EILSEQ; 2317 status = -EILSEQ;
2331 break; 2318 break;
2332 case COMP_SPLIT_ERR: 2319 case COMP_SPLIT_TRANSACTION_ERROR:
2333 case COMP_TX_ERR: 2320 case COMP_USB_TRANSACTION_ERROR:
2334 xhci_dbg(xhci, "Transfer error on endpoint\n"); 2321 xhci_dbg(xhci, "Transfer error on endpoint\n");
2335 status = -EPROTO; 2322 status = -EPROTO;
2336 break; 2323 break;
2337 case COMP_BABBLE: 2324 case COMP_BABBLE_DETECTED_ERROR:
2338 xhci_dbg(xhci, "Babble error on endpoint\n"); 2325 xhci_dbg(xhci, "Babble error on endpoint\n");
2339 status = -EOVERFLOW; 2326 status = -EOVERFLOW;
2340 break; 2327 break;
2341 case COMP_DB_ERR: 2328 case COMP_DATA_BUFFER_ERROR:
2342 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n"); 2329 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
2343 status = -ENOSR; 2330 status = -ENOSR;
2344 break; 2331 break;
2345 case COMP_BW_OVER: 2332 case COMP_BANDWIDTH_OVERRUN_ERROR:
2346 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n"); 2333 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
2347 break; 2334 break;
2348 case COMP_BUFF_OVER: 2335 case COMP_ISOCH_BUFFER_OVERRUN:
2349 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n"); 2336 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
2350 break; 2337 break;
2351 case COMP_UNDERRUN: 2338 case COMP_RING_UNDERRUN:
2352 /* 2339 /*
2353 * When the Isoch ring is empty, the xHC will generate 2340 * When the Isoch ring is empty, the xHC will generate
2354 * a Ring Overrun Event for IN Isoch endpoint or Ring 2341 * a Ring Overrun Event for IN Isoch endpoint or Ring
@@ -2361,7 +2348,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2361 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), 2348 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2362 ep_index); 2349 ep_index);
2363 goto cleanup; 2350 goto cleanup;
2364 case COMP_OVERRUN: 2351 case COMP_RING_OVERRUN:
2365 xhci_dbg(xhci, "overrun event on endpoint\n"); 2352 xhci_dbg(xhci, "overrun event on endpoint\n");
2366 if (!list_empty(&ep_ring->td_list)) 2353 if (!list_empty(&ep_ring->td_list))
2367 xhci_dbg(xhci, "Overrun Event for slot %d ep %d " 2354 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
@@ -2369,11 +2356,11 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2369 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), 2356 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2370 ep_index); 2357 ep_index);
2371 goto cleanup; 2358 goto cleanup;
2372 case COMP_DEV_ERR: 2359 case COMP_INCOMPATIBLE_DEVICE_ERROR:
2373 xhci_warn(xhci, "WARN: detect an incompatible device"); 2360 xhci_warn(xhci, "WARN: detect an incompatible device");
2374 status = -EPROTO; 2361 status = -EPROTO;
2375 break; 2362 break;
2376 case COMP_MISSED_INT: 2363 case COMP_MISSED_SERVICE_ERROR:
2377 /* 2364 /*
2378 * When encounter missed service error, one or more isoc tds 2365 * When encounter missed service error, one or more isoc tds
2379 * may be missed by xHC. 2366 * may be missed by xHC.
@@ -2383,7 +2370,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2383 ep->skip = true; 2370 ep->skip = true;
2384 xhci_dbg(xhci, "Miss service interval error, set skip flag\n"); 2371 xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
2385 goto cleanup; 2372 goto cleanup;
2386 case COMP_PING_ERR: 2373 case COMP_NO_PING_RESPONSE_ERROR:
2387 ep->skip = true; 2374 ep->skip = true;
2388 xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n"); 2375 xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n");
2389 goto cleanup; 2376 goto cleanup;
@@ -2407,8 +2394,8 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2407 * event if the device was suspended. Don't print 2394 * event if the device was suspended. Don't print
2408 * warnings. 2395 * warnings.
2409 */ 2396 */
2410 if (!(trb_comp_code == COMP_STOP || 2397 if (!(trb_comp_code == COMP_STOPPED ||
2411 trb_comp_code == COMP_STOP_INVAL)) { 2398 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
2412 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n", 2399 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2413 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), 2400 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2414 ep_index); 2401 ep_index);
@@ -2433,7 +2420,8 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2433 goto cleanup; 2420 goto cleanup;
2434 } 2421 }
2435 2422
2436 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list); 2423 td = list_first_entry(&ep_ring->td_list, struct xhci_td,
2424 td_list);
2437 if (ep->skip) 2425 if (ep->skip)
2438 td_num--; 2426 td_num--;
2439 2427
@@ -2449,8 +2437,8 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2449 * last TRB of the previous TD. The command completion handle 2437 * last TRB of the previous TD. The command completion handle
2450 * will take care the rest. 2438 * will take care the rest.
2451 */ 2439 */
2452 if (!ep_seg && (trb_comp_code == COMP_STOP || 2440 if (!ep_seg && (trb_comp_code == COMP_STOPPED ||
2453 trb_comp_code == COMP_STOP_INVAL)) { 2441 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
2454 goto cleanup; 2442 goto cleanup;
2455 } 2443 }
2456 2444
@@ -2481,7 +2469,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2481 skip_isoc_td(xhci, td, event, ep, &status); 2469 skip_isoc_td(xhci, td, event, ep, &status);
2482 goto cleanup; 2470 goto cleanup;
2483 } 2471 }
2484 if (trb_comp_code == COMP_SHORT_TX) 2472 if (trb_comp_code == COMP_SHORT_PACKET)
2485 ep_ring->last_td_was_short = true; 2473 ep_ring->last_td_was_short = true;
2486 else 2474 else
2487 ep_ring->last_td_was_short = false; 2475 ep_ring->last_td_was_short = false;
@@ -2493,6 +2481,10 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2493 2481
2494 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) / 2482 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
2495 sizeof(*ep_trb)]; 2483 sizeof(*ep_trb)];
2484
2485 trace_xhci_handle_transfer(ep_ring,
2486 (struct xhci_generic_trb *) ep_trb);
2487
2496 /* 2488 /*
2497 * No-op TRB should not trigger interrupts. 2489 * No-op TRB should not trigger interrupts.
2498 * If ep_trb is a no-op TRB, it means the 2490 * If ep_trb is a no-op TRB, it means the
@@ -2514,8 +2506,8 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2514 &status); 2506 &status);
2515cleanup: 2507cleanup:
2516 handling_skipped_tds = ep->skip && 2508 handling_skipped_tds = ep->skip &&
2517 trb_comp_code != COMP_MISSED_INT && 2509 trb_comp_code != COMP_MISSED_SERVICE_ERROR &&
2518 trb_comp_code != COMP_PING_ERR; 2510 trb_comp_code != COMP_NO_PING_RESPONSE_ERROR;
2519 2511
2520 /* 2512 /*
2521 * Do not update event ring dequeue pointer if we're in a loop 2513 * Do not update event ring dequeue pointer if we're in a loop
@@ -2559,6 +2551,8 @@ static int xhci_handle_event(struct xhci_hcd *xhci)
2559 xhci->event_ring->cycle_state) 2551 xhci->event_ring->cycle_state)
2560 return 0; 2552 return 0;
2561 2553
2554 trace_xhci_handle_event(xhci->event_ring, &event->generic);
2555
2562 /* 2556 /*
2563 * Barrier between reading the TRB_CYCLE (valid) flag above and any 2557 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2564 * speculative reads of the event's flags/data below. 2558 * speculative reads of the event's flags/data below.
@@ -2617,27 +2611,28 @@ static int xhci_handle_event(struct xhci_hcd *xhci)
2617irqreturn_t xhci_irq(struct usb_hcd *hcd) 2611irqreturn_t xhci_irq(struct usb_hcd *hcd)
2618{ 2612{
2619 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 2613 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2620 u32 status;
2621 u64 temp_64;
2622 union xhci_trb *event_ring_deq; 2614 union xhci_trb *event_ring_deq;
2615 irqreturn_t ret = IRQ_NONE;
2623 dma_addr_t deq; 2616 dma_addr_t deq;
2617 u64 temp_64;
2618 u32 status;
2624 2619
2625 spin_lock(&xhci->lock); 2620 spin_lock(&xhci->lock);
2626 /* Check if the xHC generated the interrupt, or the irq is shared */ 2621 /* Check if the xHC generated the interrupt, or the irq is shared */
2627 status = readl(&xhci->op_regs->status); 2622 status = readl(&xhci->op_regs->status);
2628 if (status == 0xffffffff) 2623 if (status == 0xffffffff) {
2629 goto hw_died; 2624 ret = IRQ_HANDLED;
2630 2625 goto out;
2631 if (!(status & STS_EINT)) {
2632 spin_unlock(&xhci->lock);
2633 return IRQ_NONE;
2634 } 2626 }
2627
2628 if (!(status & STS_EINT))
2629 goto out;
2630
2635 if (status & STS_FATAL) { 2631 if (status & STS_FATAL) {
2636 xhci_warn(xhci, "WARNING: Host System Error\n"); 2632 xhci_warn(xhci, "WARNING: Host System Error\n");
2637 xhci_halt(xhci); 2633 xhci_halt(xhci);
2638hw_died: 2634 ret = IRQ_HANDLED;
2639 spin_unlock(&xhci->lock); 2635 goto out;
2640 return IRQ_HANDLED;
2641 } 2636 }
2642 2637
2643 /* 2638 /*
@@ -2668,9 +2663,8 @@ hw_died:
2668 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); 2663 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2669 xhci_write_64(xhci, temp_64 | ERST_EHB, 2664 xhci_write_64(xhci, temp_64 | ERST_EHB,
2670 &xhci->ir_set->erst_dequeue); 2665 &xhci->ir_set->erst_dequeue);
2671 spin_unlock(&xhci->lock); 2666 ret = IRQ_HANDLED;
2672 2667 goto out;
2673 return IRQ_HANDLED;
2674 } 2668 }
2675 2669
2676 event_ring_deq = xhci->event_ring->dequeue; 2670 event_ring_deq = xhci->event_ring->dequeue;
@@ -2695,10 +2689,12 @@ hw_died:
2695 /* Clear the event handler busy flag (RW1C); event ring is empty. */ 2689 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2696 temp_64 |= ERST_EHB; 2690 temp_64 |= ERST_EHB;
2697 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue); 2691 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2692 ret = IRQ_HANDLED;
2698 2693
2694out:
2699 spin_unlock(&xhci->lock); 2695 spin_unlock(&xhci->lock);
2700 2696
2701 return IRQ_HANDLED; 2697 return ret;
2702} 2698}
2703 2699
2704irqreturn_t xhci_msi_irq(int irq, void *hcd) 2700irqreturn_t xhci_msi_irq(int irq, void *hcd)
@@ -2726,6 +2722,9 @@ static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2726 trb->field[1] = cpu_to_le32(field2); 2722 trb->field[1] = cpu_to_le32(field2);
2727 trb->field[2] = cpu_to_le32(field3); 2723 trb->field[2] = cpu_to_le32(field3);
2728 trb->field[3] = cpu_to_le32(field4); 2724 trb->field[3] = cpu_to_le32(field4);
2725
2726 trace_xhci_queue_trb(ring, trb);
2727
2729 inc_enq(xhci, ring, more_trbs_coming); 2728 inc_enq(xhci, ring, more_trbs_coming);
2730} 2729}
2731 2730
@@ -2839,7 +2838,7 @@ static int prepare_transfer(struct xhci_hcd *xhci,
2839 return ret; 2838 return ret;
2840 2839
2841 urb_priv = urb->hcpriv; 2840 urb_priv = urb->hcpriv;
2842 td = urb_priv->td[td_index]; 2841 td = &urb_priv->td[td_index];
2843 2842
2844 INIT_LIST_HEAD(&td->td_list); 2843 INIT_LIST_HEAD(&td->td_list);
2845 INIT_LIST_HEAD(&td->cancelled_td_list); 2844 INIT_LIST_HEAD(&td->cancelled_td_list);
@@ -2856,8 +2855,6 @@ static int prepare_transfer(struct xhci_hcd *xhci,
2856 td->start_seg = ep_ring->enq_seg; 2855 td->start_seg = ep_ring->enq_seg;
2857 td->first_trb = ep_ring->enqueue; 2856 td->first_trb = ep_ring->enqueue;
2858 2857
2859 urb_priv->td[td_index] = td;
2860
2861 return 0; 2858 return 0;
2862} 2859}
2863 2860
@@ -3134,10 +3131,10 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3134 urb_priv = urb->hcpriv; 3131 urb_priv = urb->hcpriv;
3135 3132
3136 /* Deal with URB_ZERO_PACKET - need one more td/trb */ 3133 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3137 if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->length > 1) 3134 if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->num_tds > 1)
3138 need_zero_pkt = true; 3135 need_zero_pkt = true;
3139 3136
3140 td = urb_priv->td[0]; 3137 td = &urb_priv->td[0];
3141 3138
3142 /* 3139 /*
3143 * Don't give the first TRB to the hardware (by toggling the cycle bit) 3140 * Don't give the first TRB to the hardware (by toggling the cycle bit)
@@ -3230,7 +3227,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3230 ret = prepare_transfer(xhci, xhci->devs[slot_id], 3227 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3231 ep_index, urb->stream_id, 3228 ep_index, urb->stream_id,
3232 1, urb, 1, mem_flags); 3229 1, urb, 1, mem_flags);
3233 urb_priv->td[1]->last_trb = ring->enqueue; 3230 urb_priv->td[1].last_trb = ring->enqueue;
3234 field = TRB_TYPE(TRB_NORMAL) | ring->cycle_state | TRB_IOC; 3231 field = TRB_TYPE(TRB_NORMAL) | ring->cycle_state | TRB_IOC;
3235 queue_trb(xhci, ring, 0, 0, 0, TRB_INTR_TARGET(0), field); 3232 queue_trb(xhci, ring, 0, 0, 0, TRB_INTR_TARGET(0), field);
3236 } 3233 }
@@ -3251,7 +3248,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3251 struct usb_ctrlrequest *setup; 3248 struct usb_ctrlrequest *setup;
3252 struct xhci_generic_trb *start_trb; 3249 struct xhci_generic_trb *start_trb;
3253 int start_cycle; 3250 int start_cycle;
3254 u32 field, length_field, remainder; 3251 u32 field;
3255 struct urb_priv *urb_priv; 3252 struct urb_priv *urb_priv;
3256 struct xhci_td *td; 3253 struct xhci_td *td;
3257 3254
@@ -3282,7 +3279,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3282 return ret; 3279 return ret;
3283 3280
3284 urb_priv = urb->hcpriv; 3281 urb_priv = urb->hcpriv;
3285 td = urb_priv->td[0]; 3282 td = &urb_priv->td[0];
3286 3283
3287 /* 3284 /*
3288 * Don't give the first TRB to the hardware (by toggling the cycle bit) 3285 * Don't give the first TRB to the hardware (by toggling the cycle bit)
@@ -3324,16 +3321,16 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3324 else 3321 else
3325 field = TRB_TYPE(TRB_DATA); 3322 field = TRB_TYPE(TRB_DATA);
3326 3323
3327 remainder = xhci_td_remainder(xhci, 0,
3328 urb->transfer_buffer_length,
3329 urb->transfer_buffer_length,
3330 urb, 1);
3331
3332 length_field = TRB_LEN(urb->transfer_buffer_length) |
3333 TRB_TD_SIZE(remainder) |
3334 TRB_INTR_TARGET(0);
3335
3336 if (urb->transfer_buffer_length > 0) { 3324 if (urb->transfer_buffer_length > 0) {
3325 u32 length_field, remainder;
3326
3327 remainder = xhci_td_remainder(xhci, 0,
3328 urb->transfer_buffer_length,
3329 urb->transfer_buffer_length,
3330 urb, 1);
3331 length_field = TRB_LEN(urb->transfer_buffer_length) |
3332 TRB_TD_SIZE(remainder) |
3333 TRB_INTR_TARGET(0);
3337 if (setup->bRequestType & USB_DIR_IN) 3334 if (setup->bRequestType & USB_DIR_IN)
3338 field |= TRB_DIR_IN; 3335 field |= TRB_DIR_IN;
3339 queue_trb(xhci, ep_ring, true, 3336 queue_trb(xhci, ep_ring, true,
@@ -3570,7 +3567,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3570 return ret; 3567 return ret;
3571 goto cleanup; 3568 goto cleanup;
3572 } 3569 }
3573 td = urb_priv->td[i]; 3570 td = &urb_priv->td[i];
3574 3571
3575 /* use SIA as default, if frame id is used overwrite it */ 3572 /* use SIA as default, if frame id is used overwrite it */
3576 sia_frame_id = TRB_SIA; 3573 sia_frame_id = TRB_SIA;
@@ -3677,20 +3674,20 @@ cleanup:
3677 /* Clean up a partially enqueued isoc transfer. */ 3674 /* Clean up a partially enqueued isoc transfer. */
3678 3675
3679 for (i--; i >= 0; i--) 3676 for (i--; i >= 0; i--)
3680 list_del_init(&urb_priv->td[i]->td_list); 3677 list_del_init(&urb_priv->td[i].td_list);
3681 3678
3682 /* Use the first TD as a temporary variable to turn the TDs we've queued 3679 /* Use the first TD as a temporary variable to turn the TDs we've queued
3683 * into No-ops with a software-owned cycle bit. That way the hardware 3680 * into No-ops with a software-owned cycle bit. That way the hardware
3684 * won't accidentally start executing bogus TDs when we partially 3681 * won't accidentally start executing bogus TDs when we partially
3685 * overwrite them. td->first_trb and td->start_seg are already set. 3682 * overwrite them. td->first_trb and td->start_seg are already set.
3686 */ 3683 */
3687 urb_priv->td[0]->last_trb = ep_ring->enqueue; 3684 urb_priv->td[0].last_trb = ep_ring->enqueue;
3688 /* Every TRB except the first & last will have its cycle bit flipped. */ 3685 /* Every TRB except the first & last will have its cycle bit flipped. */
3689 td_to_noop(xhci, ep_ring, urb_priv->td[0], true); 3686 td_to_noop(xhci, ep_ring, &urb_priv->td[0], true);
3690 3687
3691 /* Reset the ring enqueue back to the first TRB and its cycle bit. */ 3688 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
3692 ep_ring->enqueue = urb_priv->td[0]->first_trb; 3689 ep_ring->enqueue = urb_priv->td[0].first_trb;
3693 ep_ring->enq_seg = urb_priv->td[0]->start_seg; 3690 ep_ring->enq_seg = urb_priv->td[0].start_seg;
3694 ep_ring->cycle_state = start_cycle; 3691 ep_ring->cycle_state = start_cycle;
3695 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp; 3692 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
3696 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb); 3693 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
@@ -3816,15 +3813,15 @@ static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
3816 } 3813 }
3817 3814
3818 cmd->command_trb = xhci->cmd_ring->enqueue; 3815 cmd->command_trb = xhci->cmd_ring->enqueue;
3819 list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
3820 3816
3821 /* if there are no other commands queued we start the timeout timer */ 3817 /* if there are no other commands queued we start the timeout timer */
3822 if (xhci->cmd_list.next == &cmd->cmd_list && 3818 if (list_empty(&xhci->cmd_list)) {
3823 !delayed_work_pending(&xhci->cmd_timer)) {
3824 xhci->current_cmd = cmd; 3819 xhci->current_cmd = cmd;
3825 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT); 3820 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
3826 } 3821 }
3827 3822
3823 list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
3824
3828 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3, 3825 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
3829 field4 | xhci->cmd_ring->cycle_state); 3826 field4 | xhci->cmd_ring->cycle_state);
3830 return 0; 3827 return 0;
diff --git a/drivers/usb/host/xhci-trace.h b/drivers/usb/host/xhci-trace.h
index 59c05653b2ea..1ac2cdf8eece 100644
--- a/drivers/usb/host/xhci-trace.h
+++ b/drivers/usb/host/xhci-trace.h
@@ -103,7 +103,7 @@ DECLARE_EVENT_CLASS(xhci_log_ctx,
103 ((HCC_64BYTE_CONTEXT(xhci->hcc_params) + 1) * 32) * 103 ((HCC_64BYTE_CONTEXT(xhci->hcc_params) + 1) * 32) *
104 ((ctx->type == XHCI_CTX_TYPE_INPUT) + ep_num + 1)); 104 ((ctx->type == XHCI_CTX_TYPE_INPUT) + ep_num + 1));
105 ), 105 ),
106 TP_printk("\nctx_64=%d, ctx_type=%u, ctx_dma=@%llx, ctx_va=@%p", 106 TP_printk("ctx_64=%d, ctx_type=%u, ctx_dma=@%llx, ctx_va=@%p",
107 __entry->ctx_64, __entry->ctx_type, 107 __entry->ctx_64, __entry->ctx_type,
108 (unsigned long long) __entry->ctx_dma, __entry->ctx_va 108 (unsigned long long) __entry->ctx_dma, __entry->ctx_va
109 ) 109 )
@@ -115,34 +115,174 @@ DEFINE_EVENT(xhci_log_ctx, xhci_address_ctx,
115 TP_ARGS(xhci, ctx, ep_num) 115 TP_ARGS(xhci, ctx, ep_num)
116); 116);
117 117
118DECLARE_EVENT_CLASS(xhci_log_event, 118DECLARE_EVENT_CLASS(xhci_log_trb,
119 TP_PROTO(void *trb_va, struct xhci_generic_trb *ev), 119 TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
120 TP_ARGS(trb_va, ev), 120 TP_ARGS(ring, trb),
121 TP_STRUCT__entry( 121 TP_STRUCT__entry(
122 __field(void *, va) 122 __field(u32, type)
123 __field(u64, dma) 123 __field(u32, field0)
124 __field(u32, status) 124 __field(u32, field1)
125 __field(u32, flags) 125 __field(u32, field2)
126 __dynamic_array(u8, trb, sizeof(struct xhci_generic_trb)) 126 __field(u32, field3)
127 ), 127 ),
128 TP_fast_assign( 128 TP_fast_assign(
129 __entry->va = trb_va; 129 __entry->type = ring->type;
130 __entry->dma = ((u64)le32_to_cpu(ev->field[1])) << 32 | 130 __entry->field0 = le32_to_cpu(trb->field[0]);
131 le32_to_cpu(ev->field[0]); 131 __entry->field1 = le32_to_cpu(trb->field[1]);
132 __entry->status = le32_to_cpu(ev->field[2]); 132 __entry->field2 = le32_to_cpu(trb->field[2]);
133 __entry->flags = le32_to_cpu(ev->field[3]); 133 __entry->field3 = le32_to_cpu(trb->field[3]);
134 memcpy(__get_dynamic_array(trb), trb_va,
135 sizeof(struct xhci_generic_trb));
136 ), 134 ),
137 TP_printk("\ntrb_dma=@%llx, trb_va=@%p, status=%08x, flags=%08x", 135 TP_printk("%s: %s", xhci_ring_type_string(__entry->type),
138 (unsigned long long) __entry->dma, __entry->va, 136 xhci_decode_trb(__entry->field0, __entry->field1,
139 __entry->status, __entry->flags 137 __entry->field2, __entry->field3)
140 ) 138 )
141); 139);
142 140
143DEFINE_EVENT(xhci_log_event, xhci_cmd_completion, 141DEFINE_EVENT(xhci_log_trb, xhci_handle_event,
144 TP_PROTO(void *trb_va, struct xhci_generic_trb *ev), 142 TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
145 TP_ARGS(trb_va, ev) 143 TP_ARGS(ring, trb)
144);
145
146DEFINE_EVENT(xhci_log_trb, xhci_handle_command,
147 TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
148 TP_ARGS(ring, trb)
149);
150
151DEFINE_EVENT(xhci_log_trb, xhci_handle_transfer,
152 TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
153 TP_ARGS(ring, trb)
154);
155
156DEFINE_EVENT(xhci_log_trb, xhci_queue_trb,
157 TP_PROTO(struct xhci_ring *ring, struct xhci_generic_trb *trb),
158 TP_ARGS(ring, trb)
159);
160
161DECLARE_EVENT_CLASS(xhci_log_virt_dev,
162 TP_PROTO(struct xhci_virt_device *vdev),
163 TP_ARGS(vdev),
164 TP_STRUCT__entry(
165 __field(void *, vdev)
166 __field(unsigned long long, out_ctx)
167 __field(unsigned long long, in_ctx)
168 __field(int, devnum)
169 __field(int, state)
170 __field(int, speed)
171 __field(u8, portnum)
172 __field(u8, level)
173 __field(int, slot_id)
174 ),
175 TP_fast_assign(
176 __entry->vdev = vdev;
177 __entry->in_ctx = (unsigned long long) vdev->in_ctx->dma;
178 __entry->out_ctx = (unsigned long long) vdev->out_ctx->dma;
179 __entry->devnum = vdev->udev->devnum;
180 __entry->state = vdev->udev->state;
181 __entry->speed = vdev->udev->speed;
182 __entry->portnum = vdev->udev->portnum;
183 __entry->level = vdev->udev->level;
184 __entry->slot_id = vdev->udev->slot_id;
185 ),
186 TP_printk("vdev %p ctx %llx | %llx num %d state %d speed %d port %d level %d slot %d",
187 __entry->vdev, __entry->in_ctx, __entry->out_ctx,
188 __entry->devnum, __entry->state, __entry->speed,
189 __entry->portnum, __entry->level, __entry->slot_id
190 )
191);
192
193DEFINE_EVENT(xhci_log_virt_dev, xhci_alloc_virt_device,
194 TP_PROTO(struct xhci_virt_device *vdev),
195 TP_ARGS(vdev)
196);
197
198DEFINE_EVENT(xhci_log_virt_dev, xhci_free_virt_device,
199 TP_PROTO(struct xhci_virt_device *vdev),
200 TP_ARGS(vdev)
201);
202
203DEFINE_EVENT(xhci_log_virt_dev, xhci_setup_device,
204 TP_PROTO(struct xhci_virt_device *vdev),
205 TP_ARGS(vdev)
206);
207
208DEFINE_EVENT(xhci_log_virt_dev, xhci_setup_addressable_virt_device,
209 TP_PROTO(struct xhci_virt_device *vdev),
210 TP_ARGS(vdev)
211);
212
213DEFINE_EVENT(xhci_log_virt_dev, xhci_stop_device,
214 TP_PROTO(struct xhci_virt_device *vdev),
215 TP_ARGS(vdev)
216);
217
218DECLARE_EVENT_CLASS(xhci_log_urb,
219 TP_PROTO(struct urb *urb),
220 TP_ARGS(urb),
221 TP_STRUCT__entry(
222 __field(void *, urb)
223 __field(unsigned int, pipe)
224 __field(unsigned int, stream)
225 __field(int, status)
226 __field(unsigned int, flags)
227 __field(int, num_mapped_sgs)
228 __field(int, num_sgs)
229 __field(int, length)
230 __field(int, actual)
231 __field(int, epnum)
232 __field(int, dir_in)
233 __field(int, type)
234 ),
235 TP_fast_assign(
236 __entry->urb = urb;
237 __entry->pipe = urb->pipe;
238 __entry->stream = urb->stream_id;
239 __entry->status = urb->status;
240 __entry->flags = urb->transfer_flags;
241 __entry->num_mapped_sgs = urb->num_mapped_sgs;
242 __entry->num_sgs = urb->num_sgs;
243 __entry->length = urb->transfer_buffer_length;
244 __entry->actual = urb->actual_length;
245 __entry->epnum = usb_endpoint_num(&urb->ep->desc);
246 __entry->dir_in = usb_endpoint_dir_in(&urb->ep->desc);
247 __entry->type = usb_endpoint_type(&urb->ep->desc);
248 ),
249 TP_printk("ep%d%s-%s: urb %p pipe %u length %d/%d sgs %d/%d stream %d flags %08x",
250 __entry->epnum, __entry->dir_in ? "in" : "out",
251 ({ char *s;
252 switch (__entry->type) {
253 case USB_ENDPOINT_XFER_INT:
254 s = "intr";
255 break;
256 case USB_ENDPOINT_XFER_CONTROL:
257 s = "control";
258 break;
259 case USB_ENDPOINT_XFER_BULK:
260 s = "bulk";
261 break;
262 case USB_ENDPOINT_XFER_ISOC:
263 s = "isoc";
264 break;
265 default:
266 s = "UNKNOWN";
267 } s; }), __entry->urb, __entry->pipe, __entry->actual,
268 __entry->length, __entry->num_mapped_sgs,
269 __entry->num_sgs, __entry->stream, __entry->flags
270 )
271);
272
273DEFINE_EVENT(xhci_log_urb, xhci_urb_enqueue,
274 TP_PROTO(struct urb *urb),
275 TP_ARGS(urb)
276);
277
278DEFINE_EVENT(xhci_log_urb, xhci_urb_giveback,
279 TP_PROTO(struct urb *urb),
280 TP_ARGS(urb)
281);
282
283DEFINE_EVENT(xhci_log_urb, xhci_urb_dequeue,
284 TP_PROTO(struct urb *urb),
285 TP_ARGS(urb)
146); 286);
147 287
148#endif /* __XHCI_TRACE_H */ 288#endif /* __XHCI_TRACE_H */
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 9a0ec116654a..6d6c46000e56 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -207,7 +207,7 @@ int xhci_reset(struct xhci_hcd *xhci)
207 ret = xhci_handshake(&xhci->op_regs->status, 207 ret = xhci_handshake(&xhci->op_regs->status,
208 STS_CNR, 0, 10 * 1000 * 1000); 208 STS_CNR, 0, 10 * 1000 * 1000);
209 209
210 for (i = 0; i < 2; ++i) { 210 for (i = 0; i < 2; i++) {
211 xhci->bus_state[i].port_c_suspend = 0; 211 xhci->bus_state[i].port_c_suspend = 0;
212 xhci->bus_state[i].suspended_ports = 0; 212 xhci->bus_state[i].suspended_ports = 0;
213 xhci->bus_state[i].resuming_ports = 0; 213 xhci->bus_state[i].resuming_ports = 0;
@@ -1332,12 +1332,11 @@ command_cleanup:
1332int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) 1332int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1333{ 1333{
1334 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 1334 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1335 struct xhci_td *buffer;
1336 unsigned long flags; 1335 unsigned long flags;
1337 int ret = 0; 1336 int ret = 0;
1338 unsigned int slot_id, ep_index; 1337 unsigned int slot_id, ep_index, ep_state;
1339 struct urb_priv *urb_priv; 1338 struct urb_priv *urb_priv;
1340 int size, i; 1339 int num_tds;
1341 1340
1342 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, 1341 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1343 true, true, __func__) <= 0) 1342 true, true, __func__) <= 0)
@@ -1349,40 +1348,30 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1349 if (!HCD_HW_ACCESSIBLE(hcd)) { 1348 if (!HCD_HW_ACCESSIBLE(hcd)) {
1350 if (!in_interrupt()) 1349 if (!in_interrupt())
1351 xhci_dbg(xhci, "urb submitted during PCI suspend\n"); 1350 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1352 ret = -ESHUTDOWN; 1351 return -ESHUTDOWN;
1353 goto exit;
1354 } 1352 }
1355 1353
1356 if (usb_endpoint_xfer_isoc(&urb->ep->desc)) 1354 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1357 size = urb->number_of_packets; 1355 num_tds = urb->number_of_packets;
1358 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) && 1356 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1359 urb->transfer_buffer_length > 0 && 1357 urb->transfer_buffer_length > 0 &&
1360 urb->transfer_flags & URB_ZERO_PACKET && 1358 urb->transfer_flags & URB_ZERO_PACKET &&
1361 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc))) 1359 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1362 size = 2; 1360 num_tds = 2;
1363 else 1361 else
1364 size = 1; 1362 num_tds = 1;
1365 1363
1366 urb_priv = kzalloc(sizeof(struct urb_priv) + 1364 urb_priv = kzalloc(sizeof(struct urb_priv) +
1367 size * sizeof(struct xhci_td *), mem_flags); 1365 num_tds * sizeof(struct xhci_td), mem_flags);
1368 if (!urb_priv) 1366 if (!urb_priv)
1369 return -ENOMEM; 1367 return -ENOMEM;
1370 1368
1371 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags); 1369 urb_priv->num_tds = num_tds;
1372 if (!buffer) { 1370 urb_priv->num_tds_done = 0;
1373 kfree(urb_priv);
1374 return -ENOMEM;
1375 }
1376
1377 for (i = 0; i < size; i++) {
1378 urb_priv->td[i] = buffer;
1379 buffer++;
1380 }
1381
1382 urb_priv->length = size;
1383 urb_priv->td_cnt = 0;
1384 urb->hcpriv = urb_priv; 1371 urb->hcpriv = urb_priv;
1385 1372
1373 trace_xhci_urb_enqueue(urb);
1374
1386 if (usb_endpoint_xfer_control(&urb->ep->desc)) { 1375 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1387 /* Check to see if the max packet size for the default control 1376 /* Check to see if the max packet size for the default control
1388 * endpoint changed during FS device enumeration 1377 * endpoint changed during FS device enumeration
@@ -1396,69 +1385,51 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1396 return ret; 1385 return ret;
1397 } 1386 }
1398 } 1387 }
1388 }
1399 1389
1400 /* We have a spinlock and interrupts disabled, so we must pass 1390 spin_lock_irqsave(&xhci->lock, flags);
1401 * atomic context to this function, which may allocate memory. 1391
1402 */ 1392 if (xhci->xhc_state & XHCI_STATE_DYING) {
1403 spin_lock_irqsave(&xhci->lock, flags); 1393 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
1404 if (xhci->xhc_state & XHCI_STATE_DYING) 1394 urb->ep->desc.bEndpointAddress, urb);
1405 goto dying; 1395 ret = -ESHUTDOWN;
1396 goto free_priv;
1397 }
1398
1399 switch (usb_endpoint_type(&urb->ep->desc)) {
1400
1401 case USB_ENDPOINT_XFER_CONTROL:
1406 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb, 1402 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1407 slot_id, ep_index); 1403 slot_id, ep_index);
1408 if (ret) 1404 break;
1409 goto free_priv; 1405 case USB_ENDPOINT_XFER_BULK:
1410 spin_unlock_irqrestore(&xhci->lock, flags); 1406 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1411 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) { 1407 if (ep_state & (EP_GETTING_STREAMS | EP_GETTING_NO_STREAMS)) {
1412 spin_lock_irqsave(&xhci->lock, flags); 1408 xhci_warn(xhci, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
1413 if (xhci->xhc_state & XHCI_STATE_DYING) 1409 ep_state);
1414 goto dying;
1415 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1416 EP_GETTING_STREAMS) {
1417 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1418 "is transitioning to using streams.\n");
1419 ret = -EINVAL;
1420 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1421 EP_GETTING_NO_STREAMS) {
1422 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1423 "is transitioning to "
1424 "not having streams.\n");
1425 ret = -EINVAL; 1410 ret = -EINVAL;
1426 } else { 1411 break;
1427 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1428 slot_id, ep_index);
1429 } 1412 }
1430 if (ret) 1413 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1431 goto free_priv; 1414 slot_id, ep_index);
1432 spin_unlock_irqrestore(&xhci->lock, flags); 1415 break;
1433 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) { 1416
1434 spin_lock_irqsave(&xhci->lock, flags); 1417
1435 if (xhci->xhc_state & XHCI_STATE_DYING) 1418 case USB_ENDPOINT_XFER_INT:
1436 goto dying;
1437 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb, 1419 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1438 slot_id, ep_index); 1420 slot_id, ep_index);
1439 if (ret) 1421 break;
1440 goto free_priv; 1422
1441 spin_unlock_irqrestore(&xhci->lock, flags); 1423 case USB_ENDPOINT_XFER_ISOC:
1442 } else {
1443 spin_lock_irqsave(&xhci->lock, flags);
1444 if (xhci->xhc_state & XHCI_STATE_DYING)
1445 goto dying;
1446 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb, 1424 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1447 slot_id, ep_index); 1425 slot_id, ep_index);
1448 if (ret)
1449 goto free_priv;
1450 spin_unlock_irqrestore(&xhci->lock, flags);
1451 } 1426 }
1452exit: 1427
1453 return ret; 1428 if (ret) {
1454dying:
1455 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1456 "non-responsive xHCI host.\n",
1457 urb->ep->desc.bEndpointAddress, urb);
1458 ret = -ESHUTDOWN;
1459free_priv: 1429free_priv:
1460 xhci_urb_free_priv(urb_priv); 1430 xhci_urb_free_priv(urb_priv);
1461 urb->hcpriv = NULL; 1431 urb->hcpriv = NULL;
1432 }
1462 spin_unlock_irqrestore(&xhci->lock, flags); 1433 spin_unlock_irqrestore(&xhci->lock, flags);
1463 return ret; 1434 return ret;
1464} 1435}
@@ -1509,6 +1480,9 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1509 1480
1510 xhci = hcd_to_xhci(hcd); 1481 xhci = hcd_to_xhci(hcd);
1511 spin_lock_irqsave(&xhci->lock, flags); 1482 spin_lock_irqsave(&xhci->lock, flags);
1483
1484 trace_xhci_urb_dequeue(urb);
1485
1512 /* Make sure the URB hasn't completed or been unlinked already */ 1486 /* Make sure the URB hasn't completed or been unlinked already */
1513 ret = usb_hcd_check_unlink_urb(hcd, urb, status); 1487 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1514 if (ret || !urb->hcpriv) 1488 if (ret || !urb->hcpriv)
@@ -1518,10 +1492,10 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1518 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 1492 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1519 "HW died, freeing TD."); 1493 "HW died, freeing TD.");
1520 urb_priv = urb->hcpriv; 1494 urb_priv = urb->hcpriv;
1521 for (i = urb_priv->td_cnt; 1495 for (i = urb_priv->num_tds_done;
1522 i < urb_priv->length && xhci->devs[urb->dev->slot_id]; 1496 i < urb_priv->num_tds && xhci->devs[urb->dev->slot_id];
1523 i++) { 1497 i++) {
1524 td = urb_priv->td[i]; 1498 td = &urb_priv->td[i];
1525 if (!list_empty(&td->td_list)) 1499 if (!list_empty(&td->td_list))
1526 list_del_init(&td->td_list); 1500 list_del_init(&td->td_list);
1527 if (!list_empty(&td->cancelled_td_list)) 1501 if (!list_empty(&td->cancelled_td_list))
@@ -1544,33 +1518,32 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1544 } 1518 }
1545 1519
1546 urb_priv = urb->hcpriv; 1520 urb_priv = urb->hcpriv;
1547 i = urb_priv->td_cnt; 1521 i = urb_priv->num_tds_done;
1548 if (i < urb_priv->length) 1522 if (i < urb_priv->num_tds)
1549 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 1523 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1550 "Cancel URB %p, dev %s, ep 0x%x, " 1524 "Cancel URB %p, dev %s, ep 0x%x, "
1551 "starting at offset 0x%llx", 1525 "starting at offset 0x%llx",
1552 urb, urb->dev->devpath, 1526 urb, urb->dev->devpath,
1553 urb->ep->desc.bEndpointAddress, 1527 urb->ep->desc.bEndpointAddress,
1554 (unsigned long long) xhci_trb_virt_to_dma( 1528 (unsigned long long) xhci_trb_virt_to_dma(
1555 urb_priv->td[i]->start_seg, 1529 urb_priv->td[i].start_seg,
1556 urb_priv->td[i]->first_trb)); 1530 urb_priv->td[i].first_trb));
1557 1531
1558 for (; i < urb_priv->length; i++) { 1532 for (; i < urb_priv->num_tds; i++) {
1559 td = urb_priv->td[i]; 1533 td = &urb_priv->td[i];
1560 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list); 1534 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1561 } 1535 }
1562 1536
1563 /* Queue a stop endpoint command, but only if this is 1537 /* Queue a stop endpoint command, but only if this is
1564 * the first cancellation to be handled. 1538 * the first cancellation to be handled.
1565 */ 1539 */
1566 if (!(ep->ep_state & EP_HALT_PENDING)) { 1540 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) {
1567 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC); 1541 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1568 if (!command) { 1542 if (!command) {
1569 ret = -ENOMEM; 1543 ret = -ENOMEM;
1570 goto done; 1544 goto done;
1571 } 1545 }
1572 ep->ep_state |= EP_HALT_PENDING; 1546 ep->ep_state |= EP_STOP_CMD_PENDING;
1573 ep->stop_cmds_pending++;
1574 ep->stop_cmd_timer.expires = jiffies + 1547 ep->stop_cmd_timer.expires = jiffies +
1575 XHCI_STOP_EP_CMD_TIMEOUT * HZ; 1548 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1576 add_timer(&ep->stop_cmd_timer); 1549 add_timer(&ep->stop_cmd_timer);
@@ -1809,7 +1782,7 @@ static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *vir
1809 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); 1782 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1810 /* Endpoint 0 is always valid */ 1783 /* Endpoint 0 is always valid */
1811 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); 1784 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1812 for (i = 1; i < 31; ++i) { 1785 for (i = 1; i < 31; i++) {
1813 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); 1786 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1814 ep_ctx->ep_info = 0; 1787 ep_ctx->ep_info = 0;
1815 ep_ctx->ep_info2 = 0; 1788 ep_ctx->ep_info2 = 0;
@@ -1824,32 +1797,32 @@ static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1824 int ret; 1797 int ret;
1825 1798
1826 switch (*cmd_status) { 1799 switch (*cmd_status) {
1827 case COMP_CMD_ABORT: 1800 case COMP_COMMAND_ABORTED:
1828 case COMP_CMD_STOP: 1801 case COMP_STOPPED:
1829 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n"); 1802 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1830 ret = -ETIME; 1803 ret = -ETIME;
1831 break; 1804 break;
1832 case COMP_ENOMEM: 1805 case COMP_RESOURCE_ERROR:
1833 dev_warn(&udev->dev, 1806 dev_warn(&udev->dev,
1834 "Not enough host controller resources for new device state.\n"); 1807 "Not enough host controller resources for new device state.\n");
1835 ret = -ENOMEM; 1808 ret = -ENOMEM;
1836 /* FIXME: can we allocate more resources for the HC? */ 1809 /* FIXME: can we allocate more resources for the HC? */
1837 break; 1810 break;
1838 case COMP_BW_ERR: 1811 case COMP_BANDWIDTH_ERROR:
1839 case COMP_2ND_BW_ERR: 1812 case COMP_SECONDARY_BANDWIDTH_ERROR:
1840 dev_warn(&udev->dev, 1813 dev_warn(&udev->dev,
1841 "Not enough bandwidth for new device state.\n"); 1814 "Not enough bandwidth for new device state.\n");
1842 ret = -ENOSPC; 1815 ret = -ENOSPC;
1843 /* FIXME: can we go back to the old state? */ 1816 /* FIXME: can we go back to the old state? */
1844 break; 1817 break;
1845 case COMP_TRB_ERR: 1818 case COMP_TRB_ERROR:
1846 /* the HCD set up something wrong */ 1819 /* the HCD set up something wrong */
1847 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " 1820 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1848 "add flag = 1, " 1821 "add flag = 1, "
1849 "and endpoint is not disabled.\n"); 1822 "and endpoint is not disabled.\n");
1850 ret = -EINVAL; 1823 ret = -EINVAL;
1851 break; 1824 break;
1852 case COMP_DEV_ERR: 1825 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1853 dev_warn(&udev->dev, 1826 dev_warn(&udev->dev,
1854 "ERROR: Incompatible device for endpoint configure command.\n"); 1827 "ERROR: Incompatible device for endpoint configure command.\n");
1855 ret = -ENODEV; 1828 ret = -ENODEV;
@@ -1875,33 +1848,33 @@ static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1875 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id]; 1848 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1876 1849
1877 switch (*cmd_status) { 1850 switch (*cmd_status) {
1878 case COMP_CMD_ABORT: 1851 case COMP_COMMAND_ABORTED:
1879 case COMP_CMD_STOP: 1852 case COMP_STOPPED:
1880 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n"); 1853 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1881 ret = -ETIME; 1854 ret = -ETIME;
1882 break; 1855 break;
1883 case COMP_EINVAL: 1856 case COMP_PARAMETER_ERROR:
1884 dev_warn(&udev->dev, 1857 dev_warn(&udev->dev,
1885 "WARN: xHCI driver setup invalid evaluate context command.\n"); 1858 "WARN: xHCI driver setup invalid evaluate context command.\n");
1886 ret = -EINVAL; 1859 ret = -EINVAL;
1887 break; 1860 break;
1888 case COMP_EBADSLT: 1861 case COMP_SLOT_NOT_ENABLED_ERROR:
1889 dev_warn(&udev->dev, 1862 dev_warn(&udev->dev,
1890 "WARN: slot not enabled for evaluate context command.\n"); 1863 "WARN: slot not enabled for evaluate context command.\n");
1891 ret = -EINVAL; 1864 ret = -EINVAL;
1892 break; 1865 break;
1893 case COMP_CTX_STATE: 1866 case COMP_CONTEXT_STATE_ERROR:
1894 dev_warn(&udev->dev, 1867 dev_warn(&udev->dev,
1895 "WARN: invalid context state for evaluate context command.\n"); 1868 "WARN: invalid context state for evaluate context command.\n");
1896 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1); 1869 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1897 ret = -EINVAL; 1870 ret = -EINVAL;
1898 break; 1871 break;
1899 case COMP_DEV_ERR: 1872 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1900 dev_warn(&udev->dev, 1873 dev_warn(&udev->dev,
1901 "ERROR: Incompatible device for evaluate context command.\n"); 1874 "ERROR: Incompatible device for evaluate context command.\n");
1902 ret = -ENODEV; 1875 ret = -ENODEV;
1903 break; 1876 break;
1904 case COMP_MEL_ERR: 1877 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
1905 /* Max Exit Latency too large error */ 1878 /* Max Exit Latency too large error */
1906 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); 1879 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1907 ret = -EINVAL; 1880 ret = -EINVAL;
@@ -2781,7 +2754,7 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2781 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info))); 2754 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2782 2755
2783 /* Free any rings that were dropped, but not changed. */ 2756 /* Free any rings that were dropped, but not changed. */
2784 for (i = 1; i < 31; ++i) { 2757 for (i = 1; i < 31; i++) {
2785 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && 2758 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2786 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) { 2759 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2787 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); 2760 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
@@ -2793,7 +2766,7 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2793 * Install any rings for completely new endpoints or changed endpoints, 2766 * Install any rings for completely new endpoints or changed endpoints,
2794 * and free or cache any old rings from changed endpoints. 2767 * and free or cache any old rings from changed endpoints.
2795 */ 2768 */
2796 for (i = 1; i < 31; ++i) { 2769 for (i = 1; i < 31; i++) {
2797 if (!virt_dev->eps[i].new_ring) 2770 if (!virt_dev->eps[i].new_ring)
2798 continue; 2771 continue;
2799 /* Only cache or free the old ring if it exists. 2772 /* Only cache or free the old ring if it exists.
@@ -2827,7 +2800,7 @@ void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2827 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); 2800 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2828 virt_dev = xhci->devs[udev->slot_id]; 2801 virt_dev = xhci->devs[udev->slot_id];
2829 /* Free any rings allocated for added endpoints */ 2802 /* Free any rings allocated for added endpoints */
2830 for (i = 0; i < 31; ++i) { 2803 for (i = 0; i < 31; i++) {
2831 if (virt_dev->eps[i].new_ring) { 2804 if (virt_dev->eps[i].new_ring) {
2832 xhci_ring_free(xhci, virt_dev->eps[i].new_ring); 2805 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2833 virt_dev->eps[i].new_ring = NULL; 2806 virt_dev->eps[i].new_ring = NULL;
@@ -3497,13 +3470,13 @@ int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3497 */ 3470 */
3498 ret = reset_device_cmd->status; 3471 ret = reset_device_cmd->status;
3499 switch (ret) { 3472 switch (ret) {
3500 case COMP_CMD_ABORT: 3473 case COMP_COMMAND_ABORTED:
3501 case COMP_CMD_STOP: 3474 case COMP_STOPPED:
3502 xhci_warn(xhci, "Timeout waiting for reset device command\n"); 3475 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3503 ret = -ETIME; 3476 ret = -ETIME;
3504 goto command_cleanup; 3477 goto command_cleanup;
3505 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */ 3478 case COMP_SLOT_NOT_ENABLED_ERROR: /* 0.95 completion for bad slot ID */
3506 case COMP_CTX_STATE: /* 0.96 completion code for same thing */ 3479 case COMP_CONTEXT_STATE_ERROR: /* 0.96 completion code for same thing */
3507 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n", 3480 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3508 slot_id, 3481 slot_id,
3509 xhci_get_slot_state(xhci, virt_dev->out_ctx)); 3482 xhci_get_slot_state(xhci, virt_dev->out_ctx));
@@ -3533,7 +3506,7 @@ int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3533 3506
3534 /* Everything but endpoint 0 is disabled, so free or cache the rings. */ 3507 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3535 last_freed_endpoint = 1; 3508 last_freed_endpoint = 1;
3536 for (i = 1; i < 31; ++i) { 3509 for (i = 1; i < 31; i++) {
3537 struct xhci_virt_ep *ep = &virt_dev->eps[i]; 3510 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3538 3511
3539 if (ep->ep_state & EP_HAS_STREAMS) { 3512 if (ep->ep_state & EP_HAS_STREAMS) {
@@ -3609,8 +3582,8 @@ void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3609 virt_dev = xhci->devs[udev->slot_id]; 3582 virt_dev = xhci->devs[udev->slot_id];
3610 3583
3611 /* Stop any wayward timer functions (which may grab the lock) */ 3584 /* Stop any wayward timer functions (which may grab the lock) */
3612 for (i = 0; i < 31; ++i) { 3585 for (i = 0; i < 31; i++) {
3613 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING; 3586 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
3614 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer); 3587 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3615 } 3588 }
3616 3589
@@ -3844,6 +3817,7 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3844 le32_to_cpu(slot_ctx->dev_info) >> 27); 3817 le32_to_cpu(slot_ctx->dev_info) >> 27);
3845 3818
3846 spin_lock_irqsave(&xhci->lock, flags); 3819 spin_lock_irqsave(&xhci->lock, flags);
3820 trace_xhci_setup_device(virt_dev);
3847 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma, 3821 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3848 udev->slot_id, setup); 3822 udev->slot_id, setup);
3849 if (ret) { 3823 if (ret) {
@@ -3863,22 +3837,22 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3863 * command on a timeout. 3837 * command on a timeout.
3864 */ 3838 */
3865 switch (command->status) { 3839 switch (command->status) {
3866 case COMP_CMD_ABORT: 3840 case COMP_COMMAND_ABORTED:
3867 case COMP_CMD_STOP: 3841 case COMP_STOPPED:
3868 xhci_warn(xhci, "Timeout while waiting for setup device command\n"); 3842 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3869 ret = -ETIME; 3843 ret = -ETIME;
3870 break; 3844 break;
3871 case COMP_CTX_STATE: 3845 case COMP_CONTEXT_STATE_ERROR:
3872 case COMP_EBADSLT: 3846 case COMP_SLOT_NOT_ENABLED_ERROR:
3873 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n", 3847 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3874 act, udev->slot_id); 3848 act, udev->slot_id);
3875 ret = -EINVAL; 3849 ret = -EINVAL;
3876 break; 3850 break;
3877 case COMP_TX_ERR: 3851 case COMP_USB_TRANSACTION_ERROR:
3878 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act); 3852 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3879 ret = -EPROTO; 3853 ret = -EPROTO;
3880 break; 3854 break;
3881 case COMP_DEV_ERR: 3855 case COMP_INCOMPATIBLE_DEVICE_ERROR:
3882 dev_warn(&udev->dev, 3856 dev_warn(&udev->dev,
3883 "ERROR: Incompatible device for setup %s command\n", act); 3857 "ERROR: Incompatible device for setup %s command\n", act);
3884 ret = -ENODEV; 3858 ret = -ENODEV;
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 2d7b6374b58d..da3eb695fe54 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -912,7 +912,7 @@ struct xhci_virt_ep {
912 unsigned int ep_state; 912 unsigned int ep_state;
913#define SET_DEQ_PENDING (1 << 0) 913#define SET_DEQ_PENDING (1 << 0)
914#define EP_HALTED (1 << 1) /* For stall handling */ 914#define EP_HALTED (1 << 1) /* For stall handling */
915#define EP_HALT_PENDING (1 << 2) /* For URB cancellation */ 915#define EP_STOP_CMD_PENDING (1 << 2) /* For URB cancellation */
916/* Transitioning the endpoint to using streams, don't enqueue URBs */ 916/* Transitioning the endpoint to using streams, don't enqueue URBs */
917#define EP_GETTING_STREAMS (1 << 3) 917#define EP_GETTING_STREAMS (1 << 3)
918#define EP_HAS_STREAMS (1 << 4) 918#define EP_HAS_STREAMS (1 << 4)
@@ -924,7 +924,6 @@ struct xhci_virt_ep {
924 unsigned int stopped_stream; 924 unsigned int stopped_stream;
925 /* Watchdog timer for stop endpoint command to cancel URBs */ 925 /* Watchdog timer for stop endpoint command to cancel URBs */
926 struct timer_list stop_cmd_timer; 926 struct timer_list stop_cmd_timer;
927 int stop_cmds_pending;
928 struct xhci_hcd *xhci; 927 struct xhci_hcd *xhci;
929 /* Dequeue pointer and dequeue segment for a submitted Set TR Dequeue 928 /* Dequeue pointer and dequeue segment for a submitted Set TR Dequeue
930 * command. We'll need to update the ring's dequeue segment and dequeue 929 * command. We'll need to update the ring's dequeue segment and dequeue
@@ -1061,76 +1060,122 @@ struct xhci_transfer_event {
1061/* Completion Code - only applicable for some types of TRBs */ 1060/* Completion Code - only applicable for some types of TRBs */
1062#define COMP_CODE_MASK (0xff << 24) 1061#define COMP_CODE_MASK (0xff << 24)
1063#define GET_COMP_CODE(p) (((p) & COMP_CODE_MASK) >> 24) 1062#define GET_COMP_CODE(p) (((p) & COMP_CODE_MASK) >> 24)
1064#define COMP_SUCCESS 1 1063#define COMP_INVALID 0
1065/* Data Buffer Error */ 1064#define COMP_SUCCESS 1
1066#define COMP_DB_ERR 2 1065#define COMP_DATA_BUFFER_ERROR 2
1067/* Babble Detected Error */ 1066#define COMP_BABBLE_DETECTED_ERROR 3
1068#define COMP_BABBLE 3 1067#define COMP_USB_TRANSACTION_ERROR 4
1069/* USB Transaction Error */ 1068#define COMP_TRB_ERROR 5
1070#define COMP_TX_ERR 4 1069#define COMP_STALL_ERROR 6
1071/* TRB Error - some TRB field is invalid */ 1070#define COMP_RESOURCE_ERROR 7
1072#define COMP_TRB_ERR 5 1071#define COMP_BANDWIDTH_ERROR 8
1073/* Stall Error - USB device is stalled */ 1072#define COMP_NO_SLOTS_AVAILABLE_ERROR 9
1074#define COMP_STALL 6 1073#define COMP_INVALID_STREAM_TYPE_ERROR 10
1075/* Resource Error - HC doesn't have memory for that device configuration */ 1074#define COMP_SLOT_NOT_ENABLED_ERROR 11
1076#define COMP_ENOMEM 7 1075#define COMP_ENDPOINT_NOT_ENABLED_ERROR 12
1077/* Bandwidth Error - not enough room in schedule for this dev config */ 1076#define COMP_SHORT_PACKET 13
1078#define COMP_BW_ERR 8 1077#define COMP_RING_UNDERRUN 14
1079/* No Slots Available Error - HC ran out of device slots */ 1078#define COMP_RING_OVERRUN 15
1080#define COMP_ENOSLOTS 9 1079#define COMP_VF_EVENT_RING_FULL_ERROR 16
1081/* Invalid Stream Type Error */ 1080#define COMP_PARAMETER_ERROR 17
1082#define COMP_STREAM_ERR 10 1081#define COMP_BANDWIDTH_OVERRUN_ERROR 18
1083/* Slot Not Enabled Error - doorbell rung for disabled device slot */ 1082#define COMP_CONTEXT_STATE_ERROR 19
1084#define COMP_EBADSLT 11 1083#define COMP_NO_PING_RESPONSE_ERROR 20
1085/* Endpoint Not Enabled Error */ 1084#define COMP_EVENT_RING_FULL_ERROR 21
1086#define COMP_EBADEP 12 1085#define COMP_INCOMPATIBLE_DEVICE_ERROR 22
1087/* Short Packet */ 1086#define COMP_MISSED_SERVICE_ERROR 23
1088#define COMP_SHORT_TX 13 1087#define COMP_COMMAND_RING_STOPPED 24
1089/* Ring Underrun - doorbell rung for an empty isoc OUT ep ring */ 1088#define COMP_COMMAND_ABORTED 25
1090#define COMP_UNDERRUN 14 1089#define COMP_STOPPED 26
1091/* Ring Overrun - isoc IN ep ring is empty when ep is scheduled to RX */ 1090#define COMP_STOPPED_LENGTH_INVALID 27
1092#define COMP_OVERRUN 15 1091#define COMP_STOPPED_SHORT_PACKET 28
1093/* Virtual Function Event Ring Full Error */ 1092#define COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR 29
1094#define COMP_VF_FULL 16 1093#define COMP_ISOCH_BUFFER_OVERRUN 31
1095/* Parameter Error - Context parameter is invalid */ 1094#define COMP_EVENT_LOST_ERROR 32
1096#define COMP_EINVAL 17 1095#define COMP_UNDEFINED_ERROR 33
1097/* Bandwidth Overrun Error - isoc ep exceeded its allocated bandwidth */ 1096#define COMP_INVALID_STREAM_ID_ERROR 34
1098#define COMP_BW_OVER 18 1097#define COMP_SECONDARY_BANDWIDTH_ERROR 35
1099/* Context State Error - illegal context state transition requested */ 1098#define COMP_SPLIT_TRANSACTION_ERROR 36
1100#define COMP_CTX_STATE 19 1099
1101/* No Ping Response Error - HC didn't get PING_RESPONSE in time to TX */ 1100static inline const char *xhci_trb_comp_code_string(u8 status)
1102#define COMP_PING_ERR 20 1101{
1103/* Event Ring is full */ 1102 switch (status) {
1104#define COMP_ER_FULL 21 1103 case COMP_INVALID:
1105/* Incompatible Device Error */ 1104 return "Invalid";
1106#define COMP_DEV_ERR 22 1105 case COMP_SUCCESS:
1107/* Missed Service Error - HC couldn't service an isoc ep within interval */ 1106 return "Success";
1108#define COMP_MISSED_INT 23 1107 case COMP_DATA_BUFFER_ERROR:
1109/* Successfully stopped command ring */ 1108 return "Data Buffer Error";
1110#define COMP_CMD_STOP 24 1109 case COMP_BABBLE_DETECTED_ERROR:
1111/* Successfully aborted current command and stopped command ring */ 1110 return "Babble Detected";
1112#define COMP_CMD_ABORT 25 1111 case COMP_USB_TRANSACTION_ERROR:
1113/* Stopped - transfer was terminated by a stop endpoint command */ 1112 return "USB Transaction Error";
1114#define COMP_STOP 26 1113 case COMP_TRB_ERROR:
1115/* Same as COMP_EP_STOPPED, but the transferred length in the event is invalid */ 1114 return "TRB Error";
1116#define COMP_STOP_INVAL 27 1115 case COMP_STALL_ERROR:
1117/* Same as COMP_EP_STOPPED, but a short packet detected */ 1116 return "Stall Error";
1118#define COMP_STOP_SHORT 28 1117 case COMP_RESOURCE_ERROR:
1119/* Max Exit Latency Too Large Error */ 1118 return "Resource Error";
1120#define COMP_MEL_ERR 29 1119 case COMP_BANDWIDTH_ERROR:
1121/* TRB type 30 reserved */ 1120 return "Bandwidth Error";
1122/* Isoc Buffer Overrun - an isoc IN ep sent more data than could fit in TD */ 1121 case COMP_NO_SLOTS_AVAILABLE_ERROR:
1123#define COMP_BUFF_OVER 31 1122 return "No Slots Available Error";
1124/* Event Lost Error - xHC has an "internal event overrun condition" */ 1123 case COMP_INVALID_STREAM_TYPE_ERROR:
1125#define COMP_ISSUES 32 1124 return "Invalid Stream Type Error";
1126/* Undefined Error - reported when other error codes don't apply */ 1125 case COMP_SLOT_NOT_ENABLED_ERROR:
1127#define COMP_UNKNOWN 33 1126 return "Slot Not Enabled Error";
1128/* Invalid Stream ID Error */ 1127 case COMP_ENDPOINT_NOT_ENABLED_ERROR:
1129#define COMP_STRID_ERR 34 1128 return "Endpoint Not Enabled Error";
1130/* Secondary Bandwidth Error - may be returned by a Configure Endpoint cmd */ 1129 case COMP_SHORT_PACKET:
1131#define COMP_2ND_BW_ERR 35 1130 return "Short Packet";
1132/* Split Transaction Error */ 1131 case COMP_RING_UNDERRUN:
1133#define COMP_SPLIT_ERR 36 1132 return "Ring Underrun";
1133 case COMP_RING_OVERRUN:
1134 return "Ring Overrun";
1135 case COMP_VF_EVENT_RING_FULL_ERROR:
1136 return "VF Event Ring Full Error";
1137 case COMP_PARAMETER_ERROR:
1138 return "Parameter Error";
1139 case COMP_BANDWIDTH_OVERRUN_ERROR:
1140 return "Bandwidth Overrun Error";
1141 case COMP_CONTEXT_STATE_ERROR:
1142 return "Context State Error";
1143 case COMP_NO_PING_RESPONSE_ERROR:
1144 return "No Ping Response Error";
1145 case COMP_EVENT_RING_FULL_ERROR:
1146 return "Event Ring Full Error";
1147 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1148 return "Incompatible Device Error";
1149 case COMP_MISSED_SERVICE_ERROR:
1150 return "Missed Service Error";
1151 case COMP_COMMAND_RING_STOPPED:
1152 return "Command Ring Stopped";
1153 case COMP_COMMAND_ABORTED:
1154 return "Command Aborted";
1155 case COMP_STOPPED:
1156 return "Stopped";
1157 case COMP_STOPPED_LENGTH_INVALID:
1158 return "Stopped - Length Invalid";
1159 case COMP_STOPPED_SHORT_PACKET:
1160 return "Stopped - Short Packet";
1161 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
1162 return "Max Exit Latency Too Large Error";
1163 case COMP_ISOCH_BUFFER_OVERRUN:
1164 return "Isoch Buffer Overrun";
1165 case COMP_EVENT_LOST_ERROR:
1166 return "Event Lost Error";
1167 case COMP_UNDEFINED_ERROR:
1168 return "Undefined Error";
1169 case COMP_INVALID_STREAM_ID_ERROR:
1170 return "Invalid Stream ID Error";
1171 case COMP_SECONDARY_BANDWIDTH_ERROR:
1172 return "Secondary Bandwidth Error";
1173 case COMP_SPLIT_TRANSACTION_ERROR:
1174 return "Split Transaction Error";
1175 default:
1176 return "Unknown!!";
1177 }
1178}
1134 1179
1135struct xhci_link_trb { 1180struct xhci_link_trb {
1136 /* 64-bit segment pointer*/ 1181 /* 64-bit segment pointer*/
@@ -1154,6 +1199,27 @@ struct xhci_event_cmd {
1154 1199
1155/* Address device - disable SetAddress */ 1200/* Address device - disable SetAddress */
1156#define TRB_BSR (1<<9) 1201#define TRB_BSR (1<<9)
1202
1203/* Configure Endpoint - Deconfigure */
1204#define TRB_DC (1<<9)
1205
1206/* Stop Ring - Transfer State Preserve */
1207#define TRB_TSP (1<<9)
1208
1209/* Force Event */
1210#define TRB_TO_VF_INTR_TARGET(p) (((p) & (0x3ff << 22)) >> 22)
1211#define TRB_TO_VF_ID(p) (((p) & (0xff << 16)) >> 16)
1212
1213/* Set Latency Tolerance Value */
1214#define TRB_TO_BELT(p) (((p) & (0xfff << 16)) >> 16)
1215
1216/* Get Port Bandwidth */
1217#define TRB_TO_DEV_SPEED(p) (((p) & (0xf << 16)) >> 16)
1218
1219/* Force Header */
1220#define TRB_TO_PACKET_TYPE(p) ((p) & 0x1f)
1221#define TRB_TO_ROOTHUB_PORT(p) (((p) & (0xff << 24)) >> 24)
1222
1157enum xhci_setup_dev { 1223enum xhci_setup_dev {
1158 SETUP_CONTEXT_ONLY, 1224 SETUP_CONTEXT_ONLY,
1159 SETUP_CONTEXT_ADDRESS, 1225 SETUP_CONTEXT_ADDRESS,
@@ -1177,16 +1243,21 @@ enum xhci_setup_dev {
1177#define STREAM_ID_FOR_TRB(p) ((((p)) & 0xffff) << 16) 1243#define STREAM_ID_FOR_TRB(p) ((((p)) & 0xffff) << 16)
1178#define SCT_FOR_TRB(p) (((p) << 1) & 0x7) 1244#define SCT_FOR_TRB(p) (((p) << 1) & 0x7)
1179 1245
1246/* Link TRB specific fields */
1247#define TRB_TC (1<<1)
1180 1248
1181/* Port Status Change Event TRB fields */ 1249/* Port Status Change Event TRB fields */
1182/* Port ID - bits 31:24 */ 1250/* Port ID - bits 31:24 */
1183#define GET_PORT_ID(p) (((p) & (0xff << 24)) >> 24) 1251#define GET_PORT_ID(p) (((p) & (0xff << 24)) >> 24)
1184 1252
1253#define EVENT_DATA (1 << 2)
1254
1185/* Normal TRB fields */ 1255/* Normal TRB fields */
1186/* transfer_len bitmasks - bits 0:16 */ 1256/* transfer_len bitmasks - bits 0:16 */
1187#define TRB_LEN(p) ((p) & 0x1ffff) 1257#define TRB_LEN(p) ((p) & 0x1ffff)
1188/* TD Size, packets remaining in this TD, bits 21:17 (5 bits, so max 31) */ 1258/* TD Size, packets remaining in this TD, bits 21:17 (5 bits, so max 31) */
1189#define TRB_TD_SIZE(p) (min((p), (u32)31) << 17) 1259#define TRB_TD_SIZE(p) (min((p), (u32)31) << 17)
1260#define GET_TD_SIZE(p) (((p) & 0x3e0000) >> 17)
1190/* xhci 1.1 uses the TD_SIZE field for TBC if Extended TBC is enabled (ETE) */ 1261/* xhci 1.1 uses the TD_SIZE field for TBC if Extended TBC is enabled (ETE) */
1191#define TRB_TD_SIZE_TBC(p) (min((p), (u32)31) << 17) 1262#define TRB_TD_SIZE_TBC(p) (min((p), (u32)31) << 17)
1192/* Interrupter Target - which MSI-X vector to target the completion event at */ 1263/* Interrupter Target - which MSI-X vector to target the completion event at */
@@ -1314,6 +1385,80 @@ union xhci_trb {
1314/* Get NEC firmware revision. */ 1385/* Get NEC firmware revision. */
1315#define TRB_NEC_GET_FW 49 1386#define TRB_NEC_GET_FW 49
1316 1387
1388static inline const char *xhci_trb_type_string(u8 type)
1389{
1390 switch (type) {
1391 case TRB_NORMAL:
1392 return "Normal";
1393 case TRB_SETUP:
1394 return "Setup Stage";
1395 case TRB_DATA:
1396 return "Data Stage";
1397 case TRB_STATUS:
1398 return "Status Stage";
1399 case TRB_ISOC:
1400 return "Isoch";
1401 case TRB_LINK:
1402 return "Link";
1403 case TRB_EVENT_DATA:
1404 return "Event Data";
1405 case TRB_TR_NOOP:
1406 return "No-Op";
1407 case TRB_ENABLE_SLOT:
1408 return "Enable Slot Command";
1409 case TRB_DISABLE_SLOT:
1410 return "Disable Slot Command";
1411 case TRB_ADDR_DEV:
1412 return "Address Device Command";
1413 case TRB_CONFIG_EP:
1414 return "Configure Endpoint Command";
1415 case TRB_EVAL_CONTEXT:
1416 return "Evaluate Context Command";
1417 case TRB_RESET_EP:
1418 return "Reset Endpoint Command";
1419 case TRB_STOP_RING:
1420 return "Stop Ring Command";
1421 case TRB_SET_DEQ:
1422 return "Set TR Dequeue Pointer Command";
1423 case TRB_RESET_DEV:
1424 return "Reset Device Command";
1425 case TRB_FORCE_EVENT:
1426 return "Force Event Command";
1427 case TRB_NEG_BANDWIDTH:
1428 return "Negotiate Bandwidth Command";
1429 case TRB_SET_LT:
1430 return "Set Latency Tolerance Value Command";
1431 case TRB_GET_BW:
1432 return "Get Port Bandwidth Command";
1433 case TRB_FORCE_HEADER:
1434 return "Force Header Command";
1435 case TRB_CMD_NOOP:
1436 return "No-Op Command";
1437 case TRB_TRANSFER:
1438 return "Transfer Event";
1439 case TRB_COMPLETION:
1440 return "Command Completion Event";
1441 case TRB_PORT_STATUS:
1442 return "Port Status Change Event";
1443 case TRB_BANDWIDTH_EVENT:
1444 return "Bandwidth Request Event";
1445 case TRB_DOORBELL:
1446 return "Doorbell Event";
1447 case TRB_HC_EVENT:
1448 return "Host Controller Event";
1449 case TRB_DEV_NOTE:
1450 return "Device Notification Event";
1451 case TRB_MFINDEX_WRAP:
1452 return "MFINDEX Wrap Event";
1453 case TRB_NEC_CMD_COMP:
1454 return "NEC Command Completion Event";
1455 case TRB_NEC_GET_FW:
1456 return "NET Get Firmware Revision Command";
1457 default:
1458 return "UNKNOWN";
1459 }
1460}
1461
1317#define TRB_TYPE_LINK(x) (((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) 1462#define TRB_TYPE_LINK(x) (((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
1318/* Above, but for __le32 types -- can avoid work by swapping constants: */ 1463/* Above, but for __le32 types -- can avoid work by swapping constants: */
1319#define TRB_TYPE_LINK_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ 1464#define TRB_TYPE_LINK_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \
@@ -1390,6 +1535,28 @@ enum xhci_ring_type {
1390 TYPE_EVENT, 1535 TYPE_EVENT,
1391}; 1536};
1392 1537
1538static inline const char *xhci_ring_type_string(enum xhci_ring_type type)
1539{
1540 switch (type) {
1541 case TYPE_CTRL:
1542 return "CTRL";
1543 case TYPE_ISOC:
1544 return "ISOC";
1545 case TYPE_BULK:
1546 return "BULK";
1547 case TYPE_INTR:
1548 return "INTR";
1549 case TYPE_STREAM:
1550 return "STREAM";
1551 case TYPE_COMMAND:
1552 return "CMD";
1553 case TYPE_EVENT:
1554 return "EVENT";
1555 }
1556
1557 return "UNKNOWN";
1558}
1559
1393struct xhci_ring { 1560struct xhci_ring {
1394 struct xhci_segment *first_seg; 1561 struct xhci_segment *first_seg;
1395 struct xhci_segment *last_seg; 1562 struct xhci_segment *last_seg;
@@ -1441,9 +1608,9 @@ struct xhci_scratchpad {
1441}; 1608};
1442 1609
1443struct urb_priv { 1610struct urb_priv {
1444 int length; 1611 int num_tds;
1445 int td_cnt; 1612 int num_tds_done;
1446 struct xhci_td *td[0]; 1613 struct xhci_td td[0];
1447}; 1614};
1448 1615
1449/* 1616/*
@@ -1549,7 +1716,6 @@ struct xhci_hcd {
1549 u8 max_ports; 1716 u8 max_ports;
1550 u8 isoc_threshold; 1717 u8 isoc_threshold;
1551 int event_ring_max; 1718 int event_ring_max;
1552 int addr_64;
1553 /* 4KB min, 128MB max */ 1719 /* 4KB min, 128MB max */
1554 int page_size; 1720 int page_size;
1555 /* Valid values are 12 to 20, inclusive */ 1721 /* Valid values are 12 to 20, inclusive */
@@ -1650,6 +1816,9 @@ struct xhci_hcd {
1650#define XHCI_SSIC_PORT_UNUSED (1 << 22) 1816#define XHCI_SSIC_PORT_UNUSED (1 << 22)
1651#define XHCI_NO_64BIT_SUPPORT (1 << 23) 1817#define XHCI_NO_64BIT_SUPPORT (1 << 23)
1652#define XHCI_MISSING_CAS (1 << 24) 1818#define XHCI_MISSING_CAS (1 << 24)
1819/* For controller with a broken Port Disable implementation */
1820#define XHCI_BROKEN_PORT_PED (1 << 25)
1821
1653 unsigned int num_active_eps; 1822 unsigned int num_active_eps;
1654 unsigned int limit_active_eps; 1823 unsigned int limit_active_eps;
1655 /* There are two roothubs to keep track of bus suspend info for */ 1824 /* There are two roothubs to keep track of bus suspend info for */
@@ -1984,4 +2153,211 @@ static inline struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1984 urb->stream_id); 2153 urb->stream_id);
1985} 2154}
1986 2155
2156static inline const char *xhci_decode_trb(u32 field0, u32 field1, u32 field2,
2157 u32 field3)
2158{
2159 static char str[256];
2160 int type = TRB_FIELD_TO_TYPE(field3);
2161
2162 switch (type) {
2163 case TRB_LINK:
2164 sprintf(str,
2165 "TRB %08x%08x status '%s' len %d slot %d ep %d type '%s' flags %c:%c",
2166 field1, field0,
2167 xhci_trb_comp_code_string(GET_COMP_CODE(field2)),
2168 EVENT_TRB_LEN(field2), TRB_TO_SLOT_ID(field3),
2169 /* Macro decrements 1, maybe it shouldn't?!? */
2170 TRB_TO_EP_INDEX(field3) + 1,
2171 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2172 field3 & EVENT_DATA ? 'E' : 'e',
2173 field3 & TRB_CYCLE ? 'C' : 'c');
2174 break;
2175 case TRB_TRANSFER:
2176 case TRB_COMPLETION:
2177 case TRB_PORT_STATUS:
2178 case TRB_BANDWIDTH_EVENT:
2179 case TRB_DOORBELL:
2180 case TRB_HC_EVENT:
2181 case TRB_DEV_NOTE:
2182 case TRB_MFINDEX_WRAP:
2183 sprintf(str,
2184 "TRB %08x%08x status '%s' len %d slot %d ep %d type '%s' flags %c:%c",
2185 field1, field0,
2186 xhci_trb_comp_code_string(GET_COMP_CODE(field2)),
2187 EVENT_TRB_LEN(field2), TRB_TO_SLOT_ID(field3),
2188 /* Macro decrements 1, maybe it shouldn't?!? */
2189 TRB_TO_EP_INDEX(field3) + 1,
2190 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2191 field3 & EVENT_DATA ? 'E' : 'e',
2192 field3 & TRB_CYCLE ? 'C' : 'c');
2193
2194 break;
2195 case TRB_SETUP:
2196 sprintf(str,
2197 "bRequestType %02x bRequest %02x wValue %02x%02x wIndex %02x%02x wLength %d length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c",
2198 field0 & 0xff,
2199 (field0 & 0xff00) >> 8,
2200 (field0 & 0xff000000) >> 24,
2201 (field0 & 0xff0000) >> 16,
2202 (field1 & 0xff00) >> 8,
2203 field1 & 0xff,
2204 (field1 & 0xff000000) >> 16 |
2205 (field1 & 0xff0000) >> 16,
2206 TRB_LEN(field2), GET_TD_SIZE(field2),
2207 GET_INTR_TARGET(field2),
2208 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2209 field3 & TRB_BEI ? 'B' : 'b',
2210 field3 & TRB_IDT ? 'I' : 'i',
2211 field3 & TRB_IOC ? 'I' : 'i',
2212 field3 & TRB_CHAIN ? 'C' : 'c',
2213 field3 & TRB_NO_SNOOP ? 'S' : 's',
2214 field3 & TRB_ISP ? 'I' : 'i',
2215 field3 & TRB_ENT ? 'E' : 'e',
2216 field3 & TRB_CYCLE ? 'C' : 'c');
2217 break;
2218 case TRB_NORMAL:
2219 case TRB_DATA:
2220 case TRB_STATUS:
2221 case TRB_ISOC:
2222 case TRB_EVENT_DATA:
2223 case TRB_TR_NOOP:
2224 sprintf(str,
2225 "Buffer %08x%08x length %d TD size %d intr %d type '%s' flags %c:%c:%c:%c:%c:%c:%c:%c",
2226 field1, field0, TRB_LEN(field2), GET_TD_SIZE(field2),
2227 GET_INTR_TARGET(field2),
2228 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2229 field3 & TRB_BEI ? 'B' : 'b',
2230 field3 & TRB_IDT ? 'I' : 'i',
2231 field3 & TRB_IOC ? 'I' : 'i',
2232 field3 & TRB_CHAIN ? 'C' : 'c',
2233 field3 & TRB_NO_SNOOP ? 'S' : 's',
2234 field3 & TRB_ISP ? 'I' : 'i',
2235 field3 & TRB_ENT ? 'E' : 'e',
2236 field3 & TRB_CYCLE ? 'C' : 'c');
2237 break;
2238
2239 case TRB_CMD_NOOP:
2240 case TRB_ENABLE_SLOT:
2241 sprintf(str,
2242 "%s: flags %c",
2243 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2244 field3 & TRB_CYCLE ? 'C' : 'c');
2245 break;
2246 case TRB_DISABLE_SLOT:
2247 case TRB_NEG_BANDWIDTH:
2248 sprintf(str,
2249 "%s: slot %d flags %c",
2250 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2251 TRB_TO_SLOT_ID(field3),
2252 field3 & TRB_CYCLE ? 'C' : 'c');
2253 break;
2254 case TRB_ADDR_DEV:
2255 sprintf(str,
2256 "%s: ctx %08x%08x slot %d flags %c:%c",
2257 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2258 field1, field0,
2259 TRB_TO_SLOT_ID(field3),
2260 field3 & TRB_BSR ? 'B' : 'b',
2261 field3 & TRB_CYCLE ? 'C' : 'c');
2262 break;
2263 case TRB_CONFIG_EP:
2264 sprintf(str,
2265 "%s: ctx %08x%08x slot %d flags %c:%c",
2266 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2267 field1, field0,
2268 TRB_TO_SLOT_ID(field3),
2269 field3 & TRB_DC ? 'D' : 'd',
2270 field3 & TRB_CYCLE ? 'C' : 'c');
2271 break;
2272 case TRB_EVAL_CONTEXT:
2273 sprintf(str,
2274 "%s: ctx %08x%08x slot %d flags %c",
2275 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2276 field1, field0,
2277 TRB_TO_SLOT_ID(field3),
2278 field3 & TRB_CYCLE ? 'C' : 'c');
2279 break;
2280 case TRB_RESET_EP:
2281 sprintf(str,
2282 "%s: ctx %08x%08x slot %d ep %d flags %c",
2283 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2284 field1, field0,
2285 TRB_TO_SLOT_ID(field3),
2286 /* Macro decrements 1, maybe it shouldn't?!? */
2287 TRB_TO_EP_INDEX(field3) + 1,
2288 field3 & TRB_CYCLE ? 'C' : 'c');
2289 break;
2290 case TRB_STOP_RING:
2291 sprintf(str,
2292 "%s: slot %d sp %d ep %d flags %c",
2293 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2294 TRB_TO_SLOT_ID(field3),
2295 TRB_TO_SUSPEND_PORT(field3),
2296 /* Macro decrements 1, maybe it shouldn't?!? */
2297 TRB_TO_EP_INDEX(field3) + 1,
2298 field3 & TRB_CYCLE ? 'C' : 'c');
2299 break;
2300 case TRB_SET_DEQ:
2301 sprintf(str,
2302 "%s: deq %08x%08x stream %d slot %d ep %d flags %c",
2303 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2304 field1, field0,
2305 TRB_TO_STREAM_ID(field2),
2306 TRB_TO_SLOT_ID(field3),
2307 /* Macro decrements 1, maybe it shouldn't?!? */
2308 TRB_TO_EP_INDEX(field3) + 1,
2309 field3 & TRB_CYCLE ? 'C' : 'c');
2310 break;
2311 case TRB_RESET_DEV:
2312 sprintf(str,
2313 "%s: slot %d flags %c",
2314 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2315 TRB_TO_SLOT_ID(field3),
2316 field3 & TRB_CYCLE ? 'C' : 'c');
2317 break;
2318 case TRB_FORCE_EVENT:
2319 sprintf(str,
2320 "%s: event %08x%08x vf intr %d vf id %d flags %c",
2321 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2322 field1, field0,
2323 TRB_TO_VF_INTR_TARGET(field2),
2324 TRB_TO_VF_ID(field3),
2325 field3 & TRB_CYCLE ? 'C' : 'c');
2326 break;
2327 case TRB_SET_LT:
2328 sprintf(str,
2329 "%s: belt %d flags %c",
2330 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2331 TRB_TO_BELT(field3),
2332 field3 & TRB_CYCLE ? 'C' : 'c');
2333 break;
2334 case TRB_GET_BW:
2335 sprintf(str,
2336 "%s: ctx %08x%08x slot %d speed %d flags %c",
2337 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2338 field1, field0,
2339 TRB_TO_SLOT_ID(field3),
2340 TRB_TO_DEV_SPEED(field3),
2341 field3 & TRB_CYCLE ? 'C' : 'c');
2342 break;
2343 case TRB_FORCE_HEADER:
2344 sprintf(str,
2345 "%s: info %08x%08x%08x pkt type %d roothub port %d flags %c",
2346 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2347 field2, field1, field0 & 0xffffffe0,
2348 TRB_TO_PACKET_TYPE(field0),
2349 TRB_TO_ROOTHUB_PORT(field3),
2350 field3 & TRB_CYCLE ? 'C' : 'c');
2351 break;
2352 default:
2353 sprintf(str,
2354 "type '%s' -> raw %08x %08x %08x %08x",
2355 xhci_trb_type_string(TRB_FIELD_TO_TYPE(field3)),
2356 field0, field1, field2, field3);
2357 }
2358
2359 return str;
2360}
2361
2362
1987#endif /* __LINUX_XHCI_HCD_H */ 2363#endif /* __LINUX_XHCI_HCD_H */
diff --git a/drivers/usb/isp1760/isp1760-udc.c b/drivers/usb/isp1760/isp1760-udc.c
index 1c3d0fd658fa..69400f3da886 100644
--- a/drivers/usb/isp1760/isp1760-udc.c
+++ b/drivers/usb/isp1760/isp1760-udc.c
@@ -1250,7 +1250,7 @@ static int isp1760_udc_stop(struct usb_gadget *gadget)
1250 return 0; 1250 return 0;
1251} 1251}
1252 1252
1253static struct usb_gadget_ops isp1760_udc_ops = { 1253static const struct usb_gadget_ops isp1760_udc_ops = {
1254 .get_frame = isp1760_udc_get_frame, 1254 .get_frame = isp1760_udc_get_frame,
1255 .wakeup = isp1760_udc_wakeup, 1255 .wakeup = isp1760_udc_wakeup,
1256 .set_selfpowered = isp1760_udc_set_selfpowered, 1256 .set_selfpowered = isp1760_udc_set_selfpowered,
diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig
index 47b357760afc..1d1d70d62a19 100644
--- a/drivers/usb/misc/Kconfig
+++ b/drivers/usb/misc/Kconfig
@@ -233,6 +233,15 @@ config USB_EZUSB_FX2
233 Say Y here if you need EZUSB device support. 233 Say Y here if you need EZUSB device support.
234 (Cypress FX/FX2/FX2LP microcontrollers) 234 (Cypress FX/FX2/FX2LP microcontrollers)
235 235
236config USB_HUB_USB251XB
237 tristate "USB251XB Hub Controller Configuration Driver"
238 depends on I2C
239 help
240 This option enables support for configuration via SMBus of the
241 Microchip USB251xB/xBi USB 2.0 Hub Controller series.
242 Configuration parameters may be set in devicetree or platform data.
243 Say Y or M here if you need to configure such a device via SMBus.
244
236config USB_HSIC_USB3503 245config USB_HSIC_USB3503
237 tristate "USB3503 HSIC to USB20 Driver" 246 tristate "USB3503 HSIC to USB20 Driver"
238 depends on I2C 247 depends on I2C
diff --git a/drivers/usb/misc/Makefile b/drivers/usb/misc/Makefile
index 3d1992750da4..f6ac6c99a6e6 100644
--- a/drivers/usb/misc/Makefile
+++ b/drivers/usb/misc/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_USB_TRANCEVIBRATOR) += trancevibrator.o
23obj-$(CONFIG_USB_USS720) += uss720.o 23obj-$(CONFIG_USB_USS720) += uss720.o
24obj-$(CONFIG_USB_SEVSEG) += usbsevseg.o 24obj-$(CONFIG_USB_SEVSEG) += usbsevseg.o
25obj-$(CONFIG_USB_YUREX) += yurex.o 25obj-$(CONFIG_USB_YUREX) += yurex.o
26obj-$(CONFIG_USB_HUB_USB251XB) += usb251xb.o
26obj-$(CONFIG_USB_HSIC_USB3503) += usb3503.o 27obj-$(CONFIG_USB_HSIC_USB3503) += usb3503.o
27obj-$(CONFIG_USB_HSIC_USB4604) += usb4604.o 28obj-$(CONFIG_USB_HSIC_USB4604) += usb4604.o
28obj-$(CONFIG_USB_CHAOSKEY) += chaoskey.o 29obj-$(CONFIG_USB_CHAOSKEY) += chaoskey.o
diff --git a/drivers/usb/misc/adutux.c b/drivers/usb/misc/adutux.c
index 564268fca07a..a540e4f206c4 100644
--- a/drivers/usb/misc/adutux.c
+++ b/drivers/usb/misc/adutux.c
@@ -389,10 +389,6 @@ static ssize_t adu_read(struct file *file, __user char *buffer, size_t count,
389 dev->secondary_head += (amount - i); 389 dev->secondary_head += (amount - i);
390 bytes_read += (amount - i); 390 bytes_read += (amount - i);
391 bytes_to_read -= (amount - i); 391 bytes_to_read -= (amount - i);
392 if (i) {
393 retval = bytes_read ? bytes_read : -EFAULT;
394 goto exit;
395 }
396 } else { 392 } else {
397 /* we check the primary buffer */ 393 /* we check the primary buffer */
398 spin_lock_irqsave (&dev->buflock, flags); 394 spin_lock_irqsave (&dev->buflock, flags);
diff --git a/drivers/usb/misc/sisusbvga/sisusb.c b/drivers/usb/misc/sisusbvga/sisusb.c
index 05bd39d62568..440d7fef58cc 100644
--- a/drivers/usb/misc/sisusbvga/sisusb.c
+++ b/drivers/usb/misc/sisusbvga/sisusb.c
@@ -1831,16 +1831,10 @@ static int sisusb_set_default_mode(struct sisusb_usb_data *sisusb,
1831 SETIREGANDOR(SISCR, 0x09, 0x5f, ((crtcdata[16] & 0x01) << 5)); 1831 SETIREGANDOR(SISCR, 0x09, 0x5f, ((crtcdata[16] & 0x01) << 5));
1832 SETIREG(SISCR, 0x14, 0x4f); 1832 SETIREG(SISCR, 0x14, 0x4f);
1833 du = (modex / 16) * (bpp * 2); /* offset/pitch */ 1833 du = (modex / 16) * (bpp * 2); /* offset/pitch */
1834 if (modex % 16)
1835 du += bpp;
1836
1837 SETIREGANDOR(SISSR, 0x0e, 0xf0, ((du >> 8) & 0x0f)); 1834 SETIREGANDOR(SISSR, 0x0e, 0xf0, ((du >> 8) & 0x0f));
1838 SETIREG(SISCR, 0x13, (du & 0xff)); 1835 SETIREG(SISCR, 0x13, (du & 0xff));
1839 du <<= 5; 1836 du <<= 5;
1840 tmp8 = du >> 8; 1837 tmp8 = du >> 8;
1841 if (du & 0xff)
1842 tmp8++;
1843
1844 SETIREG(SISSR, 0x10, tmp8); 1838 SETIREG(SISSR, 0x10, tmp8);
1845 SETIREG(SISSR, 0x31, 0x00); /* VCLK */ 1839 SETIREG(SISSR, 0x31, 0x00); /* VCLK */
1846 SETIREG(SISSR, 0x2b, 0x1b); 1840 SETIREG(SISSR, 0x2b, 0x1b);
diff --git a/drivers/usb/misc/usb251xb.c b/drivers/usb/misc/usb251xb.c
new file mode 100644
index 000000000000..4e18600dc9b4
--- /dev/null
+++ b/drivers/usb/misc/usb251xb.c
@@ -0,0 +1,605 @@
1/*
2 * Driver for Microchip USB251xB USB 2.0 Hi-Speed Hub Controller
3 * Configuration via SMBus.
4 *
5 * Copyright (c) 2017 SKIDATA AG
6 *
7 * This work is based on the USB3503 driver by Dongjin Kim and
8 * a not-accepted patch by Fabien Lahoudere, see:
9 * https://patchwork.kernel.org/patch/9257715/
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 */
21
22#include <linux/delay.h>
23#include <linux/gpio.h>
24#include <linux/i2c.h>
25#include <linux/module.h>
26#include <linux/nls.h>
27#include <linux/of_device.h>
28#include <linux/of_gpio.h>
29#include <linux/slab.h>
30
31/* Internal Register Set Addresses & Default Values acc. to DS00001692C */
32#define USB251XB_ADDR_VENDOR_ID_LSB 0x00
33#define USB251XB_ADDR_VENDOR_ID_MSB 0x01
34#define USB251XB_DEF_VENDOR_ID 0x0424
35
36#define USB251XB_ADDR_PRODUCT_ID_LSB 0x02
37#define USB251XB_ADDR_PRODUCT_ID_MSB 0x03
38#define USB251XB_DEF_PRODUCT_ID_12 0x2512 /* USB2512B/12Bi */
39#define USB251XB_DEF_PRODUCT_ID_13 0x2513 /* USB2513B/13Bi */
40#define USB251XB_DEF_PRODUCT_ID_14 0x2514 /* USB2514B/14Bi */
41
42#define USB251XB_ADDR_DEVICE_ID_LSB 0x04
43#define USB251XB_ADDR_DEVICE_ID_MSB 0x05
44#define USB251XB_DEF_DEVICE_ID 0x0BB3
45
46#define USB251XB_ADDR_CONFIG_DATA_1 0x06
47#define USB251XB_DEF_CONFIG_DATA_1 0x9B
48#define USB251XB_ADDR_CONFIG_DATA_2 0x07
49#define USB251XB_DEF_CONFIG_DATA_2 0x20
50#define USB251XB_ADDR_CONFIG_DATA_3 0x08
51#define USB251XB_DEF_CONFIG_DATA_3 0x02
52
53#define USB251XB_ADDR_NON_REMOVABLE_DEVICES 0x09
54#define USB251XB_DEF_NON_REMOVABLE_DEVICES 0x00
55
56#define USB251XB_ADDR_PORT_DISABLE_SELF 0x0A
57#define USB251XB_DEF_PORT_DISABLE_SELF 0x00
58#define USB251XB_ADDR_PORT_DISABLE_BUS 0x0B
59#define USB251XB_DEF_PORT_DISABLE_BUS 0x00
60
61#define USB251XB_ADDR_MAX_POWER_SELF 0x0C
62#define USB251XB_DEF_MAX_POWER_SELF 0x01
63#define USB251XB_ADDR_MAX_POWER_BUS 0x0D
64#define USB251XB_DEF_MAX_POWER_BUS 0x32
65
66#define USB251XB_ADDR_MAX_CURRENT_SELF 0x0E
67#define USB251XB_DEF_MAX_CURRENT_SELF 0x01
68#define USB251XB_ADDR_MAX_CURRENT_BUS 0x0F
69#define USB251XB_DEF_MAX_CURRENT_BUS 0x32
70
71#define USB251XB_ADDR_POWER_ON_TIME 0x10
72#define USB251XB_DEF_POWER_ON_TIME 0x32
73
74#define USB251XB_ADDR_LANGUAGE_ID_HIGH 0x11
75#define USB251XB_ADDR_LANGUAGE_ID_LOW 0x12
76#define USB251XB_DEF_LANGUAGE_ID 0x0000
77
78#define USB251XB_STRING_BUFSIZE 62
79#define USB251XB_ADDR_MANUFACTURER_STRING_LEN 0x13
80#define USB251XB_ADDR_MANUFACTURER_STRING 0x16
81#define USB251XB_DEF_MANUFACTURER_STRING "Microchip"
82
83#define USB251XB_ADDR_PRODUCT_STRING_LEN 0x14
84#define USB251XB_ADDR_PRODUCT_STRING 0x54
85#define USB251XB_DEF_PRODUCT_STRING "USB251xB/xBi"
86
87#define USB251XB_ADDR_SERIAL_STRING_LEN 0x15
88#define USB251XB_ADDR_SERIAL_STRING 0x92
89#define USB251XB_DEF_SERIAL_STRING ""
90
91#define USB251XB_ADDR_BATTERY_CHARGING_ENABLE 0xD0
92#define USB251XB_DEF_BATTERY_CHARGING_ENABLE 0x00
93
94#define USB251XB_ADDR_BOOST_UP 0xF6
95#define USB251XB_DEF_BOOST_UP 0x00
96#define USB251XB_ADDR_BOOST_X 0xF8
97#define USB251XB_DEF_BOOST_X 0x00
98
99#define USB251XB_ADDR_PORT_SWAP 0xFA
100#define USB251XB_DEF_PORT_SWAP 0x00
101
102#define USB251XB_ADDR_PORT_MAP_12 0xFB
103#define USB251XB_DEF_PORT_MAP_12 0x00
104#define USB251XB_ADDR_PORT_MAP_34 0xFC
105#define USB251XB_DEF_PORT_MAP_34 0x00 /* USB2513B/i & USB2514B/i only */
106
107#define USB251XB_ADDR_STATUS_COMMAND 0xFF
108#define USB251XB_STATUS_COMMAND_SMBUS_DOWN 0x04
109#define USB251XB_STATUS_COMMAND_RESET 0x02
110#define USB251XB_STATUS_COMMAND_ATTACH 0x01
111
112#define USB251XB_I2C_REG_SZ 0x100
113#define USB251XB_I2C_WRITE_SZ 0x10
114
115#define DRIVER_NAME "usb251xb"
116#define DRIVER_DESC "Microchip USB 2.0 Hi-Speed Hub Controller"
117#define DRIVER_VERSION "1.0"
118
119struct usb251xb {
120 struct device *dev;
121 struct i2c_client *i2c;
122 u8 skip_config;
123 int gpio_reset;
124 u16 vendor_id;
125 u16 product_id;
126 u16 device_id;
127 u8 conf_data1;
128 u8 conf_data2;
129 u8 conf_data3;
130 u8 non_rem_dev;
131 u8 port_disable_sp;
132 u8 port_disable_bp;
133 u8 max_power_sp;
134 u8 max_power_bp;
135 u8 max_current_sp;
136 u8 max_current_bp;
137 u8 power_on_time;
138 u16 lang_id;
139 u8 manufacturer_len;
140 u8 product_len;
141 u8 serial_len;
142 char manufacturer[USB251XB_STRING_BUFSIZE];
143 char product[USB251XB_STRING_BUFSIZE];
144 char serial[USB251XB_STRING_BUFSIZE];
145 u8 bat_charge_en;
146 u8 boost_up;
147 u8 boost_x;
148 u8 port_swap;
149 u8 port_map12;
150 u8 port_map34;
151 u8 status;
152};
153
154struct usb251xb_data {
155 u16 product_id;
156 char product_str[USB251XB_STRING_BUFSIZE / 2]; /* ASCII string */
157};
158
159static const struct usb251xb_data usb2512b_data = {
160 .product_id = 0x2512,
161 .product_str = "USB2512B",
162};
163
164static const struct usb251xb_data usb2512bi_data = {
165 .product_id = 0x2512,
166 .product_str = "USB2512Bi",
167};
168
169static const struct usb251xb_data usb2513b_data = {
170 .product_id = 0x2513,
171 .product_str = "USB2513B",
172};
173
174static const struct usb251xb_data usb2513bi_data = {
175 .product_id = 0x2513,
176 .product_str = "USB2513Bi",
177};
178
179static const struct usb251xb_data usb2514b_data = {
180 .product_id = 0x2514,
181 .product_str = "USB2514B",
182};
183
184static const struct usb251xb_data usb2514bi_data = {
185 .product_id = 0x2514,
186 .product_str = "USB2514Bi",
187};
188
189static void usb251xb_reset(struct usb251xb *hub, int state)
190{
191 if (!gpio_is_valid(hub->gpio_reset))
192 return;
193
194 gpio_set_value_cansleep(hub->gpio_reset, state);
195
196 /* wait for hub recovery/stabilization */
197 if (state)
198 usleep_range(500, 750); /* >=500us at power on */
199 else
200 usleep_range(1, 10); /* >=1us at power down */
201}
202
203static int usb251xb_connect(struct usb251xb *hub)
204{
205 struct device *dev = hub->dev;
206 int err, i;
207 char i2c_wb[USB251XB_I2C_REG_SZ];
208
209 memset(i2c_wb, 0, USB251XB_I2C_REG_SZ);
210
211 if (hub->skip_config) {
212 dev_info(dev, "Skip hub configuration, only attach.\n");
213 i2c_wb[0] = 0x01;
214 i2c_wb[1] = USB251XB_STATUS_COMMAND_ATTACH;
215
216 usb251xb_reset(hub, 1);
217
218 err = i2c_smbus_write_i2c_block_data(hub->i2c,
219 USB251XB_ADDR_STATUS_COMMAND, 2, i2c_wb);
220 if (err) {
221 dev_err(dev, "attaching hub failed: %d\n", err);
222 return err;
223 }
224 return 0;
225 }
226
227 i2c_wb[USB251XB_ADDR_VENDOR_ID_MSB] = (hub->vendor_id >> 8) & 0xFF;
228 i2c_wb[USB251XB_ADDR_VENDOR_ID_LSB] = hub->vendor_id & 0xFF;
229 i2c_wb[USB251XB_ADDR_PRODUCT_ID_MSB] = (hub->product_id >> 8) & 0xFF;
230 i2c_wb[USB251XB_ADDR_PRODUCT_ID_LSB] = hub->product_id & 0xFF;
231 i2c_wb[USB251XB_ADDR_DEVICE_ID_MSB] = (hub->device_id >> 8) & 0xFF;
232 i2c_wb[USB251XB_ADDR_DEVICE_ID_LSB] = hub->device_id & 0xFF;
233 i2c_wb[USB251XB_ADDR_CONFIG_DATA_1] = hub->conf_data1;
234 i2c_wb[USB251XB_ADDR_CONFIG_DATA_2] = hub->conf_data2;
235 i2c_wb[USB251XB_ADDR_CONFIG_DATA_3] = hub->conf_data3;
236 i2c_wb[USB251XB_ADDR_NON_REMOVABLE_DEVICES] = hub->non_rem_dev;
237 i2c_wb[USB251XB_ADDR_PORT_DISABLE_SELF] = hub->port_disable_sp;
238 i2c_wb[USB251XB_ADDR_PORT_DISABLE_BUS] = hub->port_disable_bp;
239 i2c_wb[USB251XB_ADDR_MAX_POWER_SELF] = hub->max_power_sp;
240 i2c_wb[USB251XB_ADDR_MAX_POWER_BUS] = hub->max_power_bp;
241 i2c_wb[USB251XB_ADDR_MAX_CURRENT_SELF] = hub->max_current_sp;
242 i2c_wb[USB251XB_ADDR_MAX_CURRENT_BUS] = hub->max_current_bp;
243 i2c_wb[USB251XB_ADDR_POWER_ON_TIME] = hub->power_on_time;
244 i2c_wb[USB251XB_ADDR_LANGUAGE_ID_HIGH] = (hub->lang_id >> 8) & 0xFF;
245 i2c_wb[USB251XB_ADDR_LANGUAGE_ID_LOW] = hub->lang_id & 0xFF;
246 i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING_LEN] = hub->manufacturer_len;
247 i2c_wb[USB251XB_ADDR_PRODUCT_STRING_LEN] = hub->product_len;
248 i2c_wb[USB251XB_ADDR_SERIAL_STRING_LEN] = hub->serial_len;
249 memcpy(&i2c_wb[USB251XB_ADDR_MANUFACTURER_STRING], hub->manufacturer,
250 USB251XB_STRING_BUFSIZE);
251 memcpy(&i2c_wb[USB251XB_ADDR_SERIAL_STRING], hub->serial,
252 USB251XB_STRING_BUFSIZE);
253 memcpy(&i2c_wb[USB251XB_ADDR_PRODUCT_STRING], hub->product,
254 USB251XB_STRING_BUFSIZE);
255 i2c_wb[USB251XB_ADDR_BATTERY_CHARGING_ENABLE] = hub->bat_charge_en;
256 i2c_wb[USB251XB_ADDR_BOOST_UP] = hub->boost_up;
257 i2c_wb[USB251XB_ADDR_BOOST_X] = hub->boost_x;
258 i2c_wb[USB251XB_ADDR_PORT_SWAP] = hub->port_swap;
259 i2c_wb[USB251XB_ADDR_PORT_MAP_12] = hub->port_map12;
260 i2c_wb[USB251XB_ADDR_PORT_MAP_34] = hub->port_map34;
261 i2c_wb[USB251XB_ADDR_STATUS_COMMAND] = USB251XB_STATUS_COMMAND_ATTACH;
262
263 usb251xb_reset(hub, 1);
264
265 /* write registers */
266 for (i = 0; i < (USB251XB_I2C_REG_SZ / USB251XB_I2C_WRITE_SZ); i++) {
267 int offset = i * USB251XB_I2C_WRITE_SZ;
268 char wbuf[USB251XB_I2C_WRITE_SZ + 1];
269
270 /* The first data byte transferred tells the hub how many data
271 * bytes will follow (byte count).
272 */
273 wbuf[0] = USB251XB_I2C_WRITE_SZ;
274 memcpy(&wbuf[1], &i2c_wb[offset], USB251XB_I2C_WRITE_SZ);
275
276 dev_dbg(dev, "writing %d byte block %d to 0x%02X\n",
277 USB251XB_I2C_WRITE_SZ, i, offset);
278
279 err = i2c_smbus_write_i2c_block_data(hub->i2c, offset,
280 USB251XB_I2C_WRITE_SZ + 1,
281 wbuf);
282 if (err)
283 goto out_err;
284 }
285
286 dev_info(dev, "Hub configuration was successful.\n");
287 return 0;
288
289out_err:
290 dev_err(dev, "configuring block %d failed: %d\n", i, err);
291 return err;
292}
293
294#ifdef CONFIG_OF
295static int usb251xb_get_ofdata(struct usb251xb *hub,
296 struct usb251xb_data *data)
297{
298 struct device *dev = hub->dev;
299 struct device_node *np = dev->of_node;
300 int len, err, i;
301 u32 *property_u32 = NULL;
302 const u32 *cproperty_u32;
303 const char *cproperty_char;
304 char str[USB251XB_STRING_BUFSIZE / 2];
305
306 if (!np) {
307 dev_err(dev, "failed to get ofdata\n");
308 return -ENODEV;
309 }
310
311 if (of_get_property(np, "skip-config", NULL))
312 hub->skip_config = 1;
313 else
314 hub->skip_config = 0;
315
316 hub->gpio_reset = of_get_named_gpio(np, "reset-gpios", 0);
317 if (hub->gpio_reset == -EPROBE_DEFER)
318 return -EPROBE_DEFER;
319 if (gpio_is_valid(hub->gpio_reset)) {
320 err = devm_gpio_request_one(dev, hub->gpio_reset,
321 GPIOF_OUT_INIT_LOW,
322 "usb251xb reset");
323 if (err) {
324 dev_err(dev,
325 "unable to request GPIO %d as reset pin (%d)\n",
326 hub->gpio_reset, err);
327 return err;
328 }
329 }
330
331 if (of_property_read_u16_array(np, "vendor-id", &hub->vendor_id, 1))
332 hub->vendor_id = USB251XB_DEF_VENDOR_ID;
333
334 if (of_property_read_u16_array(np, "product-id",
335 &hub->product_id, 1))
336 hub->product_id = data->product_id;
337
338 if (of_property_read_u16_array(np, "device-id", &hub->device_id, 1))
339 hub->device_id = USB251XB_DEF_DEVICE_ID;
340
341 hub->conf_data1 = USB251XB_DEF_CONFIG_DATA_1;
342 if (of_get_property(np, "self-powered", NULL)) {
343 hub->conf_data1 |= BIT(7);
344
345 /* Configure Over-Current sens when self-powered */
346 hub->conf_data1 &= ~BIT(2);
347 if (of_get_property(np, "ganged-sensing", NULL))
348 hub->conf_data1 &= ~BIT(1);
349 else if (of_get_property(np, "individual-sensing", NULL))
350 hub->conf_data1 |= BIT(1);
351 } else if (of_get_property(np, "bus-powered", NULL)) {
352 hub->conf_data1 &= ~BIT(7);
353
354 /* Disable Over-Current sense when bus-powered */
355 hub->conf_data1 |= BIT(2);
356 }
357
358 if (of_get_property(np, "disable-hi-speed", NULL))
359 hub->conf_data1 |= BIT(5);
360
361 if (of_get_property(np, "multi-tt", NULL))
362 hub->conf_data1 |= BIT(4);
363 else if (of_get_property(np, "single-tt", NULL))
364 hub->conf_data1 &= ~BIT(4);
365
366 if (of_get_property(np, "disable-eop", NULL))
367 hub->conf_data1 |= BIT(3);
368
369 if (of_get_property(np, "individual-port-switching", NULL))
370 hub->conf_data1 |= BIT(0);
371 else if (of_get_property(np, "ganged-port-switching", NULL))
372 hub->conf_data1 &= ~BIT(0);
373
374 hub->conf_data2 = USB251XB_DEF_CONFIG_DATA_2;
375 if (of_get_property(np, "dynamic-power-switching", NULL))
376 hub->conf_data2 |= BIT(7);
377
378 if (of_get_property(np, "oc-delay-100us", NULL)) {
379 hub->conf_data2 &= ~BIT(5);
380 hub->conf_data2 &= ~BIT(4);
381 } else if (of_get_property(np, "oc-delay-4ms", NULL)) {
382 hub->conf_data2 &= ~BIT(5);
383 hub->conf_data2 |= BIT(4);
384 } else if (of_get_property(np, "oc-delay-8ms", NULL)) {
385 hub->conf_data2 |= BIT(5);
386 hub->conf_data2 &= ~BIT(4);
387 } else if (of_get_property(np, "oc-delay-16ms", NULL)) {
388 hub->conf_data2 |= BIT(5);
389 hub->conf_data2 |= BIT(4);
390 }
391
392 if (of_get_property(np, "compound-device", NULL))
393 hub->conf_data2 |= BIT(3);
394
395 hub->conf_data3 = USB251XB_DEF_CONFIG_DATA_3;
396 if (of_get_property(np, "port-mapping-mode", NULL))
397 hub->conf_data3 |= BIT(3);
398
399 if (of_get_property(np, "string-support", NULL))
400 hub->conf_data3 |= BIT(0);
401
402 hub->non_rem_dev = USB251XB_DEF_NON_REMOVABLE_DEVICES;
403 cproperty_u32 = of_get_property(np, "non-removable-ports", &len);
404 if (cproperty_u32 && (len / sizeof(u32)) > 0) {
405 for (i = 0; i < len / sizeof(u32); i++) {
406 u32 port = be32_to_cpu(cproperty_u32[i]);
407
408 if ((port >= 1) && (port <= 4))
409 hub->non_rem_dev |= BIT(port);
410 }
411 }
412
413 hub->port_disable_sp = USB251XB_DEF_PORT_DISABLE_SELF;
414 cproperty_u32 = of_get_property(np, "sp-disabled-ports", &len);
415 if (cproperty_u32 && (len / sizeof(u32)) > 0) {
416 for (i = 0; i < len / sizeof(u32); i++) {
417 u32 port = be32_to_cpu(cproperty_u32[i]);
418
419 if ((port >= 1) && (port <= 4))
420 hub->port_disable_sp |= BIT(port);
421 }
422 }
423
424 hub->port_disable_bp = USB251XB_DEF_PORT_DISABLE_BUS;
425 cproperty_u32 = of_get_property(np, "bp-disabled-ports", &len);
426 if (cproperty_u32 && (len / sizeof(u32)) > 0) {
427 for (i = 0; i < len / sizeof(u32); i++) {
428 u32 port = be32_to_cpu(cproperty_u32[i]);
429
430 if ((port >= 1) && (port <= 4))
431 hub->port_disable_bp |= BIT(port);
432 }
433 }
434
435 hub->max_power_sp = USB251XB_DEF_MAX_POWER_SELF;
436 if (!of_property_read_u32(np, "max-sp-power", property_u32))
437 hub->max_power_sp = min_t(u8, be32_to_cpu(*property_u32) / 2,
438 250);
439
440 hub->max_power_bp = USB251XB_DEF_MAX_POWER_BUS;
441 if (!of_property_read_u32(np, "max-bp-power", property_u32))
442 hub->max_power_bp = min_t(u8, be32_to_cpu(*property_u32) / 2,
443 250);
444
445 hub->max_current_sp = USB251XB_DEF_MAX_CURRENT_SELF;
446 if (!of_property_read_u32(np, "max-sp-current", property_u32))
447 hub->max_current_sp = min_t(u8, be32_to_cpu(*property_u32) / 2,
448 250);
449
450 hub->max_current_bp = USB251XB_DEF_MAX_CURRENT_BUS;
451 if (!of_property_read_u32(np, "max-bp-current", property_u32))
452 hub->max_current_bp = min_t(u8, be32_to_cpu(*property_u32) / 2,
453 250);
454
455 hub->power_on_time = USB251XB_DEF_POWER_ON_TIME;
456 if (!of_property_read_u32(np, "power-on-time", property_u32))
457 hub->power_on_time = min_t(u8, be32_to_cpu(*property_u32) / 2,
458 255);
459
460 if (of_property_read_u16_array(np, "language-id", &hub->lang_id, 1))
461 hub->lang_id = USB251XB_DEF_LANGUAGE_ID;
462
463 cproperty_char = of_get_property(np, "manufacturer", NULL);
464 strlcpy(str, cproperty_char ? : USB251XB_DEF_MANUFACTURER_STRING,
465 sizeof(str));
466 hub->manufacturer_len = strlen(str) & 0xFF;
467 memset(hub->manufacturer, 0, USB251XB_STRING_BUFSIZE);
468 len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str));
469 len = utf8s_to_utf16s(str, len, UTF16_LITTLE_ENDIAN,
470 (wchar_t *)hub->manufacturer,
471 USB251XB_STRING_BUFSIZE);
472
473 cproperty_char = of_get_property(np, "product", NULL);
474 strlcpy(str, cproperty_char ? : data->product_str, sizeof(str));
475 hub->product_len = strlen(str) & 0xFF;
476 memset(hub->product, 0, USB251XB_STRING_BUFSIZE);
477 len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str));
478 len = utf8s_to_utf16s(str, len, UTF16_LITTLE_ENDIAN,
479 (wchar_t *)hub->product,
480 USB251XB_STRING_BUFSIZE);
481
482 cproperty_char = of_get_property(np, "serial", NULL);
483 strlcpy(str, cproperty_char ? : USB251XB_DEF_SERIAL_STRING,
484 sizeof(str));
485 hub->serial_len = strlen(str) & 0xFF;
486 memset(hub->serial, 0, USB251XB_STRING_BUFSIZE);
487 len = min_t(size_t, USB251XB_STRING_BUFSIZE / 2, strlen(str));
488 len = utf8s_to_utf16s(str, len, UTF16_LITTLE_ENDIAN,
489 (wchar_t *)hub->serial,
490 USB251XB_STRING_BUFSIZE);
491
492 /* The following parameters are currently not exposed to devicetree, but
493 * may be as soon as needed.
494 */
495 hub->bat_charge_en = USB251XB_DEF_BATTERY_CHARGING_ENABLE;
496 hub->boost_up = USB251XB_DEF_BOOST_UP;
497 hub->boost_x = USB251XB_DEF_BOOST_X;
498 hub->port_swap = USB251XB_DEF_PORT_SWAP;
499 hub->port_map12 = USB251XB_DEF_PORT_MAP_12;
500 hub->port_map34 = USB251XB_DEF_PORT_MAP_34;
501
502 return 0;
503}
504
505static const struct of_device_id usb251xb_of_match[] = {
506 {
507 .compatible = "microchip,usb2512b",
508 .data = &usb2512b_data,
509 }, {
510 .compatible = "microchip,usb2512bi",
511 .data = &usb2512bi_data,
512 }, {
513 .compatible = "microchip,usb2513b",
514 .data = &usb2513b_data,
515 }, {
516 .compatible = "microchip,usb2513bi",
517 .data = &usb2513bi_data,
518 }, {
519 .compatible = "microchip,usb2514b",
520 .data = &usb2514b_data,
521 }, {
522 .compatible = "microchip,usb2514bi",
523 .data = &usb2514bi_data,
524 }, {
525 /* sentinel */
526 }
527};
528MODULE_DEVICE_TABLE(of, usb251xb_of_match);
529#else /* CONFIG_OF */
530static int usb251xb_get_ofdata(struct usb251xb *hub,
531 struct usb251xb_data *data)
532{
533 return 0;
534}
535#endif /* CONFIG_OF */
536
537static int usb251xb_probe(struct usb251xb *hub)
538{
539 struct device *dev = hub->dev;
540 struct device_node *np = dev->of_node;
541 const struct of_device_id *of_id = of_match_device(usb251xb_of_match,
542 dev);
543 int err;
544
545 if (np) {
546 err = usb251xb_get_ofdata(hub,
547 (struct usb251xb_data *)of_id->data);
548 if (err) {
549 dev_err(dev, "failed to get ofdata: %d\n", err);
550 return err;
551 }
552 }
553
554 err = usb251xb_connect(hub);
555 if (err) {
556 dev_err(dev, "Failed to connect hub (%d)\n", err);
557 return err;
558 }
559
560 dev_info(dev, "Hub probed successfully\n");
561
562 return 0;
563}
564
565static int usb251xb_i2c_probe(struct i2c_client *i2c,
566 const struct i2c_device_id *id)
567{
568 struct usb251xb *hub;
569
570 hub = devm_kzalloc(&i2c->dev, sizeof(struct usb251xb), GFP_KERNEL);
571 if (!hub)
572 return -ENOMEM;
573
574 i2c_set_clientdata(i2c, hub);
575 hub->dev = &i2c->dev;
576 hub->i2c = i2c;
577
578 return usb251xb_probe(hub);
579}
580
581static const struct i2c_device_id usb251xb_id[] = {
582 { "usb2512b", 0 },
583 { "usb2512bi", 0 },
584 { "usb2513b", 0 },
585 { "usb2513bi", 0 },
586 { "usb2514b", 0 },
587 { "usb2514bi", 0 },
588 { /* sentinel */ }
589};
590MODULE_DEVICE_TABLE(i2c, usb251xb_id);
591
592static struct i2c_driver usb251xb_i2c_driver = {
593 .driver = {
594 .name = DRIVER_NAME,
595 .of_match_table = of_match_ptr(usb251xb_of_match),
596 },
597 .probe = usb251xb_i2c_probe,
598 .id_table = usb251xb_id,
599};
600
601module_i2c_driver(usb251xb_i2c_driver);
602
603MODULE_AUTHOR("Richard Leitner <richard.leitner@skidata.com>");
604MODULE_DESCRIPTION("USB251xB/xBi USB 2.0 Hub Controller Driver");
605MODULE_LICENSE("GPL");
diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
index 3525626bf086..17c081068257 100644
--- a/drivers/usb/misc/usbtest.c
+++ b/drivers/usb/misc/usbtest.c
@@ -992,7 +992,7 @@ static int ch9_postconfig(struct usbtest_dev *dev)
992 dev_err(&iface->dev, 992 dev_err(&iface->dev,
993 "hs dev qualifier --> %d\n", 993 "hs dev qualifier --> %d\n",
994 retval); 994 retval);
995 return (retval < 0) ? retval : -EDOM; 995 return retval;
996 } 996 }
997 /* usb2.0 but not high-speed capable; fine */ 997 /* usb2.0 but not high-speed capable; fine */
998 } else if (retval != sizeof(struct usb_qualifier_descriptor)) { 998 } else if (retval != sizeof(struct usb_qualifier_descriptor)) {
diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index ba9df719f363..aa6fd6a51221 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -225,6 +225,7 @@ struct ssusb_mtk {
225 /* common power & clock */ 225 /* common power & clock */
226 struct regulator *vusb33; 226 struct regulator *vusb33;
227 struct clk *sys_clk; 227 struct clk *sys_clk;
228 struct clk *ref_clk;
228 /* otg */ 229 /* otg */
229 struct otg_switch_mtk otg_switch; 230 struct otg_switch_mtk otg_switch;
230 enum usb_dr_mode dr_mode; 231 enum usb_dr_mode dr_mode;
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 783367805c99..42550c7db3e7 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -123,7 +123,13 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
123 ret = clk_prepare_enable(ssusb->sys_clk); 123 ret = clk_prepare_enable(ssusb->sys_clk);
124 if (ret) { 124 if (ret) {
125 dev_err(ssusb->dev, "failed to enable sys_clk\n"); 125 dev_err(ssusb->dev, "failed to enable sys_clk\n");
126 goto clk_err; 126 goto sys_clk_err;
127 }
128
129 ret = clk_prepare_enable(ssusb->ref_clk);
130 if (ret) {
131 dev_err(ssusb->dev, "failed to enable ref_clk\n");
132 goto ref_clk_err;
127 } 133 }
128 134
129 ret = ssusb_phy_init(ssusb); 135 ret = ssusb_phy_init(ssusb);
@@ -143,8 +149,10 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
143phy_err: 149phy_err:
144 ssusb_phy_exit(ssusb); 150 ssusb_phy_exit(ssusb);
145phy_init_err: 151phy_init_err:
152 clk_disable_unprepare(ssusb->ref_clk);
153ref_clk_err:
146 clk_disable_unprepare(ssusb->sys_clk); 154 clk_disable_unprepare(ssusb->sys_clk);
147clk_err: 155sys_clk_err:
148 regulator_disable(ssusb->vusb33); 156 regulator_disable(ssusb->vusb33);
149vusb33_err: 157vusb33_err:
150 158
@@ -154,6 +162,7 @@ vusb33_err:
154static void ssusb_rscs_exit(struct ssusb_mtk *ssusb) 162static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
155{ 163{
156 clk_disable_unprepare(ssusb->sys_clk); 164 clk_disable_unprepare(ssusb->sys_clk);
165 clk_disable_unprepare(ssusb->ref_clk);
157 regulator_disable(ssusb->vusb33); 166 regulator_disable(ssusb->vusb33);
158 ssusb_phy_power_off(ssusb); 167 ssusb_phy_power_off(ssusb);
159 ssusb_phy_exit(ssusb); 168 ssusb_phy_exit(ssusb);
@@ -204,6 +213,31 @@ static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
204 int i; 213 int i;
205 int ret; 214 int ret;
206 215
216 ssusb->vusb33 = devm_regulator_get(&pdev->dev, "vusb33");
217 if (IS_ERR(ssusb->vusb33)) {
218 dev_err(dev, "failed to get vusb33\n");
219 return PTR_ERR(ssusb->vusb33);
220 }
221
222 ssusb->sys_clk = devm_clk_get(dev, "sys_ck");
223 if (IS_ERR(ssusb->sys_clk)) {
224 dev_err(dev, "failed to get sys clock\n");
225 return PTR_ERR(ssusb->sys_clk);
226 }
227
228 /*
229 * reference clock is usually a "fixed-clock", make it optional
230 * for backward compatibility and ignore the error if it does
231 * not exist.
232 */
233 ssusb->ref_clk = devm_clk_get(dev, "ref_ck");
234 if (IS_ERR(ssusb->ref_clk)) {
235 if (PTR_ERR(ssusb->ref_clk) == -EPROBE_DEFER)
236 return -EPROBE_DEFER;
237
238 ssusb->ref_clk = NULL;
239 }
240
207 ssusb->num_phys = of_count_phandle_with_args(node, 241 ssusb->num_phys = of_count_phandle_with_args(node,
208 "phys", "#phy-cells"); 242 "phys", "#phy-cells");
209 if (ssusb->num_phys > 0) { 243 if (ssusb->num_phys > 0) {
@@ -225,22 +259,8 @@ static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
225 259
226 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc"); 260 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
227 ssusb->ippc_base = devm_ioremap_resource(dev, res); 261 ssusb->ippc_base = devm_ioremap_resource(dev, res);
228 if (IS_ERR(ssusb->ippc_base)) { 262 if (IS_ERR(ssusb->ippc_base))
229 dev_err(dev, "failed to map memory for ippc\n");
230 return PTR_ERR(ssusb->ippc_base); 263 return PTR_ERR(ssusb->ippc_base);
231 }
232
233 ssusb->vusb33 = devm_regulator_get(&pdev->dev, "vusb33");
234 if (IS_ERR(ssusb->vusb33)) {
235 dev_err(dev, "failed to get vusb33\n");
236 return PTR_ERR(ssusb->vusb33);
237 }
238
239 ssusb->sys_clk = devm_clk_get(dev, "sys_ck");
240 if (IS_ERR(ssusb->sys_clk)) {
241 dev_err(dev, "failed to get sys clock\n");
242 return PTR_ERR(ssusb->sys_clk);
243 }
244 264
245 ssusb->dr_mode = usb_get_dr_mode(dev); 265 ssusb->dr_mode = usb_get_dr_mode(dev);
246 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN) { 266 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN) {
@@ -428,6 +448,7 @@ static int __maybe_unused mtu3_suspend(struct device *dev)
428 ssusb_host_disable(ssusb, true); 448 ssusb_host_disable(ssusb, true);
429 ssusb_phy_power_off(ssusb); 449 ssusb_phy_power_off(ssusb);
430 clk_disable_unprepare(ssusb->sys_clk); 450 clk_disable_unprepare(ssusb->sys_clk);
451 clk_disable_unprepare(ssusb->ref_clk);
431 ssusb_wakeup_enable(ssusb); 452 ssusb_wakeup_enable(ssusb);
432 453
433 return 0; 454 return 0;
@@ -445,6 +466,7 @@ static int __maybe_unused mtu3_resume(struct device *dev)
445 466
446 ssusb_wakeup_disable(ssusb); 467 ssusb_wakeup_disable(ssusb);
447 clk_prepare_enable(ssusb->sys_clk); 468 clk_prepare_enable(ssusb->sys_clk);
469 clk_prepare_enable(ssusb->ref_clk);
448 ssusb_phy_power_on(ssusb); 470 ssusb_phy_power_on(ssusb);
449 ssusb_host_enable(ssusb); 471 ssusb_host_enable(ssusb);
450 472
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
index 50ca8052bc8e..02fbb4fe3745 100644
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
@@ -121,7 +121,6 @@ static void am35x_musb_disable(struct musb *musb)
121 musb_writel(reg_base, CORE_INTR_MASK_CLEAR_REG, AM35X_INTR_USB_MASK); 121 musb_writel(reg_base, CORE_INTR_MASK_CLEAR_REG, AM35X_INTR_USB_MASK);
122 musb_writel(reg_base, EP_INTR_MASK_CLEAR_REG, 122 musb_writel(reg_base, EP_INTR_MASK_CLEAR_REG,
123 AM35X_TX_INTR_MASK | AM35X_RX_INTR_MASK); 123 AM35X_TX_INTR_MASK | AM35X_RX_INTR_MASK);
124 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
125 musb_writel(reg_base, USB_END_OF_INTR_REG, 0); 124 musb_writel(reg_base, USB_END_OF_INTR_REG, 0);
126} 125}
127 126
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index 896798071817..4418574a36a1 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
@@ -581,8 +581,7 @@ static int bfin_remove(struct platform_device *pdev)
581 return 0; 581 return 0;
582} 582}
583 583
584#ifdef CONFIG_PM 584static int __maybe_unused bfin_suspend(struct device *dev)
585static int bfin_suspend(struct device *dev)
586{ 585{
587 struct bfin_glue *glue = dev_get_drvdata(dev); 586 struct bfin_glue *glue = dev_get_drvdata(dev);
588 struct musb *musb = glue_to_musb(glue); 587 struct musb *musb = glue_to_musb(glue);
@@ -599,7 +598,7 @@ static int bfin_suspend(struct device *dev)
599 return 0; 598 return 0;
600} 599}
601 600
602static int bfin_resume(struct device *dev) 601static int __maybe_unused bfin_resume(struct device *dev)
603{ 602{
604 struct bfin_glue *glue = dev_get_drvdata(dev); 603 struct bfin_glue *glue = dev_get_drvdata(dev);
605 struct musb *musb = glue_to_musb(glue); 604 struct musb *musb = glue_to_musb(glue);
@@ -608,7 +607,6 @@ static int bfin_resume(struct device *dev)
608 607
609 return 0; 608 return 0;
610} 609}
611#endif
612 610
613static SIMPLE_DEV_PM_OPS(bfin_pm_ops, bfin_suspend, bfin_resume); 611static SIMPLE_DEV_PM_OPS(bfin_pm_ops, bfin_suspend, bfin_resume);
614 612
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c
index 1ae48e64e975..c4fabe952ca6 100644
--- a/drivers/usb/musb/cppi_dma.c
+++ b/drivers/usb/musb/cppi_dma.c
@@ -224,7 +224,7 @@ static void cppi_controller_stop(struct cppi *controller)
224 int i; 224 int i;
225 struct musb *musb; 225 struct musb *musb;
226 226
227 musb = controller->musb; 227 musb = controller->controller.musb;
228 228
229 tibase = controller->tibase; 229 tibase = controller->tibase;
230 /* DISABLE INDIVIDUAL CHANNEL Interrupts */ 230 /* DISABLE INDIVIDUAL CHANNEL Interrupts */
@@ -288,7 +288,7 @@ cppi_channel_allocate(struct dma_controller *c,
288 288
289 controller = container_of(c, struct cppi, controller); 289 controller = container_of(c, struct cppi, controller);
290 tibase = controller->tibase; 290 tibase = controller->tibase;
291 musb = controller->musb; 291 musb = c->musb;
292 292
293 /* ep0 doesn't use DMA; remember cppi indices are 0..N-1 */ 293 /* ep0 doesn't use DMA; remember cppi indices are 0..N-1 */
294 index = ep->epnum - 1; 294 index = ep->epnum - 1;
@@ -336,7 +336,7 @@ static void cppi_channel_release(struct dma_channel *channel)
336 c = container_of(channel, struct cppi_channel, channel); 336 c = container_of(channel, struct cppi_channel, channel);
337 tibase = c->controller->tibase; 337 tibase = c->controller->tibase;
338 if (!c->hw_ep) 338 if (!c->hw_ep)
339 musb_dbg(c->controller->musb, 339 musb_dbg(c->controller->controller.musb,
340 "releasing idle DMA channel %p", c); 340 "releasing idle DMA channel %p", c);
341 else if (!c->transmit) 341 else if (!c->transmit)
342 core_rxirq_enable(tibase, c->index + 1); 342 core_rxirq_enable(tibase, c->index + 1);
@@ -355,7 +355,7 @@ cppi_dump_rx(int level, struct cppi_channel *c, const char *tag)
355 355
356 musb_ep_select(base, c->index + 1); 356 musb_ep_select(base, c->index + 1);
357 357
358 musb_dbg(c->controller->musb, 358 musb_dbg(c->controller->controller.musb,
359 "RX DMA%d%s: %d left, csr %04x, " 359 "RX DMA%d%s: %d left, csr %04x, "
360 "%08x H%08x S%08x C%08x, " 360 "%08x H%08x S%08x C%08x, "
361 "B%08x L%08x %08x .. %08x", 361 "B%08x L%08x %08x .. %08x",
@@ -385,7 +385,7 @@ cppi_dump_tx(int level, struct cppi_channel *c, const char *tag)
385 385
386 musb_ep_select(base, c->index + 1); 386 musb_ep_select(base, c->index + 1);
387 387
388 musb_dbg(c->controller->musb, 388 musb_dbg(c->controller->controller.musb,
389 "TX DMA%d%s: csr %04x, " 389 "TX DMA%d%s: csr %04x, "
390 "H%08x S%08x C%08x %08x, " 390 "H%08x S%08x C%08x %08x, "
391 "F%08x L%08x .. %08x", 391 "F%08x L%08x .. %08x",
@@ -954,7 +954,7 @@ static int cppi_channel_program(struct dma_channel *ch,
954 954
955 cppi_ch = container_of(ch, struct cppi_channel, channel); 955 cppi_ch = container_of(ch, struct cppi_channel, channel);
956 controller = cppi_ch->controller; 956 controller = cppi_ch->controller;
957 musb = controller->musb; 957 musb = controller->controller.musb;
958 958
959 switch (ch->status) { 959 switch (ch->status) {
960 case MUSB_DMA_STATUS_BUS_ABORT: 960 case MUSB_DMA_STATUS_BUS_ABORT:
@@ -1009,7 +1009,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
1009 int i; 1009 int i;
1010 dma_addr_t safe2ack; 1010 dma_addr_t safe2ack;
1011 void __iomem *regs = rx->hw_ep->regs; 1011 void __iomem *regs = rx->hw_ep->regs;
1012 struct musb *musb = cppi->musb; 1012 struct musb *musb = cppi->controller.musb;
1013 1013
1014 cppi_dump_rx(6, rx, "/K"); 1014 cppi_dump_rx(6, rx, "/K");
1015 1015
@@ -1121,7 +1121,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
1121 * setting it here "should" be racey, but seems to work 1121 * setting it here "should" be racey, but seems to work
1122 */ 1122 */
1123 csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR); 1123 csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
1124 if (is_host_active(cppi->musb) 1124 if (is_host_active(cppi->controller.musb)
1125 && bd 1125 && bd
1126 && !(csr & MUSB_RXCSR_H_REQPKT)) { 1126 && !(csr & MUSB_RXCSR_H_REQPKT)) {
1127 csr |= MUSB_RXCSR_H_REQPKT; 1127 csr |= MUSB_RXCSR_H_REQPKT;
@@ -1311,7 +1311,7 @@ cppi_dma_controller_create(struct musb *musb, void __iomem *mregs)
1311 controller->mregs = mregs; 1311 controller->mregs = mregs;
1312 controller->tibase = mregs - DAVINCI_BASE_OFFSET; 1312 controller->tibase = mregs - DAVINCI_BASE_OFFSET;
1313 1313
1314 controller->musb = musb; 1314 controller->controller.musb = musb;
1315 controller->controller.channel_alloc = cppi_channel_allocate; 1315 controller->controller.channel_alloc = cppi_channel_allocate;
1316 controller->controller.channel_release = cppi_channel_release; 1316 controller->controller.channel_release = cppi_channel_release;
1317 controller->controller.channel_program = cppi_channel_program; 1317 controller->controller.channel_program = cppi_channel_program;
@@ -1323,7 +1323,7 @@ cppi_dma_controller_create(struct musb *musb, void __iomem *mregs)
1323 1323
1324 /* setup BufferPool */ 1324 /* setup BufferPool */
1325 controller->pool = dma_pool_create("cppi", 1325 controller->pool = dma_pool_create("cppi",
1326 controller->musb->controller, 1326 controller->controller.musb->controller,
1327 sizeof(struct cppi_descriptor), 1327 sizeof(struct cppi_descriptor),
1328 CPPI_DESCRIPTOR_ALIGN, 0); 1328 CPPI_DESCRIPTOR_ALIGN, 0);
1329 if (!controller->pool) { 1329 if (!controller->pool) {
@@ -1357,7 +1357,7 @@ void cppi_dma_controller_destroy(struct dma_controller *c)
1357 cppi_controller_stop(cppi); 1357 cppi_controller_stop(cppi);
1358 1358
1359 if (cppi->irq) 1359 if (cppi->irq)
1360 free_irq(cppi->irq, cppi->musb); 1360 free_irq(cppi->irq, cppi->controller.musb);
1361 1361
1362 /* assert: caller stopped the controller first */ 1362 /* assert: caller stopped the controller first */
1363 dma_pool_destroy(cppi->pool); 1363 dma_pool_destroy(cppi->pool);
@@ -1469,7 +1469,7 @@ static int cppi_channel_abort(struct dma_channel *channel)
1469 core_rxirq_disable(tibase, cppi_ch->index + 1); 1469 core_rxirq_disable(tibase, cppi_ch->index + 1);
1470 1470
1471 /* for host, ensure ReqPkt is never set again */ 1471 /* for host, ensure ReqPkt is never set again */
1472 if (is_host_active(cppi_ch->controller->musb)) { 1472 if (is_host_active(cppi_ch->controller->controller.musb)) {
1473 value = musb_readl(tibase, DAVINCI_AUTOREQ_REG); 1473 value = musb_readl(tibase, DAVINCI_AUTOREQ_REG);
1474 value &= ~((0x3) << (cppi_ch->index * 2)); 1474 value &= ~((0x3) << (cppi_ch->index * 2));
1475 musb_writel(tibase, DAVINCI_AUTOREQ_REG, value); 1475 musb_writel(tibase, DAVINCI_AUTOREQ_REG, value);
@@ -1478,7 +1478,7 @@ static int cppi_channel_abort(struct dma_channel *channel)
1478 csr = musb_readw(regs, MUSB_RXCSR); 1478 csr = musb_readw(regs, MUSB_RXCSR);
1479 1479
1480 /* for host, clear (just) ReqPkt at end of current packet(s) */ 1480 /* for host, clear (just) ReqPkt at end of current packet(s) */
1481 if (is_host_active(cppi_ch->controller->musb)) { 1481 if (is_host_active(cppi_ch->controller->controller.musb)) {
1482 csr |= MUSB_RXCSR_H_WZC_BITS; 1482 csr |= MUSB_RXCSR_H_WZC_BITS;
1483 csr &= ~MUSB_RXCSR_H_REQPKT; 1483 csr &= ~MUSB_RXCSR_H_REQPKT;
1484 } else 1484 } else
diff --git a/drivers/usb/musb/cppi_dma.h b/drivers/usb/musb/cppi_dma.h
index 7fdfb71a8f09..9bb7c5e45c85 100644
--- a/drivers/usb/musb/cppi_dma.h
+++ b/drivers/usb/musb/cppi_dma.h
@@ -107,7 +107,6 @@ struct cppi_channel {
107/* CPPI DMA controller object */ 107/* CPPI DMA controller object */
108struct cppi { 108struct cppi {
109 struct dma_controller controller; 109 struct dma_controller controller;
110 struct musb *musb;
111 void __iomem *mregs; /* Mentor regs */ 110 void __iomem *mregs; /* Mentor regs */
112 void __iomem *tibase; /* TI/CPPI regs */ 111 void __iomem *tibase; /* TI/CPPI regs */
113 112
diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index e89708d839e5..d79c288ccbf2 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
@@ -125,7 +125,6 @@ static void da8xx_musb_disable(struct musb *musb)
125 musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG, 125 musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
126 DA8XX_INTR_USB_MASK | 126 DA8XX_INTR_USB_MASK |
127 DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK); 127 DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
128 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
129 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); 128 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
130} 129}
131 130
@@ -458,15 +457,11 @@ static inline u8 get_vbus_power(struct device *dev)
458} 457}
459 458
460static const struct musb_platform_ops da8xx_ops = { 459static const struct musb_platform_ops da8xx_ops = {
461 .quirks = MUSB_DMA_CPPI | MUSB_INDEXED_EP, 460 .quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION,
462 .init = da8xx_musb_init, 461 .init = da8xx_musb_init,
463 .exit = da8xx_musb_exit, 462 .exit = da8xx_musb_exit,
464 463
465 .fifo_mode = 2, 464 .fifo_mode = 2,
466#ifdef CONFIG_USB_TI_CPPI_DMA
467 .dma_init = cppi_dma_controller_create,
468 .dma_exit = cppi_dma_controller_destroy,
469#endif
470 .enable = da8xx_musb_enable, 465 .enable = da8xx_musb_enable,
471 .disable = da8xx_musb_disable, 466 .disable = da8xx_musb_disable,
472 467
@@ -578,6 +573,34 @@ static int da8xx_remove(struct platform_device *pdev)
578 return 0; 573 return 0;
579} 574}
580 575
576#ifdef CONFIG_PM_SLEEP
577static int da8xx_suspend(struct device *dev)
578{
579 int ret;
580 struct da8xx_glue *glue = dev_get_drvdata(dev);
581
582 ret = phy_power_off(glue->phy);
583 if (ret)
584 return ret;
585 clk_disable_unprepare(glue->clk);
586
587 return 0;
588}
589
590static int da8xx_resume(struct device *dev)
591{
592 int ret;
593 struct da8xx_glue *glue = dev_get_drvdata(dev);
594
595 ret = clk_prepare_enable(glue->clk);
596 if (ret)
597 return ret;
598 return phy_power_on(glue->phy);
599}
600#endif
601
602static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
603
581#ifdef CONFIG_OF 604#ifdef CONFIG_OF
582static const struct of_device_id da8xx_id_table[] = { 605static const struct of_device_id da8xx_id_table[] = {
583 { 606 {
@@ -593,6 +616,7 @@ static struct platform_driver da8xx_driver = {
593 .remove = da8xx_remove, 616 .remove = da8xx_remove,
594 .driver = { 617 .driver = {
595 .name = "musb-da8xx", 618 .name = "musb-da8xx",
619 .pm = &da8xx_pm_ops,
596 .of_match_table = of_match_ptr(da8xx_id_table), 620 .of_match_table = of_match_ptr(da8xx_id_table),
597 }, 621 },
598}; 622};
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index cee61a51645e..52b491d3d5d8 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -133,7 +133,6 @@ static void davinci_musb_disable(struct musb *musb)
133 DAVINCI_USB_USBINT_MASK 133 DAVINCI_USB_USBINT_MASK
134 | DAVINCI_USB_TXINT_MASK 134 | DAVINCI_USB_TXINT_MASK
135 | DAVINCI_USB_RXINT_MASK); 135 | DAVINCI_USB_RXINT_MASK);
136 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
137 musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0); 136 musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
138 137
139 if (is_dma_capable() && !dma_off) 138 if (is_dma_capable() && !dma_off)
diff --git a/drivers/usb/musb/jz4740.c b/drivers/usb/musb/jz4740.c
index bc8889956d17..40c68c23d553 100644
--- a/drivers/usb/musb/jz4740.c
+++ b/drivers/usb/musb/jz4740.c
@@ -63,7 +63,7 @@ static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
63{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, }, 63{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
64}; 64};
65 65
66static struct musb_hdrc_config jz4740_musb_config = { 66static const struct musb_hdrc_config jz4740_musb_config = {
67 /* Silicon does not implement USB OTG. */ 67 /* Silicon does not implement USB OTG. */
68 .multipoint = 0, 68 .multipoint = 0,
69 /* Max EPs scanned, driver will decide which EP can be used. */ 69 /* Max EPs scanned, driver will decide which EP can be used. */
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 772f15821242..d8bae6ca8904 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1040,16 +1040,6 @@ static void musb_enable_interrupts(struct musb *musb)
1040 1040
1041} 1041}
1042 1042
1043static void musb_generic_disable(struct musb *musb)
1044{
1045 void __iomem *mbase = musb->mregs;
1046
1047 musb_disable_interrupts(musb);
1048
1049 /* off */
1050 musb_writeb(mbase, MUSB_DEVCTL, 0);
1051}
1052
1053/* 1043/*
1054 * Program the HDRC to start (enable interrupts, dma, etc.). 1044 * Program the HDRC to start (enable interrupts, dma, etc.).
1055 */ 1045 */
@@ -1106,8 +1096,8 @@ void musb_stop(struct musb *musb)
1106{ 1096{
1107 /* stop IRQs, timers, ... */ 1097 /* stop IRQs, timers, ... */
1108 musb_platform_disable(musb); 1098 musb_platform_disable(musb);
1109 musb_generic_disable(musb); 1099 musb_disable_interrupts(musb);
1110 musb_dbg(musb, "HDRC disabled"); 1100 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
1111 1101
1112 /* FIXME 1102 /* FIXME
1113 * - mark host and/or peripheral drivers unusable/inactive 1103 * - mark host and/or peripheral drivers unusable/inactive
@@ -1879,6 +1869,7 @@ static void musb_pm_runtime_check_session(struct musb *musb)
1879 1869
1880 return; 1870 return;
1881 } 1871 }
1872 /* fall through */
1882 case MUSB_QUIRK_A_DISCONNECT_19: 1873 case MUSB_QUIRK_A_DISCONNECT_19:
1883 if (musb->quirk_retries--) { 1874 if (musb->quirk_retries--) {
1884 musb_dbg(musb, 1875 musb_dbg(musb,
@@ -2323,7 +2314,8 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
2323 2314
2324 /* be sure interrupts are disabled before connecting ISR */ 2315 /* be sure interrupts are disabled before connecting ISR */
2325 musb_platform_disable(musb); 2316 musb_platform_disable(musb);
2326 musb_generic_disable(musb); 2317 musb_disable_interrupts(musb);
2318 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
2327 2319
2328 /* Init IRQ workqueue before request_irq */ 2320 /* Init IRQ workqueue before request_irq */
2329 INIT_DELAYED_WORK(&musb->irq_work, musb_irq_work); 2321 INIT_DELAYED_WORK(&musb->irq_work, musb_irq_work);
@@ -2497,11 +2489,13 @@ static int musb_remove(struct platform_device *pdev)
2497 pm_runtime_get_sync(musb->controller); 2489 pm_runtime_get_sync(musb->controller);
2498 musb_host_cleanup(musb); 2490 musb_host_cleanup(musb);
2499 musb_gadget_cleanup(musb); 2491 musb_gadget_cleanup(musb);
2492
2500 spin_lock_irqsave(&musb->lock, flags); 2493 spin_lock_irqsave(&musb->lock, flags);
2501 musb_platform_disable(musb); 2494 musb_platform_disable(musb);
2502 musb_generic_disable(musb); 2495 musb_disable_interrupts(musb);
2503 spin_unlock_irqrestore(&musb->lock, flags);
2504 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 2496 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
2497 spin_unlock_irqrestore(&musb->lock, flags);
2498
2505 pm_runtime_dont_use_autosuspend(musb->controller); 2499 pm_runtime_dont_use_autosuspend(musb->controller);
2506 pm_runtime_put_sync(musb->controller); 2500 pm_runtime_put_sync(musb->controller);
2507 pm_runtime_disable(musb->controller); 2501 pm_runtime_disable(musb->controller);
@@ -2676,7 +2670,9 @@ static int musb_suspend(struct device *dev)
2676 unsigned long flags; 2670 unsigned long flags;
2677 2671
2678 musb_platform_disable(musb); 2672 musb_platform_disable(musb);
2679 musb_generic_disable(musb); 2673 musb_disable_interrupts(musb);
2674 if (!(musb->io.quirks & MUSB_PRESERVE_SESSION))
2675 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
2680 WARN_ON(!list_empty(&musb->pending_list)); 2676 WARN_ON(!list_empty(&musb->pending_list));
2681 2677
2682 spin_lock_irqsave(&musb->lock, flags); 2678 spin_lock_irqsave(&musb->lock, flags);
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index ce5a18c98c6d..5b708be6d1d1 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -172,6 +172,7 @@ struct musb_io;
172 */ 172 */
173struct musb_platform_ops { 173struct musb_platform_ops {
174 174
175#define MUSB_PRESERVE_SESSION BIT(7)
175#define MUSB_DMA_UX500 BIT(6) 176#define MUSB_DMA_UX500 BIT(6)
176#define MUSB_DMA_CPPI41 BIT(5) 177#define MUSB_DMA_CPPI41 BIT(5)
177#define MUSB_DMA_CPPI BIT(4) 178#define MUSB_DMA_CPPI BIT(4)
diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c
index 16363852c034..00e272bfee39 100644
--- a/drivers/usb/musb/musb_cppi41.c
+++ b/drivers/usb/musb/musb_cppi41.c
@@ -30,7 +30,6 @@ struct cppi41_dma_controller {
30 struct dma_controller controller; 30 struct dma_controller controller;
31 struct cppi41_dma_channel rx_channel[MUSB_DMA_NUM_CHANNELS]; 31 struct cppi41_dma_channel rx_channel[MUSB_DMA_NUM_CHANNELS];
32 struct cppi41_dma_channel tx_channel[MUSB_DMA_NUM_CHANNELS]; 32 struct cppi41_dma_channel tx_channel[MUSB_DMA_NUM_CHANNELS];
33 struct musb *musb;
34 struct hrtimer early_tx; 33 struct hrtimer early_tx;
35 struct list_head early_tx_list; 34 struct list_head early_tx_list;
36 u32 rx_mode; 35 u32 rx_mode;
@@ -45,7 +44,7 @@ static void save_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
45 44
46 if (cppi41_channel->is_tx) 45 if (cppi41_channel->is_tx)
47 return; 46 return;
48 if (!is_host_active(cppi41_channel->controller->musb)) 47 if (!is_host_active(cppi41_channel->controller->controller.musb))
49 return; 48 return;
50 49
51 csr = musb_readw(cppi41_channel->hw_ep->regs, MUSB_RXCSR); 50 csr = musb_readw(cppi41_channel->hw_ep->regs, MUSB_RXCSR);
@@ -78,8 +77,7 @@ static void update_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
78 if (!toggle && toggle == cppi41_channel->usb_toggle) { 77 if (!toggle && toggle == cppi41_channel->usb_toggle) {
79 csr |= MUSB_RXCSR_H_DATATOGGLE | MUSB_RXCSR_H_WR_DATATOGGLE; 78 csr |= MUSB_RXCSR_H_DATATOGGLE | MUSB_RXCSR_H_WR_DATATOGGLE;
80 musb_writew(cppi41_channel->hw_ep->regs, MUSB_RXCSR, csr); 79 musb_writew(cppi41_channel->hw_ep->regs, MUSB_RXCSR, csr);
81 musb_dbg(cppi41_channel->controller->musb, 80 musb_dbg(musb, "Restoring DATA1 toggle.");
82 "Restoring DATA1 toggle.");
83 } 81 }
84 82
85 cppi41_channel->usb_toggle = toggle; 83 cppi41_channel->usb_toggle = toggle;
@@ -99,7 +97,8 @@ static bool musb_is_tx_fifo_empty(struct musb_hw_ep *hw_ep)
99 return true; 97 return true;
100} 98}
101 99
102static void cppi41_dma_callback(void *private_data); 100static void cppi41_dma_callback(void *private_data,
101 const struct dmaengine_result *result);
103 102
104static void cppi41_trans_done(struct cppi41_dma_channel *cppi41_channel) 103static void cppi41_trans_done(struct cppi41_dma_channel *cppi41_channel)
105{ 104{
@@ -154,7 +153,7 @@ static void cppi41_trans_done(struct cppi41_dma_channel *cppi41_channel)
154 if (WARN_ON(!dma_desc)) 153 if (WARN_ON(!dma_desc))
155 return; 154 return;
156 155
157 dma_desc->callback = cppi41_dma_callback; 156 dma_desc->callback_result = cppi41_dma_callback;
158 dma_desc->callback_param = &cppi41_channel->channel; 157 dma_desc->callback_param = &cppi41_channel->channel;
159 cppi41_channel->cookie = dma_desc->tx_submit(dma_desc); 158 cppi41_channel->cookie = dma_desc->tx_submit(dma_desc);
160 trace_musb_cppi41_cont(cppi41_channel); 159 trace_musb_cppi41_cont(cppi41_channel);
@@ -179,7 +178,7 @@ static enum hrtimer_restart cppi41_recheck_tx_req(struct hrtimer *timer)
179 178
180 controller = container_of(timer, struct cppi41_dma_controller, 179 controller = container_of(timer, struct cppi41_dma_controller,
181 early_tx); 180 early_tx);
182 musb = controller->musb; 181 musb = controller->controller.musb;
183 182
184 spin_lock_irqsave(&musb->lock, flags); 183 spin_lock_irqsave(&musb->lock, flags);
185 list_for_each_entry_safe(cppi41_channel, n, &controller->early_tx_list, 184 list_for_each_entry_safe(cppi41_channel, n, &controller->early_tx_list,
@@ -204,7 +203,8 @@ static enum hrtimer_restart cppi41_recheck_tx_req(struct hrtimer *timer)
204 return ret; 203 return ret;
205} 204}
206 205
207static void cppi41_dma_callback(void *private_data) 206static void cppi41_dma_callback(void *private_data,
207 const struct dmaengine_result *result)
208{ 208{
209 struct dma_channel *channel = private_data; 209 struct dma_channel *channel = private_data;
210 struct cppi41_dma_channel *cppi41_channel = channel->private_data; 210 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
@@ -217,6 +217,13 @@ static void cppi41_dma_callback(void *private_data)
217 int is_hs = 0; 217 int is_hs = 0;
218 bool empty; 218 bool empty;
219 219
220 controller = cppi41_channel->controller;
221 if (controller->controller.dma_callback)
222 controller->controller.dma_callback(&controller->controller);
223
224 if (result->result == DMA_TRANS_ABORTED)
225 return;
226
220 spin_lock_irqsave(&musb->lock, flags); 227 spin_lock_irqsave(&musb->lock, flags);
221 228
222 dmaengine_tx_status(cppi41_channel->dc, cppi41_channel->cookie, 229 dmaengine_tx_status(cppi41_channel->dc, cppi41_channel->cookie,
@@ -249,8 +256,6 @@ static void cppi41_dma_callback(void *private_data)
249 * We spin on HS (no longer than than 25us and setup a timer on 256 * We spin on HS (no longer than than 25us and setup a timer on
250 * FS to check for the bit and complete the transfer. 257 * FS to check for the bit and complete the transfer.
251 */ 258 */
252 controller = cppi41_channel->controller;
253
254 if (is_host_active(musb)) { 259 if (is_host_active(musb)) {
255 if (musb->port1_status & USB_PORT_STAT_HIGH_SPEED) 260 if (musb->port1_status & USB_PORT_STAT_HIGH_SPEED)
256 is_hs = 1; 261 is_hs = 1;
@@ -302,6 +307,7 @@ static void cppi41_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
302 unsigned mode) 307 unsigned mode)
303{ 308{
304 struct cppi41_dma_controller *controller = cppi41_channel->controller; 309 struct cppi41_dma_controller *controller = cppi41_channel->controller;
310 struct musb *musb = controller->controller.musb;
305 u32 port; 311 u32 port;
306 u32 new_mode; 312 u32 new_mode;
307 u32 old_mode; 313 u32 old_mode;
@@ -317,12 +323,10 @@ static void cppi41_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
317 return; 323 return;
318 if (cppi41_channel->is_tx) { 324 if (cppi41_channel->is_tx) {
319 controller->tx_mode = new_mode; 325 controller->tx_mode = new_mode;
320 musb_writel(controller->musb->ctrl_base, USB_CTRL_TX_MODE, 326 musb_writel(musb->ctrl_base, USB_CTRL_TX_MODE, new_mode);
321 new_mode);
322 } else { 327 } else {
323 controller->rx_mode = new_mode; 328 controller->rx_mode = new_mode;
324 musb_writel(controller->musb->ctrl_base, USB_CTRL_RX_MODE, 329 musb_writel(musb->ctrl_base, USB_CTRL_RX_MODE, new_mode);
325 new_mode);
326 } 330 }
327} 331}
328 332
@@ -341,7 +345,8 @@ static void cppi41_set_autoreq_mode(struct cppi41_dma_channel *cppi41_channel,
341 if (new_mode == old_mode) 345 if (new_mode == old_mode)
342 return; 346 return;
343 controller->auto_req = new_mode; 347 controller->auto_req = new_mode;
344 musb_writel(controller->musb->ctrl_base, USB_CTRL_AUTOREQ, new_mode); 348 musb_writel(controller->controller.musb->ctrl_base, USB_CTRL_AUTOREQ,
349 new_mode);
345} 350}
346 351
347static bool cppi41_configure_channel(struct dma_channel *channel, 352static bool cppi41_configure_channel(struct dma_channel *channel,
@@ -352,7 +357,7 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
352 struct dma_chan *dc = cppi41_channel->dc; 357 struct dma_chan *dc = cppi41_channel->dc;
353 struct dma_async_tx_descriptor *dma_desc; 358 struct dma_async_tx_descriptor *dma_desc;
354 enum dma_transfer_direction direction; 359 enum dma_transfer_direction direction;
355 struct musb *musb = cppi41_channel->controller->musb; 360 struct musb *musb = cppi41_channel->controller->controller.musb;
356 unsigned use_gen_rndis = 0; 361 unsigned use_gen_rndis = 0;
357 362
358 cppi41_channel->buf_addr = dma_addr; 363 cppi41_channel->buf_addr = dma_addr;
@@ -401,7 +406,7 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
401 if (!dma_desc) 406 if (!dma_desc)
402 return false; 407 return false;
403 408
404 dma_desc->callback = cppi41_dma_callback; 409 dma_desc->callback_result = cppi41_dma_callback;
405 dma_desc->callback_param = channel; 410 dma_desc->callback_param = channel;
406 cppi41_channel->cookie = dma_desc->tx_submit(dma_desc); 411 cppi41_channel->cookie = dma_desc->tx_submit(dma_desc);
407 cppi41_channel->channel.rx_packet_done = false; 412 cppi41_channel->channel.rx_packet_done = false;
@@ -465,7 +470,7 @@ static int cppi41_dma_channel_program(struct dma_channel *channel,
465 BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || 470 BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN ||
466 channel->status == MUSB_DMA_STATUS_BUSY); 471 channel->status == MUSB_DMA_STATUS_BUSY);
467 472
468 if (is_host_active(cppi41_channel->controller->musb)) { 473 if (is_host_active(cppi41_channel->controller->controller.musb)) {
469 if (cppi41_channel->is_tx) 474 if (cppi41_channel->is_tx)
470 hb_mult = cppi41_channel->hw_ep->out_qh->hb_mult; 475 hb_mult = cppi41_channel->hw_ep->out_qh->hb_mult;
471 else 476 else
@@ -490,7 +495,7 @@ static int cppi41_is_compatible(struct dma_channel *channel, u16 maxpacket,
490{ 495{
491 struct cppi41_dma_channel *cppi41_channel = channel->private_data; 496 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
492 struct cppi41_dma_controller *controller = cppi41_channel->controller; 497 struct cppi41_dma_controller *controller = cppi41_channel->controller;
493 struct musb *musb = controller->musb; 498 struct musb *musb = controller->controller.musb;
494 499
495 if (is_host_active(musb)) { 500 if (is_host_active(musb)) {
496 WARN_ON(1); 501 WARN_ON(1);
@@ -508,7 +513,7 @@ static int cppi41_dma_channel_abort(struct dma_channel *channel)
508{ 513{
509 struct cppi41_dma_channel *cppi41_channel = channel->private_data; 514 struct cppi41_dma_channel *cppi41_channel = channel->private_data;
510 struct cppi41_dma_controller *controller = cppi41_channel->controller; 515 struct cppi41_dma_controller *controller = cppi41_channel->controller;
511 struct musb *musb = controller->musb; 516 struct musb *musb = controller->controller.musb;
512 void __iomem *epio = cppi41_channel->hw_ep->regs; 517 void __iomem *epio = cppi41_channel->hw_ep->regs;
513 int tdbit; 518 int tdbit;
514 int ret; 519 int ret;
@@ -593,7 +598,7 @@ static void cppi41_dma_controller_stop(struct cppi41_dma_controller *controller)
593 598
594static int cppi41_dma_controller_start(struct cppi41_dma_controller *controller) 599static int cppi41_dma_controller_start(struct cppi41_dma_controller *controller)
595{ 600{
596 struct musb *musb = controller->musb; 601 struct musb *musb = controller->controller.musb;
597 struct device *dev = musb->controller; 602 struct device *dev = musb->controller;
598 struct device_node *np = dev->parent->of_node; 603 struct device_node *np = dev->parent->of_node;
599 struct cppi41_dma_channel *cppi41_channel; 604 struct cppi41_dma_channel *cppi41_channel;
@@ -688,13 +693,13 @@ cppi41_dma_controller_create(struct musb *musb, void __iomem *base)
688 hrtimer_init(&controller->early_tx, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 693 hrtimer_init(&controller->early_tx, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
689 controller->early_tx.function = cppi41_recheck_tx_req; 694 controller->early_tx.function = cppi41_recheck_tx_req;
690 INIT_LIST_HEAD(&controller->early_tx_list); 695 INIT_LIST_HEAD(&controller->early_tx_list);
691 controller->musb = musb;
692 696
693 controller->controller.channel_alloc = cppi41_dma_channel_allocate; 697 controller->controller.channel_alloc = cppi41_dma_channel_allocate;
694 controller->controller.channel_release = cppi41_dma_channel_release; 698 controller->controller.channel_release = cppi41_dma_channel_release;
695 controller->controller.channel_program = cppi41_dma_channel_program; 699 controller->controller.channel_program = cppi41_dma_channel_program;
696 controller->controller.channel_abort = cppi41_dma_channel_abort; 700 controller->controller.channel_abort = cppi41_dma_channel_abort;
697 controller->controller.is_compatible = cppi41_is_compatible; 701 controller->controller.is_compatible = cppi41_is_compatible;
702 controller->controller.musb = musb;
698 703
699 ret = cppi41_dma_controller_start(controller); 704 ret = cppi41_dma_controller_start(controller);
700 if (ret) 705 if (ret)
diff --git a/drivers/usb/musb/musb_debugfs.c b/drivers/usb/musb/musb_debugfs.c
index dd70c88419d2..952733ceaac8 100644
--- a/drivers/usb/musb/musb_debugfs.c
+++ b/drivers/usb/musb/musb_debugfs.c
@@ -153,28 +153,34 @@ static int musb_test_mode_show(struct seq_file *s, void *unused)
153 pm_runtime_mark_last_busy(musb->controller); 153 pm_runtime_mark_last_busy(musb->controller);
154 pm_runtime_put_autosuspend(musb->controller); 154 pm_runtime_put_autosuspend(musb->controller);
155 155
156 if (test & MUSB_TEST_FORCE_HOST) 156 if (test == (MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_FS))
157 seq_printf(s, "force host full-speed\n");
158
159 else if (test == (MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_HS))
160 seq_printf(s, "force host high-speed\n");
161
162 else if (test == MUSB_TEST_FORCE_HOST)
157 seq_printf(s, "force host\n"); 163 seq_printf(s, "force host\n");
158 164
159 if (test & MUSB_TEST_FIFO_ACCESS) 165 else if (test == MUSB_TEST_FIFO_ACCESS)
160 seq_printf(s, "fifo access\n"); 166 seq_printf(s, "fifo access\n");
161 167
162 if (test & MUSB_TEST_FORCE_FS) 168 else if (test == MUSB_TEST_FORCE_FS)
163 seq_printf(s, "force full-speed\n"); 169 seq_printf(s, "force full-speed\n");
164 170
165 if (test & MUSB_TEST_FORCE_HS) 171 else if (test == MUSB_TEST_FORCE_HS)
166 seq_printf(s, "force high-speed\n"); 172 seq_printf(s, "force high-speed\n");
167 173
168 if (test & MUSB_TEST_PACKET) 174 else if (test == MUSB_TEST_PACKET)
169 seq_printf(s, "test packet\n"); 175 seq_printf(s, "test packet\n");
170 176
171 if (test & MUSB_TEST_K) 177 else if (test == MUSB_TEST_K)
172 seq_printf(s, "test K\n"); 178 seq_printf(s, "test K\n");
173 179
174 if (test & MUSB_TEST_J) 180 else if (test == MUSB_TEST_J)
175 seq_printf(s, "test J\n"); 181 seq_printf(s, "test J\n");
176 182
177 if (test & MUSB_TEST_SE0_NAK) 183 else if (test == MUSB_TEST_SE0_NAK)
178 seq_printf(s, "test SE0 NAK\n"); 184 seq_printf(s, "test SE0 NAK\n");
179 185
180 return 0; 186 return 0;
@@ -198,7 +204,7 @@ static ssize_t musb_test_mode_write(struct file *file,
198 struct seq_file *s = file->private_data; 204 struct seq_file *s = file->private_data;
199 struct musb *musb = s->private; 205 struct musb *musb = s->private;
200 u8 test; 206 u8 test;
201 char buf[18]; 207 char buf[24];
202 208
203 pm_runtime_get_sync(musb->controller); 209 pm_runtime_get_sync(musb->controller);
204 test = musb_readb(musb->mregs, MUSB_TESTMODE); 210 test = musb_readb(musb->mregs, MUSB_TESTMODE);
@@ -213,30 +219,36 @@ static ssize_t musb_test_mode_write(struct file *file,
213 if (copy_from_user(buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 219 if (copy_from_user(buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
214 return -EFAULT; 220 return -EFAULT;
215 221
216 if (strstarts(buf, "force host")) 222 if (strstarts(buf, "force host full-speed"))
223 test = MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_FS;
224
225 else if (strstarts(buf, "force host high-speed"))
226 test = MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_HS;
227
228 else if (strstarts(buf, "force host"))
217 test = MUSB_TEST_FORCE_HOST; 229 test = MUSB_TEST_FORCE_HOST;
218 230
219 if (strstarts(buf, "fifo access")) 231 else if (strstarts(buf, "fifo access"))
220 test = MUSB_TEST_FIFO_ACCESS; 232 test = MUSB_TEST_FIFO_ACCESS;
221 233
222 if (strstarts(buf, "force full-speed")) 234 else if (strstarts(buf, "force full-speed"))
223 test = MUSB_TEST_FORCE_FS; 235 test = MUSB_TEST_FORCE_FS;
224 236
225 if (strstarts(buf, "force high-speed")) 237 else if (strstarts(buf, "force high-speed"))
226 test = MUSB_TEST_FORCE_HS; 238 test = MUSB_TEST_FORCE_HS;
227 239
228 if (strstarts(buf, "test packet")) { 240 else if (strstarts(buf, "test packet")) {
229 test = MUSB_TEST_PACKET; 241 test = MUSB_TEST_PACKET;
230 musb_load_testpacket(musb); 242 musb_load_testpacket(musb);
231 } 243 }
232 244
233 if (strstarts(buf, "test K")) 245 else if (strstarts(buf, "test K"))
234 test = MUSB_TEST_K; 246 test = MUSB_TEST_K;
235 247
236 if (strstarts(buf, "test J")) 248 else if (strstarts(buf, "test J"))
237 test = MUSB_TEST_J; 249 test = MUSB_TEST_J;
238 250
239 if (strstarts(buf, "test SE0 NAK")) 251 else if (strstarts(buf, "test SE0 NAK"))
240 test = MUSB_TEST_SE0_NAK; 252 test = MUSB_TEST_SE0_NAK;
241 253
242 musb_writeb(musb->mregs, MUSB_TESTMODE, test); 254 musb_writeb(musb->mregs, MUSB_TESTMODE, test);
diff --git a/drivers/usb/musb/musb_dma.h b/drivers/usb/musb/musb_dma.h
index 46357e183b4c..04c3bd86bd62 100644
--- a/drivers/usb/musb/musb_dma.h
+++ b/drivers/usb/musb/musb_dma.h
@@ -173,6 +173,7 @@ dma_channel_status(struct dma_channel *c)
173 173
174/** 174/**
175 * struct dma_controller - A DMA Controller. 175 * struct dma_controller - A DMA Controller.
176 * @musb: the usb controller
176 * @start: call this to start a DMA controller; 177 * @start: call this to start a DMA controller;
177 * return 0 on success, else negative errno 178 * return 0 on success, else negative errno
178 * @stop: call this to stop a DMA controller 179 * @stop: call this to stop a DMA controller
@@ -181,10 +182,13 @@ dma_channel_status(struct dma_channel *c)
181 * @channel_release: call this to release a DMA channel 182 * @channel_release: call this to release a DMA channel
182 * @channel_abort: call this to abort a pending DMA transaction, 183 * @channel_abort: call this to abort a pending DMA transaction,
183 * returning it to FREE (but allocated) state 184 * returning it to FREE (but allocated) state
185 * @dma_callback: invoked on DMA completion, useful to run platform
186 * code such IRQ acknowledgment.
184 * 187 *
185 * Controllers manage dma channels. 188 * Controllers manage dma channels.
186 */ 189 */
187struct dma_controller { 190struct dma_controller {
191 struct musb *musb;
188 struct dma_channel *(*channel_alloc)(struct dma_controller *, 192 struct dma_channel *(*channel_alloc)(struct dma_controller *,
189 struct musb_hw_ep *, u8 is_tx); 193 struct musb_hw_ep *, u8 is_tx);
190 void (*channel_release)(struct dma_channel *); 194 void (*channel_release)(struct dma_channel *);
@@ -196,6 +200,7 @@ struct dma_controller {
196 int (*is_compatible)(struct dma_channel *channel, 200 int (*is_compatible)(struct dma_channel *channel,
197 u16 maxpacket, 201 u16 maxpacket,
198 void *buf, u32 length); 202 void *buf, u32 length);
203 void (*dma_callback)(struct dma_controller *);
199}; 204};
200 205
201/* called after channel_program(), may indicate a fault */ 206/* called after channel_program(), may indicate a fault */
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 9f125e179acd..7c047c4a2565 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -118,9 +118,11 @@ struct dsps_glue {
118 struct device *dev; 118 struct device *dev;
119 struct platform_device *musb; /* child musb pdev */ 119 struct platform_device *musb; /* child musb pdev */
120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
121 int vbus_irq; /* optional vbus irq */
121 struct timer_list timer; /* otg_workaround timer */ 122 struct timer_list timer; /* otg_workaround timer */
122 unsigned long last_timer; /* last timer data for each instance */ 123 unsigned long last_timer; /* last timer data for each instance */
123 bool sw_babble_enabled; 124 bool sw_babble_enabled;
125 void __iomem *usbss_base;
124 126
125 struct dsps_context context; 127 struct dsps_context context;
126 struct debugfs_regset32 regset; 128 struct debugfs_regset32 regset;
@@ -145,6 +147,36 @@ static const struct debugfs_reg32 dsps_musb_regs[] = {
145 { "mode", 0xe8 }, 147 { "mode", 0xe8 },
146}; 148};
147 149
150static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
151{
152 int wait;
153
154 if (wait_ms < 0)
155 wait = msecs_to_jiffies(glue->wrp->poll_timeout);
156 else
157 wait = msecs_to_jiffies(wait_ms);
158
159 mod_timer(&glue->timer, jiffies + wait);
160}
161
162/*
163 * If no vbus irq from the PMIC is configured, we need to poll VBUS status.
164 */
165static void dsps_mod_timer_optional(struct dsps_glue *glue)
166{
167 if (glue->vbus_irq)
168 return;
169
170 dsps_mod_timer(glue, -1);
171}
172
173/* USBSS / USB AM335x */
174#define USBSS_IRQ_STATUS 0x28
175#define USBSS_IRQ_ENABLER 0x2c
176#define USBSS_IRQ_CLEARR 0x30
177
178#define USBSS_IRQ_PD_COMP (1 << 2)
179
148/** 180/**
149 * dsps_musb_enable - enable interrupts 181 * dsps_musb_enable - enable interrupts
150 */ 182 */
@@ -167,8 +199,7 @@ static void dsps_musb_enable(struct musb *musb)
167 /* start polling for ID change in dual-role idle mode */ 199 /* start polling for ID change in dual-role idle mode */
168 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 200 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
169 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 201 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
170 mod_timer(&glue->timer, jiffies + 202 dsps_mod_timer(glue, -1);
171 msecs_to_jiffies(wrp->poll_timeout));
172} 203}
173 204
174/** 205/**
@@ -186,7 +217,6 @@ static void dsps_musb_disable(struct musb *musb)
186 musb_writel(reg_base, wrp->epintr_clear, 217 musb_writel(reg_base, wrp->epintr_clear,
187 wrp->txep_bitmap | wrp->rxep_bitmap); 218 wrp->txep_bitmap | wrp->rxep_bitmap);
188 del_timer_sync(&glue->timer); 219 del_timer_sync(&glue->timer);
189 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
190} 220}
191 221
192/* Caller must take musb->lock */ 222/* Caller must take musb->lock */
@@ -199,6 +229,9 @@ static int dsps_check_status(struct musb *musb, void *unused)
199 u8 devctl; 229 u8 devctl;
200 int skip_session = 0; 230 int skip_session = 0;
201 231
232 if (glue->vbus_irq)
233 del_timer(&glue->timer);
234
202 /* 235 /*
203 * We poll because DSPS IP's won't expose several OTG-critical 236 * We poll because DSPS IP's won't expose several OTG-critical
204 * status change events (from the transceiver) otherwise. 237 * status change events (from the transceiver) otherwise.
@@ -209,8 +242,7 @@ static int dsps_check_status(struct musb *musb, void *unused)
209 242
210 switch (musb->xceiv->otg->state) { 243 switch (musb->xceiv->otg->state) {
211 case OTG_STATE_A_WAIT_VRISE: 244 case OTG_STATE_A_WAIT_VRISE:
212 mod_timer(&glue->timer, jiffies + 245 dsps_mod_timer_optional(glue);
213 msecs_to_jiffies(wrp->poll_timeout));
214 break; 246 break;
215 case OTG_STATE_A_WAIT_BCON: 247 case OTG_STATE_A_WAIT_BCON:
216 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 248 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
@@ -219,17 +251,19 @@ static int dsps_check_status(struct musb *musb, void *unused)
219 251
220 case OTG_STATE_A_IDLE: 252 case OTG_STATE_A_IDLE:
221 case OTG_STATE_B_IDLE: 253 case OTG_STATE_B_IDLE:
222 if (devctl & MUSB_DEVCTL_BDEVICE) { 254 if (!glue->vbus_irq) {
223 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 255 if (devctl & MUSB_DEVCTL_BDEVICE) {
224 MUSB_DEV_MODE(musb); 256 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
225 } else { 257 MUSB_DEV_MODE(musb);
226 musb->xceiv->otg->state = OTG_STATE_A_IDLE; 258 } else {
227 MUSB_HST_MODE(musb); 259 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
260 MUSB_HST_MODE(musb);
261 }
262 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
263 musb_writeb(mregs, MUSB_DEVCTL,
264 MUSB_DEVCTL_SESSION);
228 } 265 }
229 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 266 dsps_mod_timer_optional(glue);
230 musb_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
231 mod_timer(&glue->timer, jiffies +
232 msecs_to_jiffies(wrp->poll_timeout));
233 break; 267 break;
234 case OTG_STATE_A_WAIT_VFALL: 268 case OTG_STATE_A_WAIT_VFALL:
235 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 269 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
@@ -267,7 +301,7 @@ static void otg_timer(unsigned long _musb)
267 pm_runtime_put_autosuspend(dev); 301 pm_runtime_put_autosuspend(dev);
268} 302}
269 303
270void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum) 304static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
271{ 305{
272 u32 epintr; 306 u32 epintr;
273 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 307 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
@@ -332,15 +366,13 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
332 */ 366 */
333 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 367 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
334 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; 368 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
335 mod_timer(&glue->timer, jiffies + 369 dsps_mod_timer_optional(glue);
336 msecs_to_jiffies(wrp->poll_timeout));
337 WARNING("VBUS error workaround (delay coming)\n"); 370 WARNING("VBUS error workaround (delay coming)\n");
338 } else if (drvvbus) { 371 } else if (drvvbus) {
339 MUSB_HST_MODE(musb); 372 MUSB_HST_MODE(musb);
340 musb->xceiv->otg->default_a = 1; 373 musb->xceiv->otg->default_a = 1;
341 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 374 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
342 mod_timer(&glue->timer, jiffies + 375 dsps_mod_timer_optional(glue);
343 msecs_to_jiffies(wrp->poll_timeout));
344 } else { 376 } else {
345 musb->is_active = 0; 377 musb->is_active = 0;
346 MUSB_DEV_MODE(musb); 378 MUSB_DEV_MODE(musb);
@@ -364,8 +396,7 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
364 switch (musb->xceiv->otg->state) { 396 switch (musb->xceiv->otg->state) {
365 case OTG_STATE_B_IDLE: 397 case OTG_STATE_B_IDLE:
366 case OTG_STATE_A_WAIT_BCON: 398 case OTG_STATE_A_WAIT_BCON:
367 mod_timer(&glue->timer, jiffies + 399 dsps_mod_timer_optional(glue);
368 msecs_to_jiffies(wrp->poll_timeout));
369 break; 400 break;
370 default: 401 default:
371 break; 402 break;
@@ -469,8 +500,7 @@ static int dsps_musb_init(struct musb *musb)
469 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); 500 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
470 } 501 }
471 502
472 mod_timer(&glue->timer, jiffies + 503 dsps_mod_timer(glue, -1);
473 msecs_to_jiffies(glue->wrp->poll_timeout));
474 504
475 return dsps_musb_dbg_init(musb, glue); 505 return dsps_musb_dbg_init(musb, glue);
476} 506}
@@ -619,14 +649,76 @@ static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
619 } 649 }
620} 650}
621 651
652#ifdef CONFIG_USB_TI_CPPI41_DMA
653static void dsps_dma_controller_callback(struct dma_controller *c)
654{
655 struct musb *musb = c->musb;
656 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
657 void __iomem *usbss_base = glue->usbss_base;
658 u32 status;
659
660 status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
661 if (status & USBSS_IRQ_PD_COMP)
662 musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
663}
664
665static struct dma_controller *
666dsps_dma_controller_create(struct musb *musb, void __iomem *base)
667{
668 struct dma_controller *controller;
669 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
670 void __iomem *usbss_base = glue->usbss_base;
671
672 controller = cppi41_dma_controller_create(musb, base);
673 if (IS_ERR_OR_NULL(controller))
674 return controller;
675
676 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
677 controller->dma_callback = dsps_dma_controller_callback;
678
679 return controller;
680}
681
682static void dsps_dma_controller_destroy(struct dma_controller *c)
683{
684 struct musb *musb = c->musb;
685 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
686 void __iomem *usbss_base = glue->usbss_base;
687
688 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
689 cppi41_dma_controller_destroy(c);
690}
691
692#ifdef CONFIG_PM_SLEEP
693static void dsps_dma_controller_suspend(struct dsps_glue *glue)
694{
695 void __iomem *usbss_base = glue->usbss_base;
696
697 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
698}
699
700static void dsps_dma_controller_resume(struct dsps_glue *glue)
701{
702 void __iomem *usbss_base = glue->usbss_base;
703
704 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
705}
706#endif
707#else /* CONFIG_USB_TI_CPPI41_DMA */
708#ifdef CONFIG_PM_SLEEP
709static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
710static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
711#endif
712#endif /* CONFIG_USB_TI_CPPI41_DMA */
713
622static struct musb_platform_ops dsps_ops = { 714static struct musb_platform_ops dsps_ops = {
623 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, 715 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
624 .init = dsps_musb_init, 716 .init = dsps_musb_init,
625 .exit = dsps_musb_exit, 717 .exit = dsps_musb_exit,
626 718
627#ifdef CONFIG_USB_TI_CPPI41_DMA 719#ifdef CONFIG_USB_TI_CPPI41_DMA
628 .dma_init = cppi41_dma_controller_create, 720 .dma_init = dsps_dma_controller_create,
629 .dma_exit = cppi41_dma_controller_destroy, 721 .dma_exit = dsps_dma_controller_destroy,
630#endif 722#endif
631 .enable = dsps_musb_enable, 723 .enable = dsps_musb_enable,
632 .disable = dsps_musb_disable, 724 .disable = dsps_musb_disable,
@@ -696,7 +788,8 @@ static int dsps_create_musb_pdev(struct dsps_glue *glue,
696 resources[1] = *res; 788 resources[1] = *res;
697 789
698 /* allocate the child platform device */ 790 /* allocate the child platform device */
699 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 791 musb = platform_device_alloc("musb-hdrc",
792 (resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
700 if (!musb) { 793 if (!musb) {
701 dev_err(dev, "failed to allocate musb device\n"); 794 dev_err(dev, "failed to allocate musb device\n");
702 return -ENOMEM; 795 return -ENOMEM;
@@ -765,6 +858,47 @@ err:
765 return ret; 858 return ret;
766} 859}
767 860
861static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
862{
863 struct dsps_glue *glue = priv;
864 struct musb *musb = platform_get_drvdata(glue->musb);
865
866 if (!musb)
867 return IRQ_NONE;
868
869 dev_dbg(glue->dev, "VBUS interrupt\n");
870 dsps_mod_timer(glue, 0);
871
872 return IRQ_HANDLED;
873}
874
875static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
876 struct dsps_glue *glue)
877{
878 int error;
879
880 glue->vbus_irq = platform_get_irq_byname(pdev, "vbus");
881 if (glue->vbus_irq == -EPROBE_DEFER)
882 return -EPROBE_DEFER;
883
884 if (glue->vbus_irq <= 0) {
885 glue->vbus_irq = 0;
886 return 0;
887 }
888
889 error = devm_request_threaded_irq(glue->dev, glue->vbus_irq,
890 NULL, dsps_vbus_threaded_irq,
891 IRQF_ONESHOT,
892 "vbus", glue);
893 if (error) {
894 glue->vbus_irq = 0;
895 return error;
896 }
897 dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
898
899 return 0;
900}
901
768static int dsps_probe(struct platform_device *pdev) 902static int dsps_probe(struct platform_device *pdev)
769{ 903{
770 const struct of_device_id *match; 904 const struct of_device_id *match;
@@ -792,6 +926,15 @@ static int dsps_probe(struct platform_device *pdev)
792 926
793 glue->dev = &pdev->dev; 927 glue->dev = &pdev->dev;
794 glue->wrp = wrp; 928 glue->wrp = wrp;
929 glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0);
930 if (!glue->usbss_base)
931 return -ENXIO;
932
933 if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
934 ret = dsps_setup_optional_vbus_irq(pdev, glue);
935 if (ret)
936 return ret;
937 }
795 938
796 platform_set_drvdata(pdev, glue); 939 platform_set_drvdata(pdev, glue);
797 pm_runtime_enable(&pdev->dev); 940 pm_runtime_enable(&pdev->dev);
@@ -880,6 +1023,8 @@ static int dsps_suspend(struct device *dev)
880 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); 1023 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
881 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); 1024 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
882 1025
1026 dsps_dma_controller_suspend(glue);
1027
883 return 0; 1028 return 0;
884} 1029}
885 1030
@@ -893,6 +1038,8 @@ static int dsps_resume(struct device *dev)
893 if (!musb) 1038 if (!musb)
894 return 0; 1039 return 0;
895 1040
1041 dsps_dma_controller_resume(glue);
1042
896 mbase = musb->ctrl_base; 1043 mbase = musb->ctrl_base;
897 musb_writel(mbase, wrp->control, glue->context.control); 1044 musb_writel(mbase, wrp->control, glue->context.control);
898 musb_writel(mbase, wrp->epintr_set, glue->context.epintr); 1045 musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
@@ -903,8 +1050,7 @@ static int dsps_resume(struct device *dev)
903 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 1050 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
904 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 1051 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
905 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 1052 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
906 mod_timer(&glue->timer, jiffies + 1053 dsps_mod_timer(glue, -1);
907 msecs_to_jiffies(wrp->poll_timeout));
908 1054
909 return 0; 1055 return 0;
910} 1056}
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 8b73214a9ea3..456f3e6ecf03 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -575,7 +575,7 @@ static int omap2430_runtime_resume(struct device *dev)
575 return 0; 575 return 0;
576} 576}
577 577
578static struct dev_pm_ops omap2430_pm_ops = { 578static const struct dev_pm_ops omap2430_pm_ops = {
579 .runtime_suspend = omap2430_runtime_suspend, 579 .runtime_suspend = omap2430_runtime_suspend,
580 .runtime_resume = omap2430_runtime_resume, 580 .runtime_resume = omap2430_runtime_resume,
581}; 581};
diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
index d0be0eadd0d9..c9a09b5bb6e5 100644
--- a/drivers/usb/musb/sunxi.c
+++ b/drivers/usb/musb/sunxi.c
@@ -251,14 +251,14 @@ static int sunxi_musb_init(struct musb *musb)
251 writeb(SUNXI_MUSB_VEND0_PIO_MODE, musb->mregs + SUNXI_MUSB_VEND0); 251 writeb(SUNXI_MUSB_VEND0_PIO_MODE, musb->mregs + SUNXI_MUSB_VEND0);
252 252
253 /* Register notifier before calling phy_init() */ 253 /* Register notifier before calling phy_init() */
254 ret = extcon_register_notifier(glue->extcon, EXTCON_USB_HOST, 254 ret = devm_extcon_register_notifier(glue->dev, glue->extcon,
255 &glue->host_nb); 255 EXTCON_USB_HOST, &glue->host_nb);
256 if (ret) 256 if (ret)
257 goto error_reset_assert; 257 goto error_reset_assert;
258 258
259 ret = phy_init(glue->phy); 259 ret = phy_init(glue->phy);
260 if (ret) 260 if (ret)
261 goto error_unregister_notifier; 261 goto error_reset_assert;
262 262
263 musb->isr = sunxi_musb_interrupt; 263 musb->isr = sunxi_musb_interrupt;
264 264
@@ -267,9 +267,6 @@ static int sunxi_musb_init(struct musb *musb)
267 267
268 return 0; 268 return 0;
269 269
270error_unregister_notifier:
271 extcon_unregister_notifier(glue->extcon, EXTCON_USB_HOST,
272 &glue->host_nb);
273error_reset_assert: 270error_reset_assert:
274 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags)) 271 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags))
275 reset_control_assert(glue->rst); 272 reset_control_assert(glue->rst);
@@ -293,9 +290,6 @@ static int sunxi_musb_exit(struct musb *musb)
293 290
294 phy_exit(glue->phy); 291 phy_exit(glue->phy);
295 292
296 extcon_unregister_notifier(glue->extcon, EXTCON_USB_HOST,
297 &glue->host_nb);
298
299 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags)) 293 if (test_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags))
300 reset_control_assert(glue->rst); 294 reset_control_assert(glue->rst);
301 295
@@ -645,7 +639,21 @@ static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = {
645 MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512), 639 MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),
646}; 640};
647 641
648static struct musb_hdrc_config sunxi_musb_hdrc_config = { 642/* H3/V3s OTG supports only 4 endpoints */
643#define SUNXI_MUSB_MAX_EP_NUM_H3 5
644
645static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = {
646 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
647 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
648 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
649 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
650 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
651 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
652 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
653 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
654};
655
656static const struct musb_hdrc_config sunxi_musb_hdrc_config = {
649 .fifo_cfg = sunxi_musb_mode_cfg, 657 .fifo_cfg = sunxi_musb_mode_cfg,
650 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg), 658 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg),
651 .multipoint = true, 659 .multipoint = true,
@@ -656,6 +664,18 @@ static struct musb_hdrc_config sunxi_musb_hdrc_config = {
656 .dma = 0, 664 .dma = 0,
657}; 665};
658 666
667static struct musb_hdrc_config sunxi_musb_hdrc_config_h3 = {
668 .fifo_cfg = sunxi_musb_mode_cfg_h3,
669 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3),
670 .multipoint = true,
671 .dyn_fifo = true,
672 .soft_con = true,
673 .num_eps = SUNXI_MUSB_MAX_EP_NUM_H3,
674 .ram_bits = SUNXI_MUSB_RAM_BITS,
675 .dma = 0,
676};
677
678
659static int sunxi_musb_probe(struct platform_device *pdev) 679static int sunxi_musb_probe(struct platform_device *pdev)
660{ 680{
661 struct musb_hdrc_platform_data pdata; 681 struct musb_hdrc_platform_data pdata;
@@ -698,7 +718,10 @@ static int sunxi_musb_probe(struct platform_device *pdev)
698 return -EINVAL; 718 return -EINVAL;
699 } 719 }
700 pdata.platform_ops = &sunxi_musb_ops; 720 pdata.platform_ops = &sunxi_musb_ops;
701 pdata.config = &sunxi_musb_hdrc_config; 721 if (!of_device_is_compatible(np, "allwinner,sun8i-h3-musb"))
722 pdata.config = &sunxi_musb_hdrc_config;
723 else
724 pdata.config = &sunxi_musb_hdrc_config_h3;
702 725
703 glue->dev = &pdev->dev; 726 glue->dev = &pdev->dev;
704 INIT_WORK(&glue->work, sunxi_musb_work); 727 INIT_WORK(&glue->work, sunxi_musb_work);
@@ -710,7 +733,8 @@ static int sunxi_musb_probe(struct platform_device *pdev)
710 if (of_device_is_compatible(np, "allwinner,sun6i-a31-musb")) 733 if (of_device_is_compatible(np, "allwinner,sun6i-a31-musb"))
711 set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags); 734 set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);
712 735
713 if (of_device_is_compatible(np, "allwinner,sun8i-a33-musb")) { 736 if (of_device_is_compatible(np, "allwinner,sun8i-a33-musb") ||
737 of_device_is_compatible(np, "allwinner,sun8i-h3-musb")) {
714 set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags); 738 set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);
715 set_bit(SUNXI_MUSB_FL_NO_CONFIGDATA, &glue->flags); 739 set_bit(SUNXI_MUSB_FL_NO_CONFIGDATA, &glue->flags);
716 } 740 }
@@ -804,6 +828,7 @@ static const struct of_device_id sunxi_musb_match[] = {
804 { .compatible = "allwinner,sun4i-a10-musb", }, 828 { .compatible = "allwinner,sun4i-a10-musb", },
805 { .compatible = "allwinner,sun6i-a31-musb", }, 829 { .compatible = "allwinner,sun6i-a31-musb", },
806 { .compatible = "allwinner,sun8i-a33-musb", }, 830 { .compatible = "allwinner,sun8i-a33-musb", },
831 { .compatible = "allwinner,sun8i-h3-musb", },
807 {} 832 {}
808}; 833};
809MODULE_DEVICE_TABLE(of, sunxi_musb_match); 834MODULE_DEVICE_TABLE(of, sunxi_musb_match);
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
index e6959ccb4453..8b43c4b99f04 100644
--- a/drivers/usb/musb/tusb6010_omap.c
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -56,7 +56,6 @@ struct tusb_omap_dma_ch {
56 56
57struct tusb_omap_dma { 57struct tusb_omap_dma {
58 struct dma_controller controller; 58 struct dma_controller controller;
59 struct musb *musb;
60 void __iomem *tbase; 59 void __iomem *tbase;
61 60
62 int ch; 61 int ch;
@@ -497,7 +496,7 @@ tusb_omap_dma_allocate(struct dma_controller *c,
497 u32 reg; 496 u32 reg;
498 497
499 tusb_dma = container_of(c, struct tusb_omap_dma, controller); 498 tusb_dma = container_of(c, struct tusb_omap_dma, controller);
500 musb = tusb_dma->musb; 499 musb = tusb_dma->controller.musb;
501 tbase = musb->ctrl_base; 500 tbase = musb->ctrl_base;
502 501
503 reg = musb_readl(tbase, TUSB_DMA_INT_MASK); 502 reg = musb_readl(tbase, TUSB_DMA_INT_MASK);
@@ -534,7 +533,7 @@ tusb_omap_dma_allocate(struct dma_controller *c,
534 dev_name = "TUSB receive"; 533 dev_name = "TUSB receive";
535 } 534 }
536 535
537 chdat->musb = tusb_dma->musb; 536 chdat->musb = tusb_dma->controller.musb;
538 chdat->tbase = tusb_dma->tbase; 537 chdat->tbase = tusb_dma->tbase;
539 chdat->hw_ep = hw_ep; 538 chdat->hw_ep = hw_ep;
540 chdat->epnum = hw_ep->epnum; 539 chdat->epnum = hw_ep->epnum;
@@ -667,7 +666,7 @@ tusb_dma_controller_create(struct musb *musb, void __iomem *base)
667 if (!tusb_dma) 666 if (!tusb_dma)
668 goto out; 667 goto out;
669 668
670 tusb_dma->musb = musb; 669 tusb_dma->controller.musb = musb;
671 tusb_dma->tbase = musb->ctrl_base; 670 tusb_dma->tbase = musb->ctrl_base;
672 671
673 tusb_dma->ch = -1; 672 tusb_dma->ch = -1;
diff --git a/drivers/usb/musb/ux500.c b/drivers/usb/musb/ux500.c
index 3eaa4ba6867d..5a572500c418 100644
--- a/drivers/usb/musb/ux500.c
+++ b/drivers/usb/musb/ux500.c
@@ -30,7 +30,7 @@
30 30
31#include "musb_core.h" 31#include "musb_core.h"
32 32
33static struct musb_hdrc_config ux500_musb_hdrc_config = { 33static const struct musb_hdrc_config ux500_musb_hdrc_config = {
34 .multipoint = true, 34 .multipoint = true,
35 .dyn_fifo = true, 35 .dyn_fifo = true,
36 .num_eps = 16, 36 .num_eps = 16,
diff --git a/drivers/usb/phy/phy-ab8500-usb.c b/drivers/usb/phy/phy-ab8500-usb.c
index a03caf4b1327..61bf2285d5b1 100644
--- a/drivers/usb/phy/phy-ab8500-usb.c
+++ b/drivers/usb/phy/phy-ab8500-usb.c
@@ -1023,38 +1023,6 @@ static void ab8500_usb_vbus_turn_on_event_work(struct work_struct *work)
1023 ab->enabled_charging_detection = true; 1023 ab->enabled_charging_detection = true;
1024} 1024}
1025 1025
1026static unsigned ab8500_eyediagram_workaroud(struct ab8500_usb *ab, unsigned mA)
1027{
1028 /*
1029 * AB8500 V2 has eye diagram issues when drawing more than 100mA from
1030 * VBUS. Set charging current to 100mA in case of standard host
1031 */
1032 if (is_ab8500_2p0_or_earlier(ab->ab8500))
1033 if (mA > 100)
1034 mA = 100;
1035
1036 return mA;
1037}
1038
1039static int ab8500_usb_set_power(struct usb_phy *phy, unsigned mA)
1040{
1041 struct ab8500_usb *ab;
1042
1043 if (!phy)
1044 return -ENODEV;
1045
1046 ab = phy_to_ab(phy);
1047
1048 mA = ab8500_eyediagram_workaroud(ab, mA);
1049
1050 ab->vbus_draw = mA;
1051
1052 atomic_notifier_call_chain(&ab->phy.notifier,
1053 UX500_MUSB_VBUS, &ab->vbus_draw);
1054
1055 return 0;
1056}
1057
1058static int ab8500_usb_set_suspend(struct usb_phy *x, int suspend) 1026static int ab8500_usb_set_suspend(struct usb_phy *x, int suspend)
1059{ 1027{
1060 /* TODO */ 1028 /* TODO */
@@ -1392,7 +1360,6 @@ static int ab8500_usb_probe(struct platform_device *pdev)
1392 ab->phy.otg = otg; 1360 ab->phy.otg = otg;
1393 ab->phy.label = "ab8500"; 1361 ab->phy.label = "ab8500";
1394 ab->phy.set_suspend = ab8500_usb_set_suspend; 1362 ab->phy.set_suspend = ab8500_usb_set_suspend;
1395 ab->phy.set_power = ab8500_usb_set_power;
1396 ab->phy.otg->state = OTG_STATE_UNDEFINED; 1363 ab->phy.otg->state = OTG_STATE_UNDEFINED;
1397 1364
1398 otg->usb_phy = &ab->phy; 1365 otg->usb_phy = &ab->phy;
diff --git a/drivers/usb/phy/phy-fsl-usb.c b/drivers/usb/phy/phy-fsl-usb.c
index 94eb2923afed..392ab422163c 100644
--- a/drivers/usb/phy/phy-fsl-usb.c
+++ b/drivers/usb/phy/phy-fsl-usb.c
@@ -642,17 +642,6 @@ static int fsl_otg_set_peripheral(struct usb_otg *otg,
642 return 0; 642 return 0;
643} 643}
644 644
645/* Set OTG port power, only for B-device */
646static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA)
647{
648 if (!fsl_otg_dev)
649 return -ENODEV;
650 if (phy->otg->state == OTG_STATE_B_PERIPHERAL)
651 pr_info("FSL OTG: Draw %d mA\n", mA);
652
653 return 0;
654}
655
656/* 645/*
657 * Delayed pin detect interrupt processing. 646 * Delayed pin detect interrupt processing.
658 * 647 *
@@ -821,7 +810,6 @@ static int fsl_otg_conf(struct platform_device *pdev)
821 /* initialize the otg structure */ 810 /* initialize the otg structure */
822 fsl_otg_tc->phy.label = DRIVER_DESC; 811 fsl_otg_tc->phy.label = DRIVER_DESC;
823 fsl_otg_tc->phy.dev = &pdev->dev; 812 fsl_otg_tc->phy.dev = &pdev->dev;
824 fsl_otg_tc->phy.set_power = fsl_otg_set_power;
825 813
826 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy; 814 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
827 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host; 815 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 8a34759727bb..93d9aaad2994 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -842,23 +842,6 @@ static void msm_otg_notify_charger(struct msm_otg *motg, unsigned mA)
842 motg->cur_power = mA; 842 motg->cur_power = mA;
843} 843}
844 844
845static int msm_otg_set_power(struct usb_phy *phy, unsigned mA)
846{
847 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
848
849 /*
850 * Gadget driver uses set_power method to notify about the
851 * available current based on suspend/configured states.
852 *
853 * IDEV_CHG can be drawn irrespective of suspend/un-configured
854 * states when CDP/ACA is connected.
855 */
856 if (motg->chg_type == USB_SDP_CHARGER)
857 msm_otg_notify_charger(motg, mA);
858
859 return 0;
860}
861
862static void msm_otg_start_host(struct usb_phy *phy, int on) 845static void msm_otg_start_host(struct usb_phy *phy, int on)
863{ 846{
864 struct msm_otg *motg = container_of(phy, struct msm_otg, phy); 847 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
@@ -1742,14 +1725,14 @@ static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg)
1742 if (!IS_ERR(ext_vbus)) { 1725 if (!IS_ERR(ext_vbus)) {
1743 motg->vbus.extcon = ext_vbus; 1726 motg->vbus.extcon = ext_vbus;
1744 motg->vbus.nb.notifier_call = msm_otg_vbus_notifier; 1727 motg->vbus.nb.notifier_call = msm_otg_vbus_notifier;
1745 ret = extcon_register_notifier(ext_vbus, EXTCON_USB, 1728 ret = devm_extcon_register_notifier(&pdev->dev, ext_vbus,
1746 &motg->vbus.nb); 1729 EXTCON_USB, &motg->vbus.nb);
1747 if (ret < 0) { 1730 if (ret < 0) {
1748 dev_err(&pdev->dev, "register VBUS notifier failed\n"); 1731 dev_err(&pdev->dev, "register VBUS notifier failed\n");
1749 return ret; 1732 return ret;
1750 } 1733 }
1751 1734
1752 ret = extcon_get_cable_state_(ext_vbus, EXTCON_USB); 1735 ret = extcon_get_state(ext_vbus, EXTCON_USB);
1753 if (ret) 1736 if (ret)
1754 set_bit(B_SESS_VLD, &motg->inputs); 1737 set_bit(B_SESS_VLD, &motg->inputs);
1755 else 1738 else
@@ -1759,16 +1742,14 @@ static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg)
1759 if (!IS_ERR(ext_id)) { 1742 if (!IS_ERR(ext_id)) {
1760 motg->id.extcon = ext_id; 1743 motg->id.extcon = ext_id;
1761 motg->id.nb.notifier_call = msm_otg_id_notifier; 1744 motg->id.nb.notifier_call = msm_otg_id_notifier;
1762 ret = extcon_register_notifier(ext_id, EXTCON_USB_HOST, 1745 ret = devm_extcon_register_notifier(&pdev->dev, ext_id,
1763 &motg->id.nb); 1746 EXTCON_USB_HOST, &motg->id.nb);
1764 if (ret < 0) { 1747 if (ret < 0) {
1765 dev_err(&pdev->dev, "register ID notifier failed\n"); 1748 dev_err(&pdev->dev, "register ID notifier failed\n");
1766 extcon_unregister_notifier(motg->vbus.extcon,
1767 EXTCON_USB, &motg->vbus.nb);
1768 return ret; 1749 return ret;
1769 } 1750 }
1770 1751
1771 ret = extcon_get_cable_state_(ext_id, EXTCON_USB_HOST); 1752 ret = extcon_get_state(ext_id, EXTCON_USB_HOST);
1772 if (ret) 1753 if (ret)
1773 clear_bit(ID, &motg->inputs); 1754 clear_bit(ID, &motg->inputs);
1774 else 1755 else
@@ -1883,10 +1864,9 @@ static int msm_otg_probe(struct platform_device *pdev)
1883 */ 1864 */
1884 if (motg->phy_number) { 1865 if (motg->phy_number) {
1885 phy_select = devm_ioremap_nocache(&pdev->dev, USB2_PHY_SEL, 4); 1866 phy_select = devm_ioremap_nocache(&pdev->dev, USB2_PHY_SEL, 4);
1886 if (!phy_select) { 1867 if (!phy_select)
1887 ret = -ENOMEM; 1868 return -ENOMEM;
1888 goto unregister_extcon; 1869
1889 }
1890 /* Enable second PHY with the OTG port */ 1870 /* Enable second PHY with the OTG port */
1891 writel(0x1, phy_select); 1871 writel(0x1, phy_select);
1892 } 1872 }
@@ -1897,7 +1877,7 @@ static int msm_otg_probe(struct platform_device *pdev)
1897 if (motg->irq < 0) { 1877 if (motg->irq < 0) {
1898 dev_err(&pdev->dev, "platform_get_irq failed\n"); 1878 dev_err(&pdev->dev, "platform_get_irq failed\n");
1899 ret = motg->irq; 1879 ret = motg->irq;
1900 goto unregister_extcon; 1880 return motg->irq;
1901 } 1881 }
1902 1882
1903 regs[0].supply = "vddcx"; 1883 regs[0].supply = "vddcx";
@@ -1906,7 +1886,7 @@ static int msm_otg_probe(struct platform_device *pdev)
1906 1886
1907 ret = devm_regulator_bulk_get(motg->phy.dev, ARRAY_SIZE(regs), regs); 1887 ret = devm_regulator_bulk_get(motg->phy.dev, ARRAY_SIZE(regs), regs);
1908 if (ret) 1888 if (ret)
1909 goto unregister_extcon; 1889 return ret;
1910 1890
1911 motg->vddcx = regs[0].consumer; 1891 motg->vddcx = regs[0].consumer;
1912 motg->v3p3 = regs[1].consumer; 1892 motg->v3p3 = regs[1].consumer;
@@ -1950,7 +1930,6 @@ static int msm_otg_probe(struct platform_device *pdev)
1950 } 1930 }
1951 1931
1952 phy->init = msm_phy_init; 1932 phy->init = msm_phy_init;
1953 phy->set_power = msm_otg_set_power;
1954 phy->notify_disconnect = msm_phy_notify_disconnect; 1933 phy->notify_disconnect = msm_phy_notify_disconnect;
1955 phy->type = USB_PHY_TYPE_USB2; 1934 phy->type = USB_PHY_TYPE_USB2;
1956 1935
@@ -2003,11 +1982,6 @@ disable_clks:
2003 clk_disable_unprepare(motg->clk); 1982 clk_disable_unprepare(motg->clk);
2004 if (!IS_ERR(motg->core_clk)) 1983 if (!IS_ERR(motg->core_clk))
2005 clk_disable_unprepare(motg->core_clk); 1984 clk_disable_unprepare(motg->core_clk);
2006unregister_extcon:
2007 extcon_unregister_notifier(motg->id.extcon,
2008 EXTCON_USB_HOST, &motg->id.nb);
2009 extcon_unregister_notifier(motg->vbus.extcon,
2010 EXTCON_USB, &motg->vbus.nb);
2011 1985
2012 return ret; 1986 return ret;
2013} 1987}
@@ -2029,9 +2003,6 @@ static int msm_otg_remove(struct platform_device *pdev)
2029 */ 2003 */
2030 gpiod_set_value_cansleep(motg->switch_gpio, 0); 2004 gpiod_set_value_cansleep(motg->switch_gpio, 0);
2031 2005
2032 extcon_unregister_notifier(motg->id.extcon, EXTCON_USB_HOST, &motg->id.nb);
2033 extcon_unregister_notifier(motg->vbus.extcon, EXTCON_USB, &motg->vbus.nb);
2034
2035 msm_otg_debugfs_cleanup(); 2006 msm_otg_debugfs_cleanup();
2036 cancel_delayed_work_sync(&motg->chg_work); 2007 cancel_delayed_work_sync(&motg->chg_work);
2037 cancel_work_sync(&motg->sm_work); 2008 cancel_work_sync(&motg->sm_work);
diff --git a/drivers/usb/phy/phy-omap-otg.c b/drivers/usb/phy/phy-omap-otg.c
index 6523af4f8f93..800d1d90753d 100644
--- a/drivers/usb/phy/phy-omap-otg.c
+++ b/drivers/usb/phy/phy-omap-otg.c
@@ -118,19 +118,19 @@ static int omap_otg_probe(struct platform_device *pdev)
118 otg_dev->id_nb.notifier_call = omap_otg_id_notifier; 118 otg_dev->id_nb.notifier_call = omap_otg_id_notifier;
119 otg_dev->vbus_nb.notifier_call = omap_otg_vbus_notifier; 119 otg_dev->vbus_nb.notifier_call = omap_otg_vbus_notifier;
120 120
121 ret = extcon_register_notifier(extcon, EXTCON_USB_HOST, &otg_dev->id_nb); 121 ret = devm_extcon_register_notifier(&pdev->dev, extcon,
122 EXTCON_USB_HOST, &otg_dev->id_nb);
122 if (ret) 123 if (ret)
123 return ret; 124 return ret;
124 125
125 ret = extcon_register_notifier(extcon, EXTCON_USB, &otg_dev->vbus_nb); 126 ret = devm_extcon_register_notifier(&pdev->dev, extcon,
127 EXTCON_USB, &otg_dev->vbus_nb);
126 if (ret) { 128 if (ret) {
127 extcon_unregister_notifier(extcon, EXTCON_USB_HOST,
128 &otg_dev->id_nb);
129 return ret; 129 return ret;
130 } 130 }
131 131
132 otg_dev->id = extcon_get_cable_state_(extcon, EXTCON_USB_HOST); 132 otg_dev->id = extcon_get_state(extcon, EXTCON_USB_HOST);
133 otg_dev->vbus = extcon_get_cable_state_(extcon, EXTCON_USB); 133 otg_dev->vbus = extcon_get_state(extcon, EXTCON_USB);
134 omap_otg_set_mode(otg_dev); 134 omap_otg_set_mode(otg_dev);
135 135
136 rev = readl(otg_dev->base); 136 rev = readl(otg_dev->base);
@@ -145,20 +145,8 @@ static int omap_otg_probe(struct platform_device *pdev)
145 return 0; 145 return 0;
146} 146}
147 147
148static int omap_otg_remove(struct platform_device *pdev)
149{
150 struct otg_device *otg_dev = platform_get_drvdata(pdev);
151 struct extcon_dev *edev = otg_dev->extcon;
152
153 extcon_unregister_notifier(edev, EXTCON_USB_HOST, &otg_dev->id_nb);
154 extcon_unregister_notifier(edev, EXTCON_USB, &otg_dev->vbus_nb);
155
156 return 0;
157}
158
159static struct platform_driver omap_otg_driver = { 148static struct platform_driver omap_otg_driver = {
160 .probe = omap_otg_probe, 149 .probe = omap_otg_probe,
161 .remove = omap_otg_remove,
162 .driver = { 150 .driver = {
163 .name = "omap_otg", 151 .name = "omap_otg",
164 }, 152 },
diff --git a/drivers/usb/phy/phy-qcom-8x16-usb.c b/drivers/usb/phy/phy-qcom-8x16-usb.c
index d8593adb3621..fdf686398772 100644
--- a/drivers/usb/phy/phy-qcom-8x16-usb.c
+++ b/drivers/usb/phy/phy-qcom-8x16-usb.c
@@ -187,7 +187,7 @@ static int phy_8x16_init(struct usb_phy *phy)
187 val = ULPI_PWR_OTG_COMP_DISABLE; 187 val = ULPI_PWR_OTG_COMP_DISABLE;
188 usb_phy_io_write(phy, val, ULPI_SET(ULPI_PWR_CLK_MNG_REG)); 188 usb_phy_io_write(phy, val, ULPI_SET(ULPI_PWR_CLK_MNG_REG));
189 189
190 state = extcon_get_cable_state_(qphy->vbus_edev, EXTCON_USB); 190 state = extcon_get_state(qphy->vbus_edev, EXTCON_USB);
191 if (state) 191 if (state)
192 phy_8x16_vbus_on(qphy); 192 phy_8x16_vbus_on(qphy);
193 else 193 else
@@ -316,23 +316,20 @@ static int phy_8x16_probe(struct platform_device *pdev)
316 goto off_clks; 316 goto off_clks;
317 317
318 qphy->vbus_notify.notifier_call = phy_8x16_vbus_notify; 318 qphy->vbus_notify.notifier_call = phy_8x16_vbus_notify;
319 ret = extcon_register_notifier(qphy->vbus_edev, EXTCON_USB, 319 ret = devm_extcon_register_notifier(&pdev->dev, qphy->vbus_edev,
320 &qphy->vbus_notify); 320 EXTCON_USB, &qphy->vbus_notify);
321 if (ret < 0) 321 if (ret < 0)
322 goto off_power; 322 goto off_power;
323 323
324 ret = usb_add_phy_dev(&qphy->phy); 324 ret = usb_add_phy_dev(&qphy->phy);
325 if (ret) 325 if (ret)
326 goto off_extcon; 326 goto off_power;
327 327
328 qphy->reboot_notify.notifier_call = phy_8x16_reboot_notify; 328 qphy->reboot_notify.notifier_call = phy_8x16_reboot_notify;
329 register_reboot_notifier(&qphy->reboot_notify); 329 register_reboot_notifier(&qphy->reboot_notify);
330 330
331 return 0; 331 return 0;
332 332
333off_extcon:
334 extcon_unregister_notifier(qphy->vbus_edev, EXTCON_USB,
335 &qphy->vbus_notify);
336off_power: 333off_power:
337 regulator_bulk_disable(ARRAY_SIZE(qphy->regulator), qphy->regulator); 334 regulator_bulk_disable(ARRAY_SIZE(qphy->regulator), qphy->regulator);
338off_clks: 335off_clks:
@@ -347,8 +344,6 @@ static int phy_8x16_remove(struct platform_device *pdev)
347 struct phy_8x16 *qphy = platform_get_drvdata(pdev); 344 struct phy_8x16 *qphy = platform_get_drvdata(pdev);
348 345
349 unregister_reboot_notifier(&qphy->reboot_notify); 346 unregister_reboot_notifier(&qphy->reboot_notify);
350 extcon_unregister_notifier(qphy->vbus_edev, EXTCON_USB,
351 &qphy->vbus_notify);
352 347
353 /* 348 /*
354 * Ensure that D+/D- lines are routed to uB connector, so 349 * Ensure that D+/D- lines are routed to uB connector, so
diff --git a/drivers/usb/phy/phy-tahvo.c b/drivers/usb/phy/phy-tahvo.c
index ab5d364f6e8c..a31c8682e998 100644
--- a/drivers/usb/phy/phy-tahvo.c
+++ b/drivers/usb/phy/phy-tahvo.c
@@ -121,7 +121,7 @@ static void check_vbus_state(struct tahvo_usb *tu)
121 prev_state = tu->vbus_state; 121 prev_state = tu->vbus_state;
122 tu->vbus_state = reg & TAHVO_STAT_VBUS; 122 tu->vbus_state = reg & TAHVO_STAT_VBUS;
123 if (prev_state != tu->vbus_state) { 123 if (prev_state != tu->vbus_state) {
124 extcon_set_cable_state_(tu->extcon, EXTCON_USB, tu->vbus_state); 124 extcon_set_state_sync(tu->extcon, EXTCON_USB, tu->vbus_state);
125 sysfs_notify(&tu->pt_dev->dev.kobj, NULL, "vbus_state"); 125 sysfs_notify(&tu->pt_dev->dev.kobj, NULL, "vbus_state");
126 } 126 }
127} 127}
@@ -130,7 +130,7 @@ static void tahvo_usb_become_host(struct tahvo_usb *tu)
130{ 130{
131 struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent); 131 struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent);
132 132
133 extcon_set_cable_state_(tu->extcon, EXTCON_USB_HOST, true); 133 extcon_set_state_sync(tu->extcon, EXTCON_USB_HOST, true);
134 134
135 /* Power up the transceiver in USB host mode */ 135 /* Power up the transceiver in USB host mode */
136 retu_write(rdev, TAHVO_REG_USBR, USBR_REGOUT | USBR_NSUSPEND | 136 retu_write(rdev, TAHVO_REG_USBR, USBR_REGOUT | USBR_NSUSPEND |
@@ -149,7 +149,7 @@ static void tahvo_usb_become_peripheral(struct tahvo_usb *tu)
149{ 149{
150 struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent); 150 struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent);
151 151
152 extcon_set_cable_state_(tu->extcon, EXTCON_USB_HOST, false); 152 extcon_set_state_sync(tu->extcon, EXTCON_USB_HOST, false);
153 153
154 /* Power up transceiver and set it in USB peripheral mode */ 154 /* Power up transceiver and set it in USB peripheral mode */
155 retu_write(rdev, TAHVO_REG_USBR, USBR_SLAVE_CONTROL | USBR_REGOUT | 155 retu_write(rdev, TAHVO_REG_USBR, USBR_SLAVE_CONTROL | USBR_REGOUT |
@@ -379,9 +379,9 @@ static int tahvo_usb_probe(struct platform_device *pdev)
379 } 379 }
380 380
381 /* Set the initial cable state. */ 381 /* Set the initial cable state. */
382 extcon_set_cable_state_(tu->extcon, EXTCON_USB_HOST, 382 extcon_set_state_sync(tu->extcon, EXTCON_USB_HOST,
383 tu->tahvo_mode == TAHVO_MODE_HOST); 383 tu->tahvo_mode == TAHVO_MODE_HOST);
384 extcon_set_cable_state_(tu->extcon, EXTCON_USB, tu->vbus_state); 384 extcon_set_state_sync(tu->extcon, EXTCON_USB, tu->vbus_state);
385 385
386 /* Create OTG interface */ 386 /* Create OTG interface */
387 tahvo_usb_power_off(tu); 387 tahvo_usb_power_off(tu);
diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
index 012a37aa3e0d..623c51300393 100644
--- a/drivers/usb/renesas_usbhs/common.c
+++ b/drivers/usb/renesas_usbhs/common.c
@@ -389,7 +389,7 @@ static void usbhsc_hotplug(struct usbhs_priv *priv)
389 389
390 if (enable && !mod) { 390 if (enable && !mod) {
391 if (priv->edev) { 391 if (priv->edev) {
392 cable = extcon_get_cable_state_(priv->edev, EXTCON_USB_HOST); 392 cable = extcon_get_state(priv->edev, EXTCON_USB_HOST);
393 if ((cable > 0 && id != USBHS_HOST) || 393 if ((cable > 0 && id != USBHS_HOST) ||
394 (!cable && id != USBHS_GADGET)) { 394 (!cable && id != USBHS_GADGET)) {
395 dev_info(&pdev->dev, 395 dev_info(&pdev->dev,
diff --git a/drivers/usb/renesas_usbhs/mod_host.c b/drivers/usb/renesas_usbhs/mod_host.c
index 165e81bfd93a..dfb346e9bd0c 100644
--- a/drivers/usb/renesas_usbhs/mod_host.c
+++ b/drivers/usb/renesas_usbhs/mod_host.c
@@ -577,7 +577,7 @@ static struct usbhsh_device *usbhsh_device_attach(struct usbhsh_hpriv *hpriv,
577 upphub = usbhsh_device_number(hpriv, parent); 577 upphub = usbhsh_device_number(hpriv, parent);
578 hubport = usbhsh_device_hubport(udev); 578 hubport = usbhsh_device_hubport(udev);
579 579
580 dev_dbg(dev, "%s connecte to Hub [%d:%d](%p)\n", __func__, 580 dev_dbg(dev, "%s connected to Hub [%d:%d](%p)\n", __func__,
581 upphub, hubport, parent); 581 upphub, hubport, parent);
582 } 582 }
583 583
diff --git a/drivers/usb/serial/Kconfig b/drivers/usb/serial/Kconfig
index d9bc8dafe000..a8d5f2e4878d 100644
--- a/drivers/usb/serial/Kconfig
+++ b/drivers/usb/serial/Kconfig
@@ -713,6 +713,15 @@ config USB_SERIAL_QT2
713 To compile this driver as a module, choose M here: the 713 To compile this driver as a module, choose M here: the
714 module will be called quatech-serial. 714 module will be called quatech-serial.
715 715
716config USB_SERIAL_UPD78F0730
717 tristate "USB Renesas uPD78F0730 Single Port Serial Driver"
718 help
719 Say Y here if you want to use the Renesas uPD78F0730
720 serial driver.
721
722 To compile this driver as a module, choose M here: the
723 module will be called upd78f0730.
724
716config USB_SERIAL_DEBUG 725config USB_SERIAL_DEBUG
717 tristate "USB Debugging Device" 726 tristate "USB Debugging Device"
718 help 727 help
diff --git a/drivers/usb/serial/Makefile b/drivers/usb/serial/Makefile
index 9e43b7b002eb..5a21a82390e1 100644
--- a/drivers/usb/serial/Makefile
+++ b/drivers/usb/serial/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_USB_SERIAL_SSU100) += ssu100.o
56obj-$(CONFIG_USB_SERIAL_SYMBOL) += symbolserial.o 56obj-$(CONFIG_USB_SERIAL_SYMBOL) += symbolserial.o
57obj-$(CONFIG_USB_SERIAL_WWAN) += usb_wwan.o 57obj-$(CONFIG_USB_SERIAL_WWAN) += usb_wwan.o
58obj-$(CONFIG_USB_SERIAL_TI) += ti_usb_3410_5052.o 58obj-$(CONFIG_USB_SERIAL_TI) += ti_usb_3410_5052.o
59obj-$(CONFIG_USB_SERIAL_UPD78F0730) += upd78f0730.o
59obj-$(CONFIG_USB_SERIAL_VISOR) += visor.o 60obj-$(CONFIG_USB_SERIAL_VISOR) += visor.o
60obj-$(CONFIG_USB_SERIAL_WISHBONE) += wishbone-serial.o 61obj-$(CONFIG_USB_SERIAL_WISHBONE) += wishbone-serial.o
61obj-$(CONFIG_USB_SERIAL_WHITEHEAT) += whiteheat.o 62obj-$(CONFIG_USB_SERIAL_WHITEHEAT) += whiteheat.o
diff --git a/drivers/usb/serial/ark3116.c b/drivers/usb/serial/ark3116.c
index 1532cde8a437..2779e59c30f1 100644
--- a/drivers/usb/serial/ark3116.c
+++ b/drivers/usb/serial/ark3116.c
@@ -99,10 +99,17 @@ static int ark3116_read_reg(struct usb_serial *serial,
99 usb_rcvctrlpipe(serial->dev, 0), 99 usb_rcvctrlpipe(serial->dev, 0),
100 0xfe, 0xc0, 0, reg, 100 0xfe, 0xc0, 0, reg,
101 buf, 1, ARK_TIMEOUT); 101 buf, 1, ARK_TIMEOUT);
102 if (result < 0) 102 if (result < 1) {
103 dev_err(&serial->interface->dev,
104 "failed to read register %u: %d\n",
105 reg, result);
106 if (result >= 0)
107 result = -EIO;
108
103 return result; 109 return result;
104 else 110 }
105 return buf[0]; 111
112 return buf[0];
106} 113}
107 114
108static inline int calc_divisor(int bps) 115static inline int calc_divisor(int bps)
@@ -118,17 +125,11 @@ static inline int calc_divisor(int bps)
118static int ark3116_attach(struct usb_serial *serial) 125static int ark3116_attach(struct usb_serial *serial)
119{ 126{
120 /* make sure we have our end-points */ 127 /* make sure we have our end-points */
121 if ((serial->num_bulk_in == 0) || 128 if (serial->num_bulk_in == 0 ||
122 (serial->num_bulk_out == 0) || 129 serial->num_bulk_out == 0 ||
123 (serial->num_interrupt_in == 0)) { 130 serial->num_interrupt_in == 0) {
124 dev_err(&serial->dev->dev, 131 dev_err(&serial->interface->dev, "missing endpoint\n");
125 "%s - missing endpoint - " 132 return -ENODEV;
126 "bulk in: %d, bulk out: %d, int in %d\n",
127 KBUILD_MODNAME,
128 serial->num_bulk_in,
129 serial->num_bulk_out,
130 serial->num_interrupt_in);
131 return -EINVAL;
132 } 133 }
133 134
134 return 0; 135 return 0;
@@ -186,10 +187,8 @@ static int ark3116_port_probe(struct usb_serial_port *port)
186 if (priv->irda) 187 if (priv->irda)
187 ark3116_write_reg(serial, 0x9, 0); 188 ark3116_write_reg(serial, 0x9, 0);
188 189
189 dev_info(&serial->dev->dev, 190 dev_info(&port->dev, "using %s mode\n", priv->irda ? "IrDA" : "RS232");
190 "%s using %s mode\n", 191
191 KBUILD_MODNAME,
192 priv->irda ? "IrDA" : "RS232");
193 return 0; 192 return 0;
194} 193}
195 194
@@ -325,9 +324,8 @@ static void ark3116_set_termios(struct tty_struct *tty,
325 324
326 /* check for software flow control */ 325 /* check for software flow control */
327 if (I_IXOFF(tty) || I_IXON(tty)) { 326 if (I_IXOFF(tty) || I_IXON(tty)) {
328 dev_warn(&serial->dev->dev, 327 dev_warn(&port->dev,
329 "%s: don't know how to do software flow control\n", 328 "software flow control not implemented\n");
330 KBUILD_MODNAME);
331 } 329 }
332 330
333 /* Don't rewrite B0 */ 331 /* Don't rewrite B0 */
@@ -346,8 +344,8 @@ static void ark3116_close(struct usb_serial_port *port)
346 ark3116_write_reg(serial, UART_IER, 0); 344 ark3116_write_reg(serial, UART_IER, 0);
347 345
348 usb_serial_generic_close(port); 346 usb_serial_generic_close(port);
349 if (serial->num_interrupt_in) 347
350 usb_kill_urb(port->interrupt_in_urb); 348 usb_kill_urb(port->interrupt_in_urb);
351} 349}
352 350
353static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port) 351static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port)
@@ -366,23 +364,29 @@ static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port)
366 dev_dbg(&port->dev, 364 dev_dbg(&port->dev,
367 "%s - usb_serial_generic_open failed: %d\n", 365 "%s - usb_serial_generic_open failed: %d\n",
368 __func__, result); 366 __func__, result);
369 goto err_out; 367 goto err_free;
370 } 368 }
371 369
372 /* remove any data still left: also clears error state */ 370 /* remove any data still left: also clears error state */
373 ark3116_read_reg(serial, UART_RX, buf); 371 ark3116_read_reg(serial, UART_RX, buf);
374 372
375 /* read modem status */ 373 /* read modem status */
376 priv->msr = ark3116_read_reg(serial, UART_MSR, buf); 374 result = ark3116_read_reg(serial, UART_MSR, buf);
375 if (result < 0)
376 goto err_close;
377 priv->msr = *buf;
378
377 /* read line status */ 379 /* read line status */
378 priv->lsr = ark3116_read_reg(serial, UART_LSR, buf); 380 result = ark3116_read_reg(serial, UART_LSR, buf);
381 if (result < 0)
382 goto err_close;
383 priv->lsr = *buf;
379 384
380 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 385 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
381 if (result) { 386 if (result) {
382 dev_err(&port->dev, "submit irq_in urb failed %d\n", 387 dev_err(&port->dev, "submit irq_in urb failed %d\n",
383 result); 388 result);
384 ark3116_close(port); 389 goto err_close;
385 goto err_out;
386 } 390 }
387 391
388 /* activate interrupts */ 392 /* activate interrupts */
@@ -395,8 +399,15 @@ static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port)
395 if (tty) 399 if (tty)
396 ark3116_set_termios(tty, port, NULL); 400 ark3116_set_termios(tty, port, NULL);
397 401
398err_out:
399 kfree(buf); 402 kfree(buf);
403
404 return 0;
405
406err_close:
407 usb_serial_generic_close(port);
408err_free:
409 kfree(buf);
410
400 return result; 411 return result;
401} 412}
402 413
@@ -602,9 +613,8 @@ static void ark3116_read_int_callback(struct urb *urb)
602 613
603 result = usb_submit_urb(urb, GFP_ATOMIC); 614 result = usb_submit_urb(urb, GFP_ATOMIC);
604 if (result) 615 if (result)
605 dev_err(&urb->dev->dev, 616 dev_err(&port->dev, "failed to resubmit interrupt urb: %d\n",
606 "%s - Error %d submitting interrupt urb\n", 617 result);
607 __func__, result);
608} 618}
609 619
610 620
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 95aa5233726c..351745aec0e1 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -93,8 +93,8 @@ MODULE_DEVICE_TABLE(usb, id_table);
93struct ch341_private { 93struct ch341_private {
94 spinlock_t lock; /* access lock */ 94 spinlock_t lock; /* access lock */
95 unsigned baud_rate; /* set baud rate */ 95 unsigned baud_rate; /* set baud rate */
96 u8 line_control; /* set line control value RTS/DTR */ 96 u8 mcr;
97 u8 line_status; /* active status of modem control inputs */ 97 u8 msr;
98 u8 lcr; 98 u8 lcr;
99}; 99};
100 100
@@ -107,8 +107,8 @@ static int ch341_control_out(struct usb_device *dev, u8 request,
107{ 107{
108 int r; 108 int r;
109 109
110 dev_dbg(&dev->dev, "ch341_control_out(%02x,%02x,%04x,%04x)\n", 110 dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x)\n", __func__,
111 USB_DIR_OUT|0x40, (int)request, (int)value, (int)index); 111 request, value, index);
112 112
113 r = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), request, 113 r = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), request,
114 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, 114 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
@@ -125,9 +125,8 @@ static int ch341_control_in(struct usb_device *dev,
125{ 125{
126 int r; 126 int r;
127 127
128 dev_dbg(&dev->dev, "ch341_control_in(%02x,%02x,%04x,%04x,%p,%u)\n", 128 dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x,%u)\n", __func__,
129 USB_DIR_IN|0x40, (int)request, (int)value, (int)index, buf, 129 request, value, index, bufsize);
130 (int)bufsize);
131 130
132 r = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), request, 131 r = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), request,
133 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, 132 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
@@ -210,7 +209,7 @@ static int ch341_get_status(struct usb_device *dev, struct ch341_private *priv)
210 goto out; 209 goto out;
211 210
212 spin_lock_irqsave(&priv->lock, flags); 211 spin_lock_irqsave(&priv->lock, flags);
213 priv->line_status = (~(*buffer)) & CH341_BITS_MODEM_STAT; 212 priv->msr = (~(*buffer)) & CH341_BITS_MODEM_STAT;
214 spin_unlock_irqrestore(&priv->lock, flags); 213 spin_unlock_irqrestore(&priv->lock, flags);
215 214
216out: kfree(buffer); 215out: kfree(buffer);
@@ -239,30 +238,11 @@ static int ch341_configure(struct usb_device *dev, struct ch341_private *priv)
239 if (r < 0) 238 if (r < 0)
240 goto out; 239 goto out;
241 240
242 /* expect two bytes 0x56 0x00 */
243 r = ch341_control_in(dev, CH341_REQ_READ_REG, 0x2518, 0, buffer, size);
244 if (r < 0)
245 goto out;
246
247 r = ch341_control_out(dev, CH341_REQ_WRITE_REG, 0x2518, 0x0050);
248 if (r < 0)
249 goto out;
250
251 /* expect 0xff 0xee */
252 r = ch341_get_status(dev, priv);
253 if (r < 0)
254 goto out;
255
256 r = ch341_set_baudrate_lcr(dev, priv, priv->lcr); 241 r = ch341_set_baudrate_lcr(dev, priv, priv->lcr);
257 if (r < 0) 242 if (r < 0)
258 goto out; 243 goto out;
259 244
260 r = ch341_set_handshake(dev, priv->line_control); 245 r = ch341_set_handshake(dev, priv->mcr);
261 if (r < 0)
262 goto out;
263
264 /* expect 0x9f 0xee */
265 r = ch341_get_status(dev, priv);
266 246
267out: kfree(buffer); 247out: kfree(buffer);
268 return r; 248 return r;
@@ -279,6 +259,11 @@ static int ch341_port_probe(struct usb_serial_port *port)
279 259
280 spin_lock_init(&priv->lock); 260 spin_lock_init(&priv->lock);
281 priv->baud_rate = DEFAULT_BAUD_RATE; 261 priv->baud_rate = DEFAULT_BAUD_RATE;
262 /*
263 * Some CH340 devices appear unable to change the initial LCR
264 * settings, so set a sane 8N1 default.
265 */
266 priv->lcr = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX | CH341_LCR_CS8;
282 267
283 r = ch341_configure(port->serial->dev, priv); 268 r = ch341_configure(port->serial->dev, priv);
284 if (r < 0) 269 if (r < 0)
@@ -304,7 +289,7 @@ static int ch341_port_remove(struct usb_serial_port *port)
304static int ch341_carrier_raised(struct usb_serial_port *port) 289static int ch341_carrier_raised(struct usb_serial_port *port)
305{ 290{
306 struct ch341_private *priv = usb_get_serial_port_data(port); 291 struct ch341_private *priv = usb_get_serial_port_data(port);
307 if (priv->line_status & CH341_BIT_DCD) 292 if (priv->msr & CH341_BIT_DCD)
308 return 1; 293 return 1;
309 return 0; 294 return 0;
310} 295}
@@ -317,11 +302,11 @@ static void ch341_dtr_rts(struct usb_serial_port *port, int on)
317 /* drop DTR and RTS */ 302 /* drop DTR and RTS */
318 spin_lock_irqsave(&priv->lock, flags); 303 spin_lock_irqsave(&priv->lock, flags);
319 if (on) 304 if (on)
320 priv->line_control |= CH341_BIT_RTS | CH341_BIT_DTR; 305 priv->mcr |= CH341_BIT_RTS | CH341_BIT_DTR;
321 else 306 else
322 priv->line_control &= ~(CH341_BIT_RTS | CH341_BIT_DTR); 307 priv->mcr &= ~(CH341_BIT_RTS | CH341_BIT_DTR);
323 spin_unlock_irqrestore(&priv->lock, flags); 308 spin_unlock_irqrestore(&priv->lock, flags);
324 ch341_set_handshake(port->serial->dev, priv->line_control); 309 ch341_set_handshake(port->serial->dev, priv->mcr);
325} 310}
326 311
327static void ch341_close(struct usb_serial_port *port) 312static void ch341_close(struct usb_serial_port *port)
@@ -334,14 +319,9 @@ static void ch341_close(struct usb_serial_port *port)
334/* open this device, set default parameters */ 319/* open this device, set default parameters */
335static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port) 320static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port)
336{ 321{
337 struct usb_serial *serial = port->serial;
338 struct ch341_private *priv = usb_get_serial_port_data(port); 322 struct ch341_private *priv = usb_get_serial_port_data(port);
339 int r; 323 int r;
340 324
341 r = ch341_configure(serial->dev, priv);
342 if (r)
343 return r;
344
345 if (tty) 325 if (tty)
346 ch341_set_termios(tty, port, NULL); 326 ch341_set_termios(tty, port, NULL);
347 327
@@ -353,6 +333,12 @@ static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port)
353 return r; 333 return r;
354 } 334 }
355 335
336 r = ch341_get_status(port->serial->dev, priv);
337 if (r < 0) {
338 dev_err(&port->dev, "failed to read modem status: %d\n", r);
339 goto err_kill_interrupt_urb;
340 }
341
356 r = usb_serial_generic_open(tty, port); 342 r = usb_serial_generic_open(tty, port);
357 if (r) 343 if (r)
358 goto err_kill_interrupt_urb; 344 goto err_kill_interrupt_urb;
@@ -374,7 +360,7 @@ static void ch341_set_termios(struct tty_struct *tty,
374 struct ch341_private *priv = usb_get_serial_port_data(port); 360 struct ch341_private *priv = usb_get_serial_port_data(port);
375 unsigned baud_rate; 361 unsigned baud_rate;
376 unsigned long flags; 362 unsigned long flags;
377 unsigned char ctrl; 363 u8 lcr;
378 int r; 364 int r;
379 365
380 /* redundant changes may cause the chip to lose bytes */ 366 /* redundant changes may cause the chip to lose bytes */
@@ -383,54 +369,54 @@ static void ch341_set_termios(struct tty_struct *tty,
383 369
384 baud_rate = tty_get_baud_rate(tty); 370 baud_rate = tty_get_baud_rate(tty);
385 371
386 ctrl = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX; 372 lcr = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX;
387 373
388 switch (C_CSIZE(tty)) { 374 switch (C_CSIZE(tty)) {
389 case CS5: 375 case CS5:
390 ctrl |= CH341_LCR_CS5; 376 lcr |= CH341_LCR_CS5;
391 break; 377 break;
392 case CS6: 378 case CS6:
393 ctrl |= CH341_LCR_CS6; 379 lcr |= CH341_LCR_CS6;
394 break; 380 break;
395 case CS7: 381 case CS7:
396 ctrl |= CH341_LCR_CS7; 382 lcr |= CH341_LCR_CS7;
397 break; 383 break;
398 case CS8: 384 case CS8:
399 ctrl |= CH341_LCR_CS8; 385 lcr |= CH341_LCR_CS8;
400 break; 386 break;
401 } 387 }
402 388
403 if (C_PARENB(tty)) { 389 if (C_PARENB(tty)) {
404 ctrl |= CH341_LCR_ENABLE_PAR; 390 lcr |= CH341_LCR_ENABLE_PAR;
405 if (C_PARODD(tty) == 0) 391 if (C_PARODD(tty) == 0)
406 ctrl |= CH341_LCR_PAR_EVEN; 392 lcr |= CH341_LCR_PAR_EVEN;
407 if (C_CMSPAR(tty)) 393 if (C_CMSPAR(tty))
408 ctrl |= CH341_LCR_MARK_SPACE; 394 lcr |= CH341_LCR_MARK_SPACE;
409 } 395 }
410 396
411 if (C_CSTOPB(tty)) 397 if (C_CSTOPB(tty))
412 ctrl |= CH341_LCR_STOP_BITS_2; 398 lcr |= CH341_LCR_STOP_BITS_2;
413 399
414 if (baud_rate) { 400 if (baud_rate) {
415 priv->baud_rate = baud_rate; 401 priv->baud_rate = baud_rate;
416 402
417 r = ch341_set_baudrate_lcr(port->serial->dev, priv, ctrl); 403 r = ch341_set_baudrate_lcr(port->serial->dev, priv, lcr);
418 if (r < 0 && old_termios) { 404 if (r < 0 && old_termios) {
419 priv->baud_rate = tty_termios_baud_rate(old_termios); 405 priv->baud_rate = tty_termios_baud_rate(old_termios);
420 tty_termios_copy_hw(&tty->termios, old_termios); 406 tty_termios_copy_hw(&tty->termios, old_termios);
421 } else if (r == 0) { 407 } else if (r == 0) {
422 priv->lcr = ctrl; 408 priv->lcr = lcr;
423 } 409 }
424 } 410 }
425 411
426 spin_lock_irqsave(&priv->lock, flags); 412 spin_lock_irqsave(&priv->lock, flags);
427 if (C_BAUD(tty) == B0) 413 if (C_BAUD(tty) == B0)
428 priv->line_control &= ~(CH341_BIT_DTR | CH341_BIT_RTS); 414 priv->mcr &= ~(CH341_BIT_DTR | CH341_BIT_RTS);
429 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0) 415 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
430 priv->line_control |= (CH341_BIT_DTR | CH341_BIT_RTS); 416 priv->mcr |= (CH341_BIT_DTR | CH341_BIT_RTS);
431 spin_unlock_irqrestore(&priv->lock, flags); 417 spin_unlock_irqrestore(&priv->lock, flags);
432 418
433 ch341_set_handshake(port->serial->dev, priv->line_control); 419 ch341_set_handshake(port->serial->dev, priv->mcr);
434} 420}
435 421
436static void ch341_break_ctl(struct tty_struct *tty, int break_state) 422static void ch341_break_ctl(struct tty_struct *tty, int break_state)
@@ -486,20 +472,20 @@ static int ch341_tiocmset(struct tty_struct *tty,
486 472
487 spin_lock_irqsave(&priv->lock, flags); 473 spin_lock_irqsave(&priv->lock, flags);
488 if (set & TIOCM_RTS) 474 if (set & TIOCM_RTS)
489 priv->line_control |= CH341_BIT_RTS; 475 priv->mcr |= CH341_BIT_RTS;
490 if (set & TIOCM_DTR) 476 if (set & TIOCM_DTR)
491 priv->line_control |= CH341_BIT_DTR; 477 priv->mcr |= CH341_BIT_DTR;
492 if (clear & TIOCM_RTS) 478 if (clear & TIOCM_RTS)
493 priv->line_control &= ~CH341_BIT_RTS; 479 priv->mcr &= ~CH341_BIT_RTS;
494 if (clear & TIOCM_DTR) 480 if (clear & TIOCM_DTR)
495 priv->line_control &= ~CH341_BIT_DTR; 481 priv->mcr &= ~CH341_BIT_DTR;
496 control = priv->line_control; 482 control = priv->mcr;
497 spin_unlock_irqrestore(&priv->lock, flags); 483 spin_unlock_irqrestore(&priv->lock, flags);
498 484
499 return ch341_set_handshake(port->serial->dev, control); 485 return ch341_set_handshake(port->serial->dev, control);
500} 486}
501 487
502static void ch341_update_line_status(struct usb_serial_port *port, 488static void ch341_update_status(struct usb_serial_port *port,
503 unsigned char *data, size_t len) 489 unsigned char *data, size_t len)
504{ 490{
505 struct ch341_private *priv = usb_get_serial_port_data(port); 491 struct ch341_private *priv = usb_get_serial_port_data(port);
@@ -514,8 +500,8 @@ static void ch341_update_line_status(struct usb_serial_port *port,
514 status = ~data[2] & CH341_BITS_MODEM_STAT; 500 status = ~data[2] & CH341_BITS_MODEM_STAT;
515 501
516 spin_lock_irqsave(&priv->lock, flags); 502 spin_lock_irqsave(&priv->lock, flags);
517 delta = status ^ priv->line_status; 503 delta = status ^ priv->msr;
518 priv->line_status = status; 504 priv->msr = status;
519 spin_unlock_irqrestore(&priv->lock, flags); 505 spin_unlock_irqrestore(&priv->lock, flags);
520 506
521 if (data[1] & CH341_MULT_STAT) 507 if (data[1] & CH341_MULT_STAT)
@@ -568,7 +554,7 @@ static void ch341_read_int_callback(struct urb *urb)
568 } 554 }
569 555
570 usb_serial_debug_data(&port->dev, __func__, len, data); 556 usb_serial_debug_data(&port->dev, __func__, len, data);
571 ch341_update_line_status(port, data, len); 557 ch341_update_status(port, data, len);
572exit: 558exit:
573 status = usb_submit_urb(urb, GFP_ATOMIC); 559 status = usb_submit_urb(urb, GFP_ATOMIC);
574 if (status) { 560 if (status) {
@@ -587,8 +573,8 @@ static int ch341_tiocmget(struct tty_struct *tty)
587 unsigned int result; 573 unsigned int result;
588 574
589 spin_lock_irqsave(&priv->lock, flags); 575 spin_lock_irqsave(&priv->lock, flags);
590 mcr = priv->line_control; 576 mcr = priv->mcr;
591 status = priv->line_status; 577 status = priv->msr;
592 spin_unlock_irqrestore(&priv->lock, flags); 578 spin_unlock_irqrestore(&priv->lock, flags);
593 579
594 result = ((mcr & CH341_BIT_DTR) ? TIOCM_DTR : 0) 580 result = ((mcr & CH341_BIT_DTR) ? TIOCM_DTR : 0)
@@ -619,6 +605,12 @@ static int ch341_reset_resume(struct usb_serial *serial)
619 ret); 605 ret);
620 return ret; 606 return ret;
621 } 607 }
608
609 ret = ch341_get_status(port->serial->dev, priv);
610 if (ret < 0) {
611 dev_err(&port->dev, "failed to read modem status: %d\n",
612 ret);
613 }
622 } 614 }
623 615
624 return usb_serial_generic_resume(serial); 616 return usb_serial_generic_resume(serial);
diff --git a/drivers/usb/serial/console.c b/drivers/usb/serial/console.c
index 8967715fe6fc..fdf89800ebc3 100644
--- a/drivers/usb/serial/console.c
+++ b/drivers/usb/serial/console.c
@@ -143,6 +143,7 @@ static int usb_console_setup(struct console *co, char *options)
143 tty->driver = usb_serial_tty_driver; 143 tty->driver = usb_serial_tty_driver;
144 tty->index = co->index; 144 tty->index = co->index;
145 init_ldsem(&tty->ldisc_sem); 145 init_ldsem(&tty->ldisc_sem);
146 spin_lock_init(&tty->files_lock);
146 INIT_LIST_HEAD(&tty->tty_files); 147 INIT_LIST_HEAD(&tty->tty_files);
147 kref_get(&tty->driver->kref); 148 kref_get(&tty->driver->kref);
148 __module_get(tty->driver->owner); 149 __module_get(tty->driver->owner);
@@ -264,8 +265,7 @@ static struct console usbcons = {
264 265
265void usb_serial_console_disconnect(struct usb_serial *serial) 266void usb_serial_console_disconnect(struct usb_serial *serial)
266{ 267{
267 if (serial && serial->port && serial->port[0] 268 if (serial->port[0] == usbcons_info.port) {
268 && serial->port[0] == usbcons_info.port) {
269 usb_serial_console_exit(); 269 usb_serial_console_exit();
270 usb_serial_put(serial); 270 usb_serial_put(serial);
271 } 271 }
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 5d61d0871f2e..0c55e7f64269 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -178,6 +178,8 @@ static const struct usb_device_id id_table[] = {
178 { USB_DEVICE(0x1901, 0x0190) }, /* GE B850 CP2105 Recorder interface */ 178 { USB_DEVICE(0x1901, 0x0190) }, /* GE B850 CP2105 Recorder interface */
179 { USB_DEVICE(0x1901, 0x0193) }, /* GE B650 CP2104 PMC interface */ 179 { USB_DEVICE(0x1901, 0x0193) }, /* GE B650 CP2104 PMC interface */
180 { USB_DEVICE(0x1901, 0x0194) }, /* GE Healthcare Remote Alarm Box */ 180 { USB_DEVICE(0x1901, 0x0194) }, /* GE Healthcare Remote Alarm Box */
181 { USB_DEVICE(0x1901, 0x0195) }, /* GE B850/B650/B450 CP2104 DP UART interface */
182 { USB_DEVICE(0x1901, 0x0196) }, /* GE B850 CP2105 DP UART interface */
181 { USB_DEVICE(0x19CF, 0x3000) }, /* Parrot NMEA GPS Flight Recorder */ 183 { USB_DEVICE(0x19CF, 0x3000) }, /* Parrot NMEA GPS Flight Recorder */
182 { USB_DEVICE(0x1ADB, 0x0001) }, /* Schweitzer Engineering C662 Cable */ 184 { USB_DEVICE(0x1ADB, 0x0001) }, /* Schweitzer Engineering C662 Cable */
183 { USB_DEVICE(0x1B1C, 0x1C00) }, /* Corsair USB Dongle */ 185 { USB_DEVICE(0x1B1C, 0x1C00) }, /* Corsair USB Dongle */
diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c
index bbeeb2bd55a8..90110de715e0 100644
--- a/drivers/usb/serial/cypress_m8.c
+++ b/drivers/usb/serial/cypress_m8.c
@@ -1069,7 +1069,6 @@ static void cypress_read_int_callback(struct urb *urb)
1069 unsigned char *data = urb->transfer_buffer; 1069 unsigned char *data = urb->transfer_buffer;
1070 unsigned long flags; 1070 unsigned long flags;
1071 char tty_flag = TTY_NORMAL; 1071 char tty_flag = TTY_NORMAL;
1072 int havedata = 0;
1073 int bytes = 0; 1072 int bytes = 0;
1074 int result; 1073 int result;
1075 int i = 0; 1074 int i = 0;
@@ -1118,16 +1117,12 @@ static void cypress_read_int_callback(struct urb *urb)
1118 priv->current_status = data[0] & 0xF8; 1117 priv->current_status = data[0] & 0xF8;
1119 bytes = data[1] + 2; 1118 bytes = data[1] + 2;
1120 i = 2; 1119 i = 2;
1121 if (bytes > 2)
1122 havedata = 1;
1123 break; 1120 break;
1124 case packet_format_2: 1121 case packet_format_2:
1125 /* This is for the CY7C63743... */ 1122 /* This is for the CY7C63743... */
1126 priv->current_status = data[0] & 0xF8; 1123 priv->current_status = data[0] & 0xF8;
1127 bytes = (data[0] & 0x07) + 1; 1124 bytes = (data[0] & 0x07) + 1;
1128 i = 1; 1125 i = 1;
1129 if (bytes > 1)
1130 havedata = 1;
1131 break; 1126 break;
1132 } 1127 }
1133 spin_unlock_irqrestore(&priv->lock, flags); 1128 spin_unlock_irqrestore(&priv->lock, flags);
diff --git a/drivers/usb/serial/digi_acceleport.c b/drivers/usb/serial/digi_acceleport.c
index 6a1df9e824ca..eb433922598c 100644
--- a/drivers/usb/serial/digi_acceleport.c
+++ b/drivers/usb/serial/digi_acceleport.c
@@ -1398,25 +1398,30 @@ static int digi_read_inb_callback(struct urb *urb)
1398{ 1398{
1399 struct usb_serial_port *port = urb->context; 1399 struct usb_serial_port *port = urb->context;
1400 struct digi_port *priv = usb_get_serial_port_data(port); 1400 struct digi_port *priv = usb_get_serial_port_data(port);
1401 int opcode = ((unsigned char *)urb->transfer_buffer)[0]; 1401 unsigned char *buf = urb->transfer_buffer;
1402 int len = ((unsigned char *)urb->transfer_buffer)[1]; 1402 int opcode;
1403 int port_status = ((unsigned char *)urb->transfer_buffer)[2]; 1403 int len;
1404 unsigned char *data = ((unsigned char *)urb->transfer_buffer) + 3; 1404 int port_status;
1405 unsigned char *data;
1405 int flag, throttled; 1406 int flag, throttled;
1406 int status = urb->status;
1407
1408 /* do not process callbacks on closed ports */
1409 /* but do continue the read chain */
1410 if (urb->status == -ENOENT)
1411 return 0;
1412 1407
1413 /* short/multiple packet check */ 1408 /* short/multiple packet check */
1409 if (urb->actual_length < 2) {
1410 dev_warn(&port->dev, "short packet received\n");
1411 return -1;
1412 }
1413
1414 opcode = buf[0];
1415 len = buf[1];
1416
1414 if (urb->actual_length != len + 2) { 1417 if (urb->actual_length != len + 2) {
1415 dev_err(&port->dev, "%s: INCOMPLETE OR MULTIPLE PACKET, " 1418 dev_err(&port->dev, "malformed packet received: port=%d, opcode=%d, len=%d, actual_length=%u\n",
1416 "status=%d, port=%d, opcode=%d, len=%d, " 1419 priv->dp_port_num, opcode, len, urb->actual_length);
1417 "actual_length=%d, status=%d\n", __func__, status, 1420 return -1;
1418 priv->dp_port_num, opcode, len, urb->actual_length, 1421 }
1419 port_status); 1422
1423 if (opcode == DIGI_CMD_RECEIVE_DATA && len < 1) {
1424 dev_err(&port->dev, "malformed data packet received\n");
1420 return -1; 1425 return -1;
1421 } 1426 }
1422 1427
@@ -1430,6 +1435,9 @@ static int digi_read_inb_callback(struct urb *urb)
1430 1435
1431 /* receive data */ 1436 /* receive data */
1432 if (opcode == DIGI_CMD_RECEIVE_DATA) { 1437 if (opcode == DIGI_CMD_RECEIVE_DATA) {
1438 port_status = buf[2];
1439 data = &buf[3];
1440
1433 /* get flag from port_status */ 1441 /* get flag from port_status */
1434 flag = 0; 1442 flag = 0;
1435 1443
@@ -1482,16 +1490,20 @@ static int digi_read_oob_callback(struct urb *urb)
1482 struct usb_serial *serial = port->serial; 1490 struct usb_serial *serial = port->serial;
1483 struct tty_struct *tty; 1491 struct tty_struct *tty;
1484 struct digi_port *priv = usb_get_serial_port_data(port); 1492 struct digi_port *priv = usb_get_serial_port_data(port);
1493 unsigned char *buf = urb->transfer_buffer;
1485 int opcode, line, status, val; 1494 int opcode, line, status, val;
1486 int i; 1495 int i;
1487 unsigned int rts; 1496 unsigned int rts;
1488 1497
1498 if (urb->actual_length < 4)
1499 return -1;
1500
1489 /* handle each oob command */ 1501 /* handle each oob command */
1490 for (i = 0; i < urb->actual_length - 3;) { 1502 for (i = 0; i < urb->actual_length - 4; i += 4) {
1491 opcode = ((unsigned char *)urb->transfer_buffer)[i++]; 1503 opcode = buf[i];
1492 line = ((unsigned char *)urb->transfer_buffer)[i++]; 1504 line = buf[i + 1];
1493 status = ((unsigned char *)urb->transfer_buffer)[i++]; 1505 status = buf[i + 2];
1494 val = ((unsigned char *)urb->transfer_buffer)[i++]; 1506 val = buf[i + 3];
1495 1507
1496 dev_dbg(&port->dev, "digi_read_oob_callback: opcode=%d, line=%d, status=%d, val=%d\n", 1508 dev_dbg(&port->dev, "digi_read_oob_callback: opcode=%d, line=%d, status=%d, val=%d\n",
1497 opcode, line, status, val); 1509 opcode, line, status, val);
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 23d14b98ae2a..c540de15aad2 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -1439,10 +1439,13 @@ static int read_latency_timer(struct usb_serial_port *port)
1439 FTDI_SIO_GET_LATENCY_TIMER_REQUEST_TYPE, 1439 FTDI_SIO_GET_LATENCY_TIMER_REQUEST_TYPE,
1440 0, priv->interface, 1440 0, priv->interface,
1441 buf, 1, WDR_TIMEOUT); 1441 buf, 1, WDR_TIMEOUT);
1442 if (rv < 0) 1442 if (rv < 1) {
1443 dev_err(&port->dev, "Unable to read latency timer: %i\n", rv); 1443 dev_err(&port->dev, "Unable to read latency timer: %i\n", rv);
1444 else 1444 if (rv >= 0)
1445 rv = -EIO;
1446 } else {
1445 priv->latency = buf[0]; 1447 priv->latency = buf[0];
1448 }
1446 1449
1447 kfree(buf); 1450 kfree(buf);
1448 1451
@@ -1531,7 +1534,7 @@ check_and_exit:
1531} 1534}
1532 1535
1533static int get_lsr_info(struct usb_serial_port *port, 1536static int get_lsr_info(struct usb_serial_port *port,
1534 struct serial_struct __user *retinfo) 1537 unsigned int __user *retinfo)
1535{ 1538{
1536 struct ftdi_private *priv = usb_get_serial_port_data(port); 1539 struct ftdi_private *priv = usb_get_serial_port_data(port);
1537 unsigned int result = 0; 1540 unsigned int result = 0;
@@ -1802,8 +1805,6 @@ static int ftdi_sio_port_probe(struct usb_serial_port *port)
1802 1805
1803 mutex_init(&priv->cfg_lock); 1806 mutex_init(&priv->cfg_lock);
1804 1807
1805 priv->flags = ASYNC_LOW_LATENCY;
1806
1807 if (quirk && quirk->port_probe) 1808 if (quirk && quirk->port_probe)
1808 quirk->port_probe(priv); 1809 quirk->port_probe(priv);
1809 1810
@@ -2067,6 +2068,20 @@ static int ftdi_process_packet(struct usb_serial_port *port,
2067 priv->prev_status = status; 2068 priv->prev_status = status;
2068 } 2069 }
2069 2070
2071 /* save if the transmitter is empty or not */
2072 if (packet[1] & FTDI_RS_TEMT)
2073 priv->transmit_empty = 1;
2074 else
2075 priv->transmit_empty = 0;
2076
2077 len -= 2;
2078 if (!len)
2079 return 0; /* status only */
2080
2081 /*
2082 * Break and error status must only be processed for packets with
2083 * data payload to avoid over-reporting.
2084 */
2070 flag = TTY_NORMAL; 2085 flag = TTY_NORMAL;
2071 if (packet[1] & FTDI_RS_ERR_MASK) { 2086 if (packet[1] & FTDI_RS_ERR_MASK) {
2072 /* Break takes precedence over parity, which takes precedence 2087 /* Break takes precedence over parity, which takes precedence
@@ -2089,15 +2104,6 @@ static int ftdi_process_packet(struct usb_serial_port *port,
2089 } 2104 }
2090 } 2105 }
2091 2106
2092 /* save if the transmitter is empty or not */
2093 if (packet[1] & FTDI_RS_TEMT)
2094 priv->transmit_empty = 1;
2095 else
2096 priv->transmit_empty = 0;
2097
2098 len -= 2;
2099 if (!len)
2100 return 0; /* status only */
2101 port->icount.rx += len; 2107 port->icount.rx += len;
2102 ch = packet + 2; 2108 ch = packet + 2;
2103 2109
@@ -2428,8 +2434,12 @@ static int ftdi_get_modem_status(struct usb_serial_port *port,
2428 FTDI_SIO_GET_MODEM_STATUS_REQUEST_TYPE, 2434 FTDI_SIO_GET_MODEM_STATUS_REQUEST_TYPE,
2429 0, priv->interface, 2435 0, priv->interface,
2430 buf, len, WDR_TIMEOUT); 2436 buf, len, WDR_TIMEOUT);
2431 if (ret < 0) { 2437
2438 /* NOTE: We allow short responses and handle that below. */
2439 if (ret < 1) {
2432 dev_err(&port->dev, "failed to get modem status: %d\n", ret); 2440 dev_err(&port->dev, "failed to get modem status: %d\n", ret);
2441 if (ret >= 0)
2442 ret = -EIO;
2433 ret = usb_translate_errors(ret); 2443 ret = usb_translate_errors(ret);
2434 goto out; 2444 goto out;
2435 } 2445 }
@@ -2480,20 +2490,15 @@ static int ftdi_ioctl(struct tty_struct *tty,
2480 unsigned int cmd, unsigned long arg) 2490 unsigned int cmd, unsigned long arg)
2481{ 2491{
2482 struct usb_serial_port *port = tty->driver_data; 2492 struct usb_serial_port *port = tty->driver_data;
2493 void __user *argp = (void __user *)arg;
2483 2494
2484 /* Based on code from acm.c and others */
2485 switch (cmd) { 2495 switch (cmd) {
2486 2496 case TIOCGSERIAL:
2487 case TIOCGSERIAL: /* gets serial port data */ 2497 return get_serial_info(port, argp);
2488 return get_serial_info(port, 2498 case TIOCSSERIAL:
2489 (struct serial_struct __user *) arg); 2499 return set_serial_info(tty, port, argp);
2490
2491 case TIOCSSERIAL: /* sets serial port data */
2492 return set_serial_info(tty, port,
2493 (struct serial_struct __user *) arg);
2494 case TIOCSERGETLSR: 2500 case TIOCSERGETLSR:
2495 return get_lsr_info(port, (struct serial_struct __user *)arg); 2501 return get_lsr_info(port, argp);
2496 break;
2497 default: 2502 default:
2498 break; 2503 break;
2499 } 2504 }
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c
index d50e5773483f..bb7673e80a57 100644
--- a/drivers/usb/serial/io_edgeport.c
+++ b/drivers/usb/serial/io_edgeport.c
@@ -57,6 +57,88 @@
57 57
58#define OPEN_TIMEOUT (5*HZ) /* 5 seconds */ 58#define OPEN_TIMEOUT (5*HZ) /* 5 seconds */
59 59
60static const struct usb_device_id edgeport_2port_id_table[] = {
61 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2) },
62 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2I) },
63 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_421) },
64 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_21) },
65 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2_DIN) },
66 { }
67};
68
69static const struct usb_device_id edgeport_4port_id_table[] = {
70 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4) },
71 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_RAPIDPORT_4) },
72 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4T) },
73 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_MT4X56USB) },
74 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4I) },
75 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU) },
76 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4_DIN) },
77 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_22I) },
78 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_4) },
79 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_COMPATIBLE) },
80 { }
81};
82
83static const struct usb_device_id edgeport_8port_id_table[] = {
84 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8) },
85 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_16_DUAL_CPU) },
86 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8I) },
87 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8R) },
88 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8RR) },
89 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_8) },
90 { }
91};
92
93static const struct usb_device_id Epic_port_id_table[] = {
94 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0202) },
95 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0203) },
96 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0310) },
97 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0311) },
98 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0312) },
99 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A758) },
100 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A794) },
101 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A225) },
102 { }
103};
104
105/* Devices that this driver supports */
106static const struct usb_device_id id_table_combined[] = {
107 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4) },
108 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_RAPIDPORT_4) },
109 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4T) },
110 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_MT4X56USB) },
111 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2) },
112 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4I) },
113 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2I) },
114 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_421) },
115 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_21) },
116 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU) },
117 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8) },
118 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2_DIN) },
119 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4_DIN) },
120 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_16_DUAL_CPU) },
121 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_22I) },
122 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_4) },
123 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_COMPATIBLE) },
124 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8I) },
125 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8R) },
126 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8RR) },
127 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_8) },
128 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0202) },
129 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0203) },
130 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0310) },
131 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0311) },
132 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0312) },
133 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A758) },
134 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A794) },
135 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A225) },
136 { } /* Terminating entry */
137};
138
139MODULE_DEVICE_TABLE(usb, id_table_combined);
140
141
60/* receive port state */ 142/* receive port state */
61enum RXSTATE { 143enum RXSTATE {
62 EXPECT_HDR1 = 0, /* Expect header byte 1 */ 144 EXPECT_HDR1 = 0, /* Expect header byte 1 */
@@ -217,8 +299,6 @@ static void edge_release(struct usb_serial *serial);
217static int edge_port_probe(struct usb_serial_port *port); 299static int edge_port_probe(struct usb_serial_port *port);
218static int edge_port_remove(struct usb_serial_port *port); 300static int edge_port_remove(struct usb_serial_port *port);
219 301
220#include "io_tables.h" /* all of the devices that this driver supports */
221
222/* function prototypes for all of our local functions */ 302/* function prototypes for all of our local functions */
223 303
224static void process_rcvd_data(struct edgeport_serial *edge_serial, 304static void process_rcvd_data(struct edgeport_serial *edge_serial,
@@ -492,20 +572,24 @@ static int get_epic_descriptor(struct edgeport_serial *ep)
492 int result; 572 int result;
493 struct usb_serial *serial = ep->serial; 573 struct usb_serial *serial = ep->serial;
494 struct edgeport_product_info *product_info = &ep->product_info; 574 struct edgeport_product_info *product_info = &ep->product_info;
495 struct edge_compatibility_descriptor *epic = &ep->epic_descriptor; 575 struct edge_compatibility_descriptor *epic;
496 struct edge_compatibility_bits *bits; 576 struct edge_compatibility_bits *bits;
497 struct device *dev = &serial->dev->dev; 577 struct device *dev = &serial->dev->dev;
498 578
499 ep->is_epic = 0; 579 ep->is_epic = 0;
580
581 epic = kmalloc(sizeof(*epic), GFP_KERNEL);
582 if (!epic)
583 return -ENOMEM;
584
500 result = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0), 585 result = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0),
501 USB_REQUEST_ION_GET_EPIC_DESC, 586 USB_REQUEST_ION_GET_EPIC_DESC,
502 0xC0, 0x00, 0x00, 587 0xC0, 0x00, 0x00,
503 &ep->epic_descriptor, 588 epic, sizeof(*epic),
504 sizeof(struct edge_compatibility_descriptor),
505 300); 589 300);
506 590 if (result == sizeof(*epic)) {
507 if (result > 0) {
508 ep->is_epic = 1; 591 ep->is_epic = 1;
592 memcpy(&ep->epic_descriptor, epic, sizeof(*epic));
509 memset(product_info, 0, sizeof(struct edgeport_product_info)); 593 memset(product_info, 0, sizeof(struct edgeport_product_info));
510 594
511 product_info->NumPorts = epic->NumPorts; 595 product_info->NumPorts = epic->NumPorts;
@@ -534,8 +618,16 @@ static int get_epic_descriptor(struct edgeport_serial *ep)
534 dev_dbg(dev, " IOSPWriteLCR : %s\n", bits->IOSPWriteLCR ? "TRUE": "FALSE"); 618 dev_dbg(dev, " IOSPWriteLCR : %s\n", bits->IOSPWriteLCR ? "TRUE": "FALSE");
535 dev_dbg(dev, " IOSPSetBaudRate : %s\n", bits->IOSPSetBaudRate ? "TRUE": "FALSE"); 619 dev_dbg(dev, " IOSPSetBaudRate : %s\n", bits->IOSPSetBaudRate ? "TRUE": "FALSE");
536 dev_dbg(dev, " TrueEdgeport : %s\n", bits->TrueEdgeport ? "TRUE": "FALSE"); 620 dev_dbg(dev, " TrueEdgeport : %s\n", bits->TrueEdgeport ? "TRUE": "FALSE");
621
622 result = 0;
623 } else if (result >= 0) {
624 dev_warn(&serial->interface->dev, "short epic descriptor received: %d\n",
625 result);
626 result = -EIO;
537 } 627 }
538 628
629 kfree(epic);
630
539 return result; 631 return result;
540} 632}
541 633
@@ -1560,7 +1652,6 @@ static int get_serial_info(struct edgeport_port *edge_port,
1560 tmp.line = edge_port->port->minor; 1652 tmp.line = edge_port->port->minor;
1561 tmp.port = edge_port->port->port_number; 1653 tmp.port = edge_port->port->port_number;
1562 tmp.irq = 0; 1654 tmp.irq = 0;
1563 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
1564 tmp.xmit_fifo_size = edge_port->maxTxCredits; 1655 tmp.xmit_fifo_size = edge_port->maxTxCredits;
1565 tmp.baud_base = 9600; 1656 tmp.baud_base = 9600;
1566 tmp.close_delay = 5*HZ; 1657 tmp.close_delay = 5*HZ;
@@ -2090,8 +2181,7 @@ static int rom_write(struct usb_serial *serial, __u16 extAddr, __u16 addr,
2090 * rom_read 2181 * rom_read
2091 * reads a number of bytes from the Edgeport device starting at the given 2182 * reads a number of bytes from the Edgeport device starting at the given
2092 * address. 2183 * address.
2093 * If successful returns the number of bytes read, otherwise it returns 2184 * Returns zero on success or a negative error number.
2094 * a negative error number of the problem.
2095 ****************************************************************************/ 2185 ****************************************************************************/
2096static int rom_read(struct usb_serial *serial, __u16 extAddr, 2186static int rom_read(struct usb_serial *serial, __u16 extAddr,
2097 __u16 addr, __u16 length, __u8 *data) 2187 __u16 addr, __u16 length, __u8 *data)
@@ -2116,12 +2206,17 @@ static int rom_read(struct usb_serial *serial, __u16 extAddr,
2116 USB_REQUEST_ION_READ_ROM, 2206 USB_REQUEST_ION_READ_ROM,
2117 0xC0, addr, extAddr, transfer_buffer, 2207 0xC0, addr, extAddr, transfer_buffer,
2118 current_length, 300); 2208 current_length, 300);
2119 if (result < 0) 2209 if (result < current_length) {
2210 if (result >= 0)
2211 result = -EIO;
2120 break; 2212 break;
2213 }
2121 memcpy(data, transfer_buffer, current_length); 2214 memcpy(data, transfer_buffer, current_length);
2122 length -= current_length; 2215 length -= current_length;
2123 addr += current_length; 2216 addr += current_length;
2124 data += current_length; 2217 data += current_length;
2218
2219 result = 0;
2125 } 2220 }
2126 2221
2127 kfree(transfer_buffer); 2222 kfree(transfer_buffer);
@@ -2575,9 +2670,10 @@ static void get_manufacturing_desc(struct edgeport_serial *edge_serial)
2575 EDGE_MANUF_DESC_LEN, 2670 EDGE_MANUF_DESC_LEN,
2576 (__u8 *)(&edge_serial->manuf_descriptor)); 2671 (__u8 *)(&edge_serial->manuf_descriptor));
2577 2672
2578 if (response < 1) 2673 if (response < 0) {
2579 dev_err(dev, "error in getting manufacturer descriptor\n"); 2674 dev_err(dev, "error in getting manufacturer descriptor: %d\n",
2580 else { 2675 response);
2676 } else {
2581 char string[30]; 2677 char string[30];
2582 dev_dbg(dev, "**Manufacturer Descriptor\n"); 2678 dev_dbg(dev, "**Manufacturer Descriptor\n");
2583 dev_dbg(dev, " RomSize: %dK\n", 2679 dev_dbg(dev, " RomSize: %dK\n",
@@ -2634,9 +2730,10 @@ static void get_boot_desc(struct edgeport_serial *edge_serial)
2634 EDGE_BOOT_DESC_LEN, 2730 EDGE_BOOT_DESC_LEN,
2635 (__u8 *)(&edge_serial->boot_descriptor)); 2731 (__u8 *)(&edge_serial->boot_descriptor));
2636 2732
2637 if (response < 1) 2733 if (response < 0) {
2638 dev_err(dev, "error in getting boot descriptor\n"); 2734 dev_err(dev, "error in getting boot descriptor: %d\n",
2639 else { 2735 response);
2736 } else {
2640 dev_dbg(dev, "**Boot Descriptor:\n"); 2737 dev_dbg(dev, "**Boot Descriptor:\n");
2641 dev_dbg(dev, " BootCodeLength: %d\n", 2738 dev_dbg(dev, " BootCodeLength: %d\n",
2642 le16_to_cpu(edge_serial->boot_descriptor.BootCodeLength)); 2739 le16_to_cpu(edge_serial->boot_descriptor.BootCodeLength));
@@ -2779,7 +2876,7 @@ static int edge_startup(struct usb_serial *serial)
2779 dev_info(&serial->dev->dev, "%s detected\n", edge_serial->name); 2876 dev_info(&serial->dev->dev, "%s detected\n", edge_serial->name);
2780 2877
2781 /* Read the epic descriptor */ 2878 /* Read the epic descriptor */
2782 if (get_epic_descriptor(edge_serial) <= 0) { 2879 if (get_epic_descriptor(edge_serial) < 0) {
2783 /* memcpy descriptor to Supports structures */ 2880 /* memcpy descriptor to Supports structures */
2784 memcpy(&edge_serial->epic_descriptor.Supports, descriptor, 2881 memcpy(&edge_serial->epic_descriptor.Supports, descriptor,
2785 sizeof(struct edge_compatibility_bits)); 2882 sizeof(struct edge_compatibility_bits));
@@ -3015,6 +3112,139 @@ static int edge_port_remove(struct usb_serial_port *port)
3015 return 0; 3112 return 0;
3016} 3113}
3017 3114
3115static struct usb_serial_driver edgeport_2port_device = {
3116 .driver = {
3117 .owner = THIS_MODULE,
3118 .name = "edgeport_2",
3119 },
3120 .description = "Edgeport 2 port adapter",
3121 .id_table = edgeport_2port_id_table,
3122 .num_ports = 2,
3123 .open = edge_open,
3124 .close = edge_close,
3125 .throttle = edge_throttle,
3126 .unthrottle = edge_unthrottle,
3127 .attach = edge_startup,
3128 .disconnect = edge_disconnect,
3129 .release = edge_release,
3130 .port_probe = edge_port_probe,
3131 .port_remove = edge_port_remove,
3132 .ioctl = edge_ioctl,
3133 .set_termios = edge_set_termios,
3134 .tiocmget = edge_tiocmget,
3135 .tiocmset = edge_tiocmset,
3136 .tiocmiwait = usb_serial_generic_tiocmiwait,
3137 .get_icount = usb_serial_generic_get_icount,
3138 .write = edge_write,
3139 .write_room = edge_write_room,
3140 .chars_in_buffer = edge_chars_in_buffer,
3141 .break_ctl = edge_break,
3142 .read_int_callback = edge_interrupt_callback,
3143 .read_bulk_callback = edge_bulk_in_callback,
3144 .write_bulk_callback = edge_bulk_out_data_callback,
3145};
3146
3147static struct usb_serial_driver edgeport_4port_device = {
3148 .driver = {
3149 .owner = THIS_MODULE,
3150 .name = "edgeport_4",
3151 },
3152 .description = "Edgeport 4 port adapter",
3153 .id_table = edgeport_4port_id_table,
3154 .num_ports = 4,
3155 .open = edge_open,
3156 .close = edge_close,
3157 .throttle = edge_throttle,
3158 .unthrottle = edge_unthrottle,
3159 .attach = edge_startup,
3160 .disconnect = edge_disconnect,
3161 .release = edge_release,
3162 .port_probe = edge_port_probe,
3163 .port_remove = edge_port_remove,
3164 .ioctl = edge_ioctl,
3165 .set_termios = edge_set_termios,
3166 .tiocmget = edge_tiocmget,
3167 .tiocmset = edge_tiocmset,
3168 .tiocmiwait = usb_serial_generic_tiocmiwait,
3169 .get_icount = usb_serial_generic_get_icount,
3170 .write = edge_write,
3171 .write_room = edge_write_room,
3172 .chars_in_buffer = edge_chars_in_buffer,
3173 .break_ctl = edge_break,
3174 .read_int_callback = edge_interrupt_callback,
3175 .read_bulk_callback = edge_bulk_in_callback,
3176 .write_bulk_callback = edge_bulk_out_data_callback,
3177};
3178
3179static struct usb_serial_driver edgeport_8port_device = {
3180 .driver = {
3181 .owner = THIS_MODULE,
3182 .name = "edgeport_8",
3183 },
3184 .description = "Edgeport 8 port adapter",
3185 .id_table = edgeport_8port_id_table,
3186 .num_ports = 8,
3187 .open = edge_open,
3188 .close = edge_close,
3189 .throttle = edge_throttle,
3190 .unthrottle = edge_unthrottle,
3191 .attach = edge_startup,
3192 .disconnect = edge_disconnect,
3193 .release = edge_release,
3194 .port_probe = edge_port_probe,
3195 .port_remove = edge_port_remove,
3196 .ioctl = edge_ioctl,
3197 .set_termios = edge_set_termios,
3198 .tiocmget = edge_tiocmget,
3199 .tiocmset = edge_tiocmset,
3200 .tiocmiwait = usb_serial_generic_tiocmiwait,
3201 .get_icount = usb_serial_generic_get_icount,
3202 .write = edge_write,
3203 .write_room = edge_write_room,
3204 .chars_in_buffer = edge_chars_in_buffer,
3205 .break_ctl = edge_break,
3206 .read_int_callback = edge_interrupt_callback,
3207 .read_bulk_callback = edge_bulk_in_callback,
3208 .write_bulk_callback = edge_bulk_out_data_callback,
3209};
3210
3211static struct usb_serial_driver epic_device = {
3212 .driver = {
3213 .owner = THIS_MODULE,
3214 .name = "epic",
3215 },
3216 .description = "EPiC device",
3217 .id_table = Epic_port_id_table,
3218 .num_ports = 1,
3219 .open = edge_open,
3220 .close = edge_close,
3221 .throttle = edge_throttle,
3222 .unthrottle = edge_unthrottle,
3223 .attach = edge_startup,
3224 .disconnect = edge_disconnect,
3225 .release = edge_release,
3226 .port_probe = edge_port_probe,
3227 .port_remove = edge_port_remove,
3228 .ioctl = edge_ioctl,
3229 .set_termios = edge_set_termios,
3230 .tiocmget = edge_tiocmget,
3231 .tiocmset = edge_tiocmset,
3232 .tiocmiwait = usb_serial_generic_tiocmiwait,
3233 .get_icount = usb_serial_generic_get_icount,
3234 .write = edge_write,
3235 .write_room = edge_write_room,
3236 .chars_in_buffer = edge_chars_in_buffer,
3237 .break_ctl = edge_break,
3238 .read_int_callback = edge_interrupt_callback,
3239 .read_bulk_callback = edge_bulk_in_callback,
3240 .write_bulk_callback = edge_bulk_out_data_callback,
3241};
3242
3243static struct usb_serial_driver * const serial_drivers[] = {
3244 &edgeport_2port_device, &edgeport_4port_device,
3245 &edgeport_8port_device, &epic_device, NULL
3246};
3247
3018module_usb_serial_driver(serial_drivers, id_table_combined); 3248module_usb_serial_driver(serial_drivers, id_table_combined);
3019 3249
3020MODULE_AUTHOR(DRIVER_AUTHOR); 3250MODULE_AUTHOR(DRIVER_AUTHOR);
diff --git a/drivers/usb/serial/io_tables.h b/drivers/usb/serial/io_tables.h
deleted file mode 100644
index ae5fac5656c9..000000000000
--- a/drivers/usb/serial/io_tables.h
+++ /dev/null
@@ -1,232 +0,0 @@
1/*
2 * IO Edgeport Driver tables
3 *
4 * Copyright (C) 2001
5 * Greg Kroah-Hartman (greg@kroah.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13
14#ifndef IO_TABLES_H
15#define IO_TABLES_H
16
17static const struct usb_device_id edgeport_2port_id_table[] = {
18 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2) },
19 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2I) },
20 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_421) },
21 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_21) },
22 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2_DIN) },
23 { }
24};
25
26static const struct usb_device_id edgeport_4port_id_table[] = {
27 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4) },
28 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_RAPIDPORT_4) },
29 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4T) },
30 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_MT4X56USB) },
31 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4I) },
32 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU) },
33 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4_DIN) },
34 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_22I) },
35 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_4) },
36 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_COMPATIBLE) },
37 { }
38};
39
40static const struct usb_device_id edgeport_8port_id_table[] = {
41 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8) },
42 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_16_DUAL_CPU) },
43 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8I) },
44 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8R) },
45 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8RR) },
46 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_8) },
47 { }
48};
49
50static const struct usb_device_id Epic_port_id_table[] = {
51 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0202) },
52 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0203) },
53 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0310) },
54 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0311) },
55 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0312) },
56 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A758) },
57 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A794) },
58 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A225) },
59 { }
60};
61
62/* Devices that this driver supports */
63static const struct usb_device_id id_table_combined[] = {
64 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4) },
65 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_RAPIDPORT_4) },
66 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4T) },
67 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_MT4X56USB) },
68 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2) },
69 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4I) },
70 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2I) },
71 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_421) },
72 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_21) },
73 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU) },
74 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8) },
75 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_2_DIN) },
76 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_4_DIN) },
77 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_16_DUAL_CPU) },
78 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_22I) },
79 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_4) },
80 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_COMPATIBLE) },
81 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8I) },
82 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8R) },
83 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_8RR) },
84 { USB_DEVICE(USB_VENDOR_ID_ION, ION_DEVICE_ID_EDGEPORT_412_8) },
85 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0202) },
86 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0203) },
87 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0310) },
88 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0311) },
89 { USB_DEVICE(USB_VENDOR_ID_NCR, NCR_DEVICE_ID_EPIC_0312) },
90 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A758) },
91 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A794) },
92 { USB_DEVICE(USB_VENDOR_ID_AXIOHM, AXIOHM_DEVICE_ID_EPIC_A225) },
93 { } /* Terminating entry */
94};
95
96MODULE_DEVICE_TABLE(usb, id_table_combined);
97
98static struct usb_serial_driver edgeport_2port_device = {
99 .driver = {
100 .owner = THIS_MODULE,
101 .name = "edgeport_2",
102 },
103 .description = "Edgeport 2 port adapter",
104 .id_table = edgeport_2port_id_table,
105 .num_ports = 2,
106 .open = edge_open,
107 .close = edge_close,
108 .throttle = edge_throttle,
109 .unthrottle = edge_unthrottle,
110 .attach = edge_startup,
111 .disconnect = edge_disconnect,
112 .release = edge_release,
113 .port_probe = edge_port_probe,
114 .port_remove = edge_port_remove,
115 .ioctl = edge_ioctl,
116 .set_termios = edge_set_termios,
117 .tiocmget = edge_tiocmget,
118 .tiocmset = edge_tiocmset,
119 .tiocmiwait = usb_serial_generic_tiocmiwait,
120 .get_icount = usb_serial_generic_get_icount,
121 .write = edge_write,
122 .write_room = edge_write_room,
123 .chars_in_buffer = edge_chars_in_buffer,
124 .break_ctl = edge_break,
125 .read_int_callback = edge_interrupt_callback,
126 .read_bulk_callback = edge_bulk_in_callback,
127 .write_bulk_callback = edge_bulk_out_data_callback,
128};
129
130static struct usb_serial_driver edgeport_4port_device = {
131 .driver = {
132 .owner = THIS_MODULE,
133 .name = "edgeport_4",
134 },
135 .description = "Edgeport 4 port adapter",
136 .id_table = edgeport_4port_id_table,
137 .num_ports = 4,
138 .open = edge_open,
139 .close = edge_close,
140 .throttle = edge_throttle,
141 .unthrottle = edge_unthrottle,
142 .attach = edge_startup,
143 .disconnect = edge_disconnect,
144 .release = edge_release,
145 .port_probe = edge_port_probe,
146 .port_remove = edge_port_remove,
147 .ioctl = edge_ioctl,
148 .set_termios = edge_set_termios,
149 .tiocmget = edge_tiocmget,
150 .tiocmset = edge_tiocmset,
151 .tiocmiwait = usb_serial_generic_tiocmiwait,
152 .get_icount = usb_serial_generic_get_icount,
153 .write = edge_write,
154 .write_room = edge_write_room,
155 .chars_in_buffer = edge_chars_in_buffer,
156 .break_ctl = edge_break,
157 .read_int_callback = edge_interrupt_callback,
158 .read_bulk_callback = edge_bulk_in_callback,
159 .write_bulk_callback = edge_bulk_out_data_callback,
160};
161
162static struct usb_serial_driver edgeport_8port_device = {
163 .driver = {
164 .owner = THIS_MODULE,
165 .name = "edgeport_8",
166 },
167 .description = "Edgeport 8 port adapter",
168 .id_table = edgeport_8port_id_table,
169 .num_ports = 8,
170 .open = edge_open,
171 .close = edge_close,
172 .throttle = edge_throttle,
173 .unthrottle = edge_unthrottle,
174 .attach = edge_startup,
175 .disconnect = edge_disconnect,
176 .release = edge_release,
177 .port_probe = edge_port_probe,
178 .port_remove = edge_port_remove,
179 .ioctl = edge_ioctl,
180 .set_termios = edge_set_termios,
181 .tiocmget = edge_tiocmget,
182 .tiocmset = edge_tiocmset,
183 .tiocmiwait = usb_serial_generic_tiocmiwait,
184 .get_icount = usb_serial_generic_get_icount,
185 .write = edge_write,
186 .write_room = edge_write_room,
187 .chars_in_buffer = edge_chars_in_buffer,
188 .break_ctl = edge_break,
189 .read_int_callback = edge_interrupt_callback,
190 .read_bulk_callback = edge_bulk_in_callback,
191 .write_bulk_callback = edge_bulk_out_data_callback,
192};
193
194static struct usb_serial_driver epic_device = {
195 .driver = {
196 .owner = THIS_MODULE,
197 .name = "epic",
198 },
199 .description = "EPiC device",
200 .id_table = Epic_port_id_table,
201 .num_ports = 1,
202 .open = edge_open,
203 .close = edge_close,
204 .throttle = edge_throttle,
205 .unthrottle = edge_unthrottle,
206 .attach = edge_startup,
207 .disconnect = edge_disconnect,
208 .release = edge_release,
209 .port_probe = edge_port_probe,
210 .port_remove = edge_port_remove,
211 .ioctl = edge_ioctl,
212 .set_termios = edge_set_termios,
213 .tiocmget = edge_tiocmget,
214 .tiocmset = edge_tiocmset,
215 .tiocmiwait = usb_serial_generic_tiocmiwait,
216 .get_icount = usb_serial_generic_get_icount,
217 .write = edge_write,
218 .write_room = edge_write_room,
219 .chars_in_buffer = edge_chars_in_buffer,
220 .break_ctl = edge_break,
221 .read_int_callback = edge_interrupt_callback,
222 .read_bulk_callback = edge_bulk_in_callback,
223 .write_bulk_callback = edge_bulk_out_data_callback,
224};
225
226static struct usb_serial_driver * const serial_drivers[] = {
227 &edgeport_2port_device, &edgeport_4port_device,
228 &edgeport_8port_device, &epic_device, NULL
229};
230
231#endif
232
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
index 9a0db2965fbb..ceaeebaa6f90 100644
--- a/drivers/usb/serial/io_ti.c
+++ b/drivers/usb/serial/io_ti.c
@@ -2468,7 +2468,6 @@ static int get_serial_info(struct edgeport_port *edge_port,
2468 tmp.line = edge_port->port->minor; 2468 tmp.line = edge_port->port->minor;
2469 tmp.port = edge_port->port->port_number; 2469 tmp.port = edge_port->port->port_number;
2470 tmp.irq = 0; 2470 tmp.irq = 0;
2471 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
2472 tmp.xmit_fifo_size = edge_port->port->bulk_out_size; 2471 tmp.xmit_fifo_size = edge_port->port->bulk_out_size;
2473 tmp.baud_base = 9600; 2472 tmp.baud_base = 9600;
2474 tmp.close_delay = 5*HZ; 2473 tmp.close_delay = 5*HZ;
diff --git a/drivers/usb/serial/iuu_phoenix.c b/drivers/usb/serial/iuu_phoenix.c
index d57fb5199218..030390f37b0a 100644
--- a/drivers/usb/serial/iuu_phoenix.c
+++ b/drivers/usb/serial/iuu_phoenix.c
@@ -976,7 +976,6 @@ static int iuu_open(struct tty_struct *tty, struct usb_serial_port *port)
976{ 976{
977 struct usb_serial *serial = port->serial; 977 struct usb_serial *serial = port->serial;
978 struct device *dev = &port->dev; 978 struct device *dev = &port->dev;
979 u8 *buf;
980 int result; 979 int result;
981 int baud; 980 int baud;
982 u32 actual; 981 u32 actual;
@@ -991,20 +990,8 @@ static int iuu_open(struct tty_struct *tty, struct usb_serial_port *port)
991 usb_clear_halt(serial->dev, port->write_urb->pipe); 990 usb_clear_halt(serial->dev, port->write_urb->pipe);
992 usb_clear_halt(serial->dev, port->read_urb->pipe); 991 usb_clear_halt(serial->dev, port->read_urb->pipe);
993 992
994 buf = kmalloc(10, GFP_KERNEL);
995 if (buf == NULL)
996 return -ENOMEM;
997
998 priv->poll = 0; 993 priv->poll = 0;
999 994
1000 /* initialize writebuf */
1001#define FISH(a, b, c, d) do { \
1002 result = usb_control_msg(port->serial->dev, \
1003 usb_rcvctrlpipe(port->serial->dev, 0), \
1004 b, a, c, d, buf, 1, 1000); \
1005 dev_dbg(dev, "0x%x:0x%x:0x%x:0x%x %d - %x\n", a, b, c, d, result, \
1006 buf[0]); } while (0);
1007
1008#define SOUP(a, b, c, d) do { \ 995#define SOUP(a, b, c, d) do { \
1009 result = usb_control_msg(port->serial->dev, \ 996 result = usb_control_msg(port->serial->dev, \
1010 usb_sndctrlpipe(port->serial->dev, 0), \ 997 usb_sndctrlpipe(port->serial->dev, 0), \
@@ -1017,7 +1004,7 @@ static int iuu_open(struct tty_struct *tty, struct usb_serial_port *port)
1017 /* sprintf(buf ,"%c%c%c%c",0x03,0x02,0x02,0x0); */ 1004 /* sprintf(buf ,"%c%c%c%c",0x03,0x02,0x02,0x0); */
1018 1005
1019 SOUP(0x03, 0x02, 0x02, 0x0); 1006 SOUP(0x03, 0x02, 0x02, 0x0);
1020 kfree(buf); 1007
1021 iuu_led(port, 0xF000, 0xF000, 0, 0xFF); 1008 iuu_led(port, 0xF000, 0xF000, 0, 0xFF);
1022 iuu_uart_on(port); 1009 iuu_uart_on(port);
1023 if (boost < 100) 1010 if (boost < 100)
diff --git a/drivers/usb/serial/keyspan.c b/drivers/usb/serial/keyspan.c
index 1f9414bdd649..5662d324edd2 100644
--- a/drivers/usb/serial/keyspan.c
+++ b/drivers/usb/serial/keyspan.c
@@ -41,11 +41,508 @@
41#include <linux/usb.h> 41#include <linux/usb.h>
42#include <linux/usb/serial.h> 42#include <linux/usb/serial.h>
43#include <linux/usb/ezusb.h> 43#include <linux/usb/ezusb.h>
44#include "keyspan.h"
45 44
46#define DRIVER_AUTHOR "Hugh Blemings <hugh@misc.nu" 45#define DRIVER_AUTHOR "Hugh Blemings <hugh@misc.nu"
47#define DRIVER_DESC "Keyspan USB to Serial Converter Driver" 46#define DRIVER_DESC "Keyspan USB to Serial Converter Driver"
48 47
48/* Function prototypes for Keyspan serial converter */
49static int keyspan_open(struct tty_struct *tty, struct usb_serial_port *port);
50static void keyspan_close(struct usb_serial_port *port);
51static void keyspan_dtr_rts(struct usb_serial_port *port, int on);
52static int keyspan_startup(struct usb_serial *serial);
53static void keyspan_disconnect(struct usb_serial *serial);
54static void keyspan_release(struct usb_serial *serial);
55static int keyspan_port_probe(struct usb_serial_port *port);
56static int keyspan_port_remove(struct usb_serial_port *port);
57static int keyspan_write_room(struct tty_struct *tty);
58static int keyspan_write(struct tty_struct *tty, struct usb_serial_port *port,
59 const unsigned char *buf, int count);
60static void keyspan_send_setup(struct usb_serial_port *port, int reset_port);
61static void keyspan_set_termios(struct tty_struct *tty,
62 struct usb_serial_port *port,
63 struct ktermios *old);
64static void keyspan_break_ctl(struct tty_struct *tty, int break_state);
65static int keyspan_tiocmget(struct tty_struct *tty);
66static int keyspan_tiocmset(struct tty_struct *tty, unsigned int set,
67 unsigned int clear);
68static int keyspan_fake_startup(struct usb_serial *serial);
69
70static int keyspan_usa19_calc_baud(struct usb_serial_port *port,
71 u32 baud_rate, u32 baudclk,
72 u8 *rate_hi, u8 *rate_low,
73 u8 *prescaler, int portnum);
74static int keyspan_usa19w_calc_baud(struct usb_serial_port *port,
75 u32 baud_rate, u32 baudclk,
76 u8 *rate_hi, u8 *rate_low,
77 u8 *prescaler, int portnum);
78static int keyspan_usa28_calc_baud(struct usb_serial_port *port,
79 u32 baud_rate, u32 baudclk,
80 u8 *rate_hi, u8 *rate_low,
81 u8 *prescaler, int portnum);
82static int keyspan_usa19hs_calc_baud(struct usb_serial_port *port,
83 u32 baud_rate, u32 baudclk,
84 u8 *rate_hi, u8 *rate_low,
85 u8 *prescaler, int portnum);
86
87static int keyspan_usa28_send_setup(struct usb_serial *serial,
88 struct usb_serial_port *port,
89 int reset_port);
90static int keyspan_usa26_send_setup(struct usb_serial *serial,
91 struct usb_serial_port *port,
92 int reset_port);
93static int keyspan_usa49_send_setup(struct usb_serial *serial,
94 struct usb_serial_port *port,
95 int reset_port);
96static int keyspan_usa90_send_setup(struct usb_serial *serial,
97 struct usb_serial_port *port,
98 int reset_port);
99static int keyspan_usa67_send_setup(struct usb_serial *serial,
100 struct usb_serial_port *port,
101 int reset_port);
102
103/* Values used for baud rate calculation - device specific */
104#define KEYSPAN_INVALID_BAUD_RATE (-1)
105#define KEYSPAN_BAUD_RATE_OK (0)
106#define KEYSPAN_USA18X_BAUDCLK (12000000L) /* a guess */
107#define KEYSPAN_USA19_BAUDCLK (12000000L)
108#define KEYSPAN_USA19W_BAUDCLK (24000000L)
109#define KEYSPAN_USA19HS_BAUDCLK (14769231L)
110#define KEYSPAN_USA28_BAUDCLK (1843200L)
111#define KEYSPAN_USA28X_BAUDCLK (12000000L)
112#define KEYSPAN_USA49W_BAUDCLK (48000000L)
113
114/* Some constants used to characterise each device. */
115#define KEYSPAN_MAX_NUM_PORTS (4)
116#define KEYSPAN_MAX_FLIPS (2)
117
118/*
119 * Device info for the Keyspan serial converter, used by the overall
120 * usb-serial probe function.
121 */
122#define KEYSPAN_VENDOR_ID (0x06cd)
123
124/* Product IDs for the products supported, pre-renumeration */
125#define keyspan_usa18x_pre_product_id 0x0105
126#define keyspan_usa19_pre_product_id 0x0103
127#define keyspan_usa19qi_pre_product_id 0x010b
128#define keyspan_mpr_pre_product_id 0x011b
129#define keyspan_usa19qw_pre_product_id 0x0118
130#define keyspan_usa19w_pre_product_id 0x0106
131#define keyspan_usa28_pre_product_id 0x0101
132#define keyspan_usa28x_pre_product_id 0x0102
133#define keyspan_usa28xa_pre_product_id 0x0114
134#define keyspan_usa28xb_pre_product_id 0x0113
135#define keyspan_usa49w_pre_product_id 0x0109
136#define keyspan_usa49wlc_pre_product_id 0x011a
137
138/*
139 * Product IDs post-renumeration. Note that the 28x and 28xb have the same
140 * id's post-renumeration but behave identically so it's not an issue. As
141 * such, the 28xb is not listed in any of the device tables.
142 */
143#define keyspan_usa18x_product_id 0x0112
144#define keyspan_usa19_product_id 0x0107
145#define keyspan_usa19qi_product_id 0x010c
146#define keyspan_usa19hs_product_id 0x0121
147#define keyspan_mpr_product_id 0x011c
148#define keyspan_usa19qw_product_id 0x0119
149#define keyspan_usa19w_product_id 0x0108
150#define keyspan_usa28_product_id 0x010f
151#define keyspan_usa28x_product_id 0x0110
152#define keyspan_usa28xa_product_id 0x0115
153#define keyspan_usa28xb_product_id 0x0110
154#define keyspan_usa28xg_product_id 0x0135
155#define keyspan_usa49w_product_id 0x010a
156#define keyspan_usa49wlc_product_id 0x012a
157#define keyspan_usa49wg_product_id 0x0131
158
159struct keyspan_device_details {
160 /* product ID value */
161 int product_id;
162
163 enum {msg_usa26, msg_usa28, msg_usa49, msg_usa90, msg_usa67} msg_format;
164
165 /* Number of physical ports */
166 int num_ports;
167
168 /* 1 if endpoint flipping used on input, 0 if not */
169 int indat_endp_flip;
170
171 /* 1 if endpoint flipping used on output, 0 if not */
172 int outdat_endp_flip;
173
174 /*
175 * Table mapping input data endpoint IDs to physical port
176 * number and flip if used
177 */
178 int indat_endpoints[KEYSPAN_MAX_NUM_PORTS];
179
180 /* Same for output endpoints */
181 int outdat_endpoints[KEYSPAN_MAX_NUM_PORTS];
182
183 /* Input acknowledge endpoints */
184 int inack_endpoints[KEYSPAN_MAX_NUM_PORTS];
185
186 /* Output control endpoints */
187 int outcont_endpoints[KEYSPAN_MAX_NUM_PORTS];
188
189 /* Endpoint used for input status */
190 int instat_endpoint;
191
192 /* Endpoint used for input data 49WG only */
193 int indat_endpoint;
194
195 /* Endpoint used for global control functions */
196 int glocont_endpoint;
197
198 int (*calculate_baud_rate)(struct usb_serial_port *port,
199 u32 baud_rate, u32 baudclk,
200 u8 *rate_hi, u8 *rate_low, u8 *prescaler,
201 int portnum);
202 u32 baudclk;
203};
204
205/*
206 * Now for each device type we setup the device detail structure with the
207 * appropriate information (provided in Keyspan's documentation)
208 */
209
210static const struct keyspan_device_details usa18x_device_details = {
211 .product_id = keyspan_usa18x_product_id,
212 .msg_format = msg_usa26,
213 .num_ports = 1,
214 .indat_endp_flip = 0,
215 .outdat_endp_flip = 1,
216 .indat_endpoints = {0x81},
217 .outdat_endpoints = {0x01},
218 .inack_endpoints = {0x85},
219 .outcont_endpoints = {0x05},
220 .instat_endpoint = 0x87,
221 .indat_endpoint = -1,
222 .glocont_endpoint = 0x07,
223 .calculate_baud_rate = keyspan_usa19w_calc_baud,
224 .baudclk = KEYSPAN_USA18X_BAUDCLK,
225};
226
227static const struct keyspan_device_details usa19_device_details = {
228 .product_id = keyspan_usa19_product_id,
229 .msg_format = msg_usa28,
230 .num_ports = 1,
231 .indat_endp_flip = 1,
232 .outdat_endp_flip = 1,
233 .indat_endpoints = {0x81},
234 .outdat_endpoints = {0x01},
235 .inack_endpoints = {0x83},
236 .outcont_endpoints = {0x03},
237 .instat_endpoint = 0x84,
238 .indat_endpoint = -1,
239 .glocont_endpoint = -1,
240 .calculate_baud_rate = keyspan_usa19_calc_baud,
241 .baudclk = KEYSPAN_USA19_BAUDCLK,
242};
243
244static const struct keyspan_device_details usa19qi_device_details = {
245 .product_id = keyspan_usa19qi_product_id,
246 .msg_format = msg_usa28,
247 .num_ports = 1,
248 .indat_endp_flip = 1,
249 .outdat_endp_flip = 1,
250 .indat_endpoints = {0x81},
251 .outdat_endpoints = {0x01},
252 .inack_endpoints = {0x83},
253 .outcont_endpoints = {0x03},
254 .instat_endpoint = 0x84,
255 .indat_endpoint = -1,
256 .glocont_endpoint = -1,
257 .calculate_baud_rate = keyspan_usa28_calc_baud,
258 .baudclk = KEYSPAN_USA19_BAUDCLK,
259};
260
261static const struct keyspan_device_details mpr_device_details = {
262 .product_id = keyspan_mpr_product_id,
263 .msg_format = msg_usa28,
264 .num_ports = 1,
265 .indat_endp_flip = 1,
266 .outdat_endp_flip = 1,
267 .indat_endpoints = {0x81},
268 .outdat_endpoints = {0x01},
269 .inack_endpoints = {0x83},
270 .outcont_endpoints = {0x03},
271 .instat_endpoint = 0x84,
272 .indat_endpoint = -1,
273 .glocont_endpoint = -1,
274 .calculate_baud_rate = keyspan_usa28_calc_baud,
275 .baudclk = KEYSPAN_USA19_BAUDCLK,
276};
277
278static const struct keyspan_device_details usa19qw_device_details = {
279 .product_id = keyspan_usa19qw_product_id,
280 .msg_format = msg_usa26,
281 .num_ports = 1,
282 .indat_endp_flip = 0,
283 .outdat_endp_flip = 1,
284 .indat_endpoints = {0x81},
285 .outdat_endpoints = {0x01},
286 .inack_endpoints = {0x85},
287 .outcont_endpoints = {0x05},
288 .instat_endpoint = 0x87,
289 .indat_endpoint = -1,
290 .glocont_endpoint = 0x07,
291 .calculate_baud_rate = keyspan_usa19w_calc_baud,
292 .baudclk = KEYSPAN_USA19W_BAUDCLK,
293};
294
295static const struct keyspan_device_details usa19w_device_details = {
296 .product_id = keyspan_usa19w_product_id,
297 .msg_format = msg_usa26,
298 .num_ports = 1,
299 .indat_endp_flip = 0,
300 .outdat_endp_flip = 1,
301 .indat_endpoints = {0x81},
302 .outdat_endpoints = {0x01},
303 .inack_endpoints = {0x85},
304 .outcont_endpoints = {0x05},
305 .instat_endpoint = 0x87,
306 .indat_endpoint = -1,
307 .glocont_endpoint = 0x07,
308 .calculate_baud_rate = keyspan_usa19w_calc_baud,
309 .baudclk = KEYSPAN_USA19W_BAUDCLK,
310};
311
312static const struct keyspan_device_details usa19hs_device_details = {
313 .product_id = keyspan_usa19hs_product_id,
314 .msg_format = msg_usa90,
315 .num_ports = 1,
316 .indat_endp_flip = 0,
317 .outdat_endp_flip = 0,
318 .indat_endpoints = {0x81},
319 .outdat_endpoints = {0x01},
320 .inack_endpoints = {-1},
321 .outcont_endpoints = {0x02},
322 .instat_endpoint = 0x82,
323 .indat_endpoint = -1,
324 .glocont_endpoint = -1,
325 .calculate_baud_rate = keyspan_usa19hs_calc_baud,
326 .baudclk = KEYSPAN_USA19HS_BAUDCLK,
327};
328
329static const struct keyspan_device_details usa28_device_details = {
330 .product_id = keyspan_usa28_product_id,
331 .msg_format = msg_usa28,
332 .num_ports = 2,
333 .indat_endp_flip = 1,
334 .outdat_endp_flip = 1,
335 .indat_endpoints = {0x81, 0x83},
336 .outdat_endpoints = {0x01, 0x03},
337 .inack_endpoints = {0x85, 0x86},
338 .outcont_endpoints = {0x05, 0x06},
339 .instat_endpoint = 0x87,
340 .indat_endpoint = -1,
341 .glocont_endpoint = 0x07,
342 .calculate_baud_rate = keyspan_usa28_calc_baud,
343 .baudclk = KEYSPAN_USA28_BAUDCLK,
344};
345
346static const struct keyspan_device_details usa28x_device_details = {
347 .product_id = keyspan_usa28x_product_id,
348 .msg_format = msg_usa26,
349 .num_ports = 2,
350 .indat_endp_flip = 0,
351 .outdat_endp_flip = 1,
352 .indat_endpoints = {0x81, 0x83},
353 .outdat_endpoints = {0x01, 0x03},
354 .inack_endpoints = {0x85, 0x86},
355 .outcont_endpoints = {0x05, 0x06},
356 .instat_endpoint = 0x87,
357 .indat_endpoint = -1,
358 .glocont_endpoint = 0x07,
359 .calculate_baud_rate = keyspan_usa19w_calc_baud,
360 .baudclk = KEYSPAN_USA28X_BAUDCLK,
361};
362
363static const struct keyspan_device_details usa28xa_device_details = {
364 .product_id = keyspan_usa28xa_product_id,
365 .msg_format = msg_usa26,
366 .num_ports = 2,
367 .indat_endp_flip = 0,
368 .outdat_endp_flip = 1,
369 .indat_endpoints = {0x81, 0x83},
370 .outdat_endpoints = {0x01, 0x03},
371 .inack_endpoints = {0x85, 0x86},
372 .outcont_endpoints = {0x05, 0x06},
373 .instat_endpoint = 0x87,
374 .indat_endpoint = -1,
375 .glocont_endpoint = 0x07,
376 .calculate_baud_rate = keyspan_usa19w_calc_baud,
377 .baudclk = KEYSPAN_USA28X_BAUDCLK,
378};
379
380static const struct keyspan_device_details usa28xg_device_details = {
381 .product_id = keyspan_usa28xg_product_id,
382 .msg_format = msg_usa67,
383 .num_ports = 2,
384 .indat_endp_flip = 0,
385 .outdat_endp_flip = 0,
386 .indat_endpoints = {0x84, 0x88},
387 .outdat_endpoints = {0x02, 0x06},
388 .inack_endpoints = {-1, -1},
389 .outcont_endpoints = {-1, -1},
390 .instat_endpoint = 0x81,
391 .indat_endpoint = -1,
392 .glocont_endpoint = 0x01,
393 .calculate_baud_rate = keyspan_usa19w_calc_baud,
394 .baudclk = KEYSPAN_USA28X_BAUDCLK,
395};
396/*
397 * We don't need a separate entry for the usa28xb as it appears as a 28x
398 * anyway.
399 */
400
401static const struct keyspan_device_details usa49w_device_details = {
402 .product_id = keyspan_usa49w_product_id,
403 .msg_format = msg_usa49,
404 .num_ports = 4,
405 .indat_endp_flip = 0,
406 .outdat_endp_flip = 0,
407 .indat_endpoints = {0x81, 0x82, 0x83, 0x84},
408 .outdat_endpoints = {0x01, 0x02, 0x03, 0x04},
409 .inack_endpoints = {-1, -1, -1, -1},
410 .outcont_endpoints = {-1, -1, -1, -1},
411 .instat_endpoint = 0x87,
412 .indat_endpoint = -1,
413 .glocont_endpoint = 0x07,
414 .calculate_baud_rate = keyspan_usa19w_calc_baud,
415 .baudclk = KEYSPAN_USA49W_BAUDCLK,
416};
417
418static const struct keyspan_device_details usa49wlc_device_details = {
419 .product_id = keyspan_usa49wlc_product_id,
420 .msg_format = msg_usa49,
421 .num_ports = 4,
422 .indat_endp_flip = 0,
423 .outdat_endp_flip = 0,
424 .indat_endpoints = {0x81, 0x82, 0x83, 0x84},
425 .outdat_endpoints = {0x01, 0x02, 0x03, 0x04},
426 .inack_endpoints = {-1, -1, -1, -1},
427 .outcont_endpoints = {-1, -1, -1, -1},
428 .instat_endpoint = 0x87,
429 .indat_endpoint = -1,
430 .glocont_endpoint = 0x07,
431 .calculate_baud_rate = keyspan_usa19w_calc_baud,
432 .baudclk = KEYSPAN_USA19W_BAUDCLK,
433};
434
435static const struct keyspan_device_details usa49wg_device_details = {
436 .product_id = keyspan_usa49wg_product_id,
437 .msg_format = msg_usa49,
438 .num_ports = 4,
439 .indat_endp_flip = 0,
440 .outdat_endp_flip = 0,
441 .indat_endpoints = {-1, -1, -1, -1}, /* single 'global' data in EP */
442 .outdat_endpoints = {0x01, 0x02, 0x04, 0x06},
443 .inack_endpoints = {-1, -1, -1, -1},
444 .outcont_endpoints = {-1, -1, -1, -1},
445 .instat_endpoint = 0x81,
446 .indat_endpoint = 0x88,
447 .glocont_endpoint = 0x00, /* uses control EP */
448 .calculate_baud_rate = keyspan_usa19w_calc_baud,
449 .baudclk = KEYSPAN_USA19W_BAUDCLK,
450};
451
452static const struct keyspan_device_details *keyspan_devices[] = {
453 &usa18x_device_details,
454 &usa19_device_details,
455 &usa19qi_device_details,
456 &mpr_device_details,
457 &usa19qw_device_details,
458 &usa19w_device_details,
459 &usa19hs_device_details,
460 &usa28_device_details,
461 &usa28x_device_details,
462 &usa28xa_device_details,
463 &usa28xg_device_details,
464 /* 28xb not required as it renumerates as a 28x */
465 &usa49w_device_details,
466 &usa49wlc_device_details,
467 &usa49wg_device_details,
468 NULL,
469};
470
471static const struct usb_device_id keyspan_ids_combined[] = {
472 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_pre_product_id) },
473 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_pre_product_id) },
474 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_pre_product_id) },
475 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_pre_product_id) },
476 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_pre_product_id) },
477 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_pre_product_id) },
478 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_pre_product_id) },
479 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_pre_product_id) },
480 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_pre_product_id) },
481 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xb_pre_product_id) },
482 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_pre_product_id) },
483 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_pre_product_id) },
484 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_product_id) },
485 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_product_id) },
486 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_product_id) },
487 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_product_id) },
488 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_product_id) },
489 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19hs_product_id) },
490 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_product_id) },
491 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_product_id) },
492 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_product_id) },
493 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_product_id) },
494 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xg_product_id) },
495 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_product_id)},
496 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_product_id)},
497 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wg_product_id)},
498 { } /* Terminating entry */
499};
500
501MODULE_DEVICE_TABLE(usb, keyspan_ids_combined);
502
503/* usb_device_id table for the pre-firmware download keyspan devices */
504static const struct usb_device_id keyspan_pre_ids[] = {
505 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_pre_product_id) },
506 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_pre_product_id) },
507 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_pre_product_id) },
508 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_pre_product_id) },
509 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_pre_product_id) },
510 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_pre_product_id) },
511 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_pre_product_id) },
512 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_pre_product_id) },
513 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_pre_product_id) },
514 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xb_pre_product_id) },
515 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_pre_product_id) },
516 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_pre_product_id) },
517 { } /* Terminating entry */
518};
519
520static const struct usb_device_id keyspan_1port_ids[] = {
521 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_product_id) },
522 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_product_id) },
523 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_product_id) },
524 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_product_id) },
525 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_product_id) },
526 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19hs_product_id) },
527 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_product_id) },
528 { } /* Terminating entry */
529};
530
531static const struct usb_device_id keyspan_2port_ids[] = {
532 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_product_id) },
533 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_product_id) },
534 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_product_id) },
535 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xg_product_id) },
536 { } /* Terminating entry */
537};
538
539static const struct usb_device_id keyspan_4port_ids[] = {
540 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_product_id) },
541 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_product_id)},
542 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wg_product_id)},
543 { } /* Terminating entry */
544};
545
49#define INSTAT_BUFLEN 32 546#define INSTAT_BUFLEN 32
50#define GLOCONT_BUFLEN 64 547#define GLOCONT_BUFLEN 64
51#define INDAT49W_BUFLEN 512 548#define INDAT49W_BUFLEN 512
@@ -126,8 +623,6 @@ struct keyspan_port_private {
126#include "keyspan_usa67msg.h" 623#include "keyspan_usa67msg.h"
127 624
128 625
129module_usb_serial_driver(serial_drivers, keyspan_ids_combined);
130
131static void keyspan_break_ctl(struct tty_struct *tty, int break_state) 626static void keyspan_break_ctl(struct tty_struct *tty, int break_state)
132{ 627{
133 struct usb_serial_port *port = tty->driver_data; 628 struct usb_serial_port *port = tty->driver_data;
@@ -2523,6 +3018,97 @@ static int keyspan_port_remove(struct usb_serial_port *port)
2523 return 0; 3018 return 0;
2524} 3019}
2525 3020
3021/* Structs for the devices, pre and post renumeration. */
3022static struct usb_serial_driver keyspan_pre_device = {
3023 .driver = {
3024 .owner = THIS_MODULE,
3025 .name = "keyspan_no_firm",
3026 },
3027 .description = "Keyspan - (without firmware)",
3028 .id_table = keyspan_pre_ids,
3029 .num_ports = 1,
3030 .attach = keyspan_fake_startup,
3031};
3032
3033static struct usb_serial_driver keyspan_1port_device = {
3034 .driver = {
3035 .owner = THIS_MODULE,
3036 .name = "keyspan_1",
3037 },
3038 .description = "Keyspan 1 port adapter",
3039 .id_table = keyspan_1port_ids,
3040 .num_ports = 1,
3041 .open = keyspan_open,
3042 .close = keyspan_close,
3043 .dtr_rts = keyspan_dtr_rts,
3044 .write = keyspan_write,
3045 .write_room = keyspan_write_room,
3046 .set_termios = keyspan_set_termios,
3047 .break_ctl = keyspan_break_ctl,
3048 .tiocmget = keyspan_tiocmget,
3049 .tiocmset = keyspan_tiocmset,
3050 .attach = keyspan_startup,
3051 .disconnect = keyspan_disconnect,
3052 .release = keyspan_release,
3053 .port_probe = keyspan_port_probe,
3054 .port_remove = keyspan_port_remove,
3055};
3056
3057static struct usb_serial_driver keyspan_2port_device = {
3058 .driver = {
3059 .owner = THIS_MODULE,
3060 .name = "keyspan_2",
3061 },
3062 .description = "Keyspan 2 port adapter",
3063 .id_table = keyspan_2port_ids,
3064 .num_ports = 2,
3065 .open = keyspan_open,
3066 .close = keyspan_close,
3067 .dtr_rts = keyspan_dtr_rts,
3068 .write = keyspan_write,
3069 .write_room = keyspan_write_room,
3070 .set_termios = keyspan_set_termios,
3071 .break_ctl = keyspan_break_ctl,
3072 .tiocmget = keyspan_tiocmget,
3073 .tiocmset = keyspan_tiocmset,
3074 .attach = keyspan_startup,
3075 .disconnect = keyspan_disconnect,
3076 .release = keyspan_release,
3077 .port_probe = keyspan_port_probe,
3078 .port_remove = keyspan_port_remove,
3079};
3080
3081static struct usb_serial_driver keyspan_4port_device = {
3082 .driver = {
3083 .owner = THIS_MODULE,
3084 .name = "keyspan_4",
3085 },
3086 .description = "Keyspan 4 port adapter",
3087 .id_table = keyspan_4port_ids,
3088 .num_ports = 4,
3089 .open = keyspan_open,
3090 .close = keyspan_close,
3091 .dtr_rts = keyspan_dtr_rts,
3092 .write = keyspan_write,
3093 .write_room = keyspan_write_room,
3094 .set_termios = keyspan_set_termios,
3095 .break_ctl = keyspan_break_ctl,
3096 .tiocmget = keyspan_tiocmget,
3097 .tiocmset = keyspan_tiocmset,
3098 .attach = keyspan_startup,
3099 .disconnect = keyspan_disconnect,
3100 .release = keyspan_release,
3101 .port_probe = keyspan_port_probe,
3102 .port_remove = keyspan_port_remove,
3103};
3104
3105static struct usb_serial_driver * const serial_drivers[] = {
3106 &keyspan_pre_device, &keyspan_1port_device,
3107 &keyspan_2port_device, &keyspan_4port_device, NULL
3108};
3109
3110module_usb_serial_driver(serial_drivers, keyspan_ids_combined);
3111
2526MODULE_AUTHOR(DRIVER_AUTHOR); 3112MODULE_AUTHOR(DRIVER_AUTHOR);
2527MODULE_DESCRIPTION(DRIVER_DESC); 3113MODULE_DESCRIPTION(DRIVER_DESC);
2528MODULE_LICENSE("GPL"); 3114MODULE_LICENSE("GPL");
diff --git a/drivers/usb/serial/keyspan.h b/drivers/usb/serial/keyspan.h
deleted file mode 100644
index 0273dda303a4..000000000000
--- a/drivers/usb/serial/keyspan.h
+++ /dev/null
@@ -1,629 +0,0 @@
1/*
2 Keyspan USB to Serial Converter driver
3
4 (C) Copyright (C) 2000-2001
5 Hugh Blemings <hugh@blemings.org>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 See http://blemings.org/hugh/keyspan.html for more information.
13
14 Code in this driver inspired by and in a number of places taken
15 from Brian Warner's original Keyspan-PDA driver.
16
17 This driver has been put together with the support of Innosys, Inc.
18 and Keyspan, Inc the manufacturers of the Keyspan USB-serial products.
19 Thanks Guys :)
20
21 Thanks to Paulus for miscellaneous tidy ups, some largish chunks
22 of much nicer and/or completely new code and (perhaps most uniquely)
23 having the patience to sit down and explain why and where he'd changed
24 stuff.
25
26 Tip 'o the hat to IBM (and previously Linuxcare :) for supporting
27 staff in their work on open source projects.
28
29 See keyspan.c for update history.
30
31*/
32
33#ifndef __LINUX_USB_SERIAL_KEYSPAN_H
34#define __LINUX_USB_SERIAL_KEYSPAN_H
35
36
37/* Function prototypes for Keyspan serial converter */
38static int keyspan_open (struct tty_struct *tty,
39 struct usb_serial_port *port);
40static void keyspan_close (struct usb_serial_port *port);
41static void keyspan_dtr_rts (struct usb_serial_port *port, int on);
42static int keyspan_startup (struct usb_serial *serial);
43static void keyspan_disconnect (struct usb_serial *serial);
44static void keyspan_release (struct usb_serial *serial);
45static int keyspan_port_probe(struct usb_serial_port *port);
46static int keyspan_port_remove(struct usb_serial_port *port);
47static int keyspan_write_room (struct tty_struct *tty);
48
49static int keyspan_write (struct tty_struct *tty,
50 struct usb_serial_port *port,
51 const unsigned char *buf,
52 int count);
53
54static void keyspan_send_setup (struct usb_serial_port *port,
55 int reset_port);
56
57
58static void keyspan_set_termios (struct tty_struct *tty,
59 struct usb_serial_port *port,
60 struct ktermios *old);
61static void keyspan_break_ctl (struct tty_struct *tty,
62 int break_state);
63static int keyspan_tiocmget (struct tty_struct *tty);
64static int keyspan_tiocmset (struct tty_struct *tty,
65 unsigned int set,
66 unsigned int clear);
67static int keyspan_fake_startup (struct usb_serial *serial);
68
69static int keyspan_usa19_calc_baud (struct usb_serial_port *port,
70 u32 baud_rate, u32 baudclk,
71 u8 *rate_hi, u8 *rate_low,
72 u8 *prescaler, int portnum);
73
74static int keyspan_usa19w_calc_baud (struct usb_serial_port *port,
75 u32 baud_rate, u32 baudclk,
76 u8 *rate_hi, u8 *rate_low,
77 u8 *prescaler, int portnum);
78
79static int keyspan_usa28_calc_baud (struct usb_serial_port *port,
80 u32 baud_rate, u32 baudclk,
81 u8 *rate_hi, u8 *rate_low,
82 u8 *prescaler, int portnum);
83
84static int keyspan_usa19hs_calc_baud (struct usb_serial_port *port,
85 u32 baud_rate, u32 baudclk,
86 u8 *rate_hi, u8 *rate_low,
87 u8 *prescaler, int portnum);
88
89static int keyspan_usa28_send_setup (struct usb_serial *serial,
90 struct usb_serial_port *port,
91 int reset_port);
92static int keyspan_usa26_send_setup (struct usb_serial *serial,
93 struct usb_serial_port *port,
94 int reset_port);
95static int keyspan_usa49_send_setup (struct usb_serial *serial,
96 struct usb_serial_port *port,
97 int reset_port);
98
99static int keyspan_usa90_send_setup (struct usb_serial *serial,
100 struct usb_serial_port *port,
101 int reset_port);
102
103static int keyspan_usa67_send_setup (struct usb_serial *serial,
104 struct usb_serial_port *port,
105 int reset_port);
106
107/* Values used for baud rate calculation - device specific */
108#define KEYSPAN_INVALID_BAUD_RATE (-1)
109#define KEYSPAN_BAUD_RATE_OK (0)
110#define KEYSPAN_USA18X_BAUDCLK (12000000L) /* a guess */
111#define KEYSPAN_USA19_BAUDCLK (12000000L)
112#define KEYSPAN_USA19W_BAUDCLK (24000000L)
113#define KEYSPAN_USA19HS_BAUDCLK (14769231L)
114#define KEYSPAN_USA28_BAUDCLK (1843200L)
115#define KEYSPAN_USA28X_BAUDCLK (12000000L)
116#define KEYSPAN_USA49W_BAUDCLK (48000000L)
117
118/* Some constants used to characterise each device. */
119#define KEYSPAN_MAX_NUM_PORTS (4)
120#define KEYSPAN_MAX_FLIPS (2)
121
122/* Device info for the Keyspan serial converter, used
123 by the overall usb-serial probe function */
124#define KEYSPAN_VENDOR_ID (0x06cd)
125
126/* Product IDs for the products supported, pre-renumeration */
127#define keyspan_usa18x_pre_product_id 0x0105
128#define keyspan_usa19_pre_product_id 0x0103
129#define keyspan_usa19qi_pre_product_id 0x010b
130#define keyspan_mpr_pre_product_id 0x011b
131#define keyspan_usa19qw_pre_product_id 0x0118
132#define keyspan_usa19w_pre_product_id 0x0106
133#define keyspan_usa28_pre_product_id 0x0101
134#define keyspan_usa28x_pre_product_id 0x0102
135#define keyspan_usa28xa_pre_product_id 0x0114
136#define keyspan_usa28xb_pre_product_id 0x0113
137#define keyspan_usa49w_pre_product_id 0x0109
138#define keyspan_usa49wlc_pre_product_id 0x011a
139
140/* Product IDs post-renumeration. Note that the 28x and 28xb
141 have the same id's post-renumeration but behave identically
142 so it's not an issue. As such, the 28xb is not listed in any
143 of the device tables. */
144#define keyspan_usa18x_product_id 0x0112
145#define keyspan_usa19_product_id 0x0107
146#define keyspan_usa19qi_product_id 0x010c
147#define keyspan_usa19hs_product_id 0x0121
148#define keyspan_mpr_product_id 0x011c
149#define keyspan_usa19qw_product_id 0x0119
150#define keyspan_usa19w_product_id 0x0108
151#define keyspan_usa28_product_id 0x010f
152#define keyspan_usa28x_product_id 0x0110
153#define keyspan_usa28xa_product_id 0x0115
154#define keyspan_usa28xb_product_id 0x0110
155#define keyspan_usa28xg_product_id 0x0135
156#define keyspan_usa49w_product_id 0x010a
157#define keyspan_usa49wlc_product_id 0x012a
158#define keyspan_usa49wg_product_id 0x0131
159
160struct keyspan_device_details {
161 /* product ID value */
162 int product_id;
163
164 enum {msg_usa26, msg_usa28, msg_usa49, msg_usa90, msg_usa67} msg_format;
165
166 /* Number of physical ports */
167 int num_ports;
168
169 /* 1 if endpoint flipping used on input, 0 if not */
170 int indat_endp_flip;
171
172 /* 1 if endpoint flipping used on output, 0 if not */
173 int outdat_endp_flip;
174
175 /* Table mapping input data endpoint IDs to physical
176 port number and flip if used */
177 int indat_endpoints[KEYSPAN_MAX_NUM_PORTS];
178
179 /* Same for output endpoints */
180 int outdat_endpoints[KEYSPAN_MAX_NUM_PORTS];
181
182 /* Input acknowledge endpoints */
183 int inack_endpoints[KEYSPAN_MAX_NUM_PORTS];
184
185 /* Output control endpoints */
186 int outcont_endpoints[KEYSPAN_MAX_NUM_PORTS];
187
188 /* Endpoint used for input status */
189 int instat_endpoint;
190
191 /* Endpoint used for input data 49WG only */
192 int indat_endpoint;
193
194 /* Endpoint used for global control functions */
195 int glocont_endpoint;
196
197 int (*calculate_baud_rate) (struct usb_serial_port *port,
198 u32 baud_rate, u32 baudclk,
199 u8 *rate_hi, u8 *rate_low, u8 *prescaler, int portnum);
200 u32 baudclk;
201};
202
203/* Now for each device type we setup the device detail
204 structure with the appropriate information (provided
205 in Keyspan's documentation) */
206
207static const struct keyspan_device_details usa18x_device_details = {
208 .product_id = keyspan_usa18x_product_id,
209 .msg_format = msg_usa26,
210 .num_ports = 1,
211 .indat_endp_flip = 0,
212 .outdat_endp_flip = 1,
213 .indat_endpoints = {0x81},
214 .outdat_endpoints = {0x01},
215 .inack_endpoints = {0x85},
216 .outcont_endpoints = {0x05},
217 .instat_endpoint = 0x87,
218 .indat_endpoint = -1,
219 .glocont_endpoint = 0x07,
220 .calculate_baud_rate = keyspan_usa19w_calc_baud,
221 .baudclk = KEYSPAN_USA18X_BAUDCLK,
222};
223
224static const struct keyspan_device_details usa19_device_details = {
225 .product_id = keyspan_usa19_product_id,
226 .msg_format = msg_usa28,
227 .num_ports = 1,
228 .indat_endp_flip = 1,
229 .outdat_endp_flip = 1,
230 .indat_endpoints = {0x81},
231 .outdat_endpoints = {0x01},
232 .inack_endpoints = {0x83},
233 .outcont_endpoints = {0x03},
234 .instat_endpoint = 0x84,
235 .indat_endpoint = -1,
236 .glocont_endpoint = -1,
237 .calculate_baud_rate = keyspan_usa19_calc_baud,
238 .baudclk = KEYSPAN_USA19_BAUDCLK,
239};
240
241static const struct keyspan_device_details usa19qi_device_details = {
242 .product_id = keyspan_usa19qi_product_id,
243 .msg_format = msg_usa28,
244 .num_ports = 1,
245 .indat_endp_flip = 1,
246 .outdat_endp_flip = 1,
247 .indat_endpoints = {0x81},
248 .outdat_endpoints = {0x01},
249 .inack_endpoints = {0x83},
250 .outcont_endpoints = {0x03},
251 .instat_endpoint = 0x84,
252 .indat_endpoint = -1,
253 .glocont_endpoint = -1,
254 .calculate_baud_rate = keyspan_usa28_calc_baud,
255 .baudclk = KEYSPAN_USA19_BAUDCLK,
256};
257
258static const struct keyspan_device_details mpr_device_details = {
259 .product_id = keyspan_mpr_product_id,
260 .msg_format = msg_usa28,
261 .num_ports = 1,
262 .indat_endp_flip = 1,
263 .outdat_endp_flip = 1,
264 .indat_endpoints = {0x81},
265 .outdat_endpoints = {0x01},
266 .inack_endpoints = {0x83},
267 .outcont_endpoints = {0x03},
268 .instat_endpoint = 0x84,
269 .indat_endpoint = -1,
270 .glocont_endpoint = -1,
271 .calculate_baud_rate = keyspan_usa28_calc_baud,
272 .baudclk = KEYSPAN_USA19_BAUDCLK,
273};
274
275static const struct keyspan_device_details usa19qw_device_details = {
276 .product_id = keyspan_usa19qw_product_id,
277 .msg_format = msg_usa26,
278 .num_ports = 1,
279 .indat_endp_flip = 0,
280 .outdat_endp_flip = 1,
281 .indat_endpoints = {0x81},
282 .outdat_endpoints = {0x01},
283 .inack_endpoints = {0x85},
284 .outcont_endpoints = {0x05},
285 .instat_endpoint = 0x87,
286 .indat_endpoint = -1,
287 .glocont_endpoint = 0x07,
288 .calculate_baud_rate = keyspan_usa19w_calc_baud,
289 .baudclk = KEYSPAN_USA19W_BAUDCLK,
290};
291
292static const struct keyspan_device_details usa19w_device_details = {
293 .product_id = keyspan_usa19w_product_id,
294 .msg_format = msg_usa26,
295 .num_ports = 1,
296 .indat_endp_flip = 0,
297 .outdat_endp_flip = 1,
298 .indat_endpoints = {0x81},
299 .outdat_endpoints = {0x01},
300 .inack_endpoints = {0x85},
301 .outcont_endpoints = {0x05},
302 .instat_endpoint = 0x87,
303 .indat_endpoint = -1,
304 .glocont_endpoint = 0x07,
305 .calculate_baud_rate = keyspan_usa19w_calc_baud,
306 .baudclk = KEYSPAN_USA19W_BAUDCLK,
307};
308
309static const struct keyspan_device_details usa19hs_device_details = {
310 .product_id = keyspan_usa19hs_product_id,
311 .msg_format = msg_usa90,
312 .num_ports = 1,
313 .indat_endp_flip = 0,
314 .outdat_endp_flip = 0,
315 .indat_endpoints = {0x81},
316 .outdat_endpoints = {0x01},
317 .inack_endpoints = {-1},
318 .outcont_endpoints = {0x02},
319 .instat_endpoint = 0x82,
320 .indat_endpoint = -1,
321 .glocont_endpoint = -1,
322 .calculate_baud_rate = keyspan_usa19hs_calc_baud,
323 .baudclk = KEYSPAN_USA19HS_BAUDCLK,
324};
325
326static const struct keyspan_device_details usa28_device_details = {
327 .product_id = keyspan_usa28_product_id,
328 .msg_format = msg_usa28,
329 .num_ports = 2,
330 .indat_endp_flip = 1,
331 .outdat_endp_flip = 1,
332 .indat_endpoints = {0x81, 0x83},
333 .outdat_endpoints = {0x01, 0x03},
334 .inack_endpoints = {0x85, 0x86},
335 .outcont_endpoints = {0x05, 0x06},
336 .instat_endpoint = 0x87,
337 .indat_endpoint = -1,
338 .glocont_endpoint = 0x07,
339 .calculate_baud_rate = keyspan_usa28_calc_baud,
340 .baudclk = KEYSPAN_USA28_BAUDCLK,
341};
342
343static const struct keyspan_device_details usa28x_device_details = {
344 .product_id = keyspan_usa28x_product_id,
345 .msg_format = msg_usa26,
346 .num_ports = 2,
347 .indat_endp_flip = 0,
348 .outdat_endp_flip = 1,
349 .indat_endpoints = {0x81, 0x83},
350 .outdat_endpoints = {0x01, 0x03},
351 .inack_endpoints = {0x85, 0x86},
352 .outcont_endpoints = {0x05, 0x06},
353 .instat_endpoint = 0x87,
354 .indat_endpoint = -1,
355 .glocont_endpoint = 0x07,
356 .calculate_baud_rate = keyspan_usa19w_calc_baud,
357 .baudclk = KEYSPAN_USA28X_BAUDCLK,
358};
359
360static const struct keyspan_device_details usa28xa_device_details = {
361 .product_id = keyspan_usa28xa_product_id,
362 .msg_format = msg_usa26,
363 .num_ports = 2,
364 .indat_endp_flip = 0,
365 .outdat_endp_flip = 1,
366 .indat_endpoints = {0x81, 0x83},
367 .outdat_endpoints = {0x01, 0x03},
368 .inack_endpoints = {0x85, 0x86},
369 .outcont_endpoints = {0x05, 0x06},
370 .instat_endpoint = 0x87,
371 .indat_endpoint = -1,
372 .glocont_endpoint = 0x07,
373 .calculate_baud_rate = keyspan_usa19w_calc_baud,
374 .baudclk = KEYSPAN_USA28X_BAUDCLK,
375};
376
377static const struct keyspan_device_details usa28xg_device_details = {
378 .product_id = keyspan_usa28xg_product_id,
379 .msg_format = msg_usa67,
380 .num_ports = 2,
381 .indat_endp_flip = 0,
382 .outdat_endp_flip = 0,
383 .indat_endpoints = {0x84, 0x88},
384 .outdat_endpoints = {0x02, 0x06},
385 .inack_endpoints = {-1, -1},
386 .outcont_endpoints = {-1, -1},
387 .instat_endpoint = 0x81,
388 .indat_endpoint = -1,
389 .glocont_endpoint = 0x01,
390 .calculate_baud_rate = keyspan_usa19w_calc_baud,
391 .baudclk = KEYSPAN_USA28X_BAUDCLK,
392};
393/* We don't need a separate entry for the usa28xb as it appears as a 28x anyway */
394
395static const struct keyspan_device_details usa49w_device_details = {
396 .product_id = keyspan_usa49w_product_id,
397 .msg_format = msg_usa49,
398 .num_ports = 4,
399 .indat_endp_flip = 0,
400 .outdat_endp_flip = 0,
401 .indat_endpoints = {0x81, 0x82, 0x83, 0x84},
402 .outdat_endpoints = {0x01, 0x02, 0x03, 0x04},
403 .inack_endpoints = {-1, -1, -1, -1},
404 .outcont_endpoints = {-1, -1, -1, -1},
405 .instat_endpoint = 0x87,
406 .indat_endpoint = -1,
407 .glocont_endpoint = 0x07,
408 .calculate_baud_rate = keyspan_usa19w_calc_baud,
409 .baudclk = KEYSPAN_USA49W_BAUDCLK,
410};
411
412static const struct keyspan_device_details usa49wlc_device_details = {
413 .product_id = keyspan_usa49wlc_product_id,
414 .msg_format = msg_usa49,
415 .num_ports = 4,
416 .indat_endp_flip = 0,
417 .outdat_endp_flip = 0,
418 .indat_endpoints = {0x81, 0x82, 0x83, 0x84},
419 .outdat_endpoints = {0x01, 0x02, 0x03, 0x04},
420 .inack_endpoints = {-1, -1, -1, -1},
421 .outcont_endpoints = {-1, -1, -1, -1},
422 .instat_endpoint = 0x87,
423 .indat_endpoint = -1,
424 .glocont_endpoint = 0x07,
425 .calculate_baud_rate = keyspan_usa19w_calc_baud,
426 .baudclk = KEYSPAN_USA19W_BAUDCLK,
427};
428
429static const struct keyspan_device_details usa49wg_device_details = {
430 .product_id = keyspan_usa49wg_product_id,
431 .msg_format = msg_usa49,
432 .num_ports = 4,
433 .indat_endp_flip = 0,
434 .outdat_endp_flip = 0,
435 .indat_endpoints = {-1, -1, -1, -1}, /* single 'global' data in EP */
436 .outdat_endpoints = {0x01, 0x02, 0x04, 0x06},
437 .inack_endpoints = {-1, -1, -1, -1},
438 .outcont_endpoints = {-1, -1, -1, -1},
439 .instat_endpoint = 0x81,
440 .indat_endpoint = 0x88,
441 .glocont_endpoint = 0x00, /* uses control EP */
442 .calculate_baud_rate = keyspan_usa19w_calc_baud,
443 .baudclk = KEYSPAN_USA19W_BAUDCLK,
444};
445
446static const struct keyspan_device_details *keyspan_devices[] = {
447 &usa18x_device_details,
448 &usa19_device_details,
449 &usa19qi_device_details,
450 &mpr_device_details,
451 &usa19qw_device_details,
452 &usa19w_device_details,
453 &usa19hs_device_details,
454 &usa28_device_details,
455 &usa28x_device_details,
456 &usa28xa_device_details,
457 &usa28xg_device_details,
458 /* 28xb not required as it renumerates as a 28x */
459 &usa49w_device_details,
460 &usa49wlc_device_details,
461 &usa49wg_device_details,
462 NULL,
463};
464
465static const struct usb_device_id keyspan_ids_combined[] = {
466 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_pre_product_id) },
467 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_pre_product_id) },
468 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_pre_product_id) },
469 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_pre_product_id) },
470 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_pre_product_id) },
471 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_pre_product_id) },
472 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_pre_product_id) },
473 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_pre_product_id) },
474 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_pre_product_id) },
475 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xb_pre_product_id) },
476 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_pre_product_id) },
477 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_pre_product_id) },
478 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_product_id) },
479 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_product_id) },
480 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_product_id) },
481 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_product_id) },
482 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_product_id) },
483 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19hs_product_id) },
484 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_product_id) },
485 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_product_id) },
486 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_product_id) },
487 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_product_id) },
488 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xg_product_id) },
489 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_product_id)},
490 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_product_id)},
491 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wg_product_id)},
492 { } /* Terminating entry */
493};
494
495MODULE_DEVICE_TABLE(usb, keyspan_ids_combined);
496
497/* usb_device_id table for the pre-firmware download keyspan devices */
498static const struct usb_device_id keyspan_pre_ids[] = {
499 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_pre_product_id) },
500 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_pre_product_id) },
501 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_pre_product_id) },
502 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_pre_product_id) },
503 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_pre_product_id) },
504 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_pre_product_id) },
505 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_pre_product_id) },
506 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_pre_product_id) },
507 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_pre_product_id) },
508 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xb_pre_product_id) },
509 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_pre_product_id) },
510 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_pre_product_id) },
511 { } /* Terminating entry */
512};
513
514static const struct usb_device_id keyspan_1port_ids[] = {
515 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa18x_product_id) },
516 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19_product_id) },
517 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qi_product_id) },
518 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19qw_product_id) },
519 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19w_product_id) },
520 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa19hs_product_id) },
521 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_mpr_product_id) },
522 { } /* Terminating entry */
523};
524
525static const struct usb_device_id keyspan_2port_ids[] = {
526 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28_product_id) },
527 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28x_product_id) },
528 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xa_product_id) },
529 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa28xg_product_id) },
530 { } /* Terminating entry */
531};
532
533static const struct usb_device_id keyspan_4port_ids[] = {
534 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49w_product_id) },
535 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wlc_product_id)},
536 { USB_DEVICE(KEYSPAN_VENDOR_ID, keyspan_usa49wg_product_id)},
537 { } /* Terminating entry */
538};
539
540/* Structs for the devices, pre and post renumeration. */
541static struct usb_serial_driver keyspan_pre_device = {
542 .driver = {
543 .owner = THIS_MODULE,
544 .name = "keyspan_no_firm",
545 },
546 .description = "Keyspan - (without firmware)",
547 .id_table = keyspan_pre_ids,
548 .num_ports = 1,
549 .attach = keyspan_fake_startup,
550};
551
552static struct usb_serial_driver keyspan_1port_device = {
553 .driver = {
554 .owner = THIS_MODULE,
555 .name = "keyspan_1",
556 },
557 .description = "Keyspan 1 port adapter",
558 .id_table = keyspan_1port_ids,
559 .num_ports = 1,
560 .open = keyspan_open,
561 .close = keyspan_close,
562 .dtr_rts = keyspan_dtr_rts,
563 .write = keyspan_write,
564 .write_room = keyspan_write_room,
565 .set_termios = keyspan_set_termios,
566 .break_ctl = keyspan_break_ctl,
567 .tiocmget = keyspan_tiocmget,
568 .tiocmset = keyspan_tiocmset,
569 .attach = keyspan_startup,
570 .disconnect = keyspan_disconnect,
571 .release = keyspan_release,
572 .port_probe = keyspan_port_probe,
573 .port_remove = keyspan_port_remove,
574};
575
576static struct usb_serial_driver keyspan_2port_device = {
577 .driver = {
578 .owner = THIS_MODULE,
579 .name = "keyspan_2",
580 },
581 .description = "Keyspan 2 port adapter",
582 .id_table = keyspan_2port_ids,
583 .num_ports = 2,
584 .open = keyspan_open,
585 .close = keyspan_close,
586 .dtr_rts = keyspan_dtr_rts,
587 .write = keyspan_write,
588 .write_room = keyspan_write_room,
589 .set_termios = keyspan_set_termios,
590 .break_ctl = keyspan_break_ctl,
591 .tiocmget = keyspan_tiocmget,
592 .tiocmset = keyspan_tiocmset,
593 .attach = keyspan_startup,
594 .disconnect = keyspan_disconnect,
595 .release = keyspan_release,
596 .port_probe = keyspan_port_probe,
597 .port_remove = keyspan_port_remove,
598};
599
600static struct usb_serial_driver keyspan_4port_device = {
601 .driver = {
602 .owner = THIS_MODULE,
603 .name = "keyspan_4",
604 },
605 .description = "Keyspan 4 port adapter",
606 .id_table = keyspan_4port_ids,
607 .num_ports = 4,
608 .open = keyspan_open,
609 .close = keyspan_close,
610 .dtr_rts = keyspan_dtr_rts,
611 .write = keyspan_write,
612 .write_room = keyspan_write_room,
613 .set_termios = keyspan_set_termios,
614 .break_ctl = keyspan_break_ctl,
615 .tiocmget = keyspan_tiocmget,
616 .tiocmset = keyspan_tiocmset,
617 .attach = keyspan_startup,
618 .disconnect = keyspan_disconnect,
619 .release = keyspan_release,
620 .port_probe = keyspan_port_probe,
621 .port_remove = keyspan_port_remove,
622};
623
624static struct usb_serial_driver * const serial_drivers[] = {
625 &keyspan_pre_device, &keyspan_1port_device,
626 &keyspan_2port_device, &keyspan_4port_device, NULL
627};
628
629#endif
diff --git a/drivers/usb/serial/keyspan_pda.c b/drivers/usb/serial/keyspan_pda.c
index 83523fcf6fb9..d2dab2a341b8 100644
--- a/drivers/usb/serial/keyspan_pda.c
+++ b/drivers/usb/serial/keyspan_pda.c
@@ -139,6 +139,7 @@ static void keyspan_pda_rx_interrupt(struct urb *urb)
139{ 139{
140 struct usb_serial_port *port = urb->context; 140 struct usb_serial_port *port = urb->context;
141 unsigned char *data = urb->transfer_buffer; 141 unsigned char *data = urb->transfer_buffer;
142 unsigned int len = urb->actual_length;
142 int retval; 143 int retval;
143 int status = urb->status; 144 int status = urb->status;
144 struct keyspan_pda_private *priv; 145 struct keyspan_pda_private *priv;
@@ -159,18 +160,26 @@ static void keyspan_pda_rx_interrupt(struct urb *urb)
159 goto exit; 160 goto exit;
160 } 161 }
161 162
163 if (len < 1) {
164 dev_warn(&port->dev, "short message received\n");
165 goto exit;
166 }
167
162 /* see if the message is data or a status interrupt */ 168 /* see if the message is data or a status interrupt */
163 switch (data[0]) { 169 switch (data[0]) {
164 case 0: 170 case 0:
165 /* rest of message is rx data */ 171 /* rest of message is rx data */
166 if (urb->actual_length) { 172 if (len < 2)
167 tty_insert_flip_string(&port->port, data + 1, 173 break;
168 urb->actual_length - 1); 174 tty_insert_flip_string(&port->port, data + 1, len - 1);
169 tty_flip_buffer_push(&port->port); 175 tty_flip_buffer_push(&port->port);
170 }
171 break; 176 break;
172 case 1: 177 case 1:
173 /* status interrupt */ 178 /* status interrupt */
179 if (len < 3) {
180 dev_warn(&port->dev, "short interrupt message received\n");
181 break;
182 }
174 dev_dbg(&port->dev, "rx int, d1=%d, d2=%d\n", data[1], data[2]); 183 dev_dbg(&port->dev, "rx int, d1=%d, d2=%d\n", data[1], data[2]);
175 switch (data[1]) { 184 switch (data[1]) {
176 case 1: /* modemline change */ 185 case 1: /* modemline change */
diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c
index 6cb45757818f..595415e59d5d 100644
--- a/drivers/usb/serial/kl5kusb105.c
+++ b/drivers/usb/serial/kl5kusb105.c
@@ -89,7 +89,6 @@ static struct usb_serial_driver kl5kusb105d_device = {
89 .open = klsi_105_open, 89 .open = klsi_105_open,
90 .close = klsi_105_close, 90 .close = klsi_105_close,
91 .set_termios = klsi_105_set_termios, 91 .set_termios = klsi_105_set_termios,
92 /*.break_ctl = klsi_105_break_ctl,*/
93 .tiocmget = klsi_105_tiocmget, 92 .tiocmget = klsi_105_tiocmget,
94 .port_probe = klsi_105_port_probe, 93 .port_probe = klsi_105_port_probe,
95 .port_remove = klsi_105_port_remove, 94 .port_remove = klsi_105_port_remove,
@@ -104,16 +103,15 @@ static struct usb_serial_driver * const serial_drivers[] = {
104}; 103};
105 104
106struct klsi_105_port_settings { 105struct klsi_105_port_settings {
107 __u8 pktlen; /* always 5, it seems */ 106 u8 pktlen; /* always 5, it seems */
108 __u8 baudrate; 107 u8 baudrate;
109 __u8 databits; 108 u8 databits;
110 __u8 unknown1; 109 u8 unknown1;
111 __u8 unknown2; 110 u8 unknown2;
112} __attribute__ ((packed)); 111};
113 112
114struct klsi_105_private { 113struct klsi_105_private {
115 struct klsi_105_port_settings cfg; 114 struct klsi_105_port_settings cfg;
116 struct ktermios termios;
117 unsigned long line_state; /* modem line settings */ 115 unsigned long line_state; /* modem line settings */
118 spinlock_t lock; 116 spinlock_t lock;
119}; 117};
@@ -143,10 +141,12 @@ static int klsi_105_chg_port_settings(struct usb_serial_port *port,
143 if (rc < 0) 141 if (rc < 0)
144 dev_err(&port->dev, 142 dev_err(&port->dev,
145 "Change port settings failed (error = %d)\n", rc); 143 "Change port settings failed (error = %d)\n", rc);
146 dev_info(&port->serial->dev->dev, 144
147 "%d byte block, baudrate %x, databits %d, u1 %d, u2 %d\n", 145 dev_dbg(&port->dev,
148 settings->pktlen, settings->baudrate, settings->databits, 146 "pktlen %u, baudrate 0x%02x, databits %u, u1 %u, u2 %u\n",
149 settings->unknown1, settings->unknown2); 147 settings->pktlen, settings->baudrate, settings->databits,
148 settings->unknown1, settings->unknown2);
149
150 return rc; 150 return rc;
151} 151}
152 152
@@ -175,8 +175,6 @@ static int klsi_105_get_line_state(struct usb_serial_port *port,
175 u8 *status_buf; 175 u8 *status_buf;
176 __u16 status; 176 __u16 status;
177 177
178 dev_info(&port->serial->dev->dev, "sending SIO Poll request\n");
179
180 status_buf = kmalloc(KLSI_STATUSBUF_LEN, GFP_KERNEL); 178 status_buf = kmalloc(KLSI_STATUSBUF_LEN, GFP_KERNEL);
181 if (!status_buf) 179 if (!status_buf)
182 return -ENOMEM; 180 return -ENOMEM;
@@ -199,8 +197,8 @@ static int klsi_105_get_line_state(struct usb_serial_port *port,
199 } else { 197 } else {
200 status = get_unaligned_le16(status_buf); 198 status = get_unaligned_le16(status_buf);
201 199
202 dev_info(&port->serial->dev->dev, "read status %x %x\n", 200 dev_dbg(&port->dev, "read status %02x %02x\n",
203 status_buf[0], status_buf[1]); 201 status_buf[0], status_buf[1]);
204 202
205 *line_state_p = klsi_105_status2linestate(status); 203 *line_state_p = klsi_105_status2linestate(status);
206 } 204 }
@@ -233,8 +231,6 @@ static int klsi_105_port_probe(struct usb_serial_port *port)
233 231
234 spin_lock_init(&priv->lock); 232 spin_lock_init(&priv->lock);
235 233
236 /* priv->termios is left uninitialized until port opening */
237
238 usb_set_serial_port_data(port, priv); 234 usb_set_serial_port_data(port, priv);
239 235
240 return 0; 236 return 0;
@@ -255,7 +251,6 @@ static int klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port)
255 struct klsi_105_private *priv = usb_get_serial_port_data(port); 251 struct klsi_105_private *priv = usb_get_serial_port_data(port);
256 int retval = 0; 252 int retval = 0;
257 int rc; 253 int rc;
258 int i;
259 unsigned long line_state; 254 unsigned long line_state;
260 struct klsi_105_port_settings *cfg; 255 struct klsi_105_port_settings *cfg;
261 unsigned long flags; 256 unsigned long flags;
@@ -278,14 +273,7 @@ static int klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port)
278 cfg->unknown2 = 1; 273 cfg->unknown2 = 1;
279 klsi_105_chg_port_settings(port, cfg); 274 klsi_105_chg_port_settings(port, cfg);
280 275
281 /* set up termios structure */
282 spin_lock_irqsave(&priv->lock, flags); 276 spin_lock_irqsave(&priv->lock, flags);
283 priv->termios.c_iflag = tty->termios.c_iflag;
284 priv->termios.c_oflag = tty->termios.c_oflag;
285 priv->termios.c_cflag = tty->termios.c_cflag;
286 priv->termios.c_lflag = tty->termios.c_lflag;
287 for (i = 0; i < NCCS; i++)
288 priv->termios.c_cc[i] = tty->termios.c_cc[i];
289 priv->cfg.pktlen = cfg->pktlen; 277 priv->cfg.pktlen = cfg->pktlen;
290 priv->cfg.baudrate = cfg->baudrate; 278 priv->cfg.baudrate = cfg->baudrate;
291 priv->cfg.databits = cfg->databits; 279 priv->cfg.databits = cfg->databits;
@@ -438,19 +426,6 @@ static void klsi_105_set_termios(struct tty_struct *tty,
438 */ 426 */
439 baud = tty_get_baud_rate(tty); 427 baud = tty_get_baud_rate(tty);
440 428
441 if ((cflag & CBAUD) != (old_cflag & CBAUD)) {
442 /* reassert DTR and (maybe) RTS on transition from B0 */
443 if ((old_cflag & CBAUD) == B0) {
444 dev_dbg(dev, "%s: baud was B0\n", __func__);
445#if 0
446 priv->control_state |= TIOCM_DTR;
447 /* don't set RTS if using hardware flow control */
448 if (!(old_cflag & CRTSCTS))
449 priv->control_state |= TIOCM_RTS;
450 mct_u232_set_modem_ctrl(serial, priv->control_state);
451#endif
452 }
453 }
454 switch (baud) { 429 switch (baud) {
455 case 0: /* handled below */ 430 case 0: /* handled below */
456 break; 431 break;
@@ -484,17 +459,14 @@ static void klsi_105_set_termios(struct tty_struct *tty,
484 baud = 9600; 459 baud = 9600;
485 break; 460 break;
486 } 461 }
487 if ((cflag & CBAUD) == B0) { 462
488 dev_dbg(dev, "%s: baud is B0\n", __func__); 463 /*
489 /* Drop RTS and DTR */ 464 * FIXME: implement B0 handling
490 /* maybe this should be simulated by sending read 465 *
491 * disable and read enable messages? 466 * Maybe this should be simulated by sending read disable and read
492 */ 467 * enable messages?
493#if 0 468 */
494 priv->control_state &= ~(TIOCM_DTR | TIOCM_RTS); 469
495 mct_u232_set_modem_ctrl(serial, priv->control_state);
496#endif
497 }
498 tty_encode_baud_rate(tty, baud, baud); 470 tty_encode_baud_rate(tty, baud, baud);
499 471
500 if ((cflag & CSIZE) != (old_cflag & CSIZE)) { 472 if ((cflag & CSIZE) != (old_cflag & CSIZE)) {
@@ -528,22 +500,6 @@ static void klsi_105_set_termios(struct tty_struct *tty,
528 || (cflag & CSTOPB) != (old_cflag & CSTOPB)) { 500 || (cflag & CSTOPB) != (old_cflag & CSTOPB)) {
529 /* Not currently supported */ 501 /* Not currently supported */
530 tty->termios.c_cflag &= ~(PARENB|PARODD|CSTOPB); 502 tty->termios.c_cflag &= ~(PARENB|PARODD|CSTOPB);
531#if 0
532 priv->last_lcr = 0;
533
534 /* set the parity */
535 if (cflag & PARENB)
536 priv->last_lcr |= (cflag & PARODD) ?
537 MCT_U232_PARITY_ODD : MCT_U232_PARITY_EVEN;
538 else
539 priv->last_lcr |= MCT_U232_PARITY_NONE;
540
541 /* set the number of stop bits */
542 priv->last_lcr |= (cflag & CSTOPB) ?
543 MCT_U232_STOP_BITS_2 : MCT_U232_STOP_BITS_1;
544
545 mct_u232_set_line_ctrl(serial, priv->last_lcr);
546#endif
547 } 503 }
548 /* 504 /*
549 * Set flow control: well, I do not really now how to handle DTR/RTS. 505 * Set flow control: well, I do not really now how to handle DTR/RTS.
@@ -554,14 +510,6 @@ static void klsi_105_set_termios(struct tty_struct *tty,
554 || (cflag & CRTSCTS) != (old_cflag & CRTSCTS)) { 510 || (cflag & CRTSCTS) != (old_cflag & CRTSCTS)) {
555 /* Not currently supported */ 511 /* Not currently supported */
556 tty->termios.c_cflag &= ~CRTSCTS; 512 tty->termios.c_cflag &= ~CRTSCTS;
557 /* Drop DTR/RTS if no flow control otherwise assert */
558#if 0
559 if ((iflag & IXOFF) || (iflag & IXON) || (cflag & CRTSCTS))
560 priv->control_state |= TIOCM_DTR | TIOCM_RTS;
561 else
562 priv->control_state &= ~(TIOCM_DTR | TIOCM_RTS);
563 mct_u232_set_modem_ctrl(serial, priv->control_state);
564#endif
565 } 513 }
566 memcpy(cfg, &priv->cfg, sizeof(*cfg)); 514 memcpy(cfg, &priv->cfg, sizeof(*cfg));
567 spin_unlock_irqrestore(&priv->lock, flags); 515 spin_unlock_irqrestore(&priv->lock, flags);
@@ -572,25 +520,6 @@ err:
572 kfree(cfg); 520 kfree(cfg);
573} 521}
574 522
575#if 0
576static void mct_u232_break_ctl(struct tty_struct *tty, int break_state)
577{
578 struct usb_serial_port *port = tty->driver_data;
579 struct usb_serial *serial = port->serial;
580 struct mct_u232_private *priv =
581 (struct mct_u232_private *)port->private;
582 unsigned char lcr = priv->last_lcr;
583
584 dev_dbg(&port->dev, "%s - state=%d\n", __func__, break_state);
585
586 /* LOCKING */
587 if (break_state)
588 lcr |= MCT_U232_SET_BREAK;
589
590 mct_u232_set_line_ctrl(serial, lcr);
591}
592#endif
593
594static int klsi_105_tiocmget(struct tty_struct *tty) 523static int klsi_105_tiocmget(struct tty_struct *tty)
595{ 524{
596 struct usb_serial_port *port = tty->driver_data; 525 struct usb_serial_port *port = tty->driver_data;
diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c
index 885655315de1..edbc81f205c2 100644
--- a/drivers/usb/serial/mct_u232.c
+++ b/drivers/usb/serial/mct_u232.c
@@ -322,8 +322,12 @@ static int mct_u232_get_modem_stat(struct usb_serial_port *port,
322 MCT_U232_GET_REQUEST_TYPE, 322 MCT_U232_GET_REQUEST_TYPE,
323 0, 0, buf, MCT_U232_GET_MODEM_STAT_SIZE, 323 0, 0, buf, MCT_U232_GET_MODEM_STAT_SIZE,
324 WDR_TIMEOUT); 324 WDR_TIMEOUT);
325 if (rc < 0) { 325 if (rc < MCT_U232_GET_MODEM_STAT_SIZE) {
326 dev_err(&port->dev, "Get MODEM STATus failed (error = %d)\n", rc); 326 dev_err(&port->dev, "Get MODEM STATus failed (error = %d)\n", rc);
327
328 if (rc >= 0)
329 rc = -EIO;
330
327 *msr = 0; 331 *msr = 0;
328 } else { 332 } else {
329 *msr = buf[0]; 333 *msr = buf[0];
diff --git a/drivers/usb/serial/metro-usb.c b/drivers/usb/serial/metro-usb.c
index 39e683096e94..cc84da8dbb84 100644
--- a/drivers/usb/serial/metro-usb.c
+++ b/drivers/usb/serial/metro-usb.c
@@ -135,23 +135,8 @@ static void metrousb_read_int_callback(struct urb *urb)
135 throttled = metro_priv->throttled; 135 throttled = metro_priv->throttled;
136 spin_unlock_irqrestore(&metro_priv->lock, flags); 136 spin_unlock_irqrestore(&metro_priv->lock, flags);
137 137
138 /* Continue trying to read if set. */ 138 if (throttled)
139 if (!throttled) { 139 return;
140 usb_fill_int_urb(port->interrupt_in_urb, port->serial->dev,
141 usb_rcvintpipe(port->serial->dev, port->interrupt_in_endpointAddress),
142 port->interrupt_in_urb->transfer_buffer,
143 port->interrupt_in_urb->transfer_buffer_length,
144 metrousb_read_int_callback, port, 1);
145
146 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC);
147
148 if (result)
149 dev_err(&port->dev,
150 "%s - failed submitting interrupt in urb, error code=%d\n",
151 __func__, result);
152 }
153 return;
154
155exit: 140exit:
156 /* Try to resubmit the urb. */ 141 /* Try to resubmit the urb. */
157 result = usb_submit_urb(urb, GFP_ATOMIC); 142 result = usb_submit_urb(urb, GFP_ATOMIC);
@@ -161,19 +146,8 @@ exit:
161 __func__, result); 146 __func__, result);
162} 147}
163 148
164static void metrousb_write_int_callback(struct urb *urb)
165{
166 struct usb_serial_port *port = urb->context;
167
168 dev_warn(&port->dev, "%s not implemented yet.\n",
169 __func__);
170}
171
172static void metrousb_cleanup(struct usb_serial_port *port) 149static void metrousb_cleanup(struct usb_serial_port *port)
173{ 150{
174 dev_dbg(&port->dev, "%s\n", __func__);
175
176 usb_unlink_urb(port->interrupt_in_urb);
177 usb_kill_urb(port->interrupt_in_urb); 151 usb_kill_urb(port->interrupt_in_urb);
178 152
179 metrousb_send_unidirectional_cmd(UNI_CMD_CLOSE, port); 153 metrousb_send_unidirectional_cmd(UNI_CMD_CLOSE, port);
@@ -186,8 +160,6 @@ static int metrousb_open(struct tty_struct *tty, struct usb_serial_port *port)
186 unsigned long flags = 0; 160 unsigned long flags = 0;
187 int result = 0; 161 int result = 0;
188 162
189 dev_dbg(&port->dev, "%s\n", __func__);
190
191 /* Make sure the urb is initialized. */ 163 /* Make sure the urb is initialized. */
192 if (!port->interrupt_in_urb) { 164 if (!port->interrupt_in_urb) {
193 dev_err(&port->dev, "%s - interrupt urb not initialized\n", 165 dev_err(&port->dev, "%s - interrupt urb not initialized\n",
@@ -227,8 +199,6 @@ static int metrousb_open(struct tty_struct *tty, struct usb_serial_port *port)
227 __func__, result); 199 __func__, result);
228 goto exit; 200 goto exit;
229 } 201 }
230
231 dev_dbg(&port->dev, "%s - port open\n", __func__);
232exit: 202exit:
233 return result; 203 return result;
234} 204}
@@ -290,8 +260,6 @@ static void metrousb_throttle(struct tty_struct *tty)
290 struct metrousb_private *metro_priv = usb_get_serial_port_data(port); 260 struct metrousb_private *metro_priv = usb_get_serial_port_data(port);
291 unsigned long flags = 0; 261 unsigned long flags = 0;
292 262
293 dev_dbg(tty->dev, "%s\n", __func__);
294
295 /* Set the private information for the port to stop reading data. */ 263 /* Set the private information for the port to stop reading data. */
296 spin_lock_irqsave(&metro_priv->lock, flags); 264 spin_lock_irqsave(&metro_priv->lock, flags);
297 metro_priv->throttled = 1; 265 metro_priv->throttled = 1;
@@ -305,8 +273,6 @@ static int metrousb_tiocmget(struct tty_struct *tty)
305 struct metrousb_private *metro_priv = usb_get_serial_port_data(port); 273 struct metrousb_private *metro_priv = usb_get_serial_port_data(port);
306 unsigned long flags = 0; 274 unsigned long flags = 0;
307 275
308 dev_dbg(tty->dev, "%s\n", __func__);
309
310 spin_lock_irqsave(&metro_priv->lock, flags); 276 spin_lock_irqsave(&metro_priv->lock, flags);
311 control_state = metro_priv->control_state; 277 control_state = metro_priv->control_state;
312 spin_unlock_irqrestore(&metro_priv->lock, flags); 278 spin_unlock_irqrestore(&metro_priv->lock, flags);
@@ -350,15 +316,12 @@ static void metrousb_unthrottle(struct tty_struct *tty)
350 unsigned long flags = 0; 316 unsigned long flags = 0;
351 int result = 0; 317 int result = 0;
352 318
353 dev_dbg(tty->dev, "%s\n", __func__);
354
355 /* Set the private information for the port to resume reading data. */ 319 /* Set the private information for the port to resume reading data. */
356 spin_lock_irqsave(&metro_priv->lock, flags); 320 spin_lock_irqsave(&metro_priv->lock, flags);
357 metro_priv->throttled = 0; 321 metro_priv->throttled = 0;
358 spin_unlock_irqrestore(&metro_priv->lock, flags); 322 spin_unlock_irqrestore(&metro_priv->lock, flags);
359 323
360 /* Submit the urb to read from the port. */ 324 /* Submit the urb to read from the port. */
361 port->interrupt_in_urb->dev = port->serial->dev;
362 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC); 325 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC);
363 if (result) 326 if (result)
364 dev_err(tty->dev, 327 dev_err(tty->dev,
@@ -377,7 +340,6 @@ static struct usb_serial_driver metrousb_device = {
377 .open = metrousb_open, 340 .open = metrousb_open,
378 .close = metrousb_cleanup, 341 .close = metrousb_cleanup,
379 .read_int_callback = metrousb_read_int_callback, 342 .read_int_callback = metrousb_read_int_callback,
380 .write_int_callback = metrousb_write_int_callback,
381 .port_probe = metrousb_port_probe, 343 .port_probe = metrousb_port_probe,
382 .port_remove = metrousb_port_remove, 344 .port_remove = metrousb_port_remove,
383 .throttle = metrousb_throttle, 345 .throttle = metrousb_throttle,
diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c
index 91bc170b408a..f075121c6e32 100644
--- a/drivers/usb/serial/mos7720.c
+++ b/drivers/usb/serial/mos7720.c
@@ -234,11 +234,16 @@ static int read_mos_reg(struct usb_serial *serial, unsigned int serial_portnum,
234 234
235 status = usb_control_msg(usbdev, pipe, request, requesttype, value, 235 status = usb_control_msg(usbdev, pipe, request, requesttype, value,
236 index, buf, 1, MOS_WDR_TIMEOUT); 236 index, buf, 1, MOS_WDR_TIMEOUT);
237 if (status == 1) 237 if (status == 1) {
238 *data = *buf; 238 *data = *buf;
239 else if (status < 0) 239 } else {
240 dev_err(&usbdev->dev, 240 dev_err(&usbdev->dev,
241 "mos7720: usb_control_msg() failed: %d\n", status); 241 "mos7720: usb_control_msg() failed: %d\n", status);
242 if (status >= 0)
243 status = -EIO;
244 *data = 0;
245 }
246
242 kfree(buf); 247 kfree(buf);
243 248
244 return status; 249 return status;
@@ -1846,7 +1851,6 @@ static int get_serial_info(struct moschip_port *mos7720_port,
1846 tmp.line = mos7720_port->port->minor; 1851 tmp.line = mos7720_port->port->minor;
1847 tmp.port = mos7720_port->port->port_number; 1852 tmp.port = mos7720_port->port->port_number;
1848 tmp.irq = 0; 1853 tmp.irq = 0;
1849 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
1850 tmp.xmit_fifo_size = NUM_URBS * URB_TRANSFER_BUFFER_SIZE; 1854 tmp.xmit_fifo_size = NUM_URBS * URB_TRANSFER_BUFFER_SIZE;
1851 tmp.baud_base = 9600; 1855 tmp.baud_base = 9600;
1852 tmp.close_delay = 5*HZ; 1856 tmp.close_delay = 5*HZ;
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index ea27fb23967a..3821c53fcee9 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -284,9 +284,15 @@ static int mos7840_get_reg_sync(struct usb_serial_port *port, __u16 reg,
284 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ, 284 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ,
285 MCS_RD_RTYPE, 0, reg, buf, VENDOR_READ_LENGTH, 285 MCS_RD_RTYPE, 0, reg, buf, VENDOR_READ_LENGTH,
286 MOS_WDR_TIMEOUT); 286 MOS_WDR_TIMEOUT);
287 if (ret < VENDOR_READ_LENGTH) {
288 if (ret >= 0)
289 ret = -EIO;
290 goto out;
291 }
292
287 *val = buf[0]; 293 *val = buf[0];
288 dev_dbg(&port->dev, "%s offset is %x, return val %x\n", __func__, reg, *val); 294 dev_dbg(&port->dev, "%s offset is %x, return val %x\n", __func__, reg, *val);
289 295out:
290 kfree(buf); 296 kfree(buf);
291 return ret; 297 return ret;
292} 298}
@@ -352,8 +358,13 @@ static int mos7840_get_uart_reg(struct usb_serial_port *port, __u16 reg,
352 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ, 358 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ,
353 MCS_RD_RTYPE, Wval, reg, buf, VENDOR_READ_LENGTH, 359 MCS_RD_RTYPE, Wval, reg, buf, VENDOR_READ_LENGTH,
354 MOS_WDR_TIMEOUT); 360 MOS_WDR_TIMEOUT);
361 if (ret < VENDOR_READ_LENGTH) {
362 if (ret >= 0)
363 ret = -EIO;
364 goto out;
365 }
355 *val = buf[0]; 366 *val = buf[0];
356 367out:
357 kfree(buf); 368 kfree(buf);
358 return ret; 369 return ret;
359} 370}
@@ -1023,6 +1034,7 @@ static int mos7840_open(struct tty_struct *tty, struct usb_serial_port *port)
1023 * (can't set it up in mos7840_startup as the structures * 1034 * (can't set it up in mos7840_startup as the structures *
1024 * were not set up at that time.) */ 1035 * were not set up at that time.) */
1025 if (port0->open_ports == 1) { 1036 if (port0->open_ports == 1) {
1037 /* FIXME: Buffer never NULL, so URB is not submitted. */
1026 if (serial->port[0]->interrupt_in_buffer == NULL) { 1038 if (serial->port[0]->interrupt_in_buffer == NULL) {
1027 /* set up interrupt urb */ 1039 /* set up interrupt urb */
1028 usb_fill_int_urb(serial->port[0]->interrupt_in_urb, 1040 usb_fill_int_urb(serial->port[0]->interrupt_in_urb,
@@ -1479,10 +1491,10 @@ static int mos7840_tiocmget(struct tty_struct *tty)
1479 return -ENODEV; 1491 return -ENODEV;
1480 1492
1481 status = mos7840_get_uart_reg(port, MODEM_STATUS_REGISTER, &msr); 1493 status = mos7840_get_uart_reg(port, MODEM_STATUS_REGISTER, &msr);
1482 if (status != 1) 1494 if (status < 0)
1483 return -EIO; 1495 return -EIO;
1484 status = mos7840_get_uart_reg(port, MODEM_CONTROL_REGISTER, &mcr); 1496 status = mos7840_get_uart_reg(port, MODEM_CONTROL_REGISTER, &mcr);
1485 if (status != 1) 1497 if (status < 0)
1486 return -EIO; 1498 return -EIO;
1487 result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0) 1499 result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0)
1488 | ((mcr & MCR_RTS) ? TIOCM_RTS : 0) 1500 | ((mcr & MCR_RTS) ? TIOCM_RTS : 0)
@@ -1952,7 +1964,6 @@ static int mos7840_get_serial_info(struct moschip_port *mos7840_port,
1952 tmp.line = mos7840_port->port->minor; 1964 tmp.line = mos7840_port->port->minor;
1953 tmp.port = mos7840_port->port->port_number; 1965 tmp.port = mos7840_port->port->port_number;
1954 tmp.irq = 0; 1966 tmp.irq = 0;
1955 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
1956 tmp.xmit_fifo_size = NUM_URBS * URB_TRANSFER_BUFFER_SIZE; 1967 tmp.xmit_fifo_size = NUM_URBS * URB_TRANSFER_BUFFER_SIZE;
1957 tmp.baud_base = 9600; 1968 tmp.baud_base = 9600;
1958 tmp.close_delay = 5 * HZ; 1969 tmp.close_delay = 5 * HZ;
@@ -2106,7 +2117,8 @@ static int mos7840_calc_num_ports(struct usb_serial *serial)
2106static int mos7840_attach(struct usb_serial *serial) 2117static int mos7840_attach(struct usb_serial *serial)
2107{ 2118{
2108 if (serial->num_bulk_in < serial->num_ports || 2119 if (serial->num_bulk_in < serial->num_ports ||
2109 serial->num_bulk_out < serial->num_ports) { 2120 serial->num_bulk_out < serial->num_ports ||
2121 serial->num_interrupt_in < 1) {
2110 dev_err(&serial->interface->dev, "missing endpoints\n"); 2122 dev_err(&serial->interface->dev, "missing endpoints\n");
2111 return -ENODEV; 2123 return -ENODEV;
2112 } 2124 }
diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c
index 5ded6f524d59..3937b9c3cc69 100644
--- a/drivers/usb/serial/opticon.c
+++ b/drivers/usb/serial/opticon.c
@@ -142,7 +142,7 @@ static int opticon_open(struct tty_struct *tty, struct usb_serial_port *port)
142 usb_clear_halt(port->serial->dev, port->read_urb->pipe); 142 usb_clear_halt(port->serial->dev, port->read_urb->pipe);
143 143
144 res = usb_serial_generic_open(tty, port); 144 res = usb_serial_generic_open(tty, port);
145 if (!res) 145 if (res)
146 return res; 146 return res;
147 147
148 /* Request CTS line state, sometimes during opening the current 148 /* Request CTS line state, sometimes during opening the current
@@ -343,7 +343,6 @@ static int get_serial_info(struct usb_serial_port *port,
343 tmp.line = port->minor; 343 tmp.line = port->minor;
344 tmp.port = 0; 344 tmp.port = 0;
345 tmp.irq = 0; 345 tmp.irq = 0;
346 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
347 tmp.xmit_fifo_size = 1024; 346 tmp.xmit_fifo_size = 1024;
348 tmp.baud_base = 9600; 347 tmp.baud_base = 9600;
349 tmp.close_delay = 5*HZ; 348 tmp.close_delay = 5*HZ;
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 1db4b61bdf7b..ca69eb42071b 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -450,7 +450,7 @@ static int pl2303_get_line_request(struct usb_serial_port *port,
450 if (ret != 7) { 450 if (ret != 7) {
451 dev_err(&port->dev, "%s - failed: %d\n", __func__, ret); 451 dev_err(&port->dev, "%s - failed: %d\n", __func__, ret);
452 452
453 if (ret > 0) 453 if (ret >= 0)
454 ret = -EIO; 454 ret = -EIO;
455 455
456 return ret; 456 return ret;
@@ -470,12 +470,8 @@ static int pl2303_set_line_request(struct usb_serial_port *port,
470 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 470 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
471 SET_LINE_REQUEST, SET_LINE_REQUEST_TYPE, 471 SET_LINE_REQUEST, SET_LINE_REQUEST_TYPE,
472 0, 0, buf, 7, 100); 472 0, 0, buf, 7, 100);
473 if (ret != 7) { 473 if (ret < 0) {
474 dev_err(&port->dev, "%s - failed: %d\n", __func__, ret); 474 dev_err(&port->dev, "%s - failed: %d\n", __func__, ret);
475
476 if (ret > 0)
477 ret = -EIO;
478
479 return ret; 475 return ret;
480 } 476 }
481 477
diff --git a/drivers/usb/serial/quatech2.c b/drivers/usb/serial/quatech2.c
index 5709cc93b083..fdbb904d153f 100644
--- a/drivers/usb/serial/quatech2.c
+++ b/drivers/usb/serial/quatech2.c
@@ -188,22 +188,22 @@ static inline int qt2_setdevice(struct usb_device *dev, u8 *data)
188} 188}
189 189
190 190
191static inline int qt2_getdevice(struct usb_device *dev, u8 *data)
192{
193 return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
194 QT_SET_GET_DEVICE, 0xc0, 0, 0,
195 data, 3, QT2_USB_TIMEOUT);
196}
197
198static inline int qt2_getregister(struct usb_device *dev, 191static inline int qt2_getregister(struct usb_device *dev,
199 u8 uart, 192 u8 uart,
200 u8 reg, 193 u8 reg,
201 u8 *data) 194 u8 *data)
202{ 195{
203 return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 196 int ret;
204 QT_SET_GET_REGISTER, 0xc0, reg, 197
205 uart, data, sizeof(*data), QT2_USB_TIMEOUT); 198 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
199 QT_SET_GET_REGISTER, 0xc0, reg,
200 uart, data, sizeof(*data), QT2_USB_TIMEOUT);
201 if (ret < sizeof(*data)) {
202 if (ret >= 0)
203 ret = -EIO;
204 }
206 205
206 return ret;
207} 207}
208 208
209static inline int qt2_setregister(struct usb_device *dev, 209static inline int qt2_setregister(struct usb_device *dev,
@@ -372,9 +372,11 @@ static int qt2_open(struct tty_struct *tty, struct usb_serial_port *port)
372 0xc0, 0, 372 0xc0, 0,
373 device_port, data, 2, QT2_USB_TIMEOUT); 373 device_port, data, 2, QT2_USB_TIMEOUT);
374 374
375 if (status < 0) { 375 if (status < 2) {
376 dev_err(&port->dev, "%s - open port failed %i\n", __func__, 376 dev_err(&port->dev, "%s - open port failed %i\n", __func__,
377 status); 377 status);
378 if (status >= 0)
379 status = -EIO;
378 kfree(data); 380 kfree(data);
379 return status; 381 return status;
380 } 382 }
@@ -463,7 +465,6 @@ static int get_serial_info(struct usb_serial_port *port,
463 tmp.line = port->minor; 465 tmp.line = port->minor;
464 tmp.port = 0; 466 tmp.port = 0;
465 tmp.irq = 0; 467 tmp.irq = 0;
466 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
467 tmp.xmit_fifo_size = port->bulk_out_size; 468 tmp.xmit_fifo_size = port->bulk_out_size;
468 tmp.baud_base = 9600; 469 tmp.baud_base = 9600;
469 tmp.close_delay = 5*HZ; 470 tmp.close_delay = 5*HZ;
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index e1994e264cc0..465e851b2815 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -137,24 +137,9 @@ static int is_himemory(const u8 ifnum,
137 return 0; 137 return 0;
138} 138}
139 139
140static int sierra_calc_interface(struct usb_serial *serial) 140static u8 sierra_interface_num(struct usb_serial *serial)
141{ 141{
142 int interface; 142 return serial->interface->cur_altsetting->desc.bInterfaceNumber;
143 struct usb_interface *p_interface;
144 struct usb_host_interface *p_host_interface;
145
146 /* Get the interface structure pointer from the serial struct */
147 p_interface = serial->interface;
148
149 /* Get a pointer to the host interface structure */
150 p_host_interface = p_interface->cur_altsetting;
151
152 /* read the interface descriptor for this active altsetting
153 * to find out the interface number we are on
154 */
155 interface = p_host_interface->desc.bInterfaceNumber;
156
157 return interface;
158} 143}
159 144
160static int sierra_probe(struct usb_serial *serial, 145static int sierra_probe(struct usb_serial *serial,
@@ -165,7 +150,7 @@ static int sierra_probe(struct usb_serial *serial,
165 u8 ifnum; 150 u8 ifnum;
166 151
167 udev = serial->dev; 152 udev = serial->dev;
168 ifnum = sierra_calc_interface(serial); 153 ifnum = sierra_interface_num(serial);
169 154
170 /* 155 /*
171 * If this interface supports more than 1 alternate 156 * If this interface supports more than 1 alternate
@@ -178,9 +163,6 @@ static int sierra_probe(struct usb_serial *serial,
178 usb_set_interface(udev, ifnum, 1); 163 usb_set_interface(udev, ifnum, 1);
179 } 164 }
180 165
181 /* ifnum could have changed - by calling usb_set_interface */
182 ifnum = sierra_calc_interface(serial);
183
184 if (is_blacklisted(ifnum, 166 if (is_blacklisted(ifnum,
185 (struct sierra_iface_info *)id->driver_info)) { 167 (struct sierra_iface_info *)id->driver_info)) {
186 dev_dbg(&serial->dev->dev, 168 dev_dbg(&serial->dev->dev,
@@ -342,7 +324,7 @@ static int sierra_send_setup(struct usb_serial_port *port)
342 324
343 /* If composite device then properly report interface */ 325 /* If composite device then properly report interface */
344 if (serial->num_ports == 1) { 326 if (serial->num_ports == 1) {
345 interface = sierra_calc_interface(serial); 327 interface = sierra_interface_num(serial);
346 /* Control message is sent only to interfaces with 328 /* Control message is sent only to interfaces with
347 * interrupt_in endpoints 329 * interrupt_in endpoints
348 */ 330 */
@@ -916,7 +898,7 @@ static int sierra_port_probe(struct usb_serial_port *port)
916 /* Determine actual memory requirements */ 898 /* Determine actual memory requirements */
917 if (serial->num_ports == 1) { 899 if (serial->num_ports == 1) {
918 /* Get interface number for composite device */ 900 /* Get interface number for composite device */
919 ifnum = sierra_calc_interface(serial); 901 ifnum = sierra_interface_num(serial);
920 himemoryp = &typeB_interface_list; 902 himemoryp = &typeB_interface_list;
921 } else { 903 } else {
922 /* This is really the usb-serial port number of the interface 904 /* This is really the usb-serial port number of the interface
diff --git a/drivers/usb/serial/spcp8x5.c b/drivers/usb/serial/spcp8x5.c
index 475e6c31b266..ddfd787c461c 100644
--- a/drivers/usb/serial/spcp8x5.c
+++ b/drivers/usb/serial/spcp8x5.c
@@ -232,11 +232,17 @@ static int spcp8x5_get_msr(struct usb_serial_port *port, u8 *status)
232 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 232 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
233 GET_UART_STATUS, GET_UART_STATUS_TYPE, 233 GET_UART_STATUS, GET_UART_STATUS_TYPE,
234 0, GET_UART_STATUS_MSR, buf, 1, 100); 234 0, GET_UART_STATUS_MSR, buf, 1, 100);
235 if (ret < 0) 235 if (ret < 1) {
236 dev_err(&port->dev, "failed to get modem status: %d\n", ret); 236 dev_err(&port->dev, "failed to get modem status: %d\n", ret);
237 if (ret >= 0)
238 ret = -EIO;
239 goto out;
240 }
237 241
238 dev_dbg(&port->dev, "0xc0:0x22:0:6 %d - 0x02%x\n", ret, *buf); 242 dev_dbg(&port->dev, "0xc0:0x22:0:6 %d - 0x02%x\n", ret, *buf);
239 *status = *buf; 243 *status = *buf;
244 ret = 0;
245out:
240 kfree(buf); 246 kfree(buf);
241 247
242 return ret; 248 return ret;
diff --git a/drivers/usb/serial/ssu100.c b/drivers/usb/serial/ssu100.c
index 2a156144c76c..5aa7bbbeba3d 100644
--- a/drivers/usb/serial/ssu100.c
+++ b/drivers/usb/serial/ssu100.c
@@ -80,9 +80,17 @@ static inline int ssu100_setdevice(struct usb_device *dev, u8 *data)
80 80
81static inline int ssu100_getdevice(struct usb_device *dev, u8 *data) 81static inline int ssu100_getdevice(struct usb_device *dev, u8 *data)
82{ 82{
83 return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 83 int ret;
84 QT_SET_GET_DEVICE, 0xc0, 0, 0, 84
85 data, 3, 300); 85 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
86 QT_SET_GET_DEVICE, 0xc0, 0, 0,
87 data, 3, 300);
88 if (ret < 3) {
89 if (ret >= 0)
90 ret = -EIO;
91 }
92
93 return ret;
86} 94}
87 95
88static inline int ssu100_getregister(struct usb_device *dev, 96static inline int ssu100_getregister(struct usb_device *dev,
@@ -90,10 +98,17 @@ static inline int ssu100_getregister(struct usb_device *dev,
90 unsigned short reg, 98 unsigned short reg,
91 u8 *data) 99 u8 *data)
92{ 100{
93 return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 101 int ret;
94 QT_SET_GET_REGISTER, 0xc0, reg, 102
95 uart, data, sizeof(*data), 300); 103 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
104 QT_SET_GET_REGISTER, 0xc0, reg,
105 uart, data, sizeof(*data), 300);
106 if (ret < sizeof(*data)) {
107 if (ret >= 0)
108 ret = -EIO;
109 }
96 110
111 return ret;
97} 112}
98 113
99 114
@@ -289,8 +304,10 @@ static int ssu100_open(struct tty_struct *tty, struct usb_serial_port *port)
289 QT_OPEN_CLOSE_CHANNEL, 304 QT_OPEN_CLOSE_CHANNEL,
290 QT_TRANSFER_IN, 0x01, 305 QT_TRANSFER_IN, 0x01,
291 0, data, 2, 300); 306 0, data, 2, 300);
292 if (result < 0) { 307 if (result < 2) {
293 dev_dbg(&port->dev, "%s - open failed %i\n", __func__, result); 308 dev_dbg(&port->dev, "%s - open failed %i\n", __func__, result);
309 if (result >= 0)
310 result = -EIO;
294 kfree(data); 311 kfree(data);
295 return result; 312 return result;
296 } 313 }
@@ -322,7 +339,6 @@ static int get_serial_info(struct usb_serial_port *port,
322 tmp.line = port->minor; 339 tmp.line = port->minor;
323 tmp.port = 0; 340 tmp.port = 0;
324 tmp.irq = 0; 341 tmp.irq = 0;
325 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
326 tmp.xmit_fifo_size = port->bulk_out_size; 342 tmp.xmit_fifo_size = port->bulk_out_size;
327 tmp.baud_base = 9600; 343 tmp.baud_base = 9600;
328 tmp.close_delay = 5*HZ; 344 tmp.close_delay = 5*HZ;
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
index 64b85b8dedf3..3107bf5d1c96 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.c
+++ b/drivers/usb/serial/ti_usb_3410_5052.c
@@ -1553,13 +1553,10 @@ static int ti_command_out_sync(struct ti_device *tdev, __u8 command,
1553 (USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT), 1553 (USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT),
1554 value, moduleid, data, size, 1000); 1554 value, moduleid, data, size, 1000);
1555 1555
1556 if (status == size) 1556 if (status < 0)
1557 status = 0; 1557 return status;
1558
1559 if (status > 0)
1560 status = -ECOMM;
1561 1558
1562 return status; 1559 return 0;
1563} 1560}
1564 1561
1565 1562
@@ -1575,8 +1572,7 @@ static int ti_command_in_sync(struct ti_device *tdev, __u8 command,
1575 1572
1576 if (status == size) 1573 if (status == size)
1577 status = 0; 1574 status = 0;
1578 1575 else if (status >= 0)
1579 if (status > 0)
1580 status = -ECOMM; 1576 status = -ECOMM;
1581 1577
1582 return status; 1578 return status;
diff --git a/drivers/usb/serial/upd78f0730.c b/drivers/usb/serial/upd78f0730.c
new file mode 100644
index 000000000000..a028dd2310c9
--- /dev/null
+++ b/drivers/usb/serial/upd78f0730.c
@@ -0,0 +1,441 @@
1/*
2 * Renesas Electronics uPD78F0730 USB to serial converter driver
3 *
4 * Copyright (C) 2014,2016 Maksim Salau <maksim.salau@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * Protocol of the adaptor is described in the application note U19660EJ1V0AN00
11 * μPD78F0730 8-bit Single-Chip Microcontroller
12 * USB-to-Serial Conversion Software
13 * <https://www.renesas.com/en-eu/doc/DocumentServer/026/U19660EJ1V0AN00.pdf>
14 *
15 * The adaptor functionality is limited to the following:
16 * - data bits: 7 or 8
17 * - stop bits: 1 or 2
18 * - parity: even, odd or none
19 * - flow control: none
20 * - baud rates: 0, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 153600
21 * - signals: DTR, RTS and BREAK
22 */
23
24#include <linux/module.h>
25#include <linux/slab.h>
26#include <linux/tty.h>
27#include <linux/usb.h>
28#include <linux/usb/serial.h>
29
30#define DRIVER_DESC "Renesas uPD78F0730 USB to serial converter driver"
31
32#define DRIVER_AUTHOR "Maksim Salau <maksim.salau@gmail.com>"
33
34static const struct usb_device_id id_table[] = {
35 { USB_DEVICE(0x0409, 0x0063) }, /* V850ESJX3-STICK */
36 { USB_DEVICE(0x045B, 0x0212) }, /* YRPBRL78G13, YRPBRL78G14 */
37 { USB_DEVICE(0x064B, 0x7825) }, /* Analog Devices EVAL-ADXL362Z-DB */
38 {}
39};
40
41MODULE_DEVICE_TABLE(usb, id_table);
42
43/*
44 * Each adaptor is associated with a private structure, that holds the current
45 * state of control signals (DTR, RTS and BREAK).
46 */
47struct upd78f0730_port_private {
48 struct mutex lock; /* mutex to protect line_signals */
49 u8 line_signals;
50};
51
52/* Op-codes of control commands */
53#define UPD78F0730_CMD_LINE_CONTROL 0x00
54#define UPD78F0730_CMD_SET_DTR_RTS 0x01
55#define UPD78F0730_CMD_SET_XON_XOFF_CHR 0x02
56#define UPD78F0730_CMD_OPEN_CLOSE 0x03
57#define UPD78F0730_CMD_SET_ERR_CHR 0x04
58
59/* Data sizes in UPD78F0730_CMD_LINE_CONTROL command */
60#define UPD78F0730_DATA_SIZE_7_BITS 0x00
61#define UPD78F0730_DATA_SIZE_8_BITS 0x01
62#define UPD78F0730_DATA_SIZE_MASK 0x01
63
64/* Stop-bit modes in UPD78F0730_CMD_LINE_CONTROL command */
65#define UPD78F0730_STOP_BIT_1_BIT 0x00
66#define UPD78F0730_STOP_BIT_2_BIT 0x02
67#define UPD78F0730_STOP_BIT_MASK 0x02
68
69/* Parity modes in UPD78F0730_CMD_LINE_CONTROL command */
70#define UPD78F0730_PARITY_NONE 0x00
71#define UPD78F0730_PARITY_EVEN 0x04
72#define UPD78F0730_PARITY_ODD 0x08
73#define UPD78F0730_PARITY_MASK 0x0C
74
75/* Flow control modes in UPD78F0730_CMD_LINE_CONTROL command */
76#define UPD78F0730_FLOW_CONTROL_NONE 0x00
77#define UPD78F0730_FLOW_CONTROL_HW 0x10
78#define UPD78F0730_FLOW_CONTROL_SW 0x20
79#define UPD78F0730_FLOW_CONTROL_MASK 0x30
80
81/* Control signal bits in UPD78F0730_CMD_SET_DTR_RTS command */
82#define UPD78F0730_RTS 0x01
83#define UPD78F0730_DTR 0x02
84#define UPD78F0730_BREAK 0x04
85
86/* Port modes in UPD78F0730_CMD_OPEN_CLOSE command */
87#define UPD78F0730_PORT_CLOSE 0x00
88#define UPD78F0730_PORT_OPEN 0x01
89
90/* Error character substitution modes in UPD78F0730_CMD_SET_ERR_CHR command */
91#define UPD78F0730_ERR_CHR_DISABLED 0x00
92#define UPD78F0730_ERR_CHR_ENABLED 0x01
93
94/*
95 * Declaration of command structures
96 */
97
98/* UPD78F0730_CMD_LINE_CONTROL command */
99struct upd78f0730_line_control {
100 u8 opcode;
101 __le32 baud_rate;
102 u8 params;
103} __packed;
104
105/* UPD78F0730_CMD_SET_DTR_RTS command */
106struct upd78f0730_set_dtr_rts {
107 u8 opcode;
108 u8 params;
109};
110
111/* UPD78F0730_CMD_SET_XON_OFF_CHR command */
112struct upd78f0730_set_xon_xoff_chr {
113 u8 opcode;
114 u8 xon;
115 u8 xoff;
116};
117
118/* UPD78F0730_CMD_OPEN_CLOSE command */
119struct upd78f0730_open_close {
120 u8 opcode;
121 u8 state;
122};
123
124/* UPD78F0730_CMD_SET_ERR_CHR command */
125struct upd78f0730_set_err_chr {
126 u8 opcode;
127 u8 state;
128 u8 err_char;
129};
130
131static int upd78f0730_send_ctl(struct usb_serial_port *port,
132 const void *data, int size)
133{
134 struct usb_device *usbdev = port->serial->dev;
135 void *buf;
136 int res;
137
138 if (size <= 0 || !data)
139 return -EINVAL;
140
141 buf = kmemdup(data, size, GFP_KERNEL);
142 if (!buf)
143 return -ENOMEM;
144
145 res = usb_control_msg(usbdev, usb_sndctrlpipe(usbdev, 0), 0x00,
146 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
147 0x0000, 0x0000, buf, size, USB_CTRL_SET_TIMEOUT);
148
149 kfree(buf);
150
151 if (res != size) {
152 struct device *dev = &port->dev;
153
154 dev_err(dev, "failed to send control request %02x: %d\n",
155 *(u8 *)data, res);
156 /* The maximum expected length of a transfer is 6 bytes */
157 if (res >= 0)
158 res = -EIO;
159
160 return res;
161 }
162
163 return 0;
164}
165
166static int upd78f0730_port_probe(struct usb_serial_port *port)
167{
168 struct upd78f0730_port_private *private;
169
170 private = kzalloc(sizeof(*private), GFP_KERNEL);
171 if (!private)
172 return -ENOMEM;
173
174 mutex_init(&private->lock);
175 usb_set_serial_port_data(port, private);
176
177 return 0;
178}
179
180static int upd78f0730_port_remove(struct usb_serial_port *port)
181{
182 struct upd78f0730_port_private *private;
183
184 private = usb_get_serial_port_data(port);
185 mutex_destroy(&private->lock);
186 kfree(private);
187
188 return 0;
189}
190
191static int upd78f0730_tiocmget(struct tty_struct *tty)
192{
193 struct device *dev = tty->dev;
194 struct upd78f0730_port_private *private;
195 struct usb_serial_port *port = tty->driver_data;
196 int signals;
197 int res;
198
199 private = usb_get_serial_port_data(port);
200
201 mutex_lock(&private->lock);
202 signals = private->line_signals;
203 mutex_unlock(&private->lock);
204
205 res = ((signals & UPD78F0730_DTR) ? TIOCM_DTR : 0) |
206 ((signals & UPD78F0730_RTS) ? TIOCM_RTS : 0);
207
208 dev_dbg(dev, "%s - res = %x\n", __func__, res);
209
210 return res;
211}
212
213static int upd78f0730_tiocmset(struct tty_struct *tty,
214 unsigned int set, unsigned int clear)
215{
216 struct device *dev = tty->dev;
217 struct usb_serial_port *port = tty->driver_data;
218 struct upd78f0730_port_private *private;
219 struct upd78f0730_set_dtr_rts request;
220 int res;
221
222 private = usb_get_serial_port_data(port);
223
224 mutex_lock(&private->lock);
225 if (set & TIOCM_DTR) {
226 private->line_signals |= UPD78F0730_DTR;
227 dev_dbg(dev, "%s - set DTR\n", __func__);
228 }
229 if (set & TIOCM_RTS) {
230 private->line_signals |= UPD78F0730_RTS;
231 dev_dbg(dev, "%s - set RTS\n", __func__);
232 }
233 if (clear & TIOCM_DTR) {
234 private->line_signals &= ~UPD78F0730_DTR;
235 dev_dbg(dev, "%s - clear DTR\n", __func__);
236 }
237 if (clear & TIOCM_RTS) {
238 private->line_signals &= ~UPD78F0730_RTS;
239 dev_dbg(dev, "%s - clear RTS\n", __func__);
240 }
241 request.opcode = UPD78F0730_CMD_SET_DTR_RTS;
242 request.params = private->line_signals;
243
244 res = upd78f0730_send_ctl(port, &request, sizeof(request));
245 mutex_unlock(&private->lock);
246
247 return res;
248}
249
250static void upd78f0730_break_ctl(struct tty_struct *tty, int break_state)
251{
252 struct device *dev = tty->dev;
253 struct upd78f0730_port_private *private;
254 struct usb_serial_port *port = tty->driver_data;
255 struct upd78f0730_set_dtr_rts request;
256
257 private = usb_get_serial_port_data(port);
258
259 mutex_lock(&private->lock);
260 if (break_state) {
261 private->line_signals |= UPD78F0730_BREAK;
262 dev_dbg(dev, "%s - set BREAK\n", __func__);
263 } else {
264 private->line_signals &= ~UPD78F0730_BREAK;
265 dev_dbg(dev, "%s - clear BREAK\n", __func__);
266 }
267 request.opcode = UPD78F0730_CMD_SET_DTR_RTS;
268 request.params = private->line_signals;
269
270 upd78f0730_send_ctl(port, &request, sizeof(request));
271 mutex_unlock(&private->lock);
272}
273
274static void upd78f0730_dtr_rts(struct usb_serial_port *port, int on)
275{
276 struct tty_struct *tty = port->port.tty;
277 unsigned int set = 0;
278 unsigned int clear = 0;
279
280 if (on)
281 set = TIOCM_DTR | TIOCM_RTS;
282 else
283 clear = TIOCM_DTR | TIOCM_RTS;
284
285 upd78f0730_tiocmset(tty, set, clear);
286}
287
288static speed_t upd78f0730_get_baud_rate(struct tty_struct *tty)
289{
290 const speed_t baud_rate = tty_get_baud_rate(tty);
291 const speed_t supported[] = {
292 0, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 153600
293 };
294 int i;
295
296 for (i = ARRAY_SIZE(supported) - 1; i >= 0; i--) {
297 if (baud_rate == supported[i])
298 return baud_rate;
299 }
300
301 /* If the baud rate is not supported, switch to the default one */
302 tty_encode_baud_rate(tty, 9600, 9600);
303
304 return tty_get_baud_rate(tty);
305}
306
307static void upd78f0730_set_termios(struct tty_struct *tty,
308 struct usb_serial_port *port,
309 struct ktermios *old_termios)
310{
311 struct device *dev = &port->dev;
312 struct upd78f0730_line_control request;
313 speed_t baud_rate;
314
315 if (old_termios && !tty_termios_hw_change(&tty->termios, old_termios))
316 return;
317
318 if (C_BAUD(tty) == B0)
319 upd78f0730_dtr_rts(port, 0);
320 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
321 upd78f0730_dtr_rts(port, 1);
322
323 baud_rate = upd78f0730_get_baud_rate(tty);
324 request.opcode = UPD78F0730_CMD_LINE_CONTROL;
325 request.baud_rate = cpu_to_le32(baud_rate);
326 request.params = 0;
327 dev_dbg(dev, "%s - baud rate = %d\n", __func__, baud_rate);
328
329 switch (C_CSIZE(tty)) {
330 case CS7:
331 request.params |= UPD78F0730_DATA_SIZE_7_BITS;
332 dev_dbg(dev, "%s - 7 data bits\n", __func__);
333 break;
334 default:
335 tty->termios.c_cflag &= ~CSIZE;
336 tty->termios.c_cflag |= CS8;
337 dev_warn(dev, "data size is not supported, using 8 bits\n");
338 /* fall through */
339 case CS8:
340 request.params |= UPD78F0730_DATA_SIZE_8_BITS;
341 dev_dbg(dev, "%s - 8 data bits\n", __func__);
342 break;
343 }
344
345 if (C_PARENB(tty)) {
346 if (C_PARODD(tty)) {
347 request.params |= UPD78F0730_PARITY_ODD;
348 dev_dbg(dev, "%s - odd parity\n", __func__);
349 } else {
350 request.params |= UPD78F0730_PARITY_EVEN;
351 dev_dbg(dev, "%s - even parity\n", __func__);
352 }
353
354 if (C_CMSPAR(tty)) {
355 tty->termios.c_cflag &= ~CMSPAR;
356 dev_warn(dev, "MARK/SPACE parity is not supported\n");
357 }
358 } else {
359 request.params |= UPD78F0730_PARITY_NONE;
360 dev_dbg(dev, "%s - no parity\n", __func__);
361 }
362
363 if (C_CSTOPB(tty)) {
364 request.params |= UPD78F0730_STOP_BIT_2_BIT;
365 dev_dbg(dev, "%s - 2 stop bits\n", __func__);
366 } else {
367 request.params |= UPD78F0730_STOP_BIT_1_BIT;
368 dev_dbg(dev, "%s - 1 stop bit\n", __func__);
369 }
370
371 if (C_CRTSCTS(tty)) {
372 tty->termios.c_cflag &= ~CRTSCTS;
373 dev_warn(dev, "RTSCTS flow control is not supported\n");
374 }
375 if (I_IXOFF(tty) || I_IXON(tty)) {
376 tty->termios.c_iflag &= ~(IXOFF | IXON);
377 dev_warn(dev, "XON/XOFF flow control is not supported\n");
378 }
379 request.params |= UPD78F0730_FLOW_CONTROL_NONE;
380 dev_dbg(dev, "%s - no flow control\n", __func__);
381
382 upd78f0730_send_ctl(port, &request, sizeof(request));
383}
384
385static int upd78f0730_open(struct tty_struct *tty, struct usb_serial_port *port)
386{
387 struct upd78f0730_open_close request = {
388 .opcode = UPD78F0730_CMD_OPEN_CLOSE,
389 .state = UPD78F0730_PORT_OPEN
390 };
391 int res;
392
393 res = upd78f0730_send_ctl(port, &request, sizeof(request));
394 if (res)
395 return res;
396
397 if (tty)
398 upd78f0730_set_termios(tty, port, NULL);
399
400 return usb_serial_generic_open(tty, port);
401}
402
403static void upd78f0730_close(struct usb_serial_port *port)
404{
405 struct upd78f0730_open_close request = {
406 .opcode = UPD78F0730_CMD_OPEN_CLOSE,
407 .state = UPD78F0730_PORT_CLOSE
408 };
409
410 usb_serial_generic_close(port);
411 upd78f0730_send_ctl(port, &request, sizeof(request));
412}
413
414static struct usb_serial_driver upd78f0730_device = {
415 .driver = {
416 .owner = THIS_MODULE,
417 .name = "upd78f0730",
418 },
419 .id_table = id_table,
420 .num_ports = 1,
421 .port_probe = upd78f0730_port_probe,
422 .port_remove = upd78f0730_port_remove,
423 .open = upd78f0730_open,
424 .close = upd78f0730_close,
425 .set_termios = upd78f0730_set_termios,
426 .tiocmget = upd78f0730_tiocmget,
427 .tiocmset = upd78f0730_tiocmset,
428 .dtr_rts = upd78f0730_dtr_rts,
429 .break_ctl = upd78f0730_break_ctl,
430};
431
432static struct usb_serial_driver * const serial_drivers[] = {
433 &upd78f0730_device,
434 NULL
435};
436
437module_usb_serial_driver(serial_drivers, id_table);
438
439MODULE_DESCRIPTION(DRIVER_DESC);
440MODULE_AUTHOR(DRIVER_AUTHOR);
441MODULE_LICENSE("GPL v2");
diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c
index d3ea90bef84d..5ab65eb1dacc 100644
--- a/drivers/usb/serial/whiteheat.c
+++ b/drivers/usb/serial/whiteheat.c
@@ -487,7 +487,6 @@ static int whiteheat_ioctl(struct tty_struct *tty,
487 serstruct.type = PORT_16654; 487 serstruct.type = PORT_16654;
488 serstruct.line = port->minor; 488 serstruct.line = port->minor;
489 serstruct.port = port->port_number; 489 serstruct.port = port->port_number;
490 serstruct.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
491 serstruct.xmit_fifo_size = kfifo_size(&port->write_fifo); 490 serstruct.xmit_fifo_size = kfifo_size(&port->write_fifo);
492 serstruct.custom_divisor = 0; 491 serstruct.custom_divisor = 0;
493 serstruct.baud_base = 460800; 492 serstruct.baud_base = 460800;
diff --git a/drivers/usb/storage/ene_ub6250.c b/drivers/usb/storage/ene_ub6250.c
index 02bdaa912164..369f3c24815a 100644
--- a/drivers/usb/storage/ene_ub6250.c
+++ b/drivers/usb/storage/ene_ub6250.c
@@ -1364,7 +1364,6 @@ static int ms_lib_read_extra(struct us_data *us, u32 PhyBlock,
1364 1364
1365static int ms_libsearch_block_from_physical(struct us_data *us, u16 phyblk) 1365static int ms_libsearch_block_from_physical(struct us_data *us, u16 phyblk)
1366{ 1366{
1367 u16 Newblk;
1368 u16 blk; 1367 u16 blk;
1369 struct ms_lib_type_extdat extdat; /* need check */ 1368 struct ms_lib_type_extdat extdat; /* need check */
1370 struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; 1369 struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra;
@@ -1377,7 +1376,6 @@ static int ms_libsearch_block_from_physical(struct us_data *us, u16 phyblk)
1377 if ((blk & MS_PHYSICAL_BLOCKS_PER_SEGMENT_MASK) == 0) 1376 if ((blk & MS_PHYSICAL_BLOCKS_PER_SEGMENT_MASK) == 0)
1378 blk -= MS_PHYSICAL_BLOCKS_PER_SEGMENT; 1377 blk -= MS_PHYSICAL_BLOCKS_PER_SEGMENT;
1379 1378
1380 Newblk = info->MS_Lib.Phy2LogMap[blk];
1381 if (info->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED_ERASED) { 1379 if (info->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED_ERASED) {
1382 return blk; 1380 return blk;
1383 } else if (info->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED) { 1381 } else if (info->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED) {
diff --git a/drivers/usb/storage/sddr09.c b/drivers/usb/storage/sddr09.c
index 3aeaa536c44f..44f8ffccd031 100644
--- a/drivers/usb/storage/sddr09.c
+++ b/drivers/usb/storage/sddr09.c
@@ -870,13 +870,12 @@ sddr09_write_lba(struct us_data *us, unsigned int lba,
870 unsigned int pagelen; 870 unsigned int pagelen;
871 unsigned char *bptr, *cptr, *xptr; 871 unsigned char *bptr, *cptr, *xptr;
872 unsigned char ecc[3]; 872 unsigned char ecc[3];
873 int i, result, isnew; 873 int i, result;
874 874
875 lbap = ((lba % 1000) << 1) | 0x1000; 875 lbap = ((lba % 1000) << 1) | 0x1000;
876 if (parity[MSB_of(lbap) ^ LSB_of(lbap)]) 876 if (parity[MSB_of(lbap) ^ LSB_of(lbap)])
877 lbap ^= 1; 877 lbap ^= 1;
878 pba = info->lba_to_pba[lba]; 878 pba = info->lba_to_pba[lba];
879 isnew = 0;
880 879
881 if (pba == UNDEF) { 880 if (pba == UNDEF) {
882 pba = sddr09_find_unused_pba(info, lba); 881 pba = sddr09_find_unused_pba(info, lba);
@@ -887,7 +886,6 @@ sddr09_write_lba(struct us_data *us, unsigned int lba,
887 } 886 }
888 info->pba_to_lba[pba] = lba; 887 info->pba_to_lba[pba] = lba;
889 info->lba_to_pba[lba] = pba; 888 info->lba_to_pba[lba] = pba;
890 isnew = 1;
891 } 889 }
892 890
893 if (pba == 1) { 891 if (pba == 1) {
diff --git a/drivers/usb/usbip/vhci_hcd.c b/drivers/usb/usbip/vhci_hcd.c
index c4724fb3a691..e4cb9f0625e8 100644
--- a/drivers/usb/usbip/vhci_hcd.c
+++ b/drivers/usb/usbip/vhci_hcd.c
@@ -313,6 +313,7 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
313 default: 313 default:
314 break; 314 break;
315 } 315 }
316 break;
316 default: 317 default:
317 usbip_dbg_vhci_rh(" ClearPortFeature: default %x\n", 318 usbip_dbg_vhci_rh(" ClearPortFeature: default %x\n",
318 wValue); 319 wValue);
diff --git a/include/linux/of_device.h b/include/linux/of_device.h
index cc7dd687a89d..e9afbcc8de12 100644
--- a/include/linux/of_device.h
+++ b/include/linux/of_device.h
@@ -37,6 +37,7 @@ extern const void *of_device_get_match_data(const struct device *dev);
37 37
38extern ssize_t of_device_get_modalias(struct device *dev, 38extern ssize_t of_device_get_modalias(struct device *dev,
39 char *str, ssize_t len); 39 char *str, ssize_t len);
40extern int of_device_request_module(struct device *dev);
40 41
41extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env); 42extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env);
42extern int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env); 43extern int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env);
@@ -78,6 +79,11 @@ static inline int of_device_get_modalias(struct device *dev,
78 return -ENODEV; 79 return -ENODEV;
79} 80}
80 81
82static inline int of_device_request_module(struct device *dev)
83{
84 return -ENODEV;
85}
86
81static inline int of_device_uevent_modalias(struct device *dev, 87static inline int of_device_uevent_modalias(struct device *dev,
82 struct kobj_uevent_env *env) 88 struct kobj_uevent_env *env)
83{ 89{
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 5dd75fa47dd8..c5fdfcf99828 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -12,16 +12,18 @@ struct ci_hdrc;
12 12
13/** 13/**
14 * struct ci_hdrc_cable - structure for external connector cable state tracking 14 * struct ci_hdrc_cable - structure for external connector cable state tracking
15 * @state: current state of the line 15 * @connected: true if cable is connected, false otherwise
16 * @changed: set to true when extcon event happen 16 * @changed: set to true when extcon event happen
17 * @enabled: set to true if we've enabled the vbus or id interrupt
17 * @edev: device which generate events 18 * @edev: device which generate events
18 * @ci: driver state of the chipidea device 19 * @ci: driver state of the chipidea device
19 * @nb: hold event notification callback 20 * @nb: hold event notification callback
20 * @conn: used for notification registration 21 * @conn: used for notification registration
21 */ 22 */
22struct ci_hdrc_cable { 23struct ci_hdrc_cable {
23 bool state; 24 bool connected;
24 bool changed; 25 bool changed;
26 bool enabled;
25 struct extcon_dev *edev; 27 struct extcon_dev *edev;
26 struct ci_hdrc *ci; 28 struct ci_hdrc *ci;
27 struct notifier_block nb; 29 struct notifier_block nb;
@@ -55,10 +57,11 @@ struct ci_hdrc_platform_data {
55#define CI_HDRC_OVERRIDE_AHB_BURST BIT(9) 57#define CI_HDRC_OVERRIDE_AHB_BURST BIT(9)
56#define CI_HDRC_OVERRIDE_TX_BURST BIT(10) 58#define CI_HDRC_OVERRIDE_TX_BURST BIT(10)
57#define CI_HDRC_OVERRIDE_RX_BURST BIT(11) 59#define CI_HDRC_OVERRIDE_RX_BURST BIT(11)
60#define CI_HDRC_OVERRIDE_PHY_CONTROL BIT(12) /* Glue layer manages phy */
58 enum usb_dr_mode dr_mode; 61 enum usb_dr_mode dr_mode;
59#define CI_HDRC_CONTROLLER_RESET_EVENT 0 62#define CI_HDRC_CONTROLLER_RESET_EVENT 0
60#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 63#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
61 void (*notify_event) (struct ci_hdrc *ci, unsigned event); 64 int (*notify_event) (struct ci_hdrc *ci, unsigned event);
62 struct regulator *reg_vbus; 65 struct regulator *reg_vbus;
63 struct usb_otg_caps ci_otg_caps; 66 struct usb_otg_caps ci_otg_caps;
64 bool tpl_support; 67 bool tpl_support;
diff --git a/tools/usb/ffs-test.c b/tools/usb/ffs-test.c
index 88d5e71be044..95dd14648ba5 100644
--- a/tools/usb/ffs-test.c
+++ b/tools/usb/ffs-test.c
@@ -22,7 +22,7 @@
22/* $(CROSS_COMPILE)cc -Wall -Wextra -g -o ffs-test ffs-test.c -lpthread */ 22/* $(CROSS_COMPILE)cc -Wall -Wextra -g -o ffs-test ffs-test.c -lpthread */
23 23
24 24
25#define _BSD_SOURCE /* for endian.h */ 25#define _DEFAULT_SOURCE /* for endian.h */
26 26
27#include <endian.h> 27#include <endian.h>
28#include <errno.h> 28#include <errno.h>
@@ -110,16 +110,25 @@ static const struct {
110 struct usb_functionfs_descs_head_v2 header; 110 struct usb_functionfs_descs_head_v2 header;
111 __le32 fs_count; 111 __le32 fs_count;
112 __le32 hs_count; 112 __le32 hs_count;
113 __le32 ss_count;
113 struct { 114 struct {
114 struct usb_interface_descriptor intf; 115 struct usb_interface_descriptor intf;
115 struct usb_endpoint_descriptor_no_audio sink; 116 struct usb_endpoint_descriptor_no_audio sink;
116 struct usb_endpoint_descriptor_no_audio source; 117 struct usb_endpoint_descriptor_no_audio source;
117 } __attribute__((packed)) fs_descs, hs_descs; 118 } __attribute__((packed)) fs_descs, hs_descs;
119 struct {
120 struct usb_interface_descriptor intf;
121 struct usb_endpoint_descriptor_no_audio sink;
122 struct usb_ss_ep_comp_descriptor sink_comp;
123 struct usb_endpoint_descriptor_no_audio source;
124 struct usb_ss_ep_comp_descriptor source_comp;
125 } ss_descs;
118} __attribute__((packed)) descriptors = { 126} __attribute__((packed)) descriptors = {
119 .header = { 127 .header = {
120 .magic = cpu_to_le32(FUNCTIONFS_DESCRIPTORS_MAGIC_V2), 128 .magic = cpu_to_le32(FUNCTIONFS_DESCRIPTORS_MAGIC_V2),
121 .flags = cpu_to_le32(FUNCTIONFS_HAS_FS_DESC | 129 .flags = cpu_to_le32(FUNCTIONFS_HAS_FS_DESC |
122 FUNCTIONFS_HAS_HS_DESC), 130 FUNCTIONFS_HAS_HS_DESC |
131 FUNCTIONFS_HAS_SS_DESC),
123 .length = cpu_to_le32(sizeof descriptors), 132 .length = cpu_to_le32(sizeof descriptors),
124 }, 133 },
125 .fs_count = cpu_to_le32(3), 134 .fs_count = cpu_to_le32(3),
@@ -171,6 +180,45 @@ static const struct {
171 .bInterval = 1, /* NAK every 1 uframe */ 180 .bInterval = 1, /* NAK every 1 uframe */
172 }, 181 },
173 }, 182 },
183 .ss_count = cpu_to_le32(5),
184 .ss_descs = {
185 .intf = {
186 .bLength = sizeof descriptors.fs_descs.intf,
187 .bDescriptorType = USB_DT_INTERFACE,
188 .bNumEndpoints = 2,
189 .bInterfaceClass = USB_CLASS_VENDOR_SPEC,
190 .iInterface = 1,
191 },
192 .sink = {
193 .bLength = sizeof descriptors.hs_descs.sink,
194 .bDescriptorType = USB_DT_ENDPOINT,
195 .bEndpointAddress = 1 | USB_DIR_IN,
196 .bmAttributes = USB_ENDPOINT_XFER_BULK,
197 .wMaxPacketSize = cpu_to_le16(1024),
198 },
199 .sink_comp = {
200 .bLength = USB_DT_SS_EP_COMP_SIZE,
201 .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
202 .bMaxBurst = 0,
203 .bmAttributes = 0,
204 .wBytesPerInterval = 0,
205 },
206 .source = {
207 .bLength = sizeof descriptors.hs_descs.source,
208 .bDescriptorType = USB_DT_ENDPOINT,
209 .bEndpointAddress = 2 | USB_DIR_OUT,
210 .bmAttributes = USB_ENDPOINT_XFER_BULK,
211 .wMaxPacketSize = cpu_to_le16(1024),
212 .bInterval = 1, /* NAK every 1 uframe */
213 },
214 .source_comp = {
215 .bLength = USB_DT_SS_EP_COMP_SIZE,
216 .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
217 .bMaxBurst = 0,
218 .bmAttributes = 0,
219 .wBytesPerInterval = 0,
220 },
221 },
174}; 222};
175 223
176static size_t descs_to_legacy(void **legacy, const void *descriptors_v2) 224static size_t descs_to_legacy(void **legacy, const void *descriptors_v2)
diff --git a/tools/usb/usbip/README b/tools/usb/usbip/README
index 831f49fea3ce..5eb2b6c7722b 100644
--- a/tools/usb/usbip/README
+++ b/tools/usb/usbip/README
@@ -4,10 +4,33 @@
4# Copyright (C) 2011 matt mooney <mfm@muteddisk.com> 4# Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
5# 2005-2008 Takahiro Hirofuchi 5# 2005-2008 Takahiro Hirofuchi
6 6
7[Overview]
8USB/IP protocol allows to pass USB device from server to client over the
9network. Server is a machine which provides (shares) a USB device. Client is
10a machine which uses USB device provided by server over the network.
11The USB device may be either physical device connected to a server or
12software entity created on a server using USB gadget subsystem.
13Whole project consists of four parts:
14
15 - usbip-vhci
16 A client side kernel module which provides a virtual USB Host Controller
17 and allows to import a USB device from a remote machine.
18
19 - usbip-host (stub driver)
20 A server side module which provides a USB device driver which can be
21 bound to a physical USB device to make it exportable.
22
23 - usbip-vudc
24 A server side module which provides a virtual USB Device Controller and allows
25 to export a USB device created using USB Gadget Subsystem.
26
27 - usbip-utils
28 A set of userspace tools used to handle connection and management.
29 Used on both sides.
7 30
8[Requirements] 31[Requirements]
9 - USB/IP device drivers 32 - USB/IP device drivers
10 Found in the staging directory of the Linux kernel. 33 Found in the drivers/usb/usbip/ directory of the Linux kernel tree.
11 34
12 - libudev >= 2.0 35 - libudev >= 2.0
13 libudev library 36 libudev library
@@ -36,6 +59,10 @@
36 59
37 60
38[Usage] 61[Usage]
62On a server side there are two entities which can be shared.
63First of them is physical usb device connected to the machine.
64To make it available below steps should be executed:
65
39 server:# (Physically attach your USB device.) 66 server:# (Physically attach your USB device.)
40 67
41 server:# insmod usbip-core.ko 68 server:# insmod usbip-core.ko
@@ -52,6 +79,30 @@
52 - The USB device 1-2 is now exportable to other hosts! 79 - The USB device 1-2 is now exportable to other hosts!
53 - Use `usbip unbind --busid 1-2' to stop exporting the device. 80 - Use `usbip unbind --busid 1-2' to stop exporting the device.
54 81
82Second of shareable entities is USB Gadget created using USB Gadget Subsystem
83on a server machine. To make it available below steps should be executed:
84
85 server:# (Create your USB gadget)
86 - Currently the most preferable way of creating a new USB gadget
87 is ConfigFS Composite Gadget. Please refer to its documentation
88 for details.
89 - See vudc_server_example.sh for a short example of USB gadget creation
90
91 server:# insmod usbip-core.ko
92 server:# insmod usbip-vudc.ko
93 - To create more than one instance of vudc use num module param
94
95 server:# (Bind gadget to one of available vudc)
96 - Assign your new gadget to USB/IP UDC
97 - Using ConfigFS interface you may do this simply by:
98 server:# cd /sys/kernel/config/usb_gadget/<gadget_name>
99 server:# echo "usbip-vudc.0" > UDC
100
101 server:# usbipd -D --device
102 - Start usbip daemon.
103
104To attach new device to client machine below commands should be used:
105
55 client:# insmod usbip-core.ko 106 client:# insmod usbip-core.ko
56 client:# insmod vhci-hcd.ko 107 client:# insmod vhci-hcd.ko
57 108
@@ -60,6 +111,8 @@
60 111
61 client:# usbip attach --remote <host> --busid 1-2 112 client:# usbip attach --remote <host> --busid 1-2
62 - Connect the remote USB device. 113 - Connect the remote USB device.
114 - When using vudc on a server side busid is really vudc instance name.
115 For example: usbip-vudc.0
63 116
64 client:# usbip port 117 client:# usbip port
65 - Show virtual port status. 118 - Show virtual port status.
@@ -192,6 +245,8 @@ Detach the imported device:
192 - http://usbip.wiki.sourceforge.net/how-to-debug-usbip 245 - http://usbip.wiki.sourceforge.net/how-to-debug-usbip
193 - usbip-host.ko must be bound to the target device. 246 - usbip-host.ko must be bound to the target device.
194 - See /proc/bus/usb/devices and find "Driver=..." lines of the device. 247 - See /proc/bus/usb/devices and find "Driver=..." lines of the device.
248 - Target USB gadget must be bound to vudc
249 (using USB gadget susbsys, not usbip bind command)
195 - Shutdown firewall. 250 - Shutdown firewall.
196 - usbip now uses TCP port 3240. 251 - usbip now uses TCP port 3240.
197 - Disable SELinux. 252 - Disable SELinux.
diff --git a/tools/usb/usbip/vudc/vudc_server_example.sh b/tools/usb/usbip/vudc/vudc_server_example.sh
new file mode 100755
index 000000000000..2736be64f203
--- /dev/null
+++ b/tools/usb/usbip/vudc/vudc_server_example.sh
@@ -0,0 +1,107 @@
1#!/bin/bash
2
3################################################################################
4# This is free and unencumbered software released into the public domain.
5#
6# Anyone is free to copy, modify, publish, use, compile, sell, or
7# distribute this software, either in source code form or as a compiled
8# binary, for any purpose, commercial or non-commercial, and by any
9# means.
10#
11# In jurisdictions that recognize copyright laws, the author or authors
12# of this software dedicate any and all copyright interest in the
13# software to the public domain. We make this dedication for the benefit
14# of the public at large and to the detriment of our heirs and
15# successors. We intend this dedication to be an overt act of
16# relinquishment in perpetuity of all present and future rights to this
17# software under copyright law.
18#
19# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22# IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25# OTHER DEALINGS IN THE SOFTWARE.
26#
27# For more information, please refer to <http://unlicense.org/>
28################################################################################
29
30################################################################################
31# This is a sample script which shows how to use vUDC with ConfigFS gadgets
32################################################################################
33
34# Stop script on error
35set -e
36
37################################################################################
38# Create your USB gadget
39# You may use bare ConfigFS interface (as below)
40# or libusbgx or gt toool
41# Instead of ConfigFS gadgets you may use any of legacy gadgets.
42################################################################################
43CONFIGFS_MOUNT_POINT="/sys/kernel/config"
44GADGET_NAME="g1"
45ID_VENDOR="0x1d6b"
46ID_PRODUCT="0x0104"
47
48cd ${CONFIGFS_MOUNT_POINT}/usb_gadget
49# Create a new USB gadget
50mkdir ${GADGET_NAME}
51cd ${GADGET_NAME}
52
53# This gadget contains one function - ACM (serial port over USB)
54FUNC_DIR="functions/acm.ser0"
55mkdir ${FUNC_DIR}
56
57# Just one configuration
58mkdir configs/c.1
59ln -s ${FUNC_DIR} configs/c.1
60
61# Set our gadget identity
62echo ${ID_VENDOR} > idVendor
63echo ${ID_PRODUCT} > idProduct
64
65################################################################################
66# Load vudc-module if vudc is not available
67# You may change value of num param to get more than one vUDC instance
68################################################################################
69[[ -d /sys/class/udc/usbip-vudc.0 ]] || modprobe usbip-vudc num=1
70
71################################################################################
72# Bind gadget to our vUDC
73# By default we bind to first one but you may change this if you would like
74# to use more than one instance
75################################################################################
76echo "usbip-vudc.0" > UDC
77
78################################################################################
79# Let's now run our usbip daemon in a USB device mode
80################################################################################
81usbipd --device &
82
83################################################################################
84# Now your USB gadget is available using USB/IP protocol.
85# To prepare your client, you should ensure that usbip-vhci module is inside
86# your kernel. If it's not then you can load it:
87#
88# $ modprobe usbip-vhci
89#
90# To check availability of your gadget you may try to list devices exported
91# on a remote server:
92#
93# $ modprobe usbip-vhci
94# $ usbip list -r $SERVER_IP
95# Exportable USB devices
96# ======================
97# usbipd: info: request 0x8005(6): complete
98# - 127.0.0.1
99# usbip-vudc.0: Linux Foundation : unknown product (1d6b:0104)
100# : /sys/devices/platform/usbip-vudc.0
101# : (Defined at Interface level) (00/00/00)
102#
103# To attach this device to your client you may use:
104#
105# $ usbip attach -r $SERVER_IP -d usbip-vudc.0
106#
107################################################################################