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authorArnd Bergmann <arnd@arndb.de>2018-01-05 11:07:32 -0500
committerArnd Bergmann <arnd@arndb.de>2018-01-05 11:07:32 -0500
commit7c179f9dff18423b18490dfc6b301301d223b16d (patch)
tree81e2f13028e236ab3515ca9d6d2f5f4260a82021
parentb55eb1ae91e986ff75b1cd6ff8889d056ad68a10 (diff)
parent84a82ef70e1eb2a7a90bc19eed27cb27a8e4c54c (diff)
Merge tag 'imx-dt-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "i.MX device tree changes for 4.16" from Shawn Guo: - A few random updates for vf610-zii board: correct switch EEPROM size, enable edma1, correct GPIO expander interrupt, add PHYs for switch2 device. - LS1021A device tree updates: add reboot and QSPI device nodes, label USB controllers, specify interrupt-affinity for PMU, fix TMR_FIPER1 setting, enable esdhc device, add Moxa UC-8410A board support. - A bunch of patches from Fabio: fix reg - unit address mismatches, remove leading zero in unit address, move regulators out of simple-bus, move nodes with no reg property out of bus, remove extra clock cell, add missing phy-cells to usb-nop-xceiv, etc. - A couple series from Hummingboard developers: re-organise device tree files for better handling various board versions, and then add the new hummingboard2 board support on top of that. - Disable AC'97 input pins pad and add support for powering off for imx6qdl-udoo board. - Convert from fbdev to drm bindings for imx6sx-sdb and imx6sl-evk board. - Add device tree for Variscite DART-MX6 SoM and Carrier-board support. - Add new board support of TS-4600 and TS-7970 from Technologic Systems. - A series from Stefan to update imx7-colibri device tree and then add new version of Toradex Colibri iMX7D board with eMMC support. - Other random updates on various board support. * tag 'imx-dt-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (126 commits) ARM: dts: imx7s: Avoid using label in unit address and reg ARM: dts: imx51-zii-rdu1: Add missing #phy-cells to usb-nop-xceiv ARM: dts: imx6qdl-hummingboard2: Remove leading zero in unit address ARM: dts: ls1021a: add support for Moxa UC-8410A open platform ARM: dts: imx51-babbage: Fix the 26MHz clock modelling ARM: dts: vf610-zii-dev-rev-b: add PHYs for switch2 ARM: dts: vf610-zii-dev-rev-b: fix interrupt for GPIO expander ARM: dts: vf610-zii-dev: enable edma1 ARM: dts: ls1021a-twr: Remove extra clock cell ARM: dts: ls1021a-qds: Remove extra clock cell ARM: dts: imx53: add srtc node dt-bindings: imx-gpcv2: Fix the unit address ARM: imx: dts: Use lower case for bindings notation ARM: dts: imx6q-h100: use usdhc2 VSELECT ARM: dts: imx6sx: Add support for PCI power domain ARM: dts: imx6sx: Fix PCI non-prefetchable memory range ARM: dts: imx6qdl-hummingboard2: rename regulators to match schematic ARM: dts: imx6qdl-hummingboard2: add v1.5 som with eMMC ARM: dts: imx6qdl-hummingboard2: add v1.5 som without eMMC ARM: dts: imx6qdl-hummingboard2: add PWM3 support ...
-rw-r--r--Documentation/devicetree/bindings/arm/technologic.txt11
-rw-r--r--Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.txt41
-rw-r--r--Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt4
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt1
-rw-r--r--arch/arm/boot/dts/Makefile22
-rw-r--r--arch/arm/boot/dts/imx25.dtsi2
-rw-r--r--arch/arm/boot/dts/imx27-pdk.dts1
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts1
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi1
-rw-r--r--arch/arm/boot/dts/imx28-ts4600.dts79
-rw-r--r--arch/arm/boot/dts/imx35.dtsi2
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts77
-rw-r--r--arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts1
-rw-r--r--arch/arm/boot/dts/imx51-ts4800.dts6
-rw-r--r--arch/arm/boot/dts/imx51-zii-rdu1.dts12
-rw-r--r--arch/arm/boot/dts/imx51.dtsi1
-rw-r--r--arch/arm/boot/dts/imx53-cx9020.dts2
-rw-r--r--arch/arm/boot/dts/imx53-m53.dtsi1
-rw-r--r--arch/arm/boot/dts/imx53-tx53-x03x.dts232
-rw-r--r--arch/arm/boot/dts/imx53-tx53.dtsi14
-rw-r--r--arch/arm/boot/dts/imx53.dtsi48
-rw-r--r--arch/arm/boot/dts/imx6dl-aristainetos_4.dts50
-rw-r--r--arch/arm/boot/dts/imx6dl-aristainetos_7.dts48
-rw-r--r--arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts2
-rw-r--r--arch/arm/boot/dts/imx6dl-cubox-i-emmc-som-v15.dts52
-rw-r--r--arch/arm/boot/dts/imx6dl-cubox-i-som-v15.dts51
-rw-r--r--arch/arm/boot/dts/imx6dl-cubox-i.dts2
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard-emmc-som-v15.dts53
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard-som-v15.dts52
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts2
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard2-emmc-som-v15.dts55
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard2-som-v15.dts54
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard2.dts53
-rw-r--r--arch/arm/boot/dts/imx6dl-pinfunc.h1
-rw-r--r--arch/arm/boot/dts/imx6dl-ts7970.dts50
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6q-apalis-eval.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-apalis-ixora.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-cubox-i-emmc-som-v15.dts60
-rw-r--r--arch/arm/boot/dts/imx6q-cubox-i-som-v15.dts59
-rw-r--r--arch/arm/boot/dts/imx6q-cubox-i.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-display5.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6q-h100.dts33
-rw-r--r--arch/arm/boot/dts/imx6q-hummingboard-emmc-som-v15.dts61
-rw-r--r--arch/arm/boot/dts/imx6q-hummingboard-som-v15.dts60
-rw-r--r--arch/arm/boot/dts/imx6q-hummingboard.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-hummingboard2-emmc-som-v15.dts63
-rw-r--r--arch/arm/boot/dts/imx6q-hummingboard2-som-v15.dts62
-rw-r--r--arch/arm/boot/dts/imx6q-hummingboard2.dts61
-rw-r--r--arch/arm/boot/dts/imx6q-pinfunc.h1
-rw-r--r--arch/arm/boot/dts/imx6q-ts7970.dts54
-rw-r--r--arch/arm/boot/dts/imx6q-var-dt6customboard.dts235
-rw-r--r--arch/arm/boot/dts/imx6qdl-apalis.dtsi1
-rw-r--r--arch/arm/boot/dts/imx6qdl-apf6dev.dtsi44
-rw-r--r--arch/arm/boot/dts/imx6qdl-aristainetos.dtsi73
-rw-r--r--arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi76
-rw-r--r--arch/arm/boot/dts/imx6qdl-colibri.dtsi1
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi72
-rw-r--r--arch/arm/boot/dts/imx6qdl-hummingboard.dtsi103
-rw-r--r--arch/arm/boot/dts/imx6qdl-hummingboard2-emmc.dtsi72
-rw-r--r--arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi540
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi10
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi17
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabreauto.dtsi9
-rw-r--r--arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi (renamed from arch/arm/boot/dts/imx6qdl-microsom.dtsi)41
-rw-r--r--arch/arm/boot/dts/imx6qdl-sr-som-emmc.dtsi70
-rw-r--r--arch/arm/boot/dts/imx6qdl-sr-som-ti.dtsi170
-rw-r--r--arch/arm/boot/dts/imx6qdl-sr-som.dtsi (renamed from arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi)36
-rw-r--r--arch/arm/boot/dts/imx6qdl-ts7970.dtsi594
-rw-r--r--arch/arm/boot/dts/imx6qdl-udoo.dtsi25
-rw-r--r--arch/arm/boot/dts/imx6qdl-var-dart.dtsi503
-rw-r--r--arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi5
-rw-r--r--arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi14
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi161
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts133
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi48
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb.dtsi220
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi93
-rw-r--r--arch/arm/boot/dts/imx6ul-14x14-evk.dts19
-rw-r--r--arch/arm/boot/dts/imx6ul.dtsi49
-rw-r--r--arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi39
-rw-r--r--arch/arm/boot/dts/imx7-colibri.dtsi116
-rw-r--r--arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts19
-rw-r--r--arch/arm/boot/dts/imx7d-colibri-emmc.dtsi21
-rw-r--r--arch/arm/boot/dts/imx7d-colibri-eval-v3.dts13
-rw-r--r--arch/arm/boot/dts/imx7d-colibri.dtsi4
-rw-r--r--arch/arm/boot/dts/imx7d-pico-pi.dts181
-rw-r--r--arch/arm/boot/dts/imx7d-pico.dtsi (renamed from arch/arm/boot/dts/imx7d-pico.dts)133
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi22
-rw-r--r--arch/arm/boot/dts/imx7s.dtsi133
-rw-r--r--arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts241
-rw-r--r--arch/arm/boot/dts/ls1021a-qds.dts7
-rw-r--r--arch/arm/boot/dts/ls1021a-twr.dts6
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi30
-rw-r--r--arch/arm/boot/dts/vf-colibri-eval-v3.dtsi2
-rw-r--r--arch/arm/boot/dts/vf500.dtsi2
-rw-r--r--arch/arm/boot/dts/vf610-zii-dev-rev-b.dts20
-rw-r--r--arch/arm/boot/dts/vf610-zii-dev-rev-c.dts4
-rw-r--r--arch/arm/boot/dts/vf610-zii-dev.dtsi4
-rw-r--r--arch/arm/boot/dts/vfxxx.dtsi10
101 files changed, 5005 insertions, 1058 deletions
diff --git a/Documentation/devicetree/bindings/arm/technologic.txt b/Documentation/devicetree/bindings/arm/technologic.txt
index 33797acad846..f1cedc00dcab 100644
--- a/Documentation/devicetree/bindings/arm/technologic.txt
+++ b/Documentation/devicetree/bindings/arm/technologic.txt
@@ -1,6 +1,11 @@
1Technologic Systems Platforms Device Tree Bindings 1Technologic Systems Platforms Device Tree Bindings
2-------------------------------------------------- 2--------------------------------------------------
3 3
4TS-4600 is a System-on-Module based on the Freescale i.MX28 System-on-Chip.
5It can be mounted on a carrier board providing additional peripheral connectors.
6Required root node properties:
7 - compatible = "technologic,imx28-ts4600", "fsl,imx28"
8
4TS-4800 board 9TS-4800 board
5Required root node properties: 10Required root node properties:
6 - compatible = "technologic,imx51-ts4800", "fsl,imx51"; 11 - compatible = "technologic,imx51-ts4800", "fsl,imx51";
@@ -10,3 +15,9 @@ It can be mounted on a carrier board providing additional peripheral connectors.
10Required root node properties: 15Required root node properties:
11 - compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl" 16 - compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl"
12 - compatible = "technologic,imx6q-ts4900", "fsl,imx6q" 17 - compatible = "technologic,imx6q-ts4900", "fsl,imx6q"
18
19TS-7970 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
20It can be mounted on a carrier board providing additional peripheral connectors.
21Required root node properties:
22 - compatible = "technologic,imx6dl-ts7970", "fsl,imx6dl"
23 - compatible = "technologic,imx6q-ts7970", "fsl,imx6q"
diff --git a/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.txt b/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.txt
new file mode 100644
index 000000000000..d06644b555bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.txt
@@ -0,0 +1,41 @@
1Solomon Goldentek Display GKTW70SDAE4SE LVDS Display Panel
2==========================================================
3
4The GKTW70SDAE4SE is a 7" WVGA TFT-LCD display panel.
5
6These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt
7with the following device-specific properties.
8
9Required properties:
10
11- compatible: Shall contain "sgd,gktw70sdae4se" and "panel-lvds", in that order.
12
13Example
14-------
15
16panel {
17 compatible = "sgd,gktw70sdae4se", "panel-lvds";
18
19 width-mm = <153>;
20 height-mm = <86>;
21
22 data-mapping = "jeida-18";
23
24 panel-timing {
25 clock-frequency = <32000000>;
26 hactive = <800>;
27 vactive = <480>;
28 hback-porch = <39>;
29 hfront-porch = <39>;
30 vback-porch = <29>;
31 vfront-porch = <13>;
32 hsync-len = <47>;
33 vsync-len = <2>;
34 };
35
36 port {
37 panel_in: endpoint {
38 remote-endpoint = <&lvds_encoder>;
39 };
40 };
41};
diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt
index 02f45c65fd87..9acce75b29ab 100644
--- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt
+++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt
@@ -44,10 +44,10 @@ Example:
44 #address-cells = <1>; 44 #address-cells = <1>;
45 #size-cells = <0>; 45 #size-cells = <0>;
46 46
47 pgc_pcie_phy: power-domain@3 { 47 pgc_pcie_phy: power-domain@1 {
48 #power-domain-cells = <0>; 48 #power-domain-cells = <0>;
49 49
50 reg = <IMX7_POWER_DOMAIN_PCIE_PHY>; 50 reg = <1>;
51 power-supply = <&reg_1p0d>; 51 power-supply = <&reg_1p0d>;
52 }; 52 };
53 }; 53 };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 9bce76f3118d..37f8c12eda19 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -306,6 +306,7 @@ seagate Seagate Technology PLC
306semtech Semtech Corporation 306semtech Semtech Corporation
307sensirion Sensirion AG 307sensirion Sensirion AG
308sff Small Form Factor Committee 308sff Small Form Factor Committee
309sgd Solomon Goldentek Display Corporation
309sgx SGX Sensortech 310sgx SGX Sensortech
310sharp Sharp Corporation 311sharp Sharp Corporation
311shimafuji Shimafuji Electric, Inc. 312shimafuji Shimafuji Electric, Inc.
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a89ffaff8e8f..f3d22db29775 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -373,6 +373,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
373 imx6dl-aristainetos2_7.dtb \ 373 imx6dl-aristainetos2_7.dtb \
374 imx6dl-colibri-eval-v3.dtb \ 374 imx6dl-colibri-eval-v3.dtb \
375 imx6dl-cubox-i.dtb \ 375 imx6dl-cubox-i.dtb \
376 imx6dl-cubox-i-emmc-som-v15.dtb \
377 imx6dl-cubox-i-som-v15.dtb \
376 imx6dl-dfi-fs700-m60.dtb \ 378 imx6dl-dfi-fs700-m60.dtb \
377 imx6dl-gw51xx.dtb \ 379 imx6dl-gw51xx.dtb \
378 imx6dl-gw52xx.dtb \ 380 imx6dl-gw52xx.dtb \
@@ -385,6 +387,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
385 imx6dl-gw5903.dtb \ 387 imx6dl-gw5903.dtb \
386 imx6dl-gw5904.dtb \ 388 imx6dl-gw5904.dtb \
387 imx6dl-hummingboard.dtb \ 389 imx6dl-hummingboard.dtb \
390 imx6dl-hummingboard-emmc-som-v15.dtb \
391 imx6dl-hummingboard-som-v15.dtb \
392 imx6dl-hummingboard2.dtb \
393 imx6dl-hummingboard2-emmc-som-v15.dtb \
394 imx6dl-hummingboard2-som-v15.dtb \
388 imx6dl-icore.dtb \ 395 imx6dl-icore.dtb \
389 imx6dl-icore-rqs.dtb \ 396 imx6dl-icore-rqs.dtb \
390 imx6dl-nit6xlite.dtb \ 397 imx6dl-nit6xlite.dtb \
@@ -397,6 +404,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
397 imx6dl-sabresd.dtb \ 404 imx6dl-sabresd.dtb \
398 imx6dl-savageboard.dtb \ 405 imx6dl-savageboard.dtb \
399 imx6dl-ts4900.dtb \ 406 imx6dl-ts4900.dtb \
407 imx6dl-ts7970.dtb \
400 imx6dl-tx6dl-comtft.dtb \ 408 imx6dl-tx6dl-comtft.dtb \
401 imx6dl-tx6s-8034.dtb \ 409 imx6dl-tx6s-8034.dtb \
402 imx6dl-tx6s-8034-mb7.dtb \ 410 imx6dl-tx6s-8034-mb7.dtb \
@@ -422,6 +430,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
422 imx6q-b850v3.dtb \ 430 imx6q-b850v3.dtb \
423 imx6q-cm-fx6.dtb \ 431 imx6q-cm-fx6.dtb \
424 imx6q-cubox-i.dtb \ 432 imx6q-cubox-i.dtb \
433 imx6q-cubox-i-emmc-som-v15.dtb \
434 imx6q-cubox-i-som-v15.dtb \
425 imx6q-dfi-fs700-m60.dtb \ 435 imx6q-dfi-fs700-m60.dtb \
426 imx6q-display5-tianma-tm070-1280x768.dtb \ 436 imx6q-display5-tianma-tm070-1280x768.dtb \
427 imx6q-dmo-edmqmx6.dtb \ 437 imx6q-dmo-edmqmx6.dtb \
@@ -440,6 +450,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
440 imx6q-gw5904.dtb \ 450 imx6q-gw5904.dtb \
441 imx6q-h100.dtb \ 451 imx6q-h100.dtb \
442 imx6q-hummingboard.dtb \ 452 imx6q-hummingboard.dtb \
453 imx6q-hummingboard-emmc-som-v15.dtb \
454 imx6q-hummingboard-som-v15.dtb \
455 imx6q-hummingboard2.dtb \
456 imx6q-hummingboard2-emmc-som-v15.dtb \
457 imx6q-hummingboard2-som-v15.dtb \
443 imx6q-icore.dtb \ 458 imx6q-icore.dtb \
444 imx6q-icore-ofcap10.dtb \ 459 imx6q-icore-ofcap10.dtb \
445 imx6q-icore-ofcap12.dtb \ 460 imx6q-icore-ofcap12.dtb \
@@ -460,6 +475,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
460 imx6q-sbc6x.dtb \ 475 imx6q-sbc6x.dtb \
461 imx6q-tbs2910.dtb \ 476 imx6q-tbs2910.dtb \
462 imx6q-ts4900.dtb \ 477 imx6q-ts4900.dtb \
478 imx6q-ts7970.dtb \
463 imx6q-tx6q-1010.dtb \ 479 imx6q-tx6q-1010.dtb \
464 imx6q-tx6q-1010-comtft.dtb \ 480 imx6q-tx6q-1010-comtft.dtb \
465 imx6q-tx6q-1020.dtb \ 481 imx6q-tx6q-1020.dtb \
@@ -471,6 +487,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
471 imx6q-tx6q-11x0-mb7.dtb \ 487 imx6q-tx6q-11x0-mb7.dtb \
472 imx6q-udoo.dtb \ 488 imx6q-udoo.dtb \
473 imx6q-utilite-pro.dtb \ 489 imx6q-utilite-pro.dtb \
490 imx6q-var-dt6customboard.dtb \
474 imx6q-wandboard.dtb \ 491 imx6q-wandboard.dtb \
475 imx6q-wandboard-revb1.dtb \ 492 imx6q-wandboard-revb1.dtb \
476 imx6q-wandboard-revd1.dtb \ 493 imx6q-wandboard-revd1.dtb \
@@ -512,15 +529,17 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
512 imx6ull-14x14-evk.dtb 529 imx6ull-14x14-evk.dtb
513dtb-$(CONFIG_SOC_IMX7D) += \ 530dtb-$(CONFIG_SOC_IMX7D) += \
514 imx7d-cl-som-imx7.dtb \ 531 imx7d-cl-som-imx7.dtb \
532 imx7d-colibri-emmc-eval-v3.dtb \
515 imx7d-colibri-eval-v3.dtb \ 533 imx7d-colibri-eval-v3.dtb \
516 imx7d-nitrogen7.dtb \ 534 imx7d-nitrogen7.dtb \
517 imx7d-pico.dtb \ 535 imx7d-pico-pi.dtb \
518 imx7d-sbc-imx7.dtb \ 536 imx7d-sbc-imx7.dtb \
519 imx7d-sdb.dtb \ 537 imx7d-sdb.dtb \
520 imx7d-sdb-sht11.dtb \ 538 imx7d-sdb-sht11.dtb \
521 imx7s-colibri-eval-v3.dtb \ 539 imx7s-colibri-eval-v3.dtb \
522 imx7s-warp.dtb 540 imx7s-warp.dtb
523dtb-$(CONFIG_SOC_LS1021A) += \ 541dtb-$(CONFIG_SOC_LS1021A) += \
542 ls1021a-moxa-uc-8410a.dtb \
524 ls1021a-qds.dtb \ 543 ls1021a-qds.dtb \
525 ls1021a-twr.dtb 544 ls1021a-twr.dtb
526dtb-$(CONFIG_SOC_VF610) += \ 545dtb-$(CONFIG_SOC_VF610) += \
@@ -559,6 +578,7 @@ dtb-$(CONFIG_ARCH_MXS) += \
559 imx28-m28cu3.dtb \ 578 imx28-m28cu3.dtb \
560 imx28-m28evk.dtb \ 579 imx28-m28evk.dtb \
561 imx28-sps1.dtb \ 580 imx28-sps1.dtb \
581 imx28-ts4600.dtb \
562 imx28-tx28.dtb 582 imx28-tx28.dtb
563dtb-$(CONFIG_ARCH_NOMADIK) += \ 583dtb-$(CONFIG_ARCH_NOMADIK) += \
564 ste-nomadik-s8815.dtb \ 584 ste-nomadik-s8815.dtb \
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 09ce8b81fafa..c43cf704b768 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -628,11 +628,13 @@
628 usbphy0: usb-phy@0 { 628 usbphy0: usb-phy@0 {
629 reg = <0>; 629 reg = <0>;
630 compatible = "usb-nop-xceiv"; 630 compatible = "usb-nop-xceiv";
631 #phy-cells = <0>;
631 }; 632 };
632 633
633 usbphy1: usb-phy@1 { 634 usbphy1: usb-phy@1 {
634 reg = <1>; 635 reg = <1>;
635 compatible = "usb-nop-xceiv"; 636 compatible = "usb-nop-xceiv";
637 #phy-cells = <0>;
636 }; 638 };
637 }; 639 };
638}; 640};
diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts
index 96f442ba6d22..2a140c8ae6d2 100644
--- a/arch/arm/boot/dts/imx27-pdk.dts
+++ b/arch/arm/boot/dts/imx27-pdk.dts
@@ -30,6 +30,7 @@
30 reg = <0>; 30 reg = <0>;
31 clocks = <&clks IMX27_CLK_DUMMY>; 31 clocks = <&clks IMX27_CLK_DUMMY>;
32 clock-names = "main_clk"; 32 clock-names = "main_clk";
33 #phy-cells = <0>;
33 }; 34 };
34 }; 35 };
35}; 36};
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index 2a9198f99a8d..2ed2d73b087e 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -63,6 +63,7 @@
63 vcc-supply = <&reg_5v0>; 63 vcc-supply = <&reg_5v0>;
64 clocks = <&clks IMX27_CLK_DUMMY>; 64 clocks = <&clks IMX27_CLK_DUMMY>;
65 clock-names = "main_clk"; 65 clock-names = "main_clk";
66 #phy-cells = <0>;
66 }; 67 };
67 }; 68 };
68}; 69};
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index c973c5d91875..c9095b7654c6 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -53,6 +53,7 @@
53 vcc-supply = <&sw3_reg>; 53 vcc-supply = <&sw3_reg>;
54 clocks = <&clks IMX27_CLK_DUMMY>; 54 clocks = <&clks IMX27_CLK_DUMMY>;
55 clock-names = "main_clk"; 55 clock-names = "main_clk";
56 #phy-cells = <0>;
56 }; 57 };
57 }; 58 };
58}; 59};
diff --git a/arch/arm/boot/dts/imx28-ts4600.dts b/arch/arm/boot/dts/imx28-ts4600.dts
new file mode 100644
index 000000000000..1e391c9f1b7a
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-ts4600.dts
@@ -0,0 +1,79 @@
1/*
2 * Copyright (C) 2016 Savoir-Faire Linux
3 * Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14#include "imx28.dtsi"
15#include "dt-bindings/gpio/gpio.h"
16
17/ {
18
19 model = "Technologic Systems i.MX28 TS-4600";
20 compatible = "technologic,imx28-ts4600", "fsl,imx28";
21
22 memory {
23 reg = <0x40000000 0x10000000>; /* 256MB */
24 };
25
26 apb@80000000 {
27 apbh@80000000 {
28 ssp0: ssp@80010000 {
29 compatible = "fsl,imx28-mmc";
30 pinctrl-names = "default";
31 pinctrl-0 = <&mmc0_4bit_pins_a
32 &mmc0_sck_cfg
33 &en_sd_pwr>;
34 broken-cd = <1>;
35 bus-width = <4>;
36 vmmc-supply = <&reg_vddio_sd0>;
37 status = "okay";
38 };
39
40 pinctrl@80018000 {
41
42 en_sd_pwr: en-sd-pwr@0 {
43 reg = <0>;
44 fsl,pinmux-ids = <
45 MX28_PAD_PWM3__GPIO_3_28
46 >;
47 fsl,drive-strength = <MXS_DRIVE_4mA>;
48 fsl,voltage = <MXS_VOLTAGE_HIGH>;
49 fsl,pull-up = <MXS_PULL_DISABLE>;
50 };
51
52 };
53 };
54
55 apbx@80040000 {
56 pwm: pwm@80064000 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&pwm2_pins_a>;
59 status = "okay";
60 };
61
62 duart: serial@80074000 {
63 pinctrl-names = "default";
64 pinctrl-0 = <&duart_pins_a>;
65 status = "okay";
66 };
67 };
68 };
69
70 reg_vddio_sd0: regulator-vddio-sd0 {
71 compatible = "regulator-fixed";
72 regulator-name = "vddio-sd0";
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 regulator-boot-on;
76 gpio = <&gpio3 28 GPIO_ACTIVE_LOW>;
77 };
78
79};
diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dtsi
index 6d5e6a60bee7..f049c692c6b0 100644
--- a/arch/arm/boot/dts/imx35.dtsi
+++ b/arch/arm/boot/dts/imx35.dtsi
@@ -402,11 +402,13 @@
402 usbphy0: usb-phy@0 { 402 usbphy0: usb-phy@0 {
403 reg = <0>; 403 reg = <0>;
404 compatible = "usb-nop-xceiv"; 404 compatible = "usb-nop-xceiv";
405 #phy-cells = <0>;
405 }; 406 };
406 407
407 usbphy1: usb-phy@1 { 408 usbphy1: usb-phy@1 {
408 reg = <1>; 409 reg = <1>;
409 compatible = "usb-nop-xceiv"; 410 compatible = "usb-nop-xceiv";
411 #phy-cells = <0>;
410 }; 412 };
411 }; 413 };
412}; 414};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 2a694c5cc8ae..4ac5ab614a7f 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -25,18 +25,41 @@
25 reg = <0x90000000 0x20000000>; 25 reg = <0x90000000 0x20000000>;
26 }; 26 };
27 27
28 clocks { 28 ckih1 {
29 ckih1 { 29 clock-frequency = <22579200>;
30 clock-frequency = <22579200>; 30 };
31 };
32 31
33 clk_26M: codec_clock { 32 clk_osc: clk-osc {
34 compatible = "fixed-clock"; 33 compatible = "fixed-clock";
35 reg=<0>; 34 #clock-cells = <0>;
36 #clock-cells = <0>; 35 clock-frequency = <26000000>;
37 clock-frequency = <26000000>; 36 };
38 gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; 37
39 }; 38 clk_osc_gate: clk-osc-gate {
39 compatible = "gpio-gate-clock";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_clk26mhz_osc>;
42 clocks = <&clk_osc>;
43 #clock-cells = <0>;
44 enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
45 };
46
47 clk_audio: clk-audio {
48 compatible = "gpio-gate-clock";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_clk26mhz_audio>;
51 clocks = <&clk_osc_gate>;
52 #clock-cells = <0>;
53 enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
54 };
55
56 clk_usb: clk-usb {
57 compatible = "gpio-gate-clock";
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_clk26mhz_usb>;
60 clocks = <&clk_osc_gate>;
61 #clock-cells = <0>;
62 enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
40 }; 63 };
41 64
42 display1: disp1 { 65 display1: disp1 {
@@ -162,9 +185,11 @@
162 usbh1phy: usbh1phy@0 { 185 usbh1phy: usbh1phy@0 {
163 compatible = "usb-nop-xceiv"; 186 compatible = "usb-nop-xceiv";
164 reg = <0>; 187 reg = <0>;
165 clocks = <&clks IMX5_CLK_DUMMY>; 188 clocks = <&clk_usb>;
166 clock-names = "main_clk"; 189 clock-names = "main_clk";
167 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; 190 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
191 vcc-supply = <&vusb_reg>;
192 #phy-cells = <0>;
168 }; 193 };
169 }; 194 };
170}; 195};
@@ -240,6 +265,10 @@
240 regulator-max-microvolt = <3150000>; 265 regulator-max-microvolt = <3150000>;
241 }; 266 };
242 267
268 vusb_reg: vusb {
269 regulator-boot-on;
270 };
271
243 vusb2_reg: vusb2 { 272 vusb2_reg: vusb2 {
244 regulator-min-microvolt = <2400000>; 273 regulator-min-microvolt = <2400000>;
245 regulator-max-microvolt = <2775000>; 274 regulator-max-microvolt = <2775000>;
@@ -339,10 +368,8 @@
339 368
340 sgtl5000: codec@a { 369 sgtl5000: codec@a {
341 compatible = "fsl,sgtl5000"; 370 compatible = "fsl,sgtl5000";
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_clkcodec>;
344 reg = <0x0a>; 371 reg = <0x0a>;
345 clocks = <&clk_26M>; 372 clocks = <&clk_audio>;
346 VDDA-supply = <&vdig_reg>; 373 VDDA-supply = <&vdig_reg>;
347 VDDIO-supply = <&vvideo_reg>; 374 VDDIO-supply = <&vvideo_reg>;
348 }; 375 };
@@ -413,6 +440,10 @@
413 status = "okay"; 440 status = "okay";
414}; 441};
415 442
443&usbphy0 {
444 vcc-supply = <&vusb_reg>;
445};
446
416&usbotg { 447&usbotg {
417 dr_mode = "otg"; 448 dr_mode = "otg";
418 disable-over-current; 449 disable-over-current;
@@ -431,9 +462,21 @@
431 >; 462 >;
432 }; 463 };
433 464
434 pinctrl_clkcodec: clkcodecgrp { 465 pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
466 fsl,pins = <
467 MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
468 >;
469 };
470
471 pinctrl_clk26mhz_osc: clk26mhzoscgrp {
472 fsl,pins = <
473 MX51_PAD_DI1_PIN12__GPIO3_1 0x85
474 >;
475 };
476
477 pinctrl_clk26mhz_usb: clk26mhzusbgrp {
435 fsl,pins = < 478 fsl,pins = <
436 MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 479 MX51_PAD_EIM_D17__GPIO2_1 0x85
437 >; 480 >;
438 }; 481 };
439 482
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
index 1305b05c7ed9..b3d952f37cdc 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
@@ -94,6 +94,7 @@
94 clocks = <&clks IMX5_CLK_USB_PHY_GATE>; 94 clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
95 clock-names = "main_clk"; 95 clock-names = "main_clk";
96 clock-frequency = <19200000>; 96 clock-frequency = <19200000>;
97 #phy-cells = <0>;
97 }; 98 };
98 }; 99 };
99}; 100};
diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts
index 564233e97412..f59b02bae68d 100644
--- a/arch/arm/boot/dts/imx51-ts4800.dts
+++ b/arch/arm/boot/dts/imx51-ts4800.dts
@@ -149,18 +149,18 @@
149 #size-cells = <1>; 149 #size-cells = <1>;
150 ranges = <0 0 0 0x1d000>; 150 ranges = <0 0 0 0x1d000>;
151 151
152 syscon: syscon@b0010000 { 152 syscon: syscon@10000 {
153 compatible = "syscon", "simple-mfd"; 153 compatible = "syscon", "simple-mfd";
154 reg = <0x10000 0x3d>; 154 reg = <0x10000 0x3d>;
155 reg-io-width = <2>; 155 reg-io-width = <2>;
156 156
157 wdt@e { 157 wdt {
158 compatible = "technologic,ts4800-wdt"; 158 compatible = "technologic,ts4800-wdt";
159 syscon = <&syscon 0xe>; 159 syscon = <&syscon 0xe>;
160 }; 160 };
161 }; 161 };
162 162
163 touchscreen { 163 touchscreen@12000 {
164 compatible = "technologic,ts4800-ts"; 164 compatible = "technologic,ts4800-ts";
165 reg = <0x12000 0x1000>; 165 reg = <0x12000 0x1000>;
166 syscon = <&syscon 0x10 6>; 166 syscon = <&syscon 0x10 6>;
diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts b/arch/arm/boot/dts/imx51-zii-rdu1.dts
index 49be0e1c812d..5306b78de0ca 100644
--- a/arch/arm/boot/dts/imx51-zii-rdu1.dts
+++ b/arch/arm/boot/dts/imx51-zii-rdu1.dts
@@ -242,7 +242,7 @@
242 242
243 sound { 243 sound {
244 compatible = "simple-audio-card"; 244 compatible = "simple-audio-card";
245 simple-audio-card,name = "RDU1 audio"; 245 simple-audio-card,name = "Front";
246 simple-audio-card,format = "i2s"; 246 simple-audio-card,format = "i2s";
247 simple-audio-card,bitclock-master = <&sound_codec>; 247 simple-audio-card,bitclock-master = <&sound_codec>;
248 simple-audio-card,frame-master = <&sound_codec>; 248 simple-audio-card,frame-master = <&sound_codec>;
@@ -251,7 +251,7 @@
251 simple-audio-card,routing = 251 simple-audio-card,routing =
252 "Headphone Jack", "HPLEFT", 252 "Headphone Jack", "HPLEFT",
253 "Headphone Jack", "HPRIGHT"; 253 "Headphone Jack", "HPRIGHT";
254 simple-audio-card,aux-devs = <&tpa6130a2>; 254 simple-audio-card,aux-devs = <&hpa1>;
255 255
256 sound_cpu: simple-audio-card,cpu { 256 sound_cpu: simple-audio-card,cpu {
257 sound-dai = <&ssi2>; 257 sound-dai = <&ssi2>;
@@ -271,6 +271,7 @@
271 clock-names = "main_clk"; 271 clock-names = "main_clk";
272 reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; 272 reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
273 vcc-supply = <&vusb_reg>; 273 vcc-supply = <&vusb_reg>;
274 #phy-cells = <0>;
274 }; 275 };
275 276
276 usbh2phy: usbphy2 { 277 usbh2phy: usbphy2 {
@@ -281,6 +282,7 @@
281 clock-names = "main_clk"; 282 clock-names = "main_clk";
282 reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; 283 reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
283 vcc-supply = <&vusb_reg>; 284 vcc-supply = <&vusb_reg>;
285 #phy-cells = <0>;
284 }; 286 };
285}; 287};
286 288
@@ -428,13 +430,13 @@
428 #size-cells = <0>; 430 #size-cells = <0>;
429 led-control = <0x0 0x0 0x3f83f8 0x0>; 431 led-control = <0x0 0x0 0x3f83f8 0x0>;
430 432
431 sysled0 { 433 sysled0@3 {
432 reg = <3>; 434 reg = <3>;
433 label = "system:green:status"; 435 label = "system:green:status";
434 linux,default-trigger = "default-on"; 436 linux,default-trigger = "default-on";
435 }; 437 };
436 438
437 sysled1 { 439 sysled1@4 {
438 reg = <4>; 440 reg = <4>;
439 label = "system:green:act"; 441 label = "system:green:act";
440 linux,default-trigger = "heartbeat"; 442 linux,default-trigger = "heartbeat";
@@ -479,7 +481,7 @@
479 reg = <0x50>; 481 reg = <0x50>;
480 }; 482 };
481 483
482 tpa6130a2: amp@60 { 484 hpa1: amp@60 {
483 compatible = "ti,tpa6130a2"; 485 compatible = "ti,tpa6130a2";
484 reg = <0x60>; 486 reg = <0x60>;
485 pinctrl-names = "default"; 487 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 378be720b3c7..00d30bd70068 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -113,6 +113,7 @@
113 reg = <0>; 113 reg = <0>;
114 clocks = <&clks IMX5_CLK_USB_PHY_GATE>; 114 clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
115 clock-names = "main_clk"; 115 clock-names = "main_clk";
116 #phy-cells = <0>;
116 }; 117 };
117 }; 118 };
118 119
diff --git a/arch/arm/boot/dts/imx53-cx9020.dts b/arch/arm/boot/dts/imx53-cx9020.dts
index 4f54fd4418a3..5e67e43004e7 100644
--- a/arch/arm/boot/dts/imx53-cx9020.dts
+++ b/arch/arm/boot/dts/imx53-cx9020.dts
@@ -152,7 +152,7 @@
152 pinctrl-names = "default"; 152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_fec>; 153 pinctrl-0 = <&pinctrl_fec>;
154 phy-mode = "rmii"; 154 phy-mode = "rmii";
155 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>; 155 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
156 status = "okay"; 156 status = "okay";
157}; 157};
158 158
diff --git a/arch/arm/boot/dts/imx53-m53.dtsi b/arch/arm/boot/dts/imx53-m53.dtsi
index ec390aa562c3..7ce69c63510c 100644
--- a/arch/arm/boot/dts/imx53-m53.dtsi
+++ b/arch/arm/boot/dts/imx53-m53.dtsi
@@ -64,7 +64,6 @@
64 64
65 stmpe_touchscreen { 65 stmpe_touchscreen {
66 compatible = "st,stmpe-ts"; 66 compatible = "st,stmpe-ts";
67 reg = <0>;
68 st,sample-time = <4>; 67 st,sample-time = <4>;
69 st,mod-12b = <1>; 68 st,mod-12b = <1>;
70 st,ref-sel = <0>; 69 st,ref-sel = <0>;
diff --git a/arch/arm/boot/dts/imx53-tx53-x03x.dts b/arch/arm/boot/dts/imx53-tx53-x03x.dts
index 7eb53e48c2f4..fe15c9555d6e 100644
--- a/arch/arm/boot/dts/imx53-tx53-x03x.dts
+++ b/arch/arm/boot/dts/imx53-tx53-x03x.dts
@@ -53,132 +53,130 @@
53 display = &display; 53 display = &display;
54 }; 54 };
55 55
56 soc { 56 display: disp0 {
57 display: disp0 { 57 compatible = "fsl,imx-parallel-display";
58 compatible = "fsl,imx-parallel-display"; 58 interface-pix-fmt = "rgb24";
59 interface-pix-fmt = "rgb24"; 59 pinctrl-names = "default";
60 pinctrl-names = "default"; 60 pinctrl-0 = <&pinctrl_rgb24_vga1>;
61 pinctrl-0 = <&pinctrl_rgb24_vga1>; 61 status = "okay";
62 status = "okay";
63 62
64 port { 63 port {
65 display0_in: endpoint { 64 display0_in: endpoint {
66 remote-endpoint = <&ipu_di0_disp0>; 65 remote-endpoint = <&ipu_di0_disp0>;
67 };
68 }; 66 };
67 };
69 68
70 display-timings { 69 display-timings {
71 VGA { 70 VGA {
72 clock-frequency = <25200000>; 71 clock-frequency = <25200000>;
73 hactive = <640>; 72 hactive = <640>;
74 vactive = <480>; 73 vactive = <480>;
75 hback-porch = <48>; 74 hback-porch = <48>;
76 hsync-len = <96>; 75 hsync-len = <96>;
77 hfront-porch = <16>; 76 hfront-porch = <16>;
78 vback-porch = <31>; 77 vback-porch = <31>;
79 vsync-len = <2>; 78 vsync-len = <2>;
80 vfront-porch = <12>; 79 vfront-porch = <12>;
81 hsync-active = <0>; 80 hsync-active = <0>;
82 vsync-active = <0>; 81 vsync-active = <0>;
83 de-active = <1>; 82 de-active = <1>;
84 pixelclk-active = <0>; 83 pixelclk-active = <0>;
85 }; 84 };
86 85
87 ETV570 { 86 ETV570 {
88 clock-frequency = <25200000>; 87 clock-frequency = <25200000>;
89 hactive = <640>; 88 hactive = <640>;
90 vactive = <480>; 89 vactive = <480>;
91 hback-porch = <114>; 90 hback-porch = <114>;
92 hsync-len = <30>; 91 hsync-len = <30>;
93 hfront-porch = <16>; 92 hfront-porch = <16>;
94 vback-porch = <32>; 93 vback-porch = <32>;
95 vsync-len = <3>; 94 vsync-len = <3>;
96 vfront-porch = <10>; 95 vfront-porch = <10>;
97 hsync-active = <0>; 96 hsync-active = <0>;
98 vsync-active = <0>; 97 vsync-active = <0>;
99 de-active = <1>; 98 de-active = <1>;
100 pixelclk-active = <0>; 99 pixelclk-active = <0>;
101 }; 100 };
102 101
103 ET0350 { 102 ET0350 {
104 clock-frequency = <6413760>; 103 clock-frequency = <6413760>;
105 hactive = <320>; 104 hactive = <320>;
106 vactive = <240>; 105 vactive = <240>;
107 hback-porch = <34>; 106 hback-porch = <34>;
108 hsync-len = <34>; 107 hsync-len = <34>;
109 hfront-porch = <20>; 108 hfront-porch = <20>;
110 vback-porch = <15>; 109 vback-porch = <15>;
111 vsync-len = <3>; 110 vsync-len = <3>;
112 vfront-porch = <4>; 111 vfront-porch = <4>;
113 hsync-active = <0>; 112 hsync-active = <0>;
114 vsync-active = <0>; 113 vsync-active = <0>;
115 de-active = <1>; 114 de-active = <1>;
116 pixelclk-active = <0>; 115 pixelclk-active = <0>;
117 }; 116 };
118 117
119 ET0430 { 118 ET0430 {
120 clock-frequency = <9009000>; 119 clock-frequency = <9009000>;
121 hactive = <480>; 120 hactive = <480>;
122 vactive = <272>; 121 vactive = <272>;
123 hback-porch = <2>; 122 hback-porch = <2>;
124 hsync-len = <41>; 123 hsync-len = <41>;
125 hfront-porch = <2>; 124 hfront-porch = <2>;
126 vback-porch = <2>; 125 vback-porch = <2>;
127 vsync-len = <10>; 126 vsync-len = <10>;
128 vfront-porch = <2>; 127 vfront-porch = <2>;
129 hsync-active = <0>; 128 hsync-active = <0>;
130 vsync-active = <0>; 129 vsync-active = <0>;
131 de-active = <1>; 130 de-active = <1>;
132 pixelclk-active = <1>; 131 pixelclk-active = <1>;
133 }; 132 };
134 133
135 ET0500 { 134 ET0500 {
136 clock-frequency = <33264000>; 135 clock-frequency = <33264000>;
137 hactive = <800>; 136 hactive = <800>;
138 vactive = <480>; 137 vactive = <480>;
139 hback-porch = <88>; 138 hback-porch = <88>;
140 hsync-len = <128>; 139 hsync-len = <128>;
141 hfront-porch = <40>; 140 hfront-porch = <40>;
142 vback-porch = <33>; 141 vback-porch = <33>;
143 vsync-len = <2>; 142 vsync-len = <2>;
144 vfront-porch = <10>; 143 vfront-porch = <10>;
145 hsync-active = <0>; 144 hsync-active = <0>;
146 vsync-active = <0>; 145 vsync-active = <0>;
147 de-active = <1>; 146 de-active = <1>;
148 pixelclk-active = <0>; 147 pixelclk-active = <0>;
149 }; 148 };
150 149
151 ET0700 { /* same as ET0500 */ 150 ET0700 { /* same as ET0500 */
152 clock-frequency = <33264000>; 151 clock-frequency = <33264000>;
153 hactive = <800>; 152 hactive = <800>;
154 vactive = <480>; 153 vactive = <480>;
155 hback-porch = <88>; 154 hback-porch = <88>;
156 hsync-len = <128>; 155 hsync-len = <128>;
157 hfront-porch = <40>; 156 hfront-porch = <40>;
158 vback-porch = <33>; 157 vback-porch = <33>;
159 vsync-len = <2>; 158 vsync-len = <2>;
160 vfront-porch = <10>; 159 vfront-porch = <10>;
161 hsync-active = <0>; 160 hsync-active = <0>;
162 vsync-active = <0>; 161 vsync-active = <0>;
163 de-active = <1>; 162 de-active = <1>;
164 pixelclk-active = <0>; 163 pixelclk-active = <0>;
165 }; 164 };
166 165
167 ETQ570 { 166 ETQ570 {
168 clock-frequency = <6596040>; 167 clock-frequency = <6596040>;
169 hactive = <320>; 168 hactive = <320>;
170 vactive = <240>; 169 vactive = <240>;
171 hback-porch = <38>; 170 hback-porch = <38>;
172 hsync-len = <30>; 171 hsync-len = <30>;
173 hfront-porch = <30>; 172 hfront-porch = <30>;
174 vback-porch = <16>; 173 vback-porch = <16>;
175 vsync-len = <3>; 174 vsync-len = <3>;
176 vfront-porch = <4>; 175 vfront-porch = <4>;
177 hsync-active = <0>; 176 hsync-active = <0>;
178 vsync-active = <0>; 177 vsync-active = <0>;
179 de-active = <1>; 178 de-active = <1>;
180 pixelclk-active = <0>; 179 pixelclk-active = <0>;
181 };
182 }; 180 };
183 }; 181 };
184 }; 182 };
diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi
index 71b58b6933e1..a22e461fc168 100644
--- a/arch/arm/boot/dts/imx53-tx53.dtsi
+++ b/arch/arm/boot/dts/imx53-tx53.dtsi
@@ -225,10 +225,16 @@
225 mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */ 225 mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
226 status = "okay"; 226 status = "okay";
227 227
228 phy0: ethernet-phy@0 { 228 mdio {
229 interrupt-parent = <&gpio2>; 229 #address-cells = <1>;
230 interrupts = <4 IRQ_TYPE_EDGE_FALLING>; 230 #size-cells = <0>;
231 device_type = "ethernet-phy"; 231
232 phy0: ethernet-phy@0 {
233 reg = <0>;
234 interrupt-parent = <&gpio2>;
235 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
236 device_type = "ethernet-phy";
237 };
232 }; 238 };
233}; 239};
234 240
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 84f17f7abb71..38b31a37339b 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -116,6 +116,28 @@
116 }; 116 };
117 }; 117 };
118 118
119 pmu {
120 compatible = "arm,cortex-a8-pmu";
121 interrupt-parent = <&tzic>;
122 interrupts = <77>;
123 };
124
125 usbphy0: usbphy-0 {
126 compatible = "usb-nop-xceiv";
127 clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
128 clock-names = "main_clk";
129 #phy-cells = <0>;
130 status = "okay";
131 };
132
133 usbphy1: usbphy-1 {
134 compatible = "usb-nop-xceiv";
135 clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
136 clock-names = "main_clk";
137 #phy-cells = <0>;
138 status = "okay";
139 };
140
119 soc { 141 soc {
120 #address-cells = <1>; 142 #address-cells = <1>;
121 #size-cells = <1>; 143 #size-cells = <1>;
@@ -299,20 +321,6 @@
299 reg = <0x53f00000 0x60>; 321 reg = <0x53f00000 0x60>;
300 }; 322 };
301 323
302 usbphy0: usbphy-0 {
303 compatible = "usb-nop-xceiv";
304 clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
305 clock-names = "main_clk";
306 status = "okay";
307 };
308
309 usbphy1: usbphy-1 {
310 compatible = "usb-nop-xceiv";
311 clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
312 clock-names = "main_clk";
313 status = "okay";
314 };
315
316 usbotg: usb@53f80000 { 324 usbotg: usb@53f80000 {
317 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 325 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
318 reg = <0x53f80000 0x0200>; 326 reg = <0x53f80000 0x0200>;
@@ -433,6 +441,13 @@
433 clock-names = "ipg", "per"; 441 clock-names = "ipg", "per";
434 }; 442 };
435 443
444 srtc: rtc@53fa4000 {
445 compatible = "fsl,imx53-rtc";
446 reg = <0x53fa4000 0x4000>;
447 interrupts = <24>;
448 clocks = <&clks IMX5_CLK_SRTC_GATE>;
449 };
450
436 iomuxc: iomuxc@53fa8000 { 451 iomuxc: iomuxc@53fa8000 {
437 compatible = "fsl,imx53-iomuxc"; 452 compatible = "fsl,imx53-iomuxc";
438 reg = <0x53fa8000 0x4000>; 453 reg = <0x53fa8000 0x4000>;
@@ -813,10 +828,5 @@
813 reg = <0xf8000000 0x20000>; 828 reg = <0xf8000000 0x20000>;
814 clocks = <&clks IMX5_CLK_OCRAM>; 829 clocks = <&clks IMX5_CLK_OCRAM>;
815 }; 830 };
816
817 pmu {
818 compatible = "arm,cortex-a8-pmu";
819 interrupts = <77>;
820 };
821 }; 831 };
822}; 832};
diff --git a/arch/arm/boot/dts/imx6dl-aristainetos_4.dts b/arch/arm/boot/dts/imx6dl-aristainetos_4.dts
index cc418cecabdb..3c9f4af9e9ff 100644
--- a/arch/arm/boot/dts/imx6dl-aristainetos_4.dts
+++ b/arch/arm/boot/dts/imx6dl-aristainetos_4.dts
@@ -31,35 +31,33 @@
31 reg = <0x10000000 0x40000000>; 31 reg = <0x10000000 0x40000000>;
32 }; 32 };
33 33
34 soc { 34 display0: disp0 {
35 display0: disp0 { 35 compatible = "fsl,imx-parallel-display";
36 compatible = "fsl,imx-parallel-display"; 36 interface-pix-fmt = "rgb24";
37 interface-pix-fmt = "rgb24"; 37 pinctrl-names = "default";
38 pinctrl-names = "default"; 38 pinctrl-0 = <&pinctrl_ipu_disp>;
39 pinctrl-0 = <&pinctrl_ipu_disp>; 39 status = "okay";
40 status = "okay";
41 40
42 display-timings { 41 display-timings {
43 480x800p60 { 42 480x800p60 {
44 native-mode; 43 native-mode;
45 clock-frequency = <30000000>; 44 clock-frequency = <30000000>;
46 hactive = <480>; 45 hactive = <480>;
47 vactive = <800>; 46 vactive = <800>;
48 hfront-porch = <59>; 47 hfront-porch = <59>;
49 hback-porch = <10>; 48 hback-porch = <10>;
50 hsync-len = <10>; 49 hsync-len = <10>;
51 vback-porch = <15>; 50 vback-porch = <15>;
52 vfront-porch = <15>; 51 vfront-porch = <15>;
53 vsync-len = <15>; 52 vsync-len = <15>;
54 hsync-active = <1>; 53 hsync-active = <1>;
55 vsync-active = <1>; 54 vsync-active = <1>;
56 };
57 }; 55 };
56 };
58 57
59 port { 58 port {
60 display0_in: endpoint { 59 display0_in: endpoint {
61 remote-endpoint = <&ipu1_di0_disp0>; 60 remote-endpoint = <&ipu1_di0_disp0>;
62 };
63 }; 61 };
64 }; 62 };
65 }; 63 };
diff --git a/arch/arm/boot/dts/imx6dl-aristainetos_7.dts b/arch/arm/boot/dts/imx6dl-aristainetos_7.dts
index 126ff964eded..96cd835ccbf6 100644
--- a/arch/arm/boot/dts/imx6dl-aristainetos_7.dts
+++ b/arch/arm/boot/dts/imx6dl-aristainetos_7.dts
@@ -20,34 +20,32 @@
20 reg = <0x10000000 0x40000000>; 20 reg = <0x10000000 0x40000000>;
21 }; 21 };
22 22
23 soc { 23 display0: disp0 {
24 display0: disp0 { 24 compatible = "fsl,imx-parallel-display";
25 compatible = "fsl,imx-parallel-display"; 25 interface-pix-fmt = "rgb24";
26 interface-pix-fmt = "rgb24"; 26 pinctrl-names = "default";
27 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_ipu_disp>;
28 pinctrl-0 = <&pinctrl_ipu_disp>; 28 status = "okay";
29 status = "okay";
30 29
31 display-timings { 30 display-timings {
32 800x480p60 { 31 800x480p60 {
33 native-mode; 32 native-mode;
34 clock-frequency = <33246000>; 33 clock-frequency = <33246000>;
35 hactive = <800>; 34 hactive = <800>;
36 vactive = <480>; 35 vactive = <480>;
37 hfront-porch = <88>; 36 hfront-porch = <88>;
38 hback-porch = <88>; 37 hback-porch = <88>;
39 hsync-len = <80>; 38 hsync-len = <80>;
40 vback-porch = <10>; 39 vback-porch = <10>;
41 vfront-porch = <10>; 40 vfront-porch = <10>;
42 vsync-len = <25>; 41 vsync-len = <25>;
43 vsync-active = <1>; 42 vsync-active = <1>;
44 };
45 }; 43 };
44 };
46 45
47 port { 46 port {
48 display0_in: endpoint { 47 display0_in: endpoint {
49 remote-endpoint = <&ipu1_di0_disp0>; 48 remote-endpoint = <&ipu1_di0_disp0>;
50 };
51 }; 49 };
52 }; 50 };
53 }; 51 };
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 5705ebee0595..dcf9206f3e0d 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -163,7 +163,7 @@
163 163
164 /* M41T0M6 real time clock on carrier board */ 164 /* M41T0M6 real time clock on carrier board */
165 rtc_i2c: rtc@68 { 165 rtc_i2c: rtc@68 {
166 compatible = "st,m41t00"; 166 compatible = "st,m41t0";
167 reg = <0x68>; 167 reg = <0x68>;
168 }; 168 };
169}; 169};
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i-emmc-som-v15.dts b/arch/arm/boot/dts/imx6dl-cubox-i-emmc-som-v15.dts
new file mode 100644
index 000000000000..2b2fc360b865
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-cubox-i-emmc-som-v15.dts
@@ -0,0 +1,52 @@
1/*
2 * Copyright (C) 2014 Russell King
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41/dts-v1/;
42
43#include "imx6dl.dtsi"
44#include "imx6qdl-sr-som.dtsi"
45#include "imx6qdl-sr-som-ti.dtsi"
46#include "imx6qdl-sr-som-emmc.dtsi"
47#include "imx6qdl-cubox-i.dtsi"
48
49/ {
50 model = "SolidRun Cubox-i Solo/DualLite (1.5som+emmc)";
51 compatible = "solidrun,cubox-i/dl", "fsl,imx6dl";
52};
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i-som-v15.dts b/arch/arm/boot/dts/imx6dl-cubox-i-som-v15.dts
new file mode 100644
index 000000000000..e09c565d1d1f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-cubox-i-som-v15.dts
@@ -0,0 +1,51 @@
1/*
2 * Copyright (C) 2014 Russell King
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41/dts-v1/;
42
43#include "imx6dl.dtsi"
44#include "imx6qdl-sr-som.dtsi"
45#include "imx6qdl-sr-som-ti.dtsi"
46#include "imx6qdl-cubox-i.dtsi"
47
48/ {
49 model = "SolidRun Cubox-i Solo/DualLite (1.5som)";
50 compatible = "solidrun,cubox-i/dl", "fsl,imx6dl";
51};
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i.dts b/arch/arm/boot/dts/imx6dl-cubox-i.dts
index f10a36b8647d..2b1b3e193f53 100644
--- a/arch/arm/boot/dts/imx6dl-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6dl-cubox-i.dts
@@ -41,6 +41,8 @@
41/dts-v1/; 41/dts-v1/;
42 42
43#include "imx6dl.dtsi" 43#include "imx6dl.dtsi"
44#include "imx6qdl-sr-som.dtsi"
45#include "imx6qdl-sr-som-brcm.dtsi"
44#include "imx6qdl-cubox-i.dtsi" 46#include "imx6qdl-cubox-i.dtsi"
45 47
46/ { 48/ {
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard-emmc-som-v15.dts b/arch/arm/boot/dts/imx6dl-hummingboard-emmc-som-v15.dts
new file mode 100644
index 000000000000..a63f742f20d9
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-hummingboard-emmc-som-v15.dts
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
3 * Based on dt work by Russell King
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42/dts-v1/;
43
44#include "imx6dl.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-ti.dtsi"
47#include "imx6qdl-sr-som-emmc.dtsi"
48#include "imx6qdl-hummingboard.dtsi"
49
50/ {
51 model = "SolidRun HummingBoard Solo/DualLite (1.5som+emmc)";
52 compatible = "solidrun,hummingboard/dl", "fsl,imx6dl";
53};
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard-som-v15.dts b/arch/arm/boot/dts/imx6dl-hummingboard-som-v15.dts
new file mode 100644
index 000000000000..66a06cf3cdf3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-hummingboard-som-v15.dts
@@ -0,0 +1,52 @@
1/*
2 * Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
3 * Based on dt work by Russell King
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42/dts-v1/;
43
44#include "imx6dl.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-ti.dtsi"
47#include "imx6qdl-hummingboard.dtsi"
48
49/ {
50 model = "SolidRun HummingBoard Solo/DualLite (1.5som)";
51 compatible = "solidrun,hummingboard/dl", "fsl,imx6dl";
52};
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index 39c2602fa87c..cbd02eb486e1 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -42,6 +42,8 @@
42/dts-v1/; 42/dts-v1/;
43 43
44#include "imx6dl.dtsi" 44#include "imx6dl.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-brcm.dtsi"
45#include "imx6qdl-hummingboard.dtsi" 47#include "imx6qdl-hummingboard.dtsi"
46 48
47/ { 49/ {
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2-emmc-som-v15.dts b/arch/arm/boot/dts/imx6dl-hummingboard2-emmc-som-v15.dts
new file mode 100644
index 000000000000..80313c13bcdb
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-hummingboard2-emmc-som-v15.dts
@@ -0,0 +1,55 @@
1/*
2 * Device Tree file for SolidRun HummingBoard2
3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
4 * Based on work by Russell King
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License.
15 *
16 * This file is distributed in the hope that it will be useful
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44/dts-v1/;
45
46#include "imx6dl.dtsi"
47#include "imx6qdl-sr-som.dtsi"
48#include "imx6qdl-sr-som-emmc.dtsi"
49#include "imx6qdl-sr-som-ti.dtsi"
50#include "imx6qdl-hummingboard2.dtsi"
51
52/ {
53 model = "SolidRun HummingBoard2 Solo/DualLite (1.5som+emmc)";
54 compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
55};
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2-som-v15.dts b/arch/arm/boot/dts/imx6dl-hummingboard2-som-v15.dts
new file mode 100644
index 000000000000..e61ef1156f8b
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-hummingboard2-som-v15.dts
@@ -0,0 +1,54 @@
1/*
2 * Device Tree file for SolidRun HummingBoard2
3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
4 * Based on work by Russell King
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License.
15 *
16 * This file is distributed in the hope that it will be useful
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44/dts-v1/;
45
46#include "imx6dl.dtsi"
47#include "imx6qdl-sr-som.dtsi"
48#include "imx6qdl-sr-som-ti.dtsi"
49#include "imx6qdl-hummingboard2.dtsi"
50
51/ {
52 model = "SolidRun HummingBoard2 Solo/DualLite (1.5som)";
53 compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
54};
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2.dts b/arch/arm/boot/dts/imx6dl-hummingboard2.dts
new file mode 100644
index 000000000000..b12cd87f3f94
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-hummingboard2.dts
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
3 * Based on dt work by Russell King
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42/dts-v1/;
43
44#include "imx6dl.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-brcm.dtsi"
47#include "imx6qdl-hummingboard2.dtsi"
48#include "imx6qdl-hummingboard2-emmc.dtsi"
49
50/ {
51 model = "SolidRun HummingBoard2 Solo/DualLite";
52 compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
53};
diff --git a/arch/arm/boot/dts/imx6dl-pinfunc.h b/arch/arm/boot/dts/imx6dl-pinfunc.h
index 0ead323fdbd2..37e430a261de 100644
--- a/arch/arm/boot/dts/imx6dl-pinfunc.h
+++ b/arch/arm/boot/dts/imx6dl-pinfunc.h
@@ -668,6 +668,7 @@
668#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1f4 0x5c4 0x8f0 0x3 0x1 668#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1f4 0x5c4 0x8f0 0x3 0x1
669#define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1f4 0x5c4 0x000 0x4 0x0 669#define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1f4 0x5c4 0x000 0x4 0x0
670#define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1f4 0x5c4 0x000 0x5 0x0 670#define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1f4 0x5c4 0x000 0x5 0x0
671#define MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x1f8 0x5c8 0x000 0x0 0x0
671#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1f8 0x5c8 0x818 0x1 0x0 672#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1f8 0x5c8 0x818 0x1 0x0
672#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1f8 0x5c8 0x838 0x2 0x0 673#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1f8 0x5c8 0x838 0x2 0x0
673#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1f8 0x5c8 0x000 0x3 0x0 674#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1f8 0x5c8 0x000 0x3 0x0
diff --git a/arch/arm/boot/dts/imx6dl-ts7970.dts b/arch/arm/boot/dts/imx6dl-ts7970.dts
new file mode 100644
index 000000000000..d104daf305d9
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-ts7970.dts
@@ -0,0 +1,50 @@
1/*
2 * Copyright 2015 Technologic Systems
3 * Copyright 2017 Savoir-faire Linux
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "imx6dl.dtsi"
45#include "imx6qdl-ts7970.dtsi"
46
47/ {
48 model = "Technologic Systems i.MX6 Solo/DualLite TS-7970 (Default Device Tree)";
49 compatible = "technologic,imx6dl-ts7970", "fsl,imx6dl";
50};
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 4d693a75ce98..c01674fa098a 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -170,7 +170,7 @@
170}; 170};
171 171
172&gpr { 172&gpr {
173 ipu1_csi0_mux: ipu1_csi0_mux@34 { 173 ipu1_csi0_mux {
174 compatible = "video-mux"; 174 compatible = "video-mux";
175 mux-controls = <&mux 0>; 175 mux-controls = <&mux 0>;
176 #address-cells = <1>; 176 #address-cells = <1>;
@@ -224,7 +224,7 @@
224 }; 224 };
225 }; 225 };
226 226
227 ipu1_csi1_mux: ipu1_csi1_mux@34 { 227 ipu1_csi1_mux {
228 compatible = "video-mux"; 228 compatible = "video-mux";
229 mux-controls = <&mux 1>; 229 mux-controls = <&mux 1>;
230 #address-cells = <1>; 230 #address-cells = <1>;
@@ -309,10 +309,12 @@
309 #size-cells = <0>; 309 #size-cells = <0>;
310 310
311 mipi_vc0_to_ipu1_csi0_mux: endpoint@0 { 311 mipi_vc0_to_ipu1_csi0_mux: endpoint@0 {
312 reg = <0>;
312 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>; 313 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;
313 }; 314 };
314 315
315 mipi_vc0_to_ipu1_csi1_mux: endpoint@1 { 316 mipi_vc0_to_ipu1_csi1_mux: endpoint@1 {
317 reg = <1>;
316 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>; 318 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>;
317 }; 319 };
318 }; 320 };
@@ -323,10 +325,12 @@
323 #size-cells = <0>; 325 #size-cells = <0>;
324 326
325 mipi_vc1_to_ipu1_csi0_mux: endpoint@0 { 327 mipi_vc1_to_ipu1_csi0_mux: endpoint@0 {
328 reg = <0>;
326 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>; 329 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>;
327 }; 330 };
328 331
329 mipi_vc1_to_ipu1_csi1_mux: endpoint@1 { 332 mipi_vc1_to_ipu1_csi1_mux: endpoint@1 {
333 reg = <1>;
330 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>; 334 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>;
331 }; 335 };
332 }; 336 };
@@ -337,10 +341,12 @@
337 #size-cells = <0>; 341 #size-cells = <0>;
338 342
339 mipi_vc2_to_ipu1_csi0_mux: endpoint@0 { 343 mipi_vc2_to_ipu1_csi0_mux: endpoint@0 {
344 reg = <0>;
340 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>; 345 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>;
341 }; 346 };
342 347
343 mipi_vc2_to_ipu1_csi1_mux: endpoint@1 { 348 mipi_vc2_to_ipu1_csi1_mux: endpoint@1 {
349 reg = <1>;
344 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>; 350 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>;
345 }; 351 };
346 }; 352 };
@@ -351,10 +357,12 @@
351 #size-cells = <0>; 357 #size-cells = <0>;
352 358
353 mipi_vc3_to_ipu1_csi0_mux: endpoint@0 { 359 mipi_vc3_to_ipu1_csi0_mux: endpoint@0 {
360 reg = <0>;
354 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>; 361 remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>;
355 }; 362 };
356 363
357 mipi_vc3_to_ipu1_csi1_mux: endpoint@1 { 364 mipi_vc3_to_ipu1_csi1_mux: endpoint@1 {
365 reg = <1>;
358 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>; 366 remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>;
359 }; 367 };
360 }; 368 };
diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts
index 8b56656e53da..aa0e631f3c0a 100644
--- a/arch/arm/boot/dts/imx6q-apalis-eval.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts
@@ -158,7 +158,7 @@
158 158
159 /* M41T0M6 real time clock on carrier board */ 159 /* M41T0M6 real time clock on carrier board */
160 rtc_i2c: rtc@68 { 160 rtc_i2c: rtc@68 {
161 compatible = "st,m41t00"; 161 compatible = "st,m41t0";
162 reg = <0x68>; 162 reg = <0x68>;
163 }; 163 };
164}; 164};
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
index 27dc0fc686a9..e8dccf552122 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
@@ -170,7 +170,7 @@
170 170
171 /* M41T0M6 real time clock on carrier board */ 171 /* M41T0M6 real time clock on carrier board */
172 rtc_i2c: rtc@68 { 172 rtc_i2c: rtc@68 {
173 compatible = "st,m41t00"; 173 compatible = "st,m41t0";
174 reg = <0x68>; 174 reg = <0x68>;
175 }; 175 };
176}; 176};
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
index 40b2c67fe7af..6831dfd24cc1 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
@@ -174,7 +174,7 @@
174 174
175 /* M41T0M6 real time clock on carrier board */ 175 /* M41T0M6 real time clock on carrier board */
176 rtc_i2c: rtc@68 { 176 rtc_i2c: rtc@68 {
177 compatible = "st,m41t00"; 177 compatible = "st,m41t0";
178 reg = <0x68>; 178 reg = <0x68>;
179 }; 179 };
180}; 180};
diff --git a/arch/arm/boot/dts/imx6q-cubox-i-emmc-som-v15.dts b/arch/arm/boot/dts/imx6q-cubox-i-emmc-som-v15.dts
new file mode 100644
index 000000000000..3e59ebbb3608
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-cubox-i-emmc-som-v15.dts
@@ -0,0 +1,60 @@
1/*
2 * Copyright (C) 2014 Russell King
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41/dts-v1/;
42
43#include "imx6q.dtsi"
44#include "imx6qdl-sr-som.dtsi"
45#include "imx6qdl-sr-som-ti.dtsi"
46#include "imx6qdl-sr-som-emmc.dtsi"
47#include "imx6qdl-cubox-i.dtsi"
48
49/ {
50 model = "SolidRun Cubox-i Dual/Quad (1.5som+emmc)";
51 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
52};
53
54&sata {
55 status = "okay";
56 fsl,transmit-level-mV = <1104>;
57 fsl,transmit-boost-mdB = <0>;
58 fsl,transmit-atten-16ths = <9>;
59 fsl,no-spread-spectrum;
60};
diff --git a/arch/arm/boot/dts/imx6q-cubox-i-som-v15.dts b/arch/arm/boot/dts/imx6q-cubox-i-som-v15.dts
new file mode 100644
index 000000000000..dab70d1230a2
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-cubox-i-som-v15.dts
@@ -0,0 +1,59 @@
1/*
2 * Copyright (C) 2014 Russell King
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41/dts-v1/;
42
43#include "imx6q.dtsi"
44#include "imx6qdl-sr-som.dtsi"
45#include "imx6qdl-sr-som-ti.dtsi"
46#include "imx6qdl-cubox-i.dtsi"
47
48/ {
49 model = "SolidRun Cubox-i Dual/Quad (1.5som)";
50 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
51};
52
53&sata {
54 status = "okay";
55 fsl,transmit-level-mV = <1104>;
56 fsl,transmit-boost-mdB = <0>;
57 fsl,transmit-atten-16ths = <9>;
58 fsl,no-spread-spectrum;
59};
diff --git a/arch/arm/boot/dts/imx6q-cubox-i.dts b/arch/arm/boot/dts/imx6q-cubox-i.dts
index b68aa0e57f20..1c7b262e3709 100644
--- a/arch/arm/boot/dts/imx6q-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6q-cubox-i.dts
@@ -41,6 +41,8 @@
41/dts-v1/; 41/dts-v1/;
42 42
43#include "imx6q.dtsi" 43#include "imx6q.dtsi"
44#include "imx6qdl-sr-som.dtsi"
45#include "imx6qdl-sr-som-brcm.dtsi"
44#include "imx6qdl-cubox-i.dtsi" 46#include "imx6qdl-cubox-i.dtsi"
45 47
46/ { 48/ {
diff --git a/arch/arm/boot/dts/imx6q-display5.dtsi b/arch/arm/boot/dts/imx6q-display5.dtsi
index 4084de43d4d9..09085fde3341 100644
--- a/arch/arm/boot/dts/imx6q-display5.dtsi
+++ b/arch/arm/boot/dts/imx6q-display5.dtsi
@@ -255,7 +255,7 @@
255 pinctrl-0 = <&pinctrl_i2c1>; 255 pinctrl-0 = <&pinctrl_i2c1>;
256 status = "okay"; 256 status = "okay";
257 257
258 codec: tfa9879@6C { 258 codec: tfa9879@6c {
259 #sound-dai-cells = <0>; 259 #sound-dai-cells = <0>;
260 compatible = "nxp,tfa9879"; 260 compatible = "nxp,tfa9879";
261 reg = <0x6C>; 261 reg = <0x6C>;
diff --git a/arch/arm/boot/dts/imx6q-h100.dts b/arch/arm/boot/dts/imx6q-h100.dts
index a3269f57df2b..8a2ea6c58902 100644
--- a/arch/arm/boot/dts/imx6q-h100.dts
+++ b/arch/arm/boot/dts/imx6q-h100.dts
@@ -42,8 +42,8 @@
42/dts-v1/; 42/dts-v1/;
43 43
44#include "imx6q.dtsi" 44#include "imx6q.dtsi"
45#include "imx6qdl-microsom.dtsi" 45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-microsom-ar8035.dtsi" 46#include "imx6qdl-sr-som-brcm.dtsi"
47 47
48/ { 48/ {
49 model = "Auvidea H100"; 49 model = "Auvidea H100";
@@ -108,21 +108,6 @@
108 regulator-always-on; 108 regulator-always-on;
109 }; 109 };
110 110
111 reg_nvcc_sd2: regulator-nvcc-sd2 {
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_h100_reg_nvcc_sd2>;
114 compatible = "regulator-gpio";
115 regulator-name = "NVCC_SD2";
116 regulator-min-microvolt = <1800000>;
117 regulator-max-microvolt = <3300000>;
118 regulator-type = "voltage";
119 regulator-boot-on;
120 regulator-always-on;
121 gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
122 states = <1800000 0x1
123 3300000 0x0>;
124 };
125
126 reg_usbh1_vbus: regulator-usb-h1-vbus { 111 reg_usbh1_vbus: regulator-usb-h1-vbus {
127 compatible = "regulator-fixed"; 112 compatible = "regulator-fixed";
128 enable-active-high; 113 enable-active-high;
@@ -205,7 +190,7 @@
205 reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; 190 reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
206 /* IRQ has a wrong pull resistor which renders it useless */ 191 /* IRQ has a wrong pull resistor which renders it useless */
207 192
208 port@0 { 193 port {
209 tc358743_out: endpoint { 194 tc358743_out: endpoint {
210 remote-endpoint = <&mipi_csi2_in>; 195 remote-endpoint = <&mipi_csi2_in>;
211 data-lanes = <1 2 3 4>; 196 data-lanes = <1 2 3 4>;
@@ -260,12 +245,6 @@
260 >; 245 >;
261 }; 246 };
262 247
263 pinctrl_h100_reg_nvcc_sd2: h100-reg-nvcc-sd2 {
264 fsl,pins = <
265 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
266 >;
267 };
268
269 pinctrl_h100_sgtl5000: h100-sgtl5000 { 248 pinctrl_h100_sgtl5000: h100-sgtl5000 {
270 fsl,pins = < 249 fsl,pins = <
271 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 250 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
@@ -316,6 +295,7 @@
316 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 295 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
317 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 296 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
318 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 297 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
298 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0
319 >; 299 >;
320 }; 300 };
321 301
@@ -328,6 +308,7 @@
328 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 308 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
329 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 309 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
330 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 310 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
311 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0
331 >; 312 >;
332 }; 313 };
333 314
@@ -340,6 +321,7 @@
340 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 321 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
341 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 322 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
342 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 323 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
324 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0
343 >; 325 >;
344 }; 326 };
345 }; 327 };
@@ -348,7 +330,7 @@
348&mipi_csi { 330&mipi_csi {
349 status = "okay"; 331 status = "okay";
350 332
351 port@0 { 333 port {
352 mipi_csi2_in: endpoint { 334 mipi_csi2_in: endpoint {
353 remote-endpoint = <&tc358743_out>; 335 remote-endpoint = <&tc358743_out>;
354 data-lanes = <1 2 3 4>; 336 data-lanes = <1 2 3 4>;
@@ -389,7 +371,6 @@
389 pinctrl-1 = <&pinctrl_h100_usdhc2_100mhz>; 371 pinctrl-1 = <&pinctrl_h100_usdhc2_100mhz>;
390 pinctrl-2 = <&pinctrl_h100_usdhc2_200mhz>; 372 pinctrl-2 = <&pinctrl_h100_usdhc2_200mhz>;
391 vmmc-supply = <&reg_3p3v>; 373 vmmc-supply = <&reg_3p3v>;
392 vqmmc-supply = <&reg_nvcc_sd2>;
393 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 374 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
394 status = "okay"; 375 status = "okay";
395}; 376};
diff --git a/arch/arm/boot/dts/imx6q-hummingboard-emmc-som-v15.dts b/arch/arm/boot/dts/imx6q-hummingboard-emmc-som-v15.dts
new file mode 100644
index 000000000000..c51b4e4fd71e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-hummingboard-emmc-som-v15.dts
@@ -0,0 +1,61 @@
1/*
2 * Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
3 * Based on dt work by Russell King
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42/dts-v1/;
43
44#include "imx6q.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-ti.dtsi"
47#include "imx6qdl-sr-som-emmc.dtsi"
48#include "imx6qdl-hummingboard.dtsi"
49
50/ {
51 model = "SolidRun HummingBoard Dual/Quad (1.5som+emmc)";
52 compatible = "solidrun,hummingboard/q", "fsl,imx6q";
53};
54
55&sata {
56 status = "okay";
57 fsl,transmit-level-mV = <1025>;
58 fsl,transmit-boost-mdB = <3330>;
59 fsl,transmit-atten-16ths = <9>;
60 fsl,receive-eq-mdB = <3000>;
61};
diff --git a/arch/arm/boot/dts/imx6q-hummingboard-som-v15.dts b/arch/arm/boot/dts/imx6q-hummingboard-som-v15.dts
new file mode 100644
index 000000000000..e4132d62ffa2
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-hummingboard-som-v15.dts
@@ -0,0 +1,60 @@
1/*
2 * Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
3 * Based on dt work by Russell King
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42/dts-v1/;
43
44#include "imx6q.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-ti.dtsi"
47#include "imx6qdl-hummingboard.dtsi"
48
49/ {
50 model = "SolidRun HummingBoard Dual/Quad (1.5som)";
51 compatible = "solidrun,hummingboard/q", "fsl,imx6q";
52};
53
54&sata {
55 status = "okay";
56 fsl,transmit-level-mV = <1025>;
57 fsl,transmit-boost-mdB = <3330>;
58 fsl,transmit-atten-16ths = <9>;
59 fsl,receive-eq-mdB = <3000>;
60};
diff --git a/arch/arm/boot/dts/imx6q-hummingboard.dts b/arch/arm/boot/dts/imx6q-hummingboard.dts
index 69a7a0a1cb21..8c9e94e648a7 100644
--- a/arch/arm/boot/dts/imx6q-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6q-hummingboard.dts
@@ -42,6 +42,8 @@
42/dts-v1/; 42/dts-v1/;
43 43
44#include "imx6q.dtsi" 44#include "imx6q.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-brcm.dtsi"
45#include "imx6qdl-hummingboard.dtsi" 47#include "imx6qdl-hummingboard.dtsi"
46 48
47/ { 49/ {
diff --git a/arch/arm/boot/dts/imx6q-hummingboard2-emmc-som-v15.dts b/arch/arm/boot/dts/imx6q-hummingboard2-emmc-som-v15.dts
new file mode 100644
index 000000000000..1998ebfa0fe0
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-hummingboard2-emmc-som-v15.dts
@@ -0,0 +1,63 @@
1/*
2 * Device Tree file for SolidRun HummingBoard2
3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
4 * Based on work by Russell King
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License.
15 *
16 * This file is distributed in the hope that it will be useful
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44/dts-v1/;
45
46#include "imx6q.dtsi"
47#include "imx6qdl-sr-som.dtsi"
48#include "imx6qdl-sr-som-emmc.dtsi"
49#include "imx6qdl-sr-som-ti.dtsi"
50#include "imx6qdl-hummingboard2.dtsi"
51
52/ {
53 model = "SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)";
54 compatible = "solidrun,hummingboard2/q", "fsl,imx6q";
55};
56
57&sata {
58 status = "okay";
59 fsl,transmit-level-mV = <1104>;
60 fsl,transmit-boost-mdB = <0>;
61 fsl,transmit-atten-16ths = <9>;
62 fsl,no-spread-spectrum;
63};
diff --git a/arch/arm/boot/dts/imx6q-hummingboard2-som-v15.dts b/arch/arm/boot/dts/imx6q-hummingboard2-som-v15.dts
new file mode 100644
index 000000000000..d3ad7329cd6d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-hummingboard2-som-v15.dts
@@ -0,0 +1,62 @@
1/*
2 * Device Tree file for SolidRun HummingBoard2
3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
4 * Based on work by Russell King
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License.
15 *
16 * This file is distributed in the hope that it will be useful
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44/dts-v1/;
45
46#include "imx6q.dtsi"
47#include "imx6qdl-sr-som.dtsi"
48#include "imx6qdl-sr-som-ti.dtsi"
49#include "imx6qdl-hummingboard2.dtsi"
50
51/ {
52 model = "SolidRun HummingBoard2 Dual/Quad (1.5som)";
53 compatible = "solidrun,hummingboard2/q", "fsl,imx6q";
54};
55
56&sata {
57 status = "okay";
58 fsl,transmit-level-mV = <1104>;
59 fsl,transmit-boost-mdB = <0>;
60 fsl,transmit-atten-16ths = <9>;
61 fsl,no-spread-spectrum;
62};
diff --git a/arch/arm/boot/dts/imx6q-hummingboard2.dts b/arch/arm/boot/dts/imx6q-hummingboard2.dts
new file mode 100644
index 000000000000..5249f53dcdbc
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-hummingboard2.dts
@@ -0,0 +1,61 @@
1/*
2 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
3 * Based on dt work by Russell King
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42/dts-v1/;
43
44#include "imx6q.dtsi"
45#include "imx6qdl-sr-som.dtsi"
46#include "imx6qdl-sr-som-brcm.dtsi"
47#include "imx6qdl-hummingboard2.dtsi"
48#include "imx6qdl-hummingboard2-emmc.dtsi"
49
50/ {
51 model = "SolidRun HummingBoard2 Dual/Quad";
52 compatible = "solidrun,hummingboard2/q", "fsl,imx6q";
53};
54
55&sata {
56 status = "okay";
57 fsl,transmit-level-mV = <1104>;
58 fsl,transmit-boost-mdB = <0>;
59 fsl,transmit-atten-16ths = <9>;
60 fsl,no-spread-spectrum;
61};
diff --git a/arch/arm/boot/dts/imx6q-pinfunc.h b/arch/arm/boot/dts/imx6q-pinfunc.h
index 9fc6120a1853..cfb11d3e739c 100644
--- a/arch/arm/boot/dts/imx6q-pinfunc.h
+++ b/arch/arm/boot/dts/imx6q-pinfunc.h
@@ -551,6 +551,7 @@
551#define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1e0 0x4f4 0x860 0x2 0x0 551#define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1e0 0x4f4 0x860 0x2 0x0
552#define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1e0 0x4f4 0x000 0x4 0x0 552#define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1e0 0x4f4 0x000 0x4 0x0
553#define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1e0 0x4f4 0x000 0x5 0x0 553#define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1e0 0x4f4 0x000 0x5 0x0
554#define MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x1e4 0x4f8 0x000 0x0 0x0
554#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1e4 0x4f8 0x848 0x1 0x1 555#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1e4 0x4f8 0x848 0x1 0x1
555#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1e4 0x4f8 0x868 0x2 0x0 556#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1e4 0x4f8 0x868 0x2 0x0
556#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1e4 0x4f8 0x000 0x3 0x0 557#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1e4 0x4f8 0x000 0x3 0x0
diff --git a/arch/arm/boot/dts/imx6q-ts7970.dts b/arch/arm/boot/dts/imx6q-ts7970.dts
new file mode 100644
index 000000000000..f19e18995e68
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-ts7970.dts
@@ -0,0 +1,54 @@
1/*
2 * Copyright 2015 Technologic Systems
3 * Copyright 2017 Savoir-faire Linux
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "imx6q.dtsi"
45#include "imx6qdl-ts7970.dtsi"
46
47/ {
48 model = "Technologic Systems i.MX6 Quad TS-7970 (Default Device Tree)";
49 compatible = "technologic,imx6q-ts7970", "fsl,imx6q";
50};
51
52&sata {
53 status = "okay";
54};
diff --git a/arch/arm/boot/dts/imx6q-var-dt6customboard.dts b/arch/arm/boot/dts/imx6q-var-dt6customboard.dts
new file mode 100644
index 000000000000..e0728d475f6f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-var-dt6customboard.dts
@@ -0,0 +1,235 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Support for Variscite DART-MX6 Carrier-board
4 *
5 * Copyright 2017 BayLibre, SAS
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 */
8
9/dts-v1/;
10
11#include "imx6q.dtsi"
12#include "imx6qdl-var-dart.dtsi"
13#include <dt-bindings/input/linux-event-codes.h>
14
15/ {
16 model = "Variscite DART-MX6 Carrier-board";
17 compatible = "variscite,dt6customboard", "fsl,imx6q";
18
19 backlight_lvds: backlight {
20 compatible = "pwm-backlight";
21 pwms = <&pwm2 0 50000>;
22 brightness-levels = <0 4 8 16 32 64 128 248>;
23 default-brightness-level = <7>;
24 status = "okay";
25 };
26
27 gpio-keys {
28 compatible = "gpio-keys";
29 #address-cells = <1>;
30 #size-cells = <0>;
31 autorepeat;
32
33 back {
34 gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_BACK>;
36 label = "Key Back";
37 linux,input-type = <1>;
38 debounce-interval = <100>;
39 wakeup-source;
40 };
41
42 home {
43 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_HOME>;
45 label = "Key Home";
46 linux,input-type = <1>;
47 debounce-interval = <100>;
48 wakeup-source;
49 };
50
51 menu {
52 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
53 linux,code = <KEY_MENU>;
54 label = "Key Menu";
55 linux,input-type = <1>;
56 debounce-interval = <100>;
57 wakeup-source;
58 };
59 };
60
61 gpio-leds {
62 compatible = "gpio-leds";
63
64 led1 {
65 gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
66 linux,default-trigger = "heartbeat";
67 };
68
69 led2 {
70 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
71 linux,default-trigger = "default-on";
72 };
73 };
74
75 panel1: lvds-panel {
76 compatible = "sgd,gktw70sdae4se", "panel-lvds";
77 backlight = <&backlight_lvds>;
78 width-mm = <153>;
79 height-mm = <86>;
80 label = "gktw70sdae4se";
81 data-mapping = "jeida-18";
82
83 panel-timing {
84 clock-frequency = <32000000>;
85 hactive = <800>;
86 vactive = <480>;
87 hback-porch = <39>;
88 hfront-porch = <39>;
89 vback-porch = <29>;
90 vfront-porch = <13>;
91 hsync-len = <47>;
92 vsync-len = <2>;
93 };
94
95 port {
96 panel_in: endpoint {
97 remote-endpoint = <&lvds1_out>;
98 };
99 };
100 };
101
102 reg_usb_h1_vbus: regulator-usbh1vbus {
103 compatible = "regulator-fixed";
104 regulator-name = "usb_h1_vbus";
105 regulator-min-microvolt = <5000000>;
106 regulator-max-microvolt = <5000000>;
107 gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
108 enable-active-high;
109 };
110
111 reg_usb_otg_vbus: regulator-usbotgvbus {
112 compatible = "regulator-fixed";
113 regulator-name = "usb_otg_vbus";
114 regulator-min-microvolt = <5000000>;
115 regulator-max-microvolt = <5000000>;
116 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
117 enable-active-high;
118 };
119
120 sound {
121 compatible = "simple-audio-card";
122 simple-audio-card,name = "dt6-customboard-audio";
123 simple-audio-card,format = "i2s";
124 simple-audio-card,bitclock-master = <&sound_codec>;
125 simple-audio-card,frame-master = <&sound_codec>;
126 simple-audio-card,widgets = "Headphone", "Headphone Jack",
127 "Line", "Line In";
128 simple-audio-card,routing = "Headphone Jack", "HPLOUT",
129 "Headphone Jack", "HPROUT",
130 "LINE1L", "Line In",
131 "LINE1R", "Line In";
132
133 sound_cpu: simple-audio-card,cpu {
134 sound-dai = <&ssi2>;
135 };
136
137 sound_codec: simple-audio-card,codec {
138 sound-dai = <&tlv320aic3106>;
139 clocks = <&clks IMX6QDL_CLK_CKO>;
140 };
141 };
142};
143
144&can1 {
145 status = "okay";
146};
147
148&ecspi1 {
149 cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>,
150 <&gpio4 10 GPIO_ACTIVE_HIGH>;
151 status = "okay";
152};
153
154&fec {
155 status = "okay";
156 phy-mode = "rgmii";
157 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
158};
159
160&hdmi {
161 status = "okay";
162};
163
164&i2c1 {
165 clock-frequency = <100000>;
166 status = "okay";
167};
168
169&i2c3 {
170 clock-frequency = <100000>;
171 status = "okay";
172
173 touchscreen@38 {
174 compatible = "edt,edt-ft5x06";
175 reg = <0x38>;
176 interrupt-parent = <&gpio1>;
177 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
178 touchscreen-size-x = <800>;
179 touchscreen-size-y = <480>;
180 touchscreen-inverted-x;
181 touchscreen-inverted-y;
182 };
183
184 rtc@68 {
185 compatible = "isil,isl12057";
186 reg = <0x68>;
187 };
188};
189
190&ldb {
191 status = "okay";
192
193 lvds-channel@1 {
194 status = "okay";
195
196 port@4 {
197 reg = <4>;
198
199 lvds1_out: endpoint {
200 remote-endpoint = <&panel_in>;
201 };
202 };
203 };
204};
205
206&pwm2 {
207 status = "okay";
208};
209
210&uart1 {
211 status = "okay";
212};
213
214&uart3 {
215 status = "okay";
216};
217
218&usbh1 {
219 vbus-supply = <&reg_usb_h1_vbus>;
220 status = "okay";
221};
222
223&usbotg {
224 vbus-supply = <&reg_usb_otg_vbus>;
225 dr_mode = "otg";
226 srp-disable;
227 hnp-disable;
228 adp-disable;
229 status = "okay";
230};
231
232&usdhc2 {
233 cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
234 status = "okay";
235};
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index e80fdca585f8..4e776e036cbc 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -338,7 +338,6 @@
338 338
339 stmpe_touchscreen { 339 stmpe_touchscreen {
340 compatible = "st,stmpe-ts"; 340 compatible = "st,stmpe-ts";
341 reg = <0>;
342 /* 3.25 MHz ADC clock speed */ 341 /* 3.25 MHz ADC clock speed */
343 st,adc-freq = <1>; 342 st,adc-freq = <1>;
344 /* 8 sample average control */ 343 /* 8 sample average control */
diff --git a/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi b/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
index 829a47938179..9fc1fa449f64 100644
--- a/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
@@ -111,32 +111,28 @@
111 }; 111 };
112 }; 112 };
113 113
114 regulators { 114 reg_3p3v: regulator-3p3v {
115 compatible = "simple-bus"; 115 compatible = "regulator-fixed";
116 116 regulator-name = "3P3V";
117 reg_3p3v: 3p3v { 117 regulator-min-microvolt = <3300000>;
118 compatible = "regulator-fixed"; 118 regulator-max-microvolt = <3300000>;
119 regulator-name = "3P3V"; 119 regulator-always-on;
120 regulator-min-microvolt = <3300000>; 120 };
121 regulator-max-microvolt = <3300000>;
122 regulator-always-on;
123 };
124 121
125 reg_usbh1_vbus: usb-h1-vbus { 122 reg_usbh1_vbus: regulator-usb-h1-vbus {
126 compatible = "regulator-fixed"; 123 compatible = "regulator-fixed";
127 regulator-name = "usb_h1_vbus"; 124 regulator-name = "usb_h1_vbus";
128 regulator-min-microvolt = <5000000>; 125 regulator-min-microvolt = <5000000>;
129 regulator-max-microvolt = <5000000>; 126 regulator-max-microvolt = <5000000>;
130 regulator-always-on; 127 regulator-always-on;
131 }; 128 };
132 129
133 reg_usb_otg_vbus: usb-otg-vbus { 130 reg_usb_otg_vbus: regulator-usb-otg-vbus {
134 compatible = "regulator-fixed"; 131 compatible = "regulator-fixed";
135 regulator-name = "usb_otg_vbus"; 132 regulator-name = "usb_otg_vbus";
136 regulator-min-microvolt = <5000000>; 133 regulator-min-microvolt = <5000000>;
137 regulator-max-microvolt = <5000000>; 134 regulator-max-microvolt = <5000000>;
138 regulator-always-on; 135 regulator-always-on;
139 };
140 }; 136 };
141 137
142 sound { 138 sound {
diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
index 7d64075204ae..ee4d0f84eeb2 100644
--- a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
@@ -12,48 +12,43 @@
12#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/gpio/gpio.h>
13 13
14/ { 14/ {
15 regulators {
16 compatible = "simple-bus";
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 reg_2p5v: regulator@0 {
21 compatible = "regulator-fixed";
22 regulator-name = "2P5V";
23 regulator-min-microvolt = <2500000>;
24 regulator-max-microvolt = <2500000>;
25 regulator-always-on;
26 };
27 15
28 reg_3p3v: regulator@1 { 16 reg_2p5v: regulator-2p5v {
29 compatible = "regulator-fixed"; 17 compatible = "regulator-fixed";
30 regulator-name = "3P3V"; 18 regulator-name = "2P5V";
31 regulator-min-microvolt = <3300000>; 19 regulator-min-microvolt = <2500000>;
32 regulator-max-microvolt = <3300000>; 20 regulator-max-microvolt = <2500000>;
33 regulator-always-on; 21 regulator-always-on;
34 }; 22 };
35 23
36 reg_usbh1_vbus: regulator@2 { 24 reg_3p3v: regulator-3p3v {
37 compatible = "regulator-fixed"; 25 compatible = "regulator-fixed";
38 enable-active-high; 26 regulator-name = "3P3V";
39 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; 27 regulator-min-microvolt = <3300000>;
40 pinctrl-names = "default"; 28 regulator-max-microvolt = <3300000>;
41 pinctrl-0 = <&pinctrl_aristainetos_usbh1_vbus>; 29 regulator-always-on;
42 regulator-name = "usb_h1_vbus"; 30 };
43 regulator-min-microvolt = <5000000>;
44 regulator-max-microvolt = <5000000>;
45 };
46 31
47 reg_usbotg_vbus: regulator@3 { 32 reg_usbh1_vbus: regulator-usbh1-vbus {
48 compatible = "regulator-fixed"; 33 compatible = "regulator-fixed";
49 enable-active-high; 34 enable-active-high;
50 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; 35 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
51 pinctrl-names = "default"; 36 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_aristainetos_usbotg_vbus>; 37 pinctrl-0 = <&pinctrl_aristainetos_usbh1_vbus>;
53 regulator-name = "usb_otg_vbus"; 38 regulator-name = "usb_h1_vbus";
54 regulator-min-microvolt = <5000000>; 39 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>; 40 regulator-max-microvolt = <5000000>;
56 }; 41 };
42
43 reg_usbotg_vbus: regulator-usbotg-vbus {
44 compatible = "regulator-fixed";
45 enable-active-high;
46 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_aristainetos_usbotg_vbus>;
49 regulator-name = "usb_otg_vbus";
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
57 }; 52 };
58}; 53};
59 54
diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
index 1b1872873207..376750882ed3 100644
--- a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
@@ -52,46 +52,42 @@
52 enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>; 52 enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
53 }; 53 };
54 54
55 regulators { 55 reg_2p5v: regulator-2p5v {
56 compatible = "simple-bus"; 56 compatible = "regulator-fixed";
57 57 regulator-name = "2P5V";
58 reg_2p5v: 2p5v { 58 regulator-min-microvolt = <2500000>;
59 compatible = "regulator-fixed"; 59 regulator-max-microvolt = <2500000>;
60 regulator-name = "2P5V"; 60 regulator-always-on;
61 regulator-min-microvolt = <2500000>; 61 };
62 regulator-max-microvolt = <2500000>; 62
63 regulator-always-on; 63 reg_3p3v: regulator-3p3v {
64 }; 64 compatible = "regulator-fixed";
65 65 regulator-name = "3P3V";
66 reg_3p3v: 3p3v { 66 regulator-min-microvolt = <3300000>;
67 compatible = "regulator-fixed"; 67 regulator-max-microvolt = <3300000>;
68 regulator-name = "3P3V"; 68 regulator-always-on;
69 regulator-min-microvolt = <3300000>; 69 };
70 regulator-max-microvolt = <3300000>; 70
71 regulator-always-on; 71 reg_usbh1_vbus: regulator-usbh1-vbus {
72 }; 72 compatible = "regulator-fixed";
73 73 enable-active-high;
74 reg_usbh1_vbus: usb-h1-vbus { 74 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
75 compatible = "regulator-fixed"; 75 pinctrl-names = "default";
76 enable-active-high; 76 pinctrl-0 = <&pinctrl_aristainetos2_usbh1_vbus>;
77 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 77 regulator-name = "usb_h1_vbus";
78 pinctrl-names = "default"; 78 regulator-min-microvolt = <5000000>;
79 pinctrl-0 = <&pinctrl_aristainetos2_usbh1_vbus>; 79 regulator-max-microvolt = <5000000>;
80 regulator-name = "usb_h1_vbus"; 80 };
81 regulator-min-microvolt = <5000000>; 81
82 regulator-max-microvolt = <5000000>; 82 reg_usbotg_vbus: regulator-usbotg-vbus {
83 }; 83 compatible = "regulator-fixed";
84 84 enable-active-high;
85 reg_usbotg_vbus: usb-otg-vbus { 85 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
86 compatible = "regulator-fixed"; 86 pinctrl-names = "default";
87 enable-active-high; 87 pinctrl-0 = <&pinctrl_aristainetos2_usbotg_vbus>;
88 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; 88 regulator-name = "usb_otg_vbus";
89 pinctrl-names = "default"; 89 regulator-min-microvolt = <5000000>;
90 pinctrl-0 = <&pinctrl_aristainetos2_usbotg_vbus>; 90 regulator-max-microvolt = <5000000>;
91 regulator-name = "usb_otg_vbus";
92 regulator-min-microvolt = <5000000>;
93 regulator-max-microvolt = <5000000>;
94 };
95 }; 91 };
96}; 92};
97 93
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index fc66bbfd6796..e4eb300549d4 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -274,7 +274,6 @@
274 274
275 stmpe_touchscreen { 275 stmpe_touchscreen {
276 compatible = "st,stmpe-ts"; 276 compatible = "st,stmpe-ts";
277 reg = <0>;
278 /* 3.25 MHz ADC clock speed */ 277 /* 3.25 MHz ADC clock speed */
279 st,adc-freq = <1>; 278 st,adc-freq = <1>;
280 /* 8 sample average control */ 279 /* 8 sample average control */
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index 14fff4ee6516..d1cfdc264126 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -38,8 +38,6 @@
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE. 39 * OTHER DEALINGS IN THE SOFTWARE.
40 */ 40 */
41#include "imx6qdl-microsom.dtsi"
42#include "imx6qdl-microsom-ar8035.dtsi"
43#include <dt-bindings/input/input.h> 41#include <dt-bindings/input/input.h>
44#include <dt-bindings/gpio/gpio.h> 42#include <dt-bindings/gpio/gpio.h>
45 43
@@ -64,38 +62,36 @@
64 }; 62 };
65 }; 63 };
66 64
67 regulators { 65 v_5v0: regulator-v-5v0 {
68 compatible = "simple-bus"; 66 compatible = "regulator-fixed";
69 67 regulator-always-on;
70 reg_3p3v: 3p3v { 68 regulator-max-microvolt = <5000000>;
71 compatible = "regulator-fixed"; 69 regulator-min-microvolt = <5000000>;
72 regulator-name = "3P3V"; 70 regulator-name = "v_5v0";
73 regulator-min-microvolt = <3300000>; 71 };
74 regulator-max-microvolt = <3300000>;
75 regulator-always-on;
76 };
77 72
78 reg_usbh1_vbus: usb-h1-vbus { 73 v_usb2: regulator-v-usb2 {
79 compatible = "regulator-fixed"; 74 compatible = "regulator-fixed";
80 enable-active-high; 75 enable-active-high;
81 gpio = <&gpio1 0 0>; 76 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
82 pinctrl-names = "default"; 77 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>; 78 pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>;
84 regulator-name = "usb_h1_vbus"; 79 regulator-max-microvolt = <5000000>;
85 regulator-min-microvolt = <5000000>; 80 regulator-min-microvolt = <5000000>;
86 regulator-max-microvolt = <5000000>; 81 regulator-name = "v_usb2";
87 }; 82 vin-supply = <&v_5v0>;
83 };
88 84
89 reg_usbotg_vbus: usb-otg-vbus { 85 v_usb1: regulator-v-usb1 {
90 compatible = "regulator-fixed"; 86 compatible = "regulator-fixed";
91 enable-active-high; 87 enable-active-high;
92 gpio = <&gpio3 22 0>; 88 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
93 pinctrl-names = "default"; 89 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>; 90 pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>;
95 regulator-name = "usb_otg_vbus"; 91 regulator-max-microvolt = <5000000>;
96 regulator-min-microvolt = <5000000>; 92 regulator-min-microvolt = <5000000>;
97 regulator-max-microvolt = <5000000>; 93 regulator-name = "v_usb1";
98 }; 94 vin-supply = <&v_5v0>;
99 }; 95 };
100 96
101 sound-spdif { 97 sound-spdif {
@@ -139,7 +135,7 @@
139 135
140 status = "okay"; 136 status = "okay";
141 137
142 rtc: pcf8523@68 { 138 rtc@68 {
143 compatible = "nxp,pcf8523"; 139 compatible = "nxp,pcf8523";
144 reg = <0x68>; 140 reg = <0x68>;
145 }; 141 };
@@ -243,21 +239,25 @@
243&usbh1 { 239&usbh1 {
244 pinctrl-names = "default"; 240 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_cubox_i_usbh1>; 241 pinctrl-0 = <&pinctrl_cubox_i_usbh1>;
246 vbus-supply = <&reg_usbh1_vbus>; 242 vbus-supply = <&v_usb2>;
247 status = "okay"; 243 status = "okay";
248}; 244};
249 245
250&usbotg { 246&usbotg {
251 pinctrl-names = "default"; 247 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_cubox_i_usbotg>; 248 pinctrl-0 = <&pinctrl_cubox_i_usbotg>;
253 vbus-supply = <&reg_usbotg_vbus>; 249 vbus-supply = <&v_usb1>;
254 status = "okay"; 250 status = "okay";
255}; 251};
256 252
257&usdhc2 { 253&usdhc2 {
258 pinctrl-names = "default"; 254 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>; 255 pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
260 vmmc-supply = <&reg_3p3v>; 256 vmmc-supply = <&vcc_3v3>;
261 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 257 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
262 status = "okay"; 258 status = "okay";
263}; 259};
260
261&vcc_3v3 {
262 vin-supply = <&v_5v0>;
263};
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index 37c07c0748aa..92583238ca4a 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -38,8 +38,6 @@
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE. 39 * OTHER DEALINGS IN THE SOFTWARE.
40 */ 40 */
41#include "imx6qdl-microsom.dtsi"
42#include "imx6qdl-microsom-ar8035.dtsi"
43 41
44/ { 42/ {
45 chosen { 43 chosen {
@@ -53,38 +51,58 @@
53 pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>; 51 pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
54 }; 52 };
55 53
56 regulators { 54 v_3v2: regulator-v-3v2 {
57 compatible = "simple-bus"; 55 compatible = "regulator-fixed";
56 regulator-always-on;
57 regulator-max-microvolt = <3300000>;
58 regulator-min-microvolt = <3300000>;
59 regulator-name = "v_3v2";
60 vin-supply = <&v_5v0>;
61 };
58 62
59 reg_3p3v: 3p3v { 63 v_5v0: regulator-v-5v0 {
60 compatible = "regulator-fixed"; 64 compatible = "regulator-fixed";
61 regulator-name = "3P3V"; 65 regulator-always-on;
62 regulator-min-microvolt = <3300000>; 66 regulator-max-microvolt = <5000000>;
63 regulator-max-microvolt = <3300000>; 67 regulator-min-microvolt = <5000000>;
64 regulator-always-on; 68 regulator-name = "v_5v0";
65 }; 69 };
66 70
67 reg_usbh1_vbus: usb-h1-vbus { 71 v_sd: regulator-v-sd {
68 compatible = "regulator-fixed"; 72 compatible = "regulator-fixed";
69 enable-active-high; 73 gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
70 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 74 pinctrl-names = "default";
71 pinctrl-names = "default"; 75 pinctrl-0 = <&pinctrl_hummingboard_vmmc>;
72 pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>; 76 regulator-boot-on;
73 regulator-name = "usb_h1_vbus"; 77 regulator-max-microvolt = <3300000>;
74 regulator-min-microvolt = <5000000>; 78 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <5000000>; 79 regulator-name = "v_sd";
76 }; 80 startup-delay-us = <1000>;
81 vin-supply = <&v_3v2>;
82 };
77 83
78 reg_usbotg_vbus: usb-otg-vbus { 84 v_usb2: regulator-v-usb2 {
79 compatible = "regulator-fixed"; 85 compatible = "regulator-fixed";
80 enable-active-high; 86 enable-active-high;
81 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 87 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
82 pinctrl-names = "default"; 88 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>; 89 pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
84 regulator-name = "usb_otg_vbus"; 90 regulator-max-microvolt = <5000000>;
85 regulator-min-microvolt = <5000000>; 91 regulator-min-microvolt = <5000000>;
86 regulator-max-microvolt = <5000000>; 92 regulator-name = "v_usb2";
87 }; 93 vin-supply = <&v_5v0>;
94 };
95
96 v_usb1: regulator-v-usb1 {
97 compatible = "regulator-fixed";
98 enable-active-high;
99 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
102 regulator-max-microvolt = <5000000>;
103 regulator-min-microvolt = <5000000>;
104 regulator-name = "v_usb1";
105 vin-supply = <&v_5v0>;
88 }; 106 };
89 107
90 sound-sgtl5000 { 108 sound-sgtl5000 {
@@ -132,20 +150,20 @@
132 status = "okay"; 150 status = "okay";
133 151
134 /* Pro baseboard model */ 152 /* Pro baseboard model */
135 rtc: pcf8523@68 { 153 rtc@68 {
136 compatible = "nxp,pcf8523"; 154 compatible = "nxp,pcf8523";
137 reg = <0x68>; 155 reg = <0x68>;
138 }; 156 };
139 157
140 /* Pro baseboard model */ 158 /* Pro baseboard model */
141 sgtl5000: sgtl5000@a { 159 sgtl5000: codec@a {
142 clocks = <&clks IMX6QDL_CLK_CKO>; 160 clocks = <&clks IMX6QDL_CLK_CKO>;
143 compatible = "fsl,sgtl5000"; 161 compatible = "fsl,sgtl5000";
144 pinctrl-names = "default"; 162 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>; 163 pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>;
146 reg = <0x0a>; 164 reg = <0x0a>;
147 VDDA-supply = <&reg_3p3v>; 165 VDDA-supply = <&v_3v2>;
148 VDDIO-supply = <&reg_3p3v>; 166 VDDIO-supply = <&v_3v2>;
149 }; 167 };
150}; 168};
151 169
@@ -247,6 +265,11 @@
247 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 265 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
248 >; 266 >;
249 }; 267 };
268 pinctrl_hummingboard_vmmc: hummingboard-vmmc {
269 fsl,pins = <
270 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
271 >;
272 };
250 }; 273 };
251}; 274};
252 275
@@ -280,7 +303,7 @@
280 303
281&usbh1 { 304&usbh1 {
282 disable-over-current; 305 disable-over-current;
283 vbus-supply = <&reg_usbh1_vbus>; 306 vbus-supply = <&v_usb2>;
284 status = "okay"; 307 status = "okay";
285}; 308};
286 309
@@ -288,7 +311,7 @@
288 disable-over-current; 311 disable-over-current;
289 pinctrl-names = "default"; 312 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>; 313 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
291 vbus-supply = <&reg_usbotg_vbus>; 314 vbus-supply = <&v_usb1>;
292 status = "okay"; 315 status = "okay";
293}; 316};
294 317
@@ -298,7 +321,11 @@
298 &pinctrl_hummingboard_usdhc2_aux 321 &pinctrl_hummingboard_usdhc2_aux
299 &pinctrl_hummingboard_usdhc2 322 &pinctrl_hummingboard_usdhc2
300 >; 323 >;
301 vmmc-supply = <&reg_3p3v>; 324 vmmc-supply = <&v_sd>;
302 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 325 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
303 status = "okay"; 326 status = "okay";
304}; 327};
328
329&vcc_3v3 {
330 vin-supply = <&v_3v2>;
331};
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2-emmc.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2-emmc.dtsi
new file mode 100644
index 000000000000..f400405381a7
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard2-emmc.dtsi
@@ -0,0 +1,72 @@
1/*
2 * Device Tree file for SolidRun HummingBoard2
3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44&iomuxc {
45 hummingboard2 {
46 pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 {
47 fsl,pins = <
48 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
49 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
50 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
51 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
52 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
53 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
54 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
55 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
56 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
57 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
58 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
59 >;
60 };
61 };
62};
63
64&usdhc3 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_hummingboard2_usdhc3>;
67 vmmc-supply = <&v_3v2>;
68 vqmmc-supply = <&v_3v2>;
69 bus-width = <8>;
70 non-removable;
71 status = "okay";
72};
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
new file mode 100644
index 000000000000..dffbc92e0023
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
@@ -0,0 +1,540 @@
1/*
2 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41
42/ {
43 chosen {
44 stdout-path = &uart1;
45 };
46
47 ir_recv: ir-receiver {
48 compatible = "gpio-ir-receiver";
49 gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
52 linux,rc-map-name = "rc-rc6-mce";
53 };
54
55 v_3v2: regulator-v-3v2 {
56 compatible = "regulator-fixed";
57 regulator-always-on;
58 regulator-max-microvolt = <3300000>;
59 regulator-min-microvolt = <3300000>;
60 regulator-name = "v_3v2";
61 };
62
63 v_5v0: regulator-v-5v0 {
64 compatible = "regulator-fixed";
65 regulator-always-on;
66 regulator-max-microvolt = <5000000>;
67 regulator-min-microvolt = <5000000>;
68 regulator-name = "v_5v0";
69 };
70
71 vcc_1p8: regulator-vcc-1p8 {
72 compatible = "regulator-fixed";
73 regulator-always-on;
74 regulator-max-microvolt = <1800000>;
75 regulator-min-microvolt = <1800000>;
76 regulator-name = "vcc_1p8";
77 vin-supply = <&v_3v2>;
78 };
79
80 v_sd: regulator-v-sd {
81 compatible = "regulator-fixed";
82 gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_hummingboard2_vmmc>;
85 regulator-boot-on;
86 regulator-max-microvolt = <3300000>;
87 regulator-min-microvolt = <3300000>;
88 regulator-name = "v_sd";
89 startup-delay-us = <1000>;
90 vin-supply = <&v_3v2>;
91 };
92
93 v_usb1: regulator-v-usb1 {
94 compatible = "regulator-fixed";
95 enable-active-high;
96 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
99 regulator-always-on;
100 regulator-max-microvolt = <5000000>;
101 regulator-min-microvolt = <5000000>;
102 regulator-name = "v_usb1";
103 vin-supply = <&v_5v0>;
104 };
105
106 v_usb2: regulator-v-usb2 {
107 /* USB hub port 1 */
108 compatible = "regulator-fixed";
109 enable-active-high;
110 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
113 regulator-always-on;
114 regulator-max-microvolt = <5000000>;
115 regulator-min-microvolt = <5000000>;
116 regulator-name = "v_usb2";
117 vin-supply = <&v_5v0>;
118 };
119
120 v_usb3: regulator-v-usb3 {
121 /* USB hub port 3 */
122 compatible = "regulator-fixed";
123 enable-active-high;
124 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
127 regulator-always-on;
128 regulator-max-microvolt = <5000000>;
129 regulator-min-microvolt = <5000000>;
130 regulator-name = "v_usb3";
131 vin-supply = <&v_5v0>;
132 };
133
134 v_usb4: regulator-v-usb4 {
135 /* USB hub port 4 */
136 compatible = "regulator-fixed";
137 enable-active-high;
138 gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
141 regulator-always-on;
142 regulator-max-microvolt = <5000000>;
143 regulator-min-microvolt = <5000000>;
144 regulator-name = "v_usb4";
145 vin-supply = <&v_5v0>;
146 };
147
148 sound-sgtl5000 {
149 audio-codec = <&sgtl5000>;
150 audio-routing =
151 "MIC_IN", "Mic Jack",
152 "Mic Jack", "Mic Bias",
153 "Headphone Jack", "HP_OUT";
154 compatible = "fsl,imx-audio-sgtl5000";
155 model = "On-board Codec";
156 mux-ext-port = <5>;
157 mux-int-port = <1>;
158 ssi-controller = <&ssi1>;
159 };
160};
161
162&audmux {
163 status = "okay";
164};
165
166&ecspi2 {
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
169 cs-gpios = <&gpio2 26 0>;
170 status = "okay";
171};
172
173&hdmi {
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
176 ddc-i2c-bus = <&i2c2>;
177 status = "okay";
178};
179
180&i2c1 {
181 clock-frequency = <100000>;
182 pinctrl-names = "default";
183 pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
184 status = "okay";
185
186 pcf8523: rtc@68 {
187 compatible = "nxp,pcf8523";
188 reg = <0x68>;
189 };
190
191 sgtl5000: codec@a {
192 clocks = <&clks IMX6QDL_CLK_CKO>;
193 compatible = "fsl,sgtl5000";
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
196 reg = <0x0a>;
197 VDDA-supply = <&v_3v2>;
198 VDDD-supply = <&vcc_1p8>;
199 VDDIO-supply = <&v_3v2>;
200 };
201};
202
203&i2c2 {
204 clock-frequency = <100000>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
207 status = "okay";
208};
209
210&i2c3 {
211 clock-frequency = <100000>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
214 status = "okay";
215};
216
217&iomuxc {
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_hog>;
220
221 hummingboard2 {
222 pinctrl_hog: hoggrp {
223 fsl,pins = <
224 /*
225 * 36 pin headers GPIO description. The pins
226 * numbering as following -
227 *
228 * 3.2v 5v 74 75
229 * 73 72 71 70
230 * 69 68 67 66
231 *
232 * 77 78 79 76
233 * 65 64 61 60
234 * 53 52 51 50
235 * 49 48 166 132
236 * 95 94 90 91
237 * GND 54 24 204
238 *
239 * The GPIO numbers can be extracted using
240 * signal name from below.
241 * Example -
242 * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is
243 * GPIO(3,10) which is (3-1)*32+10 = gpio 74
244 *
245 * i.e. The mapping of GPIO(X,Y) to Linux gpio
246 * number is : gpio number = (X-1) * 32 + Y
247 */
248 /* DI1_PIN15 */
249 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
250 /* DI1_PIN02 */
251 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
252 /* DISP1_DATA00 */
253 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
254 /* DISP1_DATA01 */
255 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
256 /* DISP1_DATA02 */
257 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
258 /* DISP1_DATA03 */
259 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
260 /* DISP1_DATA04 */
261 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
262 /* DISP1_DATA05 */
263 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
264 /* DISP1_DATA06 */
265 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
266 /* DISP1_DATA07 */
267 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
268 /* DI1_D0_CS */
269 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
270 /* DI1_D1_CS */
271 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
272 /* DI1_PIN01 */
273 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
274 /* DI1_PIN03 */
275 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
276 /* DISP1_DATA08 */
277 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
278 /* DISP1_DATA09 */
279 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
280 /* DISP1_DATA10 */
281 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
282 /* DISP1_DATA11 */
283 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
284 /* DISP1_DATA12 */
285 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
286 /* DISP1_DATA13 */
287 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
288 /* DISP1_DATA14 */
289 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
290 /* DISP1_DATA15 */
291 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
292 /* DISP1_DATA16 */
293 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
294 /* DISP1_DATA17 */
295 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
296 /* DISP1_DATA18 */
297 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
298 /* DISP1_DATA19 */
299 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
300 /* DISP1_DATA20 */
301 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
302 /* DISP1_DATA21 */
303 MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
304 /* DISP1_DATA22 */
305 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
306 /* DISP1_DATA23 */
307 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
308 /* DI1_DISP_CLK */
309 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
310 /* SPDIF_IN */
311 MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
312 /* SPDIF_OUT */
313 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1
314
315 /* MikroBUS GPIO pin number 10 */
316 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
317 >;
318 };
319
320 pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {
321 fsl,pins = <
322 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
323 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
324 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
325 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */
326 >;
327 };
328
329 pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 {
330 fsl,pins = <
331 MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
332 >;
333 };
334
335 pinctrl_hummingboard2_hdmi: hummingboard2-hdmi {
336 fsl,pins = <
337 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
338 >;
339 };
340
341 pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 {
342 fsl,pins = <
343 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
344 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
345 >;
346 };
347
348 pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 {
349 fsl,pins = <
350 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
351 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
352 >;
353 };
354
355 pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 {
356 fsl,pins = <
357 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
358 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
359 >;
360 };
361
362 pinctrl_hummingboard2_mipi: hummingboard2_mipi {
363 fsl,pins = <
364 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
365 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
366 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
367 >;
368 };
369
370 pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset {
371 fsl,pins = <
372 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
373 >;
374 };
375
376 pinctrl_hummingboard2_pwm1: pwm1grp {
377 fsl,pins = <
378 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
379 >;
380 };
381
382 pinctrl_hummingboard2_pwm3: pwm3grp {
383 fsl,pins = <
384 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
385 >;
386 };
387
388 pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 {
389 fsl,pins = <
390 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
391 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
392 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
393 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
394 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
395 >;
396 };
397
398 pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus {
399 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
400 };
401
402 pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus {
403 fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
404 };
405
406 pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus {
407 fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
408 };
409
410 pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id {
411 /*
412 * Similar to pinctrl_usbotg_2, but we want it
413 * pulled down for a fixed host connection.
414 */
415 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
416 };
417
418 pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus {
419 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
420 };
421
422 pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
423 fsl,pins = <
424 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
425 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
426 >;
427 };
428
429 pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 {
430 fsl,pins = <
431 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
432 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
433 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
434 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
435 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
436 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
437 >;
438 };
439
440 pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz {
441 fsl,pins = <
442 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
443 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
444 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
445 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
446 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
447 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
448 >;
449 };
450
451 pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz {
452 fsl,pins = <
453 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
454 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
455 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
456 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
457 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
458 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
459 >;
460 };
461
462 pinctrl_hummingboard2_vmmc: hummingboard2-vmmc {
463 fsl,pins = <
464 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
465 >;
466 };
467
468 pinctrl_hummingboard2_uart3: hummingboard2-uart3 {
469 fsl,pins = <
470 MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1
471 MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000
472 >;
473 };
474 };
475};
476
477&pcie {
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
480 reset-gpio = <&gpio2 11 GPIO_ACTIVE_LOW>;
481 status = "okay";
482};
483
484&pwm1 {
485 pinctrl-names = "default";
486 pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
487 status = "okay";
488};
489
490&pwm3 {
491 pinctrl-names = "default";
492 pinctrl-0 = <&pinctrl_hummingboard2_pwm3>;
493 status = "okay";
494};
495
496&ssi1 {
497 status = "okay";
498};
499
500&usbh1 {
501 disable-over-current;
502 status = "okay";
503};
504
505&usbotg {
506 disable-over-current;
507 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
509 vbus-supply = <&v_usb1>;
510 status = "okay";
511};
512
513&usdhc2 {
514 pinctrl-names = "default", "state_100mhz", "state_200mhz";
515 pinctrl-0 = <
516 &pinctrl_hummingboard2_usdhc2_aux
517 &pinctrl_hummingboard2_usdhc2
518 >;
519 pinctrl-1 = <
520 &pinctrl_hummingboard2_usdhc2_aux
521 &pinctrl_hummingboard2_usdhc2_100mhz
522 >;
523 pinctrl-2 = <
524 &pinctrl_hummingboard2_usdhc2_aux
525 &pinctrl_hummingboard2_usdhc2_200mhz
526 >;
527 vmmc-supply = <&v_sd>;
528 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
529 status = "okay";
530};
531
532&uart3 {
533 pinctrl-names = "default";
534 pinctrl-0 = <&pinctrl_hummingboard2_uart3>;
535 status = "okay";
536};
537
538&vcc_3v3 {
539 vin-supply = <&v_3v2>;
540};
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
index 3a77f0fedfce..fd05f7caa472 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
@@ -172,7 +172,7 @@
172 }; 172 };
173 }; 173 };
174 174
175 i2cmux@2 { 175 i2c2mux {
176 compatible = "i2c-mux-gpio"; 176 compatible = "i2c-mux-gpio";
177 pinctrl-names = "default"; 177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_i2c2mux>; 178 pinctrl-0 = <&pinctrl_i2c2mux>;
@@ -183,20 +183,20 @@
183 i2c-parent = <&i2c2>; 183 i2c-parent = <&i2c2>;
184 idle-state = <0>; 184 idle-state = <0>;
185 185
186 i2c2@1 { 186 i2c2mux@1 {
187 reg = <1>; 187 reg = <1>;
188 #address-cells = <1>; 188 #address-cells = <1>;
189 #size-cells = <0>; 189 #size-cells = <0>;
190 }; 190 };
191 191
192 i2c2@2 { 192 i2c2mux@2 {
193 reg = <2>; 193 reg = <2>;
194 #address-cells = <1>; 194 #address-cells = <1>;
195 #size-cells = <0>; 195 #size-cells = <0>;
196 }; 196 };
197 }; 197 };
198 198
199 i2cmux@3 { 199 i2c3mux {
200 compatible = "i2c-mux-gpio"; 200 compatible = "i2c-mux-gpio";
201 pinctrl-names = "default"; 201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_i2c3mux>; 202 pinctrl-0 = <&pinctrl_i2c3mux>;
@@ -206,7 +206,7 @@
206 i2c-parent = <&i2c3>; 206 i2c-parent = <&i2c3>;
207 idle-state = <0>; 207 idle-state = <0>;
208 208
209 i2c3@1 { 209 i2c3mux@1 {
210 reg = <1>; 210 reg = <1>;
211 #address-cells = <1>; 211 #address-cells = <1>;
212 #size-cells = <0>; 212 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 4bdf29169d2a..919b6b7619a4 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -276,6 +276,23 @@
276 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 276 compatible = "sst,sst25vf016b", "jedec,spi-nor";
277 spi-max-frequency = <20000000>; 277 spi-max-frequency = <20000000>;
278 reg = <0>; 278 reg = <0>;
279 #address-cells = <1>;
280 #size-cells = <1>;
281
282 partition@0 {
283 label = "bootloader";
284 reg = <0x0 0xc0000>;
285 };
286
287 partition@c0000 {
288 label = "env";
289 reg = <0xc0000 0x2000>;
290 };
291
292 partition@c2000 {
293 label = "splash";
294 reg = <0xc2000 0x13e000>;
295 };
279 }; 296 };
280}; 297};
281 298
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 4fa2fac3877b..82d6ccb46982 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -235,6 +235,9 @@
235}; 235};
236 236
237&hdmi { 237&hdmi {
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_hdmi_cec>;
240 ddc-i2c-bus = <&i2c2>;
238 status = "okay"; 241 status = "okay";
239}; 242};
240 243
@@ -453,6 +456,12 @@
453 >; 456 >;
454 }; 457 };
455 458
459 pinctrl_hdmi_cec: hdmicecgrp {
460 fsl,pins = <
461 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
462 >;
463 };
464
456 pinctrl_i2c2: i2c2grp { 465 pinctrl_i2c2: i2c2grp {
457 fsl,pins = < 466 fsl,pins = <
458 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 467 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi
index 6a410160c9ee..b55af61dfeca 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi
@@ -40,7 +40,7 @@
40 */ 40 */
41#include <dt-bindings/gpio/gpio.h> 41#include <dt-bindings/gpio/gpio.h>
42/ { 42/ {
43 clk_sdio: sdio-clock { 43 clk_brcm: brcm-clock {
44 compatible = "gpio-gate-clock"; 44 compatible = "gpio-gate-clock";
45 #clock-cells = <0>; 45 #clock-cells = <0>;
46 pinctrl-names = "default"; 46 pinctrl-names = "default";
@@ -48,27 +48,23 @@
48 enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; 48 enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
49 }; 49 };
50 50
51 regulators { 51 reg_brcm: brcm-reg {
52 compatible = "simple-bus"; 52 compatible = "regulator-fixed";
53 53 enable-active-high;
54 reg_brcm: brcm-reg { 54 gpio = <&gpio3 19 0>;
55 compatible = "regulator-fixed"; 55 pinctrl-names = "default";
56 enable-active-high; 56 pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
57 gpio = <&gpio3 19 0>; 57 regulator-name = "brcm_reg";
58 pinctrl-names = "default"; 58 regulator-min-microvolt = <3300000>;
59 pinctrl-0 = <&pinctrl_microsom_brcm_reg>; 59 regulator-max-microvolt = <3300000>;
60 regulator-name = "brcm_reg"; 60 startup-delay-us = <200000>;
61 regulator-min-microvolt = <3300000>;
62 regulator-max-microvolt = <3300000>;
63 startup-delay-us = <200000>;
64 };
65 }; 61 };
66 62
67 usdhc1_pwrseq: usdhc1_pwrseq { 63 usdhc1_pwrseq: usdhc1_pwrseq {
68 compatible = "mmc-pwrseq-simple"; 64 compatible = "mmc-pwrseq-simple";
69 reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>, 65 reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
70 <&gpio6 0 GPIO_ACTIVE_LOW>; 66 <&gpio6 0 GPIO_ACTIVE_LOW>;
71 clocks = <&clk_sdio>; 67 clocks = <&clk_brcm>;
72 clock-names = "ext_clock"; 68 clock-names = "ext_clock";
73 }; 69 };
74}; 70};
@@ -104,13 +100,6 @@
104 >; 100 >;
105 }; 101 };
106 102
107 pinctrl_microsom_uart1: microsom-uart1 {
108 fsl,pins = <
109 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
110 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
111 >;
112 };
113
114 pinctrl_microsom_uart4: microsom-uart4 { 103 pinctrl_microsom_uart4: microsom-uart4 {
115 fsl,pins = < 104 fsl,pins = <
116 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 105 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
@@ -133,12 +122,6 @@
133 }; 122 };
134}; 123};
135 124
136&uart1 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_microsom_uart1>;
139 status = "okay";
140};
141
142/* UART4 - Connected to optional BRCM Wifi/BT/FM */ 125/* UART4 - Connected to optional BRCM Wifi/BT/FM */
143&uart4 { 126&uart4 {
144 pinctrl-names = "default"; 127 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som-emmc.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som-emmc.dtsi
new file mode 100644
index 000000000000..5f3b8baab20f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-sr-som-emmc.dtsi
@@ -0,0 +1,70 @@
1/*
2 * Copyright (C) 2013,2014 Russell King
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41
42&iomuxc {
43 microsom {
44 pinctrl_microsom_usdhc3: microsom-usdhc3 {
45 fsl,pins = <
46 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
47 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
48 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
49 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
50 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
51 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
52 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
53 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
54 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
55 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
56 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
57 >;
58 };
59 };
60};
61
62/* USDHC3 - eMMC */
63&usdhc3 {
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_microsom_usdhc3>;
66 bus-width = <8>;
67 non-removable;
68 vmmc-supply = <&vcc_3v3>;
69 status = "okay";
70};
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som-ti.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som-ti.dtsi
new file mode 100644
index 000000000000..44a97ba93a95
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-sr-som-ti.dtsi
@@ -0,0 +1,170 @@
1/*
2 * Copyright (C) 2013,2014 Russell King
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41#include <dt-bindings/gpio/gpio.h>
42
43/ {
44 nvcc_sd1: regulator-nvcc-sd1 {
45 compatible = "regulator-fixed";
46 regulator-always-on;
47 regulator-name = "nvcc_sd1";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
50 vin-supply = <&vcc_3v3>;
51 };
52
53 clk_ti_wifi: ti-wifi-clock {
54 /* This is a hack around the kernel - using "fixed clock"
55 * results in the "pinctrl" properties being ignored, and
56 * the clock not being output. Instead, use a gated clock
57 * and the unrouted WL_XTAL_PU gpio.
58 */
59 compatible = "gpio-gate-clock";
60 #clock-cells = <0>;
61 clock-frequency = <32768>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_microsom_ti_clk>;
64 enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
65 };
66
67 pwrseq_ti_wifi: ti-wifi-pwrseq {
68 compatible = "mmc-pwrseq-simple";
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_microsom_ti_wifi_en>;
71 reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
72 post-power-on-delay-ms = <200>;
73 clocks = <&clk_ti_wifi>;
74 clock-names = "ext_clock";
75 };
76};
77
78&iomuxc {
79 microsom {
80 pinctrl_microsom_ti_bt: microsom-ti-bt {
81 fsl,pins = <
82 /* BT_EN_SOC */
83 MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
84 >;
85 };
86
87 pinctrl_microsom_ti_clk: microsom-ti-clk {
88 fsl,pins = <
89 /* EXT_32K */
90 MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
91 /* WL_XTAL_PU (unrouted) */
92 MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
93 >;
94 };
95
96 pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-en {
97 fsl,pins = <
98 /* WLAN_EN_SOC */
99 MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
100 >;
101 };
102
103 pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irq {
104 fsl,pins = <
105 /* WLAN_IRQ */
106 MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
107 >;
108 };
109
110 pinctrl_microsom_uart4: microsom-uart4 {
111 fsl,pins = <
112 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
113 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
114 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
115 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
116 >;
117 };
118
119 pinctrl_microsom_usdhc1: microsom-usdhc1 {
120 fsl,pins = <
121 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
122 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
123 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
124 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
125 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
126 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
127 >;
128 };
129 };
130};
131
132/* UART4 - Connected to optional TI Wi-Fi/BT/FM */
133&uart4 {
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_microsom_uart4>;
136 uart-has-rtscts;
137 status = "okay";
138
139 bluetooth {
140 compatible = "ti,wl1837-st";
141 clocks = <&clk_ti_wifi>;
142 clock-names = "ext_clock";
143 enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_microsom_ti_bt>;
146 };
147};
148
149/* USDHC1 - Connected to optional TI Wi-Fi/BT/FM */
150&usdhc1 {
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_microsom_usdhc1>;
153 bus-width = <4>;
154 keep-power-in-suspend;
155 mmc-pwrseq = <&pwrseq_ti_wifi>;
156 non-removable;
157 vmmc-supply = <&vcc_3v3>;
158 /* vqmmc-supply = <&nvcc_sd1>; - MMC layer doesn't like it! */
159 status = "okay";
160 #address-cells = <1>;
161 #size-cells = <0>;
162
163 wlcore@2 {
164 compatible = "ti,wl1837";
165 reg = <2>;
166 interrupts-extended = <&gpio6 4 IRQ_TYPE_LEVEL_HIGH>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_microsom_ti_wifi_irq>;
169 };
170};
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
index 900e8c781f91..4ccb7afc4b35 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
@@ -1,9 +1,6 @@
1/* 1/*
2 * Copyright (C) 2013,2014 Russell King 2 * Copyright (C) 2013,2014 Russell King
3 * 3 *
4 * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
5 * MicroSOM.
6 *
7 * This file is dual-licensed: you can use it either under the terms 4 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual 5 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a 6 * licensing only applies to this file, and not this project as a
@@ -41,6 +38,18 @@
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE. 39 * OTHER DEALINGS IN THE SOFTWARE.
43 */ 40 */
41#include <dt-bindings/gpio/gpio.h>
42
43/ {
44 vcc_3v3: regulator-vcc-3v3 {
45 compatible = "regulator-fixed";
46 regulator-always-on;
47 regulator-name = "vcc_3v3";
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
50 };
51};
52
44&fec { 53&fec {
45 pinctrl-names = "default"; 54 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; 55 pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
@@ -51,7 +60,7 @@
51}; 60};
52 61
53&iomuxc { 62&iomuxc {
54 enet { 63 microsom {
55 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 { 64 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
56 fsl,pins = < 65 fsl,pins = <
57 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0 66 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
@@ -59,10 +68,10 @@
59 /* AR8035 reset */ 68 /* AR8035 reset */
60 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 69 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
61 /* AR8035 interrupt */ 70 /* AR8035 interrupt */
62 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000 71 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
63 /* GPIO16 -> AR8035 25MHz */ 72 /* GPIO16 -> AR8035 25MHz */
64 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 73 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0
65 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 74 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x13030
66 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 75 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
67 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 76 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
68 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 77 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
@@ -95,5 +104,18 @@
95 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000 104 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
96 >; 105 >;
97 }; 106 };
107
108 pinctrl_microsom_uart1: microsom-uart1 {
109 fsl,pins = <
110 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
111 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
112 >;
113 };
98 }; 114 };
99}; 115};
116
117&uart1 {
118 pinctrl-names = "default";
119 pinctrl-0 = <&pinctrl_microsom_uart1>;
120 status = "okay";
121};
diff --git a/arch/arm/boot/dts/imx6qdl-ts7970.dtsi b/arch/arm/boot/dts/imx6qdl-ts7970.dtsi
new file mode 100644
index 000000000000..f0be516dc28e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-ts7970.dtsi
@@ -0,0 +1,594 @@
1/*
2 * Copyright 2015 Technologic Systems
3 * Copyright 2017 Savoir-Faire Linux
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/interrupt-controller/irq.h>
45
46/ {
47 leds {
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_leds1>;
50 compatible = "gpio-leds";
51
52 green-led {
53 label = "green-led";
54 gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
55 default-state = "on";
56 };
57
58 red-led {
59 label = "red-led";
60 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
61 default-state = "off";
62 };
63
64 yel-led {
65 label = "yellow-led";
66 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
67 default-state = "off";
68 };
69
70 blue-led {
71 label = "blue-led";
72 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
73 default-state = "off";
74 };
75
76 en-usb-5v {
77 label = "en-usb-5v";
78 gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
79 default-state = "on";
80 };
81
82 sel_dc_usb {
83 label = "sel_dc_usb";
84 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
85 default-state = "off";
86 };
87
88 };
89
90 reg_3p3v: regulator-3p3v {
91 compatible = "regulator-fixed";
92 regulator-name = "3p3v";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 regulator-always-on;
96 };
97
98 reg_can1_3v3: reg_can1_3v3 {
99 compatible = "regulator-fixed";
100 regulator-name = "reg_can1_3v3";
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
103 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
104 enable-active-high;
105 };
106
107 reg_can2_3v3: en-reg_can2_3v3 {
108 compatible = "regulator-fixed";
109 regulator-name = "reg_can2_3v3";
110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <3300000>;
112 gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>;
113 enable-active-high;
114 };
115
116 reg_usb_otg_vbus: regulator-usb-otg-vbus {
117 compatible = "regulator-fixed";
118 regulator-name = "usb_otg_vbus";
119 regulator-min-microvolt = <5000000>;
120 regulator-max-microvolt = <5000000>;
121 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
122 enable-active-high;
123 };
124
125 reg_wlan_vmmc: regulator_wlan_vmmc {
126 compatible = "regulator-fixed";
127 regulator-name = "wlan_vmmc";
128 regulator-min-microvolt = <1800000>;
129 regulator-max-microvolt = <1800000>;
130 gpio = <&gpio8 14 GPIO_ACTIVE_HIGH>;
131 startup-delay-us = <70000>;
132 enable-active-high;
133 };
134
135 sound-sgtl5000 {
136 audio-codec = <&sgtl5000>;
137 audio-routing =
138 "MIC_IN", "Mic Jack",
139 "Mic Jack", "Mic Bias",
140 "Headphone Jack", "HP_OUT";
141 compatible = "fsl,imx-audio-sgtl5000";
142 model = "On-board Codec";
143 mux-ext-port = <3>;
144 mux-int-port = <1>;
145 ssi-controller = <&ssi1>;
146 };
147};
148
149&audmux {
150 status = "okay";
151};
152
153&can1 {
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_flexcan1>;
156 xceiver-supply = <&reg_can1_3v3>;
157 status = "okay";
158};
159
160&can2 {
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_flexcan2>;
163 xceiver-supply = <&reg_can2_3v3>;
164 status = "okay";
165};
166
167&ecspi1 {
168 cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
169 pinctrl-names = "default";
170 pinctrl-0 = <&pinctrl_ecspi1>;
171 status = "okay";
172
173 n25q064: flash@0 {
174 compatible = "micron,n25q064", "jedec,spi-nor";
175 reg = <0>;
176 spi-max-frequency = <20000000>;
177 };
178};
179
180&ecspi2 {
181 cs-gpios = <
182 &gpio5 31 GPIO_ACTIVE_HIGH
183 &gpio7 12 GPIO_ACTIVE_HIGH
184 &gpio5 18 GPIO_ACTIVE_HIGH
185 >;
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_ecspi2>;
188 status = "okay";
189};
190
191&fec {
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_enet>;
194 phy-mode = "rgmii";
195 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
196 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
197 fsl,err006687-workaround-present;
198 status = "okay";
199};
200
201&hdmi {
202 status = "okay";
203};
204
205&i2c1 {
206 clock-frequency = <100000>;
207 pinctrl-names = "default", "gpio";
208 pinctrl-0 = <&pinctrl_i2c1>;
209 pinctrl-1 = <&pinctrl_i2c1_gpio>;
210 scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
211 sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
212 status = "okay";
213
214 m41t00s: rtc@68 {
215 compatible = "m41t00";
216 reg = <0x68>;
217 };
218
219 isl12022: rtc@6f {
220 compatible = "isl,isl12022";
221 reg = <0x6f>;
222 };
223
224 gpio8: gpio@28 {
225 compatible = "technologic,ts7970-gpio";
226 reg = <0x28>;
227 #gpio-cells = <2>;
228 gpio-controller;
229 ngpio = <32>;
230 };
231
232 sgtl5000: codec@a {
233 compatible = "fsl,sgtl5000";
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_sgtl5000>;
236 reg = <0x0a>;
237 clocks = <&clks IMX6QDL_CLK_CKO>;
238 VDDA-supply = <&reg_3p3v>;
239 VDDIO-supply = <&reg_3p3v>;
240 };
241};
242
243&i2c2 {
244 clock-frequency = <100000>;
245 pinctrl-names = "default", "gpio";
246 pinctrl-0 = <&pinctrl_i2c2>;
247 pinctrl-1 = <&pinctrl_i2c2_gpio>;
248 scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
249 sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
250 status = "okay";
251};
252
253&iomuxc {
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_hog>;
256
257 pinctrl_ecspi1: ecspi1grp {
258 fsl,pins = <
259 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
260 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
261 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
262 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 /* Onboard Flash CS */
263 >;
264 };
265
266 pinctrl_ecspi2: ecspi2 {
267 fsl,pins = <
268 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
269 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
270 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
271 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x100b1 /* FPGA_SPI_CS0 */
272 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x100b1 /* FPGA_SPI_CS1 */
273 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1 /* HD1_SPI_CS */
274 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b088 /* FPGA_RESET */
275 MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x10 /* FPGA 24MHZ */
276 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b088 /* FPGA_IRQ_0 */
277 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b088 /* FPGA_IRQ_1 */
278 >;
279 };
280
281 pinctrl_enet: enet {
282 fsl,pins = <
283 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
284 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
285 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
286 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
287 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
288 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
289 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
290 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
291 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
292 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
293 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
294 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
295 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
296 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
297 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
298 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b088
299 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b088 /* ETH_PHY_RESET */
300 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
301 >;
302 };
303
304 pinctrl_flexcan1: flexcan1grp {
305 fsl,pins = <
306 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b088
307 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b088
308 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b088 /* EN_CAN_1 */
309 >;
310 };
311
312 pinctrl_flexcan2: flexcan2grp {
313 fsl,pins = <
314 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b088
315 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b088
316 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b088 /* EN_CAN_2 */
317 >;
318 };
319
320 pinctrl_hog: hoggrp {
321 fsl,pins = <
322 /* Onboard */
323 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b088 /* USB_HUB_RESET */
324 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b088 /* SEL_DC_USB */
325 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b088 /* EN_USB_5V */
326 MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b088 /* JTAG_FPGA_TMS */
327 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b088 /* JTAG_FPGA_TCK */
328 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b088 /* JTAG_FPGA_TDO */
329 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b088 /* JTAG_FPGA_TDI */
330 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b088 /* GYRO_INT */
331 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b088 /* MODBUS_FAULT */
332 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b088 /* BUS_DIR/JP_SD_BOOT */
333 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b088 /* EN_MODBUS_24V */
334 MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b088 /* EN_MODBUS_3V */
335 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b088 /* I210_RESET */
336 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b088 /* EN_RTC_PWR */
337 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b088 /* REVSTRAP1 */
338
339 /* Offboard */
340 MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b088 /* LCD_D09 */
341 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b088 /* HD1_IRQ */
342 MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b088 /* LCD_D10 */
343 MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x1b088 /* LCD_D11 */
344 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b088 /* BUS_BHE */
345 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b088 /* BUS_ALE */
346 MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b088 /* BUS_CS */
347 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b088 /* DIO_20 */
348 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b088 /* BUS_WAIT */
349 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b088 /* MUX_AD_00 */
350 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b088 /* MUX_AD_01 */
351 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b088 /* MUX_AD_02 */
352 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b088 /* MUX_AD_03 */
353 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b088 /* MUX_AD_04 */
354 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b088 /* MUX_AD_05 */
355 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b088 /* MUX_AD_06 */
356 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b088 /* MUX_AD_07 */
357 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b088 /* MUX_AD_08 */
358 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b088 /* MUX_AD_09 */
359 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b088 /* MUX_AD_10 */
360 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b088 /* MUX_AD_11 */
361 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b088 /* MUX_AD_12 */
362 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b088 /* MUX_AD_13 */
363 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b088 /* MUX_AD_14 */
364 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b088 /* MUX_AD_15 */
365
366 /* Strapping only */
367 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b088
368 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x1b088
369 >;
370 };
371
372 pinctrl_i2c1: i2c1grp {
373 fsl,pins = <
374 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
375 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
376 >;
377 };
378
379 pinctrl_i2c1_gpio: i2c1gpiogrp {
380 fsl,pins = <
381 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
382 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
383 >;
384 };
385
386 pinctrl_i2c2: i2c2grp {
387 fsl,pins = <
388 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
389 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
390 >;
391 };
392
393 pinctrl_i2c2_gpio: i2c2gpiogrp {
394 fsl,pins = <
395 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
396 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
397 >;
398 };
399
400 pinctrl_leds1: leds1grp {
401 fsl,pins = <
402 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b088 /* GREEN_LED */
403 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b088 /* RED_LED */
404 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b088 /* YEL_LED */
405 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b088 /* IMX6_BLUE_LED */
406 >;
407 };
408
409 pinctrl_sgtl5000: sgtl5000grp {
410 fsl,pins = <
411 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
412 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
413 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
414 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
415 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* Audio CLK */
416 >;
417 };
418
419 pinctrl_uart1: uart1grp {
420 fsl,pins = <
421 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b088
422 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b088
423 >;
424 };
425
426 pinctrl_uart2: uart2grp {
427 fsl,pins = <
428 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b088
429 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b088
430 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b088
431 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b088
432 >;
433 };
434
435 pinctrl_uart3: uart3grp {
436 fsl,pins = <
437 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b088
438 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b088
439 MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b088
440 MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b088
441 >;
442 };
443
444 pinctrl_uart4: uart4grp {
445 fsl,pins = <
446 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b088
447 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b088
448 >;
449 };
450
451 pinctrl_uart5: uart5grp {
452 fsl,pins = <
453 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b088
454 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b088
455 >;
456 };
457
458 pinctrl_usbotg: usbotggrp {
459 fsl,pins = <
460 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
461 >;
462 };
463
464 pinctrl_usdhc1: usdhc1grp {
465 fsl,pins = <
466 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
467 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
468 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
469 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
470 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
471 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
472 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x17059 /* WIFI IRQ */
473 >;
474 };
475
476 pinctrl_usdhc2: usdhc2grp {
477 fsl,pins = <
478 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
479 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
480 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
481 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
482 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
483 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
484 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b088 /* EN_SD_POWER */
485 >;
486 };
487
488 pinctrl_usdhc3: usdhc3grp {
489 fsl,pins = <
490 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
491 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
492 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
493 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
494 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
495 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
496 >;
497 };
498};
499
500&pcie {
501 status = "okay";
502};
503
504&snvs_rtc {
505 status = "disabled";
506};
507
508&ssi1 {
509 fsl,mode = "i2s-slave";
510 status = "okay";
511};
512
513&uart1 {
514 pinctrl-names = "default";
515 pinctrl-0 = <&pinctrl_uart1>;
516 status = "okay";
517};
518
519&uart2 {
520 pinctrl-names = "default";
521 pinctrl-0 = <&pinctrl_uart2>;
522 uart-has-rtscts;
523 status = "okay";
524};
525
526&uart3 {
527 pinctrl-names = "default";
528 pinctrl-0 = <&pinctrl_uart3>;
529 status = "okay";
530};
531
532&uart4 {
533 pinctrl-names = "default";
534 pinctrl-0 = <&pinctrl_uart4>;
535 status = "okay";
536};
537
538&uart5 {
539 pinctrl-names = "default";
540 pinctrl-0 = <&pinctrl_uart5>;
541 status = "okay";
542};
543
544&usbh1 {
545 status = "okay";
546};
547
548&usbotg {
549 vbus-supply = <&reg_usb_otg_vbus>;
550 pinctrl-names = "default";
551 pinctrl-0 = <&pinctrl_usbotg>;
552 disable-over-current;
553 status = "okay";
554};
555
556/* WIFI */
557&usdhc1 {
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usdhc1>;
560 vmmc-supply = <&reg_wlan_vmmc>;
561 bus-width = <4>;
562 non-removable;
563 #address-cells = <1>;
564 #size-cells = <0>;
565 status = "okay";
566
567 wlcore: wlcore@2 {
568 compatible = "ti,wl1271";
569 reg = <2>;
570 interrupt-parent = <&gpio1>;
571 interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
572 ref-clock-frequency = <38400000>;
573 };
574};
575
576/* SD */
577&usdhc2 {
578 pinctrl-names = "default";
579 pinctrl-0 = <&pinctrl_usdhc2>;
580 vmmc-supply = <&reg_3p3v>;
581 bus-width = <4>;
582 fsl,wp-controller;
583 status = "okay";
584};
585
586/* eMMC */
587&usdhc3 {
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_usdhc3>;
590 vmmc-supply = <&reg_3p3v>;
591 bus-width = <4>;
592 non-removable;
593 status = "okay";
594};
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index c96c91d83678..4161b7d4323a 100644
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -28,6 +28,13 @@
28 status = "disabled"; 28 status = "disabled";
29 }; 29 };
30 30
31 gpio-poweroff {
32 compatible = "gpio-poweroff";
33 gpios = <&gpio2 4 0>;
34 pinctrl-0 = <&pinctrl_power_off>;
35 pinctrl-names = "default";
36 };
37
31 memory { 38 memory {
32 reg = <0x10000000 0x40000000>; 39 reg = <0x10000000 0x40000000>;
33 }; 40 };
@@ -172,6 +179,12 @@
172 >; 179 >;
173 }; 180 };
174 181
182 pinctrl_power_off: poweroffgrp {
183 fsl,pins = <
184 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x30
185 >;
186 };
187
175 pinctrl_touchscreenp7: touchscreenp7grp { 188 pinctrl_touchscreenp7: touchscreenp7grp {
176 fsl,pins = < 189 fsl,pins = <
177 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70 190 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70
@@ -208,8 +221,8 @@
208 fsl,pins = < 221 fsl,pins = <
209 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0 222 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
210 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0 223 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
211 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0 224 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
212 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0 225 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
213 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 226 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
214 >; 227 >;
215 }; 228 };
@@ -218,8 +231,8 @@
218 fsl,pins = < 231 fsl,pins = <
219 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0 232 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
220 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 233 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
221 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0 234 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
222 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0 235 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
223 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 236 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
224 >; 237 >;
225 }; 238 };
@@ -228,8 +241,8 @@
228 fsl,pins = < 241 fsl,pins = <
229 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 242 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
230 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 243 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
231 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0 244 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
232 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0 245 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
233 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 246 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
234 >; 247 >;
235 }; 248 };
diff --git a/arch/arm/boot/dts/imx6qdl-var-dart.dtsi b/arch/arm/boot/dts/imx6qdl-var-dart.dtsi
new file mode 100644
index 000000000000..421d6f527609
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-var-dart.dtsi
@@ -0,0 +1,503 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Support for Variscite DART-MX6 Module
4 *
5 * Copyright 2017 BayLibre, SAS
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 */
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/sound/fsl-imx-audmux.h>
11
12/ {
13 memory {
14 reg = <0x10000000 0x40000000>;
15 };
16
17 reg_3p3v: regulator-3p3v {
18 compatible = "regulator-fixed";
19 regulator-name = "3P3V";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
22 regulator-always-on;
23 };
24
25 reg_wl18xx_vmmc: regulator-wl18xx {
26 compatible = "regulator-fixed";
27 regulator-name = "vwl1807";
28 regulator-min-microvolt = <1800000>;
29 regulator-max-microvolt = <1800000>;
30 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
31 enable-active-high;
32 startup-delay-us = <70000>;
33 };
34};
35
36&audmux {
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_audmux>;
39 status = "okay";
40
41 ssi2 {
42 fsl,audmux-port = <1>;
43 fsl,port-config = <
44 (IMX_AUDMUX_V2_PTCR_SYN |
45 IMX_AUDMUX_V2_PTCR_TFSDIR |
46 IMX_AUDMUX_V2_PTCR_TFSEL(2) |
47 IMX_AUDMUX_V2_PTCR_TCLKDIR |
48 IMX_AUDMUX_V2_PTCR_TCSEL(2))
49 IMX_AUDMUX_V2_PDCR_RXDSEL(2)
50 >;
51 };
52
53 aud3 {
54 fsl,audmux-port = <2>;
55 fsl,port-config = <
56 IMX_AUDMUX_V2_PTCR_SYN
57 IMX_AUDMUX_V2_PDCR_RXDSEL(1)
58 >;
59 };
60};
61
62&can1 {
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_flexcan1>;
65 status = "disabled";
66};
67
68&can2 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_flexcan2>;
71 status = "disabled";
72};
73
74&ecspi1 {
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_ecspi1>;
77 status = "disabled";
78};
79
80&fec {
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_enet>;
83 phy-mode = "rgmii";
84 status = "disabled";
85};
86
87&hdmi {
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_hdmicec>;
90 ddc-i2c-bus = <&i2c1>;
91 status = "disabled";
92};
93
94&i2c1 {
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_i2c1>;
97 status = "disabled";
98};
99
100&i2c2 {
101 clock-frequency = <100000>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_i2c2>;
104 status = "okay";
105
106 pmic@8 {
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_pmic>;
109 compatible = "fsl,pfuze100";
110 reg = <0x08>;
111
112 regulators {
113 sw1a_reg: sw1ab {
114 regulator-min-microvolt = <300000>;
115 regulator-max-microvolt = <1875000>;
116 regulator-boot-on;
117 regulator-always-on;
118 regulator-ramp-delay = <6250>;
119 };
120
121 sw1c_reg: sw1c {
122 regulator-min-microvolt = <300000>;
123 regulator-max-microvolt = <1875000>;
124 regulator-boot-on;
125 regulator-always-on;
126 regulator-ramp-delay = <6250>;
127 };
128
129 sw2_reg: sw2 {
130 regulator-min-microvolt = <800000>;
131 regulator-max-microvolt = <3300000>;
132 regulator-boot-on;
133 regulator-always-on;
134 };
135
136 sw3a_reg: sw3a {
137 regulator-min-microvolt = <800000>;
138 regulator-max-microvolt = <3950000>;
139 regulator-boot-on;
140 regulator-always-on;
141 };
142
143 sw3b_reg: sw3b {
144 regulator-min-microvolt = <800000>;
145 regulator-max-microvolt = <3950000>;
146 regulator-boot-on;
147 regulator-always-on;
148 };
149
150 sw4_reg: sw4 {
151 regulator-min-microvolt = <800000>;
152 regulator-max-microvolt = <3950000>;
153 };
154
155 snvs_reg: vsnvs {
156 regulator-min-microvolt = <1200000>;
157 regulator-max-microvolt = <3000000>;
158 regulator-boot-on;
159 regulator-always-on;
160 };
161
162 vref_reg: vrefddr {
163 regulator-boot-on;
164 regulator-always-on;
165 };
166
167 vgen6_reg: vgen6 {
168 regulator-min-microvolt = <2800000>;
169 regulator-max-microvolt = <2800000>;
170 regulator-always-on;
171 regulator-boot-on;
172 };
173 };
174 };
175
176 tlv320aic3106: codec@1b {
177 compatible = "ti,tlv320aic3106";
178 reg = <0x1b>;
179 #sound-dai-cells = <0>;
180 DRVDD-supply = <&reg_3p3v>;
181 AVDD-supply = <&reg_3p3v>;
182 IOVDD-supply = <&reg_3p3v>;
183 DVDD-supply = <&reg_3p3v>;
184 ai3x-ocmv = <0>;
185 gpio-reset = <&gpio5 5 GPIO_ACTIVE_LOW>;
186 };
187};
188
189&i2c3 {
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_i2c3>;
192 status = "disabled";
193};
194
195&iomuxc {
196 pinctrl_audmux: audmux {
197 fsl,pins = <
198 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
199 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
200 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
201 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
202 /* Audio Clock */
203 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
204 >;
205 };
206
207 pinctrl_bt: bt {
208 fsl,pins = <
209 /* Bluetooth enable */
210 MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1
211 /* Bluetooth Slow Clock */
212 MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0
213 >;
214 };
215
216 pinctrl_ecspi1: ecspi1grp {
217 fsl,pins = <
218 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
219 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
220 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
221 /* SPI1 CS0 */
222 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
223 /* SPI1 CS1 */
224 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
225 >;
226 };
227
228 pinctrl_enet: enetgrp {
229 fsl,pins = <
230 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
231 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
232 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
233 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
234 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
235 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
236 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
237 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
238 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
239 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
240 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
241 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
242 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
243 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
244 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
245 >;
246 };
247
248 pinctrl_flexcan1: flexcan1grp {
249 fsl,pins = <
250 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
251 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
252 >;
253 };
254
255 pinctrl_flexcan2: flexcan2grp {
256 fsl,pins = <
257 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
258 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
259 >;
260 };
261
262 pinctrl_hdmicec: hdmicecgrp {
263 fsl,pins = <
264 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
265 >;
266 };
267
268 pinctrl_i2c1: i2c1grp {
269 fsl,pins = <
270 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
271 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
272 >;
273 };
274
275 pinctrl_i2c2: i2c2grp {
276 fsl,pins = <
277 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
278 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
279 >;
280 };
281
282 pinctrl_i2c3: i2c3grp {
283 fsl,pins = <
284 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
285 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
286 >;
287 };
288
289 pinctrl_pmic: pmicgrp {
290 fsl,pins = <
291 /* PMIC INT */
292 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
293 >;
294 };
295
296 pinctrl_pwm2: pwm2grp {
297 fsl,pins = <
298 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
299 >;
300 };
301
302 pinctrl_uart1: uart1grp {
303 fsl,pins = <
304 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
305 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
306 >;
307 };
308
309 pinctrl_uart2: uart2grp {
310 fsl,pins = <
311 MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
312 MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
313 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
314 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
315 >;
316 };
317
318 pinctrl_uart3: uart3grp {
319 fsl,pins = <
320 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
321 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
322 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
323 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
324 >;
325 };
326
327 pinctrl_usbotg: usbotggrp {
328 fsl,pins = <
329 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
330 >;
331 };
332
333 pinctrl_usdhc1: usdhc1grp {
334 fsl,pins = <
335 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
336 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
337 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
338 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
339 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
340 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
341 /* WL_EN */
342 MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x17071
343 /* WL_IRQ */
344 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x17071
345 >;
346 };
347
348 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
349 fsl,pins = <
350 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
351 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
352 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
353 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
354 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
355 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
356 >;
357 };
358
359 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
360 fsl,pins = <
361 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170F9
362 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100F9
363 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170F9
364 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170F9
365 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170F9
366 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170F9
367 >;
368 };
369
370 pinctrl_usdhc2: usdhc2grp {
371 fsl,pins = <
372 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
373 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
374 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
375 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
376 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
377 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
378 >;
379 };
380
381 pinctrl_usdhc3: usdhc3grp {
382 fsl,pins = <
383 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
384 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
385 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
386 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
387 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
388 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
389 >;
390 };
391};
392
393&pcie {
394 fsl,tx-swing-full = <103>;
395 fsl,tx-swing-low = <103>;
396 reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
397 status = "disabled";
398};
399
400&pwm2 {
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_pwm2>;
403 status = "disabled";
404};
405
406&reg_arm {
407 vin-supply = <&sw1a_reg>;
408};
409
410&reg_pu {
411 vin-supply = <&sw1c_reg>;
412};
413
414&reg_soc {
415 vin-supply = <&sw1c_reg>;
416};
417
418&snvs_poweroff {
419 status = "okay";
420};
421
422&ssi2 {
423 status = "okay";
424};
425
426&uart1 {
427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_uart1>;
429 status = "disabled";
430};
431
432&uart2 {
433 pinctrl-names = "default";
434 pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>;
435 uart-has-rtscts;
436 status = "okay";
437
438 bluetooth {
439 compatible = "ti,wl1835-st";
440 enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>;
441 };
442};
443
444&uart3 {
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_uart3>;
447 uart-has-rtscts;
448 status = "disabled";
449};
450
451&usbh1 {
452 status = "disabled";
453};
454
455&usbotg {
456 vbus-supply = <&reg_usb_otg_vbus>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_usbotg>;
459 disable-over-current;
460 status = "disabled";
461};
462
463&usdhc1 {
464 pinctrl-names = "default", "state_100mhz", "state_200mhz";
465 pinctrl-0 = <&pinctrl_usdhc1>;
466 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
467 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
468 bus-width = <4>;
469 vmmc-supply = <&reg_wl18xx_vmmc>;
470 non-removable;
471 wakeup-source;
472 keep-power-in-suspend;
473 cap-power-off-card;
474 #address-cells = <1>;
475 #size-cells = <0>;
476 status = "okay";
477
478 wlcore: wlcore@2 {
479 compatible = "ti,wl1835";
480 reg = <2>;
481 interrupt-parent = <&gpio6>;
482 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
483 ref-clock-frequency = <38400000>;
484 };
485};
486
487&usdhc2 {
488 pinctrl-names = "default";
489 pinctrl-0 = <&pinctrl_usdhc2>;
490 no-1-8-v;
491 keep-power-in-suspend;
492 wakeup-source;
493 status = "disabled";
494};
495
496&usdhc3 {
497 pinctrl-names = "default";
498 pinctrl-0 = <&pinctrl_usdhc3>;
499 non-removable;
500 keep-power-in-suspend;
501 wakeup-source;
502 status = "okay";
503};
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
index 6d8d9ca96646..3a8a4952d45e 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
@@ -21,6 +21,11 @@
21 }; 21 };
22}; 22};
23 23
24&hdmi {
25 ddc-i2c-bus = <&i2c2>;
26 status = "okay";
27};
28
24&i2c3 { 29&i2c3 {
25 clock-frequency = <100000>; 30 clock-frequency = <100000>;
26 pinctrl-names = "default"; 31 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
index 7812fbac963c..72f52fcecee1 100644
--- a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
@@ -49,6 +49,7 @@
49 49
50 aliases { 50 aliases {
51 mdio-gpio0 = &mdio1; 51 mdio-gpio0 = &mdio1;
52 rtc0 = &ds1341;
52 }; 53 };
53 54
54 mdio1: mdio { 55 mdio1: mdio {
@@ -501,7 +502,7 @@
501 reg = <0x54>; 502 reg = <0x54>;
502 }; 503 };
503 504
504 rtc@68 { 505 ds1341: rtc@68 {
505 compatible = "dallas,ds1341"; 506 compatible = "dallas,ds1341";
506 reg = <0x68>; 507 reg = <0x68>;
507 }; 508 };
@@ -580,6 +581,17 @@
580 pinctrl-0 = <&pinctrl_pcie>; 581 pinctrl-0 = <&pinctrl_pcie>;
581 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 582 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
582 status = "okay"; 583 status = "okay";
584
585 host@0 {
586 reg = <0 0 0 0 0>;
587
588 #address-cells = <3>;
589 #size-cells = <2>;
590
591 i210: i210@0 {
592 reg = <0 0 0 0 0>;
593 };
594 };
583}; 595};
584 596
585&usdhc2 { 597&usdhc2 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 1ce4eabf0590..59ff86695a14 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -80,6 +80,75 @@
80 }; 80 };
81 }; 81 };
82 82
83 tempmon: tempmon {
84 compatible = "fsl,imx6q-tempmon";
85 interrupt-parent = <&gpc>;
86 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
87 fsl,tempmon = <&anatop>;
88 fsl,tempmon-data = <&ocotp>;
89 clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
90 };
91
92 ldb: ldb {
93 #address-cells = <1>;
94 #size-cells = <0>;
95 compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
96 gpr = <&gpr>;
97 status = "disabled";
98
99 lvds-channel@0 {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 reg = <0>;
103 status = "disabled";
104
105 port@0 {
106 reg = <0>;
107
108 lvds0_mux_0: endpoint {
109 remote-endpoint = <&ipu1_di0_lvds0>;
110 };
111 };
112
113 port@1 {
114 reg = <1>;
115
116 lvds0_mux_1: endpoint {
117 remote-endpoint = <&ipu1_di1_lvds0>;
118 };
119 };
120 };
121
122 lvds-channel@1 {
123 #address-cells = <1>;
124 #size-cells = <0>;
125 reg = <1>;
126 status = "disabled";
127
128 port@0 {
129 reg = <0>;
130
131 lvds1_mux_0: endpoint {
132 remote-endpoint = <&ipu1_di0_lvds1>;
133 };
134 };
135
136 port@1 {
137 reg = <1>;
138
139 lvds1_mux_1: endpoint {
140 remote-endpoint = <&ipu1_di1_lvds1>;
141 };
142 };
143 };
144 };
145
146 pmu {
147 compatible = "arm,cortex-a9-pmu";
148 interrupt-parent = <&gpc>;
149 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
150 };
151
83 soc { 152 soc {
84 #address-cells = <1>; 153 #address-cells = <1>;
85 #size-cells = <1>; 154 #size-cells = <1>;
@@ -224,11 +293,6 @@
224 status = "disabled"; 293 status = "disabled";
225 }; 294 };
226 295
227 pmu {
228 compatible = "arm,cortex-a9-pmu";
229 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
230 };
231
232 aips-bus@2000000 { /* AIPS1 */ 296 aips-bus@2000000 { /* AIPS1 */
233 compatible = "fsl,aips-bus", "simple-bus"; 297 compatible = "fsl,aips-bus", "simple-bus";
234 #address-cells = <1>; 298 #address-cells = <1>;
@@ -631,8 +695,11 @@
631 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, 695 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
632 <0 54 IRQ_TYPE_LEVEL_HIGH>, 696 <0 54 IRQ_TYPE_LEVEL_HIGH>,
633 <0 127 IRQ_TYPE_LEVEL_HIGH>; 697 <0 127 IRQ_TYPE_LEVEL_HIGH>;
698 #address-cells = <1>;
699 #size-cells = <0>;
634 700
635 regulator-1p1 { 701 regulator-1p1@20c8110 {
702 reg = <0x20c8110>;
636 compatible = "fsl,anatop-regulator"; 703 compatible = "fsl,anatop-regulator";
637 regulator-name = "vdd1p1"; 704 regulator-name = "vdd1p1";
638 regulator-min-microvolt = <1000000>; 705 regulator-min-microvolt = <1000000>;
@@ -647,7 +714,8 @@
647 anatop-enable-bit = <0>; 714 anatop-enable-bit = <0>;
648 }; 715 };
649 716
650 regulator-3p0 { 717 regulator-3p0@20c8120 {
718 reg = <0x20c8120>;
651 compatible = "fsl,anatop-regulator"; 719 compatible = "fsl,anatop-regulator";
652 regulator-name = "vdd3p0"; 720 regulator-name = "vdd3p0";
653 regulator-min-microvolt = <2800000>; 721 regulator-min-microvolt = <2800000>;
@@ -662,7 +730,8 @@
662 anatop-enable-bit = <0>; 730 anatop-enable-bit = <0>;
663 }; 731 };
664 732
665 regulator-2p5 { 733 regulator-2p5@20c8130 {
734 reg = <0x20c8130>;
666 compatible = "fsl,anatop-regulator"; 735 compatible = "fsl,anatop-regulator";
667 regulator-name = "vdd2p5"; 736 regulator-name = "vdd2p5";
668 regulator-min-microvolt = <2250000>; 737 regulator-min-microvolt = <2250000>;
@@ -677,7 +746,8 @@
677 anatop-enable-bit = <0>; 746 anatop-enable-bit = <0>;
678 }; 747 };
679 748
680 reg_arm: regulator-vddcore { 749 reg_arm: regulator-vddcore@20c8140 {
750 reg = <0x20c8140>;
681 compatible = "fsl,anatop-regulator"; 751 compatible = "fsl,anatop-regulator";
682 regulator-name = "vddarm"; 752 regulator-name = "vddarm";
683 regulator-min-microvolt = <725000>; 753 regulator-min-microvolt = <725000>;
@@ -694,7 +764,8 @@
694 anatop-max-voltage = <1450000>; 764 anatop-max-voltage = <1450000>;
695 }; 765 };
696 766
697 reg_pu: regulator-vddpu { 767 reg_pu: regulator-vddpu@20c8140 {
768 reg = <0x20c8140>;
698 compatible = "fsl,anatop-regulator"; 769 compatible = "fsl,anatop-regulator";
699 regulator-name = "vddpu"; 770 regulator-name = "vddpu";
700 regulator-min-microvolt = <725000>; 771 regulator-min-microvolt = <725000>;
@@ -711,7 +782,8 @@
711 anatop-max-voltage = <1450000>; 782 anatop-max-voltage = <1450000>;
712 }; 783 };
713 784
714 reg_soc: regulator-vddsoc { 785 reg_soc: regulator-vddsoc@20c8140 {
786 reg = <0x20c8140>;
715 compatible = "fsl,anatop-regulator"; 787 compatible = "fsl,anatop-regulator";
716 regulator-name = "vddsoc"; 788 regulator-name = "vddsoc";
717 regulator-min-microvolt = <725000>; 789 regulator-min-microvolt = <725000>;
@@ -729,14 +801,6 @@
729 }; 801 };
730 }; 802 };
731 803
732 tempmon: tempmon {
733 compatible = "fsl,imx6q-tempmon";
734 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
735 fsl,tempmon = <&anatop>;
736 fsl,tempmon-data = <&ocotp>;
737 clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
738 };
739
740 usbphy1: usbphy@20c9000 { 804 usbphy1: usbphy@20c9000 {
741 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 805 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
742 reg = <0x020c9000 0x1000>; 806 reg = <0x020c9000 0x1000>;
@@ -773,6 +837,10 @@
773 mask = <0x60>; 837 mask = <0x60>;
774 status = "disabled"; 838 status = "disabled";
775 }; 839 };
840
841 snvs_lpgpr: snvs-lpgpr {
842 compatible = "fsl,imx6q-snvs-lpgpr";
843 };
776 }; 844 };
777 845
778 epit1: epit@20d0000 { /* EPIT1 */ 846 epit1: epit@20d0000 { /* EPIT1 */
@@ -841,60 +909,6 @@
841 reg = <0x20e0000 0x4000>; 909 reg = <0x20e0000 0x4000>;
842 }; 910 };
843 911
844 ldb: ldb {
845 #address-cells = <1>;
846 #size-cells = <0>;
847 compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
848 gpr = <&gpr>;
849 status = "disabled";
850
851 lvds-channel@0 {
852 #address-cells = <1>;
853 #size-cells = <0>;
854 reg = <0>;
855 status = "disabled";
856
857 port@0 {
858 reg = <0>;
859
860 lvds0_mux_0: endpoint {
861 remote-endpoint = <&ipu1_di0_lvds0>;
862 };
863 };
864
865 port@1 {
866 reg = <1>;
867
868 lvds0_mux_1: endpoint {
869 remote-endpoint = <&ipu1_di1_lvds0>;
870 };
871 };
872 };
873
874 lvds-channel@1 {
875 #address-cells = <1>;
876 #size-cells = <0>;
877 reg = <1>;
878 status = "disabled";
879
880 port@0 {
881 reg = <0>;
882
883 lvds1_mux_0: endpoint {
884 remote-endpoint = <&ipu1_di0_lvds1>;
885 };
886 };
887
888 port@1 {
889 reg = <1>;
890
891 lvds1_mux_1: endpoint {
892 remote-endpoint = <&ipu1_di1_lvds1>;
893 };
894 };
895 };
896 };
897
898 dcic1: dcic@20e4000 { 912 dcic1: dcic@20e4000 {
899 reg = <0x020e4000 0x4000>; 913 reg = <0x020e4000 0x4000>;
900 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; 914 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
@@ -1017,6 +1031,7 @@
1017 fec: ethernet@2188000 { 1031 fec: ethernet@2188000 {
1018 compatible = "fsl,imx6q-fec"; 1032 compatible = "fsl,imx6q-fec";
1019 reg = <0x02188000 0x4000>; 1033 reg = <0x02188000 0x4000>;
1034 interrupt-names = "int0", "pps";
1020 interrupts-extended = 1035 interrupts-extended =
1021 <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>, 1036 <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
1022 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 1037 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index 60600b4cf5fe..2844ab541759 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -20,7 +20,7 @@
20 reg = <0x80000000 0x40000000>; 20 reg = <0x80000000 0x40000000>;
21 }; 21 };
22 22
23 backlight { 23 backlight_display: backlight_display {
24 compatible = "pwm-backlight"; 24 compatible = "pwm-backlight";
25 pwms = <&pwm1 0 5000000>; 25 pwms = <&pwm1 0 5000000>;
26 brightness-levels = <0 4 8 16 32 64 128 255>; 26 brightness-levels = <0 4 8 16 32 64 128 255>;
@@ -39,58 +39,54 @@
39 }; 39 };
40 }; 40 };
41 41
42 regulators { 42 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
43 compatible = "simple-bus"; 43 compatible = "regulator-fixed";
44 #address-cells = <1>; 44 regulator-name = "usb_otg1_vbus";
45 #size-cells = <0>; 45 regulator-min-microvolt = <5000000>;
46 46 regulator-max-microvolt = <5000000>;
47 reg_usb_otg1_vbus: regulator@0 { 47 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
48 compatible = "regulator-fixed"; 48 enable-active-high;
49 reg = <0>; 49 vin-supply = <&swbst_reg>;
50 regulator-name = "usb_otg1_vbus"; 50 };
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
53 gpio = <&gpio4 0 0>;
54 enable-active-high;
55 vin-supply = <&swbst_reg>;
56 };
57 51
58 reg_usb_otg2_vbus: regulator@1 { 52 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
59 compatible = "regulator-fixed"; 53 compatible = "regulator-fixed";
60 reg = <1>; 54 regulator-name = "usb_otg2_vbus";
61 regulator-name = "usb_otg2_vbus"; 55 regulator-min-microvolt = <5000000>;
62 regulator-min-microvolt = <5000000>; 56 regulator-max-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>; 57 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
64 gpio = <&gpio4 2 0>; 58 enable-active-high;
65 enable-active-high; 59 vin-supply = <&swbst_reg>;
66 vin-supply = <&swbst_reg>; 60 };
67 };
68 61
69 reg_aud3v: regulator@2 { 62 reg_aud3v: regulator-aud3v {
70 compatible = "regulator-fixed"; 63 compatible = "regulator-fixed";
71 reg = <2>; 64 regulator-name = "wm8962-supply-3v15";
72 regulator-name = "wm8962-supply-3v15"; 65 regulator-min-microvolt = <3150000>;
73 regulator-min-microvolt = <3150000>; 66 regulator-max-microvolt = <3150000>;
74 regulator-max-microvolt = <3150000>; 67 regulator-boot-on;
75 regulator-boot-on; 68 };
76 };
77 69
78 reg_aud4v: regulator@3 { 70 reg_aud4v: regulator-aud4v {
79 compatible = "regulator-fixed"; 71 compatible = "regulator-fixed";
80 reg = <3>; 72 regulator-name = "wm8962-supply-4v2";
81 regulator-name = "wm8962-supply-4v2"; 73 regulator-min-microvolt = <4325000>;
82 regulator-min-microvolt = <4325000>; 74 regulator-max-microvolt = <4325000>;
83 regulator-max-microvolt = <4325000>; 75 regulator-boot-on;
84 regulator-boot-on; 76 };
85 };
86 77
87 reg_lcd_3v3: regulator@4 { 78 reg_lcd_3v3: regulator-lcd-3v3 {
88 compatible = "regulator-fixed"; 79 compatible = "regulator-fixed";
89 reg = <4>; 80 regulator-name = "lcd-3v3";
90 regulator-name = "lcd-3v3"; 81 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
91 gpio = <&gpio4 3 0>; 82 enable-active-high;
92 enable-active-high; 83 };
93 }; 84
85 reg_lcd_5v: regulator-lcd-5v {
86 compatible = "regulator-fixed";
87 regulator-name = "lcd-5v0";
88 regulator-min-microvolt = <5000000>;
89 regulator-max-microvolt = <5000000>;
94 }; 90 };
95 91
96 sound { 92 sound {
@@ -108,6 +104,19 @@
108 mux-int-port = <2>; 104 mux-int-port = <2>;
109 mux-ext-port = <3>; 105 mux-ext-port = <3>;
110 }; 106 };
107
108 panel {
109 compatible = "sii,43wvf1g";
110 backlight = <&backlight_display>;
111 dvdd-supply = <&reg_lcd_3v3>;
112 avdd-supply = <&reg_lcd_5v>;
113
114 port {
115 panel_in: endpoint {
116 remote-endpoint = <&display_out>;
117 };
118 };
119 };
111}; 120};
112 121
113&audmux { 122&audmux {
@@ -546,31 +555,11 @@
546&lcdif { 555&lcdif {
547 pinctrl-names = "default"; 556 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_lcd>; 557 pinctrl-0 = <&pinctrl_lcd>;
549 lcd-supply = <&reg_lcd_3v3>;
550 display = <&display0>;
551 status = "okay"; 558 status = "okay";
552 559
553 display0: display0 { 560 port {
554 bits-per-pixel = <32>; 561 display_out: endpoint {
555 bus-width = <24>; 562 remote-endpoint = <&panel_in>;
556
557 display-timings {
558 native-mode = <&timing0>;
559 timing0: timing0 {
560 clock-frequency = <33500000>;
561 hactive = <800>;
562 vactive = <480>;
563 hback-porch = <89>;
564 hfront-porch = <164>;
565 vback-porch = <23>;
566 vfront-porch = <10>;
567 hsync-len = <10>;
568 vsync-len = <10>;
569 hsync-active = <0>;
570 vsync-active = <0>;
571 de-active = <1>;
572 pixelclk-active = <0>;
573 };
574 }; 563 };
575 }; 564 };
576}; 565};
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 3ea1a41893c8..ae8df3cf687e 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -102,6 +102,21 @@
102 }; 102 };
103 }; 103 };
104 104
105 tempmon: tempmon {
106 compatible = "fsl,imx6q-tempmon";
107 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
108 interrupt-parent = <&gpc>;
109 fsl,tempmon = <&anatop>;
110 fsl,tempmon-data = <&ocotp>;
111 clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
112 };
113
114 pmu {
115 compatible = "arm,cortex-a9-pmu";
116 interrupt-parent = <&gpc>;
117 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
118 };
119
105 soc { 120 soc {
106 #address-cells = <1>; 121 #address-cells = <1>;
107 #size-cells = <1>; 122 #size-cells = <1>;
@@ -125,11 +140,6 @@
125 arm,data-latency = <4 2 3>; 140 arm,data-latency = <4 2 3>;
126 }; 141 };
127 142
128 pmu {
129 compatible = "arm,cortex-a9-pmu";
130 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
131 };
132
133 aips1: aips-bus@2000000 { 143 aips1: aips-bus@2000000 {
134 compatible = "fsl,aips-bus", "simple-bus"; 144 compatible = "fsl,aips-bus", "simple-bus";
135 #address-cells = <1>; 145 #address-cells = <1>;
@@ -517,8 +527,11 @@
517 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, 527 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
518 <0 54 IRQ_TYPE_LEVEL_HIGH>, 528 <0 54 IRQ_TYPE_LEVEL_HIGH>,
519 <0 127 IRQ_TYPE_LEVEL_HIGH>; 529 <0 127 IRQ_TYPE_LEVEL_HIGH>;
530 #address-cells = <1>;
531 #size-cells = <0>;
520 532
521 regulator-1p1 { 533 regulator-1p1@20c8110 {
534 reg = <0x20c8110>;
522 compatible = "fsl,anatop-regulator"; 535 compatible = "fsl,anatop-regulator";
523 regulator-name = "vdd1p1"; 536 regulator-name = "vdd1p1";
524 regulator-min-microvolt = <800000>; 537 regulator-min-microvolt = <800000>;
@@ -533,7 +546,8 @@
533 anatop-enable-bit = <0>; 546 anatop-enable-bit = <0>;
534 }; 547 };
535 548
536 regulator-3p0 { 549 regulator-3p0@20c8120 {
550 reg = <0x20c8120>;
537 compatible = "fsl,anatop-regulator"; 551 compatible = "fsl,anatop-regulator";
538 regulator-name = "vdd3p0"; 552 regulator-name = "vdd3p0";
539 regulator-min-microvolt = <2800000>; 553 regulator-min-microvolt = <2800000>;
@@ -548,7 +562,8 @@
548 anatop-enable-bit = <0>; 562 anatop-enable-bit = <0>;
549 }; 563 };
550 564
551 regulator-2p5 { 565 regulator-2p5@20c8130 {
566 reg = <0x20c8130>;
552 compatible = "fsl,anatop-regulator"; 567 compatible = "fsl,anatop-regulator";
553 regulator-name = "vdd2p5"; 568 regulator-name = "vdd2p5";
554 regulator-min-microvolt = <2100000>; 569 regulator-min-microvolt = <2100000>;
@@ -563,7 +578,8 @@
563 anatop-enable-bit = <0>; 578 anatop-enable-bit = <0>;
564 }; 579 };
565 580
566 reg_arm: regulator-vddcore { 581 reg_arm: regulator-vddcore@20c8140 {
582 reg = <0x20c8140>;
567 compatible = "fsl,anatop-regulator"; 583 compatible = "fsl,anatop-regulator";
568 regulator-name = "vddarm"; 584 regulator-name = "vddarm";
569 regulator-min-microvolt = <725000>; 585 regulator-min-microvolt = <725000>;
@@ -580,7 +596,8 @@
580 anatop-max-voltage = <1450000>; 596 anatop-max-voltage = <1450000>;
581 }; 597 };
582 598
583 reg_pu: regulator-vddpu { 599 reg_pu: regulator-vddpu@20c8140 {
600 reg = <0x20c8140>;
584 compatible = "fsl,anatop-regulator"; 601 compatible = "fsl,anatop-regulator";
585 regulator-name = "vddpu"; 602 regulator-name = "vddpu";
586 regulator-min-microvolt = <725000>; 603 regulator-min-microvolt = <725000>;
@@ -597,7 +614,8 @@
597 anatop-max-voltage = <1450000>; 614 anatop-max-voltage = <1450000>;
598 }; 615 };
599 616
600 reg_soc: regulator-vddsoc { 617 reg_soc: regulator-vddsoc@20c8140 {
618 reg = <0x20c8140>;
601 compatible = "fsl,anatop-regulator"; 619 compatible = "fsl,anatop-regulator";
602 regulator-name = "vddsoc"; 620 regulator-name = "vddsoc";
603 regulator-min-microvolt = <725000>; 621 regulator-min-microvolt = <725000>;
@@ -615,14 +633,6 @@
615 }; 633 };
616 }; 634 };
617 635
618 tempmon: tempmon {
619 compatible = "fsl,imx6q-tempmon";
620 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
621 fsl,tempmon = <&anatop>;
622 fsl,tempmon-data = <&ocotp>;
623 clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
624 };
625
626 usbphy1: usbphy@20c9000 { 636 usbphy1: usbphy@20c9000 {
627 compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy"; 637 compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
628 reg = <0x020c9000 0x1000>; 638 reg = <0x020c9000 0x1000>;
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index da815527a7f8..d35aa858f9db 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -24,7 +24,7 @@
24 reg = <0x80000000 0x40000000>; 24 reg = <0x80000000 0x40000000>;
25 }; 25 };
26 26
27 backlight { 27 backlight_display: backlight-display {
28 compatible = "pwm-backlight"; 28 compatible = "pwm-backlight";
29 pwms = <&pwm3 0 5000000>; 29 pwms = <&pwm3 0 5000000>;
30 brightness-levels = <0 4 8 16 32 64 128 255>; 30 brightness-levels = <0 4 8 16 32 64 128 255>;
@@ -49,86 +49,91 @@
49 }; 49 };
50 }; 50 };
51 51
52 regulators { 52 vcc_sd3: regulator-vcc-sd3 {
53 compatible = "simple-bus"; 53 compatible = "regulator-fixed";
54 #address-cells = <1>; 54 pinctrl-names = "default";
55 #size-cells = <0>; 55 pinctrl-0 = <&pinctrl_vcc_sd3>;
56 regulator-name = "VCC_SD3";
57 regulator-min-microvolt = <3000000>;
58 regulator-max-microvolt = <3000000>;
59 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
60 enable-active-high;
61 };
56 62
57 vcc_sd3: regulator@0 { 63 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
58 compatible = "regulator-fixed"; 64 compatible = "regulator-fixed";
59 reg = <0>; 65 pinctrl-names = "default";
60 pinctrl-names = "default"; 66 pinctrl-0 = <&pinctrl_usb_otg1>;
61 pinctrl-0 = <&pinctrl_vcc_sd3>; 67 regulator-name = "usb_otg1_vbus";
62 regulator-name = "VCC_SD3"; 68 regulator-min-microvolt = <5000000>;
63 regulator-min-microvolt = <3000000>; 69 regulator-max-microvolt = <5000000>;
64 regulator-max-microvolt = <3000000>; 70 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
65 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; 71 enable-active-high;
66 enable-active-high; 72 };
67 };
68 73
69 reg_usb_otg1_vbus: regulator@1 { 74 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
70 compatible = "regulator-fixed"; 75 compatible = "regulator-fixed";
71 reg = <1>; 76 pinctrl-names = "default";
72 pinctrl-names = "default"; 77 pinctrl-0 = <&pinctrl_usb_otg2>;
73 pinctrl-0 = <&pinctrl_usb_otg1>; 78 regulator-name = "usb_otg2_vbus";
74 regulator-name = "usb_otg1_vbus"; 79 regulator-min-microvolt = <5000000>;
75 regulator-min-microvolt = <5000000>; 80 regulator-max-microvolt = <5000000>;
76 regulator-max-microvolt = <5000000>; 81 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
77 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 82 enable-active-high;
78 enable-active-high; 83 };
79 };
80 84
81 reg_usb_otg2_vbus: regulator@2 { 85 reg_psu_5v: regulator-psu-5v {
82 compatible = "regulator-fixed"; 86 compatible = "regulator-fixed";
83 reg = <2>; 87 regulator-name = "PSU-5V0";
84 pinctrl-names = "default"; 88 regulator-min-microvolt = <5000000>;
85 pinctrl-0 = <&pinctrl_usb_otg2>; 89 regulator-max-microvolt = <5000000>;
86 regulator-name = "usb_otg2_vbus"; 90 };
87 regulator-min-microvolt = <5000000>; 91
88 regulator-max-microvolt = <5000000>; 92 reg_lcd_3v3: regulator-lcd-3v3 {
89 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 93 compatible = "regulator-fixed";
90 enable-active-high; 94 regulator-name = "lcd-3v3";
91 }; 95 gpio = <&gpio3 27 0>;
92 96 enable-active-high;
93 reg_psu_5v: regulator@3 { 97 };
94 compatible = "regulator-fixed"; 98
95 reg = <3>; 99 reg_peri_3v3: regulator-peri-3v3 {
96 regulator-name = "PSU-5V0"; 100 compatible = "regulator-fixed";
97 regulator-min-microvolt = <5000000>; 101 pinctrl-names = "default";
98 regulator-max-microvolt = <5000000>; 102 pinctrl-0 = <&pinctrl_peri_3v3>;
99 }; 103 regulator-name = "peri_3v3";
100 104 regulator-min-microvolt = <3300000>;
101 reg_lcd_3v3: regulator@4 { 105 regulator-max-microvolt = <3300000>;
102 compatible = "regulator-fixed"; 106 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
103 reg = <4>; 107 enable-active-high;
104 regulator-name = "lcd-3v3"; 108 regulator-always-on;
105 gpio = <&gpio3 27 0>; 109 };
106 enable-active-high; 110
107 }; 111 reg_enet_3v3: regulator-enet-3v3 {
108 112 compatible = "regulator-fixed";
109 reg_peri_3v3: regulator@5 { 113 pinctrl-names = "default";
110 compatible = "regulator-fixed"; 114 pinctrl-0 = <&pinctrl_enet_3v3>;
111 reg = <5>; 115 regulator-name = "enet_3v3";
112 pinctrl-names = "default"; 116 regulator-min-microvolt = <3300000>;
113 pinctrl-0 = <&pinctrl_peri_3v3>; 117 regulator-max-microvolt = <3300000>;
114 regulator-name = "peri_3v3"; 118 gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
115 regulator-min-microvolt = <3300000>; 119 };
116 regulator-max-microvolt = <3300000>; 120
117 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>; 121 reg_pcie_gpio: regulator-pcie-gpio {
118 enable-active-high; 122 compatible = "regulator-fixed";
119 regulator-always-on; 123 pinctrl-names = "default";
120 }; 124 pinctrl-0 = <&pinctrl_pcie_reg>;
121 125 regulator-name = "MPCIE_3V3";
122 reg_enet_3v3: regulator@6 { 126 regulator-min-microvolt = <3300000>;
123 compatible = "regulator-fixed"; 127 regulator-max-microvolt = <3300000>;
124 reg = <6>; 128 gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>;
125 pinctrl-names = "default"; 129 enable-active-high;
126 pinctrl-0 = <&pinctrl_enet_3v3>; 130 };
127 regulator-name = "enet_3v3"; 131
128 regulator-min-microvolt = <3300000>; 132 reg_lcd_5v: regulator-lcd-5v {
129 regulator-max-microvolt = <3300000>; 133 compatible = "regulator-fixed";
130 gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; 134 regulator-name = "lcd-5v0";
131 }; 135 regulator-min-microvolt = <5000000>;
136 regulator-max-microvolt = <5000000>;
132 }; 137 };
133 138
134 sound { 139 sound {
@@ -146,6 +151,19 @@
146 mux-int-port = <2>; 151 mux-int-port = <2>;
147 mux-ext-port = <6>; 152 mux-ext-port = <6>;
148 }; 153 };
154
155 panel {
156 compatible = "sii,43wvf1g";
157 backlight = <&backlight_display>;
158 dvdd-supply = <&reg_lcd_3v3>;
159 avdd-supply = <&reg_lcd_5v>;
160
161 port {
162 panel_in: endpoint {
163 remote-endpoint = <&display_out>;
164 };
165 };
166 };
149}; 167};
150 168
151&audmux { 169&audmux {
@@ -212,34 +230,22 @@
212 }; 230 };
213}; 231};
214 232
233&pcie {
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_pcie>;
236 reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;
237 vpcie-supply = <&reg_pcie_gpio>;
238 status = "okay";
239};
240
215&lcdif1 { 241&lcdif1 {
216 pinctrl-names = "default"; 242 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_lcd>; 243 pinctrl-0 = <&pinctrl_lcd>;
218 lcd-supply = <&reg_lcd_3v3>;
219 display = <&display0>;
220 status = "okay"; 244 status = "okay";
221 245
222 display0: display0 { 246 port {
223 bits-per-pixel = <16>; 247 display_out: endpoint {
224 bus-width = <24>; 248 remote-endpoint = <&panel_in>;
225
226 display-timings {
227 native-mode = <&timing0>;
228 timing0: timing0 {
229 clock-frequency = <33500000>;
230 hactive = <800>;
231 vactive = <480>;
232 hback-porch = <89>;
233 hfront-porch = <164>;
234 vback-porch = <23>;
235 vfront-porch = <10>;
236 hsync-len = <10>;
237 vsync-len = <10>;
238 hsync-active = <0>;
239 vsync-active = <0>;
240 de-active = <1>;
241 pixelclk-active = <0>;
242 };
243 }; 249 };
244 }; 250 };
245}; 251};
@@ -453,6 +459,18 @@
453 >; 459 >;
454 }; 460 };
455 461
462 pinctrl_pcie: pciegrp {
463 fsl,pins = <
464 MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0
465 >;
466 };
467
468 pinctrl_pcie_reg: pciereggrp {
469 fsl,pins = <
470 MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0
471 >;
472 };
473
456 pinctrl_peri_3v3: peri3v3grp { 474 pinctrl_peri_3v3: peri3v3grp {
457 fsl,pins = < 475 fsl,pins = <
458 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 476 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 5b03ba3beda9..fd7879342d0d 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -141,6 +141,22 @@
141 }; 141 };
142 }; 142 };
143 143
144 tempmon: tempmon {
145 compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
146 interrupt-parent = <&gpc>;
147 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
148 fsl,tempmon = <&anatop>;
149 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
150 nvmem-cell-names = "calib", "temp_grade";
151 clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
152 };
153
154 pmu {
155 compatible = "arm,cortex-a9-pmu";
156 interrupt-parent = <&gpc>;
157 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
158 };
159
144 soc { 160 soc {
145 #address-cells = <1>; 161 #address-cells = <1>;
146 #size-cells = <1>; 162 #size-cells = <1>;
@@ -148,11 +164,6 @@
148 interrupt-parent = <&gpc>; 164 interrupt-parent = <&gpc>;
149 ranges; 165 ranges;
150 166
151 pmu {
152 compatible = "arm,cortex-a9-pmu";
153 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
154 };
155
156 ocram: sram@900000 { 167 ocram: sram@900000 {
157 compatible = "mmio-sram"; 168 compatible = "mmio-sram";
158 reg = <0x00900000 0x20000>; 169 reg = <0x00900000 0x20000>;
@@ -574,8 +585,11 @@
574 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 585 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
575 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 586 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
576 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 587 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
588 #address-cells = <1>;
589 #size-cells = <0>;
577 590
578 regulator-1p1 { 591 regulator-1p1@20c8110 {
592 reg = <0x20c8110>;
579 compatible = "fsl,anatop-regulator"; 593 compatible = "fsl,anatop-regulator";
580 regulator-name = "vdd1p1"; 594 regulator-name = "vdd1p1";
581 regulator-min-microvolt = <800000>; 595 regulator-min-microvolt = <800000>;
@@ -590,7 +604,8 @@
590 anatop-enable-bit = <0>; 604 anatop-enable-bit = <0>;
591 }; 605 };
592 606
593 regulator-3p0 { 607 regulator-3p0@20c8120 {
608 reg = <0x20c8120>;
594 compatible = "fsl,anatop-regulator"; 609 compatible = "fsl,anatop-regulator";
595 regulator-name = "vdd3p0"; 610 regulator-name = "vdd3p0";
596 regulator-min-microvolt = <2800000>; 611 regulator-min-microvolt = <2800000>;
@@ -605,7 +620,8 @@
605 anatop-enable-bit = <0>; 620 anatop-enable-bit = <0>;
606 }; 621 };
607 622
608 regulator-2p5 { 623 regulator-2p5@20c8130 {
624 reg = <0x20c8130>;
609 compatible = "fsl,anatop-regulator"; 625 compatible = "fsl,anatop-regulator";
610 regulator-name = "vdd2p5"; 626 regulator-name = "vdd2p5";
611 regulator-min-microvolt = <2100000>; 627 regulator-min-microvolt = <2100000>;
@@ -620,7 +636,8 @@
620 anatop-enable-bit = <0>; 636 anatop-enable-bit = <0>;
621 }; 637 };
622 638
623 reg_arm: regulator-vddcore { 639 reg_arm: regulator-vddcore@20c8140 {
640 reg = <0x20c8140>;
624 compatible = "fsl,anatop-regulator"; 641 compatible = "fsl,anatop-regulator";
625 regulator-name = "vddarm"; 642 regulator-name = "vddarm";
626 regulator-min-microvolt = <725000>; 643 regulator-min-microvolt = <725000>;
@@ -637,7 +654,8 @@
637 anatop-max-voltage = <1450000>; 654 anatop-max-voltage = <1450000>;
638 }; 655 };
639 656
640 reg_pcie: regulator-vddpcie { 657 reg_pcie: regulator-vddpcie@20c8140 {
658 reg = <0x20c8140>;
641 compatible = "fsl,anatop-regulator"; 659 compatible = "fsl,anatop-regulator";
642 regulator-name = "vddpcie"; 660 regulator-name = "vddpcie";
643 regulator-min-microvolt = <725000>; 661 regulator-min-microvolt = <725000>;
@@ -653,7 +671,8 @@
653 anatop-max-voltage = <1450000>; 671 anatop-max-voltage = <1450000>;
654 }; 672 };
655 673
656 reg_soc: regulator-vddsoc { 674 reg_soc: regulator-vddsoc@20c8140 {
675 reg = <0x20c8140>;
657 compatible = "fsl,anatop-regulator"; 676 compatible = "fsl,anatop-regulator";
658 regulator-name = "vddsoc"; 677 regulator-name = "vddsoc";
659 regulator-min-microvolt = <725000>; 678 regulator-min-microvolt = <725000>;
@@ -671,15 +690,6 @@
671 }; 690 };
672 }; 691 };
673 692
674 tempmon: tempmon {
675 compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
676 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
677 fsl,tempmon = <&anatop>;
678 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
679 nvmem-cell-names = "calib", "temp_grade";
680 clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
681 };
682
683 usbphy1: usbphy@20c9000 { 693 usbphy1: usbphy@20c9000 {
684 compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy"; 694 compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
685 reg = <0x020c9000 0x1000>; 695 reg = <0x020c9000 0x1000>;
@@ -750,6 +760,19 @@
750 #interrupt-cells = <3>; 760 #interrupt-cells = <3>;
751 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 761 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
752 interrupt-parent = <&intc>; 762 interrupt-parent = <&intc>;
763 clocks = <&clks IMX6SX_CLK_IPG>;
764 clock-names = "ipg";
765
766 pgc {
767 #address-cells = <1>;
768 #size-cells = <0>;
769
770 pd_pci: power-domain@3 {
771 reg = <3>;
772 #power-domain-cells = <0>;
773 power-supply = <&reg_pcie>;
774 };
775 };
753 }; 776 };
754 777
755 iomuxc: iomuxc@20e0000 { 778 iomuxc: iomuxc@20e0000 {
@@ -862,6 +885,7 @@
862 fec1: ethernet@2188000 { 885 fec1: ethernet@2188000 {
863 compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec"; 886 compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
864 reg = <0x02188000 0x4000>; 887 reg = <0x02188000 0x4000>;
888 interrupt-names = "int0", "pps";
865 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 889 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 890 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&clks IMX6SX_CLK_ENET>, 891 clocks = <&clks IMX6SX_CLK_ENET>,
@@ -971,6 +995,7 @@
971 fec2: ethernet@21b4000 { 995 fec2: ethernet@21b4000 {
972 compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec"; 996 compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
973 reg = <0x021b4000 0x4000>; 997 reg = <0x021b4000 0x4000>;
998 interrupt-names = "int0", "pps";
974 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 999 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 1000 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
976 clocks = <&clks IMX6SX_CLK_ENET>, 1001 clocks = <&clks IMX6SX_CLK_ENET>,
@@ -1138,7 +1163,7 @@
1138 reg = <0x02200000 0x100000>; 1163 reg = <0x02200000 0x100000>;
1139 ranges; 1164 ranges;
1140 1165
1141 spba-bus@2200000 { 1166 spba-bus@2240000 {
1142 compatible = "fsl,spba-bus", "simple-bus"; 1167 compatible = "fsl,spba-bus", "simple-bus";
1143 #address-cells = <1>; 1168 #address-cells = <1>;
1144 #size-cells = <1>; 1169 #size-cells = <1>;
@@ -1304,25 +1329,29 @@
1304 1329
1305 pcie: pcie@8ffc000 { 1330 pcie: pcie@8ffc000 {
1306 compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; 1331 compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
1307 reg = <0x08ffc000 0x4000>; /* DBI */ 1332 reg = <0x08ffc000 0x04000>, <0x08f00000 0x80000>;
1333 reg-names = "dbi", "config";
1308 #address-cells = <3>; 1334 #address-cells = <3>;
1309 #size-cells = <2>; 1335 #size-cells = <2>;
1310 device_type = "pci"; 1336 device_type = "pci";
1311 /* configuration space */
1312 ranges = <0x00000800 0 0x08f00000 0x08f00000 0 0x00080000
1313 /* downstream I/O */
1314 0x81000000 0 0 0x08f80000 0 0x00010000
1315 /* non-prefetchable memory */
1316 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
1317 bus-range = <0x00 0xff>; 1337 bus-range = <0x00 0xff>;
1338 ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */
1339 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
1318 num-lanes = <1>; 1340 num-lanes = <1>;
1319 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1341 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>, 1342 interrupt-names = "msi";
1321 <&clks IMX6SX_CLK_PCIE_AXI>, 1343 #interrupt-cells = <1>;
1344 interrupt-map-mask = <0 0 0 0x7>;
1345 interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1346 <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1347 <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1348 <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1349 clocks = <&clks IMX6SX_CLK_PCIE_AXI>,
1322 <&clks IMX6SX_CLK_LVDS1_OUT>, 1350 <&clks IMX6SX_CLK_LVDS1_OUT>,
1351 <&clks IMX6SX_CLK_PCIE_REF_125M>,
1323 <&clks IMX6SX_CLK_DISPLAY_AXI>; 1352 <&clks IMX6SX_CLK_DISPLAY_AXI>;
1324 clock-names = "pcie_ref_125m", "pcie_axi", 1353 clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
1325 "lvds_gate", "display_axi"; 1354 power-domains = <&pd_pci>;
1326 status = "disabled"; 1355 status = "disabled";
1327 }; 1356 };
1328 }; 1357 };
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
index e5d3ef88be60..18fdb088ba1e 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
@@ -30,19 +30,14 @@
30 status = "okay"; 30 status = "okay";
31 }; 31 };
32 32
33 regulators {
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <0>;
37 33
38 reg_sd1_vmmc: sd1_regulator { 34 reg_sd1_vmmc: regulator-sd1-vmmc {
39 compatible = "regulator-fixed"; 35 compatible = "regulator-fixed";
40 regulator-name = "VSD_3V3"; 36 regulator-name = "VSD_3V3";
41 regulator-min-microvolt = <3300000>; 37 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <3300000>; 38 regulator-max-microvolt = <3300000>;
43 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 39 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
44 enable-active-high; 40 enable-active-high;
45 };
46 }; 41 };
47 42
48 sound { 43 sound {
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index d5181f85ca9c..1b14e4d39c26 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -136,6 +136,23 @@
136 clock-output-names = "ipp_di1"; 136 clock-output-names = "ipp_di1";
137 }; 137 };
138 138
139 tempmon: tempmon {
140 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
141 interrupt-parent = <&gpc>;
142 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
143 fsl,tempmon = <&anatop>;
144 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
145 nvmem-cell-names = "calib", "temp_grade";
146 clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
147 };
148
149 pmu {
150 compatible = "arm,cortex-a7-pmu";
151 interrupt-parent = <&gpc>;
152 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
153 status = "disabled";
154 };
155
139 soc { 156 soc {
140 #address-cells = <1>; 157 #address-cells = <1>;
141 #size-cells = <1>; 158 #size-cells = <1>;
@@ -143,12 +160,6 @@
143 interrupt-parent = <&gpc>; 160 interrupt-parent = <&gpc>;
144 ranges; 161 ranges;
145 162
146 pmu {
147 compatible = "arm,cortex-a7-pmu";
148 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
149 status = "disabled";
150 };
151
152 ocram: sram@900000 { 163 ocram: sram@900000 {
153 compatible = "mmio-sram"; 164 compatible = "mmio-sram";
154 reg = <0x00900000 0x20000>; 165 reg = <0x00900000 0x20000>;
@@ -476,6 +487,7 @@
476 fec2: ethernet@20b4000 { 487 fec2: ethernet@20b4000 {
477 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; 488 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
478 reg = <0x020b4000 0x4000>; 489 reg = <0x020b4000 0x4000>;
490 interrupt-names = "int0", "pps";
479 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 491 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 492 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
481 clocks = <&clks IMX6UL_CLK_ENET>, 493 clocks = <&clks IMX6UL_CLK_ENET>,
@@ -530,8 +542,11 @@
530 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 542 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 543 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 544 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
545 #address-cells = <1>;
546 #size-cells = <0>;
533 547
534 reg_3p0: regulator-3p0 { 548 reg_3p0: regulator-3p0@20c8110 {
549 reg = <0x20c8110>;
535 compatible = "fsl,anatop-regulator"; 550 compatible = "fsl,anatop-regulator";
536 regulator-name = "vdd3p0"; 551 regulator-name = "vdd3p0";
537 regulator-min-microvolt = <2625000>; 552 regulator-min-microvolt = <2625000>;
@@ -545,7 +560,8 @@
545 anatop-enable-bit = <0>; 560 anatop-enable-bit = <0>;
546 }; 561 };
547 562
548 reg_arm: regulator-vddcore { 563 reg_arm: regulator-vddcore@20c8140 {
564 reg = <0x20c8140>;
549 compatible = "fsl,anatop-regulator"; 565 compatible = "fsl,anatop-regulator";
550 regulator-name = "cpu"; 566 regulator-name = "cpu";
551 regulator-min-microvolt = <725000>; 567 regulator-min-microvolt = <725000>;
@@ -562,7 +578,8 @@
562 anatop-max-voltage = <1450000>; 578 anatop-max-voltage = <1450000>;
563 }; 579 };
564 580
565 reg_soc: regulator-vddsoc { 581 reg_soc: regulator-vddsoc@20c8140 {
582 reg = <0x20c8140>;
566 compatible = "fsl,anatop-regulator"; 583 compatible = "fsl,anatop-regulator";
567 regulator-name = "vddsoc"; 584 regulator-name = "vddsoc";
568 regulator-min-microvolt = <725000>; 585 regulator-min-microvolt = <725000>;
@@ -598,15 +615,6 @@
598 fsl,anatop = <&anatop>; 615 fsl,anatop = <&anatop>;
599 }; 616 };
600 617
601 tempmon: tempmon {
602 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
603 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
604 fsl,tempmon = <&anatop>;
605 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
606 nvmem-cell-names = "calib", "temp_grade";
607 clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
608 };
609
610 snvs: snvs@20cc000 { 618 snvs: snvs@20cc000 {
611 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; 619 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
612 reg = <0x020cc000 0x4000>; 620 reg = <0x020cc000 0x4000>;
@@ -635,6 +643,10 @@
635 linux,keycode = <KEY_POWER>; 643 linux,keycode = <KEY_POWER>;
636 wakeup-source; 644 wakeup-source;
637 }; 645 };
646
647 snvs_lpgpr: snvs-lpgpr {
648 compatible = "fsl,imx6ul-snvs-lpgpr";
649 };
638 }; 650 };
639 651
640 epit1: epit@20d0000 { 652 epit1: epit@20d0000 {
@@ -784,6 +796,7 @@
784 fec1: ethernet@2188000 { 796 fec1: ethernet@2188000 {
785 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; 797 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
786 reg = <0x02188000 0x4000>; 798 reg = <0x02188000 0x4000>;
799 interrupt-names = "int0", "pps";
787 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 800 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 801 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
789 clocks = <&clks IMX6UL_CLK_ENET>, 802 clocks = <&clks IMX6UL_CLK_ENET>,
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 18bebd6d8d47..3f2746169181 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -45,6 +45,13 @@
45 stdout-path = "serial0:115200n8"; 45 stdout-path = "serial0:115200n8";
46 }; 46 };
47 47
48 /* fixed crystal dedicated to mpc258x */
49 clk16m: clk16m {
50 compatible = "fixed-clock";
51 #clock-cells = <0>;
52 clock-frequency = <16000000>;
53 };
54
48 panel: panel { 55 panel: panel {
49 compatible = "edt,et057090dhu"; 56 compatible = "edt,et057090dhu";
50 backlight = <&bl>; 57 backlight = <&bl>;
@@ -70,6 +77,17 @@
70 regulator-min-microvolt = <5000000>; 77 regulator-min-microvolt = <5000000>;
71 regulator-max-microvolt = <5000000>; 78 regulator-max-microvolt = <5000000>;
72 }; 79 };
80
81 reg_usbh_vbus: regulator-usbh-vbus {
82 compatible = "regulator-fixed";
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_usbh_reg>;
85 regulator-name = "VCC_USB[1-4]";
86 regulator-min-microvolt = <5000000>;
87 regulator-max-microvolt = <5000000>;
88 gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
89 vin-supply = <&reg_5v0>;
90 };
73}; 91};
74 92
75&bl { 93&bl {
@@ -88,6 +106,24 @@
88 status = "okay"; 106 status = "okay";
89}; 107};
90 108
109&ecspi3 {
110 status = "okay";
111
112 mcp2515: can@0 {
113 compatible = "microchip,mcp2515";
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_can_int>;
116 reg = <0>;
117 clocks = <&clk16m>;
118 interrupt-parent = <&gpio5>;
119 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
120 spi-max-frequency = <10000000>;
121 vdd-supply = <&reg_3v3>;
122 xceiver-supply = <&reg_5v0>;
123 status = "okay";
124 };
125};
126
91&fec1 { 127&fec1 {
92 status = "okay"; 128 status = "okay";
93}; 129};
@@ -97,7 +133,7 @@
97 133
98 /* M41T0M6 real time clock on carrier board */ 134 /* M41T0M6 real time clock on carrier board */
99 rtc: m41t0m6@68 { 135 rtc: m41t0m6@68 {
100 compatible = "st,m41t00"; 136 compatible = "st,m41t0";
101 reg = <0x68>; 137 reg = <0x68>;
102 }; 138 };
103}; 139};
@@ -147,5 +183,6 @@
147&usdhc1 { 183&usdhc1 {
148 keep-power-in-suspend; 184 keep-power-in-suspend;
149 wakeup-source; 185 wakeup-source;
186 vmmc-supply = <&reg_3v3>;
150 status = "okay"; 187 status = "okay";
151}; 188};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index bb5bf94f1a32..895fbde4d433 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -43,7 +43,10 @@
43/ { 43/ {
44 bl: backlight { 44 bl: backlight {
45 compatible = "pwm-backlight"; 45 compatible = "pwm-backlight";
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_gpio_bl_on>;
46 pwms = <&pwm1 0 5000000 0>; 48 pwms = <&pwm1 0 5000000 0>;
49 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
47 }; 50 };
48 51
49 reg_module_3v3: regulator-module-3v3 { 52 reg_module_3v3: regulator-module-3v3 {
@@ -86,7 +89,13 @@
86}; 89};
87 90
88&cpu0 { 91&cpu0 {
89 arm-supply = <&reg_DCDC2>; 92 cpu-supply = <&reg_DCDC2>;
93};
94
95&ecspi3 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
98 cs-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
90}; 99};
91 100
92&fec1 { 101&fec1 {
@@ -112,7 +121,6 @@
112 fsl,use-minimum-ecc; 121 fsl,use-minimum-ecc;
113 nand-on-flash-bbt; 122 nand-on-flash-bbt;
114 nand-ecc-mode = "hw"; 123 nand-ecc-mode = "hw";
115 status = "okay";
116}; 124};
117 125
118&i2c1 { 126&i2c1 {
@@ -299,6 +307,22 @@
299 no-1-8-v; 307 no-1-8-v;
300 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 308 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
301 disable-wp; 309 disable-wp;
310 vqmmc-supply = <&reg_LDO2>;
311};
312
313&usdhc3 {
314 pinctrl-names = "default", "state_100mhz", "state_200mhz";
315 pinctrl-0 = <&pinctrl_usdhc3>;
316 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
317 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
318 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
319 assigned-clock-rates = <400000000>;
320 bus-width = <8>;
321 fsl,tuning-step = <2>;
322 max-frequency = <100000000>;
323 vmmc-supply = <&reg_module_3v3>;
324 vqmmc-supply = <&reg_DCDC3>;
325 non-removable;
302}; 326};
303 327
304&iomuxc { 328&iomuxc {
@@ -307,17 +331,16 @@
307 331
308 pinctrl_gpio1: gpio1-grp { 332 pinctrl_gpio1: gpio1-grp {
309 fsl,pins = < 333 fsl,pins = <
310 MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ 334 MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */
311 MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ 335 MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74 /* SODIMM 63 */
312 MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ 336 MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */
313 MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0X14 /* SODIMM 77 */
314 MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ 337 MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */
315 MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x14 /* SODIMM 91 */ 338 MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */
316 MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ 339 MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */
317 MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ 340 MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */
318 MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ 341 MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */
319 MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x14 /* SODIMM 105 */ 342 MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */
320 MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x14 /* SODIMM 107 */ 343 MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 */
321 MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ 344 MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */
322 MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ 345 MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */
323 MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */ 346 MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */
@@ -329,11 +352,12 @@
329 MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ 352 MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */
330 MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ 353 MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */
331 MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */ 354 MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */
355 MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */
332 MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ 356 MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */
333 MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ 357 MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */
334 MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ 358 MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */
335 MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */ 359 MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */
336 MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* SODIMM 106 */ 360 MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x74 /* SODIMM 106 */
337 MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ 361 MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */
338 MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */ 362 MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */
339 MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */ 363 MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */
@@ -357,8 +381,7 @@
357 pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ 381 pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */
358 fsl,pins = < 382 fsl,pins = <
359 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ 383 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */
360 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x14 /* SODIMM 69 */ 384 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */
361 MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
362 MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ 385 MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */
363 MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ 386 MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */
364 MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ 387 MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */
@@ -378,8 +401,8 @@
378 MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */ 401 MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */
379 MX7D_PAD_LCD_DATA20__GPIO3_IO25 0x14 /* SODIMM 140 */ 402 MX7D_PAD_LCD_DATA20__GPIO3_IO25 0x14 /* SODIMM 140 */
380 MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x14 /* SODIMM 142 */ 403 MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x14 /* SODIMM 142 */
381 MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x14 /* SODIMM 146 */ 404 MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x74 /* SODIMM 144 */
382 MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x14 /* SODIMM 148 */ 405 MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x74 /* SODIMM 146 */
383 >; 406 >;
384 }; 407 };
385 408
@@ -396,6 +419,12 @@
396 >; 419 >;
397 }; 420 };
398 421
422 pinctrl_can_int: can-int-grp {
423 fsl,pins = <
424 MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */
425 >;
426 };
427
399 pinctrl_enet1: enet1grp { 428 pinctrl_enet1: enet1grp {
400 fsl,pins = < 429 fsl,pins = <
401 MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 430 MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14
@@ -434,12 +463,17 @@
434 >; 463 >;
435 }; 464 };
436 465
466 pinctrl_gpio_bl_on: gpio-bl-on {
467 fsl,pins = <
468 MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
469 >;
470 };
471
437 pinctrl_gpmi_nand: gpmi-nand-grp { 472 pinctrl_gpmi_nand: gpmi-nand-grp {
438 fsl,pins = < 473 fsl,pins = <
439 MX7D_PAD_SD3_CLK__NAND_CLE 0x71 474 MX7D_PAD_SD3_CLK__NAND_CLE 0x71
440 MX7D_PAD_SD3_CMD__NAND_ALE 0x71 475 MX7D_PAD_SD3_CMD__NAND_ALE 0x71
441 MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 476 MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
442 MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B 0x71
443 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 477 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
444 MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 478 MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
445 MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 479 MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
@@ -507,6 +541,7 @@
507 pinctrl_pwm1: pwm1-grp { 541 pinctrl_pwm1: pwm1-grp {
508 fsl,pins = < 542 fsl,pins = <
509 MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 543 MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79
544 MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4
510 >; 545 >;
511 }; 546 };
512 547
@@ -525,6 +560,7 @@
525 pinctrl_pwm4: pwm4-grp { 560 pinctrl_pwm4: pwm4-grp {
526 fsl,pins = < 561 fsl,pins = <
527 MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 562 MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79
563 MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4
528 >; 564 >;
529 }; 565 };
530 566
@@ -559,7 +595,7 @@
559 >; 595 >;
560 }; 596 };
561 597
562 pinctrl_usbotg2_reg: gpio-usbotg2-vbus { 598 pinctrl_usbh_reg: gpio-usbh-vbus {
563 fsl,pins = < 599 fsl,pins = <
564 MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ 600 MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */
565 >; 601 >;
@@ -576,6 +612,54 @@
576 >; 612 >;
577 }; 613 };
578 614
615 pinctrl_usdhc3: usdhc3grp {
616 fsl,pins = <
617 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
618 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
619 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
620 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
621 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
622 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
623 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
624 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
625 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
626 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
627 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
628 >;
629 };
630
631 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
632 fsl,pins = <
633 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
634 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
635 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
636 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
637 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
638 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
639 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
640 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
641 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
642 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
643 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
644 >;
645 };
646
647 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
648 fsl,pins = <
649 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
650 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
651 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
652 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
653 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
654 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
655 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
656 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
657 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
658 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
659 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
660 >;
661 };
662
579 pinctrl_sai1: sai1-grp { 663 pinctrl_sai1: sai1-grp {
580 fsl,pins = < 664 fsl,pins = <
581 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f 665 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
new file mode 100644
index 000000000000..8ee73c870b12
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
@@ -0,0 +1,19 @@
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright 2017 Toradex AG
4 */
5
6/dts-v1/;
7#include "imx7d-colibri-emmc.dtsi"
8#include "imx7-colibri-eval-v3.dtsi"
9
10/ {
11 model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3";
12 compatible = "toradex,colibri-imx7d-emmc-eval-v3",
13 "toradex,colibri-imx7d-emmc", "fsl,imx7d";
14};
15
16&usbotg2 {
17 vbus-supply = <&reg_usbh_vbus>;
18 status = "okay";
19};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
new file mode 100644
index 000000000000..9b63b9c89e4b
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
@@ -0,0 +1,21 @@
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright 2017 Toradex AG
4 */
5
6#include "imx7d.dtsi"
7#include "imx7-colibri.dtsi"
8
9/ {
10 memory {
11 reg = <0x80000000 0x40000000>;
12 };
13};
14
15&usbotg2 {
16 dr_mode = "host";
17};
18
19&usdhc3 {
20 status = "okay";
21};
diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
index a608a14d8c85..136e11ab4893 100644
--- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
@@ -48,20 +48,9 @@
48 model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3"; 48 model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3";
49 compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d", 49 compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d",
50 "fsl,imx7d"; 50 "fsl,imx7d";
51
52 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
53 compatible = "regulator-fixed";
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_usbotg2_reg>;
56 regulator-name = "VCC_USB[1-4]";
57 regulator-min-microvolt = <5000000>;
58 regulator-max-microvolt = <5000000>;
59 gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
60 vin-supply = <&reg_5v0>;
61 };
62}; 51};
63 52
64&usbotg2 { 53&usbotg2 {
65 vbus-supply = <&reg_usb_otg2_vbus>; 54 vbus-supply = <&reg_usbh_vbus>;
66 status = "okay"; 55 status = "okay";
67}; 56};
diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi
index 3c2cb502b388..6f2bb70c1fbd 100644
--- a/arch/arm/boot/dts/imx7d-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri.dtsi
@@ -49,6 +49,10 @@
49 }; 49 };
50}; 50};
51 51
52&gpmi {
53 status = "okay";
54};
55
52&usbotg2 { 56&usbotg2 {
53 dr_mode = "host"; 57 dr_mode = "host";
54}; 58};
diff --git a/arch/arm/boot/dts/imx7d-pico-pi.dts b/arch/arm/boot/dts/imx7d-pico-pi.dts
new file mode 100644
index 000000000000..ee02d931cf49
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
@@ -0,0 +1,181 @@
1/*
2 * Copyright 2017 NXP
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include "imx7d-pico.dtsi"
44
45/ {
46 sound {
47 compatible = "simple-audio-card";
48 simple-audio-card,name = "imx7-sgtl5000";
49 simple-audio-card,format = "i2s";
50 simple-audio-card,bitclock-master = <&dailink_master>;
51 simple-audio-card,frame-master = <&dailink_master>;
52 simple-audio-card,cpu {
53 sound-dai = <&sai1>;
54 };
55
56 dailink_master: simple-audio-card,codec {
57 sound-dai = <&codec>;
58 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
59 };
60 };
61};
62
63&fec1 {
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_enet1>;
66 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
67 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
68 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
69 assigned-clock-rates = <0>, <100000000>;
70 phy-mode = "rgmii";
71 phy-handle = <&ethphy0>;
72 fsl,magic-packet;
73 status = "okay";
74
75 mdio {
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 ethphy0: ethernet-phy@1 {
80 compatible = "ethernet-phy-ieee802.3-c22";
81 reg = <1>;
82 status = "okay";
83 };
84 };
85};
86
87&i2c1 {
88 clock-frequency = <100000>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_i2c1>;
91 status = "okay";
92
93 codec: sgtl5000@a {
94 #sound-dai-cells = <0>;
95 reg = <0x0a>;
96 compatible = "fsl,sgtl5000";
97 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
98 VDDA-supply = <&reg_2p5v>;
99 VDDIO-supply = <&reg_vref_1v8>;
100 };
101};
102
103
104&sai1 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_sai1>;
107 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
108 <&clks IMX7D_SAI1_ROOT_CLK>;
109 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
110 assigned-clock-rates = <0>, <24576000>;
111 status = "okay";
112};
113
114&uart5 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_uart5>;
117 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
118 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
119 status = "okay";
120};
121
122&usbotg1 {
123 vbus-supply = <&reg_usb_otg1_vbus>;
124 status = "okay";
125};
126
127&usbotg2 {
128 vbus-supply = <&reg_usb_otg2_vbus>;
129 dr_mode = "host";
130 status = "okay";
131};
132
133&iomuxc {
134 pinctrl_enet1: enet1grp {
135 fsl,pins = <
136 MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
137 MX7D_PAD_SD2_WP__ENET1_MDC 0x3
138 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
139 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
140 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
141 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
142 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
143 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
144 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
145 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
146 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
147 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
148 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
149 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
150 >;
151 };
152
153 pinctrl_i2c1: i2c1grp {
154 fsl,pins = <
155 MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f
156 MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f
157 >;
158 };
159
160 pinctrl_sai1: sai1grp {
161 fsl,pins = <
162 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
163 MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f
164 MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
165 MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f
166 >;
167 };
168
169 pinctrl_uart5: uart5grp {
170 fsl,pins = <
171 MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
172 MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
173 >;
174 };
175
176 pinctrl_usbotg1_pwr: usbotg_pwr {
177 fsl,pins = <
178 MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14
179 >;
180 };
181};
diff --git a/arch/arm/boot/dts/imx7d-pico.dts b/arch/arm/boot/dts/imx7d-pico.dtsi
index 508328b2a6bf..e307462a48ec 100644
--- a/arch/arm/boot/dts/imx7d-pico.dts
+++ b/arch/arm/boot/dts/imx7d-pico.dtsi
@@ -100,62 +100,6 @@
100 regulator-min-microvolt = <1800000>; 100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <1800000>; 101 regulator-max-microvolt = <1800000>;
102 }; 102 };
103
104 sound {
105 compatible = "simple-audio-card";
106 simple-audio-card,name = "imx7-sgtl5000";
107 simple-audio-card,format = "i2s";
108 simple-audio-card,bitclock-master = <&dailink_master>;
109 simple-audio-card,frame-master = <&dailink_master>;
110 simple-audio-card,cpu {
111 sound-dai = <&sai1>;
112 };
113
114 dailink_master: simple-audio-card,codec {
115 sound-dai = <&codec>;
116 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
117 };
118 };
119};
120
121&fec1 {
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_enet1>;
124 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
125 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
126 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
127 assigned-clock-rates = <0>, <100000000>;
128 phy-mode = "rgmii";
129 phy-handle = <&ethphy0>;
130 fsl,magic-packet;
131 status = "okay";
132
133 mdio {
134 #address-cells = <1>;
135 #size-cells = <0>;
136
137 ethphy0: ethernet-phy@1 {
138 compatible = "ethernet-phy-ieee802.3-c22";
139 reg = <1>;
140 status = "okay";
141 };
142 };
143};
144
145&i2c1 {
146 clock-frequency = <100000>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_i2c1>;
149 status = "okay";
150
151 codec: sgtl5000@a {
152 #sound-dai-cells = <0>;
153 reg = <0x0a>;
154 compatible = "fsl,sgtl5000";
155 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
156 VDDA-supply = <&reg_2p5v>;
157 VDDIO-supply = <&reg_vref_1v8>;
158 };
159}; 103};
160 104
161&i2c4 { 105&i2c4 {
@@ -253,35 +197,6 @@
253 }; 197 };
254}; 198};
255 199
256&sai1 {
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_sai1>;
259 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
260 <&clks IMX7D_SAI1_ROOT_CLK>;
261 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
262 assigned-clock-rates = <0>, <24576000>;
263 status = "okay";
264};
265
266&uart5 {
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_uart5>;
269 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
270 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
271 status = "okay";
272};
273
274&usbotg1 {
275 vbus-supply = <&reg_usb_otg1_vbus>;
276 status = "okay";
277};
278
279&usbotg2 {
280 vbus-supply = <&reg_usb_otg2_vbus>;
281 dr_mode = "host";
282 status = "okay";
283};
284
285&usdhc2 { /* Wifi SDIO */ 200&usdhc2 { /* Wifi SDIO */
286 pinctrl-names = "default"; 201 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_usdhc2>; 202 pinctrl-0 = <&pinctrl_usdhc2>;
@@ -315,32 +230,6 @@
315}; 230};
316 231
317&iomuxc { 232&iomuxc {
318 pinctrl_enet1: enet1grp {
319 fsl,pins = <
320 MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
321 MX7D_PAD_SD2_WP__ENET1_MDC 0x3
322 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
323 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
324 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
325 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
326 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
327 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
328 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
329 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
330 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
331 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
332 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
333 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
334 >;
335 };
336
337 pinctrl_i2c1: i2c1grp {
338 fsl,pins = <
339 MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f
340 MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f
341 >;
342 };
343
344 pinctrl_i2c4: i2c4grp { 233 pinctrl_i2c4: i2c4grp {
345 fsl,pins = < 234 fsl,pins = <
346 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f 235 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
@@ -354,28 +243,6 @@
354 >; 243 >;
355 }; 244 };
356 245
357 pinctrl_sai1: sai1grp {
358 fsl,pins = <
359 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
360 MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f
361 MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
362 MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f
363 >;
364 };
365
366 pinctrl_uart5: uart5grp {
367 fsl,pins = <
368 MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
369 MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
370 >;
371 };
372
373 pinctrl_usbotg1_pwr: usbotg_pwr {
374 fsl,pins = <
375 MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14
376 >;
377 };
378
379 pinctrl_usdhc2: usdhc2grp { 246 pinctrl_usdhc2: usdhc2grp {
380 fsl,pins = < 247 fsl,pins = <
381 MX7D_PAD_SD2_CMD__SD2_CMD 0x59 248 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 4d308d17f040..200714e3feea 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -63,6 +63,13 @@
63 }; 63 };
64 }; 64 };
65 65
66 usbphynop2: usbphynop2 {
67 compatible = "usb-nop-xceiv";
68 clocks = <&clks IMX7D_USB_PHY2_CLK>;
69 clock-names = "main_clk";
70 #phy-cells = <0>;
71 };
72
66 soc { 73 soc {
67 etm@3007d000 { 74 etm@3007d000 {
68 compatible = "arm,coresight-etm3x", "arm,primecell"; 75 compatible = "arm,coresight-etm3x", "arm,primecell";
@@ -105,18 +112,14 @@
105 reg = <0x30b20200 0x200>; 112 reg = <0x30b20200 0x200>;
106 }; 113 };
107 114
108 usbphynop2: usbphynop2 {
109 compatible = "usb-nop-xceiv";
110 clocks = <&clks IMX7D_USB_PHY2_CLK>;
111 clock-names = "main_clk";
112 };
113
114 fec2: ethernet@30bf0000 { 115 fec2: ethernet@30bf0000 {
115 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec"; 116 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
116 reg = <0x30bf0000 0x10000>; 117 reg = <0x30bf0000 0x10000>;
117 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 118 interrupt-names = "int0", "int1", "int2", "pps";
119 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
120 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
118 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 121 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
119 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 122 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
120 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, 123 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
121 <&clks IMX7D_ENET_AXI_ROOT_CLK>, 124 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
122 <&clks IMX7D_ENET2_TIME_ROOT_CLK>, 125 <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
@@ -129,7 +132,7 @@
129 status = "disabled"; 132 status = "disabled";
130 }; 133 };
131 134
132 pcie: pcie@0x33800000 { 135 pcie: pcie@33800000 {
133 compatible = "fsl,imx7d-pcie", "snps,dw-pcie"; 136 compatible = "fsl,imx7d-pcie", "snps,dw-pcie";
134 reg = <0x33800000 0x4000>, 137 reg = <0x33800000 0x4000>,
135 <0x4ff00000 0x80000>; 138 <0x4ff00000 0x80000>;
@@ -137,6 +140,7 @@
137 #address-cells = <3>; 140 #address-cells = <3>;
138 #size-cells = <2>; 141 #size-cells = <2>;
139 device_type = "pci"; 142 device_type = "pci";
143 bus-range = <0x00 0xff>;
140 ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */ 144 ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */
141 0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */ 145 0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
142 num-lanes = <1>; 146 num-lanes = <1>;
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 82ad26e766eb..9aa2bb998552 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -116,6 +116,66 @@
116 clock-output-names = "osc"; 116 clock-output-names = "osc";
117 }; 117 };
118 118
119 usbphynop1: usbphynop1 {
120 compatible = "usb-nop-xceiv";
121 clocks = <&clks IMX7D_USB_PHY1_CLK>;
122 clock-names = "main_clk";
123 #phy-cells = <0>;
124 };
125
126 usbphynop3: usbphynop3 {
127 compatible = "usb-nop-xceiv";
128 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
129 clock-names = "main_clk";
130 #phy-cells = <0>;
131 };
132
133
134 replicator {
135 /*
136 * non-configurable replicators don't show up on the
137 * AMBA bus. As such no need to add "arm,primecell"
138 */
139 compatible = "arm,coresight-replicator";
140
141 ports {
142 #address-cells = <1>;
143 #size-cells = <0>;
144 /* replicator output ports */
145 port@0 {
146 reg = <0>;
147 replicator_out_port0: endpoint {
148 remote-endpoint = <&tpiu_in_port>;
149 };
150 };
151
152 port@1 {
153 reg = <1>;
154 replicator_out_port1: endpoint {
155 remote-endpoint = <&etr_in_port>;
156 };
157 };
158
159 /* replicator input port */
160 port@2 {
161 reg = <0>;
162 replicator_in_port0: endpoint {
163 slave-mode;
164 remote-endpoint = <&etf_out_port>;
165 };
166 };
167 };
168 };
169
170 timer {
171 compatible = "arm,armv7-timer";
172 interrupt-parent = <&intc>;
173 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
174 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
175 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
176 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
177 };
178
119 soc { 179 soc {
120 #address-cells = <1>; 180 #address-cells = <1>;
121 #size-cells = <1>; 181 #size-cells = <1>;
@@ -260,43 +320,6 @@
260 }; 320 };
261 }; 321 };
262 322
263 replicator {
264 /*
265 * non-configurable replicators don't show up on the
266 * AMBA bus. As such no need to add "arm,primecell"
267 */
268 compatible = "arm,coresight-replicator";
269
270 ports {
271 #address-cells = <1>;
272 #size-cells = <0>;
273
274 /* replicator output ports */
275 port@0 {
276 reg = <0>;
277 replicator_out_port0: endpoint {
278 remote-endpoint = <&tpiu_in_port>;
279 };
280 };
281
282 port@1 {
283 reg = <1>;
284 replicator_out_port1: endpoint {
285 remote-endpoint = <&etr_in_port>;
286 };
287 };
288
289 /* replicator input port */
290 port@2 {
291 reg = <0>;
292 replicator_in_port0: endpoint {
293 slave-mode;
294 remote-endpoint = <&etf_out_port>;
295 };
296 };
297 };
298 };
299
300 intc: interrupt-controller@31001000 { 323 intc: interrupt-controller@31001000 {
301 compatible = "arm,cortex-a7-gic"; 324 compatible = "arm,cortex-a7-gic";
302 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 325 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -309,15 +332,6 @@
309 <0x31006000 0x2000>; 332 <0x31006000 0x2000>;
310 }; 333 };
311 334
312 timer {
313 compatible = "arm,armv7-timer";
314 interrupt-parent = <&intc>;
315 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
316 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
317 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
318 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
319 };
320
321 aips1: aips-bus@30000000 { 335 aips1: aips-bus@30000000 {
322 compatible = "fsl,aips-bus", "simple-bus"; 336 compatible = "fsl,aips-bus", "simple-bus";
323 #address-cells = <1>; 337 #address-cells = <1>;
@@ -508,8 +522,11 @@
508 reg = <0x30360000 0x10000>; 522 reg = <0x30360000 0x10000>;
509 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 523 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
510 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 524 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
525 #address-cells = <1>;
526 #size-cells = <0>;
511 527
512 reg_1p0d: regulator-vdd1p0d { 528 reg_1p0d: regulator-vdd1p0d@30360210 {
529 reg = <0x30360210>;
513 compatible = "fsl,anatop-regulator"; 530 compatible = "fsl,anatop-regulator";
514 regulator-name = "vdd1p0d"; 531 regulator-name = "vdd1p0d";
515 regulator-min-microvolt = <800000>; 532 regulator-min-microvolt = <800000>;
@@ -583,9 +600,9 @@
583 #address-cells = <1>; 600 #address-cells = <1>;
584 #size-cells = <0>; 601 #size-cells = <0>;
585 602
586 pgc_pcie_phy: pgc-power-domain@IMX7_POWER_DOMAIN_PCIE_PHY { 603 pgc_pcie_phy: pgc-power-domain@1 {
587 #power-domain-cells = <0>; 604 #power-domain-cells = <0>;
588 reg = <IMX7_POWER_DOMAIN_PCIE_PHY>; 605 reg = <1>;
589 power-supply = <&reg_1p0d>; 606 power-supply = <&reg_1p0d>;
590 }; 607 };
591 }; 608 };
@@ -945,18 +962,6 @@
945 reg = <0x30b30200 0x200>; 962 reg = <0x30b30200 0x200>;
946 }; 963 };
947 964
948 usbphynop1: usbphynop1 {
949 compatible = "usb-nop-xceiv";
950 clocks = <&clks IMX7D_USB_PHY1_CLK>;
951 clock-names = "main_clk";
952 };
953
954 usbphynop3: usbphynop3 {
955 compatible = "usb-nop-xceiv";
956 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
957 clock-names = "main_clk";
958 };
959
960 usdhc1: usdhc@30b40000 { 965 usdhc1: usdhc@30b40000 {
961 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; 966 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
962 reg = <0x30b40000 0x10000>; 967 reg = <0x30b40000 0x10000>;
@@ -1007,9 +1012,11 @@
1007 fec1: ethernet@30be0000 { 1012 fec1: ethernet@30be0000 {
1008 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec"; 1013 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1009 reg = <0x30be0000 0x10000>; 1014 reg = <0x30be0000 0x10000>;
1010 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 1015 interrupt-names = "int0", "int1", "int2", "pps";
1016 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
1011 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 1018 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1012 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1019 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1013 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, 1020 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1014 <&clks IMX7D_ENET_AXI_ROOT_CLK>, 1021 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1015 <&clks IMX7D_ENET1_TIME_ROOT_CLK>, 1022 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
diff --git a/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts b/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
new file mode 100644
index 000000000000..d01f64b252b1
--- /dev/null
+++ b/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
@@ -0,0 +1,241 @@
1/*
2 * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
3 *
4 * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com>
5 * Jimmy Chen (陳永達) <jimmy.chen@moxa.com>
6 * SZ Lin (林上智) <sz.lin@moxa.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/dts-v1/;
14
15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/input/input.h>
17#include "ls1021a.dtsi"
18
19/ {
20 model = "Moxa UC-8410A";
21
22 aliases {
23 enet0_rgmii_phy = &rgmii_phy0;
24 enet1_rgmii_phy = &rgmii_phy1;
25 enet2_rgmii_phy = &rgmii_phy2;
26 };
27
28 sys_mclk: clock-mclk {
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <24576000>;
32 };
33
34 reg_3p3v: regulator-3p3v {
35 compatible = "regulator-fixed";
36 regulator-name = "3P3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 regulator-always-on;
40 };
41
42 leds {
43 compatible = "gpio-leds";
44
45 cel-pwr {
46 label = "UC8410A:CEL-PWR";
47 gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
48 default-state = "off";
49 };
50
51 cel-reset {
52 label = "UC8410A:CEL-RESET";
53 gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
54 default-state = "off";
55 };
56
57 str-led {
58 label = "UC8410A:RED:PROG";
59 gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
60 linux,default-trigger = "mmc0";
61 };
62
63 sw-ready {
64 label = "UC8410A:GREEN:SWRDY";
65 gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
66 default-state = "on";
67 };
68
69 beeper {
70 label = "UC8410A:BEEP";
71 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
72 default-state = "off";
73 };
74
75 prog-led0 {
76 label = "UC8410A:GREEN:PROG2";
77 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
78 default-state = "off";
79 };
80
81 prog-led1 {
82 label = "UC8410A:GREEN:PROG1";
83 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
84 default-state = "off";
85 };
86
87 prog-led2 {
88 label = "UC8410A:GREEN:PROG0";
89 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
90 default-state = "off";
91 };
92
93 wifi-signal0 {
94 label = "UC8410A:GREEN:CEL2";
95 gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
96 default-state = "off";
97 };
98
99 wifi-signal1 {
100 label = "UC8410A:GREEN:CEL1";
101 gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
102 default-state = "off";
103 };
104
105 wifi-signal2 {
106 label = "UC8410A:GREEN:CEL0";
107 gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
108 default-state = "off";
109 };
110
111 cpu-diag-red {
112 label = "UC8410A:RED:DIA";
113 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
114 default-state = "off";
115 };
116
117 cpu-diag-green {
118 label = "UC8410A:GREEN:DIA";
119 gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
120 default-state = "off";
121 };
122
123 cpu-diag-yellow {
124 label = "UC8410A:YELLOW:DIA";
125 gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
126 default-state = "off";
127 };
128 };
129
130 gpio-keys {
131 compatible = "gpio-keys";
132
133 pushbtn-key {
134 label = "push button key";
135 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
136 linux,code = <BTN_MISC>;
137 default-state = "on";
138 };
139 };
140};
141
142&enet0 {
143 phy-handle = <&rgmii_phy0>;
144 phy-connection-type = "rgmii-id";
145 status = "okay";
146};
147
148&enet1 {
149 phy-handle = <&rgmii_phy1>;
150 phy-connection-type = "rgmii-id";
151 status = "okay";
152};
153
154&enet2 {
155 phy-handle = <&rgmii_phy2>;
156 phy-connection-type = "rgmii-id";
157 status = "okay";
158};
159
160&i2c0 {
161 clock-frequency = <100000>;
162 status = "okay";
163
164 tpm@20 {
165 compatible = "infineon,slb9635tt";
166 reg = <0x20>;
167 };
168
169 rtc@68 {
170 compatible = "dallas,ds1374";
171 reg = <0x68>;
172 };
173};
174
175&lpuart0 {
176 status = "okay";
177};
178
179&mdio0 {
180 rgmii_phy0: ethernet-phy@0 {
181 compatible = "marvell,88e1118";
182 reg = <0x0>;
183 marvell,reg-init =
184 <3 0x11 0 0x4415>, /* Reg 3,17 */
185 <3 0x10 0 0x77>; /* Reg 3,16 */
186 };
187
188 rgmii_phy1: ethernet-phy@1 {
189 compatible = "marvell,88e1118";
190 reg = <0x1>;
191 marvell,reg-init =
192 <3 0x11 0 0x4415>, /* Reg 3,17 */
193 <3 0x10 0 0x77>; /* Reg 3,16 */
194 };
195
196 rgmii_phy2: ethernet-phy@2 {
197 compatible = "marvell,88e1118";
198 reg = <0x2>;
199 marvell,reg-init =
200 <3 0x11 0 0x4415>, /* Reg 3,17 */
201 <3 0x10 0 0x77>; /* Reg 3,16 */
202 };
203};
204
205&qspi {
206 bus-num = <0>;
207 fsl,spi-num-chipselects = <2>;
208 fsl,spi-flash-chipselects = <0>;
209 fsl,qspi-has-second-chip;
210 status = "okay";
211
212 flash: flash@0 {
213 compatible = "spansion,s25fl064l", "spansion,s25fl164k";
214 #address-cells = <1>;
215 #size-cells = <1>;
216 spi-max-frequency = <20000000>;
217 reg = <0>;
218
219 partitions@0 {
220 label = "U-Boot";
221 reg = <0x0 0x180000>;
222 };
223
224 partitions@180000 {
225 label = "U-Boot Env";
226 reg = <0x180000 0x680000>;
227 };
228 };
229};
230
231&sata {
232 status = "okay";
233};
234
235&uart0 {
236 status = "okay";
237};
238
239&uart1 {
240 status = "okay";
241};
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
index 940875316d0f..bf15dc27ca53 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -215,7 +215,7 @@
215 reg = <0x2a>; 215 reg = <0x2a>;
216 VDDA-supply = <&reg_3p3v>; 216 VDDA-supply = <&reg_3p3v>;
217 VDDIO-supply = <&reg_3p3v>; 217 VDDIO-supply = <&reg_3p3v>;
218 clocks = <&sys_mclk 1>; 218 clocks = <&sys_mclk>;
219 }; 219 };
220 }; 220 };
221 }; 221 };
@@ -239,6 +239,11 @@
239 device-width = <1>; 239 device-width = <1>;
240 }; 240 };
241 241
242 nand@2,0 {
243 compatible = "fsl,ifc-nand";
244 reg = <0x2 0x0 0x10000>;
245 };
246
242 fpga: board-control@3,0 { 247 fpga: board-control@3,0 {
243 #address-cells = <1>; 248 #address-cells = <1>;
244 #size-cells = <1>; 249 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index a8b148ad1dd2..b186c370ad54 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -187,7 +187,7 @@
187 reg = <0x0a>; 187 reg = <0x0a>;
188 VDDA-supply = <&reg_3p3v>; 188 VDDA-supply = <&reg_3p3v>;
189 VDDIO-supply = <&reg_3p3v>; 189 VDDIO-supply = <&reg_3p3v>;
190 clocks = <&sys_mclk 1>; 190 clocks = <&sys_mclk>;
191 }; 191 };
192}; 192};
193 193
@@ -228,6 +228,10 @@
228 }; 228 };
229}; 229};
230 230
231&esdhc {
232 status = "okay";
233};
234
231&sai1 { 235&sai1 {
232 status = "okay"; 236 status = "okay";
233}; 237};
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 9319e1f0f1d8..c5edfa9a68a6 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -106,6 +106,14 @@
106 compatible = "arm,cortex-a7-pmu"; 106 compatible = "arm,cortex-a7-pmu";
107 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 107 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
108 <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 108 <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
109 interrupt-affinity = <&cpu0>, <&cpu1>;
110 };
111
112 reboot {
113 compatible = "syscon-reboot";
114 regmap = <&dcfg>;
115 offset = <0xb0>;
116 mask = <0x02>;
109 }; 117 };
110 118
111 soc { 119 soc {
@@ -154,8 +162,22 @@
154 big-endian; 162 big-endian;
155 }; 163 };
156 164
165 qspi: quadspi@1550000 {
166 compatible = "fsl,ls1021a-qspi";
167 #address-cells = <1>;
168 #size-cells = <0>;
169 reg = <0x0 0x1550000 0x0 0x10000>,
170 <0x0 0x40000000 0x0 0x40000000>;
171 reg-names = "QuadSPI", "QuadSPI-memory";
172 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
173 clock-names = "qspi_en", "qspi";
174 clocks = <&clockgen 4 1>, <&clockgen 4 1>;
175 big-endian;
176 status = "disabled";
177 };
178
157 esdhc: esdhc@1560000 { 179 esdhc: esdhc@1560000 {
158 compatible = "fsl,esdhc"; 180 compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
159 reg = <0x0 0x1560000 0x0 0x10000>; 181 reg = <0x0 0x1560000 0x0 0x10000>;
160 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 182 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
161 clock-frequency = <0>; 183 clock-frequency = <0>;
@@ -575,7 +597,7 @@
575 fsl,tclk-period = <5>; 597 fsl,tclk-period = <5>;
576 fsl,tmr-prsc = <2>; 598 fsl,tmr-prsc = <2>;
577 fsl,tmr-add = <0xaaaaaaab>; 599 fsl,tmr-add = <0xaaaaaaab>;
578 fsl,tmr-fiper1 = <999999990>; 600 fsl,tmr-fiper1 = <999999995>;
579 fsl,tmr-fiper2 = <99990>; 601 fsl,tmr-fiper2 = <99990>;
580 fsl,max-adj = <499999999>; 602 fsl,max-adj = <499999999>;
581 }; 603 };
@@ -668,7 +690,7 @@
668 }; 690 };
669 }; 691 };
670 692
671 usb@8600000 { 693 usb2: usb@8600000 {
672 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; 694 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
673 reg = <0x0 0x8600000 0x0 0x1000>; 695 reg = <0x0 0x8600000 0x0 0x1000>;
674 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 696 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
@@ -676,7 +698,7 @@
676 phy_type = "ulpi"; 698 phy_type = "ulpi";
677 }; 699 };
678 700
679 usb3@3100000 { 701 usb3: usb3@3100000 {
680 compatible = "snps,dwc3"; 702 compatible = "snps,dwc3";
681 reg = <0x0 0x3100000 0x0 0x10000>; 703 reg = <0x0 0x3100000 0x0 0x10000>;
682 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 704 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
index 091b738041a0..d8b2972527eb 100644
--- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
@@ -140,7 +140,7 @@
140 140
141 /* M41T0M6 real time clock on carrier board */ 141 /* M41T0M6 real time clock on carrier board */
142 rtc: m41t0m6@68 { 142 rtc: m41t0m6@68 {
143 compatible = "st,m41t00"; 143 compatible = "st,m41t0";
144 reg = <0x68>; 144 reg = <0x68>;
145 }; 145 };
146}; 146};
diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi
index 3d9896171bfc..348bcd30c0f7 100644
--- a/arch/arm/boot/dts/vf500.dtsi
+++ b/arch/arm/boot/dts/vf500.dtsi
@@ -58,7 +58,7 @@
58 soc { 58 soc {
59 aips-bus@40000000 { 59 aips-bus@40000000 {
60 60
61 intc: interrupt-controller@40002000 { 61 intc: interrupt-controller@40003000 {
62 compatible = "arm,cortex-a9-gic"; 62 compatible = "arm,cortex-a9-gic";
63 #interrupt-cells = <3>; 63 #interrupt-cells = <3>;
64 interrupt-controller; 64 interrupt-controller;
diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
index acdf12ad0622..782b69a3acdf 100644
--- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
@@ -255,16 +255,19 @@
255 port@0 { 255 port@0 {
256 reg = <0>; 256 reg = <0>;
257 label = "lan6"; 257 label = "lan6";
258 phy-handle = <&switch2phy0>;
258 }; 259 };
259 260
260 port@1 { 261 port@1 {
261 reg = <1>; 262 reg = <1>;
262 label = "lan7"; 263 label = "lan7";
264 phy-handle = <&switch2phy1>;
263 }; 265 };
264 266
265 port@2 { 267 port@2 {
266 reg = <2>; 268 reg = <2>;
267 label = "lan8"; 269 label = "lan8";
270 phy-handle = <&switch2phy2>;
268 }; 271 };
269 272
270 port@3 { 273 port@3 {
@@ -304,6 +307,20 @@
304 }; 307 };
305 }; 308 };
306 }; 309 };
310 mdio {
311 #address-cells = <1>;
312 #size-cells = <0>;
313
314 switch2phy0: phy@0 {
315 reg = <0>;
316 };
317 switch2phy1: phy@1 {
318 reg = <1>;
319 };
320 switch2phy2: phy@2 {
321 reg = <2>;
322 };
323 };
307 }; 324 };
308 }; 325 };
309 326
@@ -371,7 +388,8 @@
371 reg = <0x22>; 388 reg = <0x22>;
372 gpio-controller; 389 gpio-controller;
373 #gpio-cells = <2>; 390 #gpio-cells = <2>;
374 interrupt-parent = <&gpio2>; 391 interrupt-controller;
392 interrupt-parent = <&gpio3>;
375 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 393 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
376 }; 394 };
377}; 395};
diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
index 4b8edc8982cf..c6f134c78303 100644
--- a/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
@@ -73,7 +73,7 @@
73 #size-cells = <0>; 73 #size-cells = <0>;
74 reg = <0>; 74 reg = <0>;
75 dsa,member = <0 0>; 75 dsa,member = <0 0>;
76 eeprom-length = <512>; 76 eeprom-length = <65536>;
77 interrupt-parent = <&gpio0>; 77 interrupt-parent = <&gpio0>;
78 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 78 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
79 interrupt-controller; 79 interrupt-controller;
@@ -170,7 +170,7 @@
170 #size-cells = <0>; 170 #size-cells = <0>;
171 reg = <0>; 171 reg = <0>;
172 dsa,member = <0 1>; 172 dsa,member = <0 1>;
173 eeprom-length = <512>; 173 eeprom-length = <65536>;
174 interrupt-parent = <&gpio0>; 174 interrupt-parent = <&gpio0>;
175 interrupts = <26 IRQ_TYPE_LEVEL_LOW>; 175 interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
176 interrupt-controller; 176 interrupt-controller;
diff --git a/arch/arm/boot/dts/vf610-zii-dev.dtsi b/arch/arm/boot/dts/vf610-zii-dev.dtsi
index 6b58d3a97992..aadd36db0092 100644
--- a/arch/arm/boot/dts/vf610-zii-dev.dtsi
+++ b/arch/arm/boot/dts/vf610-zii-dev.dtsi
@@ -96,6 +96,10 @@
96 status = "okay"; 96 status = "okay";
97}; 97};
98 98
99&edma1 {
100 status = "okay";
101};
102
99&esdhc1 { 103&esdhc1 {
100 pinctrl-names = "default"; 104 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_esdhc1>; 105 pinctrl-0 = <&pinctrl_esdhc1>;
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 5d654b5b4ce6..c3f09b737924 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -84,6 +84,11 @@
84 mask = <0x1000>; 84 mask = <0x1000>;
85 }; 85 };
86 86
87 iio-hwmon {
88 compatible = "iio-hwmon";
89 io-channels = <&adc0 16>, <&adc1 16>;
90 };
91
87 soc { 92 soc {
88 #address-cells = <1>; 93 #address-cells = <1>;
89 #size-cells = <1>; 94 #size-cells = <1>;
@@ -762,10 +767,5 @@
762 status = "disabled"; 767 status = "disabled";
763 }; 768 };
764 }; 769 };
765
766 iio-hwmon {
767 compatible = "iio-hwmon";
768 io-channels = <&adc0 16>, <&adc1 16>;
769 };
770 }; 770 };
771}; 771};