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authorMichal Simek <michal.simek@xilinx.com>2016-08-09 09:13:02 -0400
committerMichal Simek <michal.simek@xilinx.com>2016-08-19 06:29:10 -0400
commit78b83b8cb34f610bc88abe5699426833664f4597 (patch)
tree3e7166a0a7ba44f67a4e5797ded153ffaab53055
parent7393fd869119e39184fe519ed8b1e61346662032 (diff)
ARM64: zynqmp: Add PCIe node
Add PCIe node with prefetchable memory which goes beyond 4GB. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp.dtsi39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index d24014765111..fbdd6ab98988 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -193,6 +193,45 @@
193 #size-cells = <0>; 193 #size-cells = <0>;
194 }; 194 };
195 195
196 pcie: pcie@fd0e0000 {
197 compatible = "xlnx,nwl-pcie-2.11";
198 status = "disabled";
199 #address-cells = <3>;
200 #size-cells = <2>;
201 #interrupt-cells = <1>;
202 msi-controller;
203 device_type = "pci";
204 interrupt-parent = <&gic>;
205 interrupts = <0 118 4>,
206 <0 117 4>,
207 <0 116 4>,
208 <0 115 4>, /* MSI_1 [63...32] */
209 <0 114 4>; /* MSI_0 [31...0] */
210 interrupt-names = "misc", "dummy", "intx",
211 "msi1", "msi0";
212 msi-parent = <&pcie>;
213 reg = <0x0 0xfd0e0000 0x0 0x1000>,
214 <0x0 0xfd480000 0x0 0x1000>,
215 <0x80 0x00000000 0x0 0x1000000>;
216 reg-names = "breg", "pcireg", "cfg";
217 ranges = <0x02000000 0x00000000 0xe0000000 0x00000000
218 0xe0000000 0x00000000 0x10000000
219 /* non-prefetchable memory */
220 0x43000000 0x00000006 0x00000000 0x00000006
221 0x00000000 0x00000002 0x00000000>;
222 /* prefetchable memory */
223 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
224 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
225 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
226 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
227 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
228 pcie_intc: legacy-interrupt-controller {
229 interrupt-controller;
230 #address-cells = <0>;
231 #interrupt-cells = <1>;
232 };
233 };
234
196 sata: ahci@fd0c0000 { 235 sata: ahci@fd0c0000 {
197 compatible = "ceva,ahci-1v84"; 236 compatible = "ceva,ahci-1v84";
198 status = "disabled"; 237 status = "disabled";