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authorMichal Simek <michal.simek@xilinx.com>2016-02-11 07:26:28 -0500
committerMichal Simek <michal.simek@xilinx.com>2016-08-19 06:29:00 -0400
commit7393fd869119e39184fe519ed8b1e61346662032 (patch)
tree9319713b5322c7612937b9cfbb7cab024855aefc
parente753dc03593a649525cd5683a1270e58a2fec170 (diff)
ARM64: zynqmp: Use 64bit size cell format
Use 64bit size cell format instead of 32bit for memory description. Change 64bit sizes also for all others IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts2
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp.dtsi54
2 files changed, 28 insertions, 28 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
index acb0527fdc4a..358089687a69 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
@@ -29,7 +29,7 @@
29 29
30 memory { 30 memory {
31 device_type = "memory"; 31 device_type = "memory";
32 reg = <0x0 0x0 0x40000000>; 32 reg = <0x0 0x0 0x0 0x40000000>;
33 }; 33 };
34}; 34};
35 35
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 38c43103d610..d24014765111 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -14,7 +14,7 @@
14/ { 14/ {
15 compatible = "xlnx,zynqmp"; 15 compatible = "xlnx,zynqmp";
16 #address-cells = <2>; 16 #address-cells = <2>;
17 #size-cells = <1>; 17 #size-cells = <2>;
18 18
19 cpus { 19 cpus {
20 #address-cells = <1>; 20 #address-cells = <1>;
@@ -75,7 +75,7 @@
75 compatible = "simple-bus"; 75 compatible = "simple-bus";
76 #address-cells = <2>; 76 #address-cells = <2>;
77 #size-cells = <1>; 77 #size-cells = <1>;
78 ranges; 78 ranges = <0 0 0 0 0xffffffff>;
79 79
80 gic: interrupt-controller@f9010000 { 80 gic: interrupt-controller@f9010000 {
81 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 81 compatible = "arm,gic-400", "arm,cortex-a15-gic";
@@ -93,14 +93,14 @@
93 amba: amba { 93 amba: amba {
94 compatible = "simple-bus"; 94 compatible = "simple-bus";
95 #address-cells = <2>; 95 #address-cells = <2>;
96 #size-cells = <1>; 96 #size-cells = <2>;
97 ranges; 97 ranges;
98 98
99 can0: can@ff060000 { 99 can0: can@ff060000 {
100 compatible = "xlnx,zynq-can-1.0"; 100 compatible = "xlnx,zynq-can-1.0";
101 status = "disabled"; 101 status = "disabled";
102 clock-names = "can_clk", "pclk"; 102 clock-names = "can_clk", "pclk";
103 reg = <0x0 0xff060000 0x1000>; 103 reg = <0x0 0xff060000 0x0 0x1000>;
104 interrupts = <0 23 4>; 104 interrupts = <0 23 4>;
105 interrupt-parent = <&gic>; 105 interrupt-parent = <&gic>;
106 tx-fifo-depth = <0x40>; 106 tx-fifo-depth = <0x40>;
@@ -111,7 +111,7 @@
111 compatible = "xlnx,zynq-can-1.0"; 111 compatible = "xlnx,zynq-can-1.0";
112 status = "disabled"; 112 status = "disabled";
113 clock-names = "can_clk", "pclk"; 113 clock-names = "can_clk", "pclk";
114 reg = <0x0 0xff070000 0x1000>; 114 reg = <0x0 0xff070000 0x0 0x1000>;
115 interrupts = <0 24 4>; 115 interrupts = <0 24 4>;
116 interrupt-parent = <&gic>; 116 interrupt-parent = <&gic>;
117 tx-fifo-depth = <0x40>; 117 tx-fifo-depth = <0x40>;
@@ -123,7 +123,7 @@
123 status = "disabled"; 123 status = "disabled";
124 interrupt-parent = <&gic>; 124 interrupt-parent = <&gic>;
125 interrupts = <0 57 4>, <0 57 4>; 125 interrupts = <0 57 4>, <0 57 4>;
126 reg = <0x0 0xff0b0000 0x1000>; 126 reg = <0x0 0xff0b0000 0x0 0x1000>;
127 clock-names = "pclk", "hclk", "tx_clk"; 127 clock-names = "pclk", "hclk", "tx_clk";
128 #address-cells = <1>; 128 #address-cells = <1>;
129 #size-cells = <0>; 129 #size-cells = <0>;
@@ -134,7 +134,7 @@
134 status = "disabled"; 134 status = "disabled";
135 interrupt-parent = <&gic>; 135 interrupt-parent = <&gic>;
136 interrupts = <0 59 4>, <0 59 4>; 136 interrupts = <0 59 4>, <0 59 4>;
137 reg = <0x0 0xff0c0000 0x1000>; 137 reg = <0x0 0xff0c0000 0x0 0x1000>;
138 clock-names = "pclk", "hclk", "tx_clk"; 138 clock-names = "pclk", "hclk", "tx_clk";
139 #address-cells = <1>; 139 #address-cells = <1>;
140 #size-cells = <0>; 140 #size-cells = <0>;
@@ -145,7 +145,7 @@
145 status = "disabled"; 145 status = "disabled";
146 interrupt-parent = <&gic>; 146 interrupt-parent = <&gic>;
147 interrupts = <0 61 4>, <0 61 4>; 147 interrupts = <0 61 4>, <0 61 4>;
148 reg = <0x0 0xff0d0000 0x1000>; 148 reg = <0x0 0xff0d0000 0x0 0x1000>;
149 clock-names = "pclk", "hclk", "tx_clk"; 149 clock-names = "pclk", "hclk", "tx_clk";
150 #address-cells = <1>; 150 #address-cells = <1>;
151 #size-cells = <0>; 151 #size-cells = <0>;
@@ -156,7 +156,7 @@
156 status = "disabled"; 156 status = "disabled";
157 interrupt-parent = <&gic>; 157 interrupt-parent = <&gic>;
158 interrupts = <0 63 4>, <0 63 4>; 158 interrupts = <0 63 4>, <0 63 4>;
159 reg = <0x0 0xff0e0000 0x1000>; 159 reg = <0x0 0xff0e0000 0x0 0x1000>;
160 clock-names = "pclk", "hclk", "tx_clk"; 160 clock-names = "pclk", "hclk", "tx_clk";
161 #address-cells = <1>; 161 #address-cells = <1>;
162 #size-cells = <0>; 162 #size-cells = <0>;
@@ -170,7 +170,7 @@
170 interrupts = <0 16 4>; 170 interrupts = <0 16 4>;
171 interrupt-controller; 171 interrupt-controller;
172 #interrupt-cells = <2>; 172 #interrupt-cells = <2>;
173 reg = <0x0 0xff0a0000 0x1000>; 173 reg = <0x0 0xff0a0000 0x0 0x1000>;
174 }; 174 };
175 175
176 i2c0: i2c@ff020000 { 176 i2c0: i2c@ff020000 {
@@ -178,7 +178,7 @@
178 status = "disabled"; 178 status = "disabled";
179 interrupt-parent = <&gic>; 179 interrupt-parent = <&gic>;
180 interrupts = <0 17 4>; 180 interrupts = <0 17 4>;
181 reg = <0x0 0xff020000 0x1000>; 181 reg = <0x0 0xff020000 0x0 0x1000>;
182 #address-cells = <1>; 182 #address-cells = <1>;
183 #size-cells = <0>; 183 #size-cells = <0>;
184 }; 184 };
@@ -188,7 +188,7 @@
188 status = "disabled"; 188 status = "disabled";
189 interrupt-parent = <&gic>; 189 interrupt-parent = <&gic>;
190 interrupts = <0 18 4>; 190 interrupts = <0 18 4>;
191 reg = <0x0 0xff030000 0x1000>; 191 reg = <0x0 0xff030000 0x0 0x1000>;
192 #address-cells = <1>; 192 #address-cells = <1>;
193 #size-cells = <0>; 193 #size-cells = <0>;
194 }; 194 };
@@ -196,7 +196,7 @@
196 sata: ahci@fd0c0000 { 196 sata: ahci@fd0c0000 {
197 compatible = "ceva,ahci-1v84"; 197 compatible = "ceva,ahci-1v84";
198 status = "disabled"; 198 status = "disabled";
199 reg = <0x0 0xfd0c0000 0x2000>; 199 reg = <0x0 0xfd0c0000 0x0 0x2000>;
200 interrupt-parent = <&gic>; 200 interrupt-parent = <&gic>;
201 interrupts = <0 133 4>; 201 interrupts = <0 133 4>;
202 }; 202 };
@@ -206,7 +206,7 @@
206 status = "disabled"; 206 status = "disabled";
207 interrupt-parent = <&gic>; 207 interrupt-parent = <&gic>;
208 interrupts = <0 48 4>; 208 interrupts = <0 48 4>;
209 reg = <0x0 0xff160000 0x1000>; 209 reg = <0x0 0xff160000 0x0 0x1000>;
210 clock-names = "clk_xin", "clk_ahb"; 210 clock-names = "clk_xin", "clk_ahb";
211 }; 211 };
212 212
@@ -215,13 +215,13 @@
215 status = "disabled"; 215 status = "disabled";
216 interrupt-parent = <&gic>; 216 interrupt-parent = <&gic>;
217 interrupts = <0 49 4>; 217 interrupts = <0 49 4>;
218 reg = <0x0 0xff170000 0x1000>; 218 reg = <0x0 0xff170000 0x0 0x1000>;
219 clock-names = "clk_xin", "clk_ahb"; 219 clock-names = "clk_xin", "clk_ahb";
220 }; 220 };
221 221
222 smmu: smmu@fd800000 { 222 smmu: smmu@fd800000 {
223 compatible = "arm,mmu-500"; 223 compatible = "arm,mmu-500";
224 reg = <0x0 0xfd800000 0x20000>; 224 reg = <0x0 0xfd800000 0x0 0x20000>;
225 #global-interrupts = <1>; 225 #global-interrupts = <1>;
226 interrupt-parent = <&gic>; 226 interrupt-parent = <&gic>;
227 interrupts = <0 157 4>, 227 interrupts = <0 157 4>,
@@ -236,7 +236,7 @@
236 status = "disabled"; 236 status = "disabled";
237 interrupt-parent = <&gic>; 237 interrupt-parent = <&gic>;
238 interrupts = <0 19 4>; 238 interrupts = <0 19 4>;
239 reg = <0x0 0xff040000 0x1000>; 239 reg = <0x0 0xff040000 0x0 0x1000>;
240 clock-names = "ref_clk", "pclk"; 240 clock-names = "ref_clk", "pclk";
241 #address-cells = <1>; 241 #address-cells = <1>;
242 #size-cells = <0>; 242 #size-cells = <0>;
@@ -247,7 +247,7 @@
247 status = "disabled"; 247 status = "disabled";
248 interrupt-parent = <&gic>; 248 interrupt-parent = <&gic>;
249 interrupts = <0 20 4>; 249 interrupts = <0 20 4>;
250 reg = <0x0 0xff050000 0x1000>; 250 reg = <0x0 0xff050000 0x0 0x1000>;
251 clock-names = "ref_clk", "pclk"; 251 clock-names = "ref_clk", "pclk";
252 #address-cells = <1>; 252 #address-cells = <1>;
253 #size-cells = <0>; 253 #size-cells = <0>;
@@ -258,7 +258,7 @@
258 status = "disabled"; 258 status = "disabled";
259 interrupt-parent = <&gic>; 259 interrupt-parent = <&gic>;
260 interrupts = <0 36 4>, <0 37 4>, <0 38 4>; 260 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
261 reg = <0x0 0xff110000 0x1000>; 261 reg = <0x0 0xff110000 0x0 0x1000>;
262 timer-width = <32>; 262 timer-width = <32>;
263 }; 263 };
264 264
@@ -267,7 +267,7 @@
267 status = "disabled"; 267 status = "disabled";
268 interrupt-parent = <&gic>; 268 interrupt-parent = <&gic>;
269 interrupts = <0 39 4>, <0 40 4>, <0 41 4>; 269 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
270 reg = <0x0 0xff120000 0x1000>; 270 reg = <0x0 0xff120000 0x0 0x1000>;
271 timer-width = <32>; 271 timer-width = <32>;
272 }; 272 };
273 273
@@ -276,7 +276,7 @@
276 status = "disabled"; 276 status = "disabled";
277 interrupt-parent = <&gic>; 277 interrupt-parent = <&gic>;
278 interrupts = <0 42 4>, <0 43 4>, <0 44 4>; 278 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
279 reg = <0x0 0xff130000 0x1000>; 279 reg = <0x0 0xff130000 0x0 0x1000>;
280 timer-width = <32>; 280 timer-width = <32>;
281 }; 281 };
282 282
@@ -285,7 +285,7 @@
285 status = "disabled"; 285 status = "disabled";
286 interrupt-parent = <&gic>; 286 interrupt-parent = <&gic>;
287 interrupts = <0 45 4>, <0 46 4>, <0 47 4>; 287 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
288 reg = <0x0 0xff140000 0x1000>; 288 reg = <0x0 0xff140000 0x0 0x1000>;
289 timer-width = <32>; 289 timer-width = <32>;
290 }; 290 };
291 291
@@ -294,7 +294,7 @@
294 status = "disabled"; 294 status = "disabled";
295 interrupt-parent = <&gic>; 295 interrupt-parent = <&gic>;
296 interrupts = <0 21 4>; 296 interrupts = <0 21 4>;
297 reg = <0x0 0xff000000 0x1000>; 297 reg = <0x0 0xff000000 0x0 0x1000>;
298 clock-names = "uart_clk", "pclk"; 298 clock-names = "uart_clk", "pclk";
299 }; 299 };
300 300
@@ -303,7 +303,7 @@
303 status = "disabled"; 303 status = "disabled";
304 interrupt-parent = <&gic>; 304 interrupt-parent = <&gic>;
305 interrupts = <0 22 4>; 305 interrupts = <0 22 4>;
306 reg = <0x0 0xff010000 0x1000>; 306 reg = <0x0 0xff010000 0x0 0x1000>;
307 clock-names = "uart_clk", "pclk"; 307 clock-names = "uart_clk", "pclk";
308 }; 308 };
309 309
@@ -312,7 +312,7 @@
312 status = "disabled"; 312 status = "disabled";
313 interrupt-parent = <&gic>; 313 interrupt-parent = <&gic>;
314 interrupts = <0 65 4>; 314 interrupts = <0 65 4>;
315 reg = <0x0 0xfe200000 0x40000>; 315 reg = <0x0 0xfe200000 0x0 0x40000>;
316 clock-names = "clk_xin", "clk_ahb"; 316 clock-names = "clk_xin", "clk_ahb";
317 }; 317 };
318 318
@@ -321,7 +321,7 @@
321 status = "disabled"; 321 status = "disabled";
322 interrupt-parent = <&gic>; 322 interrupt-parent = <&gic>;
323 interrupts = <0 70 4>; 323 interrupts = <0 70 4>;
324 reg = <0x0 0xfe300000 0x40000>; 324 reg = <0x0 0xfe300000 0x0 0x40000>;
325 clock-names = "clk_xin", "clk_ahb"; 325 clock-names = "clk_xin", "clk_ahb";
326 }; 326 };
327 327
@@ -330,7 +330,7 @@
330 status = "disabled"; 330 status = "disabled";
331 interrupt-parent = <&gic>; 331 interrupt-parent = <&gic>;
332 interrupts = <0 52 1>; 332 interrupts = <0 52 1>;
333 reg = <0x0 0xfd4d0000 0x1000>; 333 reg = <0x0 0xfd4d0000 0x0 0x1000>;
334 timeout-sec = <10>; 334 timeout-sec = <10>;
335 }; 335 };
336 }; 336 };
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-25 14:19:47 -0400