diff options
author | Marc Zyngier <marc.zyngier@arm.com> | 2015-06-01 05:47:40 -0400 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-06-05 05:38:53 -0400 |
commit | 7616fc8bcd7ef4975a294337d6cd3007b8c18746 (patch) | |
tree | e68b756ae0e477bbdc8ea64daedaa5f11ca7cee4 | |
parent | b0dd9c02d476162340ad60fc96befa817fa8fe9f (diff) |
arm64: alternative: Allow immediate branch as alternative instruction
Since all branches are PC-relative on AArch64, these instructions
cannot be used as an alternative with the simplistic approach
we currently have (the immediate has been computed from
the .altinstr_replacement section, and end-up being completely off
if the target is outside of the replacement sequence).
This patch handles the branch instructions in a different way,
using the insn framework to recompute the immediate, and generate
the right displacement in the above case.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r-- | arch/arm64/kernel/alternative.c | 71 |
1 files changed, 66 insertions, 5 deletions
diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c index 28f8365edc4c..221b98312f0c 100644 --- a/arch/arm64/kernel/alternative.c +++ b/arch/arm64/kernel/alternative.c | |||
@@ -24,8 +24,13 @@ | |||
24 | #include <asm/cacheflush.h> | 24 | #include <asm/cacheflush.h> |
25 | #include <asm/alternative.h> | 25 | #include <asm/alternative.h> |
26 | #include <asm/cpufeature.h> | 26 | #include <asm/cpufeature.h> |
27 | #include <asm/insn.h> | ||
27 | #include <linux/stop_machine.h> | 28 | #include <linux/stop_machine.h> |
28 | 29 | ||
30 | #define __ALT_PTR(a,f) (u32 *)((void *)&(a)->f + (a)->f) | ||
31 | #define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset) | ||
32 | #define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset) | ||
33 | |||
29 | extern struct alt_instr __alt_instructions[], __alt_instructions_end[]; | 34 | extern struct alt_instr __alt_instructions[], __alt_instructions_end[]; |
30 | 35 | ||
31 | struct alt_region { | 36 | struct alt_region { |
@@ -33,13 +38,63 @@ struct alt_region { | |||
33 | struct alt_instr *end; | 38 | struct alt_instr *end; |
34 | }; | 39 | }; |
35 | 40 | ||
41 | /* | ||
42 | * Check if the target PC is within an alternative block. | ||
43 | */ | ||
44 | static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc) | ||
45 | { | ||
46 | unsigned long replptr; | ||
47 | |||
48 | if (kernel_text_address(pc)) | ||
49 | return 1; | ||
50 | |||
51 | replptr = (unsigned long)ALT_REPL_PTR(alt); | ||
52 | if (pc >= replptr && pc <= (replptr + alt->alt_len)) | ||
53 | return 0; | ||
54 | |||
55 | /* | ||
56 | * Branching into *another* alternate sequence is doomed, and | ||
57 | * we're not even trying to fix it up. | ||
58 | */ | ||
59 | BUG(); | ||
60 | } | ||
61 | |||
62 | static u32 get_alt_insn(struct alt_instr *alt, u32 *insnptr, u32 *altinsnptr) | ||
63 | { | ||
64 | u32 insn; | ||
65 | |||
66 | insn = le32_to_cpu(*altinsnptr); | ||
67 | |||
68 | if (aarch64_insn_is_branch_imm(insn)) { | ||
69 | s32 offset = aarch64_get_branch_offset(insn); | ||
70 | unsigned long target; | ||
71 | |||
72 | target = (unsigned long)altinsnptr + offset; | ||
73 | |||
74 | /* | ||
75 | * If we're branching inside the alternate sequence, | ||
76 | * do not rewrite the instruction, as it is already | ||
77 | * correct. Otherwise, generate the new instruction. | ||
78 | */ | ||
79 | if (branch_insn_requires_update(alt, target)) { | ||
80 | offset = target - (unsigned long)insnptr; | ||
81 | insn = aarch64_set_branch_offset(insn, offset); | ||
82 | } | ||
83 | } | ||
84 | |||
85 | return insn; | ||
86 | } | ||
87 | |||
36 | static int __apply_alternatives(void *alt_region) | 88 | static int __apply_alternatives(void *alt_region) |
37 | { | 89 | { |
38 | struct alt_instr *alt; | 90 | struct alt_instr *alt; |
39 | struct alt_region *region = alt_region; | 91 | struct alt_region *region = alt_region; |
40 | u8 *origptr, *replptr; | 92 | u32 *origptr, *replptr; |
41 | 93 | ||
42 | for (alt = region->begin; alt < region->end; alt++) { | 94 | for (alt = region->begin; alt < region->end; alt++) { |
95 | u32 insn; | ||
96 | int i, nr_inst; | ||
97 | |||
43 | if (!cpus_have_cap(alt->cpufeature)) | 98 | if (!cpus_have_cap(alt->cpufeature)) |
44 | continue; | 99 | continue; |
45 | 100 | ||
@@ -47,11 +102,17 @@ static int __apply_alternatives(void *alt_region) | |||
47 | 102 | ||
48 | pr_info_once("patching kernel code\n"); | 103 | pr_info_once("patching kernel code\n"); |
49 | 104 | ||
50 | origptr = (u8 *)&alt->orig_offset + alt->orig_offset; | 105 | origptr = ALT_ORIG_PTR(alt); |
51 | replptr = (u8 *)&alt->alt_offset + alt->alt_offset; | 106 | replptr = ALT_REPL_PTR(alt); |
52 | memcpy(origptr, replptr, alt->alt_len); | 107 | nr_inst = alt->alt_len / sizeof(insn); |
108 | |||
109 | for (i = 0; i < nr_inst; i++) { | ||
110 | insn = get_alt_insn(alt, origptr + i, replptr + i); | ||
111 | *(origptr + i) = cpu_to_le32(insn); | ||
112 | } | ||
113 | |||
53 | flush_icache_range((uintptr_t)origptr, | 114 | flush_icache_range((uintptr_t)origptr, |
54 | (uintptr_t)(origptr + alt->alt_len)); | 115 | (uintptr_t)(origptr + nr_inst)); |
55 | } | 116 | } |
56 | 117 | ||
57 | return 0; | 118 | return 0; |