aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMarc Zyngier <marc.zyngier@arm.com>2015-06-03 09:36:23 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2015-06-05 05:38:52 -0400
commitb0dd9c02d476162340ad60fc96befa817fa8fe9f (patch)
treeda38aa4858c587ef098f1097bcfb8796eefdfbcd
parent10b48f7ef2a765452a583dbc256ed7da7fe7f1fc (diff)
arm64: Rework alternate sequence for ARM erratum 845719
The workaround for erratum 845719 is currently using a branch between two alternate sequences, which is quite fragile, and that we are going to break as we rework the alternative code. This patch reworks the workaround to fit in a single alternative sequence. The generated code itself is unchanged. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r--arch/arm64/kernel/entry.S27
1 files changed, 15 insertions, 12 deletions
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 959fe8733560..9fe1a85c2027 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -124,21 +124,24 @@
124 msr sp_el0, x23 124 msr sp_el0, x23
125 125
126#ifdef CONFIG_ARM64_ERRATUM_845719 126#ifdef CONFIG_ARM64_ERRATUM_845719
127 alternative_insn \ 127
128 "nop", \ 128#undef SEQUENCE_ORG
129 "tbz x22, #4, 1f", \ 129#undef SEQUENCE_ALT
130 ARM64_WORKAROUND_845719 130
131#ifdef CONFIG_PID_IN_CONTEXTIDR 131#ifdef CONFIG_PID_IN_CONTEXTIDR
132 alternative_insn \ 132
133 "nop; nop", \ 133#define SEQUENCE_ORG "nop ; nop ; nop"
134 "mrs x29, contextidr_el1; msr contextidr_el1, x29; 1:", \ 134#define SEQUENCE_ALT "tbz x22, #4, 1f ; mrs x29, contextidr_el1; msr contextidr_el1, x29; 1:"
135 ARM64_WORKAROUND_845719 135
136#else 136#else
137 alternative_insn \ 137
138 "nop", \ 138#define SEQUENCE_ORG "nop ; nop"
139 "msr contextidr_el1, xzr; 1:", \ 139#define SEQUENCE_ALT "tbz x22, #4, 1f ; msr contextidr_el1, xzr; 1:"
140 ARM64_WORKAROUND_845719 140
141#endif 141#endif
142
143 alternative_insn SEQUENCE_ORG, SEQUENCE_ALT, ARM64_WORKAROUND_845719
144
142#endif 145#endif
143 .endif 146 .endif
144 msr elr_el1, x21 // set up the return data 147 msr elr_el1, x21 // set up the return data