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authorArnd Bergmann <arnd@arndb.de>2018-01-22 06:36:57 -0500
committerArnd Bergmann <arnd@arndb.de>2018-01-22 06:36:57 -0500
commit6ab1e867acb9d73c36dd60dd1c97da1b74a42e0d (patch)
treed190344863a0f13abf5fb4a02efbf538b99d58f7
parente8bfa0422469cdfc86be3f525f621b1d44d2481b (diff)
parente14d7e5320ebae9bffe4fbd585dfdd9d6de2550f (diff)
Merge tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Few omap interconnect dts fixes for v4.16 merge window" from Tony Lindgren: Now that we have the dts clocks for the clkctrl clock and the interconnect binding, we need to update the existing ti-sysc users according to the binding to make it usable for drivers. Apologies for not being able to send this earlier but it took me few revisions to get the smartreflex changes right and tested with yet to be posted patches to make smartreflex probe with dts and I wanted to have it sit in next for a while to make sure we're not introducing regressions for legacy platform data based booting. Note that this is based on a merge with commit 20a2742e5784 ("dt-bindings: ti-sysc: Update binding for timers and capabilities") to avoid a merge conflict with the binding changes. * tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Update ti-sysc data for existing users ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance dt-bindings: ti-sysc: Update binding for timers and capabilities
Diffstat
-rw-r--r--Documentation/devicetree/bindings/bus/ti-sysc.txt36
-rw-r--r--Documentation/devicetree/bindings/power/ti-smartreflex.txt2
-rw-r--r--arch/arm/boot/dts/am3517.dtsi4
-rw-r--r--arch/arm/boot/dts/dra7.dtsi26
-rw-r--r--arch/arm/boot/dts/omap3.dtsi14
-rw-r--r--arch/arm/boot/dts/omap34xx.dtsi39
-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi46
-rw-r--r--arch/arm/boot/dts/omap4.dtsi104
-rw-r--r--include/dt-bindings/bus/ti-sysc.h22
9 files changed, 257 insertions, 36 deletions
diff --git a/Documentation/devicetree/bindings/bus/ti-sysc.txt b/Documentation/devicetree/bindings/bus/ti-sysc.txt
index fb1790e39398..48bbb0c96835 100644
--- a/Documentation/devicetree/bindings/bus/ti-sysc.txt
+++ b/Documentation/devicetree/bindings/bus/ti-sysc.txt
@@ -26,6 +26,8 @@ Required standard properties:
26 or one of the following derivative types for hardware 26 or one of the following derivative types for hardware
27 needing special workarounds: 27 needing special workarounds:
28 28
29 "ti,sysc-omap2-timer"
30 "ti,sysc-omap4-timer"
29 "ti,sysc-omap3430-sr" 31 "ti,sysc-omap3430-sr"
30 "ti,sysc-omap3630-sr" 32 "ti,sysc-omap3630-sr"
31 "ti,sysc-omap4-sr" 33 "ti,sysc-omap4-sr"
@@ -49,6 +51,26 @@ Required standard properties:
49 51
50Optional properties: 52Optional properties:
51 53
54- ti,sysc-mask shall contain mask of supported register bits for the
55 SYSCONFIG register as documented in the Technical Reference
56 Manual (TRM) for the interconnect target module
57
58- ti,sysc-midle list of master idle modes supported by the interconnect
59 target module as documented in the TRM for SYSCONFIG
60 register MIDLEMODE bits
61
62- ti,sysc-sidle list of slave idle modes supported by the interconnect
63 target module as documented in the TRM for SYSCONFIG
64 register SIDLEMODE bits
65
66- ti,sysc-delay-us delay needed after OCP softreset before accssing
67 SYSCONFIG register again
68
69- ti,syss-mask optional mask of reset done status bits as described in the
70 TRM for SYSSTATUS registers, typically 1 with some devices
71 having separate reset done bits for children like OHCI and
72 EHCI
73
52- clocks clock specifier for each name in the clock-names as 74- clocks clock specifier for each name in the clock-names as
53 specified in the binding documentation for ti-clkctrl, 75 specified in the binding documentation for ti-clkctrl,
54 typically available for all interconnect targets on TI SoCs 76 typically available for all interconnect targets on TI SoCs
@@ -61,6 +83,9 @@ Optional properties:
61- ti,hwmods optional TI interconnect module name to use legacy 83- ti,hwmods optional TI interconnect module name to use legacy
62 hwmod platform data 84 hwmod platform data
63 85
86- ti,no-reset-on-init interconnect target module should not be reset at init
87
88- ti,no-idle-on-init interconnect target module should not be idled at init
64 89
65Example: Single instance of MUSB controller on omap4 using interconnect ranges 90Example: Single instance of MUSB controller on omap4 using interconnect ranges
66using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000): 91using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
@@ -74,6 +99,17 @@ using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
74 reg-names = "rev", "sysc", "syss"; 99 reg-names = "rev", "sysc", "syss";
75 clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>; 100 clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
76 clock-names = "fck"; 101 clock-names = "fck";
102 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
103 SYSC_OMAP2_SOFTRESET |
104 SYSC_OMAP2_AUTOIDLE)>;
105 ti,sysc-midle = <SYSC_IDLE_FORCE>,
106 <SYSC_IDLE_NO>,
107 <SYSC_IDLE_SMART>;
108 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
109 <SYSC_IDLE_NO>,
110 <SYSC_IDLE_SMART>,
111 <SYSC_IDLE_SMART_WKUP>;
112 ti,syss-mask = <1>;
77 #address-cells = <1>; 113 #address-cells = <1>;
78 #size-cells = <1>; 114 #size-cells = <1>;
79 ranges = <0 0x2b000 0x1000>; 115 ranges = <0 0x2b000 0x1000>;
diff --git a/Documentation/devicetree/bindings/power/ti-smartreflex.txt b/Documentation/devicetree/bindings/power/ti-smartreflex.txt
index 9780957c9115..21ef14d6af12 100644
--- a/Documentation/devicetree/bindings/power/ti-smartreflex.txt
+++ b/Documentation/devicetree/bindings/power/ti-smartreflex.txt
@@ -7,7 +7,7 @@ Required properties:
7 7
8compatible: Shall be one of the following: 8compatible: Shall be one of the following:
9 "ti,omap3-smartreflex-core" 9 "ti,omap3-smartreflex-core"
10 "ti,omap3-smartreflex-iva" 10 "ti,omap3-smartreflex-mpu-iva"
11 "ti,omap4-smartreflex-core" 11 "ti,omap4-smartreflex-core"
12 "ti,omap4-smartreflex-mpu" 12 "ti,omap4-smartreflex-mpu"
13 "ti,omap4-smartreflex-iva" 13 "ti,omap4-smartreflex-iva"
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 76994165fb3a..ca294914bbb1 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -99,9 +99,5 @@
99 status = "disabled"; 99 status = "disabled";
100}; 100};
101 101
102&smartreflex_mpu_iva {
103 status = "disabled";
104};
105
106/include/ "am35xx-clocks.dtsi" 102/include/ "am35xx-clocks.dtsi"
107/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" 103/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index aabb86663f11..700080a948a3 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -7,6 +7,8 @@
7 * Based on "omap4.dtsi" 7 * Based on "omap4.dtsi"
8 */ 8 */
9 9
10#include <dt-bindings/bus/ti-sysc.h>
11#include <dt-bindings/clock/dra7.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/pinctrl/dra.h> 13#include <dt-bindings/pinctrl/dra.h>
12#include <dt-bindings/clock/dra7.h> 14#include <dt-bindings/clock/dra7.h>
@@ -1523,9 +1525,15 @@
1523 target-module@4a0dd000 { 1525 target-module@4a0dd000 {
1524 compatible = "ti,sysc-omap4-sr"; 1526 compatible = "ti,sysc-omap4-sr";
1525 ti,hwmods = "smartreflex_core"; 1527 ti,hwmods = "smartreflex_core";
1526 reg = <0x4a0dd000 0x4>, 1528 reg = <0x4a0dd038 0x4>;
1527 <0x4a0dd008 0x4>; 1529 reg-names = "sysc";
1528 reg-names = "rev", "sysc"; 1530 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
1531 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1532 <SYSC_IDLE_NO>,
1533 <SYSC_IDLE_SMART>,
1534 <SYSC_IDLE_SMART_WKUP>;
1535 clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_CORE_CLKCTRL 0>;
1536 clock-names = "fck";
1529 #address-cells = <1>; 1537 #address-cells = <1>;
1530 #size-cells = <1>; 1538 #size-cells = <1>;
1531 ranges = <0 0x4a0dd000 0x001000>; 1539 ranges = <0 0x4a0dd000 0x001000>;
@@ -1536,9 +1544,15 @@
1536 target-module@4a0d9000 { 1544 target-module@4a0d9000 {
1537 compatible = "ti,sysc-omap4-sr"; 1545 compatible = "ti,sysc-omap4-sr";
1538 ti,hwmods = "smartreflex_mpu"; 1546 ti,hwmods = "smartreflex_mpu";
1539 reg = <0x4a0d9000 0x4>, 1547 reg = <0x4a0d9038 0x4>;
1540 <0x4a0d9008 0x4>; 1548 reg-names = "sysc";
1541 reg-names = "rev", "sysc"; 1549 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
1550 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1551 <SYSC_IDLE_NO>,
1552 <SYSC_IDLE_SMART>,
1553 <SYSC_IDLE_SMART_WKUP>;
1554 clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_MPU_CLKCTRL 0>;
1555 clock-names = "fck";
1542 #address-cells = <1>; 1556 #address-cells = <1>;
1543 #size-cells = <1>; 1557 #size-cells = <1>;
1544 ranges = <0 0x4a0d9000 0x001000>; 1558 ranges = <0 0x4a0d9000 0x001000>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index bb33935df7b0..a005802cd52b 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -587,20 +587,6 @@
587 dma-names = "rx"; 587 dma-names = "rx";
588 }; 588 };
589 589
590 smartreflex_core: smartreflex@480cb000 {
591 compatible = "ti,omap3-smartreflex-core";
592 ti,hwmods = "smartreflex_core";
593 reg = <0x480cb000 0x400>;
594 interrupts = <19>;
595 };
596
597 smartreflex_mpu_iva: smartreflex@480c9000 {
598 compatible = "ti,omap3-smartreflex-iva";
599 ti,hwmods = "smartreflex_mpu_iva";
600 reg = <0x480c9000 0x400>;
601 interrupts = <18>;
602 };
603
604 timer1: timer@48318000 { 590 timer1: timer@48318000 {
605 compatible = "ti,omap3430-timer"; 591 compatible = "ti,omap3430-timer";
606 reg = <0x48318000 0x400>; 592 reg = <0x48318000 0x400>;
diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index ac4f8795b756..f572a477f74c 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -8,6 +8,7 @@
8 * kind, whether express or implied. 8 * kind, whether express or implied.
9 */ 9 */
10 10
11#include <dt-bindings/bus/ti-sysc.h>
11#include <dt-bindings/media/omap3-isp.h> 12#include <dt-bindings/media/omap3-isp.h>
12 13
13#include "omap3.dtsi" 14#include "omap3.dtsi"
@@ -61,6 +62,44 @@
61 compatible = "ti,omap34xx-bandgap"; 62 compatible = "ti,omap34xx-bandgap";
62 #thermal-sensor-cells = <0>; 63 #thermal-sensor-cells = <0>;
63 }; 64 };
65
66 target-module@480cb000 {
67 compatible = "ti,sysc-omap3430-sr", "ti,sysc";
68 ti,hwmods = "smartreflex_core";
69 reg = <0x480cb024 0x4>;
70 reg-names = "sysc";
71 ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>;
72 clocks = <&sr2_fck>;
73 clock-names = "fck";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 ranges = <0 0x480cb000 0x001000>;
77
78 smartreflex_core: smartreflex@0 {
79 compatible = "ti,omap3-smartreflex-core";
80 reg = <0 0x400>;
81 interrupts = <19>;
82 };
83 };
84
85 target-module@480c9000 {
86 compatible = "ti,sysc-omap3430-sr", "ti,sysc";
87 ti,hwmods = "smartreflex_mpu_iva";
88 reg = <0x480c9024 0x4>;
89 reg-names = "sysc";
90 ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>;
91 clocks = <&sr1_fck>;
92 clock-names = "fck";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges = <0 0x480c9000 0x001000>;
96
97 smartreflex_mpu_iva: smartreflex@480c9000 {
98 compatible = "ti,omap3-smartreflex-mpu-iva";
99 reg = <0 0x400>;
100 interrupts = <18>;
101 };
102 };
64 }; 103 };
65 104
66 thermal_zones: thermal-zones { 105 thermal_zones: thermal-zones {
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index ade31d74c70c..6fb23ada1f64 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -8,6 +8,7 @@
8 * kind, whether express or implied. 8 * kind, whether express or implied.
9 */ 9 */
10 10
11#include <dt-bindings/bus/ti-sysc.h>
11#include <dt-bindings/media/omap3-isp.h> 12#include <dt-bindings/media/omap3-isp.h>
12 13
13#include "omap3.dtsi" 14#include "omap3.dtsi"
@@ -93,6 +94,51 @@
93 compatible = "ti,omap36xx-bandgap"; 94 compatible = "ti,omap36xx-bandgap";
94 #thermal-sensor-cells = <0>; 95 #thermal-sensor-cells = <0>;
95 }; 96 };
97
98 target-module@480cb000 {
99 compatible = "ti,sysc-omap3630-sr", "ti,sysc";
100 ti,hwmods = "smartreflex_core";
101 reg = <0x480cb038 0x4>;
102 reg-names = "sysc";
103 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
104 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
105 <SYSC_IDLE_NO>,
106 <SYSC_IDLE_SMART>;
107 clocks = <&sr2_fck>;
108 clock-names = "fck";
109 #address-cells = <1>;
110 #size-cells = <1>;
111 ranges = <0 0x480cb000 0x001000>;
112
113 smartreflex_core: smartreflex@0 {
114 compatible = "ti,omap3-smartreflex-core";
115 reg = <0 0x400>;
116 interrupts = <19>;
117 };
118 };
119
120 target-module@480c9000 {
121 compatible = "ti,sysc-omap3630-sr", "ti,sysc";
122 ti,hwmods = "smartreflex_mpu_iva";
123 reg = <0x480c9038 0x4>;
124 reg-names = "sysc";
125 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
126 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
127 <SYSC_IDLE_NO>,
128 <SYSC_IDLE_SMART>;
129 clocks = <&sr1_fck>;
130 clock-names = "fck";
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges = <0 0x480c9000 0x001000>;
134
135
136 smartreflex_mpu_iva: smartreflex@480c9000 {
137 compatible = "ti,omap3-smartreflex-mpu-iva";
138 reg = <0 0x400>;
139 interrupts = <18>;
140 };
141 };
96 }; 142 };
97 143
98 thermal_zones: thermal-zones { 144 thermal_zones: thermal-zones {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 18a11f689a1d..2485496297e3 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -6,6 +6,8 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9#include <dt-bindings/bus/ti-sysc.h>
10#include <dt-bindings/clock/omap4.h>
9#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/pinctrl/omap.h> 13#include <dt-bindings/pinctrl/omap.h>
@@ -398,6 +400,13 @@
398 reg = <0x48076000 0x4>, 400 reg = <0x48076000 0x4>,
399 <0x48076010 0x4>; 401 <0x48076010 0x4>;
400 reg-names = "rev", "sysc"; 402 reg-names = "rev", "sysc";
403 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
404 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
405 <SYSC_IDLE_NO>,
406 <SYSC_IDLE_SMART>,
407 <SYSC_IDLE_SMART_WKUP>;
408 clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
409 clock-names = "fck";
401 #address-cells = <1>; 410 #address-cells = <1>;
402 #size-cells = <1>; 411 #size-cells = <1>;
403 ranges = <0 0x48076000 0x001000>; 412 ranges = <0 0x48076000 0x001000>;
@@ -468,9 +477,15 @@
468 target-module@4a0db000 { 477 target-module@4a0db000 {
469 compatible = "ti,sysc-sr"; 478 compatible = "ti,sysc-sr";
470 ti,hwmods = "smartreflex_iva"; 479 ti,hwmods = "smartreflex_iva";
471 reg = <0x4a0db000 0x4>, 480 reg = <0x4a0db038 0x4>;
472 <0x4a0db008 0x4>; 481 reg-names = "sysc";
473 reg-names = "rev", "sysc"; 482 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
483 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
484 <SYSC_IDLE_NO>,
485 <SYSC_IDLE_SMART>,
486 <SYSC_IDLE_SMART_WKUP>;
487 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
488 clock-names = "fck";
474 #address-cells = <1>; 489 #address-cells = <1>;
475 #size-cells = <1>; 490 #size-cells = <1>;
476 ranges = <0 0x4a0db000 0x001000>; 491 ranges = <0 0x4a0db000 0x001000>;
@@ -485,9 +500,15 @@
485 target-module@4a0dd000 { 500 target-module@4a0dd000 {
486 compatible = "ti,sysc-sr"; 501 compatible = "ti,sysc-sr";
487 ti,hwmods = "smartreflex_core"; 502 ti,hwmods = "smartreflex_core";
488 reg = <0x4a0dd000 0x4>, 503 reg = <0x4a0dd038 0x4>;
489 <0x4a0dd008 0x4>; 504 reg-names = "sysc";
490 reg-names = "rev", "sysc"; 505 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
506 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
507 <SYSC_IDLE_NO>,
508 <SYSC_IDLE_SMART>,
509 <SYSC_IDLE_SMART_WKUP>;
510 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
511 clock-names = "fck";
491 #address-cells = <1>; 512 #address-cells = <1>;
492 #size-cells = <1>; 513 #size-cells = <1>;
493 ranges = <0 0x4a0dd000 0x001000>; 514 ranges = <0 0x4a0dd000 0x001000>;
@@ -502,9 +523,15 @@
502 target-module@4a0d9000 { 523 target-module@4a0d9000 {
503 compatible = "ti,sysc-sr"; 524 compatible = "ti,sysc-sr";
504 ti,hwmods = "smartreflex_mpu"; 525 ti,hwmods = "smartreflex_mpu";
505 reg = <0x4a0d9000 0x4>, 526 reg = <0x4a0d9038 0x4>;
506 <0x4a0d9008 0x4>; 527 reg-names = "sysc";
507 reg-names = "rev", "sysc"; 528 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
529 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
530 <SYSC_IDLE_NO>,
531 <SYSC_IDLE_SMART>,
532 <SYSC_IDLE_SMART_WKUP>;
533 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
534 clock-names = "fck";
508 #address-cells = <1>; 535 #address-cells = <1>;
509 #size-cells = <1>; 536 #size-cells = <1>;
510 ranges = <0 0x4a0d9000 0x001000>; 537 ranges = <0 0x4a0d9000 0x001000>;
@@ -725,6 +752,18 @@
725 reg = <0x52000000 0x4>, 752 reg = <0x52000000 0x4>,
726 <0x52000010 0x4>; 753 <0x52000010 0x4>;
727 reg-names = "rev", "sysc"; 754 reg-names = "rev", "sysc";
755 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
756 ti,sysc-midle = <SYSC_IDLE_FORCE>,
757 <SYSC_IDLE_NO>,
758 <SYSC_IDLE_SMART>,
759 <SYSC_IDLE_SMART_WKUP>;
760 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
761 <SYSC_IDLE_NO>,
762 <SYSC_IDLE_SMART>,
763 <SYSC_IDLE_SMART_WKUP>;
764 ti,sysc-delay-us = <2>;
765 clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
766 clock-names = "fck";
728 #address-cells = <1>; 767 #address-cells = <1>;
729 #size-cells = <1>; 768 #size-cells = <1>;
730 ranges = <0 0x52000000 0x1000000>; 769 ranges = <0 0x52000000 0x1000000>;
@@ -829,8 +868,15 @@
829 target-module@40128000 { 868 target-module@40128000 {
830 compatible = "ti,sysc-mcasp"; 869 compatible = "ti,sysc-mcasp";
831 ti,hwmods = "mcasp"; 870 ti,hwmods = "mcasp";
832 reg = <0x40128004 0x4>; 871 reg = <0x40128000 0x4>,
833 reg-names = "sysc"; 872 <0x40128004 0x4>;
873 reg-names = "rev", "sysc";
874 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
875 <SYSC_IDLE_NO>,
876 <SYSC_IDLE_SMART>,
877 <SYSC_IDLE_SMART_WKUP>;
878 clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
879 clock-names = "fck";
834 #address-cells = <1>; 880 #address-cells = <1>;
835 #size-cells = <1>; 881 #size-cells = <1>;
836 ranges = <0x00000000 0x40128000 0x1000>, /* MPU */ 882 ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
@@ -850,6 +896,13 @@
850 reg = <0x4012c000 0x4>, 896 reg = <0x4012c000 0x4>,
851 <0x4012c010 0x4>; 897 <0x4012c010 0x4>;
852 reg-names = "rev", "sysc"; 898 reg-names = "rev", "sysc";
899 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
900 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
901 <SYSC_IDLE_NO>,
902 <SYSC_IDLE_SMART>,
903 <SYSC_IDLE_SMART_WKUP>;
904 clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
905 clock-names = "fck";
853 #address-cells = <1>; 906 #address-cells = <1>;
854 #size-cells = <1>; 907 #size-cells = <1>;
855 ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */ 908 ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
@@ -864,6 +917,15 @@
864 reg = <0x401f1000 0x4>, 917 reg = <0x401f1000 0x4>,
865 <0x401f1010 0x4>; 918 <0x401f1010 0x4>;
866 reg-names = "rev", "sysc"; 919 reg-names = "rev", "sysc";
920 ti,sysc-midle = <SYSC_IDLE_FORCE>,
921 <SYSC_IDLE_NO>,
922 <SYSC_IDLE_SMART>,
923 <SYSC_IDLE_SMART_WKUP>;
924 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
925 <SYSC_IDLE_NO>,
926 <SYSC_IDLE_SMART>;
927 clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
928 clock-names = "fck";
867 #address-cells = <1>; 929 #address-cells = <1>;
868 #size-cells = <1>; 930 #size-cells = <1>;
869 ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */ 931 ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
@@ -970,6 +1032,16 @@
970 reg = <0x4a10a000 0x4>, 1032 reg = <0x4a10a000 0x4>,
971 <0x4a10a010 0x4>; 1033 <0x4a10a010 0x4>;
972 reg-names = "rev", "sysc"; 1034 reg-names = "rev", "sysc";
1035 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1036 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1037 <SYSC_IDLE_NO>,
1038 <SYSC_IDLE_SMART>;
1039 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1040 <SYSC_IDLE_NO>,
1041 <SYSC_IDLE_SMART>;
1042 ti,sysc-delay-us = <2>;
1043 clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
1044 clock-names = "fck";
973 #address-cells = <1>; 1045 #address-cells = <1>;
974 #size-cells = <1>; 1046 #size-cells = <1>;
975 ranges = <0 0x4a10a000 0x1000>; 1047 ranges = <0 0x4a10a000 0x1000>;
@@ -1199,6 +1271,16 @@
1199 reg = <0x5601fc00 0x4>, 1271 reg = <0x5601fc00 0x4>,
1200 <0x5601fc10 0x4>; 1272 <0x5601fc10 0x4>;
1201 reg-names = "rev", "sysc"; 1273 reg-names = "rev", "sysc";
1274 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1275 <SYSC_IDLE_NO>,
1276 <SYSC_IDLE_SMART>,
1277 <SYSC_IDLE_SMART_WKUP>;
1278 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1279 <SYSC_IDLE_NO>,
1280 <SYSC_IDLE_SMART>,
1281 <SYSC_IDLE_SMART_WKUP>;
1282 clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
1283 clock-names = "fck";
1202 #address-cells = <1>; 1284 #address-cells = <1>;
1203 #size-cells = <1>; 1285 #size-cells = <1>;
1204 ranges = <0 0x56000000 0x2000000>; 1286 ranges = <0 0x56000000 0x2000000>;
diff --git a/include/dt-bindings/bus/ti-sysc.h b/include/dt-bindings/bus/ti-sysc.h
new file mode 100644
index 000000000000..2c005376ac0e
--- /dev/null
+++ b/include/dt-bindings/bus/ti-sysc.h
@@ -0,0 +1,22 @@
1/* TI sysc interconnect target module defines */
2
3/* Generic sysc found on omap2 and later, also known as type1 */
4#define SYSC_OMAP2_CLOCKACTIVITY (3 << 8)
5#define SYSC_OMAP2_EMUFREE (1 << 5)
6#define SYSC_OMAP2_ENAWAKEUP (1 << 2)
7#define SYSC_OMAP2_SOFTRESET (1 << 1)
8#define SYSC_OMAP2_AUTOIDLE (1 << 0)
9
10/* Generic sysc found on omap4 and later, also known as type2 */
11#define SYSC_OMAP4_DMADISABLE (1 << 16)
12#define SYSC_OMAP4_FREEEMU (1 << 1) /* Also known as EMUFREE */
13#define SYSC_OMAP4_SOFTRESET (1 << 0)
14
15/* SmartReflex sysc found on 36xx and later */
16#define SYSC_OMAP3_SR_ENAWAKEUP (1 << 26)
17
18/* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */
19#define SYSC_IDLE_FORCE 0
20#define SYSC_IDLE_NO 1
21#define SYSC_IDLE_SMART 2
22#define SYSC_IDLE_SMART_WKUP 3
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-29 11:43:18 -0400