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authorTony Lindgren <tony@atomide.com>2018-01-11 19:04:03 -0500
committerTony Lindgren <tony@atomide.com>2018-01-12 18:16:57 -0500
commite14d7e5320ebae9bffe4fbd585dfdd9d6de2550f (patch)
tree443b4e26cef69e71d3633d7a284d6574ce8d0c2d
parent7d9bfdac31d77305a28531033e604264ae3e449c (diff)
ARM: dts: Update ti-sysc data for existing users
Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/am3517.dtsi4
-rw-r--r--arch/arm/boot/dts/dra7.dtsi26
-rw-r--r--arch/arm/boot/dts/omap3.dtsi14
-rw-r--r--arch/arm/boot/dts/omap34xx.dtsi39
-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi46
-rw-r--r--arch/arm/boot/dts/omap4.dtsi104
6 files changed, 198 insertions, 35 deletions
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 00da3f2c4072..0f0117b72e14 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -99,9 +99,5 @@
99 status = "disabled"; 99 status = "disabled";
100}; 100};
101 101
102&smartreflex_mpu_iva {
103 status = "disabled";
104};
105
106/include/ "am35xx-clocks.dtsi" 102/include/ "am35xx-clocks.dtsi"
107/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" 103/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index a1d7178a3966..2b0a541f7f1d 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -7,6 +7,8 @@
7 * Based on "omap4.dtsi" 7 * Based on "omap4.dtsi"
8 */ 8 */
9 9
10#include <dt-bindings/bus/ti-sysc.h>
11#include <dt-bindings/clock/dra7.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/pinctrl/dra.h> 13#include <dt-bindings/pinctrl/dra.h>
12#include <dt-bindings/clock/dra7.h> 14#include <dt-bindings/clock/dra7.h>
@@ -1514,9 +1516,15 @@
1514 target-module@4a0dd000 { 1516 target-module@4a0dd000 {
1515 compatible = "ti,sysc-omap4-sr"; 1517 compatible = "ti,sysc-omap4-sr";
1516 ti,hwmods = "smartreflex_core"; 1518 ti,hwmods = "smartreflex_core";
1517 reg = <0x4a0dd000 0x4>, 1519 reg = <0x4a0dd038 0x4>;
1518 <0x4a0dd008 0x4>; 1520 reg-names = "sysc";
1519 reg-names = "rev", "sysc"; 1521 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
1522 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1523 <SYSC_IDLE_NO>,
1524 <SYSC_IDLE_SMART>,
1525 <SYSC_IDLE_SMART_WKUP>;
1526 clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_CORE_CLKCTRL 0>;
1527 clock-names = "fck";
1520 #address-cells = <1>; 1528 #address-cells = <1>;
1521 #size-cells = <1>; 1529 #size-cells = <1>;
1522 ranges = <0 0x4a0dd000 0x001000>; 1530 ranges = <0 0x4a0dd000 0x001000>;
@@ -1527,9 +1535,15 @@
1527 target-module@4a0d9000 { 1535 target-module@4a0d9000 {
1528 compatible = "ti,sysc-omap4-sr"; 1536 compatible = "ti,sysc-omap4-sr";
1529 ti,hwmods = "smartreflex_mpu"; 1537 ti,hwmods = "smartreflex_mpu";
1530 reg = <0x4a0d9000 0x4>, 1538 reg = <0x4a0d9038 0x4>;
1531 <0x4a0d9008 0x4>; 1539 reg-names = "sysc";
1532 reg-names = "rev", "sysc"; 1540 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
1541 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1542 <SYSC_IDLE_NO>,
1543 <SYSC_IDLE_SMART>,
1544 <SYSC_IDLE_SMART_WKUP>;
1545 clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_MPU_CLKCTRL 0>;
1546 clock-names = "fck";
1533 #address-cells = <1>; 1547 #address-cells = <1>;
1534 #size-cells = <1>; 1548 #size-cells = <1>;
1535 ranges = <0 0x4a0d9000 0x001000>; 1549 ranges = <0 0x4a0d9000 0x001000>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index a5c2440c7051..2ce18785594f 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -587,20 +587,6 @@
587 dma-names = "rx"; 587 dma-names = "rx";
588 }; 588 };
589 589
590 smartreflex_core: smartreflex@480cb000 {
591 compatible = "ti,omap3-smartreflex-core";
592 ti,hwmods = "smartreflex_core";
593 reg = <0x480cb000 0x400>;
594 interrupts = <19>;
595 };
596
597 smartreflex_mpu_iva: smartreflex@480c9000 {
598 compatible = "ti,omap3-smartreflex-mpu-iva";
599 ti,hwmods = "smartreflex_mpu_iva";
600 reg = <0x480c9000 0x400>;
601 interrupts = <18>;
602 };
603
604 timer1: timer@48318000 { 590 timer1: timer@48318000 {
605 compatible = "ti,omap3430-timer"; 591 compatible = "ti,omap3430-timer";
606 reg = <0x48318000 0x400>; 592 reg = <0x48318000 0x400>;
diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index ac4f8795b756..f572a477f74c 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -8,6 +8,7 @@
8 * kind, whether express or implied. 8 * kind, whether express or implied.
9 */ 9 */
10 10
11#include <dt-bindings/bus/ti-sysc.h>
11#include <dt-bindings/media/omap3-isp.h> 12#include <dt-bindings/media/omap3-isp.h>
12 13
13#include "omap3.dtsi" 14#include "omap3.dtsi"
@@ -61,6 +62,44 @@
61 compatible = "ti,omap34xx-bandgap"; 62 compatible = "ti,omap34xx-bandgap";
62 #thermal-sensor-cells = <0>; 63 #thermal-sensor-cells = <0>;
63 }; 64 };
65
66 target-module@480cb000 {
67 compatible = "ti,sysc-omap3430-sr", "ti,sysc";
68 ti,hwmods = "smartreflex_core";
69 reg = <0x480cb024 0x4>;
70 reg-names = "sysc";
71 ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>;
72 clocks = <&sr2_fck>;
73 clock-names = "fck";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 ranges = <0 0x480cb000 0x001000>;
77
78 smartreflex_core: smartreflex@0 {
79 compatible = "ti,omap3-smartreflex-core";
80 reg = <0 0x400>;
81 interrupts = <19>;
82 };
83 };
84
85 target-module@480c9000 {
86 compatible = "ti,sysc-omap3430-sr", "ti,sysc";
87 ti,hwmods = "smartreflex_mpu_iva";
88 reg = <0x480c9024 0x4>;
89 reg-names = "sysc";
90 ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>;
91 clocks = <&sr1_fck>;
92 clock-names = "fck";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges = <0 0x480c9000 0x001000>;
96
97 smartreflex_mpu_iva: smartreflex@480c9000 {
98 compatible = "ti,omap3-smartreflex-mpu-iva";
99 reg = <0 0x400>;
100 interrupts = <18>;
101 };
102 };
64 }; 103 };
65 104
66 thermal_zones: thermal-zones { 105 thermal_zones: thermal-zones {
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index ade31d74c70c..6fb23ada1f64 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -8,6 +8,7 @@
8 * kind, whether express or implied. 8 * kind, whether express or implied.
9 */ 9 */
10 10
11#include <dt-bindings/bus/ti-sysc.h>
11#include <dt-bindings/media/omap3-isp.h> 12#include <dt-bindings/media/omap3-isp.h>
12 13
13#include "omap3.dtsi" 14#include "omap3.dtsi"
@@ -93,6 +94,51 @@
93 compatible = "ti,omap36xx-bandgap"; 94 compatible = "ti,omap36xx-bandgap";
94 #thermal-sensor-cells = <0>; 95 #thermal-sensor-cells = <0>;
95 }; 96 };
97
98 target-module@480cb000 {
99 compatible = "ti,sysc-omap3630-sr", "ti,sysc";
100 ti,hwmods = "smartreflex_core";
101 reg = <0x480cb038 0x4>;
102 reg-names = "sysc";
103 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
104 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
105 <SYSC_IDLE_NO>,
106 <SYSC_IDLE_SMART>;
107 clocks = <&sr2_fck>;
108 clock-names = "fck";
109 #address-cells = <1>;
110 #size-cells = <1>;
111 ranges = <0 0x480cb000 0x001000>;
112
113 smartreflex_core: smartreflex@0 {
114 compatible = "ti,omap3-smartreflex-core";
115 reg = <0 0x400>;
116 interrupts = <19>;
117 };
118 };
119
120 target-module@480c9000 {
121 compatible = "ti,sysc-omap3630-sr", "ti,sysc";
122 ti,hwmods = "smartreflex_mpu_iva";
123 reg = <0x480c9038 0x4>;
124 reg-names = "sysc";
125 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
126 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
127 <SYSC_IDLE_NO>,
128 <SYSC_IDLE_SMART>;
129 clocks = <&sr1_fck>;
130 clock-names = "fck";
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges = <0 0x480c9000 0x001000>;
134
135
136 smartreflex_mpu_iva: smartreflex@480c9000 {
137 compatible = "ti,omap3-smartreflex-mpu-iva";
138 reg = <0 0x400>;
139 interrupts = <18>;
140 };
141 };
96 }; 142 };
97 143
98 thermal_zones: thermal-zones { 144 thermal_zones: thermal-zones {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index e912639c998a..6425902f7ae7 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -6,6 +6,8 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9#include <dt-bindings/bus/ti-sysc.h>
10#include <dt-bindings/clock/omap4.h>
9#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h>
11#include <dt-bindings/pinctrl/omap.h> 13#include <dt-bindings/pinctrl/omap.h>
@@ -398,6 +400,13 @@
398 reg = <0x48076000 0x4>, 400 reg = <0x48076000 0x4>,
399 <0x48076010 0x4>; 401 <0x48076010 0x4>;
400 reg-names = "rev", "sysc"; 402 reg-names = "rev", "sysc";
403 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
404 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
405 <SYSC_IDLE_NO>,
406 <SYSC_IDLE_SMART>,
407 <SYSC_IDLE_SMART_WKUP>;
408 clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
409 clock-names = "fck";
401 #address-cells = <1>; 410 #address-cells = <1>;
402 #size-cells = <1>; 411 #size-cells = <1>;
403 ranges = <0 0x48076000 0x001000>; 412 ranges = <0 0x48076000 0x001000>;
@@ -468,9 +477,15 @@
468 target-module@4a0db000 { 477 target-module@4a0db000 {
469 compatible = "ti,sysc-sr"; 478 compatible = "ti,sysc-sr";
470 ti,hwmods = "smartreflex_iva"; 479 ti,hwmods = "smartreflex_iva";
471 reg = <0x4a0db000 0x4>, 480 reg = <0x4a0db038 0x4>;
472 <0x4a0db008 0x4>; 481 reg-names = "sysc";
473 reg-names = "rev", "sysc"; 482 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
483 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
484 <SYSC_IDLE_NO>,
485 <SYSC_IDLE_SMART>,
486 <SYSC_IDLE_SMART_WKUP>;
487 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
488 clock-names = "fck";
474 #address-cells = <1>; 489 #address-cells = <1>;
475 #size-cells = <1>; 490 #size-cells = <1>;
476 ranges = <0 0x4a0db000 0x001000>; 491 ranges = <0 0x4a0db000 0x001000>;
@@ -485,9 +500,15 @@
485 target-module@4a0dd000 { 500 target-module@4a0dd000 {
486 compatible = "ti,sysc-sr"; 501 compatible = "ti,sysc-sr";
487 ti,hwmods = "smartreflex_core"; 502 ti,hwmods = "smartreflex_core";
488 reg = <0x4a0dd000 0x4>, 503 reg = <0x4a0dd038 0x4>;
489 <0x4a0dd008 0x4>; 504 reg-names = "sysc";
490 reg-names = "rev", "sysc"; 505 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
506 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
507 <SYSC_IDLE_NO>,
508 <SYSC_IDLE_SMART>,
509 <SYSC_IDLE_SMART_WKUP>;
510 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
511 clock-names = "fck";
491 #address-cells = <1>; 512 #address-cells = <1>;
492 #size-cells = <1>; 513 #size-cells = <1>;
493 ranges = <0 0x4a0dd000 0x001000>; 514 ranges = <0 0x4a0dd000 0x001000>;
@@ -502,9 +523,15 @@
502 target-module@4a0d9000 { 523 target-module@4a0d9000 {
503 compatible = "ti,sysc-sr"; 524 compatible = "ti,sysc-sr";
504 ti,hwmods = "smartreflex_mpu"; 525 ti,hwmods = "smartreflex_mpu";
505 reg = <0x4a0d9000 0x4>, 526 reg = <0x4a0d9038 0x4>;
506 <0x4a0d9008 0x4>; 527 reg-names = "sysc";
507 reg-names = "rev", "sysc"; 528 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
529 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
530 <SYSC_IDLE_NO>,
531 <SYSC_IDLE_SMART>,
532 <SYSC_IDLE_SMART_WKUP>;
533 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
534 clock-names = "fck";
508 #address-cells = <1>; 535 #address-cells = <1>;
509 #size-cells = <1>; 536 #size-cells = <1>;
510 ranges = <0 0x4a0d9000 0x001000>; 537 ranges = <0 0x4a0d9000 0x001000>;
@@ -725,6 +752,18 @@
725 reg = <0x52000000 0x4>, 752 reg = <0x52000000 0x4>,
726 <0x52000010 0x4>; 753 <0x52000010 0x4>;
727 reg-names = "rev", "sysc"; 754 reg-names = "rev", "sysc";
755 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
756 ti,sysc-midle = <SYSC_IDLE_FORCE>,
757 <SYSC_IDLE_NO>,
758 <SYSC_IDLE_SMART>,
759 <SYSC_IDLE_SMART_WKUP>;
760 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
761 <SYSC_IDLE_NO>,
762 <SYSC_IDLE_SMART>,
763 <SYSC_IDLE_SMART_WKUP>;
764 ti,sysc-delay-us = <2>;
765 clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
766 clock-names = "fck";
728 #address-cells = <1>; 767 #address-cells = <1>;
729 #size-cells = <1>; 768 #size-cells = <1>;
730 ranges = <0 0x52000000 0x1000000>; 769 ranges = <0 0x52000000 0x1000000>;
@@ -829,8 +868,15 @@
829 target-module@40128000 { 868 target-module@40128000 {
830 compatible = "ti,sysc-mcasp"; 869 compatible = "ti,sysc-mcasp";
831 ti,hwmods = "mcasp"; 870 ti,hwmods = "mcasp";
832 reg = <0x40128004 0x4>; 871 reg = <0x40128000 0x4>,
833 reg-names = "sysc"; 872 <0x40128004 0x4>;
873 reg-names = "rev", "sysc";
874 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
875 <SYSC_IDLE_NO>,
876 <SYSC_IDLE_SMART>,
877 <SYSC_IDLE_SMART_WKUP>;
878 clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
879 clock-names = "fck";
834 #address-cells = <1>; 880 #address-cells = <1>;
835 #size-cells = <1>; 881 #size-cells = <1>;
836 ranges = <0x00000000 0x40128000 0x1000>, /* MPU */ 882 ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
@@ -850,6 +896,13 @@
850 reg = <0x4012c000 0x4>, 896 reg = <0x4012c000 0x4>,
851 <0x4012c010 0x4>; 897 <0x4012c010 0x4>;
852 reg-names = "rev", "sysc"; 898 reg-names = "rev", "sysc";
899 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
900 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
901 <SYSC_IDLE_NO>,
902 <SYSC_IDLE_SMART>,
903 <SYSC_IDLE_SMART_WKUP>;
904 clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
905 clock-names = "fck";
853 #address-cells = <1>; 906 #address-cells = <1>;
854 #size-cells = <1>; 907 #size-cells = <1>;
855 ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */ 908 ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
@@ -864,6 +917,15 @@
864 reg = <0x401f1000 0x4>, 917 reg = <0x401f1000 0x4>,
865 <0x401f1010 0x4>; 918 <0x401f1010 0x4>;
866 reg-names = "rev", "sysc"; 919 reg-names = "rev", "sysc";
920 ti,sysc-midle = <SYSC_IDLE_FORCE>,
921 <SYSC_IDLE_NO>,
922 <SYSC_IDLE_SMART>,
923 <SYSC_IDLE_SMART_WKUP>;
924 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
925 <SYSC_IDLE_NO>,
926 <SYSC_IDLE_SMART>;
927 clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
928 clock-names = "fck";
867 #address-cells = <1>; 929 #address-cells = <1>;
868 #size-cells = <1>; 930 #size-cells = <1>;
869 ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */ 931 ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
@@ -970,6 +1032,16 @@
970 reg = <0x4a10a000 0x4>, 1032 reg = <0x4a10a000 0x4>,
971 <0x4a10a010 0x4>; 1033 <0x4a10a010 0x4>;
972 reg-names = "rev", "sysc"; 1034 reg-names = "rev", "sysc";
1035 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1036 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1037 <SYSC_IDLE_NO>,
1038 <SYSC_IDLE_SMART>;
1039 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1040 <SYSC_IDLE_NO>,
1041 <SYSC_IDLE_SMART>;
1042 ti,sysc-delay-us = <2>;
1043 clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
1044 clock-names = "fck";
973 #address-cells = <1>; 1045 #address-cells = <1>;
974 #size-cells = <1>; 1046 #size-cells = <1>;
975 ranges = <0 0x4a10a000 0x1000>; 1047 ranges = <0 0x4a10a000 0x1000>;
@@ -1200,6 +1272,16 @@
1200 reg = <0x5601fc00 0x4>, 1272 reg = <0x5601fc00 0x4>,
1201 <0x5601fc10 0x4>; 1273 <0x5601fc10 0x4>;
1202 reg-names = "rev", "sysc"; 1274 reg-names = "rev", "sysc";
1275 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1276 <SYSC_IDLE_NO>,
1277 <SYSC_IDLE_SMART>,
1278 <SYSC_IDLE_SMART_WKUP>;
1279 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1280 <SYSC_IDLE_NO>,
1281 <SYSC_IDLE_SMART>,
1282 <SYSC_IDLE_SMART_WKUP>;
1283 clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
1284 clock-names = "fck";
1203 #address-cells = <1>; 1285 #address-cells = <1>;
1204 #size-cells = <1>; 1286 #size-cells = <1>;
1205 ranges = <0 0x56000000 0x2000000>; 1287 ranges = <0 0x56000000 0x2000000>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-28 16:24:25 -0400