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authorVineet Gupta <vgupta@synopsys.com>2015-03-09 05:03:40 -0400
committerVineet Gupta <vgupta@synopsys.com>2015-06-24 20:30:20 -0400
commit5fa2daaa8d8223d06fcdba171a7a668dc8e8b179 (patch)
tree5132e9df1f44b37430a15b28e4f60cfbf1c037be
parente0183f523025f96e2053200616a6d602ea2b3451 (diff)
ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores
Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arc/axs103.txt8
-rw-r--r--arch/arc/boot/dts/axc003.dtsi102
-rw-r--r--arch/arc/boot/dts/axc003_idu.dtsi126
-rw-r--r--arch/arc/boot/dts/axs103.dts24
-rw-r--r--arch/arc/boot/dts/axs103_idu.dts24
-rw-r--r--arch/arc/configs/axs103_defconfig117
-rw-r--r--arch/arc/configs/axs103_smp_defconfig118
-rw-r--r--arch/arc/kernel/devtree.c2
-rw-r--r--arch/arc/plat-axs10x/Kconfig13
-rw-r--r--arch/arc/plat-axs10x/axs10x.c198
10 files changed, 720 insertions, 12 deletions
diff --git a/Documentation/devicetree/bindings/arc/axs103.txt b/Documentation/devicetree/bindings/arc/axs103.txt
new file mode 100644
index 000000000000..6eea862e72b9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arc/axs103.txt
@@ -0,0 +1,8 @@
1Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
2---------------------------------------------------------------------------
3
4SDP Main Board with an AXC003 FPGA Card which can contain various flavours of
5HS38x cores.
6
7Required root node properties:
8 - compatible = "snps,axs103", "snps,arc-sdp";
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
new file mode 100644
index 000000000000..15c8d6226c9d
--- /dev/null
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -0,0 +1,102 @@
1/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device tree for AXC003 CPU card: HS38x UP configuration
11 */
12
13/ {
14 compatible = "snps,arc";
15 clock-frequency = <75000000>;
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 cpu_card {
20 compatible = "simple-bus";
21 #address-cells = <1>;
22 #size-cells = <1>;
23
24 ranges = <0x00000000 0xf0000000 0x10000000>;
25
26 cpu_intc: archs-intc@cpu {
27 compatible = "snps,archs-intc";
28 interrupt-controller;
29 #interrupt-cells = <1>;
30 };
31
32 /*
33 * this GPIO block ORs all interrupts on CPU card (creg,..)
34 * to uplink only 1 IRQ to ARC core intc
35 */
36 dw-apb-gpio@0x2000 {
37 compatible = "snps,dw-apb-gpio";
38 reg = < 0x2000 0x80 >;
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 ictl_intc: gpio-controller@0 {
43 compatible = "snps,dw-apb-gpio-port";
44 gpio-controller;
45 #gpio-cells = <2>;
46 snps,nr-gpios = <30>;
47 reg = <0>;
48 interrupt-controller;
49 #interrupt-cells = <2>;
50 interrupt-parent = <&cpu_intc>;
51 interrupts = <25>;
52 };
53 };
54
55 debug_uart: dw-apb-uart@0x5000 {
56 compatible = "snps,dw-apb-uart";
57 reg = <0x5000 0x100>;
58 clock-frequency = <33333000>;
59 interrupt-parent = <&ictl_intc>;
60 interrupts = <2 4>;
61 baud = <115200>;
62 reg-shift = <2>;
63 reg-io-width = <4>;
64 };
65
66 arcpct0: pct {
67 compatible = "snps,archs-pct";
68 #interrupt-cells = <1>;
69 interrupt-parent = <&cpu_intc>;
70 interrupts = <20>;
71 };
72 };
73
74 /*
75 * This INTC is actually connected to DW APB GPIO
76 * which acts as a wire between MB INTC and CPU INTC.
77 * GPIO INTC is configured in platform init code
78 * and here we mimic direct connection from MB INTC to
79 * CPU INTC, thus we set "interrupts = <7>" instead of
80 * "interrupts = <12>"
81 *
82 * This intc actually resides on MB, but we move it here to
83 * avoid duplicating the MB dtsi file given that IRQ from
84 * this intc to cpu intc are different for axs101 and axs103
85 */
86 mb_intc: dw-apb-ictl@0xe0012000 {
87 #interrupt-cells = <1>;
88 compatible = "snps,dw-apb-ictl";
89 reg = < 0xe0012000 0x200 >;
90 interrupt-controller;
91 interrupt-parent = <&cpu_intc>;
92 interrupts = < 24 >;
93 };
94
95 memory {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 ranges = <0x00000000 0x80000000 0x40000000>;
99 device_type = "memory";
100 reg = <0x00000000 0x20000000>; /* 512MiB */
101 };
102};
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
new file mode 100644
index 000000000000..199d42820eca
--- /dev/null
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -0,0 +1,126 @@
1/*
2 * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
11 */
12
13/ {
14 compatible = "snps,arc";
15 clock-frequency = <75000000>;
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 cpu_card {
20 compatible = "simple-bus";
21 #address-cells = <1>;
22 #size-cells = <1>;
23
24 ranges = <0x00000000 0xf0000000 0x10000000>;
25
26 cpu_intc: archs-intc@cpu {
27 compatible = "snps,archs-intc";
28 interrupt-controller;
29 #interrupt-cells = <1>;
30 };
31
32 idu_intc: idu-interrupt-controller {
33 compatible = "snps,archs-idu-intc";
34 interrupt-controller;
35 interrupt-parent = <&cpu_intc>;
36
37 /*
38 * <hwirq distribution>
39 * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
40 */
41 #interrupt-cells = <2>;
42
43 /*
44 * upstream irqs to core intc - downstream these are
45 * "COMMON" irq 0,1..
46 */
47 interrupts = <24 25>;
48 };
49
50 /*
51 * this GPIO block ORs all interrupts on CPU card (creg,..)
52 * to uplink only 1 IRQ to ARC core intc
53 */
54 dw-apb-gpio@0x2000 {
55 compatible = "snps,dw-apb-gpio";
56 reg = < 0x2000 0x80 >;
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 ictl_intc: gpio-controller@0 {
61 compatible = "snps,dw-apb-gpio-port";
62 gpio-controller;
63 #gpio-cells = <2>;
64 snps,nr-gpios = <30>;
65 reg = <0>;
66 interrupt-controller;
67 #interrupt-cells = <2>;
68 interrupt-parent = <&idu_intc>;
69
70 /*
71 * cmn irq 1 -> cpu irq 25
72 * Distribute to cpu0 only
73 */
74 interrupts = <1 1>;
75 };
76 };
77
78 debug_uart: dw-apb-uart@0x5000 {
79 compatible = "snps,dw-apb-uart";
80 reg = <0x5000 0x100>;
81 clock-frequency = <33333000>;
82 interrupt-parent = <&ictl_intc>;
83 interrupts = <2 4>;
84 baud = <115200>;
85 reg-shift = <2>;
86 reg-io-width = <4>;
87 };
88
89 arcpct0: pct {
90 compatible = "snps,archs-pct";
91 #interrupt-cells = <1>;
92 interrupt-parent = <&cpu_intc>;
93 interrupts = <20>;
94 };
95 };
96
97 /*
98 * This INTC is actually connected to DW APB GPIO
99 * which acts as a wire between MB INTC and CPU INTC.
100 * GPIO INTC is configured in platform init code
101 * and here we mimic direct connection from MB INTC to
102 * CPU INTC, thus we set "interrupts = <0 1>" instead of
103 * "interrupts = <12>"
104 *
105 * This intc actually resides on MB, but we move it here to
106 * avoid duplicating the MB dtsi file given that IRQ from
107 * this intc to cpu intc are different for axs101 and axs103
108 */
109 mb_intc: dw-apb-ictl@0xe0012000 {
110 #interrupt-cells = <1>;
111 compatible = "snps,dw-apb-ictl";
112 reg = < 0xe0012000 0x200 >;
113 interrupt-controller;
114 interrupt-parent = <&idu_intc>;
115 interrupts = <0 1>; /* cmn irq 0 -> cpu irq 24
116 distribute to cpu0 only */
117 };
118
119 memory {
120 #address-cells = <1>;
121 #size-cells = <1>;
122 ranges = <0x00000000 0x80000000 0x40000000>;
123 device_type = "memory";
124 reg = <0x00000000 0x20000000>; /* 512MiB */
125 };
126};
diff --git a/arch/arc/boot/dts/axs103.dts b/arch/arc/boot/dts/axs103.dts
new file mode 100644
index 000000000000..e6d0e31ea299
--- /dev/null
+++ b/arch/arc/boot/dts/axs103.dts
@@ -0,0 +1,24 @@
1/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device Tree for AXS103 SDP with AXS10X Main Board and
11 * AXC003 FPGA Card (with UP bitfile)
12 */
13/dts-v1/;
14
15/include/ "axc003.dtsi"
16/include/ "axs10x_mb.dtsi"
17
18/ {
19 compatible = "snps,axs103", "snps,arc-sdp";
20
21 chosen {
22 bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 debug print-fatal-signals=1";
23 };
24};
diff --git a/arch/arc/boot/dts/axs103_idu.dts b/arch/arc/boot/dts/axs103_idu.dts
new file mode 100644
index 000000000000..f999fef5a60a
--- /dev/null
+++ b/arch/arc/boot/dts/axs103_idu.dts
@@ -0,0 +1,24 @@
1/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device Tree for AXS103 SDP with AXS10X Main Board and
11 * AXC003 FPGA Card (with SMP bitfile)
12 */
13/dts-v1/;
14
15/include/ "axc003_idu.dtsi"
16/include/ "axs10x_mb.dtsi"
17
18/ {
19 compatible = "snps,axs103", "snps,arc-sdp";
20
21 chosen {
22 bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 debug print-fatal-signals=1";
23 };
24};
diff --git a/arch/arc/configs/axs103_defconfig b/arch/arc/configs/axs103_defconfig
new file mode 100644
index 000000000000..83a6d8d5cc58
--- /dev/null
+++ b/arch/arc/configs/axs103_defconfig
@@ -0,0 +1,117 @@
1CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
2CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y
5CONFIG_POSIX_MQUEUE=y
6# CONFIG_CROSS_MEMORY_ATTACH is not set
7CONFIG_NO_HZ_IDLE=y
8CONFIG_HIGH_RES_TIMERS=y
9CONFIG_IKCONFIG=y
10CONFIG_IKCONFIG_PROC=y
11CONFIG_NAMESPACES=y
12# CONFIG_UTS_NS is not set
13# CONFIG_PID_NS is not set
14CONFIG_BLK_DEV_INITRD=y
15CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
16CONFIG_EMBEDDED=y
17CONFIG_PERF_EVENTS=y
18# CONFIG_VM_EVENT_COUNTERS is not set
19# CONFIG_SLUB_DEBUG is not set
20# CONFIG_COMPAT_BRK is not set
21CONFIG_MODULES=y
22CONFIG_PARTITION_ADVANCED=y
23CONFIG_ARC_PLAT_AXS10X=y
24CONFIG_AXS103=y
25CONFIG_ISA_ARCV2=y
26CONFIG_ARC_BUILTIN_DTB_NAME="axs103"
27CONFIG_PREEMPT=y
28# CONFIG_COMPACTION is not set
29CONFIG_NET=y
30CONFIG_PACKET=y
31CONFIG_UNIX=y
32CONFIG_NET_KEY=y
33CONFIG_INET=y
34CONFIG_IP_PNP=y
35CONFIG_IP_PNP_DHCP=y
36CONFIG_IP_PNP_BOOTP=y
37CONFIG_IP_PNP_RARP=y
38# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
39# CONFIG_INET_XFRM_MODE_TUNNEL is not set
40# CONFIG_INET_XFRM_MODE_BEET is not set
41# CONFIG_IPV6 is not set
42# CONFIG_STANDALONE is not set
43# CONFIG_PREVENT_FIRMWARE_BUILD is not set
44# CONFIG_FIRMWARE_IN_KERNEL is not set
45CONFIG_MTD=y
46CONFIG_MTD_CMDLINE_PARTS=y
47CONFIG_MTD_BLOCK=y
48CONFIG_MTD_NAND=y
49CONFIG_MTD_NAND_AXS=y
50CONFIG_SCSI=y
51CONFIG_BLK_DEV_SD=y
52CONFIG_NETDEVICES=y
53# CONFIG_NET_VENDOR_ARC is not set
54# CONFIG_NET_VENDOR_BROADCOM is not set
55# CONFIG_NET_VENDOR_INTEL is not set
56# CONFIG_NET_VENDOR_MARVELL is not set
57# CONFIG_NET_VENDOR_MICREL is not set
58# CONFIG_NET_VENDOR_NATSEMI is not set
59# CONFIG_NET_VENDOR_SEEQ is not set
60CONFIG_STMMAC_ETH=y
61# CONFIG_NET_VENDOR_VIA is not set
62# CONFIG_NET_VENDOR_WIZNET is not set
63CONFIG_NATIONAL_PHY=y
64# CONFIG_USB_NET_DRIVERS is not set
65CONFIG_INPUT_EVDEV=y
66CONFIG_MOUSE_PS2_TOUCHKIT=y
67CONFIG_MOUSE_SERIAL=y
68CONFIG_MOUSE_SYNAPTICS_USB=y
69# CONFIG_LEGACY_PTYS is not set
70# CONFIG_DEVKMEM is not set
71CONFIG_SERIAL_8250=y
72CONFIG_SERIAL_8250_CONSOLE=y
73CONFIG_SERIAL_8250_DW=y
74CONFIG_SERIAL_OF_PLATFORM=y
75# CONFIG_HW_RANDOM is not set
76CONFIG_I2C=y
77CONFIG_I2C_CHARDEV=y
78CONFIG_I2C_DESIGNWARE_PLATFORM=y
79# CONFIG_HWMON is not set
80CONFIG_FB=y
81# CONFIG_VGA_CONSOLE is not set
82CONFIG_FRAMEBUFFER_CONSOLE=y
83CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
84CONFIG_LOGO=y
85# CONFIG_LOGO_LINUX_MONO is not set
86# CONFIG_LOGO_LINUX_VGA16 is not set
87# CONFIG_LOGO_LINUX_CLUT224 is not set
88CONFIG_USB=y
89CONFIG_USB_EHCI_HCD=y
90CONFIG_USB_EHCI_HCD_PLATFORM=y
91CONFIG_USB_OHCI_HCD=y
92CONFIG_USB_OHCI_HCD_PLATFORM=y
93CONFIG_USB_STORAGE=y
94CONFIG_MMC=y
95CONFIG_MMC_SDHCI=y
96CONFIG_MMC_SDHCI_PLTFM=y
97CONFIG_MMC_DW=y
98CONFIG_MMC_DW_IDMAC=y
99# CONFIG_IOMMU_SUPPORT is not set
100CONFIG_EXT3_FS=y
101CONFIG_EXT4_FS=y
102CONFIG_MSDOS_FS=y
103CONFIG_VFAT_FS=y
104CONFIG_NTFS_FS=y
105CONFIG_TMPFS=y
106CONFIG_JFFS2_FS=y
107CONFIG_NFS_FS=y
108CONFIG_NLS_CODEPAGE_437=y
109CONFIG_NLS_ISO8859_1=y
110# CONFIG_ENABLE_WARN_DEPRECATED is not set
111# CONFIG_ENABLE_MUST_CHECK is not set
112CONFIG_STRIP_ASM_SYMS=y
113CONFIG_LOCKUP_DETECTOR=y
114CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10
115# CONFIG_SCHED_DEBUG is not set
116# CONFIG_DEBUG_PREEMPT is not set
117# CONFIG_FTRACE is not set
diff --git a/arch/arc/configs/axs103_smp_defconfig b/arch/arc/configs/axs103_smp_defconfig
new file mode 100644
index 000000000000..f1e1c84e0dda
--- /dev/null
+++ b/arch/arc/configs/axs103_smp_defconfig
@@ -0,0 +1,118 @@
1CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
2CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y
5CONFIG_POSIX_MQUEUE=y
6# CONFIG_CROSS_MEMORY_ATTACH is not set
7CONFIG_NO_HZ_IDLE=y
8CONFIG_HIGH_RES_TIMERS=y
9CONFIG_IKCONFIG=y
10CONFIG_IKCONFIG_PROC=y
11CONFIG_NAMESPACES=y
12# CONFIG_UTS_NS is not set
13# CONFIG_PID_NS is not set
14CONFIG_BLK_DEV_INITRD=y
15CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
16CONFIG_EMBEDDED=y
17CONFIG_PERF_EVENTS=y
18# CONFIG_VM_EVENT_COUNTERS is not set
19# CONFIG_COMPAT_BRK is not set
20CONFIG_SLAB=y
21CONFIG_MODULES=y
22CONFIG_PARTITION_ADVANCED=y
23CONFIG_ARC_PLAT_AXS10X=y
24CONFIG_AXS103=y
25CONFIG_ISA_ARCV2=y
26CONFIG_SMP=y
27CONFIG_ARC_BUILTIN_DTB_NAME="axs103_idu"
28CONFIG_PREEMPT=y
29# CONFIG_COMPACTION is not set
30CONFIG_NET=y
31CONFIG_PACKET=y
32CONFIG_UNIX=y
33CONFIG_NET_KEY=y
34CONFIG_INET=y
35CONFIG_IP_PNP=y
36CONFIG_IP_PNP_DHCP=y
37CONFIG_IP_PNP_BOOTP=y
38CONFIG_IP_PNP_RARP=y
39# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
40# CONFIG_INET_XFRM_MODE_TUNNEL is not set
41# CONFIG_INET_XFRM_MODE_BEET is not set
42# CONFIG_IPV6 is not set
43# CONFIG_STANDALONE is not set
44# CONFIG_PREVENT_FIRMWARE_BUILD is not set
45# CONFIG_FIRMWARE_IN_KERNEL is not set
46CONFIG_MTD=y
47CONFIG_MTD_CMDLINE_PARTS=y
48CONFIG_MTD_BLOCK=y
49CONFIG_MTD_NAND=y
50CONFIG_MTD_NAND_AXS=y
51CONFIG_SCSI=y
52CONFIG_BLK_DEV_SD=y
53CONFIG_NETDEVICES=y
54# CONFIG_NET_VENDOR_ARC is not set
55# CONFIG_NET_VENDOR_BROADCOM is not set
56# CONFIG_NET_VENDOR_INTEL is not set
57# CONFIG_NET_VENDOR_MARVELL is not set
58# CONFIG_NET_VENDOR_MICREL is not set
59# CONFIG_NET_VENDOR_NATSEMI is not set
60# CONFIG_NET_VENDOR_SEEQ is not set
61CONFIG_STMMAC_ETH=y
62# CONFIG_NET_VENDOR_VIA is not set
63# CONFIG_NET_VENDOR_WIZNET is not set
64CONFIG_NATIONAL_PHY=y
65# CONFIG_USB_NET_DRIVERS is not set
66CONFIG_INPUT_EVDEV=y
67CONFIG_MOUSE_PS2_TOUCHKIT=y
68CONFIG_MOUSE_SERIAL=y
69CONFIG_MOUSE_SYNAPTICS_USB=y
70# CONFIG_LEGACY_PTYS is not set
71# CONFIG_DEVKMEM is not set
72CONFIG_SERIAL_8250=y
73CONFIG_SERIAL_8250_CONSOLE=y
74CONFIG_SERIAL_8250_DW=y
75CONFIG_SERIAL_OF_PLATFORM=y
76# CONFIG_HW_RANDOM is not set
77CONFIG_I2C=y
78CONFIG_I2C_CHARDEV=y
79CONFIG_I2C_DESIGNWARE_PLATFORM=y
80# CONFIG_HWMON is not set
81CONFIG_FB=y
82# CONFIG_VGA_CONSOLE is not set
83CONFIG_FRAMEBUFFER_CONSOLE=y
84CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
85CONFIG_LOGO=y
86# CONFIG_LOGO_LINUX_MONO is not set
87# CONFIG_LOGO_LINUX_VGA16 is not set
88# CONFIG_LOGO_LINUX_CLUT224 is not set
89CONFIG_USB=y
90CONFIG_USB_EHCI_HCD=y
91CONFIG_USB_EHCI_HCD_PLATFORM=y
92CONFIG_USB_OHCI_HCD=y
93CONFIG_USB_OHCI_HCD_PLATFORM=y
94CONFIG_USB_STORAGE=y
95CONFIG_MMC=y
96CONFIG_MMC_SDHCI=y
97CONFIG_MMC_SDHCI_PLTFM=y
98CONFIG_MMC_DW=y
99CONFIG_MMC_DW_IDMAC=y
100# CONFIG_IOMMU_SUPPORT is not set
101CONFIG_EXT3_FS=y
102CONFIG_EXT4_FS=y
103CONFIG_MSDOS_FS=y
104CONFIG_VFAT_FS=y
105CONFIG_NTFS_FS=y
106CONFIG_TMPFS=y
107CONFIG_JFFS2_FS=y
108CONFIG_NFS_FS=y
109CONFIG_NLS_CODEPAGE_437=y
110CONFIG_NLS_ISO8859_1=y
111# CONFIG_ENABLE_WARN_DEPRECATED is not set
112# CONFIG_ENABLE_MUST_CHECK is not set
113CONFIG_STRIP_ASM_SYMS=y
114CONFIG_LOCKUP_DETECTOR=y
115CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10
116# CONFIG_SCHED_DEBUG is not set
117# CONFIG_DEBUG_PREEMPT is not set
118# CONFIG_FTRACE is not set
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index f801d46dc087..7e844fd8213f 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -33,7 +33,7 @@ static void __init arc_set_early_base_baud(unsigned long dt_root)
33 if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x")) 33 if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
34 arc_base_baud = core_clk/3; 34 arc_base_baud = core_clk/3;
35 else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp")) 35 else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
36 arc_base_baud = 33333333; /* Fixed 33MHz clk */ 36 arc_base_baud = 33333333; /* Fixed 33MHz clk (AXS10x) */
37 else 37 else
38 arc_base_baud = core_clk; 38 arc_base_baud = core_clk;
39} 39}
diff --git a/arch/arc/plat-axs10x/Kconfig b/arch/arc/plat-axs10x/Kconfig
index 45641ca8aba8..d475f9d4847c 100644
--- a/arch/arc/plat-axs10x/Kconfig
+++ b/arch/arc/plat-axs10x/Kconfig
@@ -6,7 +6,7 @@
6# published by the Free Software Foundation. 6# published by the Free Software Foundation.
7# 7#
8 8
9config ARC_PLAT_AXS10X 9menuconfig ARC_PLAT_AXS10X
10 bool "Synopsys ARC AXS10x Software Development Platforms" 10 bool "Synopsys ARC AXS10x Software Development Platforms"
11 select DW_APB_ICTL 11 select DW_APB_ICTL
12 select GPIO_DWAPB 12 select GPIO_DWAPB
@@ -23,6 +23,7 @@ config ARC_PLAT_AXS10X
23if ARC_PLAT_AXS10X 23if ARC_PLAT_AXS10X
24 24
25config AXS101 25config AXS101
26 depends on ISA_ARCOMPACT
26 bool "AXS101 with AXC001 CPU Card (ARC 770D/EM6/AS221)" 27 bool "AXS101 with AXC001 CPU Card (ARC 770D/EM6/AS221)"
27 help 28 help
28 This adds support for the 770D/EM6/AS221 CPU Card. Only the ARC 29 This adds support for the 770D/EM6/AS221 CPU Card. Only the ARC
@@ -32,4 +33,14 @@ config AXS101
32 this daughtercard. Please use the axs101.dts device tree 33 this daughtercard. Please use the axs101.dts device tree
33 with this configuration. 34 with this configuration.
34 35
36config AXS103
37 bool "AXS103 with AXC003 CPU Card (ARC HS38x)"
38 depends on ISA_ARCV2
39 help
40 This adds support for the HS38x CPU Card.
41
42 The AXS103 Platform consists of an AXS10x mainboard with
43 this daughtercard. Please use the axs103.dts device tree
44 with this configuration.
45
35endif 46endif
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index a1cecdaf9dca..ad0a7ef84660 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * AXS101 Software Development Platform 2 * AXS101/AXS103 Software Development Platform
3 * 3 *
4 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 4 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
5 * 5 *
@@ -15,8 +15,10 @@
15 */ 15 */
16 16
17#include <linux/of_platform.h> 17#include <linux/of_platform.h>
18#include <asm/mach_desc.h> 18#include <asm/clk.h>
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/mach_desc.h>
21#include <asm/mcip.h>
20 22
21#define AXS_MB_CGU 0xE0010000 23#define AXS_MB_CGU 0xE0010000
22#define AXS_MB_CREG 0xE0011000 24#define AXS_MB_CREG 0xE0011000
@@ -29,14 +31,6 @@
29#define AXC001_CREG 0xF0001000 31#define AXC001_CREG 0xF0001000
30#define AXC001_GPIO_INTC 0xF0003000 32#define AXC001_GPIO_INTC 0xF0003000
31 33
32#define CREG_CPU_ADDR_770 (AXC001_CREG + 0x20)
33#define CREG_CPU_ADDR_TUNN (AXC001_CREG + 0x60)
34#define CREG_CPU_ADDR_770_UPD (AXC001_CREG + 0x34)
35#define CREG_CPU_ADDR_TUNN_UPD (AXC001_CREG + 0x74)
36
37#define CREG_CPU_ARC770_IRQ_MUX (AXC001_CREG + 0x114)
38#define CREG_CPU_GPIO_UART_MUX (AXC001_CREG + 0x120)
39
40static void __init axs10x_enable_gpio_intc_wire(void) 34static void __init axs10x_enable_gpio_intc_wire(void)
41{ 35{
42 /* 36 /*
@@ -83,6 +77,22 @@ static void __init axs10x_enable_gpio_intc_wire(void)
83 iowrite32(1 << MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN); 77 iowrite32(1 << MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN);
84} 78}
85 79
80static inline void __init
81write_cgu_reg(uint32_t value, void __iomem *reg, void __iomem *lock_reg)
82{
83 unsigned int loops = 128 * 1024, ctr;
84
85 iowrite32(value, reg);
86
87 ctr = loops;
88 while (((ioread32(lock_reg) & 1) == 1) && ctr--) /* wait for unlock */
89 cpu_relax();
90
91 ctr = loops;
92 while (((ioread32(lock_reg) & 1) == 0) && ctr--) /* wait for re-lock */
93 cpu_relax();
94}
95
86static void __init axs10x_print_board_ver(unsigned int creg, const char *str) 96static void __init axs10x_print_board_ver(unsigned int creg, const char *str)
87{ 97{
88 union ver { 98 union ver {
@@ -118,6 +128,16 @@ static void __init axs10x_early_init(void)
118 axs10x_print_board_ver(CREG_MB_VER, mb); 128 axs10x_print_board_ver(CREG_MB_VER, mb);
119} 129}
120 130
131#ifdef CONFIG_AXS101
132
133#define CREG_CPU_ADDR_770 (AXC001_CREG + 0x20)
134#define CREG_CPU_ADDR_TUNN (AXC001_CREG + 0x60)
135#define CREG_CPU_ADDR_770_UPD (AXC001_CREG + 0x34)
136#define CREG_CPU_ADDR_TUNN_UPD (AXC001_CREG + 0x74)
137
138#define CREG_CPU_ARC770_IRQ_MUX (AXC001_CREG + 0x114)
139#define CREG_CPU_GPIO_UART_MUX (AXC001_CREG + 0x120)
140
121/* 141/*
122 * Set up System Memory Map for ARC cpu / peripherals controllers 142 * Set up System Memory Map for ARC cpu / peripherals controllers
123 * 143 *
@@ -287,6 +307,145 @@ static void __init axs101_early_init(void)
287 axs10x_early_init(); 307 axs10x_early_init();
288} 308}
289 309
310#endif /* CONFIG_AXS101 */
311
312#ifdef CONFIG_AXS103
313
314#define AXC003_CGU 0xF0000000
315#define AXC003_CREG 0xF0001000
316#define AXC003_MST_AXI_TUNNEL 0
317#define AXC003_MST_HS38 1
318
319#define CREG_CPU_AXI_M0_IRQ_MUX (AXC003_CREG + 0x440)
320#define CREG_CPU_GPIO_UART_MUX (AXC003_CREG + 0x480)
321#define CREG_CPU_TUN_IO_CTRL (AXC003_CREG + 0x494)
322
323
324union pll_reg {
325 struct {
326#ifdef CONFIG_CPU_BIG_ENDIAN
327 unsigned int pad:17, noupd:1, bypass:1, edge:1, high:6, low:6;
328#else
329 unsigned int low:6, high:6, edge:1, bypass:1, noupd:1, pad:17;
330#endif
331 };
332 unsigned int val;
333};
334
335static unsigned int __init axs103_get_freq(void)
336{
337 union pll_reg idiv, fbdiv, odiv;
338 unsigned int f = 33333333;
339
340 idiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 0);
341 fbdiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 4);
342 odiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 8);
343
344 if (idiv.bypass != 1)
345 f = f / (idiv.low + idiv.high);
346
347 if (fbdiv.bypass != 1)
348 f = f * (fbdiv.low + fbdiv.high);
349
350 if (odiv.bypass != 1)
351 f = f / (odiv.low + odiv.high);
352
353 f = (f + 500000) / 1000000; /* Rounding */
354 return f;
355}
356
357static inline unsigned int __init encode_div(unsigned int id, int upd)
358{
359 union pll_reg div;
360
361 div.val = 0;
362
363 div.noupd = !upd;
364 div.bypass = id == 1 ? 1 : 0;
365 div.edge = (id%2 == 0) ? 0 : 1; /* 0 = rising */
366 div.low = (id%2 == 0) ? id >> 1 : (id >> 1)+1;
367 div.high = id >> 1;
368
369 return div.val;
370}
371
372noinline static void __init
373axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)
374{
375 write_cgu_reg(encode_div(id, 0),
376 (void __iomem *)AXC003_CGU + 0x80 + 0,
377 (void __iomem *)AXC003_CGU + 0x110);
378
379 write_cgu_reg(encode_div(fd, 0),
380 (void __iomem *)AXC003_CGU + 0x80 + 4,
381 (void __iomem *)AXC003_CGU + 0x110);
382
383 write_cgu_reg(encode_div(od, 1),
384 (void __iomem *)AXC003_CGU + 0x80 + 8,
385 (void __iomem *)AXC003_CGU + 0x110);
386}
387
388static void __init axs103_early_init(void)
389{
390 switch (arc_get_core_freq()/1000000) {
391 case 33:
392 axs103_set_freq(1, 1, 1);
393 break;
394 case 50:
395 axs103_set_freq(1, 30, 20);
396 break;
397 case 75:
398 axs103_set_freq(2, 45, 10);
399 break;
400 case 90:
401 axs103_set_freq(2, 54, 10);
402 break;
403 case 100:
404 axs103_set_freq(1, 30, 10);
405 break;
406 case 125:
407 axs103_set_freq(2, 45, 6);
408 break;
409 default:
410 /*
411 * In this case, core_frequency derived from
412 * DT "clock-frequency" might not match with board value.
413 * Hence update it to match the board value.
414 */
415 arc_set_core_freq(axs103_get_freq() * 1000000);
416 break;
417 }
418
419 pr_info("Freq is %dMHz\n", axs103_get_freq());
420
421 /* Memory maps already config in pre-bootloader */
422
423 /* set GPIO mux to UART */
424 iowrite32(0x01, (void __iomem *) CREG_CPU_GPIO_UART_MUX);
425
426 iowrite32((0x00100000U | 0x000C0000U | 0x00003322U),
427 (void __iomem *) CREG_CPU_TUN_IO_CTRL);
428
429 /* Set up the AXS_MB interrupt system.*/
430 iowrite32(12, (void __iomem *) (CREG_CPU_AXI_M0_IRQ_MUX
431 + (AXC003_MST_HS38 << 2)));
432
433 /* connect ICTL - Main Board with GPIO line */
434 iowrite32(0x01, (void __iomem *) CREG_MB_IRQ_MUX);
435
436 axs10x_print_board_ver(AXC003_CREG + 4088, "AXC003 CPU Card");
437
438 axs10x_early_init();
439
440#ifdef CONFIG_ARC_MCIP
441 /* No Hardware init, but filling the smp ops callbacks */
442 mcip_init_early_smp();
443#endif
444}
445#endif
446
447#ifdef CONFIG_AXS101
448
290static const char *axs101_compat[] __initconst = { 449static const char *axs101_compat[] __initconst = {
291 "snps,axs101", 450 "snps,axs101",
292 NULL, 451 NULL,
@@ -296,3 +455,22 @@ MACHINE_START(AXS101, "axs101")
296 .dt_compat = axs101_compat, 455 .dt_compat = axs101_compat,
297 .init_early = axs101_early_init, 456 .init_early = axs101_early_init,
298MACHINE_END 457MACHINE_END
458
459#endif /* CONFIG_AXS101 */
460
461#ifdef CONFIG_AXS103
462
463static const char *axs103_compat[] __initconst = {
464 "snps,axs103",
465 NULL,
466};
467
468MACHINE_START(AXS103, "axs103")
469 .dt_compat = axs103_compat,
470 .init_early = axs103_early_init,
471#ifdef CONFIG_ARC_MCIP
472 .init_smp = mcip_init_smp,
473#endif
474MACHINE_END
475
476#endif /* CONFIG_AXS103 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-28 13:41:09 -0400