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authorAlex Deucher <alexander.deucher@amd.com>2017-12-14 14:32:53 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-12-18 10:58:35 -0500
commit4e89df63c110d7fb4883c8b3d653d3d0e5dac67d (patch)
tree3c21f56d542dc89873ecfc75880719fa0b26552c
parenta89ff457d6f6200cd58db568c0138988bb60579c (diff)
drm/amdgpu: move atom functions from amdgpu_device.c
and move them to amdgpu_atombios.c for consistency. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c236
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c231
3 files changed, 236 insertions, 235 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index ffaf0534e33c..bf872f694f50 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -27,6 +27,7 @@
27#include <drm/amdgpu_drm.h> 27#include <drm/amdgpu_drm.h>
28#include "amdgpu.h" 28#include "amdgpu.h"
29#include "amdgpu_atombios.h" 29#include "amdgpu_atombios.h"
30#include "amdgpu_atomfirmware.h"
30#include "amdgpu_i2c.h" 31#include "amdgpu_i2c.h"
31 32
32#include "atom.h" 33#include "atom.h"
@@ -1699,7 +1700,7 @@ void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock)
1699 WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch); 1700 WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);
1700} 1701}
1701 1702
1702void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev) 1703static void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
1703{ 1704{
1704 uint32_t bios_2_scratch, bios_6_scratch; 1705 uint32_t bios_2_scratch, bios_6_scratch;
1705 1706
@@ -1776,7 +1777,7 @@ void amdgpu_atombios_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
1776#endif 1777#endif
1777} 1778}
1778 1779
1779int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev) 1780static int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
1780{ 1781{
1781 struct atom_context *ctx = adev->mode_info.atom_context; 1782 struct atom_context *ctx = adev->mode_info.atom_context;
1782 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware); 1783 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
@@ -1819,3 +1820,234 @@ int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
1819 ctx->scratch_size_bytes = usage_bytes; 1820 ctx->scratch_size_bytes = usage_bytes;
1820 return 0; 1821 return 0;
1821} 1822}
1823
1824/* ATOM accessor methods */
1825/*
1826 * ATOM is an interpreted byte code stored in tables in the vbios. The
1827 * driver registers callbacks to access registers and the interpreter
1828 * in the driver parses the tables and executes then to program specific
1829 * actions (set display modes, asic init, etc.). See amdgpu_atombios.c,
1830 * atombios.h, and atom.c
1831 */
1832
1833/**
1834 * cail_pll_read - read PLL register
1835 *
1836 * @info: atom card_info pointer
1837 * @reg: PLL register offset
1838 *
1839 * Provides a PLL register accessor for the atom interpreter (r4xx+).
1840 * Returns the value of the PLL register.
1841 */
1842static uint32_t cail_pll_read(struct card_info *info, uint32_t reg)
1843{
1844 return 0;
1845}
1846
1847/**
1848 * cail_pll_write - write PLL register
1849 *
1850 * @info: atom card_info pointer
1851 * @reg: PLL register offset
1852 * @val: value to write to the pll register
1853 *
1854 * Provides a PLL register accessor for the atom interpreter (r4xx+).
1855 */
1856static void cail_pll_write(struct card_info *info, uint32_t reg, uint32_t val)
1857{
1858
1859}
1860
1861/**
1862 * cail_mc_read - read MC (Memory Controller) register
1863 *
1864 * @info: atom card_info pointer
1865 * @reg: MC register offset
1866 *
1867 * Provides an MC register accessor for the atom interpreter (r4xx+).
1868 * Returns the value of the MC register.
1869 */
1870static uint32_t cail_mc_read(struct card_info *info, uint32_t reg)
1871{
1872 return 0;
1873}
1874
1875/**
1876 * cail_mc_write - write MC (Memory Controller) register
1877 *
1878 * @info: atom card_info pointer
1879 * @reg: MC register offset
1880 * @val: value to write to the pll register
1881 *
1882 * Provides a MC register accessor for the atom interpreter (r4xx+).
1883 */
1884static void cail_mc_write(struct card_info *info, uint32_t reg, uint32_t val)
1885{
1886
1887}
1888
1889/**
1890 * cail_reg_write - write MMIO register
1891 *
1892 * @info: atom card_info pointer
1893 * @reg: MMIO register offset
1894 * @val: value to write to the pll register
1895 *
1896 * Provides a MMIO register accessor for the atom interpreter (r4xx+).
1897 */
1898static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)
1899{
1900 struct amdgpu_device *adev = info->dev->dev_private;
1901
1902 WREG32(reg, val);
1903}
1904
1905/**
1906 * cail_reg_read - read MMIO register
1907 *
1908 * @info: atom card_info pointer
1909 * @reg: MMIO register offset
1910 *
1911 * Provides an MMIO register accessor for the atom interpreter (r4xx+).
1912 * Returns the value of the MMIO register.
1913 */
1914static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
1915{
1916 struct amdgpu_device *adev = info->dev->dev_private;
1917 uint32_t r;
1918
1919 r = RREG32(reg);
1920 return r;
1921}
1922
1923/**
1924 * cail_ioreg_write - write IO register
1925 *
1926 * @info: atom card_info pointer
1927 * @reg: IO register offset
1928 * @val: value to write to the pll register
1929 *
1930 * Provides a IO register accessor for the atom interpreter (r4xx+).
1931 */
1932static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)
1933{
1934 struct amdgpu_device *adev = info->dev->dev_private;
1935
1936 WREG32_IO(reg, val);
1937}
1938
1939/**
1940 * cail_ioreg_read - read IO register
1941 *
1942 * @info: atom card_info pointer
1943 * @reg: IO register offset
1944 *
1945 * Provides an IO register accessor for the atom interpreter (r4xx+).
1946 * Returns the value of the IO register.
1947 */
1948static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
1949{
1950 struct amdgpu_device *adev = info->dev->dev_private;
1951 uint32_t r;
1952
1953 r = RREG32_IO(reg);
1954 return r;
1955}
1956
1957static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev,
1958 struct device_attribute *attr,
1959 char *buf)
1960{
1961 struct drm_device *ddev = dev_get_drvdata(dev);
1962 struct amdgpu_device *adev = ddev->dev_private;
1963 struct atom_context *ctx = adev->mode_info.atom_context;
1964
1965 return snprintf(buf, PAGE_SIZE, "%s\n", ctx->vbios_version);
1966}
1967
1968static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,
1969 NULL);
1970
1971/**
1972 * amdgpu_atombios_fini - free the driver info and callbacks for atombios
1973 *
1974 * @adev: amdgpu_device pointer
1975 *
1976 * Frees the driver info and register access callbacks for the ATOM
1977 * interpreter (r4xx+).
1978 * Called at driver shutdown.
1979 */
1980void amdgpu_atombios_fini(struct amdgpu_device *adev)
1981{
1982 if (adev->mode_info.atom_context) {
1983 kfree(adev->mode_info.atom_context->scratch);
1984 kfree(adev->mode_info.atom_context->iio);
1985 }
1986 kfree(adev->mode_info.atom_context);
1987 adev->mode_info.atom_context = NULL;
1988 kfree(adev->mode_info.atom_card_info);
1989 adev->mode_info.atom_card_info = NULL;
1990 device_remove_file(adev->dev, &dev_attr_vbios_version);
1991}
1992
1993/**
1994 * amdgpu_atombios_init - init the driver info and callbacks for atombios
1995 *
1996 * @adev: amdgpu_device pointer
1997 *
1998 * Initializes the driver info and register access callbacks for the
1999 * ATOM interpreter (r4xx+).
2000 * Returns 0 on sucess, -ENOMEM on failure.
2001 * Called at driver startup.
2002 */
2003int amdgpu_atombios_init(struct amdgpu_device *adev)
2004{
2005 struct card_info *atom_card_info =
2006 kzalloc(sizeof(struct card_info), GFP_KERNEL);
2007 int ret;
2008
2009 if (!atom_card_info)
2010 return -ENOMEM;
2011
2012 adev->mode_info.atom_card_info = atom_card_info;
2013 atom_card_info->dev = adev->ddev;
2014 atom_card_info->reg_read = cail_reg_read;
2015 atom_card_info->reg_write = cail_reg_write;
2016 /* needed for iio ops */
2017 if (adev->rio_mem) {
2018 atom_card_info->ioreg_read = cail_ioreg_read;
2019 atom_card_info->ioreg_write = cail_ioreg_write;
2020 } else {
2021 DRM_DEBUG("PCI I/O BAR is not found. Using MMIO to access ATOM BIOS\n");
2022 atom_card_info->ioreg_read = cail_reg_read;
2023 atom_card_info->ioreg_write = cail_reg_write;
2024 }
2025 atom_card_info->mc_read = cail_mc_read;
2026 atom_card_info->mc_write = cail_mc_write;
2027 atom_card_info->pll_read = cail_pll_read;
2028 atom_card_info->pll_write = cail_pll_write;
2029
2030 adev->mode_info.atom_context = amdgpu_atom_parse(atom_card_info, adev->bios);
2031 if (!adev->mode_info.atom_context) {
2032 amdgpu_atombios_fini(adev);
2033 return -ENOMEM;
2034 }
2035
2036 mutex_init(&adev->mode_info.atom_context->mutex);
2037 if (adev->is_atom_fw) {
2038 amdgpu_atomfirmware_scratch_regs_init(adev);
2039 amdgpu_atomfirmware_allocate_fb_scratch(adev);
2040 } else {
2041 amdgpu_atombios_scratch_regs_init(adev);
2042 amdgpu_atombios_allocate_fb_scratch(adev);
2043 }
2044
2045 ret = device_create_file(adev->dev, &dev_attr_vbios_version);
2046 if (ret) {
2047 DRM_ERROR("Failed to create device file for VBIOS version\n");
2048 return ret;
2049 }
2050
2051 return 0;
2052}
2053
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
index 58507f9ff856..fd8f18074f7a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
@@ -195,7 +195,6 @@ int amdgpu_atombios_init_mc_reg_table(struct amdgpu_device *adev,
195bool amdgpu_atombios_has_gpu_virtualization_table(struct amdgpu_device *adev); 195bool amdgpu_atombios_has_gpu_virtualization_table(struct amdgpu_device *adev);
196 196
197void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock); 197void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock);
198void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev);
199void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev, 198void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
200 bool hung); 199 bool hung);
201bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev); 200bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev);
@@ -217,6 +216,7 @@ int amdgpu_atombios_get_svi2_info(struct amdgpu_device *adev,
217 u8 voltage_type, 216 u8 voltage_type,
218 u8 *svd_gpio_id, u8 *svc_gpio_id); 217 u8 *svd_gpio_id, u8 *svc_gpio_id);
219 218
220int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev); 219void amdgpu_atombios_fini(struct amdgpu_device *adev);
220int amdgpu_atombios_init(struct amdgpu_device *adev);
221 221
222#endif 222#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 79869827985f..a3632c757ca4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -898,237 +898,6 @@ void amdgpu_dummy_page_fini(struct amdgpu_device *adev)
898 adev->dummy_page.page = NULL; 898 adev->dummy_page.page = NULL;
899} 899}
900 900
901
902/* ATOM accessor methods */
903/*
904 * ATOM is an interpreted byte code stored in tables in the vbios. The
905 * driver registers callbacks to access registers and the interpreter
906 * in the driver parses the tables and executes then to program specific
907 * actions (set display modes, asic init, etc.). See amdgpu_atombios.c,
908 * atombios.h, and atom.c
909 */
910
911/**
912 * cail_pll_read - read PLL register
913 *
914 * @info: atom card_info pointer
915 * @reg: PLL register offset
916 *
917 * Provides a PLL register accessor for the atom interpreter (r4xx+).
918 * Returns the value of the PLL register.
919 */
920static uint32_t cail_pll_read(struct card_info *info, uint32_t reg)
921{
922 return 0;
923}
924
925/**
926 * cail_pll_write - write PLL register
927 *
928 * @info: atom card_info pointer
929 * @reg: PLL register offset
930 * @val: value to write to the pll register
931 *
932 * Provides a PLL register accessor for the atom interpreter (r4xx+).
933 */
934static void cail_pll_write(struct card_info *info, uint32_t reg, uint32_t val)
935{
936
937}
938
939/**
940 * cail_mc_read - read MC (Memory Controller) register
941 *
942 * @info: atom card_info pointer
943 * @reg: MC register offset
944 *
945 * Provides an MC register accessor for the atom interpreter (r4xx+).
946 * Returns the value of the MC register.
947 */
948static uint32_t cail_mc_read(struct card_info *info, uint32_t reg)
949{
950 return 0;
951}
952
953/**
954 * cail_mc_write - write MC (Memory Controller) register
955 *
956 * @info: atom card_info pointer
957 * @reg: MC register offset
958 * @val: value to write to the pll register
959 *
960 * Provides a MC register accessor for the atom interpreter (r4xx+).
961 */
962static void cail_mc_write(struct card_info *info, uint32_t reg, uint32_t val)
963{
964
965}
966
967/**
968 * cail_reg_write - write MMIO register
969 *
970 * @info: atom card_info pointer
971 * @reg: MMIO register offset
972 * @val: value to write to the pll register
973 *
974 * Provides a MMIO register accessor for the atom interpreter (r4xx+).
975 */
976static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)
977{
978 struct amdgpu_device *adev = info->dev->dev_private;
979
980 WREG32(reg, val);
981}
982
983/**
984 * cail_reg_read - read MMIO register
985 *
986 * @info: atom card_info pointer
987 * @reg: MMIO register offset
988 *
989 * Provides an MMIO register accessor for the atom interpreter (r4xx+).
990 * Returns the value of the MMIO register.
991 */
992static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
993{
994 struct amdgpu_device *adev = info->dev->dev_private;
995 uint32_t r;
996
997 r = RREG32(reg);
998 return r;
999}
1000
1001/**
1002 * cail_ioreg_write - write IO register
1003 *
1004 * @info: atom card_info pointer
1005 * @reg: IO register offset
1006 * @val: value to write to the pll register
1007 *
1008 * Provides a IO register accessor for the atom interpreter (r4xx+).
1009 */
1010static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)
1011{
1012 struct amdgpu_device *adev = info->dev->dev_private;
1013
1014 WREG32_IO(reg, val);
1015}
1016
1017/**
1018 * cail_ioreg_read - read IO register
1019 *
1020 * @info: atom card_info pointer
1021 * @reg: IO register offset
1022 *
1023 * Provides an IO register accessor for the atom interpreter (r4xx+).
1024 * Returns the value of the IO register.
1025 */
1026static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
1027{
1028 struct amdgpu_device *adev = info->dev->dev_private;
1029 uint32_t r;
1030
1031 r = RREG32_IO(reg);
1032 return r;
1033}
1034
1035static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev,
1036 struct device_attribute *attr,
1037 char *buf)
1038{
1039 struct drm_device *ddev = dev_get_drvdata(dev);
1040 struct amdgpu_device *adev = ddev->dev_private;
1041 struct atom_context *ctx = adev->mode_info.atom_context;
1042
1043 return snprintf(buf, PAGE_SIZE, "%s\n", ctx->vbios_version);
1044}
1045
1046static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,
1047 NULL);
1048
1049/**
1050 * amdgpu_atombios_fini - free the driver info and callbacks for atombios
1051 *
1052 * @adev: amdgpu_device pointer
1053 *
1054 * Frees the driver info and register access callbacks for the ATOM
1055 * interpreter (r4xx+).
1056 * Called at driver shutdown.
1057 */
1058static void amdgpu_atombios_fini(struct amdgpu_device *adev)
1059{
1060 if (adev->mode_info.atom_context) {
1061 kfree(adev->mode_info.atom_context->scratch);
1062 kfree(adev->mode_info.atom_context->iio);
1063 }
1064 kfree(adev->mode_info.atom_context);
1065 adev->mode_info.atom_context = NULL;
1066 kfree(adev->mode_info.atom_card_info);
1067 adev->mode_info.atom_card_info = NULL;
1068 device_remove_file(adev->dev, &dev_attr_vbios_version);
1069}
1070
1071/**
1072 * amdgpu_atombios_init - init the driver info and callbacks for atombios
1073 *
1074 * @adev: amdgpu_device pointer
1075 *
1076 * Initializes the driver info and register access callbacks for the
1077 * ATOM interpreter (r4xx+).
1078 * Returns 0 on sucess, -ENOMEM on failure.
1079 * Called at driver startup.
1080 */
1081static int amdgpu_atombios_init(struct amdgpu_device *adev)
1082{
1083 struct card_info *atom_card_info =
1084 kzalloc(sizeof(struct card_info), GFP_KERNEL);
1085 int ret;
1086
1087 if (!atom_card_info)
1088 return -ENOMEM;
1089
1090 adev->mode_info.atom_card_info = atom_card_info;
1091 atom_card_info->dev = adev->ddev;
1092 atom_card_info->reg_read = cail_reg_read;
1093 atom_card_info->reg_write = cail_reg_write;
1094 /* needed for iio ops */
1095 if (adev->rio_mem) {
1096 atom_card_info->ioreg_read = cail_ioreg_read;
1097 atom_card_info->ioreg_write = cail_ioreg_write;
1098 } else {
1099 DRM_DEBUG("PCI I/O BAR is not found. Using MMIO to access ATOM BIOS\n");
1100 atom_card_info->ioreg_read = cail_reg_read;
1101 atom_card_info->ioreg_write = cail_reg_write;
1102 }
1103 atom_card_info->mc_read = cail_mc_read;
1104 atom_card_info->mc_write = cail_mc_write;
1105 atom_card_info->pll_read = cail_pll_read;
1106 atom_card_info->pll_write = cail_pll_write;
1107
1108 adev->mode_info.atom_context = amdgpu_atom_parse(atom_card_info, adev->bios);
1109 if (!adev->mode_info.atom_context) {
1110 amdgpu_atombios_fini(adev);
1111 return -ENOMEM;
1112 }
1113
1114 mutex_init(&adev->mode_info.atom_context->mutex);
1115 if (adev->is_atom_fw) {
1116 amdgpu_atomfirmware_scratch_regs_init(adev);
1117 amdgpu_atomfirmware_allocate_fb_scratch(adev);
1118 } else {
1119 amdgpu_atombios_scratch_regs_init(adev);
1120 amdgpu_atombios_allocate_fb_scratch(adev);
1121 }
1122
1123 ret = device_create_file(adev->dev, &dev_attr_vbios_version);
1124 if (ret) {
1125 DRM_ERROR("Failed to create device file for VBIOS version\n");
1126 return ret;
1127 }
1128
1129 return 0;
1130}
1131
1132/* if we get transitioned to only one device, take VGA back */ 901/* if we get transitioned to only one device, take VGA back */
1133/** 902/**
1134 * amdgpu_vga_set_decode - enable/disable vga decode 903 * amdgpu_vga_set_decode - enable/disable vga decode