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authorVinod Koul <vinod.koul@intel.com>2016-04-16 13:15:17 -0400
committerVinod Koul <vinod.koul@intel.com>2016-04-16 13:15:17 -0400
commit4bd613596bc8572dee8a0683a24f6f931841b695 (patch)
tree81cc5fb7a19a41fe36427e85ccfc0a9f501dd06a
parent09c505ced310016ff064d827f053a78988a8bb1d (diff)
parentb96c033cc8fa6484b1771d43e2fcce61e1fa5097 (diff)
Merge branch 'fix/omap' into fixes
-rw-r--r--drivers/dma/omap-dma.c26
1 files changed, 17 insertions, 9 deletions
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 43bd5aee7ffe..1e984e18c126 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -48,6 +48,7 @@ struct omap_chan {
48 unsigned dma_sig; 48 unsigned dma_sig;
49 bool cyclic; 49 bool cyclic;
50 bool paused; 50 bool paused;
51 bool running;
51 52
52 int dma_ch; 53 int dma_ch;
53 struct omap_desc *desc; 54 struct omap_desc *desc;
@@ -294,6 +295,8 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
294 295
295 /* Enable channel */ 296 /* Enable channel */
296 omap_dma_chan_write(c, CCR, d->ccr | CCR_ENABLE); 297 omap_dma_chan_write(c, CCR, d->ccr | CCR_ENABLE);
298
299 c->running = true;
297} 300}
298 301
299static void omap_dma_stop(struct omap_chan *c) 302static void omap_dma_stop(struct omap_chan *c)
@@ -355,6 +358,8 @@ static void omap_dma_stop(struct omap_chan *c)
355 358
356 omap_dma_chan_write(c, CLNK_CTRL, val); 359 omap_dma_chan_write(c, CLNK_CTRL, val);
357 } 360 }
361
362 c->running = false;
358} 363}
359 364
360static void omap_dma_start_sg(struct omap_chan *c, struct omap_desc *d, 365static void omap_dma_start_sg(struct omap_chan *c, struct omap_desc *d,
@@ -673,15 +678,20 @@ static enum dma_status omap_dma_tx_status(struct dma_chan *chan,
673 struct omap_chan *c = to_omap_dma_chan(chan); 678 struct omap_chan *c = to_omap_dma_chan(chan);
674 struct virt_dma_desc *vd; 679 struct virt_dma_desc *vd;
675 enum dma_status ret; 680 enum dma_status ret;
676 uint32_t ccr;
677 unsigned long flags; 681 unsigned long flags;
678 682
679 ccr = omap_dma_chan_read(c, CCR);
680 /* The channel is no longer active, handle the completion right away */
681 if (!(ccr & CCR_ENABLE))
682 omap_dma_callback(c->dma_ch, 0, c);
683
684 ret = dma_cookie_status(chan, cookie, txstate); 683 ret = dma_cookie_status(chan, cookie, txstate);
684
685 if (!c->paused && c->running) {
686 uint32_t ccr = omap_dma_chan_read(c, CCR);
687 /*
688 * The channel is no longer active, set the return value
689 * accordingly
690 */
691 if (!(ccr & CCR_ENABLE))
692 ret = DMA_COMPLETE;
693 }
694
685 if (ret == DMA_COMPLETE || !txstate) 695 if (ret == DMA_COMPLETE || !txstate)
686 return ret; 696 return ret;
687 697
@@ -945,9 +955,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_memcpy(
945 d->ccr = c->ccr; 955 d->ccr = c->ccr;
946 d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_POSTINC; 956 d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_POSTINC;
947 957
948 d->cicr = CICR_DROP_IE; 958 d->cicr = CICR_DROP_IE | CICR_FRAME_IE;
949 if (tx_flags & DMA_PREP_INTERRUPT)
950 d->cicr |= CICR_FRAME_IE;
951 959
952 d->csdp = data_type; 960 d->csdp = data_type;
953 961