Merge branch 'fix/hsu' into fixes

2 files changed, 11 insertions, 5 deletions

diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c
index eef145edb936..ee510515ce18 100644
--- a/drivers/dma/hsu/hsu.c
+++ b/drivers/dma/hsu/hsu.c
@@ -64,10 +64,10 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc)
 
         if (hsuc->direction == DMA_MEM_TO_DEV) {
                 bsr = config->dst_maxburst;
-                mtsr = config->dst_addr_width;
+                mtsr = config->src_addr_width;
         } else if (hsuc->direction == DMA_DEV_TO_MEM) {
                 bsr = config->src_maxburst;
-                mtsr = config->src_addr_width;
+                mtsr = config->dst_addr_width;
         }
 
         hsu_chan_disable(hsuc);
@@ -135,7 +135,7 @@ static u32 hsu_dma_chan_get_sr(struct hsu_dma_chan *hsuc)
         sr = hsu_chan_readl(hsuc, HSU_CH_SR);
         spin_unlock_irqrestore(&hsuc->vchan.lock, flags);
 
-        return sr;
+        return sr & ~(HSU_CH_SR_DESCE_ANY | HSU_CH_SR_CDESC_ANY);
 }
 
 irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, unsigned short nr)
@@ -254,10 +254,13 @@ static void hsu_dma_issue_pending(struct dma_chan *chan)
 static size_t hsu_dma_active_desc_size(struct hsu_dma_chan *hsuc)
 {
         struct hsu_dma_desc *desc = hsuc->desc;
-        size_t bytes = desc->length;
+        size_t bytes = 0;
         int i;
 
-        i = desc->active % HSU_DMA_CHAN_NR_DESC;
+        for (i = desc->active; i < desc->nents; i++)
+                bytes += desc->sg[i].len;
+
+        i = HSU_DMA_CHAN_NR_DESC - 1;
         do {
                 bytes += hsu_chan_readl(hsuc, HSU_CH_DxTSR(i));
         } while (--i >= 0);
diff --git a/drivers/dma/hsu/hsu.h b/drivers/dma/hsu/hsu.h
index 578a8ee8cd05..6b070c22b1df 100644
--- a/drivers/dma/hsu/hsu.h
+++ b/drivers/dma/hsu/hsu.h
@@ -41,6 +41,9 @@
 #define HSU_CH_SR_DESCTO(x)     BIT(8 + (x))
 #define HSU_CH_SR_DESCTO_ANY    (BIT(11) | BIT(10) | BIT(9) | BIT(8))
 #define HSU_CH_SR_CHE           BIT(15)
+#define HSU_CH_SR_DESCE(x)      BIT(16 + (x))
+#define HSU_CH_SR_DESCE_ANY     (BIT(19) | BIT(18) | BIT(17) | BIT(16))
+#define HSU_CH_SR_CDESC_ANY     (BIT(31) | BIT(30))
 
 /* Bits in HSU_CH_CR */
 #define HSU_CH_CR_CHA           BIT(0)