diff options
author | Zhao Yakui <yakui.zhao@intel.com> | 2009-10-08 23:39:40 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2009-11-05 17:47:10 -0500 |
commit | 44d98a614267c81a04ba9c7a0427c3a628985b7d (patch) | |
tree | 4a730abbdd317c106ce0f50565cb8c0eb4c836d8 | |
parent | 5c5a4359fe392b52b444134877fc4002be542b42 (diff) |
drm/i915: Replace DRM_DEBUG with DRM_DEBUG_DRIVER
Replace the DRM_DEBUG with DRM_DEBUG_DRIVER in generic i915 driver.
Then the debug info can be obtained by adding the boot option of
"drm.debug=0x02".
At the same time the debug info in increase/decrease clock is also
printed by using DRM_DEBUG_DRIVER instead of DRM_DEBUG_KMS.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 26 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_opregion.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 20 |
6 files changed, 38 insertions, 36 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 138be49259c3..6ade4a651c9e 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1073,7 +1073,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev, | |||
1073 | 1073 | ||
1074 | entry = *(volatile u32 *)(gtt + (gtt_addr / 1024)); | 1074 | entry = *(volatile u32 *)(gtt + (gtt_addr / 1024)); |
1075 | 1075 | ||
1076 | DRM_DEBUG("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry); | 1076 | DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry); |
1077 | 1077 | ||
1078 | /* Mask out these reserved bits on this hardware. */ | 1078 | /* Mask out these reserved bits on this hardware. */ |
1079 | if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) || | 1079 | if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) || |
@@ -1099,7 +1099,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev, | |||
1099 | phys =(entry & PTE_ADDRESS_MASK) | | 1099 | phys =(entry & PTE_ADDRESS_MASK) | |
1100 | ((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4)); | 1100 | ((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4)); |
1101 | 1101 | ||
1102 | DRM_DEBUG("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys); | 1102 | DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys); |
1103 | 1103 | ||
1104 | return phys; | 1104 | return phys; |
1105 | } | 1105 | } |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 19d25e5d8608..2065b8f7e875 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -1617,7 +1617,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv, | |||
1617 | OUT_RING(MI_USER_INTERRUPT); | 1617 | OUT_RING(MI_USER_INTERRUPT); |
1618 | ADVANCE_LP_RING(); | 1618 | ADVANCE_LP_RING(); |
1619 | 1619 | ||
1620 | DRM_DEBUG("%d\n", seqno); | 1620 | DRM_DEBUG_DRIVER("%d\n", seqno); |
1621 | 1621 | ||
1622 | request->seqno = seqno; | 1622 | request->seqno = seqno; |
1623 | request->emitted_jiffies = jiffies; | 1623 | request->emitted_jiffies = jiffies; |
@@ -4367,7 +4367,7 @@ i915_gem_init_hws(struct drm_device *dev) | |||
4367 | memset(dev_priv->hw_status_page, 0, PAGE_SIZE); | 4367 | memset(dev_priv->hw_status_page, 0, PAGE_SIZE); |
4368 | I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); | 4368 | I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); |
4369 | I915_READ(HWS_PGA); /* posting read */ | 4369 | I915_READ(HWS_PGA); /* posting read */ |
4370 | DRM_DEBUG("hws offset: 0x%08x\n", dev_priv->status_gfx_addr); | 4370 | DRM_DEBUG_DRIVER("hws offset: 0x%08x\n", dev_priv->status_gfx_addr); |
4371 | 4371 | ||
4372 | return 0; | 4372 | return 0; |
4373 | } | 4373 | } |
@@ -4801,7 +4801,7 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj, | |||
4801 | user_data = (char __user *) (uintptr_t) args->data_ptr; | 4801 | user_data = (char __user *) (uintptr_t) args->data_ptr; |
4802 | obj_addr = obj_priv->phys_obj->handle->vaddr + args->offset; | 4802 | obj_addr = obj_priv->phys_obj->handle->vaddr + args->offset; |
4803 | 4803 | ||
4804 | DRM_DEBUG("obj_addr %p, %lld\n", obj_addr, args->size); | 4804 | DRM_DEBUG_DRIVER("obj_addr %p, %lld\n", obj_addr, args->size); |
4805 | ret = copy_from_user(obj_addr, user_data, args->size); | 4805 | ret = copy_from_user(obj_addr, user_data, args->size); |
4806 | if (ret) | 4806 | if (ret) |
4807 | return -EFAULT; | 4807 | return -EFAULT; |
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 200e398453ca..0c8df96a1ef8 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c | |||
@@ -121,7 +121,7 @@ intel_alloc_mchbar_resource(struct drm_device *dev) | |||
121 | 0, pcibios_align_resource, | 121 | 0, pcibios_align_resource, |
122 | dev_priv->bridge_dev); | 122 | dev_priv->bridge_dev); |
123 | if (ret) { | 123 | if (ret) { |
124 | DRM_DEBUG("failed bus alloc: %d\n", ret); | 124 | DRM_DEBUG_DRIVER("failed bus alloc: %d\n", ret); |
125 | dev_priv->mch_res.start = 0; | 125 | dev_priv->mch_res.start = 0; |
126 | goto out; | 126 | goto out; |
127 | } | 127 | } |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index c3ceffa46ea0..0887581fa650 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -191,7 +191,8 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe) | |||
191 | low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; | 191 | low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; |
192 | 192 | ||
193 | if (!i915_pipe_enabled(dev, pipe)) { | 193 | if (!i915_pipe_enabled(dev, pipe)) { |
194 | DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe); | 194 | DRM_DEBUG_DRIVER("trying to get vblank count for disabled " |
195 | "pipe %d\n", pipe); | ||
195 | return 0; | 196 | return 0; |
196 | } | 197 | } |
197 | 198 | ||
@@ -220,7 +221,8 @@ u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe) | |||
220 | int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45; | 221 | int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45; |
221 | 222 | ||
222 | if (!i915_pipe_enabled(dev, pipe)) { | 223 | if (!i915_pipe_enabled(dev, pipe)) { |
223 | DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe); | 224 | DRM_DEBUG_DRIVER("trying to get vblank count for disabled " |
225 | "pipe %d\n", pipe); | ||
224 | return 0; | 226 | return 0; |
225 | } | 227 | } |
226 | 228 | ||
@@ -309,19 +311,19 @@ static void i915_error_work_func(struct work_struct *work) | |||
309 | char *reset_event[] = { "RESET=1", NULL }; | 311 | char *reset_event[] = { "RESET=1", NULL }; |
310 | char *reset_done_event[] = { "ERROR=0", NULL }; | 312 | char *reset_done_event[] = { "ERROR=0", NULL }; |
311 | 313 | ||
312 | DRM_DEBUG("generating error event\n"); | 314 | DRM_DEBUG_DRIVER("generating error event\n"); |
313 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event); | 315 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event); |
314 | 316 | ||
315 | if (atomic_read(&dev_priv->mm.wedged)) { | 317 | if (atomic_read(&dev_priv->mm.wedged)) { |
316 | if (IS_I965G(dev)) { | 318 | if (IS_I965G(dev)) { |
317 | DRM_DEBUG("resetting chip\n"); | 319 | DRM_DEBUG_DRIVER("resetting chip\n"); |
318 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event); | 320 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event); |
319 | if (!i965_reset(dev, GDRST_RENDER)) { | 321 | if (!i965_reset(dev, GDRST_RENDER)) { |
320 | atomic_set(&dev_priv->mm.wedged, 0); | 322 | atomic_set(&dev_priv->mm.wedged, 0); |
321 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event); | 323 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event); |
322 | } | 324 | } |
323 | } else { | 325 | } else { |
324 | printk("reboot required\n"); | 326 | DRM_DEBUG_DRIVER("reboot required\n"); |
325 | } | 327 | } |
326 | } | 328 | } |
327 | } | 329 | } |
@@ -347,7 +349,7 @@ static void i915_capture_error_state(struct drm_device *dev) | |||
347 | 349 | ||
348 | error = kmalloc(sizeof(*error), GFP_ATOMIC); | 350 | error = kmalloc(sizeof(*error), GFP_ATOMIC); |
349 | if (!error) { | 351 | if (!error) { |
350 | DRM_DEBUG("out ot memory, not capturing error state\n"); | 352 | DRM_DEBUG_DRIVER("out ot memory, not capturing error state\n"); |
351 | goto out; | 353 | goto out; |
352 | } | 354 | } |
353 | 355 | ||
@@ -560,14 +562,14 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
560 | */ | 562 | */ |
561 | if (pipea_stats & 0x8000ffff) { | 563 | if (pipea_stats & 0x8000ffff) { |
562 | if (pipea_stats & PIPE_FIFO_UNDERRUN_STATUS) | 564 | if (pipea_stats & PIPE_FIFO_UNDERRUN_STATUS) |
563 | DRM_DEBUG("pipe a underrun\n"); | 565 | DRM_DEBUG_DRIVER("pipe a underrun\n"); |
564 | I915_WRITE(PIPEASTAT, pipea_stats); | 566 | I915_WRITE(PIPEASTAT, pipea_stats); |
565 | irq_received = 1; | 567 | irq_received = 1; |
566 | } | 568 | } |
567 | 569 | ||
568 | if (pipeb_stats & 0x8000ffff) { | 570 | if (pipeb_stats & 0x8000ffff) { |
569 | if (pipeb_stats & PIPE_FIFO_UNDERRUN_STATUS) | 571 | if (pipeb_stats & PIPE_FIFO_UNDERRUN_STATUS) |
570 | DRM_DEBUG("pipe b underrun\n"); | 572 | DRM_DEBUG_DRIVER("pipe b underrun\n"); |
571 | I915_WRITE(PIPEBSTAT, pipeb_stats); | 573 | I915_WRITE(PIPEBSTAT, pipeb_stats); |
572 | irq_received = 1; | 574 | irq_received = 1; |
573 | } | 575 | } |
@@ -583,7 +585,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
583 | (iir & I915_DISPLAY_PORT_INTERRUPT)) { | 585 | (iir & I915_DISPLAY_PORT_INTERRUPT)) { |
584 | u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT); | 586 | u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT); |
585 | 587 | ||
586 | DRM_DEBUG("hotplug event received, stat 0x%08x\n", | 588 | DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n", |
587 | hotplug_status); | 589 | hotplug_status); |
588 | if (hotplug_status & dev_priv->hotplug_supported_mask) | 590 | if (hotplug_status & dev_priv->hotplug_supported_mask) |
589 | queue_work(dev_priv->wq, | 591 | queue_work(dev_priv->wq, |
@@ -597,7 +599,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
597 | (hotplug_status & CRT_EOS_INT_STATUS)) { | 599 | (hotplug_status & CRT_EOS_INT_STATUS)) { |
598 | u32 temp; | 600 | u32 temp; |
599 | 601 | ||
600 | DRM_DEBUG("EOS interrupt occurs\n"); | 602 | DRM_DEBUG_DRIVER("EOS interrupt occurs\n"); |
601 | /* status is already cleared */ | 603 | /* status is already cleared */ |
602 | temp = I915_READ(ADPA); | 604 | temp = I915_READ(ADPA); |
603 | temp &= ~ADPA_DAC_ENABLE; | 605 | temp &= ~ADPA_DAC_ENABLE; |
@@ -676,7 +678,7 @@ static int i915_emit_irq(struct drm_device * dev) | |||
676 | 678 | ||
677 | i915_kernel_lost_context(dev); | 679 | i915_kernel_lost_context(dev); |
678 | 680 | ||
679 | DRM_DEBUG("\n"); | 681 | DRM_DEBUG_DRIVER("\n"); |
680 | 682 | ||
681 | dev_priv->counter++; | 683 | dev_priv->counter++; |
682 | if (dev_priv->counter > 0x7FFFFFFFUL) | 684 | if (dev_priv->counter > 0x7FFFFFFFUL) |
@@ -741,7 +743,7 @@ static int i915_wait_irq(struct drm_device * dev, int irq_nr) | |||
741 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; | 743 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
742 | int ret = 0; | 744 | int ret = 0; |
743 | 745 | ||
744 | DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr, | 746 | DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr, |
745 | READ_BREADCRUMB(dev_priv)); | 747 | READ_BREADCRUMB(dev_priv)); |
746 | 748 | ||
747 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) { | 749 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) { |
diff --git a/drivers/gpu/drm/i915/i915_opregion.c b/drivers/gpu/drm/i915/i915_opregion.c index 2d5193556d3f..9032bda35e2a 100644 --- a/drivers/gpu/drm/i915/i915_opregion.c +++ b/drivers/gpu/drm/i915/i915_opregion.c | |||
@@ -224,7 +224,7 @@ void opregion_asle_intr(struct drm_device *dev) | |||
224 | asle_req = asle->aslc & ASLE_REQ_MSK; | 224 | asle_req = asle->aslc & ASLE_REQ_MSK; |
225 | 225 | ||
226 | if (!asle_req) { | 226 | if (!asle_req) { |
227 | DRM_DEBUG("non asle set request??\n"); | 227 | DRM_DEBUG_DRIVER("non asle set request??\n"); |
228 | return; | 228 | return; |
229 | } | 229 | } |
230 | 230 | ||
@@ -361,9 +361,9 @@ int intel_opregion_init(struct drm_device *dev, int resume) | |||
361 | int err = 0; | 361 | int err = 0; |
362 | 362 | ||
363 | pci_read_config_dword(dev->pdev, PCI_ASLS, &asls); | 363 | pci_read_config_dword(dev->pdev, PCI_ASLS, &asls); |
364 | DRM_DEBUG("graphic opregion physical addr: 0x%x\n", asls); | 364 | DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls); |
365 | if (asls == 0) { | 365 | if (asls == 0) { |
366 | DRM_DEBUG("ACPI OpRegion not supported!\n"); | 366 | DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n"); |
367 | return -ENOTSUPP; | 367 | return -ENOTSUPP; |
368 | } | 368 | } |
369 | 369 | ||
@@ -373,30 +373,30 @@ int intel_opregion_init(struct drm_device *dev, int resume) | |||
373 | 373 | ||
374 | opregion->header = base; | 374 | opregion->header = base; |
375 | if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) { | 375 | if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) { |
376 | DRM_DEBUG("opregion signature mismatch\n"); | 376 | DRM_DEBUG_DRIVER("opregion signature mismatch\n"); |
377 | err = -EINVAL; | 377 | err = -EINVAL; |
378 | goto err_out; | 378 | goto err_out; |
379 | } | 379 | } |
380 | 380 | ||
381 | mboxes = opregion->header->mboxes; | 381 | mboxes = opregion->header->mboxes; |
382 | if (mboxes & MBOX_ACPI) { | 382 | if (mboxes & MBOX_ACPI) { |
383 | DRM_DEBUG("Public ACPI methods supported\n"); | 383 | DRM_DEBUG_DRIVER("Public ACPI methods supported\n"); |
384 | opregion->acpi = base + OPREGION_ACPI_OFFSET; | 384 | opregion->acpi = base + OPREGION_ACPI_OFFSET; |
385 | if (drm_core_check_feature(dev, DRIVER_MODESET)) | 385 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
386 | intel_didl_outputs(dev); | 386 | intel_didl_outputs(dev); |
387 | } else { | 387 | } else { |
388 | DRM_DEBUG("Public ACPI methods not supported\n"); | 388 | DRM_DEBUG_DRIVER("Public ACPI methods not supported\n"); |
389 | err = -ENOTSUPP; | 389 | err = -ENOTSUPP; |
390 | goto err_out; | 390 | goto err_out; |
391 | } | 391 | } |
392 | opregion->enabled = 1; | 392 | opregion->enabled = 1; |
393 | 393 | ||
394 | if (mboxes & MBOX_SWSCI) { | 394 | if (mboxes & MBOX_SWSCI) { |
395 | DRM_DEBUG("SWSCI supported\n"); | 395 | DRM_DEBUG_DRIVER("SWSCI supported\n"); |
396 | opregion->swsci = base + OPREGION_SWSCI_OFFSET; | 396 | opregion->swsci = base + OPREGION_SWSCI_OFFSET; |
397 | } | 397 | } |
398 | if (mboxes & MBOX_ASLE) { | 398 | if (mboxes & MBOX_ASLE) { |
399 | DRM_DEBUG("ASLE supported\n"); | 399 | DRM_DEBUG_DRIVER("ASLE supported\n"); |
400 | opregion->asle = base + OPREGION_ASLE_OFFSET; | 400 | opregion->asle = base + OPREGION_ASLE_OFFSET; |
401 | opregion_enable_asle(dev); | 401 | opregion_enable_asle(dev); |
402 | } | 402 | } |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7d3309bc0fd2..062c1d7cdace 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3690,7 +3690,7 @@ static void intel_gpu_idle_timer(unsigned long arg) | |||
3690 | struct drm_device *dev = (struct drm_device *)arg; | 3690 | struct drm_device *dev = (struct drm_device *)arg; |
3691 | drm_i915_private_t *dev_priv = dev->dev_private; | 3691 | drm_i915_private_t *dev_priv = dev->dev_private; |
3692 | 3692 | ||
3693 | DRM_DEBUG("idle timer fired, downclocking\n"); | 3693 | DRM_DEBUG_DRIVER("idle timer fired, downclocking\n"); |
3694 | 3694 | ||
3695 | dev_priv->busy = false; | 3695 | dev_priv->busy = false; |
3696 | 3696 | ||
@@ -3705,7 +3705,7 @@ void intel_increase_renderclock(struct drm_device *dev, bool schedule) | |||
3705 | return; | 3705 | return; |
3706 | 3706 | ||
3707 | if (!dev_priv->render_reclock_avail) { | 3707 | if (!dev_priv->render_reclock_avail) { |
3708 | DRM_DEBUG("not reclocking render clock\n"); | 3708 | DRM_DEBUG_DRIVER("not reclocking render clock\n"); |
3709 | return; | 3709 | return; |
3710 | } | 3710 | } |
3711 | 3711 | ||
@@ -3714,7 +3714,7 @@ void intel_increase_renderclock(struct drm_device *dev, bool schedule) | |||
3714 | pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock); | 3714 | pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock); |
3715 | else if (IS_I85X(dev)) | 3715 | else if (IS_I85X(dev)) |
3716 | pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock); | 3716 | pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock); |
3717 | DRM_DEBUG("increasing render clock frequency\n"); | 3717 | DRM_DEBUG_DRIVER("increasing render clock frequency\n"); |
3718 | 3718 | ||
3719 | /* Schedule downclock */ | 3719 | /* Schedule downclock */ |
3720 | if (schedule) | 3720 | if (schedule) |
@@ -3730,7 +3730,7 @@ void intel_decrease_renderclock(struct drm_device *dev) | |||
3730 | return; | 3730 | return; |
3731 | 3731 | ||
3732 | if (!dev_priv->render_reclock_avail) { | 3732 | if (!dev_priv->render_reclock_avail) { |
3733 | DRM_DEBUG("not reclocking render clock\n"); | 3733 | DRM_DEBUG_DRIVER("not reclocking render clock\n"); |
3734 | return; | 3734 | return; |
3735 | } | 3735 | } |
3736 | 3736 | ||
@@ -3790,7 +3790,7 @@ void intel_decrease_renderclock(struct drm_device *dev) | |||
3790 | 3790 | ||
3791 | pci_write_config_word(dev->pdev, HPLLCC, hpllcc); | 3791 | pci_write_config_word(dev->pdev, HPLLCC, hpllcc); |
3792 | } | 3792 | } |
3793 | DRM_DEBUG("decreasing render clock frequency\n"); | 3793 | DRM_DEBUG_DRIVER("decreasing render clock frequency\n"); |
3794 | } | 3794 | } |
3795 | 3795 | ||
3796 | /* Note that no increase function is needed for this - increase_renderclock() | 3796 | /* Note that no increase function is needed for this - increase_renderclock() |
@@ -3824,7 +3824,7 @@ static void intel_crtc_idle_timer(unsigned long arg) | |||
3824 | struct drm_crtc *crtc = &intel_crtc->base; | 3824 | struct drm_crtc *crtc = &intel_crtc->base; |
3825 | drm_i915_private_t *dev_priv = crtc->dev->dev_private; | 3825 | drm_i915_private_t *dev_priv = crtc->dev->dev_private; |
3826 | 3826 | ||
3827 | DRM_DEBUG("idle timer fired, downclocking\n"); | 3827 | DRM_DEBUG_DRIVER("idle timer fired, downclocking\n"); |
3828 | 3828 | ||
3829 | intel_crtc->busy = false; | 3829 | intel_crtc->busy = false; |
3830 | 3830 | ||
@@ -3847,7 +3847,7 @@ static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule) | |||
3847 | return; | 3847 | return; |
3848 | 3848 | ||
3849 | if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) { | 3849 | if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) { |
3850 | DRM_DEBUG("upclocking LVDS\n"); | 3850 | DRM_DEBUG_DRIVER("upclocking LVDS\n"); |
3851 | 3851 | ||
3852 | /* Unlock panel regs */ | 3852 | /* Unlock panel regs */ |
3853 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); | 3853 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); |
@@ -3858,7 +3858,7 @@ static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule) | |||
3858 | intel_wait_for_vblank(dev); | 3858 | intel_wait_for_vblank(dev); |
3859 | dpll = I915_READ(dpll_reg); | 3859 | dpll = I915_READ(dpll_reg); |
3860 | if (dpll & DISPLAY_RATE_SELECT_FPA1) | 3860 | if (dpll & DISPLAY_RATE_SELECT_FPA1) |
3861 | DRM_DEBUG("failed to upclock LVDS!\n"); | 3861 | DRM_DEBUG_DRIVER("failed to upclock LVDS!\n"); |
3862 | 3862 | ||
3863 | /* ...and lock them again */ | 3863 | /* ...and lock them again */ |
3864 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); | 3864 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); |
@@ -3890,7 +3890,7 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
3890 | * the manual case. | 3890 | * the manual case. |
3891 | */ | 3891 | */ |
3892 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { | 3892 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { |
3893 | DRM_DEBUG("downclocking LVDS\n"); | 3893 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); |
3894 | 3894 | ||
3895 | /* Unlock panel regs */ | 3895 | /* Unlock panel regs */ |
3896 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); | 3896 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); |
@@ -3901,7 +3901,7 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
3901 | intel_wait_for_vblank(dev); | 3901 | intel_wait_for_vblank(dev); |
3902 | dpll = I915_READ(dpll_reg); | 3902 | dpll = I915_READ(dpll_reg); |
3903 | if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) | 3903 | if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) |
3904 | DRM_DEBUG("failed to downclock LVDS!\n"); | 3904 | DRM_DEBUG_DRIVER("failed to downclock LVDS!\n"); |
3905 | 3905 | ||
3906 | /* ...and lock them again */ | 3906 | /* ...and lock them again */ |
3907 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); | 3907 | I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); |