Merge tag 'drm-intel-fixes-2017-05-29' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes

drm/i915 fixes for v4.12-rc4

* tag 'drm-intel-fixes-2017-05-29' of git://anongit.freedesktop.org/git/drm-intel:
  drm/i915: Stop pretending to mask/unmask LPE audio interrupts
  drm/i915/selftests: Silence compiler warning in igt_ctx_exec
  Revert "drm/i915: Restore lost "Initialized i915" welcome message"
  drm/i915/gvt: clean up unsubmited workloads before destroying kmem cache
  drm/i915/gvt: Disable compression workaround for Gen9
  drm/i915: set initialised only when init_context callback is NULL
  drm/i915: Fix new -Wint-in-bool-context gcc compiler warning
  drm/i915: use vma->size for appgtt allocate_va_range
  drm/i915: Do not sync RCU during shrinking

10 files changed, 55 insertions, 79 deletions

diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c
index dca989eb2d42..24fe04d6307b 100644
--- a/drivers/gpu/drm/i915/gvt/execlist.c
+++ b/drivers/gpu/drm/i915/gvt/execlist.c
@@ -779,8 +779,26 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu, int ring_id)
         vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw;
 }
 
+static void clean_workloads(struct intel_vgpu *vgpu, unsigned long engine_mask)
+{
+        struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
+        struct intel_engine_cs *engine;
+        struct intel_vgpu_workload *pos, *n;
+        unsigned int tmp;
+
+        /* free the unsubmited workloads in the queues. */
+        for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
+                list_for_each_entry_safe(pos, n,
+                        &vgpu->workload_q_head[engine->id], list) {
+                        list_del_init(&pos->list);
+                        free_workload(pos);
+                }
+        }
+}
+
 void intel_vgpu_clean_execlist(struct intel_vgpu *vgpu)
 {
+        clean_workloads(vgpu, ALL_ENGINES);
         kmem_cache_destroy(vgpu->workloads);
 }
 
@@ -811,17 +829,9 @@ void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu,
 {
         struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
         struct intel_engine_cs *engine;
-        struct intel_vgpu_workload *pos, *n;
         unsigned int tmp;
 
-        for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
-                /* free the unsubmited workload in the queue */
-                list_for_each_entry_safe(pos, n,
-                        &vgpu->workload_q_head[engine->id], list) {
-                        list_del_init(&pos->list);
-                        free_workload(pos);
-                }
-
+        clean_workloads(vgpu, engine_mask);
+        for_each_engine_masked(engine, dev_priv, engine_mask, tmp)
                 init_vgpu_execlist(vgpu, engine->id);
-        }
 }
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index c995e540ff96..0ffd69654592 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1366,18 +1366,28 @@ static int skl_misc_ctl_write(struct intel_vgpu *vgpu, unsigned int offset,
                 void *p_data, unsigned int bytes)
 {
         struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
-        i915_reg_t reg = {.reg = offset};
+        u32 v = *(u32 *)p_data;
+
+        if (!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv))
+                return intel_vgpu_default_mmio_write(vgpu,
+                                offset, p_data, bytes);
 
         switch (offset) {
         case 0x4ddc:
-                vgpu_vreg(vgpu, offset) = 0x8000003c;
-                /* WaCompressedResourceSamplerPbeMediaNewHashMode:skl */
-                I915_WRITE(reg, vgpu_vreg(vgpu, offset));
+                /* bypass WaCompressedResourceSamplerPbeMediaNewHashMode */
+                vgpu_vreg(vgpu, offset) = v & ~(1 << 31);
                 break;
         case 0x42080:
-                vgpu_vreg(vgpu, offset) = 0x8000;
-                /* WaCompressedResourceDisplayNewHashMode:skl */
-                I915_WRITE(reg, vgpu_vreg(vgpu, offset));
+                /* bypass WaCompressedResourceDisplayNewHashMode */
+                vgpu_vreg(vgpu, offset) = v & ~(1 << 15);
+                break;
+        case 0xe194:
+                /* bypass WaCompressedResourceSamplerPbeMediaNewHashMode */
+                vgpu_vreg(vgpu, offset) = v & ~(1 << 8);
+                break;
+        case 0x7014:
+                /* bypass WaCompressedResourceSamplerPbeMediaNewHashMode */
+                vgpu_vreg(vgpu, offset) = v & ~(1 << 13);
                 break;
         default:
                 return -EINVAL;
@@ -1634,7 +1644,8 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
         MMIO_DFH(GAM_ECOCHK, D_ALL, F_CMD_ACCESS, NULL, NULL);
         MMIO_DFH(GEN7_COMMON_SLICE_CHICKEN1, D_ALL, F_MODE_MASK | F_CMD_ACCESS,
                 NULL, NULL);
-        MMIO_DFH(COMMON_SLICE_CHICKEN2, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
+        MMIO_DFH(COMMON_SLICE_CHICKEN2, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL,
+                 skl_misc_ctl_write);
         MMIO_DFH(0x9030, D_ALL, F_CMD_ACCESS, NULL, NULL);
         MMIO_DFH(0x20a0, D_ALL, F_CMD_ACCESS, NULL, NULL);
         MMIO_DFH(0x2420, D_ALL, F_CMD_ACCESS, NULL, NULL);
@@ -2568,7 +2579,8 @@ static int init_broadwell_mmio_info(struct intel_gvt *gvt)
         MMIO_D(0x6e570, D_BDW_PLUS);
         MMIO_D(0x65f10, D_BDW_PLUS);
 
-        MMIO_DFH(0xe194, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
+        MMIO_DFH(0xe194, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL,
+                 skl_misc_ctl_write);
         MMIO_DFH(0xe188, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
         MMIO_DFH(HALF_SLICE_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
         MMIO_DFH(0x2580, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3036d4835b0f..c994fe6e65b2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1272,10 +1272,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 
         dev_priv->ipc_enabled = false;
 
-        /* Everything is in place, we can now relax! */
-        DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
-                 driver.name, driver.major, driver.minor, driver.patchlevel,
-                 driver.date, pci_name(pdev), dev_priv->drm.primary->index);
         if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))
                 DRM_INFO("DRM_I915_DEBUG enabled\n");
         if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a0563e18d753..50b8f1139ff9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2313,7 +2313,7 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma,
                     appgtt->base.allocate_va_range) {
                         ret = appgtt->base.allocate_va_range(&appgtt->base,
                                                              vma->node.start,
-                                                             vma->node.size);
+                                                             vma->size);
                         if (ret)
                                 goto err_pages;
                 }
diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c b/drivers/gpu/drm/i915/i915_gem_shrinker.c
index 129ed303a6c4..57d9f7f4ef15 100644
--- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
@@ -59,9 +59,6 @@ static void i915_gem_shrinker_unlock(struct drm_device *dev, bool unlock)
                 return;
 
         mutex_unlock(&dev->struct_mutex);
-
-        /* expedite the RCU grace period to free some request slabs */
-        synchronize_rcu_expedited();
 }
 
 static bool any_vma_pinned(struct drm_i915_gem_object *obj)
@@ -274,8 +271,6 @@ unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv)
                                 I915_SHRINK_ACTIVE);
         intel_runtime_pm_put(dev_priv);
 
-        synchronize_rcu(); /* wait for our earlier RCU delayed slab frees */
-
         return freed;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index fd97fe00cd0d..190f6aa5d15e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2953,7 +2953,6 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
         u32 pipestat_mask;
         u32 enable_mask;
         enum pipe pipe;
-        u32 val;
 
         pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV |
                         PIPE_CRC_DONE_INTERRUPT_STATUS;
@@ -2964,18 +2963,16 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
 
         enable_mask = I915_DISPLAY_PORT_INTERRUPT |
                 I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
-                I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+                I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+                I915_LPE_PIPE_A_INTERRUPT |
+                I915_LPE_PIPE_B_INTERRUPT;
+
         if (IS_CHERRYVIEW(dev_priv))
-                enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT;
+                enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT |
+                        I915_LPE_PIPE_C_INTERRUPT;
 
         WARN_ON(dev_priv->irq_mask != ~0);
 
-        val = (I915_LPE_PIPE_A_INTERRUPT |
-                I915_LPE_PIPE_B_INTERRUPT |
-                I915_LPE_PIPE_C_INTERRUPT);
-
-        enable_mask |= val;
-
         dev_priv->irq_mask = ~enable_mask;
 
         GEN5_IRQ_INIT(VLV_, dev_priv->irq_mask, enable_mask);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5a7c63e64381..65b837e96fe6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8280,7 +8280,7 @@ enum {
 
 /* MIPI DSI registers */
 
-#define _MIPI_PORT(port, a, c)  ((port) ? c : a)        /* ports A and C only */
+#define _MIPI_PORT(port, a, c)  (((port) == PORT_A) ? a : c)    /* ports A and C only */
 #define _MMIO_MIPI(port, a, c)  _MMIO(_MIPI_PORT(port, a, c))
 
 #define MIPIO_TXESC_CLK_DIV1                    _MMIO(0x160004)
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 668f00480d97..292fedf30b00 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -149,44 +149,10 @@ static void lpe_audio_platdev_destroy(struct drm_i915_private *dev_priv)
 
 static void lpe_audio_irq_unmask(struct irq_data *d)
 {
-        struct drm_i915_private *dev_priv = d->chip_data;
-        unsigned long irqflags;
-        u32 val = (I915_LPE_PIPE_A_INTERRUPT |
-                I915_LPE_PIPE_B_INTERRUPT);
-
-        if (IS_CHERRYVIEW(dev_priv))
-                val |= I915_LPE_PIPE_C_INTERRUPT;
-
-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-
-        dev_priv->irq_mask &= ~val;
-        I915_WRITE(VLV_IIR, val);
-        I915_WRITE(VLV_IIR, val);
-        I915_WRITE(VLV_IMR, dev_priv->irq_mask);
-        POSTING_READ(VLV_IMR);
-
-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 }
 
 static void lpe_audio_irq_mask(struct irq_data *d)
 {
-        struct drm_i915_private *dev_priv = d->chip_data;
-        unsigned long irqflags;
-        u32 val = (I915_LPE_PIPE_A_INTERRUPT |
-                I915_LPE_PIPE_B_INTERRUPT);
-
-        if (IS_CHERRYVIEW(dev_priv))
-                val |= I915_LPE_PIPE_C_INTERRUPT;
-
-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-
-        dev_priv->irq_mask |= val;
-        I915_WRITE(VLV_IMR, dev_priv->irq_mask);
-        I915_WRITE(VLV_IIR, val);
-        I915_WRITE(VLV_IIR, val);
-        POSTING_READ(VLV_IIR);
-
-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 }
 
 static struct irq_chip lpe_audio_irqchip = {
@@ -330,8 +296,6 @@ void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv)
 
         desc = irq_to_desc(dev_priv->lpe_audio.irq);
 
-        lpe_audio_irq_mask(&desc->irq_data);
-
         lpe_audio_platdev_destroy(dev_priv);
 
         irq_free_desc(dev_priv->lpe_audio.irq);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c8f7c631fc1f..dac4e003c1f3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1989,7 +1989,7 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
 
         ce->ring = ring;
         ce->state = vma;
-        ce->initialised = engine->init_context == NULL;
+        ce->initialised |= engine->init_context == NULL;
 
         return 0;
 
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index 1afb8b06e3e1..12b85b3278cd 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -320,7 +320,7 @@ static unsigned long max_dwords(struct drm_i915_gem_object *obj)
 static int igt_ctx_exec(void *arg)
 {
         struct drm_i915_private *i915 = arg;
-        struct drm_i915_gem_object *obj;
+        struct drm_i915_gem_object *obj = NULL;
         struct drm_file *file;
         IGT_TIMEOUT(end_time);
         LIST_HEAD(objects);
@@ -359,7 +359,7 @@ static int igt_ctx_exec(void *arg)
                 }
 
                 for_each_engine(engine, i915, id) {
-                        if (dw == 0) {
+                        if (!obj) {
                                 obj = create_test_object(ctx, file, &objects);
                                 if (IS_ERR(obj)) {
                                         err = PTR_ERR(obj);
@@ -376,8 +376,10 @@ static int igt_ctx_exec(void *arg)
                                 goto out_unlock;
                         }
 
-                        if (++dw == max_dwords(obj))
+                        if (++dw == max_dwords(obj)) {
+                                obj = NULL;
                                 dw = 0;
+                        }
                         ndwords++;
                 }
                 ncontexts++;